aac8915c8c
with variable length stack allocations on aarch64. Fixes CVE-2023-4039. [bsc#1214052] - Add gcc7-aarch64-untyped_call.patch to fix issue with __builtin_apply - Add gcc7-lra-elim.patch to fix internal compiler error when forming paired loads and stores on aarch64. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/gcc7?expand=0&rev=240
64 lines
2.3 KiB
Diff
64 lines
2.3 KiB
Diff
From 6787268a289bdbc32920b13b4697eaf756f9f7e0 Mon Sep 17 00:00:00 2001
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From: Richard Sandiford <richard.sandiford@arm.com>
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Date: Thu, 31 Aug 2023 16:15:10 +0100
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Subject: [PATCH] aarch64: Fix return register handling in untyped_call
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To: gcc-patches@gcc.gnu.org
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While working on another patch, I hit a problem with the aarch64
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expansion of untyped_call. The expander emits the usual:
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(set (mem ...) (reg resN))
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instructions to store the result registers to memory, but it didn't
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say in RTL where those resN results came from. This eventually led
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to a failure of gcc.dg/torture/stackalign/builtin-return-2.c,
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via regrename.
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This patch turns the untyped call from a plain call to a call_value,
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to represent that the call returns (or might return) a useful value.
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The patch also uses a PARALLEL return rtx to represent all the possible
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return registers.
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gcc/
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* config/aarch64/aarch64.md (untyped_call): Emit a call_value
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rather than a call. List each possible destination register
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in the call pattern.
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---
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gcc/config/aarch64/aarch64.md | 20 +++++++++++++++++++-
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1 file changed, 19 insertions(+), 1 deletion(-)
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diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
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index 90f9ee658c5..97d27677985 100644
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--- a/gcc/config/aarch64/aarch64.md
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+++ b/gcc/config/aarch64/aarch64.md
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@@ -934,7 +934,25 @@
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{
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int i;
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- emit_call_insn (gen_call (operands[0], const0_rtx, NULL));
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+ /* Generate a PARALLEL that contains all of the register results.
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+ The offsets are somewhat arbitrary, since we don't know the
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+ actual return type. The main thing we need to avoid is having
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+ overlapping byte ranges, since those might give the impression
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+ that two registers are known to have data in common. */
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+ rtvec rets = rtvec_alloc (XVECLEN (operands[2], 0));
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+ unsigned HOST_WIDE_INT offset = 0;
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+ for (i = 0; i < XVECLEN (operands[2], 0); i++)
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+ {
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+ rtx reg = SET_SRC (XVECEXP (operands[2], 0, i));
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+ gcc_assert (REG_P (reg));
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+ rtx offset_rtx = gen_int_mode (offset, Pmode);
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+ rtx piece = gen_rtx_EXPR_LIST (VOIDmode, reg, offset_rtx);
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+ RTVEC_ELT (rets, i) = piece;
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+ offset += GET_MODE_SIZE (GET_MODE (reg));
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+ }
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+ rtx ret = gen_rtx_PARALLEL (VOIDmode, rets);
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+
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+ emit_call_insn (gen_call_value (ret, operands[0], const0_rtx, NULL));
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for (i = 0; i < XVECLEN (operands[2], 0); i++)
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{
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--
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2.35.3
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