03a0cdce24
[bnc#1048861] OBS-URL: https://build.opensuse.org/package/show/devel:gcc/gcc7?expand=0&rev=87
48 lines
1.7 KiB
Diff
48 lines
1.7 KiB
Diff
2017-09-29 Vladimir Makarov <vmakarov@redhat.com>
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PR target/81481
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* ira-costs.c (scan_one_insn): Don't take into account PIC equiv
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with a symbol for LRA.
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* gcc.target/i386/pr81481.c: New.
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Index: gcc/testsuite/gcc.target/i386/pr81481.c
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===================================================================
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--- gcc/testsuite/gcc.target/i386/pr81481.c (nonexistent)
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+++ gcc/testsuite/gcc.target/i386/pr81481.c (revision 253300)
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@@ -0,0 +1,18 @@
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+/* { dg-do compile } */
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+/* { dg-require-effective-target ssse3 } */
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+/* { dg-options "-O2 -fpic -mssse3" } */
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+/* { dg-final { scan-assembler-not "pshufb\[ \t\]\\(%esp\\)" } } */
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+#include <immintrin.h>
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+
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+extern const signed char c[31] __attribute__((visibility("hidden")));
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+
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+__m128i f(__m128i *x, void *v)
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+{
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+ int i;
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+ asm("# %0" : "=r"(i));
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+ __m128i t = _mm_loadu_si128((void*)&c[i]);
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+ __m128i xx = *x;
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+ xx = _mm_shuffle_epi8(xx, t);
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+ asm("# %0 %1 %2" : "+x"(xx) : "r"(c), "r"(i));
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+ return xx;
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+}
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Index: gcc/ira-costs.c
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===================================================================
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--- gcc/ira-costs.c (revision 253299)
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+++ gcc/ira-costs.c (revision 253300)
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@@ -1471,7 +1471,10 @@ scan_one_insn (rtx_insn *insn)
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&& targetm.legitimate_constant_p (GET_MODE (SET_DEST (set)),
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XEXP (note, 0))
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&& REG_N_SETS (REGNO (SET_DEST (set))) == 1))
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- && general_operand (SET_SRC (set), GET_MODE (SET_SRC (set))))
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+ && general_operand (SET_SRC (set), GET_MODE (SET_SRC (set)))
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+ /* LRA does not use equiv with a symbol for PIC code. */
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+ && (! ira_use_lra_p || ! pic_offset_table_rtx
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+ || ! contains_symbol_ref_p (XEXP (note, 0))))
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{
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enum reg_class cl = GENERAL_REGS;
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rtx reg = SET_DEST (set);
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