193 lines
7.6 KiB
Diff
193 lines
7.6 KiB
Diff
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PowerPC: Add support for IEEE 128-bit format.
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The test gdb.base/infcall-nested-structs-c.exp fails on a gdb assert
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in function ppc64_sysv_abi_return_value in file gdb/ppc-sysv-tdep.c. The
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assert is due to the missing IEEE 128-bit support in file
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gdb/ppc-sysv-tdep.c.
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The IBM long double was the initial float 128-bit support added by IBM
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The IEEE 128-bit support, which is similar IBM long double support, was
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made the default starting with GCC 12. The floating point format
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differences include the number of bits used to encode the exponent
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and significand. Also, IBM long double values are passed in a pair of
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floating point registers. The IEEE 128-bit value is passed in a single
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vector register.
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This patch fixes the gdb_assert (ok); in function
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ppc64_sysv_abi_return_value in gdb/ppc-sysv-tdep.c by adding IEEE FLOAT
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128-bit type support for PowerPC.
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The patch has been tested on Power 10, ELFv2. It fixes the following list
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of regression failures on Power 10:
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gdb.base/infcall-nested-structs-c.exp 192
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gdb.base/infcall-nested-structs-c++.exp 76
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gdb.base/structs.exp 9
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The patch has been tested on Power 8 BE which is ELFv1.
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---
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gdb/ppc-sysv-tdep.c | 87 ++++++++++++++++++++++++++++++++++++++++++-----------
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1 file changed, 69 insertions(+), 18 deletions(-)
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diff --git a/gdb/ppc-sysv-tdep.c b/gdb/ppc-sysv-tdep.c
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index 9a3b02f028d..b7106542b5d 100644
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--- a/gdb/ppc-sysv-tdep.c
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+++ b/gdb/ppc-sysv-tdep.c
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@@ -450,12 +450,17 @@ ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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}
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}
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else if (len == 16
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- && type->code () == TYPE_CODE_ARRAY
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- && type->is_vector ()
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- && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
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+ && ((type->code () == TYPE_CODE_ARRAY
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+ && type->is_vector ()
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+ && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
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+ || (type->code () == TYPE_CODE_FLT
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+ && (gdbarch_long_double_format (gdbarch)
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+ == floatformats_ia64_quad))))
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{
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/* Vector parameter passed in an Altivec register, or
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- when that runs out, 16 byte aligned stack location. */
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+ when that runs out, 16 byte aligned stack location.
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+ IEEE FLOAT 128-bit also passes parameters in vector
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+ registers. */
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if (vreg <= 13)
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{
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if (write_pass)
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@@ -1180,7 +1185,8 @@ ppc64_aggregate_candidate (struct type *type,
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static int
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ppc64_elfv2_abi_homogeneous_aggregate (struct type *type,
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- struct type **elt_type, int *n_elts)
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+ struct type **elt_type, int *n_elts,
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+ struct gdbarch *gdbarch)
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{
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/* Complex types at the top level are treated separately. However,
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complex types can be elements of homogeneous aggregates. */
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@@ -1193,9 +1199,20 @@ ppc64_elfv2_abi_homogeneous_aggregate (struct type *type,
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if (field_count > 0)
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{
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- int n_regs = ((field_type->code () == TYPE_CODE_FLT
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- || field_type->code () == TYPE_CODE_DECFLOAT)?
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- (TYPE_LENGTH (field_type) + 7) >> 3 : 1);
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+ int n_regs;
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+
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+ if (field_type->code () == TYPE_CODE_FLT
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+ && (gdbarch_long_double_format (gdbarch)
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+ == floatformats_ia64_quad))
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+ /* IEEE Float 128-bit uses one vector register. */
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+ n_regs = 1;
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+
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+ else if (field_type->code () == TYPE_CODE_FLT
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+ || field_type->code () == TYPE_CODE_DECFLOAT)
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+ n_regs = (TYPE_LENGTH (field_type) + 7) >> 3;
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+
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+ else
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+ n_regs = 1;
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/* The ELFv2 ABI allows homogeneous aggregates to occupy
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up to 8 registers. */
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@@ -1422,7 +1439,16 @@ ppc64_sysv_abi_push_param (struct gdbarch *gdbarch,
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ppc_gdbarch_tdep *tdep = (ppc_gdbarch_tdep *) gdbarch_tdep (gdbarch);
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if (type->code () == TYPE_CODE_FLT
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- || type->code () == TYPE_CODE_DECFLOAT)
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+ && TYPE_LENGTH (type) == 16
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+ && (gdbarch_long_double_format (gdbarch)
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+ == floatformats_ia64_quad))
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+ {
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+ /* IEEE FLOAT128, args in vector registers. */
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+ ppc64_sysv_abi_push_val (gdbarch, val, TYPE_LENGTH (type), 0, argpos);
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+ ppc64_sysv_abi_push_vreg (gdbarch, val, argpos);
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+ }
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+ else if (type->code () == TYPE_CODE_FLT
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+ || type->code () == TYPE_CODE_DECFLOAT)
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{
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/* Floating-point scalars are passed in floating-point registers. */
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ppc64_sysv_abi_push_val (gdbarch, val, TYPE_LENGTH (type), 0, argpos);
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@@ -1494,14 +1520,22 @@ ppc64_sysv_abi_push_param (struct gdbarch *gdbarch,
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single floating-point value, at any level of nesting of
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single-member structs, are passed in floating-point registers. */
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if (type->code () == TYPE_CODE_STRUCT
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- && type->num_fields () == 1)
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+ && type->num_fields () == 1 && tdep->elf_abi == POWERPC_ELF_V1)
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{
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while (type->code () == TYPE_CODE_STRUCT
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&& type->num_fields () == 1)
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type = check_typedef (type->field (0).type ());
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- if (type->code () == TYPE_CODE_FLT)
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- ppc64_sysv_abi_push_freg (gdbarch, type, val, argpos);
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+ if (type->code () == TYPE_CODE_FLT) {
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+ /* Handle the case of 128-bit floats for both IEEE and IBM long double
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+ formats. */
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+ if (TYPE_LENGTH (type) == 16
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+ && (gdbarch_long_double_format (gdbarch)
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+ == floatformats_ia64_quad))
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+ ppc64_sysv_abi_push_vreg (gdbarch, val, argpos);
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+ else
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+ ppc64_sysv_abi_push_freg (gdbarch, type, val, argpos);
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+ }
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}
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/* In the ELFv2 ABI, homogeneous floating-point or vector
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@@ -1511,13 +1545,23 @@ ppc64_sysv_abi_push_param (struct gdbarch *gdbarch,
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struct type *eltype;
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int i, nelt;
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- if (ppc64_elfv2_abi_homogeneous_aggregate (type, &eltype, &nelt))
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+ if (ppc64_elfv2_abi_homogeneous_aggregate (type, &eltype, &nelt,
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+ gdbarch))
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for (i = 0; i < nelt; i++)
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{
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const gdb_byte *elval = val + i * TYPE_LENGTH (eltype);
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if (eltype->code () == TYPE_CODE_FLT
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- || eltype->code () == TYPE_CODE_DECFLOAT)
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+ && TYPE_LENGTH (eltype) == 16
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+ && (gdbarch_long_double_format (gdbarch)
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+ == floatformats_ia64_quad))
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+ /* IEEE FLOAT128, args in vector registers. */
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+ ppc64_sysv_abi_push_vreg (gdbarch, elval, argpos);
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+
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+ else if (eltype->code () == TYPE_CODE_FLT
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+ || eltype->code () == TYPE_CODE_DECFLOAT)
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+ /* IBM long double and all other floats and decfloats, args
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+ are in a pair of floating point registers. */
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ppc64_sysv_abi_push_freg (gdbarch, eltype, elval, argpos);
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else if (eltype->code () == TYPE_CODE_ARRAY
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&& eltype->is_vector ()
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@@ -1871,10 +1915,16 @@ ppc64_sysv_abi_return_value_base (struct gdbarch *gdbarch, struct type *valtype,
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return 1;
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}
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- /* AltiVec vectors are returned in VRs starting at v2. */
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+ /* AltiVec vectors are returned in VRs starting at v2.
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+ IEEE FLOAT 128-bit are stored in vector register. */
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+
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if (TYPE_LENGTH (valtype) == 16
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- && valtype->code () == TYPE_CODE_ARRAY && valtype->is_vector ()
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- && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
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+ && ((valtype->code () == TYPE_CODE_ARRAY
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+ && valtype->is_vector ()
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+ && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
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+ || (valtype->code () == TYPE_CODE_FLT
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+ && (gdbarch_long_double_format (gdbarch)
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+ == floatformats_ia64_quad))))
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{
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int regnum = tdep->ppc_vr0_regnum + 2 + index;
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@@ -2012,7 +2062,8 @@ ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct value *function,
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/* In the ELFv2 ABI, homogeneous floating-point or vector
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aggregates are returned in registers. */
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if (tdep->elf_abi == POWERPC_ELF_V2
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- && ppc64_elfv2_abi_homogeneous_aggregate (valtype, &eltype, &nelt)
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+ && ppc64_elfv2_abi_homogeneous_aggregate (valtype, &eltype, &nelt,
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+ gdbarch)
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&& (eltype->code () == TYPE_CODE_FLT
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|| eltype->code () == TYPE_CODE_DECFLOAT
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|| (eltype->code () == TYPE_CODE_ARRAY
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