From 0255a8ed6d31b3aab71a410df15c7824d50a62cceed68bd545048a1f899bfdd1 Mon Sep 17 00:00:00 2001 From: OBS User unknown Date: Wed, 24 Sep 2008 13:25:01 +0000 Subject: [PATCH] OBS-URL: https://build.opensuse.org/package/show/openSUSE:Factory/gdb?expand=0&rev=43 --- cell-combined.diff | 7 +- gdb-6.8.50.20080912-cvs.tar.bz2 | 3 - gdb-6.8.50.20080924-cvs.tar.bz2 | 3 + gdb.changes | 8 + gdb.spec | 20 +- pie-relocate.diff | 58 +- power7-gdbserver.diff | 912 ++++++++++++++++++++ power7.diff | 1430 +++++++++++++++++++++++++++++++ 8 files changed, 2417 insertions(+), 24 deletions(-) delete mode 100644 gdb-6.8.50.20080912-cvs.tar.bz2 create mode 100644 gdb-6.8.50.20080924-cvs.tar.bz2 create mode 100644 power7-gdbserver.diff create mode 100644 power7.diff diff --git a/cell-combined.diff b/cell-combined.diff index 49936c8..a0331bd 100644 --- a/cell-combined.diff +++ b/cell-combined.diff @@ -5034,7 +5034,7 @@ Index: gdb-head/gdb/solib-spu.c =================================================================== --- /dev/null +++ gdb-head/gdb/solib-spu.c -@@ -0,0 +1,477 @@ +@@ -0,0 +1,478 @@ +/* Cell SPU GNU/Linux support -- shared library handling. + Copyright (C) 2008 Free Software Foundation, Inc. + @@ -5115,6 +5115,7 @@ Index: gdb-head/gdb/solib-spu.c + if (target_has_execution) + { + struct cleanup *old_chain; ++ struct inferior *inferior = current_inferior (); + + /* Suppress MI messages that are unexpected at this point. */ + old_chain = make_cleanup_restore_integer (&suppress_resume_observer); @@ -5128,10 +5129,10 @@ Index: gdb-head/gdb/solib-spu.c + in particular when using the extended-remote target. Thus, we pass + TARGET_SIGNAL_TRAP to resume -- this way we will always get a trap. + (If one was already pending, it will be combined into this trap.) */ -+ stop_soon = STOP_QUIETLY; ++ inferior->stop_soon = STOP_QUIETLY; + resume (0, TARGET_SIGNAL_TRAP); + wait_for_inferior (1); -+ stop_soon = NO_STOP_QUIETLY; ++ inferior->stop_soon = NO_STOP_QUIETLY; + + do_cleanups (old_chain); + } diff --git a/gdb-6.8.50.20080912-cvs.tar.bz2 b/gdb-6.8.50.20080912-cvs.tar.bz2 deleted file mode 100644 index 515beb2..0000000 --- a/gdb-6.8.50.20080912-cvs.tar.bz2 +++ /dev/null @@ -1,3 +0,0 @@ -version https://git-lfs.github.com/spec/v1 -oid sha256:a111a5de16ce2b20aee06861152178301ebfac4112f87ccf9bfc9af92d1ac2fb -size 15498271 diff --git a/gdb-6.8.50.20080924-cvs.tar.bz2 b/gdb-6.8.50.20080924-cvs.tar.bz2 new file mode 100644 index 0000000..f352411 --- /dev/null +++ b/gdb-6.8.50.20080924-cvs.tar.bz2 @@ -0,0 +1,3 @@ +version https://git-lfs.github.com/spec/v1 +oid sha256:cf5383c3218942960d8ee04fe027845a31a568d32c45232bb9717e860dea45af +size 15531415 diff --git a/gdb.changes b/gdb.changes index df827a5..d76ea1b 100644 --- a/gdb.changes +++ b/gdb.changes @@ -1,3 +1,11 @@ +------------------------------------------------------------------- +Wed Sep 24 14:23:01 CEST 2008 - schwab@suse.de + +- Update to head of trunk. +- Add POWER7 support. +- Add gcore. +- Add spu-elf to list of targets. + ------------------------------------------------------------------- Fri Sep 12 11:36:50 CEST 2008 - schwab@suse.de diff --git a/gdb.spec b/gdb.spec index b5a5498..ebddca1 100644 --- a/gdb.spec +++ b/gdb.spec @@ -1,5 +1,5 @@ # -# spec file for package gdb (Version 6.8.50.20080912) +# spec file for package gdb (Version 6.8.50.20080924) # # Copyright (c) 2008 SUSE LINUX Products GmbH, Nuernberg, Germany. # @@ -18,6 +18,9 @@ Name: gdb +Summary: The GNU Debugger +Version: 6.8.50.20080924 +Release: 1 BuildRequires: bison dejagnu flex gcc-c++ gcc-fortran gcc-java gcc-objc python-devel readline-devel zlib-devel %if 0%{?suse_version} > 1020 BuildRequires: libexpat-devel @@ -35,9 +38,6 @@ License: GNU Free Documentation License, Version 1.2 (GFDL 1.2); GPL v2 o Group: Development/Tools/Debuggers AutoReqProv: on PreReq: %{install_info_prereq} -Summary: The GNU Debugger -Version: 6.8.50.20080912 -Release: 1 %define sss -cvs Source: gdb-%{version}%{sss}.tar.bz2 Patch: cell-combined.diff @@ -51,6 +51,8 @@ Patch7: pie-relocate.diff Patch8: find-separate-debug-file.diff Patch9: fix-gdb-backtrace.diff Patch10: expand-line-sal-maybe.diff +Patch11: power7.diff +Patch12: power7-gdbserver.diff BuildRoot: %{_tmppath}/%{name}-%{version}-build %description @@ -121,6 +123,8 @@ Authors: %patch8 %patch9 %patch10 +%patch11 -p1 +%patch12 -p1 %build %ifarch %ix86 ia64 ppc ppc64 s390 s390x x86_64 @@ -132,6 +136,7 @@ Authors: %define DIST %(echo '%distribution' | sed 's/ (.*)//') %if %build_multitarget ADDITIONAL_TARGETS="%(echo %target_list | sed -e 's/[^ ]\+/&-suse-linux/g')" +ADDITIONAL_TARGETS="$ADDITIONAL_TARGETS spu-elf" %else ADDITIONAL_TARGETS= %endif @@ -158,6 +163,7 @@ make -k check || : %install make install-gdb install-info-gdb DESTDIR="$RPM_BUILD_ROOT" +install -m 755 gdb/gdb_gcore.sh $RPM_BUILD_ROOT%{_bindir}/gcore rm -f $RPM_BUILD_ROOT%{_bindir}/gdbtui rm -f $RPM_BUILD_ROOT%{_mandir}/man1/gdbtui.1 rm -f $RPM_BUILD_ROOT%{_infodir}/stabs.info* @@ -180,6 +186,7 @@ rm -rf $RPM_BUILD_ROOT %doc COPYING COPYING.LIB gdb/README gdb/NEWS %{_bindir}/gdb %{_bindir}/gstack +%{_bindir}/gcore %{_mandir}/man1/gdb.1.gz %{_infodir}/annotate.info*.gz %{_infodir}/gdb.info*.gz @@ -194,6 +201,11 @@ rm -rf $RPM_BUILD_ROOT %endif %changelog +* Wed Sep 24 2008 schwab@suse.de +- Update to head of trunk. +- Add POWER7 support. +- Add gcore. +- Add spu-elf to list of targets. * Fri Sep 12 2008 schwab@suse.de - Update to head of trunk. - Add Cell combined debugger patch. diff --git a/pie-relocate.diff b/pie-relocate.diff index ed48c8f..5a2c4b9 100644 --- a/pie-relocate.diff +++ b/pie-relocate.diff @@ -1,6 +1,6 @@ --- gdb/breakpoint.c +++ gdb/breakpoint.c -@@ -4119,6 +4119,7 @@ describe_other_breakpoints (CORE_ADDR pc +@@ -4125,6 +4125,7 @@ describe_other_breakpoints (CORE_ADDR pc printf_filtered (" (thread %d)", b->thread); printf_filtered ("%s%s ", ((b->enable_state == bp_disabled || @@ -8,7 +8,7 @@ b->enable_state == bp_call_disabled) ? " (disabled)" : b->enable_state == bp_permanent -@@ -4194,6 +4195,7 @@ check_duplicates_for (CORE_ADDR address, +@@ -4200,6 +4201,7 @@ check_duplicates_for (CORE_ADDR address, ALL_BP_LOCATIONS (b) if (b->owner->enable_state != bp_disabled && b->owner->enable_state != bp_call_disabled @@ -16,7 +16,7 @@ && b->enabled && !b->shlib_disabled && b->address == address /* address / overlay match */ -@@ -4229,6 +4231,7 @@ check_duplicates_for (CORE_ADDR address, +@@ -4235,6 +4237,7 @@ check_duplicates_for (CORE_ADDR address, { if (b->owner->enable_state != bp_disabled && b->owner->enable_state != bp_call_disabled @@ -24,7 +24,7 @@ && b->enabled && !b->shlib_disabled && b->address == address /* address / overlay match */ && (!overlay_debugging || b->section == section) -@@ -4760,6 +4763,60 @@ disable_breakpoints_in_unloaded_shlib (s +@@ -4766,6 +4769,60 @@ disable_breakpoints_in_unloaded_shlib (s } } @@ -85,7 +85,7 @@ static void create_fork_vfork_event_catchpoint (int tempflag, char *cond_string, enum bptype bp_kind) -@@ -7555,6 +7612,7 @@ breakpoint_re_set_one (void *bint) +@@ -7561,6 +7618,7 @@ breakpoint_re_set_one (void *bint) if (not_found && (b->condition_not_parsed || (b->loc && b->loc->shlib_disabled) @@ -103,7 +103,7 @@ bp_permanent /* There is a breakpoint instruction hard-wired into the target's code. Don't try to write another breakpoint instruction on top of it, or restore -@@ -842,6 +843,10 @@ extern void remove_thread_event_breakpoi +@@ -843,6 +844,10 @@ extern void remove_thread_event_breakpoi extern void disable_breakpoints_in_shlibs (void); @@ -116,7 +116,7 @@ --- gdb/dwarf2read.c +++ gdb/dwarf2read.c -@@ -1257,7 +1257,7 @@ dwarf2_build_psymtabs (struct objfile *o +@@ -1258,7 +1258,7 @@ dwarf2_build_psymtabs (struct objfile *o else dwarf2_per_objfile->loc_buffer = NULL; @@ -136,13 +136,43 @@ { init_psymbol_list (objfile, 0); mainline = 0; +--- gdb/ia64-tdep.c ++++ gdb/ia64-tdep.c +@@ -3243,8 +3243,13 @@ ia64_convert_from_func_ptr_addr (struct + the target address itself points to a section that is executable. */ + if (s && (s->the_bfd_section->flags & SEC_CODE) == 0) + { +- CORE_ADDR pc = read_memory_unsigned_integer (addr, 8); +- struct obj_section *pc_section = find_pc_section (pc); ++ char buf[8]; ++ CORE_ADDR pc; ++ struct obj_section *pc_section; ++ if (target_read_memory (addr, buf, sizeof (buf)) == 0) ++ return addr; ++ pc = extract_unsigned_integer (buf, sizeof (buf)); ++ pc_section = find_pc_section (pc); + + if (pc_section && (pc_section->the_bfd_section->flags & SEC_CODE)) + return pc; --- gdb/infrun.c +++ gdb/infrun.c -@@ -1958,6 +1958,11 @@ handle_inferior_event (struct execution_ +@@ -1972,6 +1972,11 @@ handle_inferior_event (struct execution_ #endif target_terminal_inferior (); -+ /* For PIE executables, we dont really know where the ++ /* For PIE executables, we don't really know where the ++ breakpoints are going to be until we start up the ++ inferior. */ ++ re_enable_breakpoints_at_startup (); ++ + /* If requested, stop when the dynamic linker notifies + gdb of events. This allows the user to get control + and place breakpoints in initializer routines for +@@ -2896,6 +2901,11 @@ infrun: BPSTAT_WHAT_SET_LONGJMP_RESUME ( + #endif + target_terminal_inferior (); + ++ /* For PIE executables, we don't really know where the + breakpoints are going to be until we start up the + inferior. */ + re_enable_breakpoints_at_startup (); @@ -332,9 +362,9 @@ /* Return 1 if PC lies in the dynamic symbol resolution code of the SVR4 run time loader. */ static CORE_ADDR interp_text_sect_low; -@@ -1604,6 +1638,8 @@ svr4_solib_create_inferior_hook (void) +@@ -1606,6 +1640,8 @@ svr4_solib_create_inferior_hook (void) while (tp->stop_signal != TARGET_SIGNAL_TRAP); - stop_soon = NO_STOP_QUIETLY; + inf->stop_soon = NO_STOP_QUIETLY; #endif /* defined(_SCO_DS) */ + + disable_breakpoints_at_startup (1); @@ -385,7 +415,7 @@ free_section_addr_info (sap); return (1); -@@ -627,28 +648,7 @@ update_solib_list (int from_tty, struct +@@ -633,28 +654,7 @@ update_solib_list (int from_tty, struct /* Fill in the rest of each of the `struct so_list' nodes. */ for (i = inferior; i; i = i->next) { @@ -415,7 +445,7 @@ /* Notify any observer that the shared object has been loaded now that we've added it to GDB's tables. */ -@@ -744,6 +744,39 @@ solib_add (char *pattern, int from_tty, +@@ -750,6 +750,39 @@ solib_add (char *pattern, int from_tty, } } @@ -546,7 +576,7 @@ free_all_objfiles (); /* solib descriptors may have handles to objfiles. Since their -@@ -2451,6 +2456,8 @@ reread_symbols (void) +@@ -2454,6 +2459,8 @@ reread_symbols (void) /* Discard cleanups as symbol reading was successful. */ discard_cleanups (old_cleanups); diff --git a/power7-gdbserver.diff b/power7-gdbserver.diff new file mode 100644 index 0000000..1dfceec --- /dev/null +++ b/power7-gdbserver.diff @@ -0,0 +1,912 @@ +2008-09-14 Thiago Jung Bauermann + +gdb/ + * features/Makefile (rs6000/powerpc-isa205-32l-expedite, + rs6000/powerpc-isa205-altivec32l-expedite, + powerpc-isa205-vsx32l-expedite, rs6000/powerpc-isa205-64l-expedite, + rs6000/powerpc-isa205-altivec64l-expedite, + powerpc-isa205-vsx64l-expedite): New variables. + * regformats/rs6000/powerpc-isa205-32l.dat: Generate. + * regformats/rs6000/powerpc-isa205-altivec32l.dat: Generate. + * regformats/rs6000/powerpc-isa205-vsx32l.dat: Generate. + * regformats/rs6000/powerpc-isa205-64l.dat: Generate. + * regformats/rs6000/powerpc-isa205-altivec64l.dat: Generate. + * regformats/rs6000/powerpc-isa205-vsx64l.dat: Generate. + +gdbserver/ + * Makefile.in (powerpc-isa205-32l.o, powerpc-isa205-32l.c, + powerpc-isa205-altivec32l.o, powerpc-isa205-altivec32l.c, + powerpc-isa205-vsx32l.o, powerpc-isa205-vsx32l.c, + powerpc-isa205-64l.o, powerpc-isa205-64l.c, + powerpc-isa205-altivec64l.o, powerpc-isa205-altivec64l.c, + powerpc-isa205-vsx64l.o, powerpc-isa205-vsx64l.c): New targets. + * configure.srv (powerpc*-*-linux*): Add ISA 2.05 object files and + XML target descriptions. + * linux-ppc-low.c (ppc_arch_setup): Init registers with 64-bit FPSCR + when inferior is running on an ISA 2.05 or later processor. Add + special case to return offset for full 64-bit slot of FPSCR when + in 32-bits. + +Index: gdb-6.8.50.20080904-cvs/gdb/features/Makefile +================================================================================ +--- gdb-6.8.50.20080916-cvs/gdb/features/Makefile ++++ gdb-6.8.50.20080916-cvs/gdb/features/Makefile +@@ -44,11 +44,17 @@ rs6000/powerpc-32l-expedite = r1,pc + rs6000/powerpc-altivec32l-expedite = r1,pc + rs6000/powerpc-cell32l-expedite = r1,pc,r0,orig_r3,r4 + rs6000/powerpc-vsx32l-expedite = r1,pc ++rs6000/powerpc-isa205-32l-expedite = r1,pc ++rs6000/powerpc-isa205-altivec32l-expedite = r1,pc ++rs6000/powerpc-isa205-vsx32l-expedite = r1,pc + rs6000/powerpc-e500l-expedite = r1,pc + rs6000/powerpc-64l-expedite = r1,pc + rs6000/powerpc-altivec64l-expedite = r1,pc + rs6000/powerpc-cell64l-expedite = r1,pc,r0,orig_r3,r4 + rs6000/powerpc-vsx64l-expedite = r1,pc ++rs6000/powerpc-isa205-64l-expedite = r1,pc ++rs6000/powerpc-isa205-altivec64l-expedite = r1,pc ++rs6000/powerpc-isa205-vsx64l-expedite = r1,pc + + + XSLTPROC = xsltproc +--- gdb-6.8.50.20080916-cvs/gdb/gdbserver/Makefile.in ++++ gdb-6.8.50.20080916-cvs/gdb/gdbserver/Makefile.in +@@ -226,6 +226,9 @@ clean: + rm -f powerpc-32l.c powerpc-64l.c powerpc-e500l.c + rm -f powerpc-altivec32l.c powerpc-cell32l.c powerpc-vsx32l.c + rm -f powerpc-altivec64l.c powerpc-cell64l.c powerpc-vsx64l.c ++ rm -f powerpc-isa205-32l.c powerpc-isa205-64l.c ++ rm -f powerpc-isa205-vsx32l.c powerpc-isa205-altivec32l.c ++ rm -f powerpc-isa205-vsx64l.c powerpc-isa205-altivec64l.c + rm -f xml-builtin.c stamp-xml + + maintainer-clean realclean distclean: clean +@@ -376,6 +379,15 @@ powerpc-cell32l.c : $(srcdir)/../regform + powerpc-vsx32l.o : powerpc-vsx32l.c $(regdef_h) + powerpc-vsx32l.c : $(srcdir)/../regformats/rs6000/powerpc-vsx32l.dat $(regdat_sh) + $(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-vsx32l.dat powerpc-vsx32l.c ++powerpc-isa205-32l.o : powerpc-isa205-32l.c $(regdef_h) ++powerpc-isa205-32l.c : $(srcdir)/../regformats/rs6000/powerpc-isa205-32l.dat $(regdat_sh) ++ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-isa205-32l.dat powerpc-isa205-32l.c ++powerpc-isa205-altivec32l.o : powerpc-isa205-altivec32l.c $(regdef_h) ++powerpc-isa205-altivec32l.c : $(srcdir)/../regformats/rs6000/powerpc-isa205-altivec32l.dat $(regdat_sh) ++ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-isa205-altivec32l.dat powerpc-isa205-altivec32l.c ++powerpc-isa205-vsx32l.o : powerpc-isa205-vsx32l.c $(regdef_h) ++powerpc-isa205-vsx32l.c : $(srcdir)/../regformats/rs6000/powerpc-isa205-vsx32l.dat $(regdat_sh) ++ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-isa205-vsx32l.dat powerpc-isa205-vsx32l.c + powerpc-e500l.o : powerpc-e500l.c $(regdef_h) + powerpc-e500l.c : $(srcdir)/../regformats/rs6000/powerpc-e500l.dat $(regdat_sh) + $(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-e500l.dat powerpc-e500l.c +@@ -391,6 +403,15 @@ powerpc-cell64l.c : $(srcdir)/../regform + powerpc-vsx64l.o : powerpc-vsx64l.c $(regdef_h) + powerpc-vsx64l.c : $(srcdir)/../regformats/rs6000/powerpc-vsx64l.dat $(regdat_sh) + $(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-vsx64l.dat powerpc-vsx64l.c ++powerpc-isa205-64l.o : powerpc-isa205-64l.c $(regdef_h) ++powerpc-isa205-64l.c : $(srcdir)/../regformats/rs6000/powerpc-isa205-64l.dat $(regdat_sh) ++ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-isa205-64l.dat powerpc-isa205-64l.c ++powerpc-isa205-altivec64l.o : powerpc-isa205-altivec64l.c $(regdef_h) ++powerpc-isa205-altivec64l.c : $(srcdir)/../regformats/rs6000/powerpc-isa205-altivec64l.dat $(regdat_sh) ++ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-isa205-altivec64l.dat powerpc-isa205-altivec64l.c ++powerpc-isa205-vsx64l.o : powerpc-isa205-vsx64l.c $(regdef_h) ++powerpc-isa205-vsx64l.c : $(srcdir)/../regformats/rs6000/powerpc-isa205-vsx64l.dat $(regdat_sh) ++ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-isa205-vsx64l.dat powerpc-isa205-vsx64l.c + reg-s390.o : reg-s390.c $(regdef_h) + reg-s390.c : $(srcdir)/../regformats/reg-s390.dat $(regdat_sh) + $(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-s390.dat reg-s390.c +--- gdb-6.8.50.20080916-cvs/gdb/gdbserver/configure.srv ++++ gdb-6.8.50.20080916-cvs/gdb/gdbserver/configure.srv +@@ -104,27 +104,40 @@ case "${target}" in + srv_regobj="${srv_regobj} powerpc-altivec32l.o" + srv_regobj="${srv_regobj} powerpc-cell32l.o" + srv_regobj="${srv_regobj} powerpc-vsx32l.o" ++ srv_regobj="${srv_regobj} powerpc-isa205-32l.o" ++ srv_regobj="${srv_regobj} powerpc-isa205-altivec32l.o" ++ srv_regobj="${srv_regobj} powerpc-isa205-vsx32l.o" + srv_regobj="${srv_regobj} powerpc-e500l.o" + srv_regobj="${srv_regobj} powerpc-64l.o" + srv_regobj="${srv_regobj} powerpc-altivec64l.o" + srv_regobj="${srv_regobj} powerpc-cell64l.o" + srv_regobj="${srv_regobj} powerpc-vsx64l.o" ++ srv_regobj="${srv_regobj} powerpc-isa205-64l.o" ++ srv_regobj="${srv_regobj} powerpc-isa205-altivec64l.o" ++ srv_regobj="${srv_regobj} powerpc-isa205-vsx64l.o" + srv_tgtobj="linux-low.o linux-ppc-low.o" + srv_xmlfiles="rs6000/powerpc-32l.xml" + srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-altivec32l.xml" + srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-cell32l.xml" + srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-vsx32l.xml" ++ srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-isa205-32l.xml" ++ srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-isa205-altivec32l.xml" ++ srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-isa205-vsx32l.xml" + srv_xmlfiles="${srv_xmlfiles} rs6000/power-altivec.xml" + srv_xmlfiles="${srv_xmlfiles} rs6000/power-vsx.xml" + srv_xmlfiles="${srv_xmlfiles} rs6000/power-core.xml" + srv_xmlfiles="${srv_xmlfiles} rs6000/power-linux.xml" + srv_xmlfiles="${srv_xmlfiles} rs6000/power-fpu.xml" ++ srv_xmlfiles="${srv_xmlfiles} rs6000/power-fpu-isa205.xml" + srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-e500l.xml" + srv_xmlfiles="${srv_xmlfiles} rs6000/power-spe.xml" + srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-64l.xml" + srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-altivec64l.xml" + srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-cell64l.xml" + srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-vsx64l.xml" ++ srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-isa205-64l.xml" ++ srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-isa205-altivec64l.xml" ++ srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-isa205-vsx64l.xml" + srv_xmlfiles="${srv_xmlfiles} rs6000/power64-core.xml" + srv_xmlfiles="${srv_xmlfiles} rs6000/power64-linux.xml" + srv_linux_usrregs=yes +--- gdb-6.8.50.20080916-cvs/gdb/gdbserver/linux-ppc-low.c ++++ gdb-6.8.50.20080916-cvs/gdb/gdbserver/linux-ppc-low.c +@@ -29,6 +29,7 @@ + #define PPC_FEATURE_HAS_ALTIVEC 0x10000000 + #define PPC_FEATURE_HAS_SPE 0x00800000 + #define PPC_FEATURE_CELL 0x00010000 ++#define PPC_FEATURE_ARCH_2_05 0x00001000 + + static unsigned long ppc_hwcap; + +@@ -41,6 +42,12 @@ void init_registers_powerpc_altivec32l ( + void init_registers_powerpc_cell32l (void); + /* Defined in auto-generated file powerpc-vsx32l.c. */ + void init_registers_powerpc_vsx32l (void); ++/* Defined in auto-generated file powerpc-isa205-32l.c. */ ++void init_registers_powerpc_isa205_32l (void); ++/* Defined in auto-generated file powerpc-isa205-altivec32l.c. */ ++void init_registers_powerpc_isa205_altivec32l (void); ++/* Defined in auto-generated file powerpc-isa205-vsx32l.c. */ ++void init_registers_powerpc_isa205_vsx32l (void); + /* Defined in auto-generated file powerpc-e500l.c. */ + void init_registers_powerpc_e500l (void); + /* Defined in auto-generated file powerpc-64l.c. */ +@@ -51,6 +58,12 @@ void init_registers_powerpc_altivec64l ( + void init_registers_powerpc_cell64l (void); + /* Defined in auto-generated file powerpc-vsx64l.c. */ + void init_registers_powerpc_vsx64l (void); ++/* Defined in auto-generated file powerpc-isa205-64l.c. */ ++void init_registers_powerpc_isa205_64l (void); ++/* Defined in auto-generated file powerpc-isa205-altivec64l.c. */ ++void init_registers_powerpc_isa205_altivec64l (void); ++/* Defined in auto-generated file powerpc-isa205-vsx64l.c. */ ++void init_registers_powerpc_isa205_vsx64l (void); + + #define ppc_num_regs 73 + +@@ -337,9 +350,20 @@ ppc_arch_setup (void) + if (ppc_hwcap & PPC_FEATURE_CELL) + init_registers_powerpc_cell64l (); + else if (ppc_hwcap & PPC_FEATURE_HAS_VSX) +- init_registers_powerpc_vsx64l (); ++ { ++ if (ppc_hwcap & PPC_FEATURE_ARCH_2_05) ++ init_registers_powerpc_isa205_vsx64l (); ++ else ++ init_registers_powerpc_vsx64l (); ++ } + else if (ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC) +- init_registers_powerpc_altivec64l (); ++ { ++ if (ppc_hwcap & PPC_FEATURE_ARCH_2_05) ++ init_registers_powerpc_isa205_altivec64l (); ++ else ++ init_registers_powerpc_altivec64l (); ++ } ++ + return; + } + #endif +@@ -351,9 +375,19 @@ ppc_arch_setup (void) + if (ppc_hwcap & PPC_FEATURE_CELL) + init_registers_powerpc_cell32l (); + else if (ppc_hwcap & PPC_FEATURE_HAS_VSX) +- init_registers_powerpc_vsx32l (); ++ { ++ if (ppc_hwcap & PPC_FEATURE_ARCH_2_05) ++ init_registers_powerpc_isa205_vsx32l (); ++ else ++ init_registers_powerpc_vsx32l (); ++ } + else if (ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC) +- init_registers_powerpc_altivec32l (); ++ { ++ if (ppc_hwcap & PPC_FEATURE_ARCH_2_05) ++ init_registers_powerpc_isa205_altivec32l (); ++ else ++ init_registers_powerpc_altivec32l (); ++ } + + + /* On 32-bit machines, check for SPE registers. +@@ -365,6 +399,12 @@ ppc_arch_setup (void) + init_registers_powerpc_e500l (); + the_low_target.regmap = ppc_regmap_e500; + } ++ ++ /* If the FPSCR is 64-bit wide, we need to fetch the whole 64-bit ++ slot and not just its second word. The PT_FPSCR supplied in a ++ 32-bit GDB compilation doesn't reflect this. */ ++ if (register_size (70) == 8) ++ ppc_regmap[70] = (48 + 2*32) * sizeof (long); + #endif + } + +--- gdb-6.8.50.20080916-cvs/gdb/regformats/rs6000/powerpc-isa205-32l.dat ++++ gdb-6.8.50.20080916-cvs/gdb/regformats/rs6000/powerpc-isa205-32l.dat +@@ -0,0 +1,77 @@ ++# DO NOT EDIT: generated from rs6000/powerpc-isa205-32l.xml ++name:powerpc_isa205_32l ++xmltarget:powerpc-isa205-32l.xml ++expedite:r1,pc ++32:r0 ++32:r1 ++32:r2 ++32:r3 ++32:r4 ++32:r5 ++32:r6 ++32:r7 ++32:r8 ++32:r9 ++32:r10 ++32:r11 ++32:r12 ++32:r13 ++32:r14 ++32:r15 ++32:r16 ++32:r17 ++32:r18 ++32:r19 ++32:r20 ++32:r21 ++32:r22 ++32:r23 ++32:r24 ++32:r25 ++32:r26 ++32:r27 ++32:r28 ++32:r29 ++32:r30 ++32:r31 ++64:f0 ++64:f1 ++64:f2 ++64:f3 ++64:f4 ++64:f5 ++64:f6 ++64:f7 ++64:f8 ++64:f9 ++64:f10 ++64:f11 ++64:f12 ++64:f13 ++64:f14 ++64:f15 ++64:f16 ++64:f17 ++64:f18 ++64:f19 ++64:f20 ++64:f21 ++64:f22 ++64:f23 ++64:f24 ++64:f25 ++64:f26 ++64:f27 ++64:f28 ++64:f29 ++64:f30 ++64:f31 ++32:pc ++32:msr ++32:cr ++32:lr ++32:ctr ++32:xer ++64:fpscr ++32:orig_r3 ++32:trap +--- gdb-6.8.50.20080916-cvs/gdb/regformats/rs6000/powerpc-isa205-64l.dat ++++ gdb-6.8.50.20080916-cvs/gdb/regformats/rs6000/powerpc-isa205-64l.dat +@@ -0,0 +1,77 @@ ++# DO NOT EDIT: generated from rs6000/powerpc-isa205-64l.xml ++name:powerpc_isa205_64l ++xmltarget:powerpc-isa205-64l.xml ++expedite:r1,pc ++64:r0 ++64:r1 ++64:r2 ++64:r3 ++64:r4 ++64:r5 ++64:r6 ++64:r7 ++64:r8 ++64:r9 ++64:r10 ++64:r11 ++64:r12 ++64:r13 ++64:r14 ++64:r15 ++64:r16 ++64:r17 ++64:r18 ++64:r19 ++64:r20 ++64:r21 ++64:r22 ++64:r23 ++64:r24 ++64:r25 ++64:r26 ++64:r27 ++64:r28 ++64:r29 ++64:r30 ++64:r31 ++64:f0 ++64:f1 ++64:f2 ++64:f3 ++64:f4 ++64:f5 ++64:f6 ++64:f7 ++64:f8 ++64:f9 ++64:f10 ++64:f11 ++64:f12 ++64:f13 ++64:f14 ++64:f15 ++64:f16 ++64:f17 ++64:f18 ++64:f19 ++64:f20 ++64:f21 ++64:f22 ++64:f23 ++64:f24 ++64:f25 ++64:f26 ++64:f27 ++64:f28 ++64:f29 ++64:f30 ++64:f31 ++64:pc ++64:msr ++32:cr ++64:lr ++64:ctr ++32:xer ++64:fpscr ++64:orig_r3 ++64:trap +--- gdb-6.8.50.20080916-cvs/gdb/regformats/rs6000/powerpc-isa205-altivec32l.dat ++++ gdb-6.8.50.20080916-cvs/gdb/regformats/rs6000/powerpc-isa205-altivec32l.dat +@@ -0,0 +1,111 @@ ++# DO NOT EDIT: generated from rs6000/powerpc-isa205-altivec32l.xml ++name:powerpc_isa205_altivec32l ++xmltarget:powerpc-isa205-altivec32l.xml ++expedite:r1,pc ++32:r0 ++32:r1 ++32:r2 ++32:r3 ++32:r4 ++32:r5 ++32:r6 ++32:r7 ++32:r8 ++32:r9 ++32:r10 ++32:r11 ++32:r12 ++32:r13 ++32:r14 ++32:r15 ++32:r16 ++32:r17 ++32:r18 ++32:r19 ++32:r20 ++32:r21 ++32:r22 ++32:r23 ++32:r24 ++32:r25 ++32:r26 ++32:r27 ++32:r28 ++32:r29 ++32:r30 ++32:r31 ++64:f0 ++64:f1 ++64:f2 ++64:f3 ++64:f4 ++64:f5 ++64:f6 ++64:f7 ++64:f8 ++64:f9 ++64:f10 ++64:f11 ++64:f12 ++64:f13 ++64:f14 ++64:f15 ++64:f16 ++64:f17 ++64:f18 ++64:f19 ++64:f20 ++64:f21 ++64:f22 ++64:f23 ++64:f24 ++64:f25 ++64:f26 ++64:f27 ++64:f28 ++64:f29 ++64:f30 ++64:f31 ++32:pc ++32:msr ++32:cr ++32:lr ++32:ctr ++32:xer ++64:fpscr ++32:orig_r3 ++32:trap ++128:vr0 ++128:vr1 ++128:vr2 ++128:vr3 ++128:vr4 ++128:vr5 ++128:vr6 ++128:vr7 ++128:vr8 ++128:vr9 ++128:vr10 ++128:vr11 ++128:vr12 ++128:vr13 ++128:vr14 ++128:vr15 ++128:vr16 ++128:vr17 ++128:vr18 ++128:vr19 ++128:vr20 ++128:vr21 ++128:vr22 ++128:vr23 ++128:vr24 ++128:vr25 ++128:vr26 ++128:vr27 ++128:vr28 ++128:vr29 ++128:vr30 ++128:vr31 ++32:vscr ++32:vrsave +--- gdb-6.8.50.20080916-cvs/gdb/regformats/rs6000/powerpc-isa205-altivec64l.dat ++++ gdb-6.8.50.20080916-cvs/gdb/regformats/rs6000/powerpc-isa205-altivec64l.dat +@@ -0,0 +1,111 @@ ++# DO NOT EDIT: generated from rs6000/powerpc-isa205-altivec64l.xml ++name:powerpc_isa205_altivec64l ++xmltarget:powerpc-isa205-altivec64l.xml ++expedite:r1,pc ++64:r0 ++64:r1 ++64:r2 ++64:r3 ++64:r4 ++64:r5 ++64:r6 ++64:r7 ++64:r8 ++64:r9 ++64:r10 ++64:r11 ++64:r12 ++64:r13 ++64:r14 ++64:r15 ++64:r16 ++64:r17 ++64:r18 ++64:r19 ++64:r20 ++64:r21 ++64:r22 ++64:r23 ++64:r24 ++64:r25 ++64:r26 ++64:r27 ++64:r28 ++64:r29 ++64:r30 ++64:r31 ++64:f0 ++64:f1 ++64:f2 ++64:f3 ++64:f4 ++64:f5 ++64:f6 ++64:f7 ++64:f8 ++64:f9 ++64:f10 ++64:f11 ++64:f12 ++64:f13 ++64:f14 ++64:f15 ++64:f16 ++64:f17 ++64:f18 ++64:f19 ++64:f20 ++64:f21 ++64:f22 ++64:f23 ++64:f24 ++64:f25 ++64:f26 ++64:f27 ++64:f28 ++64:f29 ++64:f30 ++64:f31 ++64:pc ++64:msr ++32:cr ++64:lr ++64:ctr ++32:xer ++64:fpscr ++64:orig_r3 ++64:trap ++128:vr0 ++128:vr1 ++128:vr2 ++128:vr3 ++128:vr4 ++128:vr5 ++128:vr6 ++128:vr7 ++128:vr8 ++128:vr9 ++128:vr10 ++128:vr11 ++128:vr12 ++128:vr13 ++128:vr14 ++128:vr15 ++128:vr16 ++128:vr17 ++128:vr18 ++128:vr19 ++128:vr20 ++128:vr21 ++128:vr22 ++128:vr23 ++128:vr24 ++128:vr25 ++128:vr26 ++128:vr27 ++128:vr28 ++128:vr29 ++128:vr30 ++128:vr31 ++32:vscr ++32:vrsave +--- gdb-6.8.50.20080916-cvs/gdb/regformats/rs6000/powerpc-isa205-vsx32l.dat ++++ gdb-6.8.50.20080916-cvs/gdb/regformats/rs6000/powerpc-isa205-vsx32l.dat +@@ -0,0 +1,143 @@ ++# DO NOT EDIT: generated from rs6000/powerpc-isa205-vsx32l.xml ++name:powerpc_isa205_vsx32l ++xmltarget:powerpc-isa205-vsx32l.xml ++expedite:r1,pc ++32:r0 ++32:r1 ++32:r2 ++32:r3 ++32:r4 ++32:r5 ++32:r6 ++32:r7 ++32:r8 ++32:r9 ++32:r10 ++32:r11 ++32:r12 ++32:r13 ++32:r14 ++32:r15 ++32:r16 ++32:r17 ++32:r18 ++32:r19 ++32:r20 ++32:r21 ++32:r22 ++32:r23 ++32:r24 ++32:r25 ++32:r26 ++32:r27 ++32:r28 ++32:r29 ++32:r30 ++32:r31 ++64:f0 ++64:f1 ++64:f2 ++64:f3 ++64:f4 ++64:f5 ++64:f6 ++64:f7 ++64:f8 ++64:f9 ++64:f10 ++64:f11 ++64:f12 ++64:f13 ++64:f14 ++64:f15 ++64:f16 ++64:f17 ++64:f18 ++64:f19 ++64:f20 ++64:f21 ++64:f22 ++64:f23 ++64:f24 ++64:f25 ++64:f26 ++64:f27 ++64:f28 ++64:f29 ++64:f30 ++64:f31 ++32:pc ++32:msr ++32:cr ++32:lr ++32:ctr ++32:xer ++64:fpscr ++32:orig_r3 ++32:trap ++128:vr0 ++128:vr1 ++128:vr2 ++128:vr3 ++128:vr4 ++128:vr5 ++128:vr6 ++128:vr7 ++128:vr8 ++128:vr9 ++128:vr10 ++128:vr11 ++128:vr12 ++128:vr13 ++128:vr14 ++128:vr15 ++128:vr16 ++128:vr17 ++128:vr18 ++128:vr19 ++128:vr20 ++128:vr21 ++128:vr22 ++128:vr23 ++128:vr24 ++128:vr25 ++128:vr26 ++128:vr27 ++128:vr28 ++128:vr29 ++128:vr30 ++128:vr31 ++32:vscr ++32:vrsave ++64:vs0h ++64:vs1h ++64:vs2h ++64:vs3h ++64:vs4h ++64:vs5h ++64:vs6h ++64:vs7h ++64:vs8h ++64:vs9h ++64:vs10h ++64:vs11h ++64:vs12h ++64:vs13h ++64:vs14h ++64:vs15h ++64:vs16h ++64:vs17h ++64:vs18h ++64:vs19h ++64:vs20h ++64:vs21h ++64:vs22h ++64:vs23h ++64:vs24h ++64:vs25h ++64:vs26h ++64:vs27h ++64:vs28h ++64:vs29h ++64:vs30h ++64:vs31h +--- gdb-6.8.50.20080916-cvs/gdb/regformats/rs6000/powerpc-isa205-vsx64l.dat ++++ gdb-6.8.50.20080916-cvs/gdb/regformats/rs6000/powerpc-isa205-vsx64l.dat +@@ -0,0 +1,143 @@ ++# DO NOT EDIT: generated from rs6000/powerpc-isa205-vsx64l.xml ++name:powerpc_isa205_vsx64l ++xmltarget:powerpc-isa205-vsx64l.xml ++expedite:r1,pc ++64:r0 ++64:r1 ++64:r2 ++64:r3 ++64:r4 ++64:r5 ++64:r6 ++64:r7 ++64:r8 ++64:r9 ++64:r10 ++64:r11 ++64:r12 ++64:r13 ++64:r14 ++64:r15 ++64:r16 ++64:r17 ++64:r18 ++64:r19 ++64:r20 ++64:r21 ++64:r22 ++64:r23 ++64:r24 ++64:r25 ++64:r26 ++64:r27 ++64:r28 ++64:r29 ++64:r30 ++64:r31 ++64:f0 ++64:f1 ++64:f2 ++64:f3 ++64:f4 ++64:f5 ++64:f6 ++64:f7 ++64:f8 ++64:f9 ++64:f10 ++64:f11 ++64:f12 ++64:f13 ++64:f14 ++64:f15 ++64:f16 ++64:f17 ++64:f18 ++64:f19 ++64:f20 ++64:f21 ++64:f22 ++64:f23 ++64:f24 ++64:f25 ++64:f26 ++64:f27 ++64:f28 ++64:f29 ++64:f30 ++64:f31 ++64:pc ++64:msr ++32:cr ++64:lr ++64:ctr ++32:xer ++64:fpscr ++64:orig_r3 ++64:trap ++128:vr0 ++128:vr1 ++128:vr2 ++128:vr3 ++128:vr4 ++128:vr5 ++128:vr6 ++128:vr7 ++128:vr8 ++128:vr9 ++128:vr10 ++128:vr11 ++128:vr12 ++128:vr13 ++128:vr14 ++128:vr15 ++128:vr16 ++128:vr17 ++128:vr18 ++128:vr19 ++128:vr20 ++128:vr21 ++128:vr22 ++128:vr23 ++128:vr24 ++128:vr25 ++128:vr26 ++128:vr27 ++128:vr28 ++128:vr29 ++128:vr30 ++128:vr31 ++32:vscr ++32:vrsave ++64:vs0h ++64:vs1h ++64:vs2h ++64:vs3h ++64:vs4h ++64:vs5h ++64:vs6h ++64:vs7h ++64:vs8h ++64:vs9h ++64:vs10h ++64:vs11h ++64:vs12h ++64:vs13h ++64:vs14h ++64:vs15h ++64:vs16h ++64:vs17h ++64:vs18h ++64:vs19h ++64:vs20h ++64:vs21h ++64:vs22h ++64:vs23h ++64:vs24h ++64:vs25h ++64:vs26h ++64:vs27h ++64:vs28h ++64:vs29h ++64:vs30h ++64:vs31h diff --git a/power7.diff b/power7.diff new file mode 100644 index 0000000..be0f3a2 --- /dev/null +++ b/power7.diff @@ -0,0 +1,1430 @@ +2008-09-14 Thiago Jung Bauermann + +gdb/ + * ppc-linux-nat.c (ppc_register_u_addr): Add special case to return + offset for full 64-bit slot of FPSCR when in 32-bits. + (ppc_linux_read_description): Return target description with 64-bit + FPSCR when inferior is running on an ISA 2.05 or later processor. + * ppc-linux-tdep.c (_initialize_ppc_linux_tdep): Call + initialize_tdec_powerpc_isa205_32l, + initialize_tdec_powerpc_isa205_altivec32l, + initialize_tdec_powerpc_isa205_vsx32l, + initialize_tdec_powerpc_isa205_64l, + initialize_tdec_powerpc_isa205_altivec64l and + initialize_tdec_powerpc_isa205_vsx64l. + * ppc-linux-tdep.h: Add external declaration for + tdesc_powerpc_isa205_32l, tdesc_powerpc_isa205_altivec32l, + tdesc_powerpc_isa205_vsx32l, tdesc_powerpc_isa205_64l, + tdesc_powerpc_isa205_altivec64l and tdesc_powerpc_isa205_vsx64l. + * features/rs600/powerpc-fpu-isa205.xml: New file. + * features/rs600/powerpc-isa205-32l.xml: New file. + * features/rs600/powerpc-isa205-64l.xml: New file. + * features/rs600/powerpc-isa205-altivec32l.xml: New file. + * features/rs600/powerpc-isa205-altivec64l.xml: New file. + * features/rs600/powerpc-isa205-vsx32l.xml: New file. + * features/rs600/powerpc-isa205-vsx64l.xml: New file. + * features/rs600/powerpc-isa205-32l.c: Generate. + * features/rs600/powerpc-isa205-64l.c: Generate. + * features/rs600/powerpc-isa205-altivec32l.c: Generate. + * features/rs600/powerpc-isa205-altivec64l.c: Generate. + * features/rs600/powerpc-isa205-vsx32l.c: Generate. + * features/rs600/powerpc-isa205-vsx64l.c: Generate. + +gdb/testsuite/ + + * gdb.arch/ppc-dfp.exp: New file. + * gdb.arch/ppc-dfp.c: New file. + +Index: gdb-6.8.50.20080904-cvs/gdb/features/rs6000/power-fpu-isa205.xml +================================================================================ +--- gdb-6.8.50.20080916-cvs/gdb/features/rs6000/power-fpu-isa205.xml ++++ gdb-6.8.50.20080916-cvs/gdb/features/rs6000/power-fpu-isa205.xml +@@ -0,0 +1,44 @@ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ +--- gdb-6.8.50.20080916-cvs/gdb/features/rs6000/powerpc-isa205-32l.c ++++ gdb-6.8.50.20080916-cvs/gdb/features/rs6000/powerpc-isa205-32l.c +@@ -0,0 +1,97 @@ ++/* THIS FILE IS GENERATED. Original: powerpc-isa205-32l.xml */ ++ ++#include "defs.h" ++#include "gdbtypes.h" ++#include "target-descriptions.h" ++ ++struct target_desc *tdesc_powerpc_isa205_32l; ++static void ++initialize_tdesc_powerpc_isa205_32l (void) ++{ ++ struct target_desc *result = allocate_target_description (); ++ struct tdesc_feature *feature; ++ struct type *field_type, *type; ++ ++ set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common")); ++ ++ feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); ++ tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); ++ tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); ++ tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); ++ ++ feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); ++ tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "fpscr", 70, 1, "float", 64, "int"); ++ ++ feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux"); ++ tdesc_create_reg (feature, "orig_r3", 71, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "trap", 72, 1, NULL, 32, "int"); ++ ++ tdesc_powerpc_isa205_32l = result; ++} +--- gdb-6.8.50.20080916-cvs/gdb/features/rs6000/powerpc-isa205-32l.xml ++++ gdb-6.8.50.20080916-cvs/gdb/features/rs6000/powerpc-isa205-32l.xml +@@ -0,0 +1,17 @@ ++ ++ ++ ++ ++ ++ ++ ++ powerpc:common ++ ++ ++ ++ +--- gdb-6.8.50.20080916-cvs/gdb/features/rs6000/powerpc-isa205-64l.c ++++ gdb-6.8.50.20080916-cvs/gdb/features/rs6000/powerpc-isa205-64l.c +@@ -0,0 +1,97 @@ ++/* THIS FILE IS GENERATED. Original: powerpc-isa205-64l.xml */ ++ ++#include "defs.h" ++#include "gdbtypes.h" ++#include "target-descriptions.h" ++ ++struct target_desc *tdesc_powerpc_isa205_64l; ++static void ++initialize_tdesc_powerpc_isa205_64l (void) ++{ ++ struct target_desc *result = allocate_target_description (); ++ struct tdesc_feature *feature; ++ struct type *field_type, *type; ++ ++ set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common64")); ++ ++ feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); ++ tdesc_create_reg (feature, "r0", 0, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r1", 1, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r2", 2, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r3", 3, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r4", 4, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r5", 5, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r6", 6, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r7", 7, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r16", 16, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r17", 17, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r18", 18, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r19", 19, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r20", 20, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r21", 21, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r22", 22, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r23", 23, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r24", 24, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r25", 25, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r26", 26, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r27", 27, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r28", 28, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r29", 29, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r30", 30, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r31", 31, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "pc", 64, 1, NULL, 64, "code_ptr"); ++ tdesc_create_reg (feature, "msr", 65, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "lr", 67, 1, NULL, 64, "code_ptr"); ++ tdesc_create_reg (feature, "ctr", 68, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); ++ ++ feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); ++ tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "fpscr", 70, 1, "float", 64, "int"); ++ ++ feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux"); ++ tdesc_create_reg (feature, "orig_r3", 71, 1, NULL, 64, "int"); ++ tdesc_create_reg (feature, "trap", 72, 1, NULL, 64, "int"); ++ ++ tdesc_powerpc_isa205_64l = result; ++} +--- gdb-6.8.50.20080916-cvs/gdb/features/rs6000/powerpc-isa205-64l.xml ++++ gdb-6.8.50.20080916-cvs/gdb/features/rs6000/powerpc-isa205-64l.xml +@@ -0,0 +1,17 @@ ++ ++ ++ ++ ++ ++ ++ ++ powerpc:common64 ++ ++ ++ ++ +--- gdb-6.8.50.20080916-cvs/gdb/features/rs6000/powerpc-isa205-altivec32l.c ++++ gdb-6.8.50.20080916-cvs/gdb/features/rs6000/powerpc-isa205-altivec32l.c +@@ -0,0 +1,168 @@ ++/* THIS FILE IS GENERATED. Original: powerpc-isa205-altivec32l.xml */ ++ ++#include "defs.h" ++#include "gdbtypes.h" ++#include "target-descriptions.h" ++ ++struct target_desc *tdesc_powerpc_isa205_altivec32l; ++static void ++initialize_tdesc_powerpc_isa205_altivec32l (void) ++{ ++ struct target_desc *result = allocate_target_description (); ++ struct tdesc_feature *feature; ++ struct type *field_type, *type; ++ ++ set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common")); ++ ++ feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); ++ tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); ++ tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); ++ tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); ++ ++ feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); ++ tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "fpscr", 70, 1, "float", 64, "int"); ++ ++ feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux"); ++ tdesc_create_reg (feature, "orig_r3", 71, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "trap", 72, 1, NULL, 32, "int"); ++ ++ feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec"); ++ field_type = tdesc_named_type (feature, "ieee_single"); ++ type = init_vector_type (field_type, 4); ++ TYPE_NAME (type) = xstrdup ("v4f"); ++ tdesc_record_type (feature, type); ++ ++ field_type = tdesc_named_type (feature, "int32"); ++ type = init_vector_type (field_type, 4); ++ TYPE_NAME (type) = xstrdup ("v4i32"); ++ tdesc_record_type (feature, type); ++ ++ field_type = tdesc_named_type (feature, "int16"); ++ type = init_vector_type (field_type, 8); ++ TYPE_NAME (type) = xstrdup ("v8i16"); ++ tdesc_record_type (feature, type); ++ ++ field_type = tdesc_named_type (feature, "int8"); ++ type = init_vector_type (field_type, 16); ++ TYPE_NAME (type) = xstrdup ("v16i8"); ++ tdesc_record_type (feature, type); ++ ++ type = init_composite_type (NULL, TYPE_CODE_UNION); ++ TYPE_NAME (type) = xstrdup ("vec128"); ++ field_type = tdesc_named_type (feature, "uint128"); ++ append_composite_type_field (type, xstrdup ("uint128"), field_type); ++ field_type = tdesc_named_type (feature, "v4f"); ++ append_composite_type_field (type, xstrdup ("v4_float"), field_type); ++ field_type = tdesc_named_type (feature, "v4i32"); ++ append_composite_type_field (type, xstrdup ("v4_int32"), field_type); ++ field_type = tdesc_named_type (feature, "v8i16"); ++ append_composite_type_field (type, xstrdup ("v8_int16"), field_type); ++ field_type = tdesc_named_type (feature, "v16i8"); ++ append_composite_type_field (type, xstrdup ("v16_int8"), field_type); ++ TYPE_VECTOR (type) = 1; ++ tdesc_record_type (feature, type); ++ ++ tdesc_create_reg (feature, "vr0", 73, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr1", 74, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr2", 75, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr3", 76, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr4", 77, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr5", 78, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr6", 79, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr7", 80, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr8", 81, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr9", 82, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr10", 83, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr11", 84, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr12", 85, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr13", 86, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr14", 87, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr15", 88, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr16", 89, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr17", 90, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr18", 91, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr19", 92, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr20", 93, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr21", 94, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr22", 95, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr23", 96, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr24", 97, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr25", 98, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr26", 99, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr27", 100, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr28", 101, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr29", 102, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr30", 103, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr31", 104, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vscr", 105, 1, "vector", 32, "int"); ++ tdesc_create_reg (feature, "vrsave", 106, 1, "vector", 32, "int"); ++ ++ tdesc_powerpc_isa205_altivec32l = result; ++} +--- gdb-6.8.50.20080916-cvs/gdb/features/rs6000/powerpc-isa205-altivec32l.xml ++++ gdb-6.8.50.20080916-cvs/gdb/features/rs6000/powerpc-isa205-altivec32l.xml +@@ -0,0 +1,19 @@ ++ ++ ++ ++ ++ ++ ++ ++ powerpc:common ++ ++ ++ ++ ++ +--- gdb-6.8.50.20080916-cvs/gdb/features/rs6000/powerpc-isa205-altivec64l.c ++++ gdb-6.8.50.20080916-cvs/gdb/features/rs6000/powerpc-isa205-altivec64l.c +@@ -0,0 +1,168 @@ ++/* THIS FILE IS GENERATED. Original: powerpc-isa205-altivec64l.xml */ ++ ++#include "defs.h" ++#include "gdbtypes.h" ++#include "target-descriptions.h" ++ ++struct target_desc *tdesc_powerpc_isa205_altivec64l; ++static void ++initialize_tdesc_powerpc_isa205_altivec64l (void) ++{ ++ struct target_desc *result = allocate_target_description (); ++ struct tdesc_feature *feature; ++ struct type *field_type, *type; ++ ++ set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common64")); ++ ++ feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); ++ tdesc_create_reg (feature, "r0", 0, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r1", 1, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r2", 2, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r3", 3, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r4", 4, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r5", 5, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r6", 6, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r7", 7, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r16", 16, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r17", 17, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r18", 18, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r19", 19, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r20", 20, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r21", 21, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r22", 22, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r23", 23, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r24", 24, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r25", 25, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r26", 26, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r27", 27, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r28", 28, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r29", 29, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r30", 30, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r31", 31, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "pc", 64, 1, NULL, 64, "code_ptr"); ++ tdesc_create_reg (feature, "msr", 65, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "lr", 67, 1, NULL, 64, "code_ptr"); ++ tdesc_create_reg (feature, "ctr", 68, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); ++ ++ feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); ++ tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "fpscr", 70, 1, "float", 64, "int"); ++ ++ feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux"); ++ tdesc_create_reg (feature, "orig_r3", 71, 1, NULL, 64, "int"); ++ tdesc_create_reg (feature, "trap", 72, 1, NULL, 64, "int"); ++ ++ feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec"); ++ field_type = tdesc_named_type (feature, "ieee_single"); ++ type = init_vector_type (field_type, 4); ++ TYPE_NAME (type) = xstrdup ("v4f"); ++ tdesc_record_type (feature, type); ++ ++ field_type = tdesc_named_type (feature, "int32"); ++ type = init_vector_type (field_type, 4); ++ TYPE_NAME (type) = xstrdup ("v4i32"); ++ tdesc_record_type (feature, type); ++ ++ field_type = tdesc_named_type (feature, "int16"); ++ type = init_vector_type (field_type, 8); ++ TYPE_NAME (type) = xstrdup ("v8i16"); ++ tdesc_record_type (feature, type); ++ ++ field_type = tdesc_named_type (feature, "int8"); ++ type = init_vector_type (field_type, 16); ++ TYPE_NAME (type) = xstrdup ("v16i8"); ++ tdesc_record_type (feature, type); ++ ++ type = init_composite_type (NULL, TYPE_CODE_UNION); ++ TYPE_NAME (type) = xstrdup ("vec128"); ++ field_type = tdesc_named_type (feature, "uint128"); ++ append_composite_type_field (type, xstrdup ("uint128"), field_type); ++ field_type = tdesc_named_type (feature, "v4f"); ++ append_composite_type_field (type, xstrdup ("v4_float"), field_type); ++ field_type = tdesc_named_type (feature, "v4i32"); ++ append_composite_type_field (type, xstrdup ("v4_int32"), field_type); ++ field_type = tdesc_named_type (feature, "v8i16"); ++ append_composite_type_field (type, xstrdup ("v8_int16"), field_type); ++ field_type = tdesc_named_type (feature, "v16i8"); ++ append_composite_type_field (type, xstrdup ("v16_int8"), field_type); ++ TYPE_VECTOR (type) = 1; ++ tdesc_record_type (feature, type); ++ ++ tdesc_create_reg (feature, "vr0", 73, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr1", 74, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr2", 75, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr3", 76, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr4", 77, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr5", 78, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr6", 79, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr7", 80, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr8", 81, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr9", 82, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr10", 83, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr11", 84, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr12", 85, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr13", 86, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr14", 87, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr15", 88, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr16", 89, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr17", 90, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr18", 91, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr19", 92, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr20", 93, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr21", 94, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr22", 95, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr23", 96, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr24", 97, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr25", 98, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr26", 99, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr27", 100, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr28", 101, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr29", 102, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr30", 103, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr31", 104, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vscr", 105, 1, "vector", 32, "int"); ++ tdesc_create_reg (feature, "vrsave", 106, 1, "vector", 32, "int"); ++ ++ tdesc_powerpc_isa205_altivec64l = result; ++} +--- gdb-6.8.50.20080916-cvs/gdb/features/rs6000/powerpc-isa205-altivec64l.xml ++++ gdb-6.8.50.20080916-cvs/gdb/features/rs6000/powerpc-isa205-altivec64l.xml +@@ -0,0 +1,19 @@ ++ ++ ++ ++ ++ ++ ++ ++ powerpc:common64 ++ ++ ++ ++ ++ +--- gdb-6.8.50.20080916-cvs/gdb/features/rs6000/powerpc-isa205-vsx32l.c ++++ gdb-6.8.50.20080916-cvs/gdb/features/rs6000/powerpc-isa205-vsx32l.c +@@ -0,0 +1,202 @@ ++/* THIS FILE IS GENERATED. Original: powerpc-isa205-vsx32l.xml */ ++ ++#include "defs.h" ++#include "gdbtypes.h" ++#include "target-descriptions.h" ++ ++struct target_desc *tdesc_powerpc_isa205_vsx32l; ++static void ++initialize_tdesc_powerpc_isa205_vsx32l (void) ++{ ++ struct target_desc *result = allocate_target_description (); ++ struct tdesc_feature *feature; ++ struct type *field_type, *type; ++ ++ set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common")); ++ ++ feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); ++ tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr"); ++ tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr"); ++ tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); ++ ++ feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); ++ tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "fpscr", 70, 1, "float", 64, "int"); ++ ++ feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux"); ++ tdesc_create_reg (feature, "orig_r3", 71, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "trap", 72, 1, NULL, 32, "int"); ++ ++ feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec"); ++ field_type = tdesc_named_type (feature, "ieee_single"); ++ type = init_vector_type (field_type, 4); ++ TYPE_NAME (type) = xstrdup ("v4f"); ++ tdesc_record_type (feature, type); ++ ++ field_type = tdesc_named_type (feature, "int32"); ++ type = init_vector_type (field_type, 4); ++ TYPE_NAME (type) = xstrdup ("v4i32"); ++ tdesc_record_type (feature, type); ++ ++ field_type = tdesc_named_type (feature, "int16"); ++ type = init_vector_type (field_type, 8); ++ TYPE_NAME (type) = xstrdup ("v8i16"); ++ tdesc_record_type (feature, type); ++ ++ field_type = tdesc_named_type (feature, "int8"); ++ type = init_vector_type (field_type, 16); ++ TYPE_NAME (type) = xstrdup ("v16i8"); ++ tdesc_record_type (feature, type); ++ ++ type = init_composite_type (NULL, TYPE_CODE_UNION); ++ TYPE_NAME (type) = xstrdup ("vec128"); ++ field_type = tdesc_named_type (feature, "uint128"); ++ append_composite_type_field (type, xstrdup ("uint128"), field_type); ++ field_type = tdesc_named_type (feature, "v4f"); ++ append_composite_type_field (type, xstrdup ("v4_float"), field_type); ++ field_type = tdesc_named_type (feature, "v4i32"); ++ append_composite_type_field (type, xstrdup ("v4_int32"), field_type); ++ field_type = tdesc_named_type (feature, "v8i16"); ++ append_composite_type_field (type, xstrdup ("v8_int16"), field_type); ++ field_type = tdesc_named_type (feature, "v16i8"); ++ append_composite_type_field (type, xstrdup ("v16_int8"), field_type); ++ TYPE_VECTOR (type) = 1; ++ tdesc_record_type (feature, type); ++ ++ tdesc_create_reg (feature, "vr0", 73, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr1", 74, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr2", 75, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr3", 76, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr4", 77, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr5", 78, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr6", 79, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr7", 80, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr8", 81, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr9", 82, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr10", 83, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr11", 84, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr12", 85, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr13", 86, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr14", 87, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr15", 88, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr16", 89, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr17", 90, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr18", 91, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr19", 92, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr20", 93, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr21", 94, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr22", 95, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr23", 96, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr24", 97, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr25", 98, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr26", 99, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr27", 100, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr28", 101, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr29", 102, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr30", 103, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr31", 104, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vscr", 105, 1, "vector", 32, "int"); ++ tdesc_create_reg (feature, "vrsave", 106, 1, "vector", 32, "int"); ++ ++ feature = tdesc_create_feature (result, "org.gnu.gdb.power.vsx"); ++ tdesc_create_reg (feature, "vs0h", 107, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs1h", 108, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs2h", 109, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs3h", 110, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs4h", 111, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs5h", 112, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs6h", 113, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs7h", 114, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs8h", 115, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs9h", 116, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs10h", 117, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs11h", 118, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs12h", 119, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs13h", 120, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs14h", 121, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs15h", 122, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs16h", 123, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs17h", 124, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs18h", 125, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs19h", 126, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs20h", 127, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs21h", 128, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs22h", 129, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs23h", 130, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs24h", 131, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs25h", 132, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs26h", 133, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs27h", 134, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs28h", 135, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs29h", 136, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs30h", 137, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs31h", 138, 1, NULL, 64, "uint64"); ++ ++ tdesc_powerpc_isa205_vsx32l = result; ++} +--- gdb-6.8.50.20080916-cvs/gdb/features/rs6000/powerpc-isa205-vsx32l.xml ++++ gdb-6.8.50.20080916-cvs/gdb/features/rs6000/powerpc-isa205-vsx32l.xml +@@ -0,0 +1,20 @@ ++ ++ ++ ++ ++ ++ ++ ++ powerpc:common ++ ++ ++ ++ ++ ++ +--- gdb-6.8.50.20080916-cvs/gdb/features/rs6000/powerpc-isa205-vsx64l.c ++++ gdb-6.8.50.20080916-cvs/gdb/features/rs6000/powerpc-isa205-vsx64l.c +@@ -0,0 +1,202 @@ ++/* THIS FILE IS GENERATED. Original: powerpc-isa205-vsx64l.xml */ ++ ++#include "defs.h" ++#include "gdbtypes.h" ++#include "target-descriptions.h" ++ ++struct target_desc *tdesc_powerpc_isa205_vsx64l; ++static void ++initialize_tdesc_powerpc_isa205_vsx64l (void) ++{ ++ struct target_desc *result = allocate_target_description (); ++ struct tdesc_feature *feature; ++ struct type *field_type, *type; ++ ++ set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common64")); ++ ++ feature = tdesc_create_feature (result, "org.gnu.gdb.power.core"); ++ tdesc_create_reg (feature, "r0", 0, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r1", 1, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r2", 2, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r3", 3, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r4", 4, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r5", 5, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r6", 6, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r7", 7, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r16", 16, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r17", 17, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r18", 18, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r19", 19, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r20", 20, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r21", 21, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r22", 22, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r23", 23, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r24", 24, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r25", 25, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r26", 26, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r27", 27, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r28", 28, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r29", 29, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r30", 30, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r31", 31, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "pc", 64, 1, NULL, 64, "code_ptr"); ++ tdesc_create_reg (feature, "msr", 65, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32"); ++ tdesc_create_reg (feature, "lr", 67, 1, NULL, 64, "code_ptr"); ++ tdesc_create_reg (feature, "ctr", 68, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32"); ++ ++ feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu"); ++ tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double"); ++ tdesc_create_reg (feature, "fpscr", 70, 1, "float", 64, "int"); ++ ++ feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux"); ++ tdesc_create_reg (feature, "orig_r3", 71, 1, NULL, 64, "int"); ++ tdesc_create_reg (feature, "trap", 72, 1, NULL, 64, "int"); ++ ++ feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec"); ++ field_type = tdesc_named_type (feature, "ieee_single"); ++ type = init_vector_type (field_type, 4); ++ TYPE_NAME (type) = xstrdup ("v4f"); ++ tdesc_record_type (feature, type); ++ ++ field_type = tdesc_named_type (feature, "int32"); ++ type = init_vector_type (field_type, 4); ++ TYPE_NAME (type) = xstrdup ("v4i32"); ++ tdesc_record_type (feature, type); ++ ++ field_type = tdesc_named_type (feature, "int16"); ++ type = init_vector_type (field_type, 8); ++ TYPE_NAME (type) = xstrdup ("v8i16"); ++ tdesc_record_type (feature, type); ++ ++ field_type = tdesc_named_type (feature, "int8"); ++ type = init_vector_type (field_type, 16); ++ TYPE_NAME (type) = xstrdup ("v16i8"); ++ tdesc_record_type (feature, type); ++ ++ type = init_composite_type (NULL, TYPE_CODE_UNION); ++ TYPE_NAME (type) = xstrdup ("vec128"); ++ field_type = tdesc_named_type (feature, "uint128"); ++ append_composite_type_field (type, xstrdup ("uint128"), field_type); ++ field_type = tdesc_named_type (feature, "v4f"); ++ append_composite_type_field (type, xstrdup ("v4_float"), field_type); ++ field_type = tdesc_named_type (feature, "v4i32"); ++ append_composite_type_field (type, xstrdup ("v4_int32"), field_type); ++ field_type = tdesc_named_type (feature, "v8i16"); ++ append_composite_type_field (type, xstrdup ("v8_int16"), field_type); ++ field_type = tdesc_named_type (feature, "v16i8"); ++ append_composite_type_field (type, xstrdup ("v16_int8"), field_type); ++ TYPE_VECTOR (type) = 1; ++ tdesc_record_type (feature, type); ++ ++ tdesc_create_reg (feature, "vr0", 73, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr1", 74, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr2", 75, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr3", 76, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr4", 77, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr5", 78, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr6", 79, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr7", 80, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr8", 81, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr9", 82, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr10", 83, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr11", 84, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr12", 85, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr13", 86, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr14", 87, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr15", 88, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr16", 89, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr17", 90, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr18", 91, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr19", 92, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr20", 93, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr21", 94, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr22", 95, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr23", 96, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr24", 97, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr25", 98, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr26", 99, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr27", 100, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr28", 101, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr29", 102, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr30", 103, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vr31", 104, 1, NULL, 128, "vec128"); ++ tdesc_create_reg (feature, "vscr", 105, 1, "vector", 32, "int"); ++ tdesc_create_reg (feature, "vrsave", 106, 1, "vector", 32, "int"); ++ ++ feature = tdesc_create_feature (result, "org.gnu.gdb.power.vsx"); ++ tdesc_create_reg (feature, "vs0h", 107, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs1h", 108, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs2h", 109, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs3h", 110, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs4h", 111, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs5h", 112, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs6h", 113, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs7h", 114, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs8h", 115, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs9h", 116, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs10h", 117, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs11h", 118, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs12h", 119, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs13h", 120, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs14h", 121, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs15h", 122, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs16h", 123, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs17h", 124, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs18h", 125, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs19h", 126, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs20h", 127, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs21h", 128, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs22h", 129, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs23h", 130, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs24h", 131, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs25h", 132, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs26h", 133, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs27h", 134, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs28h", 135, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs29h", 136, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs30h", 137, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "vs31h", 138, 1, NULL, 64, "uint64"); ++ ++ tdesc_powerpc_isa205_vsx64l = result; ++} +--- gdb-6.8.50.20080916-cvs/gdb/features/rs6000/powerpc-isa205-vsx64l.xml ++++ gdb-6.8.50.20080916-cvs/gdb/features/rs6000/powerpc-isa205-vsx64l.xml +@@ -0,0 +1,20 @@ ++ ++ ++ ++ ++ ++ ++ ++ powerpc:common64 ++ ++ ++ ++ ++ ++ +--- gdb-6.8.50.20080916-cvs/gdb/ppc-linux-nat.c ++++ gdb-6.8.50.20080916-cvs/gdb/ppc-linux-nat.c +@@ -64,6 +64,10 @@ + #define PPC_FEATURE_BOOKE 0x00008000 + #endif + ++#ifndef PPC_FEATURE_ARCH_2_05 ++#define PPC_FEATURE_ARCH_2_05 0x00001000 /* ISA 2.05 */ ++#endif ++ + /* Glibc's headers don't define PTRACE_GETVRREGS so we cannot use a + configure time check. Some older glibc's (for instance 2.2.1) + don't have a specific powerpc version of ptrace.h, and fall back on +@@ -283,6 +287,12 @@ ppc_register_u_addr (struct gdbarch *gdb + hence no adjustment is necessary. Hack around this. */ + if (wordsize == 8 && PT_FPSCR == (48 + 32 + 1)) + u_addr = (48 + 32) * wordsize; ++ /* If the FPSCR is 64-bit wide, we need to fetch the whole 64-bit ++ slot and not just its second word. The PT_FPSCR supplied in a ++ 32-bit GDB compilation doesn't reflect this. */ ++ else if (wordsize == 4 && register_size (gdbarch, regno) == 8 ++ && PT_FPSCR == (48 + 2*32 + 1)) ++ u_addr = (48 + 2*32) * wordsize; + else + u_addr = PT_FPSCR * wordsize; + } +@@ -1234,6 +1244,7 @@ ppc_linux_read_description (struct targe + { + int altivec = 0; + int vsx = 0; ++ int isa205 = 0; + + int tid = TIDGET (inferior_ptid); + if (tid == 0) +@@ -1278,6 +1289,9 @@ ppc_linux_read_description (struct targe + perror_with_name (_("Unable to fetch AltiVec registers")); + } + ++ if (ppc_linux_get_hwcap () & PPC_FEATURE_ARCH_2_05) ++ isa205 = 1; ++ + /* Check for 64-bit inferior process. This is the case when the host is + 64-bit, and in addition the top bit of the MSR register is set. */ + #ifdef __powerpc64__ +@@ -1290,11 +1304,11 @@ ppc_linux_read_description (struct targe + if (ppc_linux_get_hwcap () & PPC_FEATURE_CELL) + return tdesc_powerpc_cell64l; + else if (vsx) +- return tdesc_powerpc_vsx64l; ++ return isa205? tdesc_powerpc_isa205_vsx64l : tdesc_powerpc_vsx64l; + else if (altivec) +- return tdesc_powerpc_altivec64l; ++ return isa205? tdesc_powerpc_isa205_altivec64l : tdesc_powerpc_altivec64l; + +- return tdesc_powerpc_64l; ++ return isa205? tdesc_powerpc_isa205_64l : tdesc_powerpc_64l; + } + } + #endif +@@ -1302,11 +1316,11 @@ ppc_linux_read_description (struct targe + if (ppc_linux_get_hwcap () & PPC_FEATURE_CELL) + return tdesc_powerpc_cell32l; + else if (vsx) +- return tdesc_powerpc_vsx32l; ++ return isa205? tdesc_powerpc_isa205_vsx32l : tdesc_powerpc_vsx32l; + else if (altivec) +- return tdesc_powerpc_altivec32l; ++ return isa205? tdesc_powerpc_isa205_altivec32l : tdesc_powerpc_altivec32l; + +- return tdesc_powerpc_32l; ++ return isa205? tdesc_powerpc_isa205_32l : tdesc_powerpc_32l; + } + + void _initialize_ppc_linux_nat (void); +--- gdb-6.8.50.20080916-cvs/gdb/ppc-linux-tdep.c ++++ gdb-6.8.50.20080916-cvs/gdb/ppc-linux-tdep.c +@@ -49,10 +49,16 @@ + #include "features/rs6000/powerpc-altivec32l.c" + #include "features/rs6000/powerpc-cell32l.c" + #include "features/rs6000/powerpc-vsx32l.c" ++#include "features/rs6000/powerpc-isa205-32l.c" ++#include "features/rs6000/powerpc-isa205-altivec32l.c" ++#include "features/rs6000/powerpc-isa205-vsx32l.c" + #include "features/rs6000/powerpc-64l.c" + #include "features/rs6000/powerpc-altivec64l.c" + #include "features/rs6000/powerpc-cell64l.c" + #include "features/rs6000/powerpc-vsx64l.c" ++#include "features/rs6000/powerpc-isa205-64l.c" ++#include "features/rs6000/powerpc-isa205-altivec64l.c" ++#include "features/rs6000/powerpc-isa205-vsx64l.c" + #include "features/rs6000/powerpc-e500l.c" + + +@@ -1507,9 +1513,15 @@ _initialize_ppc_linux_tdep (void) + initialize_tdesc_powerpc_altivec32l (); + initialize_tdesc_powerpc_cell32l (); + initialize_tdesc_powerpc_vsx32l (); ++ initialize_tdesc_powerpc_isa205_32l (); ++ initialize_tdesc_powerpc_isa205_altivec32l (); ++ initialize_tdesc_powerpc_isa205_vsx32l (); + initialize_tdesc_powerpc_64l (); + initialize_tdesc_powerpc_altivec64l (); + initialize_tdesc_powerpc_cell64l (); + initialize_tdesc_powerpc_vsx64l (); ++ initialize_tdesc_powerpc_isa205_64l (); ++ initialize_tdesc_powerpc_isa205_altivec64l (); ++ initialize_tdesc_powerpc_isa205_vsx64l (); + initialize_tdesc_powerpc_e500l (); + } +--- gdb-6.8.50.20080916-cvs/gdb/ppc-linux-tdep.h ++++ gdb-6.8.50.20080916-cvs/gdb/ppc-linux-tdep.h +@@ -43,10 +43,16 @@ extern struct target_desc *tdesc_powerpc + extern struct target_desc *tdesc_powerpc_altivec32l; + extern struct target_desc *tdesc_powerpc_cell32l; + extern struct target_desc *tdesc_powerpc_vsx32l; ++extern struct target_desc *tdesc_powerpc_isa205_32l; ++extern struct target_desc *tdesc_powerpc_isa205_altivec32l; ++extern struct target_desc *tdesc_powerpc_isa205_vsx32l; + extern struct target_desc *tdesc_powerpc_e500l; + extern struct target_desc *tdesc_powerpc_64l; + extern struct target_desc *tdesc_powerpc_altivec64l; + extern struct target_desc *tdesc_powerpc_cell64l; + extern struct target_desc *tdesc_powerpc_vsx64l; ++extern struct target_desc *tdesc_powerpc_isa205_64l; ++extern struct target_desc *tdesc_powerpc_isa205_altivec64l; ++extern struct target_desc *tdesc_powerpc_isa205_vsx64l; + + #endif /* PPC_LINUX_TDEP_H */ +--- gdb-6.8.50.20080916-cvs/gdb/testsuite/gdb.arch/ppc-dfp.c ++++ gdb-6.8.50.20080916-cvs/gdb/testsuite/gdb.arch/ppc-dfp.c +@@ -0,0 +1,46 @@ ++/* Copyright 2008 Free Software Foundation, Inc. ++ ++ This file is part of GDB. ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3 of the License, or ++ (at your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ GNU General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program. If not, see . */ ++ ++#include ++ ++#ifdef __powerpc64__ ++typedef Elf64_auxv_t auxv_t; ++#else ++typedef Elf32_auxv_t auxv_t; ++#endif ++ ++#ifndef PPC_FEATURE_HAS_DFP ++#define PPC_FEATURE_HAS_DFP 0x00000400 ++#endif ++ ++int ++main (int argc, char *argv[], char *envp[], auxv_t auxv[]) ++{ ++ int i; ++ ++ for (i = 0; auxv[i].a_type != AT_NULL; i++) ++ if (auxv[i].a_type == AT_HWCAP) { ++ if (!(auxv[i].a_un.a_val & PPC_FEATURE_HAS_DFP)) ++ return 1; ++ ++ break; ++ } ++ ++ asm ("mtfsfi 7, 5, 1\n"); /* Set DFP rounding mode. */ ++ ++ return 0; ++} +--- gdb-6.8.50.20080916-cvs/gdb/testsuite/gdb.arch/ppc-dfp.exp ++++ gdb-6.8.50.20080916-cvs/gdb/testsuite/gdb.arch/ppc-dfp.exp +@@ -0,0 +1,82 @@ ++# Copyright (C) 2008 Free Software Foundation, Inc. ++# ++# This program is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 3 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program. If not, see . ++# ++# Please email any bugs, comments, and/or additions to this file to: ++# bug-gdb@prep.ai.mit.edu ++# ++ ++# Tests for Powerpc Decimal Floating Point registers setting and fetching ++ ++if $tracelevel then { ++ strace $tracelevel ++} ++ ++if ![istarget "powerpc*"] then { ++ verbose "Skipping powerpc decimal floating point register tests." ++ return ++} ++ ++set testfile "ppc-dfp" ++set binfile ${objdir}/${subdir}/${testfile} ++set srcfile ${testfile}.c ++ ++if [get_compiler_info $binfile] { ++ warning "get_compiler failed" ++ return -1 ++} ++ ++if ![test_compiler_info gcc*] { ++ # We use GCC's extended asm syntax ++ warning "unknown compiler" ++ return -1 ++} ++ ++if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${binfile}" executable {quiet debug}] != "" } { ++ unsupported "This machine doesn't support Decimal Floating Point." ++ return -1 ++} ++ ++# Start with a fresh gdb. ++ ++gdb_exit ++gdb_start ++gdb_reinitialize_dir $srcdir/$subdir ++gdb_load ${binfile} ++ ++gdb_breakpoint [gdb_get_line_number "Set DFP rounding mode."] ++ ++gdb_run_cmd ++ ++# When the prompt comes back we'll be at the Set DFP rounding mode breakpoint. ++# Unless the program bails out after checking AT_HWCAP. ++gdb_expect { ++ -re "Program exited with code 01.\[\r\n\]+$gdb_prompt $" { ++ unsupported "This machine doesn't support Decimal Floating Point." ++ return -1 ++ } ++ ++ -re ".*$gdb_prompt $" {} ++} ++ ++# First, verify if FPSCR is all zeroes. ++gdb_test "print \$fpscr" " = 0" "FPSCR is all zeroes" ++ ++# Step over "set rounding mode" instruction. ++gdb_test "next" "" "" ++ ++# Verify that the following bits are set (See Power ISA for details): ++# ++# 29:31 - DFP Rounding Control ++gdb_test "print/t \$fpscr" " = 10100000000000000000000000000000000" "FPSCR for round to nearest, ties toward zero rounding mode"