2008-09-14  Thiago Jung Bauermann  <bauerman@br.ibm.com>

gdb/
	* features/Makefile (rs6000/powerpc-isa205-32l-expedite,
	rs6000/powerpc-isa205-altivec32l-expedite,
	powerpc-isa205-vsx32l-expedite, rs6000/powerpc-isa205-64l-expedite,
	rs6000/powerpc-isa205-altivec64l-expedite,
	powerpc-isa205-vsx64l-expedite): New variables.
	* regformats/rs6000/powerpc-isa205-32l.dat: Generate.
	* regformats/rs6000/powerpc-isa205-altivec32l.dat: Generate.
	* regformats/rs6000/powerpc-isa205-vsx32l.dat: Generate.
	* regformats/rs6000/powerpc-isa205-64l.dat: Generate.
	* regformats/rs6000/powerpc-isa205-altivec64l.dat: Generate.
	* regformats/rs6000/powerpc-isa205-vsx64l.dat: Generate.

gdbserver/
	* Makefile.in (powerpc-isa205-32l.o, powerpc-isa205-32l.c,
	powerpc-isa205-altivec32l.o, powerpc-isa205-altivec32l.c,
	powerpc-isa205-vsx32l.o, powerpc-isa205-vsx32l.c,
	powerpc-isa205-64l.o, powerpc-isa205-64l.c,
	powerpc-isa205-altivec64l.o, powerpc-isa205-altivec64l.c,
	powerpc-isa205-vsx64l.o, powerpc-isa205-vsx64l.c): New targets.
	* configure.srv (powerpc*-*-linux*): Add ISA 2.05 object files and
	XML target descriptions.
	* linux-ppc-low.c (ppc_arch_setup): Init registers with 64-bit FPSCR
	when inferior is running on an ISA 2.05 or later processor.  Add
	special case to return offset for full 64-bit slot of FPSCR when
	in 32-bits.

Index: gdb-6.8.50.20080904-cvs/gdb/features/Makefile
================================================================================
--- gdb-6.8.50.20080916-cvs/gdb/features/Makefile
+++ gdb-6.8.50.20080916-cvs/gdb/features/Makefile
@@ -44,11 +44,17 @@ rs6000/powerpc-32l-expedite = r1,pc
 rs6000/powerpc-altivec32l-expedite = r1,pc
 rs6000/powerpc-cell32l-expedite = r1,pc,r0,orig_r3,r4
 rs6000/powerpc-vsx32l-expedite = r1,pc
+rs6000/powerpc-isa205-32l-expedite = r1,pc
+rs6000/powerpc-isa205-altivec32l-expedite = r1,pc
+rs6000/powerpc-isa205-vsx32l-expedite = r1,pc
 rs6000/powerpc-e500l-expedite = r1,pc
 rs6000/powerpc-64l-expedite = r1,pc
 rs6000/powerpc-altivec64l-expedite = r1,pc
 rs6000/powerpc-cell64l-expedite = r1,pc,r0,orig_r3,r4
 rs6000/powerpc-vsx64l-expedite = r1,pc
+rs6000/powerpc-isa205-64l-expedite = r1,pc
+rs6000/powerpc-isa205-altivec64l-expedite = r1,pc
+rs6000/powerpc-isa205-vsx64l-expedite = r1,pc
 
 
 XSLTPROC = xsltproc
--- gdb-6.8.50.20080916-cvs/gdb/gdbserver/Makefile.in
+++ gdb-6.8.50.20080916-cvs/gdb/gdbserver/Makefile.in
@@ -226,6 +226,9 @@ clean:
 	rm -f powerpc-32l.c powerpc-64l.c powerpc-e500l.c
 	rm -f powerpc-altivec32l.c powerpc-cell32l.c powerpc-vsx32l.c
 	rm -f powerpc-altivec64l.c powerpc-cell64l.c powerpc-vsx64l.c
+	rm -f powerpc-isa205-32l.c powerpc-isa205-64l.c
+	rm -f powerpc-isa205-vsx32l.c powerpc-isa205-altivec32l.c
+	rm -f powerpc-isa205-vsx64l.c powerpc-isa205-altivec64l.c
 	rm -f xml-builtin.c stamp-xml
 
 maintainer-clean realclean distclean: clean
@@ -376,6 +379,15 @@ powerpc-cell32l.c : $(srcdir)/../regform
 powerpc-vsx32l.o : powerpc-vsx32l.c $(regdef_h)
 powerpc-vsx32l.c : $(srcdir)/../regformats/rs6000/powerpc-vsx32l.dat $(regdat_sh)
 	$(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-vsx32l.dat powerpc-vsx32l.c
+powerpc-isa205-32l.o : powerpc-isa205-32l.c $(regdef_h)
+powerpc-isa205-32l.c : $(srcdir)/../regformats/rs6000/powerpc-isa205-32l.dat $(regdat_sh)
+	$(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-isa205-32l.dat powerpc-isa205-32l.c
+powerpc-isa205-altivec32l.o : powerpc-isa205-altivec32l.c $(regdef_h)
+powerpc-isa205-altivec32l.c : $(srcdir)/../regformats/rs6000/powerpc-isa205-altivec32l.dat $(regdat_sh)
+	$(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-isa205-altivec32l.dat powerpc-isa205-altivec32l.c
+powerpc-isa205-vsx32l.o : powerpc-isa205-vsx32l.c $(regdef_h)
+powerpc-isa205-vsx32l.c : $(srcdir)/../regformats/rs6000/powerpc-isa205-vsx32l.dat $(regdat_sh)
+	$(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-isa205-vsx32l.dat powerpc-isa205-vsx32l.c
 powerpc-e500l.o : powerpc-e500l.c $(regdef_h)
 powerpc-e500l.c : $(srcdir)/../regformats/rs6000/powerpc-e500l.dat $(regdat_sh)
 	$(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-e500l.dat powerpc-e500l.c
@@ -391,6 +403,15 @@ powerpc-cell64l.c : $(srcdir)/../regform
 powerpc-vsx64l.o : powerpc-vsx64l.c $(regdef_h)
 powerpc-vsx64l.c : $(srcdir)/../regformats/rs6000/powerpc-vsx64l.dat $(regdat_sh)
 	$(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-vsx64l.dat powerpc-vsx64l.c
+powerpc-isa205-64l.o : powerpc-isa205-64l.c $(regdef_h)
+powerpc-isa205-64l.c : $(srcdir)/../regformats/rs6000/powerpc-isa205-64l.dat $(regdat_sh)
+	$(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-isa205-64l.dat powerpc-isa205-64l.c
+powerpc-isa205-altivec64l.o : powerpc-isa205-altivec64l.c $(regdef_h)
+powerpc-isa205-altivec64l.c : $(srcdir)/../regformats/rs6000/powerpc-isa205-altivec64l.dat $(regdat_sh)
+	$(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-isa205-altivec64l.dat powerpc-isa205-altivec64l.c
+powerpc-isa205-vsx64l.o : powerpc-isa205-vsx64l.c $(regdef_h)
+powerpc-isa205-vsx64l.c : $(srcdir)/../regformats/rs6000/powerpc-isa205-vsx64l.dat $(regdat_sh)
+	$(SHELL) $(regdat_sh) $(srcdir)/../regformats/rs6000/powerpc-isa205-vsx64l.dat powerpc-isa205-vsx64l.c
 reg-s390.o : reg-s390.c $(regdef_h)
 reg-s390.c : $(srcdir)/../regformats/reg-s390.dat $(regdat_sh)
 	$(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-s390.dat reg-s390.c
--- gdb-6.8.50.20080916-cvs/gdb/gdbserver/configure.srv
+++ gdb-6.8.50.20080916-cvs/gdb/gdbserver/configure.srv
@@ -104,27 +104,40 @@ case "${target}" in
 			srv_regobj="${srv_regobj} powerpc-altivec32l.o"
 			srv_regobj="${srv_regobj} powerpc-cell32l.o"
 			srv_regobj="${srv_regobj} powerpc-vsx32l.o"
+			srv_regobj="${srv_regobj} powerpc-isa205-32l.o"
+			srv_regobj="${srv_regobj} powerpc-isa205-altivec32l.o"
+			srv_regobj="${srv_regobj} powerpc-isa205-vsx32l.o"
 			srv_regobj="${srv_regobj} powerpc-e500l.o"
 			srv_regobj="${srv_regobj} powerpc-64l.o"
 			srv_regobj="${srv_regobj} powerpc-altivec64l.o"
 			srv_regobj="${srv_regobj} powerpc-cell64l.o"
 			srv_regobj="${srv_regobj} powerpc-vsx64l.o"
+			srv_regobj="${srv_regobj} powerpc-isa205-64l.o"
+			srv_regobj="${srv_regobj} powerpc-isa205-altivec64l.o"
+			srv_regobj="${srv_regobj} powerpc-isa205-vsx64l.o"
 			srv_tgtobj="linux-low.o linux-ppc-low.o"
 			srv_xmlfiles="rs6000/powerpc-32l.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-altivec32l.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-cell32l.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-vsx32l.xml"
+			srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-isa205-32l.xml"
+			srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-isa205-altivec32l.xml"
+			srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-isa205-vsx32l.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/power-altivec.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/power-vsx.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/power-core.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/power-linux.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/power-fpu.xml"
+			srv_xmlfiles="${srv_xmlfiles} rs6000/power-fpu-isa205.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-e500l.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/power-spe.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-64l.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-altivec64l.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-cell64l.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-vsx64l.xml"
+			srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-isa205-64l.xml"
+			srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-isa205-altivec64l.xml"
+			srv_xmlfiles="${srv_xmlfiles} rs6000/powerpc-isa205-vsx64l.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/power64-core.xml"
 			srv_xmlfiles="${srv_xmlfiles} rs6000/power64-linux.xml"
 			srv_linux_usrregs=yes
--- gdb-6.8.50.20080916-cvs/gdb/gdbserver/linux-ppc-low.c
+++ gdb-6.8.50.20080916-cvs/gdb/gdbserver/linux-ppc-low.c
@@ -29,6 +29,7 @@
 #define PPC_FEATURE_HAS_ALTIVEC         0x10000000
 #define PPC_FEATURE_HAS_SPE             0x00800000
 #define PPC_FEATURE_CELL		0x00010000
+#define PPC_FEATURE_ARCH_2_05           0x00001000
 
 static unsigned long ppc_hwcap;
 
@@ -41,6 +42,12 @@ void init_registers_powerpc_altivec32l (
 void init_registers_powerpc_cell32l (void);
 /* Defined in auto-generated file powerpc-vsx32l.c.  */
 void init_registers_powerpc_vsx32l (void);
+/* Defined in auto-generated file powerpc-isa205-32l.c.  */
+void init_registers_powerpc_isa205_32l (void);
+/* Defined in auto-generated file powerpc-isa205-altivec32l.c.  */
+void init_registers_powerpc_isa205_altivec32l (void);
+/* Defined in auto-generated file powerpc-isa205-vsx32l.c.  */
+void init_registers_powerpc_isa205_vsx32l (void);
 /* Defined in auto-generated file powerpc-e500l.c.  */
 void init_registers_powerpc_e500l (void);
 /* Defined in auto-generated file powerpc-64l.c.  */
@@ -51,6 +58,12 @@ void init_registers_powerpc_altivec64l (
 void init_registers_powerpc_cell64l (void);
 /* Defined in auto-generated file powerpc-vsx64l.c.  */
 void init_registers_powerpc_vsx64l (void);
+/* Defined in auto-generated file powerpc-isa205-64l.c.  */
+void init_registers_powerpc_isa205_64l (void);
+/* Defined in auto-generated file powerpc-isa205-altivec64l.c.  */
+void init_registers_powerpc_isa205_altivec64l (void);
+/* Defined in auto-generated file powerpc-isa205-vsx64l.c.  */
+void init_registers_powerpc_isa205_vsx64l (void);
 
 #define ppc_num_regs 73
 
@@ -337,9 +350,20 @@ ppc_arch_setup (void)
       if (ppc_hwcap & PPC_FEATURE_CELL)
 	init_registers_powerpc_cell64l ();
       else if (ppc_hwcap & PPC_FEATURE_HAS_VSX)
-	init_registers_powerpc_vsx64l ();
+	{
+	  if (ppc_hwcap & PPC_FEATURE_ARCH_2_05)
+	    init_registers_powerpc_isa205_vsx64l ();
+	  else
+	    init_registers_powerpc_vsx64l ();
+	}
       else if (ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC)
-	init_registers_powerpc_altivec64l ();
+	{
+	  if (ppc_hwcap & PPC_FEATURE_ARCH_2_05)
+	    init_registers_powerpc_isa205_altivec64l ();
+	  else
+	    init_registers_powerpc_altivec64l ();
+	}
+
       return;
     }
 #endif
@@ -351,9 +375,19 @@ ppc_arch_setup (void)
   if (ppc_hwcap & PPC_FEATURE_CELL)
     init_registers_powerpc_cell32l ();
   else if (ppc_hwcap & PPC_FEATURE_HAS_VSX)
-    init_registers_powerpc_vsx32l ();
+    {
+      if (ppc_hwcap & PPC_FEATURE_ARCH_2_05)
+	init_registers_powerpc_isa205_vsx32l ();
+      else
+	init_registers_powerpc_vsx32l ();
+    }
   else if (ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC)
-    init_registers_powerpc_altivec32l ();
+    {
+      if (ppc_hwcap & PPC_FEATURE_ARCH_2_05)
+	init_registers_powerpc_isa205_altivec32l ();
+      else
+	init_registers_powerpc_altivec32l ();
+    }
 
 
   /* On 32-bit machines, check for SPE registers.
@@ -365,6 +399,12 @@ ppc_arch_setup (void)
       init_registers_powerpc_e500l ();
       the_low_target.regmap = ppc_regmap_e500;
    }
+
+  /* If the FPSCR is 64-bit wide, we need to fetch the whole 64-bit
+     slot and not just its second word.  The PT_FPSCR supplied in a
+     32-bit GDB compilation doesn't reflect this.  */
+  if (register_size (70) == 8)
+    ppc_regmap[70] = (48 + 2*32) * sizeof (long);
 #endif
 }
 
--- gdb-6.8.50.20080916-cvs/gdb/regformats/rs6000/powerpc-isa205-32l.dat
+++ gdb-6.8.50.20080916-cvs/gdb/regformats/rs6000/powerpc-isa205-32l.dat
@@ -0,0 +1,77 @@
+# DO NOT EDIT: generated from rs6000/powerpc-isa205-32l.xml
+name:powerpc_isa205_32l
+xmltarget:powerpc-isa205-32l.xml
+expedite:r1,pc
+32:r0
+32:r1
+32:r2
+32:r3
+32:r4
+32:r5
+32:r6
+32:r7
+32:r8
+32:r9
+32:r10
+32:r11
+32:r12
+32:r13
+32:r14
+32:r15
+32:r16
+32:r17
+32:r18
+32:r19
+32:r20
+32:r21
+32:r22
+32:r23
+32:r24
+32:r25
+32:r26
+32:r27
+32:r28
+32:r29
+32:r30
+32:r31
+64:f0
+64:f1
+64:f2
+64:f3
+64:f4
+64:f5
+64:f6
+64:f7
+64:f8
+64:f9
+64:f10
+64:f11
+64:f12
+64:f13
+64:f14
+64:f15
+64:f16
+64:f17
+64:f18
+64:f19
+64:f20
+64:f21
+64:f22
+64:f23
+64:f24
+64:f25
+64:f26
+64:f27
+64:f28
+64:f29
+64:f30
+64:f31
+32:pc
+32:msr
+32:cr
+32:lr
+32:ctr
+32:xer
+64:fpscr
+32:orig_r3
+32:trap
--- gdb-6.8.50.20080916-cvs/gdb/regformats/rs6000/powerpc-isa205-64l.dat
+++ gdb-6.8.50.20080916-cvs/gdb/regformats/rs6000/powerpc-isa205-64l.dat
@@ -0,0 +1,77 @@
+# DO NOT EDIT: generated from rs6000/powerpc-isa205-64l.xml
+name:powerpc_isa205_64l
+xmltarget:powerpc-isa205-64l.xml
+expedite:r1,pc
+64:r0
+64:r1
+64:r2
+64:r3
+64:r4
+64:r5
+64:r6
+64:r7
+64:r8
+64:r9
+64:r10
+64:r11
+64:r12
+64:r13
+64:r14
+64:r15
+64:r16
+64:r17
+64:r18
+64:r19
+64:r20
+64:r21
+64:r22
+64:r23
+64:r24
+64:r25
+64:r26
+64:r27
+64:r28
+64:r29
+64:r30
+64:r31
+64:f0
+64:f1
+64:f2
+64:f3
+64:f4
+64:f5
+64:f6
+64:f7
+64:f8
+64:f9
+64:f10
+64:f11
+64:f12
+64:f13
+64:f14
+64:f15
+64:f16
+64:f17
+64:f18
+64:f19
+64:f20
+64:f21
+64:f22
+64:f23
+64:f24
+64:f25
+64:f26
+64:f27
+64:f28
+64:f29
+64:f30
+64:f31
+64:pc
+64:msr
+32:cr
+64:lr
+64:ctr
+32:xer
+64:fpscr
+64:orig_r3
+64:trap
--- gdb-6.8.50.20080916-cvs/gdb/regformats/rs6000/powerpc-isa205-altivec32l.dat
+++ gdb-6.8.50.20080916-cvs/gdb/regformats/rs6000/powerpc-isa205-altivec32l.dat
@@ -0,0 +1,111 @@
+# DO NOT EDIT: generated from rs6000/powerpc-isa205-altivec32l.xml
+name:powerpc_isa205_altivec32l
+xmltarget:powerpc-isa205-altivec32l.xml
+expedite:r1,pc
+32:r0
+32:r1
+32:r2
+32:r3
+32:r4
+32:r5
+32:r6
+32:r7
+32:r8
+32:r9
+32:r10
+32:r11
+32:r12
+32:r13
+32:r14
+32:r15
+32:r16
+32:r17
+32:r18
+32:r19
+32:r20
+32:r21
+32:r22
+32:r23
+32:r24
+32:r25
+32:r26
+32:r27
+32:r28
+32:r29
+32:r30
+32:r31
+64:f0
+64:f1
+64:f2
+64:f3
+64:f4
+64:f5
+64:f6
+64:f7
+64:f8
+64:f9
+64:f10
+64:f11
+64:f12
+64:f13
+64:f14
+64:f15
+64:f16
+64:f17
+64:f18
+64:f19
+64:f20
+64:f21
+64:f22
+64:f23
+64:f24
+64:f25
+64:f26
+64:f27
+64:f28
+64:f29
+64:f30
+64:f31
+32:pc
+32:msr
+32:cr
+32:lr
+32:ctr
+32:xer
+64:fpscr
+32:orig_r3
+32:trap
+128:vr0
+128:vr1
+128:vr2
+128:vr3
+128:vr4
+128:vr5
+128:vr6
+128:vr7
+128:vr8
+128:vr9
+128:vr10
+128:vr11
+128:vr12
+128:vr13
+128:vr14
+128:vr15
+128:vr16
+128:vr17
+128:vr18
+128:vr19
+128:vr20
+128:vr21
+128:vr22
+128:vr23
+128:vr24
+128:vr25
+128:vr26
+128:vr27
+128:vr28
+128:vr29
+128:vr30
+128:vr31
+32:vscr
+32:vrsave
--- gdb-6.8.50.20080916-cvs/gdb/regformats/rs6000/powerpc-isa205-altivec64l.dat
+++ gdb-6.8.50.20080916-cvs/gdb/regformats/rs6000/powerpc-isa205-altivec64l.dat
@@ -0,0 +1,111 @@
+# DO NOT EDIT: generated from rs6000/powerpc-isa205-altivec64l.xml
+name:powerpc_isa205_altivec64l
+xmltarget:powerpc-isa205-altivec64l.xml
+expedite:r1,pc
+64:r0
+64:r1
+64:r2
+64:r3
+64:r4
+64:r5
+64:r6
+64:r7
+64:r8
+64:r9
+64:r10
+64:r11
+64:r12
+64:r13
+64:r14
+64:r15
+64:r16
+64:r17
+64:r18
+64:r19
+64:r20
+64:r21
+64:r22
+64:r23
+64:r24
+64:r25
+64:r26
+64:r27
+64:r28
+64:r29
+64:r30
+64:r31
+64:f0
+64:f1
+64:f2
+64:f3
+64:f4
+64:f5
+64:f6
+64:f7
+64:f8
+64:f9
+64:f10
+64:f11
+64:f12
+64:f13
+64:f14
+64:f15
+64:f16
+64:f17
+64:f18
+64:f19
+64:f20
+64:f21
+64:f22
+64:f23
+64:f24
+64:f25
+64:f26
+64:f27
+64:f28
+64:f29
+64:f30
+64:f31
+64:pc
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+64:ctr
+32:xer
+64:fpscr
+64:orig_r3
+64:trap
+128:vr0
+128:vr1
+128:vr2
+128:vr3
+128:vr4
+128:vr5
+128:vr6
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+128:vr8
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+128:vr30
+128:vr31
+32:vscr
+32:vrsave
--- gdb-6.8.50.20080916-cvs/gdb/regformats/rs6000/powerpc-isa205-vsx32l.dat
+++ gdb-6.8.50.20080916-cvs/gdb/regformats/rs6000/powerpc-isa205-vsx32l.dat
@@ -0,0 +1,143 @@
+# DO NOT EDIT: generated from rs6000/powerpc-isa205-vsx32l.xml
+name:powerpc_isa205_vsx32l
+xmltarget:powerpc-isa205-vsx32l.xml
+expedite:r1,pc
+32:r0
+32:r1
+32:r2
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+64:f0
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+64:f31
+32:pc
+32:msr
+32:cr
+32:lr
+32:ctr
+32:xer
+64:fpscr
+32:orig_r3
+32:trap
+128:vr0
+128:vr1
+128:vr2
+128:vr3
+128:vr4
+128:vr5
+128:vr6
+128:vr7
+128:vr8
+128:vr9
+128:vr10
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+128:vr13
+128:vr14
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+128:vr24
+128:vr25
+128:vr26
+128:vr27
+128:vr28
+128:vr29
+128:vr30
+128:vr31
+32:vscr
+32:vrsave
+64:vs0h
+64:vs1h
+64:vs2h
+64:vs3h
+64:vs4h
+64:vs5h
+64:vs6h
+64:vs7h
+64:vs8h
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+64:vs10h
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+64:vs12h
+64:vs13h
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+64:vs27h
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+64:vs29h
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+64:vs31h
--- gdb-6.8.50.20080916-cvs/gdb/regformats/rs6000/powerpc-isa205-vsx64l.dat
+++ gdb-6.8.50.20080916-cvs/gdb/regformats/rs6000/powerpc-isa205-vsx64l.dat
@@ -0,0 +1,143 @@
+# DO NOT EDIT: generated from rs6000/powerpc-isa205-vsx64l.xml
+name:powerpc_isa205_vsx64l
+xmltarget:powerpc-isa205-vsx64l.xml
+expedite:r1,pc
+64:r0
+64:r1
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+64:r4
+64:r5
+64:r6
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+64:r15
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+64:r31
+64:f0
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+64:f31
+64:pc
+64:msr
+32:cr
+64:lr
+64:ctr
+32:xer
+64:fpscr
+64:orig_r3
+64:trap
+128:vr0
+128:vr1
+128:vr2
+128:vr3
+128:vr4
+128:vr5
+128:vr6
+128:vr7
+128:vr8
+128:vr9
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+128:vr22
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+128:vr24
+128:vr25
+128:vr26
+128:vr27
+128:vr28
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+128:vr30
+128:vr31
+32:vscr
+32:vrsave
+64:vs0h
+64:vs1h
+64:vs2h
+64:vs3h
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+64:vs6h
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