gdb/bnc492331.patch

99 lines
4.0 KiB
Diff

2009-03-25 Thiago Jung Bauermann <bauerman@br.ibm.com>
gdb/
* ppc-linux-nat.c (PPC_FEATURE_ARCH_2_05): Remove #define.
(PPC_FEATURE_HAS_DFP): New #define.
(ppc_linux_read_description): Check for DFP feature instead of
ISA 2.05 to decide on size of the FPSCR.
gdbserver/
* linux-ppc-low.c (PPC_FEATURE_ARCH_2_05): Remove #define.
(PPC_FEATURE_HAS_DFP): New #define.
(ppc_arch_setup): Check for DFP feature instead of ISA 2.05 to decide on
size of the FPSCR.
Index: gdb-6.8.50.20090302/gdb/gdbserver/linux-ppc-low.c
===================================================================
--- gdb-6.8.50.20090302.orig/gdb/gdbserver/linux-ppc-low.c 2009-01-03 06:57:57.000000000 +0100
+++ gdb-6.8.50.20090302/gdb/gdbserver/linux-ppc-low.c 2009-05-14 16:01:25.000000000 +0200
@@ -28,7 +28,7 @@
#define PPC_FEATURE_HAS_VSX 0x00000080
#define PPC_FEATURE_HAS_ALTIVEC 0x10000000
#define PPC_FEATURE_HAS_SPE 0x00800000
-#define PPC_FEATURE_ARCH_2_05 0x00001000
+#define PPC_FEATURE_HAS_DFP 0x00000400
static unsigned long ppc_hwcap;
@@ -274,14 +274,21 @@ ppc_arch_setup (void)
ppc_get_hwcap (&ppc_hwcap);
if (ppc_hwcap & PPC_FEATURE_HAS_VSX)
{
- if (ppc_hwcap & PPC_FEATURE_ARCH_2_05)
+ /* Power ISA 2.05 (implemented by Power 6 and newer processors)
+ increases the FPSCR from 32 bits to 64 bits. Even though Power 7
+ supports this ISA version, it doesn't have PPC_FEATURE_ARCH_2_05
+ set, only PPC_FEATURE_ARCH_2_06. Since for now the only bits
+ used in the higher half of the register are for Decimal Floating
+ Point, we check if that feature is available to decide the size
+ of the FPSCR. */
+ if (ppc_hwcap & PPC_FEATURE_HAS_DFP)
init_registers_powerpc_isa205_vsx64l ();
else
init_registers_powerpc_vsx64l ();
}
else if (ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC)
{
- if (ppc_hwcap & PPC_FEATURE_ARCH_2_05)
+ if (ppc_hwcap & PPC_FEATURE_HAS_DFP)
init_registers_powerpc_isa205_altivec64l ();
else
init_registers_powerpc_altivec64l ();
@@ -297,14 +304,14 @@ ppc_arch_setup (void)
ppc_get_hwcap (&ppc_hwcap);
if (ppc_hwcap & PPC_FEATURE_HAS_VSX)
{
- if (ppc_hwcap & PPC_FEATURE_ARCH_2_05)
+ if (ppc_hwcap & PPC_FEATURE_HAS_DFP)
init_registers_powerpc_isa205_vsx32l ();
else
init_registers_powerpc_vsx32l ();
}
else if (ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC)
{
- if (ppc_hwcap & PPC_FEATURE_ARCH_2_05)
+ if (ppc_hwcap & PPC_FEATURE_HAS_DFP)
init_registers_powerpc_isa205_altivec32l ();
else
init_registers_powerpc_altivec32l ();
Index: gdb-6.8.50.20090302/gdb/ppc-linux-nat.c
===================================================================
--- gdb-6.8.50.20090302.orig/gdb/ppc-linux-nat.c 2009-05-14 15:58:08.000000000 +0200
+++ gdb-6.8.50.20090302/gdb/ppc-linux-nat.c 2009-05-14 15:58:09.000000000 +0200
@@ -63,8 +63,8 @@
#ifndef PPC_FEATURE_BOOKE
#define PPC_FEATURE_BOOKE 0x00008000
#endif
-#ifndef PPC_FEATURE_ARCH_2_05
-#define PPC_FEATURE_ARCH_2_05 0x00001000 /* ISA 2.05 */
+#ifndef PPC_FEATURE_HAS_DFP
+#define PPC_FEATURE_HAS_DFP 0x00000400 /* Decimal Floating Point. */
#endif
/* Glibc's headers don't define PTRACE_GETVRREGS so we cannot use a
@@ -1310,7 +1310,13 @@ ppc_linux_read_description (struct targe
perror_with_name (_("Unable to fetch AltiVec registers"));
}
- if (ppc_linux_get_hwcap () & PPC_FEATURE_ARCH_2_05)
+ /* Power ISA 2.05 (implemented by Power 6 and newer processors) increases
+ the FPSCR from 32 bits to 64 bits. Even though Power 7 supports this
+ ISA version, it doesn't have PPC_FEATURE_ARCH_2_05 set, only
+ PPC_FEATURE_ARCH_2_06. Since for now the only bits used in the higher
+ half of the register are for Decimal Floating Point, we check if that
+ feature is available to decide the size of the FPSCR. */
+ if (ppc_linux_get_hwcap () & PPC_FEATURE_HAS_DFP)
isa205 = 1;
/* Check for 64-bit inferior process. This is the case when the host is