From 7806c326e8d04149dd8fdaa9084ea9317c85144987559f3ff23d01cb4728d6f5 Mon Sep 17 00:00:00 2001
From: Richard Biener <rguenther@suse.com>
Date: Mon, 23 May 2011 08:53:41 +0000
Subject: [PATCH] - Update longlong.h from GCC sources.  Fixes s390 build with
 -mzarch.   [bnc#695102]

OBS-URL: https://build.opensuse.org/package/show/Base:System/glibc?expand=0&rev=50
---
 glibc-zarch-longlong.diff | 41 +++++++++++++++++++++++++++++++++++++++
 glibc.changes             |  6 ++++++
 glibc.spec                |  2 ++
 3 files changed, 49 insertions(+)
 create mode 100644 glibc-zarch-longlong.diff

diff --git a/glibc-zarch-longlong.diff b/glibc-zarch-longlong.diff
new file mode 100644
index 0000000..d61a019
--- /dev/null
+++ b/glibc-zarch-longlong.diff
@@ -0,0 +1,41 @@
+Index: glibc/stdlib/longlong.h
+===================================================================
+--- glibc.orig/stdlib/longlong.h
++++ glibc/stdlib/longlong.h
+@@ -303,6 +303,7 @@ UDItype __umulsidi3 (USItype, USItype);
+ #endif
+ 
+ #if (defined (__i370__) || defined (__s390__) || defined (__mvs__)) && W_TYPE_SIZE == 32
++#if !defined (__zarch__)
+ #define smul_ppmm(xh, xl, m0, m1) \
+   do {									\
+     union {DItype __ll;							\
+@@ -324,6 +325,28 @@ UDItype __umulsidi3 (USItype, USItype);
+ 	     : "0" (__x.__ll), "r" (d));				\
+     (q) = __x.__i.__l; (r) = __x.__i.__h;				\
+   } while (0)
++#else
++#define smul_ppmm(xh, xl, m0, m1) \
++  do {                                                                  \
++    register SItype r0 __asm__ ("0");                                   \
++    register SItype r1 __asm__ ("1") = m0;                              \
++                                                                        \
++    __asm__ ("mr\t%%r0,%3"                                              \
++             : "=r" (r0), "=r" (r1)                                     \
++             : "r"  (r1),  "r" (m1));                                   \
++    (xh) = r1; (xl) = r0;                                               \
++  } while (0)
++#define sdiv_qrnnd(q, r, n1, n0, d) \
++  do {									\
++    register SItype r0 __asm__ ("0") = n0;                              \
++    register SItype r1 __asm__ ("1") = n1;                              \
++                                                                        \
++    __asm__ ("dr\t%%r0,%3"						\
++	     : "=r" (r0), "=r" (r1)		         		\
++	     : "r" (r0), "r" (r1), "r" (d));				\
++    (q) = r0; (r) = r1;                  				\
++  } while (0)
++#endif /* __zarch__ */
+ #endif
+ 
+ #if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
diff --git a/glibc.changes b/glibc.changes
index a04f7e7..73a756b 100644
--- a/glibc.changes
+++ b/glibc.changes
@@ -1,3 +1,9 @@
+-------------------------------------------------------------------
+Mon May 23 08:44:47 UTC 2011 - rguenther@novell.com
+
+- Update longlong.h from GCC sources.  Fixes s390 build with -mzarch.
+  [bnc#695102]
+
 -------------------------------------------------------------------
 Tue Feb 22 12:57:07 CET 2011 - pbaudis@suse.cz
 
diff --git a/glibc.spec b/glibc.spec
index 174c6ae..1f809a0 100644
--- a/glibc.spec
+++ b/glibc.spec
@@ -138,6 +138,7 @@ Patch49:	glibc-fini-unwind.diff
 Patch50:        glibc-gconvcache-s390.diff
 Patch51:	glibc-vfprintf-positional.diff
 Patch52:	glibc-elf-localscope.diff
+Patch53:	glibc-zarch-longlong.diff
 Patch500:       ARM_glibc-2.10.1-local-eabi-wchar.diff
 Patch501:       ARM_glibc-2.10.1-local-hwcap-updates.diff 
 Patch502:       ARM_glibc-2.10.1-local-lowlevellock.diff
@@ -357,6 +358,7 @@ rm nscd/s-stamp
 %patch50
 %patch51 -p1
 %patch52
+%patch53 -p1
 %ifarch %arm armv5tel armv7l
 %patch500
 %patch501