glibc/x86-cpuid-level2.patch

30 lines
967 B
Diff

openSUSE bug report:
https://bugzilla.novell.com/show_bug.cgi?id=681398
Patch from Debian, see
http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=584748
---
sysdeps/x86_64/cacheinfo.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
Index: glibc-2.15/sysdeps/x86_64/cacheinfo.c
===================================================================
--- glibc-2.15.orig/sysdeps/x86_64/cacheinfo.c
+++ glibc-2.15/sysdeps/x86_64/cacheinfo.c
@@ -305,7 +305,13 @@ intel_check_word (int name, unsigned int
static long int __attribute__ ((noinline))
handle_intel (int name, unsigned int maxidx)
{
- assert (maxidx >= 2);
+ if (maxidx <= 2)
+ {
+ /* This should never happen as all Intel i686 CPU support a CPUID
+ level of 2 minimum. However valgrind sometimes load the i686
+ library with a P55C CPUID. Return 0 in that case. */
+ return 0;
+ }
/* OK, we can use the CPUID instruction to get all info about the
caches. */