160 lines
5.5 KiB
Diff
160 lines
5.5 KiB
Diff
--- sysdeps/powerpc/fpu/fenv_libc.h.~1.5.~ 2008-11-17 10:44:10.000000000 +0100
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+++ sysdeps/powerpc/fpu/fenv_libc.h 2009-01-22 14:23:37.000000000 +0100
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@@ -39,7 +39,7 @@ libm_hidden_proto (__fe_nomask_env)
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do { \
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double d = (env); \
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if(GLRO(dl_hwcap) & PPC_FEATURE_HAS_DFP) \
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- asm volatile ("mtfsf 0xff,%0,1,0" : : "f" (d)); \
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+ asm volatile (".machine push; .machine power6; mtfsf 0xff,%0,1,0; .machine pop" : : "f" (d)); \
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else \
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asm volatile ("mtfsf 0xff,%0" : : "f" (d)); \
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} while(0)
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@@ -53,7 +53,7 @@ libm_hidden_proto (__fe_nomask_env)
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#define relax_fenv_state() \
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do { \
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if(GLRO(dl_hwcap) & PPC_FEATURE_HAS_DFP) \
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- asm ("mtfsfi 7,0,1"); \
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+ asm (".machine push; .machine power6; mtfsfi 7,0,1; .machine pop"); \
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asm ("mtfsfi 7,0"); \
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} while(0)
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--- sysdeps/powerpc/fpu/tst-setcontext-fpscr.c.~1.1.~ 2008-11-17 02:34:02.000000000 +0100
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+++ sysdeps/powerpc/fpu/tst-setcontext-fpscr.c 2009-01-22 14:24:33.000000000 +0100
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@@ -109,7 +109,7 @@ typedef unsigned int si_fpscr_t __attrib
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tmp __attribute__ ((__aligned__(8))); \
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tmp.fpscr = __fpscr; \
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/* Set the entire 64-bit FPSCR. */ \
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- __asm__ ("lfd%U0 0,%0; mtfsf 255,0,1,0" : : "m" (tmp.d) : "fr0"); \
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+ __asm__ ("lfd%U0 0,%0; .machine push; .machine power6; mtfsf 255,0,1,0; .machine pop" : : "m" (tmp.d) : "fr0"); \
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}
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# define _GET_SI_FPSCR(__fpscr) ({ \
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--- sysdeps/unix/sysv/linux/powerpc/powerpc32/setcontext-common.S.~1.4.~ 2008-11-17 10:44:18.000000000 +0100
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+++ sysdeps/unix/sysv/linux/powerpc/powerpc32/setcontext-common.S 2009-01-22 15:42:24.000000000 +0100
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@@ -202,13 +202,19 @@ ENTRY(__CONTEXT_FUNC_NAME)
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lfd fp0,_UC_FREGS+(0*8)(r31)
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# ifdef _ARCH_PWR6
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/* Use the extended four-operand version of the mtfsf insn. */
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+ .machine push
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+ .machine power6
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mtfsf 0xff,fp31,1,0
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+ .machine pop
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# else
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/* Availability of DFP indicates a 64-bit FPSCR. */
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andi. r6,r7,PPC_FEATURE_HAS_DFP
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beq 7f
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/* Use the extended four-operand version of the mtfsf insn. */
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+ .machine push
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+ .machine power6
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mtfsf 0xff,fp31,1,0
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+ .machine pop
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b 8f
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/* Continue to operate on the FPSCR as if it were 32-bits. */
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7: mtfsf 0xff,fp31
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--- sysdeps/unix/sysv/linux/powerpc/powerpc32/swapcontext-common.S.~1.3.~ 2008-11-17 10:44:18.000000000 +0100
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+++ sysdeps/unix/sysv/linux/powerpc/powerpc32/swapcontext-common.S 2009-01-22 15:42:37.000000000 +0100
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@@ -428,13 +428,19 @@ ENTRY(__CONTEXT_FUNC_NAME)
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lfd fp0,_UC_FREGS+(0*8)(r31)
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# ifdef _ARCH_PWR6
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/* Use the extended four-operand version of the mtfsf insn. */
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+ .machine push
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+ .machine power6
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mtfsf 0xff,fp31,1,0
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+ .machine pop
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# else
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/* Availability of DFP indicates a 64-bit FPSCR. */
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andi. r6,r7,PPC_FEATURE_HAS_DFP
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beq 7f
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/* Use the extended four-operand version of the mtfsf insn. */
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+ .machine push
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+ .machine power6
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mtfsf 0xff,fp31,1,0
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+ .machine pop
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b 8f
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/* Continue to operate on the FPSCR as if it were 32-bits. */
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7: mtfsf 0xff,fp31
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--- sysdeps/unix/sysv/linux/powerpc/powerpc64/setcontext.S.~1.14.~ 2008-11-17 10:44:18.000000000 +0100
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+++ sysdeps/unix/sysv/linux/powerpc/powerpc64/setcontext.S 2009-01-22 15:43:05.000000000 +0100
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@@ -84,13 +84,19 @@ ENTRY(__novec_setcontext)
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# ifdef _ARCH_PWR6
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/* Use the extended four-operand version of the mtfsf insn. */
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+ .machine push
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+ .machine power6
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mtfsf 0xff,fp0,1,0
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+ .machine pop
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# else
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/* Availability of DFP indicates a 64-bit FPSCR. */
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andi. r6,r5,PPC_FEATURE_HAS_DFP
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beq 5f
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/* Use the extended four-operand version of the mtfsf insn. */
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+ .machine push
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+ .machine power6
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mtfsf 0xff,fp0,1,0
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+ .machine pop
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b 6f
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/* Continue to operate on the FPSCR as if it were 32-bits. */
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5:
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@@ -372,13 +378,19 @@ L(has_no_vec):
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# ifdef _ARCH_PWR6
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/* Use the extended four-operand version of the mtfsf insn. */
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+ .machine push
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+ .machine power6
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mtfsf 0xff,fp0,1,0
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+ .machine pop
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# else
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/* Availability of DFP indicates a 64-bit FPSCR. */
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andi. r6,r5,PPC_FEATURE_HAS_DFP
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beq 7f
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/* Use the extended four-operand version of the mtfsf insn. */
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+ .machine push
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+ .machine power6
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mtfsf 0xff,fp0,1,0
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+ .machine pop
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b 8f
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/* Continue to operate on the FPSCR as if it were 32-bits. */
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7:
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--- sysdeps/unix/sysv/linux/powerpc/powerpc64/swapcontext.S.~1.17.~ 2008-11-17 10:44:18.000000000 +0100
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+++ sysdeps/unix/sysv/linux/powerpc/powerpc64/swapcontext.S 2009-01-22 15:43:26.000000000 +0100
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@@ -178,13 +178,19 @@ ENTRY(__novec_swapcontext)
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lfd fp30,(SIGCONTEXT_FP_REGS+(PT_R30*8))(r31)
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# ifdef _ARCH_PWR6
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/* Use the extended four-operand version of the mtfsf insn. */
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+ .machine push
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+ .machine power6
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mtfsf 0xff,fp0,1,0
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+ .machine pop
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# else
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/* Availability of DFP indicates a 64-bit FPSCR. */
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andi. r6,r8,PPC_FEATURE_HAS_DFP
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beq 5f
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/* Use the extended four-operand version of the mtfsf insn. */
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+ .machine push
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+ .machine power6
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mtfsf 0xff,fp0,1,0
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+ .machine pop
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b 6f
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/* Continue to operate on the FPSCR as if it were 32-bits. */
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5:
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@@ -670,13 +676,19 @@ L(has_no_vec2):
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lfd fp30,(SIGCONTEXT_FP_REGS+(PT_R30*8))(r31)
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# ifdef _ARCH_PWR6
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/* Use the extended four-operand version of the mtfsf insn. */
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+ .machine push
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+ .machine power6
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mtfsf 0xff,fp0,1,0
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+ .machine pop
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# else
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/* Availability of DFP indicates a 64-bit FPSCR. */
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andi. r6,r8,PPC_FEATURE_HAS_DFP
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beq 7f
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/* Use the extended four-operand version of the mtfsf insn. */
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+ .machine push
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+ .machine power6
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mtfsf 0xff,fp0,1,0
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+ .machine pop
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b 8f
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/* Continue to operate on the FPSCR as if it were 32-bits. */
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7:
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