- Update to version 12.0 * This is the first release in the Version 12 branch. - Updated URL and source locations OBS-URL: https://build.opensuse.org/request/show/1145000 OBS-URL: https://build.opensuse.org/package/show/electronics/iverilog?expand=0&rev=8
78 lines
2.1 KiB
RPMSpec
78 lines
2.1 KiB
RPMSpec
#
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# spec file for package iverilog
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#
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# Copyright (c) 2020-2024 SUSE LLC
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#
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# All modifications and additions to the file contributed by third parties
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# remain the property of their copyright owners, unless otherwise agreed
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# upon. The license for this file, and modifications and additions to the
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# file, is the same license as for the pristine package itself (unless the
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# license for the pristine package is not an Open Source License, in which
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# case the license is the MIT License). An "Open Source License" is a
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# license that conforms to the Open Source Definition (Version 1.9)
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# published by the Open Source Initiative.
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# Please submit bugfixes or comments via https://bugs.opensuse.org/
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#
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Name: iverilog
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Version: 12.0
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Release: 0
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%define major_ver 12
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Summary: Simulation and synthesis tool for IEEE-1364
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License: GPL-2.0-or-later
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Group: Productivity/Scientific/Electronics
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URL: https://steveicarus.github.io/iverilog/
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Source: https://altushost-swe.dl.sourceforge.net/project/iverilog/iverilog/%{version}/verilog-%{version}.tar.gz
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BuildRequires: bison
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BuildRequires: fdupes
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BuildRequires: flex
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BuildRequires: gcc-c++
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BuildRequires: gperf
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BuildRequires: libbz2-devel
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BuildRequires: readline-devel
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BuildRequires: zlib-devel
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%description
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Icarus Verilog is a Verilog compiler that generates a variety of
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engineering formats, including simulation. It strives to be true
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to the IEEE-1364 standard.
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%package devel
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Summary: Icarus Verilog development files
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Group: Development/Libraries/C and C++
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Requires: %{name} = %{version}
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%description devel
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This package contains necessary header files for Icarus Verilog
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%prep
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%setup -q -n verilog-%{version}
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%build
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%configure
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%make_build
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%install
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%make_install
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rm %{buildroot}/%{_libdir}/*.a
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%fdupes -s %{buildroot}/%{_libdir}/ivl/
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%check
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make check
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%files
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%license COPYING
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%doc README.md BUGS.txt QUICK_START.txt ieee1364-notes.txt
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%doc swift.txt netlist.txt t-dll.txt vpi.txt tgt-fpga/fpga.txt
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%doc cadpli/cadpli.txt xilinx-hint.txt examples
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%{_bindir}/*
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%{_libdir}/ivl/
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%{_mandir}/man1/*
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%files devel
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%{_includedir}/*
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%changelog
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