# HG changeset patch
# User roland
# Date 1425891593 -3600
# Node ID 3816de51b5e7d6050584057fae5f2262dae53d7e
# Parent  23bf458e359fed77978ec165b729527180904cd5
8071731: Better scaling for C1
Reviewed-by: kvn, iveresov

diff -r 23bf458e359f -r 3816de51b5e7 src/share/vm/c1/c1_LIRGenerator.cpp
--- jdk8/hotspot/src/share/vm/c1/c1_LIRGenerator.cpp	Mon Mar 23 11:15:48 2015 -0700
+++ jdk8/hotspot/src/share/vm/c1/c1_LIRGenerator.cpp	Mon Mar 09 09:59:53 2015 +0100
@@ -2204,7 +2204,15 @@
   if (log2_scale != 0) {
     // temporary fix (platform dependent code without shift on Intel would be better)
     // TODO: ARM also allows embedded shift in the address
-    __ shift_left(index_op, log2_scale, index_op);
+    LIR_Opr tmp = new_pointer_register();
+    if (TwoOperandLIRForm) {
+      __ move(index_op, tmp);
+      index_op = tmp;
+    }
+    __ shift_left(index_op, log2_scale, tmp);
+    if (!TwoOperandLIRForm) {
+      index_op = tmp;
+    }
   }
 
   LIR_Address* addr = new LIR_Address(base_op, index_op, x->basic_type());