Accepting request 867001 from home:trenn:branches:Base:System
- Update to version 175 (jsc#SLE-14450): * mcelog: Add a test case to test page error counter replacement. * mcelog: Use 'num-errors' to specify the number of mce records to be injected. * mcelog: Report how often the replacement of page CE counter happened * mcelog: Limit memory consumption for counting CEs per page * mcelog: Add support for Sapphirerapids server. (jsc#SLE-14450) * mcelog: i10nm: Fix mapping from bank number to functional unit - Only refreshing patches, due to tarball modifications: M Start-consolidating-AMD-specific-stuff.patch M add-f10h-support.patch M add-f11h-support.patch M add-f12h-support.patch M add-f14h-support.patch M add-f15h-support.patch M add-f16h-support.patch M email.patch M fix_setgroups_missing_call.patch M mcelog_invert_prefill_db_warning.patch OBS-URL: https://build.opensuse.org/request/show/867001 OBS-URL: https://build.opensuse.org/package/show/Base:System/mcelog?expand=0&rev=90
This commit is contained in:
parent
8ed53dc82f
commit
2ce622fffe
@ -8,17 +8,19 @@ down cpu type in decode_amd_mc.
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Signed-off-by: Borislav Petkov <bp@suse.de>
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---
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Makefile | 2 +-
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k8.c => amd.c | 9 +++++----
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k8.h => amd.h | 5 ++++-
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mcelog.c | 8 ++++----
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4 files changed, 14 insertions(+), 10 deletions(-)
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Makefile | 2
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amd.c | 282 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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amd.h | 14 +++
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k8.c | 281 --------------------------------------------------------------
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k8.h | 11 --
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mcelog.c | 8 -
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6 files changed, 301 insertions(+), 297 deletions(-)
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rename k8.c => amd.c (97%)
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rename k8.h => amd.h (79%)
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--- mcelog-1.64+git20190805.e53631f.orig/Makefile 2019-09-06 14:06:56.229228424 +0200
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+++ mcelog-1.64+git20190805.e53631f/Makefile 2019-09-06 14:09:39.241237130 +0200
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@@ -30,7 +30,7 @@
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--- a/Makefile
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+++ b/Makefile
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@@ -31,7 +31,7 @@
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.PHONY: install clean depend FORCE
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@ -27,292 +29,8 @@ Signed-off-by: Borislav Petkov <bp@suse.de>
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nehalem.o dunnington.o tulsa.o config.o memutil.o msg.o \
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eventloop.o leaky-bucket.o memdb.o server.o trigger.o \
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client.o cache.o sysfs.o yellow.o page.o rbtree.o \
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--- mcelog-1.64+git20190805.e53631f.orig/k8.c 2019-09-06 14:06:51.681228181 +0200
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+++ /dev/null 1970-01-01 00:00:00.000000000 +0000
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@@ -1,281 +0,0 @@
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-/* Based on K8 decoding code written for the 2.4 kernel by Andi Kleen and
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- * Eric Morton. Hacked and extended for mcelog by AK.
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- *
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- * Original copyright:
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- * K8 parts Copyright 2002,2003 Andi Kleen, SuSE Labs.
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- * Additional K8 decoding and simplification Copyright 2003 Eric Morton, Newisys Inc
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- * K8 threshold counters decoding Copyright 2005,2006 Jacob Shin, AMD Inc.
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- *
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- * Subject to the GNU General Public License
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- */
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-
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-#include <stdio.h>
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-#include "mcelog.h"
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-#include "k8.h"
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-
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-static char *k8bank[] = {
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- "data cache",
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- "instruction cache",
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- "bus unit",
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- "load/store unit",
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- "northbridge",
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- "fixed-issue reoder"
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-};
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-static char *transaction[] = {
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- "instruction", "data", "generic", "reserved"
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-};
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-static char *cachelevel[] = {
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- "0", "1", "2", "generic"
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-};
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-static char *memtrans[] = {
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- "generic error", "generic read", "generic write", "data read",
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- "data write", "instruction fetch", "prefetch", "evict", "snoop",
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- "?", "?", "?", "?", "?", "?", "?"
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-};
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-static char *partproc[] = {
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- "local node origin", "local node response",
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- "local node observed", "generic participation"
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-};
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-static char *timeout[] = {
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- "request didn't time out",
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- "request timed out"
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-};
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-static char *memoryio[] = {
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- "memory", "res.", "i/o", "generic"
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-};
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-static char *nbextendederr[] = {
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- "RAM ECC error",
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- "CRC error",
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- "Sync error",
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- "Master abort",
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- "Target abort",
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- "GART error",
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- "RMW error",
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- "Watchdog error",
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- "RAM Chipkill ECC error",
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- "DEV Error",
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- "Link Data Error",
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- "Link Protocol Error",
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- "NB Array Error",
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- "DRAM Parity Error",
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- "Link Retry",
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- "Tablew Walk Data Error",
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- "L3 Cache Data Error",
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- "L3 Cache Tag Error",
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- "L3 Cache LRU Error"
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-};
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-static char *highbits[32] = {
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- [31] = "valid",
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- [30] = "error overflow (multiple errors)",
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- [29] = "error uncorrected",
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- [28] = "error enable",
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- [27] = "misc error valid",
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- [26] = "error address valid",
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- [25] = "processor context corrupt",
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- [24] = "res24",
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- [23] = "res23",
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- /* 22-15 ecc syndrome bits */
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- [14] = "corrected ecc error",
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- [13] = "uncorrected ecc error",
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- [12] = "res12",
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- [11] = "L3 subcache in error bit 1",
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- [10] = "L3 subcache in error bit 0",
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- [9] = "sublink or DRAM channel",
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- [8] = "error found by scrub",
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- /* 7-4 ht link number of error */
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- [3] = "err cpu3",
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- [2] = "err cpu2",
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- [1] = "err cpu1",
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- [0] = "err cpu0",
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-};
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-static char *k8threshold[] = {
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- [0 ... K8_MCELOG_THRESHOLD_DRAM_ECC - 1] = "Unknown threshold counter",
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- [K8_MCELOG_THRESHOLD_DRAM_ECC] = "MC4_MISC0 DRAM threshold",
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- [K8_MCELOG_THRESHOLD_LINK] = "MC4_MISC1 Link threshold",
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- [K8_MCELOG_THRESHOLD_L3_CACHE] = "MC4_MISC2 L3 Cache threshold",
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- [K8_MCELOG_THRESHOLD_FBDIMM] = "MC4_MISC3 FBDIMM threshold",
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- [K8_MCELOG_THRESHOLD_FBDIMM + 1 ...
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- K8_MCE_THRESHOLD_TOP - K8_MCE_THRESHOLD_BASE - 1] =
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- "Unknown threshold counter",
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-};
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-
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-
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-static void decode_k8_generic_errcode(u64 status)
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-{
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- unsigned short errcode = status & 0xffff;
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- int i;
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-
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- for (i=0; i<32; i++) {
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- if (i==31 || i==28 || i==26)
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- continue;
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- if (highbits[i] && (status & (1ULL<<(i+32)))) {
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- Wprintf( " bit%d = %s\n", i+32, highbits[i]);
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- }
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- }
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-
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- if ((errcode & 0xFFF0) == 0x0010) {
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- Wprintf( " TLB error '%s transaction, level %s'\n",
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- transaction[(errcode >> 2) & 3],
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- cachelevel[errcode & 3]);
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- }
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- else if ((errcode & 0xFF00) == 0x0100) {
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- Wprintf( " memory/cache error '%s mem transaction, %s transaction, level %s'\n",
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- memtrans[(errcode >> 4) & 0xf],
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- transaction[(errcode >> 2) & 3],
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- cachelevel[errcode & 3]);
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- }
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- else if ((errcode & 0xF800) == 0x0800) {
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- Wprintf( " bus error '%s, %s\n %s mem transaction\n %s access, level %s'\n",
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- partproc[(errcode >> 9) & 0x3],
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- timeout[(errcode >> 8) & 1],
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- memtrans[(errcode >> 4) & 0xf],
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- memoryio[(errcode >> 2) & 0x3],
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- cachelevel[(errcode & 0x3)]);
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- }
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-}
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-
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-static void decode_k8_dc_mc(u64 status, int *err)
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-{
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- unsigned short exterrcode = (status >> 16) & 0x0f;
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- unsigned short errcode = status & 0xffff;
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-
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- if(status&(3ULL<<45)) {
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- Wprintf( " Data cache ECC error (syndrome %x)",
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- (u32) (status >> 47) & 0xff);
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- if(status&(1ULL<<40)) {
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- Wprintf(" found by scrubber");
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- }
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- Wprintf("\n");
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- }
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-
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- if ((errcode & 0xFFF0) == 0x0010) {
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- Wprintf( " TLB parity error in %s array\n",
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- (exterrcode == 0) ? "physical" : "virtual");
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- }
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-
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- decode_k8_generic_errcode(status);
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-}
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-
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-static void decode_k8_ic_mc(u64 status, int *err)
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-{
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- unsigned short exterrcode = (status >> 16) & 0x0f;
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- unsigned short errcode = status & 0xffff;
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-
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- if(status&(3ULL<<45)) {
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- Wprintf(" Instruction cache ECC error\n");
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- }
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-
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- if ((errcode & 0xFFF0) == 0x0010) {
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- Wprintf(" TLB parity error in %s array\n",
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- (exterrcode == 0) ? "physical" : "virtual");
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- }
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-
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- decode_k8_generic_errcode(status);
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-}
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-
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-static void decode_k8_bu_mc(u64 status, int *err)
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-{
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- unsigned short exterrcode = (status >> 16) & 0x0f;
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-
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- if(status&(3ULL<<45)) {
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- Wprintf(" L2 cache ECC error\n");
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- }
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-
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- Wprintf(" %s array error\n",
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- (exterrcode == 0) ? "Bus or cache" : "Cache tag");
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-
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- decode_k8_generic_errcode(status);
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-}
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-
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-static void decode_k8_ls_mc(u64 status, int *err)
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-{
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- decode_k8_generic_errcode(status);
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-}
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-
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-static void decode_k8_nb_mc(u64 status, int *memerr)
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-{
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- unsigned short exterrcode = (status >> 16) & 0x0f;
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-
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- Wprintf(" Northbridge %s\n", nbextendederr[exterrcode]);
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-
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- switch (exterrcode) {
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- case 0:
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- *memerr = 1;
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- Wprintf(" ECC syndrome = %x\n",
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- (u32) (status >> 47) & 0xff);
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- break;
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- case 8:
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- *memerr = 1;
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- Wprintf(" Chipkill ECC syndrome = %x\n",
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- (u32) ((((status >> 24) & 0xff) << 8) | ((status >> 47) & 0xff)));
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- break;
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- case 1:
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- case 2:
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- case 3:
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- case 4:
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- case 6:
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- Wprintf(" link number = %x\n",
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- (u32) (status >> 36) & 0xf);
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- break;
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- }
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-
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- decode_k8_generic_errcode(status);
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-}
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-
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-static void decode_k8_fr_mc(u64 status, int *err)
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-{
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- decode_k8_generic_errcode(status);
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-}
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-
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-static void decode_k8_threshold(u64 misc)
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-{
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- if (misc & MCI_THRESHOLD_OVER)
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- Wprintf(" Threshold error count overflow\n");
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-}
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-
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-typedef void (*decoder_t)(u64, int *ismemerr);
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-
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-static decoder_t decoders[] = {
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- [0] = decode_k8_dc_mc,
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- [1] = decode_k8_ic_mc,
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- [2] = decode_k8_bu_mc,
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- [3] = decode_k8_ls_mc,
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- [4] = decode_k8_nb_mc,
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- [5] = decode_k8_fr_mc,
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-};
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-
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-void decode_k8_mc(struct mce *mce, int *ismemerr)
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-{
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- if (mce->bank < NELE(decoders))
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- decoders[mce->bank](mce->status, ismemerr);
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- else if (mce->bank >= K8_MCE_THRESHOLD_BASE &&
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- mce->bank < K8_MCE_THRESHOLD_TOP)
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- decode_k8_threshold(mce->misc);
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- else
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- Wprintf(" no decoder for unknown bank %u\n", mce->bank);
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-}
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-
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-char *k8_bank_name(unsigned num)
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-{
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- static char buf[64];
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- char *s = "unknown";
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- if (num < NELE(k8bank))
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- s = k8bank[num];
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- else if (num >= K8_MCE_THRESHOLD_BASE &&
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- num < K8_MCE_THRESHOLD_TOP)
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- s = k8threshold[num - K8_MCE_THRESHOLD_BASE];
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- buf[sizeof(buf)-1] = 0;
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- snprintf(buf, sizeof(buf) - 1, "%u %s", num, s);
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- return buf;
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-}
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-
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-int mce_filter_k8(struct mce *m)
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-{
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- /* Filter out GART errors */
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- if (m->bank == 4) {
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- unsigned short exterrcode = (m->status >> 16) & 0x0f;
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- if (exterrcode == 5 && (m->status & (1ULL<<61)))
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- return 0;
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- }
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- return 1;
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-}
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--- /dev/null 1970-01-01 00:00:00.000000000 +0000
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+++ mcelog-1.64+git20190805.e53631f/amd.c 2019-09-06 14:09:39.241237130 +0200
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--- /dev/null
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+++ b/amd.c
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@@ -0,0 +1,282 @@
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+/* Based on K8 decoding code written for the 2.4 kernel by Andi Kleen and
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+ * Eric Morton. Hacked and extended for mcelog by AK.
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@ -596,22 +314,8 @@ Signed-off-by: Borislav Petkov <bp@suse.de>
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+ }
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+ return 1;
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+}
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--- mcelog-1.64+git20190805.e53631f.orig/k8.h 2019-09-06 14:06:51.681228181 +0200
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+++ /dev/null 1970-01-01 00:00:00.000000000 +0000
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@@ -1,11 +0,0 @@
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-char *k8_bank_name(unsigned num);
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-void decode_k8_mc(struct mce *mce, int *ismemerr);
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-int mce_filter_k8(struct mce *m);
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-
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-#define K8_MCE_THRESHOLD_BASE (MCE_EXTENDED_BANK + 1) /* MCE_AMD */
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-#define K8_MCE_THRESHOLD_TOP (K8_MCE_THRESHOLD_BASE + 6 * 9)
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-
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-#define K8_MCELOG_THRESHOLD_DRAM_ECC (4 * 9 + 0)
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-#define K8_MCELOG_THRESHOLD_LINK (4 * 9 + 1)
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-#define K8_MCELOG_THRESHOLD_L3_CACHE (4 * 9 + 2)
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-#define K8_MCELOG_THRESHOLD_FBDIMM (4 * 9 + 3)
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--- /dev/null 1970-01-01 00:00:00.000000000 +0000
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+++ mcelog-1.64+git20190805.e53631f/amd.h 2019-09-06 14:09:39.245237130 +0200
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--- /dev/null
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+++ b/amd.h
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@@ -0,0 +1,14 @@
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+char *k8_bank_name(unsigned num);
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+void decode_amd_mc(enum cputype, struct mce *mce, int *ismemerr);
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@ -627,8 +331,306 @@ Signed-off-by: Borislav Petkov <bp@suse.de>
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+
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+#define CASE_AMD_CPUS \
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+ case CPU_K8
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--- mcelog-1.64+git20190805.e53631f.orig/mcelog.c 2019-09-06 14:06:56.229228424 +0200
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+++ mcelog-1.64+git20190805.e53631f/mcelog.c 2019-09-06 14:09:39.245237130 +0200
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--- a/k8.c
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+++ /dev/null
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@@ -1,281 +0,0 @@
|
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-/* Based on K8 decoding code written for the 2.4 kernel by Andi Kleen and
|
||||
- * Eric Morton. Hacked and extended for mcelog by AK.
|
||||
- *
|
||||
- * Original copyright:
|
||||
- * K8 parts Copyright 2002,2003 Andi Kleen, SuSE Labs.
|
||||
- * Additional K8 decoding and simplification Copyright 2003 Eric Morton, Newisys Inc
|
||||
- * K8 threshold counters decoding Copyright 2005,2006 Jacob Shin, AMD Inc.
|
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- *
|
||||
- * Subject to the GNU General Public License
|
||||
- */
|
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-
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-#include <stdio.h>
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-#include "mcelog.h"
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-#include "k8.h"
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-
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-static char *k8bank[] = {
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- "data cache",
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- "instruction cache",
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- "bus unit",
|
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- "load/store unit",
|
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- "northbridge",
|
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- "fixed-issue reoder"
|
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-};
|
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-static char *transaction[] = {
|
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- "instruction", "data", "generic", "reserved"
|
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-};
|
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-static char *cachelevel[] = {
|
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- "0", "1", "2", "generic"
|
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-};
|
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-static char *memtrans[] = {
|
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- "generic error", "generic read", "generic write", "data read",
|
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- "data write", "instruction fetch", "prefetch", "evict", "snoop",
|
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- "?", "?", "?", "?", "?", "?", "?"
|
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-};
|
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-static char *partproc[] = {
|
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- "local node origin", "local node response",
|
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- "local node observed", "generic participation"
|
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-};
|
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-static char *timeout[] = {
|
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- "request didn't time out",
|
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- "request timed out"
|
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-};
|
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-static char *memoryio[] = {
|
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- "memory", "res.", "i/o", "generic"
|
||||
-};
|
||||
-static char *nbextendederr[] = {
|
||||
- "RAM ECC error",
|
||||
- "CRC error",
|
||||
- "Sync error",
|
||||
- "Master abort",
|
||||
- "Target abort",
|
||||
- "GART error",
|
||||
- "RMW error",
|
||||
- "Watchdog error",
|
||||
- "RAM Chipkill ECC error",
|
||||
- "DEV Error",
|
||||
- "Link Data Error",
|
||||
- "Link Protocol Error",
|
||||
- "NB Array Error",
|
||||
- "DRAM Parity Error",
|
||||
- "Link Retry",
|
||||
- "Tablew Walk Data Error",
|
||||
- "L3 Cache Data Error",
|
||||
- "L3 Cache Tag Error",
|
||||
- "L3 Cache LRU Error"
|
||||
-};
|
||||
-static char *highbits[32] = {
|
||||
- [31] = "valid",
|
||||
- [30] = "error overflow (multiple errors)",
|
||||
- [29] = "error uncorrected",
|
||||
- [28] = "error enable",
|
||||
- [27] = "misc error valid",
|
||||
- [26] = "error address valid",
|
||||
- [25] = "processor context corrupt",
|
||||
- [24] = "res24",
|
||||
- [23] = "res23",
|
||||
- /* 22-15 ecc syndrome bits */
|
||||
- [14] = "corrected ecc error",
|
||||
- [13] = "uncorrected ecc error",
|
||||
- [12] = "res12",
|
||||
- [11] = "L3 subcache in error bit 1",
|
||||
- [10] = "L3 subcache in error bit 0",
|
||||
- [9] = "sublink or DRAM channel",
|
||||
- [8] = "error found by scrub",
|
||||
- /* 7-4 ht link number of error */
|
||||
- [3] = "err cpu3",
|
||||
- [2] = "err cpu2",
|
||||
- [1] = "err cpu1",
|
||||
- [0] = "err cpu0",
|
||||
-};
|
||||
-static char *k8threshold[] = {
|
||||
- [0 ... K8_MCELOG_THRESHOLD_DRAM_ECC - 1] = "Unknown threshold counter",
|
||||
- [K8_MCELOG_THRESHOLD_DRAM_ECC] = "MC4_MISC0 DRAM threshold",
|
||||
- [K8_MCELOG_THRESHOLD_LINK] = "MC4_MISC1 Link threshold",
|
||||
- [K8_MCELOG_THRESHOLD_L3_CACHE] = "MC4_MISC2 L3 Cache threshold",
|
||||
- [K8_MCELOG_THRESHOLD_FBDIMM] = "MC4_MISC3 FBDIMM threshold",
|
||||
- [K8_MCELOG_THRESHOLD_FBDIMM + 1 ...
|
||||
- K8_MCE_THRESHOLD_TOP - K8_MCE_THRESHOLD_BASE - 1] =
|
||||
- "Unknown threshold counter",
|
||||
-};
|
||||
-
|
||||
-
|
||||
-static void decode_k8_generic_errcode(u64 status)
|
||||
-{
|
||||
- unsigned short errcode = status & 0xffff;
|
||||
- int i;
|
||||
-
|
||||
- for (i=0; i<32; i++) {
|
||||
- if (i==31 || i==28 || i==26)
|
||||
- continue;
|
||||
- if (highbits[i] && (status & (1ULL<<(i+32)))) {
|
||||
- Wprintf( " bit%d = %s\n", i+32, highbits[i]);
|
||||
- }
|
||||
- }
|
||||
-
|
||||
- if ((errcode & 0xFFF0) == 0x0010) {
|
||||
- Wprintf( " TLB error '%s transaction, level %s'\n",
|
||||
- transaction[(errcode >> 2) & 3],
|
||||
- cachelevel[errcode & 3]);
|
||||
- }
|
||||
- else if ((errcode & 0xFF00) == 0x0100) {
|
||||
- Wprintf( " memory/cache error '%s mem transaction, %s transaction, level %s'\n",
|
||||
- memtrans[(errcode >> 4) & 0xf],
|
||||
- transaction[(errcode >> 2) & 3],
|
||||
- cachelevel[errcode & 3]);
|
||||
- }
|
||||
- else if ((errcode & 0xF800) == 0x0800) {
|
||||
- Wprintf( " bus error '%s, %s\n %s mem transaction\n %s access, level %s'\n",
|
||||
- partproc[(errcode >> 9) & 0x3],
|
||||
- timeout[(errcode >> 8) & 1],
|
||||
- memtrans[(errcode >> 4) & 0xf],
|
||||
- memoryio[(errcode >> 2) & 0x3],
|
||||
- cachelevel[(errcode & 0x3)]);
|
||||
- }
|
||||
-}
|
||||
-
|
||||
-static void decode_k8_dc_mc(u64 status, int *err)
|
||||
-{
|
||||
- unsigned short exterrcode = (status >> 16) & 0x0f;
|
||||
- unsigned short errcode = status & 0xffff;
|
||||
-
|
||||
- if(status&(3ULL<<45)) {
|
||||
- Wprintf( " Data cache ECC error (syndrome %x)",
|
||||
- (u32) (status >> 47) & 0xff);
|
||||
- if(status&(1ULL<<40)) {
|
||||
- Wprintf(" found by scrubber");
|
||||
- }
|
||||
- Wprintf("\n");
|
||||
- }
|
||||
-
|
||||
- if ((errcode & 0xFFF0) == 0x0010) {
|
||||
- Wprintf( " TLB parity error in %s array\n",
|
||||
- (exterrcode == 0) ? "physical" : "virtual");
|
||||
- }
|
||||
-
|
||||
- decode_k8_generic_errcode(status);
|
||||
-}
|
||||
-
|
||||
-static void decode_k8_ic_mc(u64 status, int *err)
|
||||
-{
|
||||
- unsigned short exterrcode = (status >> 16) & 0x0f;
|
||||
- unsigned short errcode = status & 0xffff;
|
||||
-
|
||||
- if(status&(3ULL<<45)) {
|
||||
- Wprintf(" Instruction cache ECC error\n");
|
||||
- }
|
||||
-
|
||||
- if ((errcode & 0xFFF0) == 0x0010) {
|
||||
- Wprintf(" TLB parity error in %s array\n",
|
||||
- (exterrcode == 0) ? "physical" : "virtual");
|
||||
- }
|
||||
-
|
||||
- decode_k8_generic_errcode(status);
|
||||
-}
|
||||
-
|
||||
-static void decode_k8_bu_mc(u64 status, int *err)
|
||||
-{
|
||||
- unsigned short exterrcode = (status >> 16) & 0x0f;
|
||||
-
|
||||
- if(status&(3ULL<<45)) {
|
||||
- Wprintf(" L2 cache ECC error\n");
|
||||
- }
|
||||
-
|
||||
- Wprintf(" %s array error\n",
|
||||
- (exterrcode == 0) ? "Bus or cache" : "Cache tag");
|
||||
-
|
||||
- decode_k8_generic_errcode(status);
|
||||
-}
|
||||
-
|
||||
-static void decode_k8_ls_mc(u64 status, int *err)
|
||||
-{
|
||||
- decode_k8_generic_errcode(status);
|
||||
-}
|
||||
-
|
||||
-static void decode_k8_nb_mc(u64 status, int *memerr)
|
||||
-{
|
||||
- unsigned short exterrcode = (status >> 16) & 0x0f;
|
||||
-
|
||||
- Wprintf(" Northbridge %s\n", nbextendederr[exterrcode]);
|
||||
-
|
||||
- switch (exterrcode) {
|
||||
- case 0:
|
||||
- *memerr = 1;
|
||||
- Wprintf(" ECC syndrome = %x\n",
|
||||
- (u32) (status >> 47) & 0xff);
|
||||
- break;
|
||||
- case 8:
|
||||
- *memerr = 1;
|
||||
- Wprintf(" Chipkill ECC syndrome = %x\n",
|
||||
- (u32) ((((status >> 24) & 0xff) << 8) | ((status >> 47) & 0xff)));
|
||||
- break;
|
||||
- case 1:
|
||||
- case 2:
|
||||
- case 3:
|
||||
- case 4:
|
||||
- case 6:
|
||||
- Wprintf(" link number = %x\n",
|
||||
- (u32) (status >> 36) & 0xf);
|
||||
- break;
|
||||
- }
|
||||
-
|
||||
- decode_k8_generic_errcode(status);
|
||||
-}
|
||||
-
|
||||
-static void decode_k8_fr_mc(u64 status, int *err)
|
||||
-{
|
||||
- decode_k8_generic_errcode(status);
|
||||
-}
|
||||
-
|
||||
-static void decode_k8_threshold(u64 misc)
|
||||
-{
|
||||
- if (misc & MCI_THRESHOLD_OVER)
|
||||
- Wprintf(" Threshold error count overflow\n");
|
||||
-}
|
||||
-
|
||||
-typedef void (*decoder_t)(u64, int *ismemerr);
|
||||
-
|
||||
-static decoder_t decoders[] = {
|
||||
- [0] = decode_k8_dc_mc,
|
||||
- [1] = decode_k8_ic_mc,
|
||||
- [2] = decode_k8_bu_mc,
|
||||
- [3] = decode_k8_ls_mc,
|
||||
- [4] = decode_k8_nb_mc,
|
||||
- [5] = decode_k8_fr_mc,
|
||||
-};
|
||||
-
|
||||
-void decode_k8_mc(struct mce *mce, int *ismemerr)
|
||||
-{
|
||||
- if (mce->bank < NELE(decoders))
|
||||
- decoders[mce->bank](mce->status, ismemerr);
|
||||
- else if (mce->bank >= K8_MCE_THRESHOLD_BASE &&
|
||||
- mce->bank < K8_MCE_THRESHOLD_TOP)
|
||||
- decode_k8_threshold(mce->misc);
|
||||
- else
|
||||
- Wprintf(" no decoder for unknown bank %u\n", mce->bank);
|
||||
-}
|
||||
-
|
||||
-char *k8_bank_name(unsigned num)
|
||||
-{
|
||||
- static char buf[64];
|
||||
- char *s = "unknown";
|
||||
- if (num < NELE(k8bank))
|
||||
- s = k8bank[num];
|
||||
- else if (num >= K8_MCE_THRESHOLD_BASE &&
|
||||
- num < K8_MCE_THRESHOLD_TOP)
|
||||
- s = k8threshold[num - K8_MCE_THRESHOLD_BASE];
|
||||
- buf[sizeof(buf)-1] = 0;
|
||||
- snprintf(buf, sizeof(buf) - 1, "%u %s", num, s);
|
||||
- return buf;
|
||||
-}
|
||||
-
|
||||
-int mce_filter_k8(struct mce *m)
|
||||
-{
|
||||
- /* Filter out GART errors */
|
||||
- if (m->bank == 4) {
|
||||
- unsigned short exterrcode = (m->status >> 16) & 0x0f;
|
||||
- if (exterrcode == 5 && (m->status & (1ULL<<61)))
|
||||
- return 0;
|
||||
- }
|
||||
- return 1;
|
||||
-}
|
||||
--- a/k8.h
|
||||
+++ /dev/null
|
||||
@@ -1,11 +0,0 @@
|
||||
-char *k8_bank_name(unsigned num);
|
||||
-void decode_k8_mc(struct mce *mce, int *ismemerr);
|
||||
-int mce_filter_k8(struct mce *m);
|
||||
-
|
||||
-#define K8_MCE_THRESHOLD_BASE (MCE_EXTENDED_BANK + 1) /* MCE_AMD */
|
||||
-#define K8_MCE_THRESHOLD_TOP (K8_MCE_THRESHOLD_BASE + 6 * 9)
|
||||
-
|
||||
-#define K8_MCELOG_THRESHOLD_DRAM_ECC (4 * 9 + 0)
|
||||
-#define K8_MCELOG_THRESHOLD_LINK (4 * 9 + 1)
|
||||
-#define K8_MCELOG_THRESHOLD_L3_CACHE (4 * 9 + 2)
|
||||
-#define K8_MCELOG_THRESHOLD_FBDIMM (4 * 9 + 3)
|
||||
--- a/mcelog.c
|
||||
+++ b/mcelog.c
|
||||
@@ -41,7 +41,7 @@
|
||||
#include <fnmatch.h>
|
||||
#include "mcelog.h"
|
||||
@ -638,7 +640,7 @@ Signed-off-by: Borislav Petkov <bp@suse.de>
|
||||
#include "intel.h"
|
||||
#include "p4.h"
|
||||
#include "dmi.h"
|
||||
@@ -430,9 +430,9 @@
|
||||
@@ -451,9 +451,9 @@
|
||||
time_t t = m->time;
|
||||
Wprintf("TIME %llu %s", m->time, ctime(&t));
|
||||
}
|
||||
|
4
_service
4
_service
@ -3,8 +3,8 @@
|
||||
<param name="scm">git</param>
|
||||
<param name="url">git://git.kernel.org/pub/scm/utils/cpu/mce/mcelog.git</param>
|
||||
<param name="changesgenerate">enable</param>
|
||||
<param name="revision">v173</param>
|
||||
<param name="versionformat">173</param>
|
||||
<param name="revision">v175</param>
|
||||
<param name="versionformat">175</param>
|
||||
</service>
|
||||
<service name="recompress" mode="disabled">
|
||||
<param name="file">mcelog*.tar</param>
|
||||
|
@ -3,4 +3,4 @@
|
||||
<param name="url">https://github.com/andikleen/mcelog</param>
|
||||
<param name="changesrevision">ee90ff20ce6a4d5e016aa249ce8b37f359f9fda4</param></service><service name="tar_scm">
|
||||
<param name="url">git://git.kernel.org/pub/scm/utils/cpu/mce/mcelog.git</param>
|
||||
<param name="changesrevision">2e923ddb0b39726f913ca929219ff5c477646e36</param></service></servicedata>
|
||||
<param name="changesrevision">7b776a8c005b60572f49797e81287540f99fff1f</param></service></servicedata>
|
@ -1,8 +1,15 @@
|
||||
Add F10h decoding support
|
||||
|
||||
Signed-off-by: Borislav Petkov <bp@suse.de>
|
||||
--- mcelog-1.64+git20190805.e53631f.orig/amd.c 2019-09-06 14:09:39.241237130 +0200
|
||||
+++ mcelog-1.64+git20190805.e53631f/amd.c 2019-09-06 14:09:42.485237303 +0200
|
||||
---
|
||||
amd.c | 488 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++----
|
||||
amd.h | 42 ++++-
|
||||
mcelog.c | 26 +--
|
||||
mcelog.h | 1
|
||||
4 files changed, 506 insertions(+), 51 deletions(-)
|
||||
|
||||
--- a/amd.c
|
||||
+++ b/amd.c
|
||||
@@ -14,7 +14,7 @@
|
||||
#include "mcelog.h"
|
||||
#include "amd.h"
|
||||
@ -552,8 +559,8 @@ Signed-off-by: Borislav Petkov <bp@suse.de>
|
||||
+ }
|
||||
+ return 1;
|
||||
}
|
||||
--- mcelog-1.64+git20190805.e53631f.orig/amd.h 2019-09-06 14:09:40.217237182 +0200
|
||||
+++ mcelog-1.64+git20190805.e53631f/amd.h 2019-09-06 14:09:42.485237303 +0200
|
||||
--- a/amd.h
|
||||
+++ b/amd.h
|
||||
@@ -1,6 +1,25 @@
|
||||
+#include <stdbool.h>
|
||||
+
|
||||
@ -628,19 +635,9 @@ Signed-off-by: Borislav Petkov <bp@suse.de>
|
||||
+#define CASE_AMD_CPUS \
|
||||
+ case CPU_K8: \
|
||||
+ case CPU_F10H
|
||||
--- mcelog-1.64+git20190805.e53631f.orig/mcelog.h 2019-09-06 14:06:56.229228424 +0200
|
||||
+++ mcelog-1.64+git20190805.e53631f/mcelog.h 2019-09-06 14:09:42.485237303 +0200
|
||||
@@ -117,6 +117,7 @@
|
||||
CPU_P6OLD,
|
||||
CPU_CORE2, /* 65nm and 45nm */
|
||||
CPU_K8,
|
||||
+ CPU_F10H,
|
||||
CPU_P4,
|
||||
CPU_NEHALEM,
|
||||
CPU_DUNNINGTON,
|
||||
--- mcelog-1.64+git20190805.e53631f.orig/mcelog.c 2019-09-06 14:09:39.245237130 +0200
|
||||
+++ mcelog-1.64+git20190805.e53631f/mcelog.c 2019-09-06 14:09:42.485237303 +0200
|
||||
@@ -147,19 +147,20 @@
|
||||
--- a/mcelog.c
|
||||
+++ b/mcelog.c
|
||||
@@ -148,19 +148,20 @@
|
||||
|
||||
static int mce_filter(struct mce *m, unsigned recordlen)
|
||||
{
|
||||
@ -665,7 +662,7 @@ Signed-off-by: Borislav Petkov <bp@suse.de>
|
||||
}
|
||||
|
||||
static void print_tsc(int cpunum, __u64 tsc, unsigned long time)
|
||||
@@ -226,6 +227,7 @@
|
||||
@@ -228,6 +229,7 @@
|
||||
[CPU_P6OLD] = "Intel PPro/P2/P3/old Xeon",
|
||||
[CPU_CORE2] = "Intel Core", /* 65nm and 45nm */
|
||||
[CPU_K8] = "AMD K8 and derivates",
|
||||
@ -673,7 +670,7 @@ Signed-off-by: Borislav Petkov <bp@suse.de>
|
||||
[CPU_P4] = "Intel P4",
|
||||
[CPU_NEHALEM] = "Intel Xeon 5500 series / Core i3/5/7 (\"Nehalem/Westmere\")",
|
||||
[CPU_DUNNINGTON] = "Intel Xeon 7400 series",
|
||||
@@ -256,6 +258,7 @@
|
||||
@@ -267,6 +269,7 @@
|
||||
{ "p6old", CPU_P6OLD },
|
||||
{ "core2", CPU_CORE2 },
|
||||
{ "k8", CPU_K8 },
|
||||
@ -681,7 +678,7 @@ Signed-off-by: Borislav Petkov <bp@suse.de>
|
||||
{ "p4", CPU_P4 },
|
||||
{ "dunnington", CPU_DUNNINGTON },
|
||||
{ "xeon74xx", CPU_DUNNINGTON },
|
||||
@@ -367,9 +370,7 @@
|
||||
@@ -388,9 +391,7 @@
|
||||
case X86_VENDOR_INTEL:
|
||||
return select_intel_cputype(family, model);
|
||||
case X86_VENDOR_AMD:
|
||||
@ -692,7 +689,7 @@ Signed-off-by: Borislav Petkov <bp@suse.de>
|
||||
default:
|
||||
Eprintf("Unknown CPU type vendor %u family %u model %u",
|
||||
cpuvendor, family, model);
|
||||
@@ -552,14 +553,9 @@
|
||||
@@ -579,14 +580,9 @@
|
||||
|
||||
}
|
||||
if (seen == ALL) {
|
||||
@ -710,3 +707,13 @@ Signed-off-by: Borislav Petkov <bp@suse.de>
|
||||
Eprintf("ERROR: Hygon Processor family %d: mcelog does not support this processor. Please use the edac_mce_amd module instead.\n", family);
|
||||
return 0;
|
||||
} else if (!strcmp(vendor,"GenuineIntel"))
|
||||
--- a/mcelog.h
|
||||
+++ b/mcelog.h
|
||||
@@ -119,6 +119,7 @@
|
||||
CPU_P6OLD,
|
||||
CPU_CORE2, /* 65nm and 45nm */
|
||||
CPU_K8,
|
||||
+ CPU_F10H,
|
||||
CPU_P4,
|
||||
CPU_NEHALEM,
|
||||
CPU_DUNNINGTON,
|
||||
|
@ -1,11 +1,16 @@
|
||||
Add F11h decoding support
|
||||
|
||||
Signed-off-by: Borislav Petkov <bp@suse.de>
|
||||
Index: mcelog-1.60/amd.c
|
||||
===================================================================
|
||||
--- mcelog-1.60.orig/amd.c 2018-09-24 15:15:05.902689347 +0200
|
||||
+++ mcelog-1.60/amd.c 2018-09-24 15:15:10.454960116 +0200
|
||||
@@ -155,6 +155,8 @@ enum cputype select_amd_cputype(u32 fami
|
||||
---
|
||||
amd.c | 21 +++++++++++++++++++++
|
||||
amd.h | 3 ++-
|
||||
mcelog.c | 2 ++
|
||||
mcelog.h | 1 +
|
||||
4 files changed, 26 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/amd.c
|
||||
+++ b/amd.c
|
||||
@@ -155,6 +155,8 @@
|
||||
return CPU_K8;
|
||||
case 0x10:
|
||||
return CPU_F10H;
|
||||
@ -14,7 +19,7 @@ Index: mcelog-1.60/amd.c
|
||||
default:
|
||||
break;
|
||||
}
|
||||
@@ -367,6 +369,16 @@ static bool f10h_mc0_mce(u16 ec, u8 xec)
|
||||
@@ -367,6 +369,16 @@
|
||||
return f12h_mc0_mce(ec, xec);
|
||||
}
|
||||
|
||||
@ -31,7 +36,7 @@ Index: mcelog-1.60/amd.c
|
||||
static void decode_mc0_mce(struct amd_decoder_ops *ops, struct mce *m)
|
||||
{
|
||||
u16 ec = EC(m->status);
|
||||
@@ -630,6 +642,12 @@ struct amd_decoder_ops fam_ops[] = {
|
||||
@@ -630,6 +642,12 @@
|
||||
.mc1_mce = k8_mc1_mce,
|
||||
.mc2_mce = k8_mc2_mce,
|
||||
},
|
||||
@ -44,7 +49,7 @@ Index: mcelog-1.60/amd.c
|
||||
};
|
||||
|
||||
static void __decode_amd_mc(enum cputype cpu, struct mce *mce)
|
||||
@@ -640,6 +658,9 @@ static void __decode_amd_mc(enum cputype
|
||||
@@ -640,6 +658,9 @@
|
||||
case CPU_F10H:
|
||||
ops = &fam_ops[AMD_F10H];
|
||||
break;
|
||||
@ -54,34 +59,18 @@ Index: mcelog-1.60/amd.c
|
||||
default:
|
||||
Eprintf("Huh? What family is it: 0x%x?!\n", cpu);
|
||||
return;
|
||||
Index: mcelog-1.60/amd.h
|
||||
===================================================================
|
||||
--- mcelog-1.60.orig/amd.h 2018-09-24 15:15:05.902689347 +0200
|
||||
+++ mcelog-1.60/amd.h 2018-09-24 15:15:10.454960116 +0200
|
||||
@@ -93,4 +93,5 @@ enum rrrr_ids {
|
||||
--- a/amd.h
|
||||
+++ b/amd.h
|
||||
@@ -93,4 +93,5 @@
|
||||
|
||||
#define CASE_AMD_CPUS \
|
||||
case CPU_K8: \
|
||||
- case CPU_F10H
|
||||
+ case CPU_F10H: \
|
||||
+ case CPU_F11H
|
||||
Index: mcelog-1.60/mcelog.h
|
||||
===================================================================
|
||||
--- mcelog-1.60.orig/mcelog.h 2018-09-24 15:15:05.902689347 +0200
|
||||
+++ mcelog-1.60/mcelog.h 2018-09-24 15:15:10.454960116 +0200
|
||||
@@ -118,6 +118,7 @@ enum cputype {
|
||||
CPU_CORE2, /* 65nm and 45nm */
|
||||
CPU_K8,
|
||||
CPU_F10H,
|
||||
+ CPU_F11H,
|
||||
CPU_P4,
|
||||
CPU_NEHALEM,
|
||||
CPU_DUNNINGTON,
|
||||
Index: mcelog-1.60/mcelog.c
|
||||
===================================================================
|
||||
--- mcelog-1.60.orig/mcelog.c 2018-09-24 15:15:05.906689585 +0200
|
||||
+++ mcelog-1.60/mcelog.c 2018-09-24 15:15:10.458960355 +0200
|
||||
@@ -228,6 +228,7 @@ static char *cputype_name[] = {
|
||||
--- a/mcelog.c
|
||||
+++ b/mcelog.c
|
||||
@@ -230,6 +230,7 @@
|
||||
[CPU_CORE2] = "Intel Core", /* 65nm and 45nm */
|
||||
[CPU_K8] = "AMD K8 and derivates",
|
||||
[CPU_F10H] = "AMD Greyhound",
|
||||
@ -89,7 +78,7 @@ Index: mcelog-1.60/mcelog.c
|
||||
[CPU_P4] = "Intel P4",
|
||||
[CPU_NEHALEM] = "Intel Xeon 5500 series / Core i3/5/7 (\"Nehalem/Westmere\")",
|
||||
[CPU_DUNNINGTON] = "Intel Xeon 7400 series",
|
||||
@@ -258,6 +259,7 @@ static struct config_choice cpu_choices[
|
||||
@@ -270,6 +271,7 @@
|
||||
{ "core2", CPU_CORE2 },
|
||||
{ "k8", CPU_K8 },
|
||||
{ "f10h", CPU_F10H },
|
||||
@ -97,3 +86,13 @@ Index: mcelog-1.60/mcelog.c
|
||||
{ "p4", CPU_P4 },
|
||||
{ "dunnington", CPU_DUNNINGTON },
|
||||
{ "xeon74xx", CPU_DUNNINGTON },
|
||||
--- a/mcelog.h
|
||||
+++ b/mcelog.h
|
||||
@@ -120,6 +120,7 @@
|
||||
CPU_CORE2, /* 65nm and 45nm */
|
||||
CPU_K8,
|
||||
CPU_F10H,
|
||||
+ CPU_F11H,
|
||||
CPU_P4,
|
||||
CPU_NEHALEM,
|
||||
CPU_DUNNINGTON,
|
||||
|
@ -1,11 +1,16 @@
|
||||
Add F12h decoding support
|
||||
|
||||
Signed-off-by: Borislav Petkov <bp@suse.de>
|
||||
Index: mcelog-1.60/amd.c
|
||||
===================================================================
|
||||
--- mcelog-1.60.orig/amd.c 2018-09-24 15:15:10.454960116 +0200
|
||||
+++ mcelog-1.60/amd.c 2018-09-24 15:15:15.607266576 +0200
|
||||
@@ -157,6 +157,8 @@ enum cputype select_amd_cputype(u32 fami
|
||||
---
|
||||
amd.c | 11 +++++++++++
|
||||
amd.h | 4 +++-
|
||||
mcelog.c | 2 ++
|
||||
mcelog.h | 1 +
|
||||
4 files changed, 17 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/amd.c
|
||||
+++ b/amd.c
|
||||
@@ -157,6 +157,8 @@
|
||||
return CPU_F10H;
|
||||
case 0x11:
|
||||
return CPU_F11H;
|
||||
@ -14,7 +19,7 @@ Index: mcelog-1.60/amd.c
|
||||
default:
|
||||
break;
|
||||
}
|
||||
@@ -648,6 +650,12 @@ struct amd_decoder_ops fam_ops[] = {
|
||||
@@ -648,6 +650,12 @@
|
||||
.mc1_mce = k8_mc1_mce,
|
||||
.mc2_mce = k8_mc2_mce,
|
||||
},
|
||||
@ -27,7 +32,7 @@ Index: mcelog-1.60/amd.c
|
||||
};
|
||||
|
||||
static void __decode_amd_mc(enum cputype cpu, struct mce *mce)
|
||||
@@ -661,6 +669,9 @@ static void __decode_amd_mc(enum cputype
|
||||
@@ -661,6 +669,9 @@
|
||||
case CPU_F11H:
|
||||
ops = &fam_ops[AMD_F11H];
|
||||
break;
|
||||
@ -37,11 +42,9 @@ Index: mcelog-1.60/amd.c
|
||||
default:
|
||||
Eprintf("Huh? What family is it: 0x%x?!\n", cpu);
|
||||
return;
|
||||
Index: mcelog-1.60/amd.h
|
||||
===================================================================
|
||||
--- mcelog-1.60.orig/amd.h 2018-09-24 15:15:10.454960116 +0200
|
||||
+++ mcelog-1.60/amd.h 2018-09-24 15:15:15.607266576 +0200
|
||||
@@ -9,6 +9,7 @@ enum amdcpu {
|
||||
--- a/amd.h
|
||||
+++ b/amd.h
|
||||
@@ -9,6 +9,7 @@
|
||||
AMD_K8 = 0,
|
||||
AMD_F10H,
|
||||
AMD_F11H,
|
||||
@ -49,30 +52,16 @@ Index: mcelog-1.60/amd.h
|
||||
AMD_F14H,
|
||||
AMD_F15H,
|
||||
AMD_F16H,
|
||||
@@ -94,4 +95,5 @@ enum rrrr_ids {
|
||||
@@ -94,4 +95,5 @@
|
||||
#define CASE_AMD_CPUS \
|
||||
case CPU_K8: \
|
||||
case CPU_F10H: \
|
||||
- case CPU_F11H
|
||||
+ case CPU_F11H: \
|
||||
+ case CPU_F12H
|
||||
Index: mcelog-1.60/mcelog.h
|
||||
===================================================================
|
||||
--- mcelog-1.60.orig/mcelog.h 2018-09-24 15:15:10.454960116 +0200
|
||||
+++ mcelog-1.60/mcelog.h 2018-09-24 15:15:15.607266576 +0200
|
||||
@@ -119,6 +119,7 @@ enum cputype {
|
||||
CPU_K8,
|
||||
CPU_F10H,
|
||||
CPU_F11H,
|
||||
+ CPU_F12H,
|
||||
CPU_P4,
|
||||
CPU_NEHALEM,
|
||||
CPU_DUNNINGTON,
|
||||
Index: mcelog-1.60/mcelog.c
|
||||
===================================================================
|
||||
--- mcelog-1.60.orig/mcelog.c 2018-09-24 15:15:10.458960355 +0200
|
||||
+++ mcelog-1.60/mcelog.c 2018-09-24 15:15:15.611266814 +0200
|
||||
@@ -229,6 +229,7 @@ static char *cputype_name[] = {
|
||||
--- a/mcelog.c
|
||||
+++ b/mcelog.c
|
||||
@@ -231,6 +231,7 @@
|
||||
[CPU_K8] = "AMD K8 and derivates",
|
||||
[CPU_F10H] = "AMD Greyhound",
|
||||
[CPU_F11H] = "AMD Griffin",
|
||||
@ -80,7 +69,7 @@ Index: mcelog-1.60/mcelog.c
|
||||
[CPU_P4] = "Intel P4",
|
||||
[CPU_NEHALEM] = "Intel Xeon 5500 series / Core i3/5/7 (\"Nehalem/Westmere\")",
|
||||
[CPU_DUNNINGTON] = "Intel Xeon 7400 series",
|
||||
@@ -260,6 +261,7 @@ static struct config_choice cpu_choices[
|
||||
@@ -272,6 +273,7 @@
|
||||
{ "k8", CPU_K8 },
|
||||
{ "f10h", CPU_F10H },
|
||||
{ "f11h", CPU_F11H },
|
||||
@ -88,3 +77,13 @@ Index: mcelog-1.60/mcelog.c
|
||||
{ "p4", CPU_P4 },
|
||||
{ "dunnington", CPU_DUNNINGTON },
|
||||
{ "xeon74xx", CPU_DUNNINGTON },
|
||||
--- a/mcelog.h
|
||||
+++ b/mcelog.h
|
||||
@@ -121,6 +121,7 @@
|
||||
CPU_K8,
|
||||
CPU_F10H,
|
||||
CPU_F11H,
|
||||
+ CPU_F12H,
|
||||
CPU_P4,
|
||||
CPU_NEHALEM,
|
||||
CPU_DUNNINGTON,
|
||||
|
@ -1,11 +1,16 @@
|
||||
Add F14h decoding support
|
||||
|
||||
Signed-off-by: Borislav Petkov <bp@suse.de>
|
||||
Index: mcelog-1.60/amd.c
|
||||
===================================================================
|
||||
--- mcelog-1.60.orig/amd.c 2018-09-24 15:15:15.607266576 +0200
|
||||
+++ mcelog-1.60/amd.c 2018-09-24 15:15:19.007468820 +0200
|
||||
@@ -159,6 +159,8 @@ enum cputype select_amd_cputype(u32 fami
|
||||
---
|
||||
amd.c | 88 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
amd.h | 3 +-
|
||||
mcelog.c | 2 +
|
||||
mcelog.h | 1
|
||||
4 files changed, 93 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/amd.c
|
||||
+++ b/amd.c
|
||||
@@ -159,6 +159,8 @@
|
||||
return CPU_F11H;
|
||||
case 0x12:
|
||||
return CPU_F12H;
|
||||
@ -14,7 +19,7 @@ Index: mcelog-1.60/amd.c
|
||||
default:
|
||||
break;
|
||||
}
|
||||
@@ -381,6 +383,58 @@ static bool k8_mc0_mce(u16 ec, u8 xec)
|
||||
@@ -381,6 +383,58 @@
|
||||
return f10h_mc0_mce(ec, xec);
|
||||
}
|
||||
|
||||
@ -73,7 +78,7 @@ Index: mcelog-1.60/amd.c
|
||||
static void decode_mc0_mce(struct amd_decoder_ops *ops, struct mce *m)
|
||||
{
|
||||
u16 ec = EC(m->status);
|
||||
@@ -402,6 +456,31 @@ static void decode_mc0_mce(struct amd_de
|
||||
@@ -402,6 +456,31 @@
|
||||
Eprintf("Corrupted MC0 MCE info?\n");
|
||||
}
|
||||
|
||||
@ -105,7 +110,7 @@ Index: mcelog-1.60/amd.c
|
||||
static void decode_mc1_mce(struct amd_decoder_ops *ops, struct mce *m)
|
||||
{
|
||||
u16 ec = EC(m->status);
|
||||
@@ -656,6 +735,12 @@ struct amd_decoder_ops fam_ops[] = {
|
||||
@@ -656,6 +735,12 @@
|
||||
.mc1_mce = k8_mc1_mce,
|
||||
.mc2_mce = k8_mc2_mce,
|
||||
},
|
||||
@ -118,7 +123,7 @@ Index: mcelog-1.60/amd.c
|
||||
};
|
||||
|
||||
static void __decode_amd_mc(enum cputype cpu, struct mce *mce)
|
||||
@@ -672,6 +757,9 @@ static void __decode_amd_mc(enum cputype
|
||||
@@ -672,6 +757,9 @@
|
||||
case CPU_F12H:
|
||||
ops = &fam_ops[AMD_F12H];
|
||||
break;
|
||||
@ -128,34 +133,18 @@ Index: mcelog-1.60/amd.c
|
||||
default:
|
||||
Eprintf("Huh? What family is it: 0x%x?!\n", cpu);
|
||||
return;
|
||||
Index: mcelog-1.60/mcelog.h
|
||||
===================================================================
|
||||
--- mcelog-1.60.orig/mcelog.h 2018-09-24 15:15:15.607266576 +0200
|
||||
+++ mcelog-1.60/mcelog.h 2018-09-24 15:15:19.007468820 +0200
|
||||
@@ -120,6 +120,7 @@ enum cputype {
|
||||
CPU_F10H,
|
||||
CPU_F11H,
|
||||
CPU_F12H,
|
||||
+ CPU_F14H,
|
||||
CPU_P4,
|
||||
CPU_NEHALEM,
|
||||
CPU_DUNNINGTON,
|
||||
Index: mcelog-1.60/amd.h
|
||||
===================================================================
|
||||
--- mcelog-1.60.orig/amd.h 2018-09-24 15:15:15.607266576 +0200
|
||||
+++ mcelog-1.60/amd.h 2018-09-24 15:15:19.007468820 +0200
|
||||
@@ -96,4 +96,5 @@ enum rrrr_ids {
|
||||
--- a/amd.h
|
||||
+++ b/amd.h
|
||||
@@ -96,4 +96,5 @@
|
||||
case CPU_K8: \
|
||||
case CPU_F10H: \
|
||||
case CPU_F11H: \
|
||||
- case CPU_F12H
|
||||
+ case CPU_F12H: \
|
||||
+ case CPU_F14H
|
||||
Index: mcelog-1.60/mcelog.c
|
||||
===================================================================
|
||||
--- mcelog-1.60.orig/mcelog.c 2018-09-24 15:15:15.611266814 +0200
|
||||
+++ mcelog-1.60/mcelog.c 2018-09-24 15:15:19.011469058 +0200
|
||||
@@ -230,6 +230,7 @@ static char *cputype_name[] = {
|
||||
--- a/mcelog.c
|
||||
+++ b/mcelog.c
|
||||
@@ -232,6 +232,7 @@
|
||||
[CPU_F10H] = "AMD Greyhound",
|
||||
[CPU_F11H] = "AMD Griffin",
|
||||
[CPU_F12H] = "AMD Llano",
|
||||
@ -163,7 +152,7 @@ Index: mcelog-1.60/mcelog.c
|
||||
[CPU_P4] = "Intel P4",
|
||||
[CPU_NEHALEM] = "Intel Xeon 5500 series / Core i3/5/7 (\"Nehalem/Westmere\")",
|
||||
[CPU_DUNNINGTON] = "Intel Xeon 7400 series",
|
||||
@@ -262,6 +263,7 @@ static struct config_choice cpu_choices[
|
||||
@@ -274,6 +275,7 @@
|
||||
{ "f10h", CPU_F10H },
|
||||
{ "f11h", CPU_F11H },
|
||||
{ "f12h", CPU_F12H },
|
||||
@ -171,3 +160,13 @@ Index: mcelog-1.60/mcelog.c
|
||||
{ "p4", CPU_P4 },
|
||||
{ "dunnington", CPU_DUNNINGTON },
|
||||
{ "xeon74xx", CPU_DUNNINGTON },
|
||||
--- a/mcelog.h
|
||||
+++ b/mcelog.h
|
||||
@@ -122,6 +122,7 @@
|
||||
CPU_F10H,
|
||||
CPU_F11H,
|
||||
CPU_F12H,
|
||||
+ CPU_F14H,
|
||||
CPU_P4,
|
||||
CPU_NEHALEM,
|
||||
CPU_DUNNINGTON,
|
||||
|
@ -1,11 +1,16 @@
|
||||
Add F15h decoding support
|
||||
|
||||
Signed-off-by: Borislav Petkov <bp@suse.de>
|
||||
Index: mcelog-1.60/amd.c
|
||||
===================================================================
|
||||
--- mcelog-1.60.orig/amd.c 2018-09-24 15:15:19.007468820 +0200
|
||||
+++ mcelog-1.60/amd.c 2018-09-24 15:15:22.903700568 +0200
|
||||
@@ -72,6 +72,43 @@ static char *nbextendederr[] = {
|
||||
---
|
||||
amd.c | 160 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
amd.h | 3 -
|
||||
mcelog.c | 2
|
||||
mcelog.h | 1
|
||||
4 files changed, 165 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/amd.c
|
||||
+++ b/amd.c
|
||||
@@ -72,6 +72,43 @@
|
||||
"L3 Cache LRU Error"
|
||||
};
|
||||
|
||||
@ -49,7 +54,7 @@ Index: mcelog-1.60/amd.c
|
||||
static const char * const mc4_mce_desc[] = {
|
||||
"DRAM ECC error detected on the NB",
|
||||
"CRC error detected on HT link",
|
||||
@@ -161,6 +198,8 @@ enum cputype select_amd_cputype(u32 fami
|
||||
@@ -161,6 +198,8 @@
|
||||
return CPU_F12H;
|
||||
case 0x14:
|
||||
return CPU_F14H;
|
||||
@ -58,7 +63,7 @@ Index: mcelog-1.60/amd.c
|
||||
default:
|
||||
break;
|
||||
}
|
||||
@@ -435,6 +474,53 @@ static bool cat_mc0_mce(u16 ec, u8 xec)
|
||||
@@ -435,6 +474,53 @@
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -112,7 +117,7 @@ Index: mcelog-1.60/amd.c
|
||||
static void decode_mc0_mce(struct amd_decoder_ops *ops, struct mce *m)
|
||||
{
|
||||
u16 ec = EC(m->status);
|
||||
@@ -481,6 +567,36 @@ static bool cat_mc1_mce(u16 ec, u8 xec)
|
||||
@@ -481,6 +567,36 @@
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -149,7 +154,7 @@ Index: mcelog-1.60/amd.c
|
||||
static void decode_mc1_mce(struct amd_decoder_ops *ops, struct mce *m)
|
||||
{
|
||||
u16 ec = EC(m->status);
|
||||
@@ -537,6 +653,40 @@ static bool k8_mc2_mce(u16 ec, u8 xec)
|
||||
@@ -537,6 +653,40 @@
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -190,7 +195,7 @@ Index: mcelog-1.60/amd.c
|
||||
static void decode_mc2_mce(struct amd_decoder_ops *ops, struct mce *m)
|
||||
{
|
||||
u16 ec = EC(m->status);
|
||||
@@ -741,6 +891,12 @@ struct amd_decoder_ops fam_ops[] = {
|
||||
@@ -741,6 +891,12 @@
|
||||
.mc1_mce = cat_mc1_mce,
|
||||
.mc2_mce = k8_mc2_mce,
|
||||
},
|
||||
@ -203,7 +208,7 @@ Index: mcelog-1.60/amd.c
|
||||
};
|
||||
|
||||
static void __decode_amd_mc(enum cputype cpu, struct mce *mce)
|
||||
@@ -760,6 +916,10 @@ static void __decode_amd_mc(enum cputype
|
||||
@@ -760,6 +916,10 @@
|
||||
case CPU_F14H:
|
||||
ops = &fam_ops[AMD_F14H];
|
||||
break;
|
||||
@ -214,34 +219,18 @@ Index: mcelog-1.60/amd.c
|
||||
default:
|
||||
Eprintf("Huh? What family is it: 0x%x?!\n", cpu);
|
||||
return;
|
||||
Index: mcelog-1.60/mcelog.h
|
||||
===================================================================
|
||||
--- mcelog-1.60.orig/mcelog.h 2018-09-24 15:15:19.007468820 +0200
|
||||
+++ mcelog-1.60/mcelog.h 2018-09-24 15:15:22.907700806 +0200
|
||||
@@ -121,6 +121,7 @@ enum cputype {
|
||||
CPU_F11H,
|
||||
CPU_F12H,
|
||||
CPU_F14H,
|
||||
+ CPU_F15H,
|
||||
CPU_P4,
|
||||
CPU_NEHALEM,
|
||||
CPU_DUNNINGTON,
|
||||
Index: mcelog-1.60/amd.h
|
||||
===================================================================
|
||||
--- mcelog-1.60.orig/amd.h 2018-09-24 15:15:19.007468820 +0200
|
||||
+++ mcelog-1.60/amd.h 2018-09-24 15:15:22.907700806 +0200
|
||||
@@ -97,4 +97,5 @@ enum rrrr_ids {
|
||||
--- a/amd.h
|
||||
+++ b/amd.h
|
||||
@@ -97,4 +97,5 @@
|
||||
case CPU_F10H: \
|
||||
case CPU_F11H: \
|
||||
case CPU_F12H: \
|
||||
- case CPU_F14H
|
||||
+ case CPU_F14H: \
|
||||
+ case CPU_F15H
|
||||
Index: mcelog-1.60/mcelog.c
|
||||
===================================================================
|
||||
--- mcelog-1.60.orig/mcelog.c 2018-09-24 15:15:19.011469058 +0200
|
||||
+++ mcelog-1.60/mcelog.c 2018-09-24 15:15:22.907700806 +0200
|
||||
@@ -231,6 +231,7 @@ static char *cputype_name[] = {
|
||||
--- a/mcelog.c
|
||||
+++ b/mcelog.c
|
||||
@@ -233,6 +233,7 @@
|
||||
[CPU_F11H] = "AMD Griffin",
|
||||
[CPU_F12H] = "AMD Llano",
|
||||
[CPU_F14H] = "AMD Bobcat",
|
||||
@ -249,7 +238,7 @@ Index: mcelog-1.60/mcelog.c
|
||||
[CPU_P4] = "Intel P4",
|
||||
[CPU_NEHALEM] = "Intel Xeon 5500 series / Core i3/5/7 (\"Nehalem/Westmere\")",
|
||||
[CPU_DUNNINGTON] = "Intel Xeon 7400 series",
|
||||
@@ -264,6 +265,7 @@ static struct config_choice cpu_choices[
|
||||
@@ -276,6 +277,7 @@
|
||||
{ "f11h", CPU_F11H },
|
||||
{ "f12h", CPU_F12H },
|
||||
{ "f14h", CPU_F14H },
|
||||
@ -257,3 +246,13 @@ Index: mcelog-1.60/mcelog.c
|
||||
{ "p4", CPU_P4 },
|
||||
{ "dunnington", CPU_DUNNINGTON },
|
||||
{ "xeon74xx", CPU_DUNNINGTON },
|
||||
--- a/mcelog.h
|
||||
+++ b/mcelog.h
|
||||
@@ -123,6 +123,7 @@
|
||||
CPU_F11H,
|
||||
CPU_F12H,
|
||||
CPU_F14H,
|
||||
+ CPU_F15H,
|
||||
CPU_P4,
|
||||
CPU_NEHALEM,
|
||||
CPU_DUNNINGTON,
|
||||
|
@ -1,11 +1,16 @@
|
||||
Add F16h decoding support
|
||||
|
||||
Signed-off-by: Borislav Petkov <bp@suse.de>
|
||||
Index: mcelog-1.60/amd.c
|
||||
===================================================================
|
||||
--- mcelog-1.60.orig/amd.c 2018-09-24 15:15:33.848351555 +0200
|
||||
+++ mcelog-1.60/amd.c 2018-09-24 15:15:35.660459339 +0200
|
||||
@@ -200,6 +200,8 @@ enum cputype select_amd_cputype(u32 fami
|
||||
---
|
||||
amd.c | 53 +++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
amd.h | 3 ++-
|
||||
mcelog.c | 2 ++
|
||||
mcelog.h | 1 +
|
||||
4 files changed, 58 insertions(+), 1 deletion(-)
|
||||
|
||||
--- a/amd.c
|
||||
+++ b/amd.c
|
||||
@@ -200,6 +200,8 @@
|
||||
return CPU_F14H;
|
||||
case 0x15:
|
||||
return CPU_F15H;
|
||||
@ -14,7 +19,7 @@ Index: mcelog-1.60/amd.c
|
||||
default:
|
||||
break;
|
||||
}
|
||||
@@ -687,6 +689,47 @@ static bool f15h_mc2_mce(u16 ec, u8 xec)
|
||||
@@ -687,6 +689,47 @@
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -62,7 +67,7 @@ Index: mcelog-1.60/amd.c
|
||||
static void decode_mc2_mce(struct amd_decoder_ops *ops, struct mce *m)
|
||||
{
|
||||
u16 ec = EC(m->status);
|
||||
@@ -897,6 +940,12 @@ struct amd_decoder_ops fam_ops[] = {
|
||||
@@ -897,6 +940,12 @@
|
||||
.mc1_mce = f15h_mc1_mce,
|
||||
.mc2_mce = f15h_mc2_mce,
|
||||
},
|
||||
@ -75,7 +80,7 @@ Index: mcelog-1.60/amd.c
|
||||
};
|
||||
|
||||
static void __decode_amd_mc(enum cputype cpu, struct mce *mce)
|
||||
@@ -920,6 +969,10 @@ static void __decode_amd_mc(enum cputype
|
||||
@@ -920,6 +969,10 @@
|
||||
xec_mask = 0x1f;
|
||||
ops = &fam_ops[AMD_F15H];
|
||||
break;
|
||||
@ -86,34 +91,18 @@ Index: mcelog-1.60/amd.c
|
||||
default:
|
||||
Eprintf("Huh? What family is it: 0x%x?!\n", cpu);
|
||||
return;
|
||||
Index: mcelog-1.60/mcelog.h
|
||||
===================================================================
|
||||
--- mcelog-1.60.orig/mcelog.h 2018-09-24 15:15:33.848351555 +0200
|
||||
+++ mcelog-1.60/mcelog.h 2018-09-24 15:15:35.664459576 +0200
|
||||
@@ -122,6 +122,7 @@ enum cputype {
|
||||
CPU_F12H,
|
||||
CPU_F14H,
|
||||
CPU_F15H,
|
||||
+ CPU_F16H,
|
||||
CPU_P4,
|
||||
CPU_NEHALEM,
|
||||
CPU_DUNNINGTON,
|
||||
Index: mcelog-1.60/amd.h
|
||||
===================================================================
|
||||
--- mcelog-1.60.orig/amd.h 2018-09-24 15:15:33.848351555 +0200
|
||||
+++ mcelog-1.60/amd.h 2018-09-24 15:15:35.664459576 +0200
|
||||
@@ -98,4 +98,5 @@ enum rrrr_ids {
|
||||
--- a/amd.h
|
||||
+++ b/amd.h
|
||||
@@ -98,4 +98,5 @@
|
||||
case CPU_F11H: \
|
||||
case CPU_F12H: \
|
||||
case CPU_F14H: \
|
||||
- case CPU_F15H
|
||||
+ case CPU_F15H: \
|
||||
+ case CPU_F16H
|
||||
Index: mcelog-1.60/mcelog.c
|
||||
===================================================================
|
||||
--- mcelog-1.60.orig/mcelog.c 2018-09-24 15:15:33.848351555 +0200
|
||||
+++ mcelog-1.60/mcelog.c 2018-09-24 15:15:35.668459814 +0200
|
||||
@@ -232,6 +232,7 @@ static char *cputype_name[] = {
|
||||
--- a/mcelog.c
|
||||
+++ b/mcelog.c
|
||||
@@ -234,6 +234,7 @@
|
||||
[CPU_F12H] = "AMD Llano",
|
||||
[CPU_F14H] = "AMD Bobcat",
|
||||
[CPU_F15H] = "AMD Bulldozer",
|
||||
@ -121,7 +110,7 @@ Index: mcelog-1.60/mcelog.c
|
||||
[CPU_P4] = "Intel P4",
|
||||
[CPU_NEHALEM] = "Intel Xeon 5500 series / Core i3/5/7 (\"Nehalem/Westmere\")",
|
||||
[CPU_DUNNINGTON] = "Intel Xeon 7400 series",
|
||||
@@ -266,6 +267,7 @@ static struct config_choice cpu_choices[
|
||||
@@ -278,6 +279,7 @@
|
||||
{ "f12h", CPU_F12H },
|
||||
{ "f14h", CPU_F14H },
|
||||
{ "f15h", CPU_F15H },
|
||||
@ -129,3 +118,13 @@ Index: mcelog-1.60/mcelog.c
|
||||
{ "p4", CPU_P4 },
|
||||
{ "dunnington", CPU_DUNNINGTON },
|
||||
{ "xeon74xx", CPU_DUNNINGTON },
|
||||
--- a/mcelog.h
|
||||
+++ b/mcelog.h
|
||||
@@ -124,6 +124,7 @@
|
||||
CPU_F12H,
|
||||
CPU_F14H,
|
||||
CPU_F15H,
|
||||
+ CPU_F16H,
|
||||
CPU_P4,
|
||||
CPU_NEHALEM,
|
||||
CPU_DUNNINGTON,
|
||||
|
70
email.patch
70
email.patch
@ -1,22 +1,20 @@
|
||||
---
|
||||
Makefile | 10 ++-
|
||||
email.c | 199 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
Makefile | 13 +++-
|
||||
email.c | 200 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
email.h | 34 ++++++++++
|
||||
mcelog.c | 93 +++++++++++++++++++++++++++++
|
||||
mcelog.c | 93 ++++++++++++++++++++++++++++-
|
||||
mcelog.h | 1
|
||||
msg.c | 8 ++
|
||||
6 files changed, 343 insertions(+), 2 deletions(-)
|
||||
6 files changed, 346 insertions(+), 3 deletions(-)
|
||||
|
||||
Index: mcelog-1.66/Makefile
|
||||
===================================================================
|
||||
--- mcelog-1.66.orig/Makefile 2019-11-12 20:05:12.000000000 +0100
|
||||
+++ mcelog-1.66/Makefile 2019-11-20 15:22:48.408692817 +0100
|
||||
--- a/Makefile
|
||||
+++ b/Makefile
|
||||
@@ -1,3 +1,4 @@
|
||||
+CONFIG_EMAIL := 1
|
||||
CFLAGS := -g -Os
|
||||
prefix := /usr
|
||||
etcprefix :=
|
||||
@@ -37,15 +38,23 @@ OBJ := p4.o k8.o mcelog.o dmi.o tsc.o co
|
||||
@@ -38,15 +39,23 @@
|
||||
broadwell_de.o broadwell_epex.o skylake_xeon.o \
|
||||
denverton.o i10nm.o \
|
||||
msr.o bus.o unknown.o
|
||||
@ -41,7 +39,7 @@ Index: mcelog-1.66/Makefile
|
||||
|
||||
# dbquery intentionally not installed by default
|
||||
install: mcelog mcelog.conf mcelog.conf.5 mcelog.triggers.5
|
||||
@@ -80,7 +89,7 @@ dbquery: db.o dbquery.o memutil.o
|
||||
@@ -81,7 +90,7 @@
|
||||
depend: .depend
|
||||
|
||||
%.o: %.c
|
||||
@ -50,10 +48,8 @@ Index: mcelog-1.66/Makefile
|
||||
|
||||
version.tmp: FORCE
|
||||
( printf "char version[] = \"" ; \
|
||||
Index: mcelog-1.66/email.c
|
||||
===================================================================
|
||||
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
|
||||
+++ mcelog-1.66/email.c 2019-11-20 15:22:48.408692817 +0100
|
||||
--- /dev/null
|
||||
+++ b/email.c
|
||||
@@ -0,0 +1,200 @@
|
||||
+#include <unistd.h>
|
||||
+#include <signal.h>
|
||||
@ -255,10 +251,8 @@ Index: mcelog-1.66/email.c
|
||||
+ smtp_destroy_session (session);
|
||||
+ return 0;
|
||||
+}
|
||||
Index: mcelog-1.66/email.h
|
||||
===================================================================
|
||||
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
|
||||
+++ mcelog-1.66/email.h 2019-11-20 15:22:48.408692817 +0100
|
||||
--- /dev/null
|
||||
+++ b/email.h
|
||||
@@ -0,0 +1,34 @@
|
||||
+#ifndef _MCELOG_EMAIL_H_
|
||||
+#define _MCELOG_EMAIL_H_
|
||||
@ -294,10 +288,8 @@ Index: mcelog-1.66/email.h
|
||||
+#endif
|
||||
+
|
||||
+#endif
|
||||
Index: mcelog-1.66/mcelog.c
|
||||
===================================================================
|
||||
--- mcelog-1.66.orig/mcelog.c 2019-11-12 20:05:12.000000000 +0100
|
||||
+++ mcelog-1.66/mcelog.c 2019-11-20 15:22:48.408692817 +0100
|
||||
--- a/mcelog.c
|
||||
+++ b/mcelog.c
|
||||
@@ -37,6 +37,7 @@
|
||||
#include <assert.h>
|
||||
#include <signal.h>
|
||||
@ -316,7 +308,7 @@ Index: mcelog-1.66/mcelog.c
|
||||
enum cputype cputype = CPU_GENERIC;
|
||||
|
||||
char *logfn = LOG_DEV_FILENAME;
|
||||
@@ -71,7 +75,7 @@ static double cpumhz;
|
||||
@@ -71,7 +75,7 @@
|
||||
static int cpumhz_forced;
|
||||
int ascii_mode;
|
||||
int dump_raw_ascii;
|
||||
@ -325,23 +317,23 @@ Index: mcelog-1.66/mcelog.c
|
||||
static char *inputfile;
|
||||
char *processor_flags;
|
||||
static int foreground;
|
||||
@@ -1003,6 +1007,7 @@ void usage(void)
|
||||
"--is-cpu-supported Exit with return code indicating whether the CPU is supported\n"
|
||||
@@ -1022,6 +1026,7 @@
|
||||
"--max-corr-err-counters Max page correctable error counters\n"
|
||||
"--help Display this message.\n"
|
||||
);
|
||||
+ email_usage();
|
||||
printf("\n");
|
||||
print_cputypes();
|
||||
}
|
||||
@@ -1072,6 +1077,7 @@ static struct option options[] = {
|
||||
{ "no-imc-log", 0, NULL, O_NO_IMC_LOG },
|
||||
@@ -1093,6 +1098,7 @@
|
||||
{ "max-corr-err-counters", 1, NULL, O_MAX_CORR_ERR_COUNTERS },
|
||||
{ "help", 0, NULL, O_HELP },
|
||||
{ "is-cpu-supported", 0, NULL, O_IS_CPU_SUPPORTED },
|
||||
+ EMAIL_OPTIONS
|
||||
{}
|
||||
};
|
||||
|
||||
@@ -1263,11 +1269,86 @@ static void drop_cred(void)
|
||||
@@ -1287,11 +1293,86 @@
|
||||
}
|
||||
}
|
||||
|
||||
@ -428,7 +420,7 @@ Index: mcelog-1.66/mcelog.c
|
||||
|
||||
if (recordlen == 0) {
|
||||
Wprintf("no data in mce record\n");
|
||||
@@ -1294,12 +1375,16 @@ static void process(int fd, unsigned rec
|
||||
@@ -1318,12 +1399,16 @@
|
||||
finish = 1;
|
||||
if (!mce_filter(mce, recordlen))
|
||||
continue;
|
||||
@ -445,7 +437,7 @@ Index: mcelog-1.66/mcelog.c
|
||||
flushlog();
|
||||
}
|
||||
|
||||
@@ -1413,6 +1498,8 @@ int main(int ac, char **av)
|
||||
@@ -1437,6 +1522,8 @@
|
||||
noargs(ac, av);
|
||||
fprintf(stderr, "mcelog %s\n", MCELOG_VERSION);
|
||||
exit(0);
|
||||
@ -454,7 +446,7 @@ Index: mcelog-1.66/mcelog.c
|
||||
} else if (opt == 0)
|
||||
break;
|
||||
}
|
||||
@@ -1447,6 +1534,10 @@ int main(int ac, char **av)
|
||||
@@ -1471,6 +1558,10 @@
|
||||
usage();
|
||||
exit(1);
|
||||
}
|
||||
@ -465,11 +457,9 @@ Index: mcelog-1.66/mcelog.c
|
||||
checkdmi();
|
||||
general_setup();
|
||||
|
||||
Index: mcelog-1.66/mcelog.h
|
||||
===================================================================
|
||||
--- mcelog-1.66.orig/mcelog.h 2019-11-12 20:05:12.000000000 +0100
|
||||
+++ mcelog-1.66/mcelog.h 2019-11-20 15:22:48.408692817 +0100
|
||||
@@ -148,6 +148,7 @@ enum cputype {
|
||||
--- a/mcelog.h
|
||||
+++ b/mcelog.h
|
||||
@@ -156,6 +156,7 @@
|
||||
enum option_ranges {
|
||||
O_COMMON = 500,
|
||||
O_DISKDB = 1000,
|
||||
@ -477,10 +467,8 @@ Index: mcelog-1.66/mcelog.h
|
||||
};
|
||||
|
||||
enum syslog_opt {
|
||||
Index: mcelog-1.66/msg.c
|
||||
===================================================================
|
||||
--- mcelog-1.66.orig/msg.c 2019-11-12 20:05:12.000000000 +0100
|
||||
+++ mcelog-1.66/msg.c 2019-11-20 15:22:48.408692817 +0100
|
||||
--- a/msg.c
|
||||
+++ b/msg.c
|
||||
@@ -8,10 +8,13 @@
|
||||
#include "mcelog.h"
|
||||
#include "msg.h"
|
||||
@ -495,7 +483,7 @@ Index: mcelog-1.66/msg.c
|
||||
static char *output_fn;
|
||||
|
||||
int need_stdout(void)
|
||||
@@ -135,6 +138,11 @@ int Wprintf(char *fmt, ...)
|
||||
@@ -135,6 +138,11 @@
|
||||
n = vfprintf(output_fh ? output_fh : stdout, fmt, ap);
|
||||
va_end(ap);
|
||||
}
|
||||
|
@ -1,7 +1,9 @@
|
||||
Index: mcelog-1.60/mcelog.c
|
||||
===================================================================
|
||||
--- mcelog-1.60.orig/mcelog.c 2018-09-24 15:15:35.668459814 +0200
|
||||
+++ mcelog-1.60/mcelog.c 2018-09-24 15:15:41.648815524 +0200
|
||||
---
|
||||
mcelog.c | 9 +++++++++
|
||||
1 file changed, 9 insertions(+)
|
||||
|
||||
--- a/mcelog.c
|
||||
+++ b/mcelog.c
|
||||
@@ -37,6 +37,7 @@
|
||||
#include <assert.h>
|
||||
#include <signal.h>
|
||||
@ -10,7 +12,7 @@ Index: mcelog-1.60/mcelog.c
|
||||
#include <sys/wait.h>
|
||||
#include <fnmatch.h>
|
||||
#include "mcelog.h"
|
||||
@@ -1247,6 +1248,14 @@ static void general_setup(void)
|
||||
@@ -1284,6 +1285,14 @@
|
||||
|
||||
static void drop_cred(void)
|
||||
{
|
||||
|
@ -1,3 +0,0 @@
|
||||
version https://git-lfs.github.com/spec/v1
|
||||
oid sha256:15b06366527d0958e4f6eb9f11e68533435e989259663625dbffb53dd275b555
|
||||
size 313098
|
3
mcelog-175.tar.gz
Normal file
3
mcelog-175.tar.gz
Normal file
@ -0,0 +1,3 @@
|
||||
version https://git-lfs.github.com/spec/v1
|
||||
oid sha256:ed25a39bb20178e79e18cc5d3202b198868986ec3e964b6285f6a7bac8469fdf
|
||||
size 315350
|
@ -1,3 +1,27 @@
|
||||
-------------------------------------------------------------------
|
||||
Tue Jan 26 17:43:06 UTC 2021 - trenn@suse.de
|
||||
|
||||
- Update to version 175 (jsc#SLE-14450):
|
||||
* mcelog: Add a test case to test page error counter replacement.
|
||||
* mcelog: Use 'num-errors' to specify the number of mce records to be injected.
|
||||
* mcelog: Report how often the replacement of page CE counter happened
|
||||
* mcelog: Limit memory consumption for counting CEs per page
|
||||
* mcelog: Add support for Sapphirerapids server. (jsc#SLE-14450)
|
||||
* mcelog: i10nm: Fix mapping from bank number to functional unit
|
||||
|
||||
- Only refreshing patches, due to tarball modifications:
|
||||
M Start-consolidating-AMD-specific-stuff.patch
|
||||
M add-f10h-support.patch
|
||||
M add-f11h-support.patch
|
||||
M add-f12h-support.patch
|
||||
M add-f14h-support.patch
|
||||
M add-f15h-support.patch
|
||||
M add-f16h-support.patch
|
||||
M email.patch
|
||||
M fix_setgroups_missing_call.patch
|
||||
M mcelog_invert_prefill_db_warning.patch
|
||||
|
||||
|
||||
-------------------------------------------------------------------
|
||||
Mon Sep 28 10:16:15 UTC 2020 - trenn@suse.de
|
||||
|
||||
|
@ -1,7 +1,7 @@
|
||||
#
|
||||
# spec file for package mcelog
|
||||
#
|
||||
# Copyright (c) 2020 SUSE LLC
|
||||
# Copyright (c) 2021 SUSE LLC
|
||||
#
|
||||
# All modifications and additions to the file contributed by third parties
|
||||
# remain the property of their copyright owners, unless otherwise agreed
|
||||
@ -21,7 +21,7 @@
|
||||
%define _fillupdir %{_localstatedir}/adm/fillup-templates
|
||||
%endif
|
||||
Name: mcelog
|
||||
Version: 173
|
||||
Version: 175
|
||||
Release: 0
|
||||
Summary: Log Machine Check Events
|
||||
License: GPL-2.0-only
|
||||
|
@ -2,9 +2,9 @@
|
||||
memdb.c | 10 +++++-----
|
||||
1 file changed, 5 insertions(+), 5 deletions(-)
|
||||
|
||||
--- mcelog-1.64+git20190805.e53631f.orig/memdb.c 2019-09-06 14:06:51.757228185 +0200
|
||||
+++ mcelog-1.64+git20190805.e53631f/memdb.c 2019-09-06 14:09:38.197237074 +0200
|
||||
@@ -430,11 +430,11 @@
|
||||
--- a/memdb.c
|
||||
+++ b/memdb.c
|
||||
@@ -431,11 +431,11 @@
|
||||
md->location = xstrdup(bl);
|
||||
md->name = xstrdup(dmi_getstring(&d->header, d->device_locator));
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user