Accepting request 1092613 from home:trenn

- Includes following SLE 15 SP5 jira features: * jsc#PED-671 mcelog: Update to latest release * jsc#PED-686 [CPU Features] Update mcelog support for ADL-N * jsc#PED-638 [CPU Features] Update mcelog support for MTL-P - Update to version 189: - Had to adopt to latest CPU identification model mainline patch: b54ee05056a76e mcelog: Drop CASE_INTEL define and friends A add_new_amd_cpu_defines D add-defines.patch M Start-consolidating-AMD-specific-stuff.patch M add-f10h-support.patch M add-f11h-support.patch M add-f12h-support.patch M add-f14h-support.patch M add-f15h-support.patch M add-f16h-support.patch M email.patch M fix_setgroups_missing_call.patch OBS-URL: https://build.opensuse.org/request/show/1092613 OBS-URL: https://build.opensuse.org/package/show/Base:System/mcelog?expand=0&rev=104
2023-06-12 15:26:55 +00:00 · 2023-06-12 15:26:55 +00:00 · c729908bac
commit c729908bac
parent 241866c430
17 changed files with 231 additions and 482 deletions
--- a/Start-consolidating-AMD-specific-stuff.patch
+++ b/Start-consolidating-AMD-specific-stuff.patch
@ -18,23 +18,23 @@ Signed-off-by: Borislav Petkov <bp@suse.de>
 rename k8.c => amd.c (97%)
 rename k8.h => amd.h (79%)

-Index: mcelog-181/Makefile
+Index: mcelog-189/Makefile
 ===================================================================
--- mcelog-181.orig/Makefile
-+++ mcelog-181/Makefile
+--- mcelog-189.orig/Makefile
+++ mcelog-189/Makefile
@@ -31,7 +31,7 @@ all: mcelog
 
- .PHONY: install clean depend FORCE
+ .PHONY: install install-nodoc clean depend FORCE
 
 -OBJ := p4.o k8.o mcelog.o dmi.o tsc.o core2.o bitfield.o intel.o \
 +OBJ := p4.o amd.o mcelog.o dmi.o tsc.o core2.o bitfield.o intel.o \
        nehalem.o dunnington.o tulsa.o config.o memutil.o msg.o   \
        eventloop.o leaky-bucket.o memdb.o server.o trigger.o 	 \
        client.o cache.o sysfs.o yellow.o page.o rbtree.o 	 \
-Index: mcelog-181/amd.c
+Index: mcelog-189/amd.c
 ===================================================================
 --- /dev/null
-+++ mcelog-181/amd.c
+++ mcelog-189/amd.c
@@ -0,0 +1,282 @@
 +/* Based on K8 decoding code written for the 2.4 kernel by Andi Kleen and 
 + * Eric Morton. Hacked and extended for mcelog by AK.
@ -318,11 +318,11 @@ Index: mcelog-181/amd.c
 +	} 
 +	return 1;
 +}
-Index: mcelog-181/amd.h
+Index: mcelog-189/amd.h
 ===================================================================
 --- /dev/null
-+++ mcelog-181/amd.h
-@@ -0,0 +1,14 @@
+++ mcelog-189/amd.h
+@@ -0,0 +1,80 @@
 +char *k8_bank_name(unsigned num);
 +void decode_amd_mc(enum cputype, struct mce *mce, int *ismemerr);
 +int mce_filter_k8(struct mce *m);
@ -335,11 +335,77 @@ Index: mcelog-181/amd.h
 +#define K8_MCELOG_THRESHOLD_L3_CACHE (4 * 9 + 2)
 +#define K8_MCELOG_THRESHOLD_FBDIMM   (4 * 9 + 3)
 +
+#define EC(x)				((x) & 0xffff)
+#define XEC(x, mask)			(((x) >> 16) & mask)
+
+#define LOW_SYNDROME(x)			(((x) >> 15) & 0xff)
+#define HIGH_SYNDROME(x)		(((x) >> 24) & 0xff)
+
+#define TLB_ERROR(x)			(((x) & 0xFFF0) == 0x0010)
+#define MEM_ERROR(x)			(((x) & 0xFF00) == 0x0100)
+#define BUS_ERROR(x)			(((x) & 0xF800) == 0x0800)
+#define INT_ERROR(x)			(((x) & 0xF4FF) == 0x0400)
+
+#define TT(x)				(((x) >> 2) & 0x3)
+#define TT_MSG(x)			tt_msgs[TT(x)]
+#define II(x)				(((x) >> 2) & 0x3)
+#define II_MSG(x)			ii_msgs[II(x)]
+#define LL(x)				((x) & 0x3)
+#define LL_MSG(x)			ll_msgs[LL(x)]
+#define TO(x)				(((x) >> 8) & 0x1)
+#define TO_MSG(x)			to_msgs[TO(x)]
+#define PP(x)				(((x) >> 9) & 0x3)
+#define PP_MSG(x)			pp_msgs[PP(x)]
+#define UU(x)				(((x) >> 8) & 0x3)
+#define UU_MSG(x)			uu_msgs[UU(x)]
+
+#define R4(x)				(((x) >> 4) & 0xf)
+#define R4_MSG(x)			((R4(x) < 9) ?  rrrr_msgs[R4(x)] : "Wrong R4!")
+
+enum tt_ids {
+	TT_INSTR = 0,
+	TT_DATA,
+	TT_GEN,
+	TT_RESV,
+};
+
+enum ll_ids {
+	LL_RESV = 0,
+	LL_L1,
+	LL_L2,
+	LL_LG,
+};
+
+enum ii_ids {
+	II_MEM = 0,
+	II_RESV,
+	II_IO,
+	II_GEN,
+};
+
+enum rrrr_ids {
+	R4_GEN	= 0,
+	R4_RD,
+	R4_WR,
+	R4_DRD,
+	R4_DWR,
+	R4_IRD,
+	R4_PREF,
+	R4_EVICT,
+	R4_SNOOP,
+};
+
 +#define CASE_AMD_CPUS \
-+	case CPU_K8
-Index: mcelog-181/k8.c
+	(cputype == CPU_K8 || \
+	 cputype == CPU_F10H || \
+ 	 cputype == CPU_F11H || \
+	 cputype == CPU_F12H || \
+ 	 cputype == CPU_F14H || \
+	 cputype == CPU_F15H || \
+ 	 cputype == CPU_F16H)
+Index: mcelog-189/k8.c
 ===================================================================
--- mcelog-181.orig/k8.c
+--- mcelog-189.orig/k8.c
 +++ /dev/null
@@ -1,281 +0,0 @@
 -/* Based on K8 decoding code written for the 2.4 kernel by Andi Kleen and 
@ -623,9 +689,9 @@ Index: mcelog-181/k8.c
 -	} 
 -	return 1;
 -}
-Index: mcelog-181/k8.h
+Index: mcelog-189/k8.h
 ===================================================================
--- mcelog-181.orig/k8.h
+--- mcelog-189.orig/k8.h
 +++ /dev/null
@@ -1,11 +0,0 @@
 -char *k8_bank_name(unsigned num);
@ -639,10 +705,10 @@ Index: mcelog-181/k8.h
 -#define K8_MCELOG_THRESHOLD_LINK     (4 * 9 + 1)
 -#define K8_MCELOG_THRESHOLD_L3_CACHE (4 * 9 + 2)
 -#define K8_MCELOG_THRESHOLD_FBDIMM   (4 * 9 + 3)
-Index: mcelog-181/mcelog.c
+Index: mcelog-189/mcelog.c
 ===================================================================
--- mcelog-181.orig/mcelog.c
-+++ mcelog-181/mcelog.c
+--- mcelog-189.orig/mcelog.c
+++ mcelog-189/mcelog.c
@@ -41,7 +41,7 @@
 #include <fnmatch.h>
 #include "mcelog.h"
@ -652,16 +718,14 @@ Index: mcelog-181/mcelog.c
 #include "intel.h"
 #include "p4.h"
 #include "dmi.h"
-@@ -453,9 +453,9 @@ static void dump_mce(struct mce *m, unsi
+@@ -346,8 +346,8 @@ static void dump_mce(struct mce *m, unsi
 		time_t t = m->time;
 		Wprintf("TIME %llu %s", m->time, ctime(&t));
 	} 
-	switch (cputype) { 
-	case CPU_K8:
+-	if (cputype == CPU_K8)
 -		decode_k8_mc(m, &ismemerr); 
-+	switch (cputype) {
-+	CASE_AMD_CPUS:
-+		decode_amd_mc(cputype, m, &ismemerr);
- 		break;
- 	CASE_INTEL_CPUS:
+	if CASE_AMD_CPUS
+		decode_amd_mc(m, &ismemerr); 
+ 	else if (cputype >= CPU_INTEL)
 		decode_intel_mc(m, cputype, &ismemerr, recordlen);
+ 	/* else add handlers for other CPUs here */
--- a/2
+++ b/2
@ -1,7 +1,7 @@
 <services>
  <service name="obs_scm" mode="localonly">
    <param name="scm">git</param>
-    <param name="url">https://github.com/andikleen/mcelog.git</param>
+    <param name="url">git://git.kernel.org/pub/scm/utils/cpu/mce/mcelog.git</param>
    <param name="changesgenerate">enable</param>
    <param name="versionrewrite-pattern">v(.*)</param>
    <param name="versionformat">@PARENT_TAG@</param>
--- a/2
+++ b/2
@ -3,6 +3,4 @@
                <param name="url">https://github.com/andikleen/mcelog</param>
              <param name="changesrevision">ee90ff20ce6a4d5e016aa249ce8b37f359f9fda4</param></service><service name="tar_scm">
                <param name="url">git://git.kernel.org/pub/scm/utils/cpu/mce/mcelog.git</param>
-              <param name="changesrevision">a4edca25ef3bd8780ae1dc54bc203973ec7f1640</param></service><service name="tar_scm">
-                <param name="url">https://github.com/andikleen/mcelog.git</param>
              <param name="changesrevision">8f33fdc47160edce09d75e1316b4d88129ca60a0</param></service></servicedata>
--- a/add-defines.patch
+++ b/add-defines.patch
@ -1,71 +0,0 @@
-Add AMD-specific defines and helpers
-
-Signed-off-by: Borislav Petkov <bp@suse.de>
--- mcelog-1.64+git20190805.e53631f.orig/amd.h	2019-09-06 14:09:39.245237130 +0200
-+++ mcelog-1.64+git20190805.e53631f/amd.h	2019-09-06 14:09:40.217237182 +0200
-@@ -10,5 +10,65 @@
- #define K8_MCELOG_THRESHOLD_L3_CACHE (4 * 9 + 2)
- #define K8_MCELOG_THRESHOLD_FBDIMM   (4 * 9 + 3)
- 
-+#define EC(x)				((x) & 0xffff)
-+#define XEC(x, mask)			(((x) >> 16) & mask)
-+
-+#define LOW_SYNDROME(x)			(((x) >> 15) & 0xff)
-+#define HIGH_SYNDROME(x)		(((x) >> 24) & 0xff)
-+
-+#define TLB_ERROR(x)			(((x) & 0xFFF0) == 0x0010)
-+#define MEM_ERROR(x)			(((x) & 0xFF00) == 0x0100)
-+#define BUS_ERROR(x)			(((x) & 0xF800) == 0x0800)
-+#define INT_ERROR(x)			(((x) & 0xF4FF) == 0x0400)
-+
-+#define TT(x)				(((x) >> 2) & 0x3)
-+#define TT_MSG(x)			tt_msgs[TT(x)]
-+#define II(x)				(((x) >> 2) & 0x3)
-+#define II_MSG(x)			ii_msgs[II(x)]
-+#define LL(x)				((x) & 0x3)
-+#define LL_MSG(x)			ll_msgs[LL(x)]
-+#define TO(x)				(((x) >> 8) & 0x1)
-+#define TO_MSG(x)			to_msgs[TO(x)]
-+#define PP(x)				(((x) >> 9) & 0x3)
-+#define PP_MSG(x)			pp_msgs[PP(x)]
-+#define UU(x)				(((x) >> 8) & 0x3)
-+#define UU_MSG(x)			uu_msgs[UU(x)]
-+
-+#define R4(x)				(((x) >> 4) & 0xf)
-+#define R4_MSG(x)			((R4(x) < 9) ?  rrrr_msgs[R4(x)] : "Wrong R4!")
-+
- #define CASE_AMD_CPUS \
- 	case CPU_K8
-+
-+enum tt_ids {
-+	TT_INSTR = 0,
-+	TT_DATA,
-+	TT_GEN,
-+	TT_RESV,
-+};
-+
-+enum ll_ids {
-+	LL_RESV = 0,
-+	LL_L1,
-+	LL_L2,
-+	LL_LG,
-+};
-+
-+enum ii_ids {
-+	II_MEM = 0,
-+	II_RESV,
-+	II_IO,
-+	II_GEN,
-+};
-+
-+enum rrrr_ids {
-+	R4_GEN	= 0,
-+	R4_RD,
-+	R4_WR,
-+	R4_DRD,
-+	R4_DWR,
-+	R4_IRD,
-+	R4_PREF,
-+	R4_EVICT,
-+	R4_SNOOP,
-+};
--- a/add-f10h-support.patch
+++ b/add-f10h-support.patch
@ -8,10 +8,10 @@ Signed-off-by: Borislav Petkov <bp@suse.de>
 mcelog.h |    1 
 4 files changed, 506 insertions(+), 51 deletions(-)

-Index: mcelog-181/amd.c
+Index: mcelog-189/amd.c
 ===================================================================
--- mcelog-181.orig/amd.c
-+++ mcelog-181/amd.c
+--- mcelog-189.orig/amd.c
+++ mcelog-189/amd.c
@@ -14,7 +14,7 @@
 #include "mcelog.h"
 #include "amd.h"
@ -561,10 +561,10 @@ Index: mcelog-181/amd.c
 +	}
 +        return 1;
 }
-Index: mcelog-181/amd.h
+Index: mcelog-189/amd.h
 ===================================================================
--- mcelog-181.orig/amd.h
-+++ mcelog-181/amd.h
+--- mcelog-189.orig/amd.h
+++ mcelog-189/amd.h
@@ -1,6 +1,25 @@
 +#include <stdbool.h>
 +
@ -601,7 +601,7 @@ Index: mcelog-181/amd.h
 #define EC(x)				((x) & 0xffff)
 #define XEC(x, mask)			(((x) >> 16) & mask)
 
-@@ -22,23 +43,20 @@ int mce_filter_k8(struct mce *m);
+@@ -22,20 +43,20 @@ int mce_filter_k8(struct mce *m);
 #define INT_ERROR(x)			(((x) & 0xF4FF) == 0x0400)
 
 #define TT(x)				(((x) >> 2) & 0x3)
@ -624,67 +624,26 @@ Index: mcelog-181/amd.h
 
 #define R4(x)				(((x) >> 4) & 0xf)
 -#define R4_MSG(x)			((R4(x) < 9) ?  rrrr_msgs[R4(x)] : "Wrong R4!")
-
-#define CASE_AMD_CPUS \
-	case CPU_K8
 +#define R4_MSG(x)			((R4(x) < 9) ?  memtrans[R4(x)] : "Wrong R4!")
 
 enum tt_ids {
 	TT_INSTR = 0,
-@@ -72,3 +90,7 @@ enum rrrr_ids {
- 	R4_EVICT,
- 	R4_SNOOP,
- };
-+
-+#define CASE_AMD_CPUS \
-+	case CPU_K8:  \
-+	case CPU_F10H
-Index: mcelog-181/mcelog.c
+Index: mcelog-189/mcelog.c
 ===================================================================
--- mcelog-181.orig/mcelog.c
-+++ mcelog-181/mcelog.c
-@@ -148,19 +148,20 @@ static void resolveaddr(unsigned long lo
- 
- static int mce_filter(struct mce *m, unsigned recordlen)
- {
-	if (!filter_bogus) 
-+	if (!filter_bogus)
- 		return 1;
-+
+--- mcelog-189.orig/mcelog.c
+++ mcelog-189/mcelog.c
+@@ -152,8 +152,8 @@ static int mce_filter(struct mce *m, uns
 	/* Filter out known broken MCEs */
- 	switch (cputype) {
-	case CPU_K8:
-		return mce_filter_k8(m);
-+	CASE_AMD_CPUS:
-+		return mce_filter_amd(m);
- 		/* add more buggy CPUs here */
- 	CASE_INTEL_CPUS:
+ 	if (cputype >= CPU_INTEL)
 		return mce_filter_intel(m, recordlen);
- 	default:
- 	case CPU_GENERIC:
- 		return 1;
-	}	
-+	}
- }
+-	else if (cputype == CPU_K8)
+-		return mce_filter_k8(m);
+	else if	CASE_AMD_CPUS
+		return mce_filter_amd(m);
 
- static void print_tsc(int cpunum, __u64 tsc, unsigned long time) 
-@@ -228,6 +229,7 @@ static char *cputype_name[] = {
- 	[CPU_P6OLD] = "Intel PPro/P2/P3/old Xeon",
- 	[CPU_CORE2] = "Intel Core", /* 65nm and 45nm */
- 	[CPU_K8] = "AMD K8 and derivates",
-+	[CPU_F10H] = "AMD Greyhound",
- 	[CPU_P4] = "Intel P4",
- 	[CPU_NEHALEM] = "Intel Xeon 5500 series / Core i3/5/7 (\"Nehalem/Westmere\")",
- 	[CPU_DUNNINGTON] = "Intel Xeon 7400 series",
-@@ -268,6 +270,7 @@ static struct config_choice cpu_choices[
- 	{ "p6old", CPU_P6OLD },
- 	{ "core2", CPU_CORE2 },
- 	{ "k8", CPU_K8 },
-+	{ "f10h", CPU_F10H },
- 	{ "p4", CPU_P4 },
- 	{ "dunnington", CPU_DUNNINGTON },
- 	{ "xeon74xx", CPU_DUNNINGTON },
-@@ -390,9 +393,7 @@ static enum cputype setup_cpuid(u32 cpuv
+ 	return 1;
+ }
+@@ -283,9 +283,7 @@ static enum cputype setup_cpuid(u32 cpuv
 	case X86_VENDOR_INTEL:
 	        return select_intel_cputype(family, model);
 	case X86_VENDOR_AMD:
@ -695,7 +654,16 @@ Index: mcelog-181/mcelog.c
 	default:
 		Eprintf("Unknown CPU type vendor %u family %u model %u",
 			cpuvendor, family, model);
-@@ -581,14 +582,9 @@ int is_cpu_supported(void)
+@@ -347,7 +345,7 @@ static void dump_mce(struct mce *m, unsi
+ 		Wprintf("TIME %llu %s", m->time, ctime(&t));
+ 	} 
+ 	if CASE_AMD_CPUS
+-		decode_amd_mc(m, &ismemerr); 
+		decode_amd_mc(cputype, m, &ismemerr);
+ 	else if (cputype >= CPU_INTEL)
+ 		decode_intel_mc(m, cputype, &ismemerr, recordlen);
+ 	/* else add handlers for other CPUs here */
+@@ -463,14 +461,9 @@ int is_cpu_supported(void)
 
 		} 
 		if (seen == ALL) {
@ -713,15 +681,3 @@ Index: mcelog-181/mcelog.c
 				Eprintf("ERROR: Hygon Processor family %d: mcelog does not support this processor.  Please use the edac_mce_amd module instead.\n", family);
 				return 0;
 			} else if (!strcmp(vendor,"GenuineIntel"))
-Index: mcelog-181/mcelog.h
-===================================================================
--- mcelog-181.orig/mcelog.h
-+++ mcelog-181/mcelog.h
-@@ -119,6 +119,7 @@ enum cputype {
- 	CPU_P6OLD,
- 	CPU_CORE2, /* 65nm and 45nm */
- 	CPU_K8,
-+	CPU_F10H,
- 	CPU_P4,
- 	CPU_NEHALEM,
- 	CPU_DUNNINGTON,
--- a/add-f11h-support.patch
+++ b/add-f11h-support.patch
@ -8,10 +8,10 @@ Signed-off-by: Borislav Petkov <bp@suse.de>
 mcelog.h |    1 +
 4 files changed, 26 insertions(+), 1 deletion(-)

-Index: mcelog-181/amd.c
+Index: mcelog-189/amd.c
 ===================================================================
--- mcelog-181.orig/amd.c
-+++ mcelog-181/amd.c
+--- mcelog-189.orig/amd.c
+++ mcelog-189/amd.c
@@ -155,6 +155,8 @@ enum cputype select_amd_cputype(u32 fami
 		return CPU_K8;
 	case 0x10:
@ -61,46 +61,3 @@ Index: mcelog-181/amd.c
 	default:
 		Eprintf("Huh? What family is it: 0x%x?!\n", cpu);
 		return;
-Index: mcelog-181/amd.h
-===================================================================
--- mcelog-181.orig/amd.h
-+++ mcelog-181/amd.h
-@@ -93,4 +93,5 @@ enum rrrr_ids {
- 
- #define CASE_AMD_CPUS \
- 	case CPU_K8:  \
-	case CPU_F10H
-+	case CPU_F10H: \
-+	case CPU_F11H
-Index: mcelog-181/mcelog.c
-===================================================================
--- mcelog-181.orig/mcelog.c
-+++ mcelog-181/mcelog.c
-@@ -230,6 +230,7 @@ static char *cputype_name[] = {
- 	[CPU_CORE2] = "Intel Core", /* 65nm and 45nm */
- 	[CPU_K8] = "AMD K8 and derivates",
- 	[CPU_F10H] = "AMD Greyhound",
-+	[CPU_F11H] = "AMD Griffin",
- 	[CPU_P4] = "Intel P4",
- 	[CPU_NEHALEM] = "Intel Xeon 5500 series / Core i3/5/7 (\"Nehalem/Westmere\")",
- 	[CPU_DUNNINGTON] = "Intel Xeon 7400 series",
-@@ -271,6 +272,7 @@ static struct config_choice cpu_choices[
- 	{ "core2", CPU_CORE2 },
- 	{ "k8", CPU_K8 },
- 	{ "f10h", CPU_F10H },
-+	{ "f11h", CPU_F11H },
- 	{ "p4", CPU_P4 },
- 	{ "dunnington", CPU_DUNNINGTON },
- 	{ "xeon74xx", CPU_DUNNINGTON },
-Index: mcelog-181/mcelog.h
-===================================================================
--- mcelog-181.orig/mcelog.h
-+++ mcelog-181/mcelog.h
-@@ -120,6 +120,7 @@ enum cputype {
- 	CPU_CORE2, /* 65nm and 45nm */
- 	CPU_K8,
- 	CPU_F10H,
-+	CPU_F11H,
- 	CPU_P4,
- 	CPU_NEHALEM,
- 	CPU_DUNNINGTON,
--- a/add-f12h-support.patch
+++ b/add-f12h-support.patch
@ -8,10 +8,10 @@ Signed-off-by: Borislav Petkov <bp@suse.de>
 mcelog.h |    1 +
 4 files changed, 17 insertions(+), 1 deletion(-)

-Index: mcelog-181/amd.c
+Index: mcelog-189/amd.c
 ===================================================================
--- mcelog-181.orig/amd.c
-+++ mcelog-181/amd.c
+--- mcelog-189.orig/amd.c
+++ mcelog-189/amd.c
@@ -157,6 +157,8 @@ enum cputype select_amd_cputype(u32 fami
 		return CPU_F10H;
 	case 0x11:
@ -44,10 +44,10 @@ Index: mcelog-181/amd.c
 	default:
 		Eprintf("Huh? What family is it: 0x%x?!\n", cpu);
 		return;
-Index: mcelog-181/amd.h
+Index: mcelog-189/amd.h
 ===================================================================
--- mcelog-181.orig/amd.h
-+++ mcelog-181/amd.h
+--- mcelog-189.orig/amd.h
+++ mcelog-189/amd.h
@@ -9,6 +9,7 @@ enum amdcpu {
 	AMD_K8 = 0,
 	AMD_F10H,
@ -56,42 +56,3 @@ Index: mcelog-181/amd.h
 	AMD_F14H,
 	AMD_F15H,
 	AMD_F16H,
-@@ -94,4 +95,5 @@ enum rrrr_ids {
- #define CASE_AMD_CPUS \
- 	case CPU_K8:  \
- 	case CPU_F10H: \
-	case CPU_F11H
-+	case CPU_F11H: \
-+	case CPU_F12H
-Index: mcelog-181/mcelog.c
-===================================================================
--- mcelog-181.orig/mcelog.c
-+++ mcelog-181/mcelog.c
-@@ -231,6 +231,7 @@ static char *cputype_name[] = {
- 	[CPU_K8] = "AMD K8 and derivates",
- 	[CPU_F10H] = "AMD Greyhound",
- 	[CPU_F11H] = "AMD Griffin",
-+	[CPU_F12H] = "AMD Llano",
- 	[CPU_P4] = "Intel P4",
- 	[CPU_NEHALEM] = "Intel Xeon 5500 series / Core i3/5/7 (\"Nehalem/Westmere\")",
- 	[CPU_DUNNINGTON] = "Intel Xeon 7400 series",
-@@ -273,6 +274,7 @@ static struct config_choice cpu_choices[
- 	{ "k8", CPU_K8 },
- 	{ "f10h", CPU_F10H },
- 	{ "f11h", CPU_F11H },
-+	{ "f12h", CPU_F12H },
- 	{ "p4", CPU_P4 },
- 	{ "dunnington", CPU_DUNNINGTON },
- 	{ "xeon74xx", CPU_DUNNINGTON },
-Index: mcelog-181/mcelog.h
-===================================================================
--- mcelog-181.orig/mcelog.h
-+++ mcelog-181/mcelog.h
-@@ -121,6 +121,7 @@ enum cputype {
- 	CPU_K8,
- 	CPU_F10H,
- 	CPU_F11H,
-+	CPU_F12H,
- 	CPU_P4,
- 	CPU_NEHALEM,
- 	CPU_DUNNINGTON,
--- a/add-f14h-support.patch
+++ b/add-f14h-support.patch
@ -8,10 +8,10 @@ Signed-off-by: Borislav Petkov <bp@suse.de>
 mcelog.h |    1 
 4 files changed, 93 insertions(+), 1 deletion(-)

-Index: mcelog-181/amd.c
+Index: mcelog-189/amd.c
 ===================================================================
--- mcelog-181.orig/amd.c
-+++ mcelog-181/amd.c
+--- mcelog-189.orig/amd.c
+++ mcelog-189/amd.c
@@ -159,6 +159,8 @@ enum cputype select_amd_cputype(u32 fami
 		return CPU_F11H;
 	case 0x12:
@ -135,46 +135,3 @@ Index: mcelog-181/amd.c
 	default:
 		Eprintf("Huh? What family is it: 0x%x?!\n", cpu);
 		return;
-Index: mcelog-181/amd.h
-===================================================================
--- mcelog-181.orig/amd.h
-+++ mcelog-181/amd.h
-@@ -96,4 +96,5 @@ enum rrrr_ids {
- 	case CPU_K8:  \
- 	case CPU_F10H: \
- 	case CPU_F11H: \
-	case CPU_F12H
-+	case CPU_F12H: \
-+	case CPU_F14H
-Index: mcelog-181/mcelog.c
-===================================================================
--- mcelog-181.orig/mcelog.c
-+++ mcelog-181/mcelog.c
-@@ -232,6 +232,7 @@ static char *cputype_name[] = {
- 	[CPU_F10H] = "AMD Greyhound",
- 	[CPU_F11H] = "AMD Griffin",
- 	[CPU_F12H] = "AMD Llano",
-+	[CPU_F14H] = "AMD Bobcat",
- 	[CPU_P4] = "Intel P4",
- 	[CPU_NEHALEM] = "Intel Xeon 5500 series / Core i3/5/7 (\"Nehalem/Westmere\")",
- 	[CPU_DUNNINGTON] = "Intel Xeon 7400 series",
-@@ -275,6 +276,7 @@ static struct config_choice cpu_choices[
- 	{ "f10h", CPU_F10H },
- 	{ "f11h", CPU_F11H },
- 	{ "f12h", CPU_F12H },
-+	{ "f14h", CPU_F14H },
- 	{ "p4", CPU_P4 },
- 	{ "dunnington", CPU_DUNNINGTON },
- 	{ "xeon74xx", CPU_DUNNINGTON },
-Index: mcelog-181/mcelog.h
-===================================================================
--- mcelog-181.orig/mcelog.h
-+++ mcelog-181/mcelog.h
-@@ -122,6 +122,7 @@ enum cputype {
- 	CPU_F10H,
- 	CPU_F11H,
- 	CPU_F12H,
-+	CPU_F14H,
- 	CPU_P4,
- 	CPU_NEHALEM,
- 	CPU_DUNNINGTON,
--- a/add-f15h-support.patch
+++ b/add-f15h-support.patch
@ -8,10 +8,10 @@ Signed-off-by: Borislav Petkov <bp@suse.de>
 mcelog.h |    1 
 4 files changed, 165 insertions(+), 1 deletion(-)

-Index: mcelog-181/amd.c
+Index: mcelog-189/amd.c
 ===================================================================
--- mcelog-181.orig/amd.c
-+++ mcelog-181/amd.c
+--- mcelog-189.orig/amd.c
+++ mcelog-189/amd.c
@@ -72,6 +72,43 @@ static char *nbextendederr[] = {
 	"L3 Cache LRU Error"
 };
@ -221,46 +221,3 @@ Index: mcelog-181/amd.c
 	default:
 		Eprintf("Huh? What family is it: 0x%x?!\n", cpu);
 		return;
-Index: mcelog-181/amd.h
-===================================================================
--- mcelog-181.orig/amd.h
-+++ mcelog-181/amd.h
-@@ -97,4 +97,5 @@ enum rrrr_ids {
- 	case CPU_F10H: \
- 	case CPU_F11H: \
- 	case CPU_F12H: \
-	case CPU_F14H
-+	case CPU_F14H: \
-+	case CPU_F15H
-Index: mcelog-181/mcelog.c
-===================================================================
--- mcelog-181.orig/mcelog.c
-+++ mcelog-181/mcelog.c
-@@ -233,6 +233,7 @@ static char *cputype_name[] = {
- 	[CPU_F11H] = "AMD Griffin",
- 	[CPU_F12H] = "AMD Llano",
- 	[CPU_F14H] = "AMD Bobcat",
-+	[CPU_F15H] = "AMD Bulldozer",
- 	[CPU_P4] = "Intel P4",
- 	[CPU_NEHALEM] = "Intel Xeon 5500 series / Core i3/5/7 (\"Nehalem/Westmere\")",
- 	[CPU_DUNNINGTON] = "Intel Xeon 7400 series",
-@@ -277,6 +278,7 @@ static struct config_choice cpu_choices[
- 	{ "f11h", CPU_F11H },
- 	{ "f12h", CPU_F12H },
- 	{ "f14h", CPU_F14H },
-+	{ "f15h", CPU_F15H },
- 	{ "p4", CPU_P4 },
- 	{ "dunnington", CPU_DUNNINGTON },
- 	{ "xeon74xx", CPU_DUNNINGTON },
-Index: mcelog-181/mcelog.h
-===================================================================
--- mcelog-181.orig/mcelog.h
-+++ mcelog-181/mcelog.h
-@@ -123,6 +123,7 @@ enum cputype {
- 	CPU_F11H,
- 	CPU_F12H,
- 	CPU_F14H,
-+	CPU_F15H,
- 	CPU_P4,
- 	CPU_NEHALEM,
- 	CPU_DUNNINGTON,
--- a/add-f16h-support.patch
+++ b/add-f16h-support.patch
@ -8,10 +8,10 @@ Signed-off-by: Borislav Petkov <bp@suse.de>
 mcelog.h |    1 +
 4 files changed, 58 insertions(+), 1 deletion(-)

-Index: mcelog-181/amd.c
+Index: mcelog-189/amd.c
 ===================================================================
--- mcelog-181.orig/amd.c
-+++ mcelog-181/amd.c
+--- mcelog-189.orig/amd.c
+++ mcelog-189/amd.c
@@ -200,6 +200,8 @@ enum cputype select_amd_cputype(u32 fami
 		return CPU_F14H;
 	case 0x15:
@ -93,46 +93,3 @@ Index: mcelog-181/amd.c
 	default:
 		Eprintf("Huh? What family is it: 0x%x?!\n", cpu);
 		return;
-Index: mcelog-181/amd.h
-===================================================================
--- mcelog-181.orig/amd.h
-+++ mcelog-181/amd.h
-@@ -98,4 +98,5 @@ enum rrrr_ids {
- 	case CPU_F11H: \
- 	case CPU_F12H: \
- 	case CPU_F14H: \
-	case CPU_F15H
-+	case CPU_F15H: \
-+	case CPU_F16H
-Index: mcelog-181/mcelog.c
-===================================================================
--- mcelog-181.orig/mcelog.c
-+++ mcelog-181/mcelog.c
-@@ -234,6 +234,7 @@ static char *cputype_name[] = {
- 	[CPU_F12H] = "AMD Llano",
- 	[CPU_F14H] = "AMD Bobcat",
- 	[CPU_F15H] = "AMD Bulldozer",
-+	[CPU_F16H] = "AMD Jaguar",
- 	[CPU_P4] = "Intel P4",
- 	[CPU_NEHALEM] = "Intel Xeon 5500 series / Core i3/5/7 (\"Nehalem/Westmere\")",
- 	[CPU_DUNNINGTON] = "Intel Xeon 7400 series",
-@@ -279,6 +280,7 @@ static struct config_choice cpu_choices[
- 	{ "f12h", CPU_F12H },
- 	{ "f14h", CPU_F14H },
- 	{ "f15h", CPU_F15H },
-+	{ "f16h", CPU_F16H },
- 	{ "p4", CPU_P4 },
- 	{ "dunnington", CPU_DUNNINGTON },
- 	{ "xeon74xx", CPU_DUNNINGTON },
-Index: mcelog-181/mcelog.h
-===================================================================
--- mcelog-181.orig/mcelog.h
-+++ mcelog-181/mcelog.h
-@@ -124,6 +124,7 @@ enum cputype {
- 	CPU_F12H,
- 	CPU_F14H,
- 	CPU_F15H,
-+	CPU_F16H,
- 	CPU_P4,
- 	CPU_NEHALEM,
- 	CPU_DUNNINGTON,
--- a/30
+++ b/30
@ -0,0 +1,30 @@
+Index: mcelog-189/mkcputype
+===================================================================
+--- mcelog-189.orig/mkcputype
+++ mcelog-189/mkcputype
+@@ -5,6 +5,12 @@ awk -F\| 'BEGIN {
+ 	print "enum cputype {" > "cputype.tmp"
+ 	print "\tCPU_GENERIC," > "cputype.tmp"
+ 	print "\tCPU_K8," > "cputype.tmp"
+	print "\tCPU_F10H," > "cputype.tmp"
+	print "\tCPU_F11H," > "cputype.tmp"
+	print "\tCPU_F12H," > "cputype.tmp"
+	print "\tCPU_F14H," > "cputype.tmp"
+	print "\tCPU_F15H," > "cputype.tmp"
+	print "\tCPU_F16H," > "cputype.tmp"
+ 
+ 	print "\n\n/* Insert any new non-intel CPU models before this line */\n\n" > "cputype.tmp"
+ 	print "\tCPU_INTEL," > "cputype.tmp"
+@@ -44,6 +50,12 @@ END {
+ 	print "char *cputype_name[] = {" > "lookup_intel_cputype.tmp"
+ 	print "\t[CPU_GENERIC] = \"generic CPU\"," > "lookup_intel_cputype.tmp"
+ 	print "\t[CPU_K8] = \"AMD K8 and derivates\"," > "lookup_intel_cputype.tmp"
+	print "\t[CPU_F10H] = \"AMD Greyhound\"," > "lookup_intel_cputype.tmp"
+	print "\t[CPU_F11H] = \"AMD Griffin\"," > "lookup_intel_cputype.tmp"
+	print "\t[CPU_F12H] = \"AMD Llano\"," > "lookup_intel_cputype.tmp"
+	print "\t[CPU_F14H] = \"AMD Bobcat\"," > "lookup_intel_cputype.tmp"
+	print "\t[CPU_F15H] = \"AMD Bulldozer\"," > "lookup_intel_cputype.tmp"
+	print "\t[CPU_F16H] = \"AMD Jaguar\"," > "lookup_intel_cputype.tmp"
+ 	print "\t[CPU_INTEL] = \"Intel generic architectural MCA\"," > "lookup_intel_cputype.tmp"
+ 	print "\t[CPU_P4] = \"Intel P4\"," > "lookup_intel_cputype.tmp"
+ 	print "\t[CPU_TULSA] = \"Intel Xeon 7100 series\"," > "lookup_intel_cputype.tmp"
--- a/email.patch
+++ b/email.patch
@ -7,23 +7,24 @@
 msg.c    |    8 ++
 6 files changed, 346 insertions(+), 3 deletions(-)

-Index: mcelog-181/Makefile
+Index: mcelog-189/Makefile
 ===================================================================
--- mcelog-181.orig/Makefile
-+++ mcelog-181/Makefile
+--- mcelog-189.orig/Makefile
+++ mcelog-189/Makefile
@@ -1,3 +1,4 @@
 +CONFIG_EMAIL := 1
 CFLAGS := -g -Os
 prefix := /usr
 etcprefix :=
-@@ -38,15 +39,23 @@ OBJ := p4.o k8.o mcelog.o dmi.o tsc.o co
+@@ -38,16 +39,24 @@ OBJ := p4.o k8.o mcelog.o dmi.o tsc.o co
        broadwell_de.o broadwell_epex.o skylake_xeon.o		 \
        denverton.o i10nm.o					 \
-        msr.o bus.o unknown.o
+        msr.o bus.o unknown.o lookup_intel_cputype.o
 +EMAIL_OBJ := email.o
 CLEAN := mcelog dmi tsc dbquery .depend .depend.X dbquery.o \
-	version.o version.c version.tmp
-+	 ${EMAIL_OBJ} version.o version.c version.tmp
+ 	version.o version.c version.tmp cputype.h cputype.tmp \
+-	lookup_intel_cputype.c lookup_intel_cputype.tmp
+	lookup_intel_cputype.c lookup_intel_cputype.tmp ${EMAIL_OBJ}
 DOC := mce.pdf
 
 ADD_DEFINES :=
@ -40,8 +41,8 @@ Index: mcelog-181/Makefile
 +	$(CC) $(LDFLAGS) $^ ${LIBS} -o $@
 
 # dbquery intentionally not installed by default
- install: mcelog mcelog.conf mcelog.conf.5 mcelog.triggers.5
-@@ -81,7 +90,7 @@ dbquery: db.o dbquery.o memutil.o
+ install: install-nodoc mcelog.conf.5 mcelog.triggers.5
+@@ -85,7 +94,7 @@ dbquery: db.o dbquery.o memutil.o
 depend: .depend
 
 %.o: %.c
@ -50,10 +51,10 @@ Index: mcelog-181/Makefile
 
 version.tmp: FORCE
 	( printf "char version[] = \"" ; 			\
-Index: mcelog-181/email.c
+Index: mcelog-189/email.c
 ===================================================================
 --- /dev/null
-+++ mcelog-181/email.c
+++ mcelog-189/email.c
@@ -0,0 +1,200 @@
 +#include <unistd.h>
 +#include <signal.h>
@ -255,10 +256,10 @@ Index: mcelog-181/email.c
 +	smtp_destroy_session (session);
 +	return 0;
 +}
-Index: mcelog-181/email.h
+Index: mcelog-189/email.h
 ===================================================================
 --- /dev/null
-+++ mcelog-181/email.h
+++ mcelog-189/email.h
@@ -0,0 +1,34 @@
 +#ifndef _MCELOG_EMAIL_H_
 +#define _MCELOG_EMAIL_H_
@ -294,10 +295,10 @@ Index: mcelog-181/email.h
 +#endif
 +
 +#endif
-Index: mcelog-181/mcelog.c
+Index: mcelog-189/mcelog.c
 ===================================================================
--- mcelog-181.orig/mcelog.c
-+++ mcelog-181/mcelog.c
+--- mcelog-189.orig/mcelog.c
+++ mcelog-189/mcelog.c
@@ -37,6 +37,7 @@
 #include <assert.h>
 #include <signal.h>
@ -325,7 +326,7 @@ Index: mcelog-181/mcelog.c
 static char *inputfile;
 char *processor_flags;
 static int foreground;
-@@ -1024,6 +1028,7 @@ void usage(void)
+@@ -906,6 +910,7 @@ void usage(void)
 "--max-corr-err-counters Max page correctable error counters\n"
 "--help	             Display this message.\n"
 		);
@ -333,7 +334,7 @@ Index: mcelog-181/mcelog.c
 	printf("\n");
 	print_cputypes();
 }
-@@ -1095,6 +1100,7 @@ static struct option options[] = {
+@@ -977,6 +982,7 @@ static struct option options[] = {
 	{ "max-corr-err-counters", 1, NULL, O_MAX_CORR_ERR_COUNTERS },
 	{ "help", 0, NULL, O_HELP },
 	{ "is-cpu-supported", 0, NULL, O_IS_CPU_SUPPORTED },
@ -341,7 +342,7 @@ Index: mcelog-181/mcelog.c
 	{}
 };
 
-@@ -1289,11 +1295,86 @@ static void drop_cred(void)
+@@ -1171,11 +1177,86 @@ static void drop_cred(void)
 	}
 }
 
@ -428,7 +429,7 @@ Index: mcelog-181/mcelog.c
 
 	if (recordlen == 0) {
 		Wprintf("no data in mce record\n");
-@@ -1320,12 +1401,16 @@ static void process(int fd, unsigned rec
+@@ -1202,12 +1283,16 @@ static void process(int fd, unsigned rec
 			finish = 1;
 		if (!mce_filter(mce, recordlen)) 
 			continue;
@ -445,7 +446,7 @@ Index: mcelog-181/mcelog.c
 		flushlog();
 	}
 
-@@ -1439,6 +1524,8 @@ int main(int ac, char **av)
+@@ -1321,6 +1406,8 @@ int main(int ac, char **av)
 			noargs(ac, av);
 			fprintf(stderr, "mcelog %s\n", MCELOG_VERSION);
 			exit(0);
@ -454,7 +455,7 @@ Index: mcelog-181/mcelog.c
 		} else if (opt == 0)
 			break;		    
 	} 
-@@ -1473,6 +1560,10 @@ int main(int ac, char **av)
+@@ -1355,6 +1442,10 @@ int main(int ac, char **av)
 		usage();
 		exit(1);
 	}
@ -465,11 +466,11 @@ Index: mcelog-181/mcelog.c
 	checkdmi();
 	general_setup();
 		
-Index: mcelog-181/mcelog.h
+Index: mcelog-189/mcelog.h
 ===================================================================
--- mcelog-181.orig/mcelog.h
-+++ mcelog-181/mcelog.h
-@@ -157,6 +157,7 @@ enum cputype {
+--- mcelog-189.orig/mcelog.h
+++ mcelog-189/mcelog.h
+@@ -118,6 +118,7 @@ extern int open_logfile(char *fn);
 enum option_ranges {
 	O_COMMON = 500,
 	O_DISKDB = 1000,
@ -477,10 +478,10 @@ Index: mcelog-181/mcelog.h
 };
 
 enum syslog_opt { 
-Index: mcelog-181/msg.c
+Index: mcelog-189/msg.c
 ===================================================================
--- mcelog-181.orig/msg.c
-+++ mcelog-181/msg.c
+--- mcelog-189.orig/msg.c
+++ mcelog-189/msg.c
@@ -8,10 +8,13 @@
 #include "mcelog.h"
 #include "msg.h"
--- a/fix_setgroups_missing_call.patch
+++ b/fix_setgroups_missing_call.patch
@ -2,10 +2,10 @@
 mcelog.c |    9 +++++++++
 1 file changed, 9 insertions(+)

-Index: mcelog-181/mcelog.c
+Index: mcelog-189/mcelog.c
 ===================================================================
--- mcelog-181.orig/mcelog.c
-+++ mcelog-181/mcelog.c
+--- mcelog-189.orig/mcelog.c
+++ mcelog-189/mcelog.c
@@ -37,6 +37,7 @@
 #include <assert.h>
 #include <signal.h>
@ -14,7 +14,7 @@ Index: mcelog-181/mcelog.c
 #include <sys/wait.h>
 #include <fnmatch.h>
 #include "mcelog.h"
-@@ -1286,6 +1287,14 @@ static void general_setup(void)
+@@ -1155,6 +1156,14 @@ static void general_setup(void)
 
 static void drop_cred(void)
 {
--- a/mcelog.changes
+++ b/mcelog.changes
@ -1,5 +1,5 @@
 -------------------------------------------------------------------
-Wed May 31 07:22:31 UTC 2023 - trenn@suse.de
+Mon Jun 12 15:19:27 UTC 2023 - trenn@suse.de

 - Update to version 194:
  * mcelog: New model number for Arrowlake
@ -10,6 +10,15 @@ Wed May 31 07:22:31 UTC 2023 - trenn@suse.de
  * mcelog: Add decode support for Sapphire Rapids
  * Update PFA_test_howto
  * mcelog: Add support for Meteor Lake
+
+-------------------------------------------------------------------
+Thu Oct 06 14:56:44 UTC 2022 - trenn@suse.de
+
+- Includes following SLE 15 SP5 jira features:
+  * jsc#PED-671 mcelog: Update to latest release
+  * jsc#PED-686 [CPU Features] Update mcelog support for ADL-N
+  * jsc#PED-638 [CPU Features] Update mcelog support for MTL-P
+- Update to version 189:
  * mcelog: Add another Raptor Lake CPU model
  * Fix generation of cputype files
  * mcelog: Add missing model numbers for Broadwell and Raptorlake
@ -27,31 +36,7 @@ Wed May 31 07:22:31 UTC 2023 - trenn@suse.de
  * mcelog: Add two more Alderlake model numbers
  * mcelog: Reduce default threshold for corrected error page offline
  * Make genconfig use python3
-
-------------------------------------------------------------------
-Tue May 03 11:32:42 UTC 2022 - moritz.kodytek@suse.com
-
- Update to version 181:
  * mcelog: Add support for Raptorlake
- Adopt patches to latest git version
-M    Start-consolidating-AMD-specific-stuff.patch
-M    add-f10h-support.patch
-M    add-f11h-support.patch
-M    add-f12h-support.patch
-M    add-f14h-support.patch
-M    add-f15h-support.patch
-M    add-f16h-support.patch
-M    email.patch
-M    fix_setgroups_missing_call.patch
-M    mcelog_invert_prefill_db_warning.patch
- Use Python3 shebang instead of python
-A    python3_shebang
- Use Github URL
-
-------------------------------------------------------------------
-Wed Apr 13 12:44:57 UTC 2022 - moritz.kodytek@suse.com
-
- Update to version 180:
  * Fix warnings in sysfs.c
  * mcelog: Change "DDR4" string to "DDR" for i10nm platforms
  * Fix logrotate syntax
@ -61,7 +46,21 @@ Wed Apr 13 12:44:57 UTC 2022 - moritz.kodytek@suse.com
  * fix the buf not freed in read_field
  * mcelog: Print warning for locked down kernel
  * mcelog: Handle sysfs files without length
-  * Fix make test fail
+- Had to adopt to latest CPU identification model
+  mainline patch:
+  b54ee05056a76e mcelog: Drop CASE_INTEL define
+  and friends
+A    add_new_amd_cpu_defines
+D    add-defines.patch
+M    Start-consolidating-AMD-specific-stuff.patch
+M    add-f10h-support.patch
+M    add-f11h-support.patch
+M    add-f12h-support.patch
+M    add-f14h-support.patch
+M    add-f15h-support.patch
+M    add-f16h-support.patch
+M    email.patch
+M    fix_setgroups_missing_call.patch

 -------------------------------------------------------------------
 Wed Sep 01 14:30:27 UTC 2021 - trenn@suse.de
--- a/mcelog.spec
+++ b/mcelog.spec
@ -1,7 +1,7 @@
 #
 # spec file for package mcelog
 #
-# Copyright (c) 2023 SUSE LLC
+# Copyright (c) 2021 SUSE LLC
 #
 # All modifications and additions to the file contributed by third parties
 # remain the property of their copyright owners, unless otherwise agreed
@ -35,7 +35,7 @@ Source6:        README.email_setup
 Patch1:         email.patch
 Patch2:         mcelog_invert_prefill_db_warning.patch
 Patch3:         Start-consolidating-AMD-specific-stuff.patch
-Patch4:         patches/add-defines.patch
+Patch4:         add_new_amd_cpu_defines
 Patch5:         patches/add-f10h-support.patch
 Patch6:         patches/add-f11h-support.patch
 Patch7:         patches/add-f12h-support.patch
@ -44,8 +44,6 @@ Patch9:         patches/add-f15h-support.patch
 Patch10:        patches/add-f16h-support.patch
 Patch11:        mcelog-socket-path.patch
 Patch12:        fix_setgroups_missing_call.patch
-Patch13:        python3_shebang
-BuildRequires:  %{pythons}
 BuildRequires:  libesmtp-devel
 BuildRequires:  pkgconfig
 BuildRequires:  pkgconfig(systemd)
--- a/mcelog_invert_prefill_db_warning.patch
+++ b/mcelog_invert_prefill_db_warning.patch
@ -2,11 +2,9 @@
 memdb.c |   10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

-Index: mcelog-181/memdb.c
-===================================================================
--- mcelog-181.orig/memdb.c
-+++ mcelog-181/memdb.c
-@@ -431,11 +431,11 @@ void prefill_memdb(int do_dmi)
+--- a/memdb.c
+++ b/memdb.c
+@@ -431,11 +431,11 @@
 		md->location = xstrdup(bl);
 		md->name = xstrdup(dmi_getstring(&d->header, d->device_locator));
 	}
--- a/13
+++ b/13
@ -1,13 +0,0 @@
-Index: mcelog-181/genconfig.py
-===================================================================
--- mcelog-181.orig/genconfig.py
-+++ mcelog-181/genconfig.py
-@@ -1,7 +1,6 @@
-#!/usr/bin/python
-+#!/usr/bin/python3
- # generate man config documentation from mcelog.conf example
- # genconfig.py mcelog.conf intro.html
-from __future__ import print_function
- import sys
- import re
- import argparse