f0c14548c0
- Update to bugfix version 1.36 - Do not start mcelog service based on an udev (/dev/mcelog) rule (bsc#976781) OBS-URL: https://build.opensuse.org/request/show/394481 OBS-URL: https://build.opensuse.org/package/show/Base:System/mcelog?expand=0&rev=55
100 lines
2.8 KiB
Diff
100 lines
2.8 KiB
Diff
Add F11h decoding support
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Signed-off-by: Borislav Petkov <bp@suse.de>
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Index: mcelog-1.36/amd.c
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===================================================================
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--- mcelog-1.36.orig/amd.c 2016-05-03 17:45:35.943971068 +0200
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+++ mcelog-1.36/amd.c 2016-05-03 17:45:39.500173684 +0200
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@@ -155,6 +155,8 @@ enum cputype select_amd_cputype(u32 fami
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return CPU_K8;
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case 0x10:
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return CPU_F10H;
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+ case 0x11:
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+ return CPU_F11H;
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default:
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break;
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}
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@@ -367,6 +369,16 @@ static bool f10h_mc0_mce(u16 ec, u8 xec)
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return f12h_mc0_mce(ec, xec);
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}
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+static bool k8_mc0_mce(u16 ec, u8 xec)
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+{
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+ if (BUS_ERROR(ec)) {
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+ Wprintf("during system linefill.\n");
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+ return true;
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+ }
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+
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+ return f10h_mc0_mce(ec, xec);
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+}
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+
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static void decode_mc0_mce(struct amd_decoder_ops *ops, struct mce *m)
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{
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u16 ec = EC(m->status);
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@@ -630,6 +642,12 @@ struct amd_decoder_ops fam_ops[] = {
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.mc1_mce = k8_mc1_mce,
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.mc2_mce = k8_mc2_mce,
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},
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+ [AMD_F11H] = {
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+ .cpu = AMD_F11H,
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+ .mc0_mce = k8_mc0_mce,
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+ .mc1_mce = k8_mc1_mce,
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+ .mc2_mce = k8_mc2_mce,
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+ },
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};
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static void __decode_amd_mc(enum cputype cpu, struct mce *mce)
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@@ -640,6 +658,9 @@ static void __decode_amd_mc(enum cputype
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case CPU_F10H:
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ops = &fam_ops[AMD_F10H];
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break;
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+ case CPU_F11H:
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+ ops = &fam_ops[AMD_F11H];
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+ break;
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default:
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Eprintf("Huh? What family is it: 0x%x?!\n", cpu);
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return;
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Index: mcelog-1.36/amd.h
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===================================================================
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--- mcelog-1.36.orig/amd.h 2016-05-03 17:45:35.943971068 +0200
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+++ mcelog-1.36/amd.h 2016-05-03 17:45:39.500173684 +0200
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@@ -93,4 +93,5 @@ enum rrrr_ids {
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#define CASE_AMD_CPUS \
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case CPU_K8: \
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- case CPU_F10H
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+ case CPU_F10H: \
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+ case CPU_F11H
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Index: mcelog-1.36/mcelog.h
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===================================================================
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--- mcelog-1.36.orig/mcelog.h 2016-05-03 17:45:35.943971068 +0200
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+++ mcelog-1.36/mcelog.h 2016-05-03 17:45:39.500173684 +0200
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@@ -112,6 +112,7 @@ enum cputype {
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CPU_CORE2, /* 65nm and 45nm */
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CPU_K8,
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CPU_F10H,
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+ CPU_F11H,
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CPU_P4,
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CPU_NEHALEM,
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CPU_DUNNINGTON,
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Index: mcelog-1.36/mcelog.c
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===================================================================
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--- mcelog-1.36.orig/mcelog.c 2016-05-03 17:45:35.943971068 +0200
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+++ mcelog-1.36/mcelog.c 2016-05-03 17:45:39.500173684 +0200
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@@ -226,6 +226,7 @@ static char *cputype_name[] = {
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[CPU_CORE2] = "Intel Core", /* 65nm and 45nm */
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[CPU_K8] = "AMD K8 and derivates",
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[CPU_F10H] = "AMD Greyhound",
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+ [CPU_F11H] = "AMD Griffin",
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[CPU_P4] = "Intel P4",
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[CPU_NEHALEM] = "Intel Xeon 5500 series / Core i3/5/7 (\"Nehalem/Westmere\")",
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[CPU_DUNNINGTON] = "Intel Xeon 7400 series",
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@@ -253,6 +254,7 @@ static struct config_choice cpu_choices[
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{ "core2", CPU_CORE2 },
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{ "k8", CPU_K8 },
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{ "f10h", CPU_F10H },
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+ { "f11h", CPU_F11H },
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{ "p4", CPU_P4 },
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{ "dunnington", CPU_DUNNINGTON },
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{ "xeon74xx", CPU_DUNNINGTON },
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