mdadm/1005-mdadm-enable-Intel-Alderlake-RSTe-configuration.patch

From 449c8b62164880ab132ad6eec86a8d53f793af69 Mon Sep 17 00:00:00 2001
From: Hannes Reinecke <hare@suse.de>
Date: Tue, 19 Jul 2022 13:18:23 +0800
Subject: [PATCH 19/23] mdadm: enable Intel Alderlake RSTe configuration
Patch-mainline: N/A, SUSE only patch
References: bsc#1201297

Alderlake has a slightly different RST configuration; the UEFI
variable is name 'RstVmdV', and the AHCI controller shows up as
a child device of the VMD bridge, but continues to use the 'AHCI HBA'
PCI class (and not the RAID class as RSTe would normally do).

Signed-off-by: Hannes Reinecke <hare@suse.de>
Acked-by: Coly Li <colyli@suse.de>
---
 platform-intel.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

Index: mdadm-4.2/platform-intel.c
===================================================================
--- mdadm-4.2.orig/platform-intel.c
+++ mdadm-4.2/platform-intel.c
@@ -512,6 +512,7 @@ static const struct imsm_orom *find_imsm
 #define AHCI_PROP "RstSataV"
 #define AHCI_SSATA_PROP "RstsSatV"
 #define AHCI_TSATA_PROP "RsttSatV"
+#define AHCI_RST_PROP "RstVmdV"
 #define VROC_VMD_PROP "RstUefiV"
 #define RST_VMD_PROP "RstVmdV"
 
@@ -519,6 +520,7 @@ static const struct imsm_orom *find_imsm
 	EFI_GUID(0x193dfefa, 0xa445, 0x4302, 0x99, 0xd8, 0xef, 0x3a, 0xad, 0x1a, 0x04, 0xc6)
 
 #define PCI_CLASS_RAID_CNTRL 0x010400
+#define PCI_CLASS_SATA_HBA 0x010601
 
 static int read_efi_var(void *buffer, ssize_t buf_size,
 			const char *variable_name, struct efi_guid guid)
@@ -605,7 +607,8 @@ const struct imsm_orom *find_imsm_efi(st
 	struct imsm_orom orom;
 	struct orom_entry *ret;
 	static const char * const sata_efivars[] = {AHCI_PROP, AHCI_SSATA_PROP,
-						    AHCI_TSATA_PROP};
+						    AHCI_TSATA_PROP,
+						    AHCI_RST_PROP};
 	static const char * const vmd_efivars[] = {VROC_VMD_PROP, RST_VMD_PROP};
 	unsigned long i;
 
@@ -624,7 +627,8 @@ const struct imsm_orom *find_imsm_efi(st
 
 		return NULL;
 	case SYS_DEV_SATA:
-		if (hba->class != PCI_CLASS_RAID_CNTRL)
+		if (hba->class != PCI_CLASS_RAID_CNTRL &&
+		    hba->class != PCI_CLASS_SATA_HBA)
 			return NULL;
 
 		for (i = 0; i < ARRAY_SIZE(sata_efivars); i++) {