- Update to version 4.20:

- Added failsafe mode (F1 at startup)
       - Added support for Intel "Sandy Bridge" CPU
       - Added support for AMD "fusion" CPU
       - Added Coreboot "table forward" support
       - Corrected some memory brand not detected
       - Various bug fixes
- Remove %ifarch x86_64 check in .spec file. The internal Makefile
  already adds -m32 and -as32 itself.

OBS-URL: https://build.opensuse.org/package/show/Base:System/memtest86+?expand=0&rev=9
This commit is contained in:
Thomas Renninger 2011-03-29 13:26:16 +00:00 committed by Git OBS Bridge
parent 02eed58132
commit 64a3710dea
5 changed files with 33 additions and 24 deletions

View File

@ -1,3 +0,0 @@
version https://git-lfs.github.com/spec/v1
oid sha256:10cacb8a6228efe094d5e725ff59aa808104fc86eafa02e55c239ca097877bae
size 188040

3
memtest86+-4.20.tar.bz2 Normal file
View File

@ -0,0 +1,3 @@
version https://git-lfs.github.com/spec/v1
oid sha256:48d963fe7d99161c16f9c237a845ea05e4858c34cdc1713a4ea459404249ffa9
size 188711

View File

@ -1,3 +1,16 @@
-------------------------------------------------------------------
Tue Mar 29 15:23:33 CEST 2011 - trenn@suse.de
- Update to version 4.20:
- Added failsafe mode (F1 at startup)
- Added support for Intel "Sandy Bridge" CPU
- Added support for AMD "fusion" CPU
- Added Coreboot "table forward" support
- Corrected some memory brand not detected
- Various bug fixes
- Remove %ifarch x86_64 check in .spec file. The internal Makefile
already adds -m32 and -as32 itself.
-------------------------------------------------------------------
Mon Aug 30 09:59:35 UTC 2010 - trenn@novell.com

View File

@ -1,7 +1,7 @@
#
# spec file for package memtest86+ (Version 4.00)
# spec file for package memtest86+ (Version 4.10)
#
# Copyright (c) 2009 SUSE LINUX Products GmbH, Nuernberg, Germany.
# Copyright (c) 2010 SUSE LINUX Products GmbH, Nuernberg, Germany.
#
# All modifications and additions to the file contributed by third parties
# remain the property of their copyright owners, unless otherwise agreed
@ -18,10 +18,10 @@
Name: memtest86+
Version: 4.10
Version: 4.20
Release: 1
#
License: BSD 3-clause (or similar)
License: BSD3c(or similar)
Group: System/Boot
#
BuildRoot: %{_tmppath}/%{name}-%{version}-build
@ -65,11 +65,7 @@ Authors:
%patch1 -p1
%build
%ifarch x86_64
make CC="gcc -m32" AS="as --32"
%else
make
%endif
%install
install -D -m 0644 memtest.bin $RPM_BUILD_ROOT/boot/memtest.bin

View File

@ -4,10 +4,10 @@
serial.h | 10 ++++++----
3 files changed, 11 insertions(+), 5 deletions(-)
Index: memtest86+-4.00/config.h
Index: memtest86+-4.20/config.h
===================================================================
--- memtest86+-4.00.orig/config.h
+++ memtest86+-4.00/config.h
--- memtest86+-4.20.orig/config.h
+++ memtest86+-4.20/config.h
@@ -13,7 +13,7 @@
/* SERIAL_CONSOLE_DEFAULT - The default state of the serial console. */
/* This is normally off since it slows down testing. Change to a 1 */
@ -17,19 +17,19 @@ Index: memtest86+-4.00/config.h
/* SERIAL_TTY - The default serial port to use. 0=ttyS0, 1=ttyS1 */
#define SERIAL_TTY 0
Index: memtest86+-4.00/init.c
Index: memtest86+-4.20/init.c
===================================================================
--- memtest86+-4.00.orig/init.c
+++ memtest86+-4.00/init.c
--- memtest86+-4.20.orig/init.c
+++ memtest86+-4.20/init.c
@@ -42,6 +42,7 @@ static void cpu_type(void);
static void cacheable(void);
static int cpuspeed(void);
int beepmode;
int beepmode, fail_safe;
+extern short serial_cons;
static void display_init(void)
{
@@ -78,6 +79,9 @@ static void display_init(void)
/* Failsafe function */
/* msec: number of ms to wait - scs: scancode expected to stop */
@@ -125,6 +126,9 @@ static void display_init(void)
}
serial_echo_print("\x1B[0m");
@ -39,10 +39,10 @@ Index: memtest86+-4.00/init.c
}
/*
Index: memtest86+-4.00/serial.h
Index: memtest86+-4.20/serial.h
===================================================================
--- memtest86+-4.00.orig/serial.h
+++ memtest86+-4.00/serial.h
--- memtest86+-4.20.orig/serial.h
+++ memtest86+-4.20/serial.h
@@ -140,10 +140,12 @@
#define serial_echo_inb(a) inb((a)+serial_base_ports[serial_tty])
#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)