Pedro Monreal Gonzalez
6bc57d937f
* SHA-1 is not allowed anymore in FIPS 186-5 for signature
verification operations. After 12/31/2030, NIST will disallow
SHA-1 for all of its usages.
* Add openssl-3-FIPS-Deny-SHA-1-sigver-in-FIPS-provider.patch
- FIPS: RSA keygen PCT requirements.
* Skip the rsa_keygen_pairwise_test() PCT in rsa_keygen() as the
self-test requirements are covered by do_rsa_pct() for both
RSA-OAEP and RSA signatures [bsc#1221760]
* Enforce error state if rsa_keygen PCT is run and fails [bsc#1221753]
* Add openssl-3-FIPS-PCT_rsa_keygen.patch
- FIPS: Check that the fips provider is available before setting
it as the default provider in FIPS mode. [bsc#1220523]
* Rebase openssl-Force-FIPS.patch
- FIPS: Port openssl to use jitterentropy [bsc#1220523]
* Set the module in error state if the jitter RNG fails either on
initialization or entropy gathering because health tests failed.
* Add jitterentropy as a seeding source output also in crypto/info.c
* Move the jitter entropy collector and the associated lock out
of the header file to avoid redefinitions.
* Add the fips_local.cnf symlink to the spec file. This simlink
points to the openssl_fips.config file that is provided by the
crypto-policies package.
* Rebase openssl-3-jitterentropy-3.4.0.patch
* Rebase openssl-FIPS-enforce-EMS-support.patch
- FIPS: Block non-Approved Elliptic Curves [bsc#1221786]
OBS-URL: https://build.opensuse.org/package/show/security:tls/openssl-3?expand=0&rev=110
29 lines
846 B
Diff
29 lines
846 B
Diff
From d2bfec6e464aeb247a2d6853668d4e473f19e15f Mon Sep 17 00:00:00 2001
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From: "fangming.fang" <fangming.fang@arm.com>
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Date: Thu, 7 Dec 2023 06:17:51 +0000
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Subject: [PATCH] Enable BTI feature for md5 on aarch64
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Fixes: #22959
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---
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crypto/md5/asm/md5-aarch64.pl | 3 +++
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1 file changed, 3 insertions(+)
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diff --git a/crypto/md5/asm/md5-aarch64.pl b/crypto/md5/asm/md5-aarch64.pl
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index 3200a0fa9bff0..5a8608069691d 100755
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--- a/crypto/md5/asm/md5-aarch64.pl
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+++ b/crypto/md5/asm/md5-aarch64.pl
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@@ -28,10 +28,13 @@
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*STDOUT=*OUT;
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$code .= <<EOF;
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+#include "arm_arch.h"
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+
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.text
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.globl ossl_md5_block_asm_data_order
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.type ossl_md5_block_asm_data_order,\@function
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ossl_md5_block_asm_data_order:
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+ AARCH64_VALID_CALL_TARGET
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// Save all callee-saved registers
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stp x19,x20,[sp,#-80]!
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stp x21,x22,[sp,#16]
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