c4213577dd
- Fix cache-flush on PPC OBS-URL: https://build.opensuse.org/request/show/102341 OBS-URL: https://build.opensuse.org/package/show/Base:System/pcre?expand=0&rev=33
113 lines
3.8 KiB
Diff
113 lines
3.8 KiB
Diff
Fix cache-flush on PPC
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From:
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r742 | zherczeg | 2011-11-06 09:05:33 +0100 (Ne, 06 lis 2011) | 3 lines
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Fix cache-flush issue on PowerPC, adding some comments and a check for
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disabled PCRE_EXTRA_TABLES.
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Fix cache-flush issue on PowerPC (It is still an experimental JIT port).
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PCRE_EXTRA_TABLES is not suported by JIT, and should be checked before
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calling _pcre_jit_exec. Some extra comments are added.
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Petr Pisar: Changelog removed
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Index: pcre_exec.c
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===================================================================
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--- pcre_exec.c (revision 741)
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+++ pcre_exec.c (revision 742)
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@@ -6011,6 +6011,7 @@
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if (extra_data != NULL
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&& (extra_data->flags & PCRE_EXTRA_EXECUTABLE_JIT) != 0
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&& extra_data->executable_jit != NULL
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+ && (extra_data->flags & PCRE_EXTRA_TABLES) == 0
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&& (options & ~(PCRE_NO_UTF8_CHECK | PCRE_NOTBOL | PCRE_NOTEOL |
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PCRE_NOTEMPTY | PCRE_NOTEMPTY_ATSTART)) == 0)
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return _pcre_jit_exec(re, extra_data->executable_jit, subject, length,
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Index: sljit/sljitLir.h
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===================================================================
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--- sljit/sljitLir.h (revision 741)
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+++ sljit/sljitLir.h (revision 742)
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@@ -56,6 +56,9 @@
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- mainly position independent code
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- Optimizations (perhaps later)
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- Only for basic blocks (when no labels inserted between LIR instructions)
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+
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+ For valgrind users:
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+ - pass --smc-check=all argument to valgrind, since JIT is a "self-modifying code"
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*/
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#if !(defined SLJIT_NO_DEFAULT_CONFIG && SLJIT_NO_DEFAULT_CONFIG)
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@@ -87,6 +90,7 @@
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#define SLJIT_UNUSED 0
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+/* Temporary (scratch) registers may not preserve their values across function calls. */
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#define SLJIT_TEMPORARY_REG1 1
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#define SLJIT_TEMPORARY_REG2 2
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#define SLJIT_TEMPORARY_REG3 3
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@@ -95,6 +99,7 @@
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#define SLJIT_TEMPORARY_EREG1 4
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#define SLJIT_TEMPORARY_EREG2 5
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+/* General (saved) registers preserve their values across function calls. */
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#define SLJIT_GENERAL_REG1 6
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#define SLJIT_GENERAL_REG2 7
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#define SLJIT_GENERAL_REG3 8
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Index: sljit/sljitNativePPC_common.c
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===================================================================
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--- sljit/sljitNativePPC_common.c (revision 741)
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+++ sljit/sljitNativePPC_common.c (revision 742)
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@@ -37,6 +37,18 @@
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Both for ppc-32 and ppc-64. */
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typedef sljit_ui sljit_ins;
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+static void ppc_cache_flush(sljit_ins *from, sljit_ins *to)
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+{
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+ while (from < to) {
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+#ifdef __GNUC__
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+ asm volatile ( "icbi 0, %0" : : "r"(from) );
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+#else
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+#error "Must implement icbi"
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+#endif
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+ from++;
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+ }
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+}
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+
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#define TMP_REG1 (SLJIT_NO_REGISTERS + 1)
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#define TMP_REG2 (SLJIT_NO_REGISTERS + 2)
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#define TMP_REG3 (SLJIT_NO_REGISTERS + 3)
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Index: sljit/sljitConfigInternal.h
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===================================================================
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--- sljit/sljitConfigInternal.h (revision 741)
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+++ sljit/sljitConfigInternal.h (revision 742)
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@@ -178,13 +178,23 @@
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#ifndef SLJIT_CACHE_FLUSH
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-#if !(defined SLJIT_CONFIG_X86_32 && SLJIT_CONFIG_X86_32) && !(defined SLJIT_CONFIG_X86_64 && SLJIT_CONFIG_X86_64)
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- /* Just call __ARM_NR_cacheflush on Linux. */
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+#if (defined SLJIT_CONFIG_PPC_32 && SLJIT_CONFIG_PPC_32) || (defined SLJIT_CONFIG_PPC_64 && SLJIT_CONFIG_PPC_64)
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+
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+/* The __clear_cache() implementation of GCC is a dummy function on PowerPC. */
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#define SLJIT_CACHE_FLUSH(from, to) \
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+ ppc_cache_flush((from), (to))
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+
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+#elif (defined SLJIT_CONFIG_X86_32 && SLJIT_CONFIG_X86_32) || (defined SLJIT_CONFIG_X86_64 && SLJIT_CONFIG_X86_64)
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+
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+/* Not required to implement on archs with unified caches. */
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+#define SLJIT_CACHE_FLUSH(from, to)
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+
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+#else
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+
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+/* Calls __ARM_NR_cacheflush on ARM-Linux. */
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+#define SLJIT_CACHE_FLUSH(from, to) \
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__clear_cache((char*)(from), (char*)(to))
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-#else
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- /* Not required to implement on archs with unified caches. */
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-#define SLJIT_CACHE_FLUSH(from, to)
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+
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#endif
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#endif /* !SLJIT_CACHE_FLUSH */
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