diff --git a/qemu-0.7.0-sigaltstackhack.patch b/qemu-0.7.0-sigaltstackhack.patch deleted file mode 100644 index 6e09cea1..00000000 --- a/qemu-0.7.0-sigaltstackhack.patch +++ /dev/null @@ -1,49 +0,0 @@ ---- linux-user/syscall.c -+++ linux-user/syscall.c -@@ -2727,7 +2727,8 @@ - case TARGET_NR_capset: - goto unimplemented; - case TARGET_NR_sigaltstack: -- goto unimplemented; -+ ret = 0; /* good enough for most purposes */ -+ break; - case TARGET_NR_sendfile: - goto unimplemented; - #ifdef TARGET_NR_getpmsg ---- linux-user/signal.c -+++ linux-user/signal.c -@@ -1014,6 +1021,14 @@ - return err; - } - -+void* hack_stack; -+ -+void hack_handler(int signum) -+{ -+ fprintf(stderr,"QEMU: stack overflow, aborting\n"); -+ exit(-SIGSEGV); -+} -+ - static inline void * - get_sigframe(struct emulated_sigaction *ka, CPUState *regs, int framesize) - { -@@ -1026,6 +1041,19 @@ - if ((ka->sa.sa_flags & SA_ONSTACK) && !sas_ss_flags(sp)) - sp = current->sas_ss_sp + current->sas_ss_size; - #endif -+ -+ /* EVIL HACK TIME! -+ This is supposed to prevent endless segfault loops in case of stack -+ overflows that can occur as a result of the dummy sigaltstack() -+ syscall. */ -+ struct sigaction oldact; -+ struct sigaction act; -+ memset(&act,0,sizeof(struct sigaction)); -+ act.sa_handler=hack_handler; -+ sigaction(SIGSEGV,&act,&oldact); -+ hack_stack = *((void**)((sp-framesize)&~7)); -+ sigaction(SIGSEGV,&oldact,&act); -+ - /* - * ATPCS B01 mandates 8-byte alignment - */ diff --git a/qemu-0.7.1-armfpaex.patch b/qemu-0.7.1-armfpaex.patch index bf7493df..9ec4109f 100644 --- a/qemu-0.7.1-armfpaex.patch +++ b/qemu-0.7.1-armfpaex.patch @@ -1,6 +1,6 @@ --- linux-user/main.c +++ linux-user/main.c -@@ -323,18 +323,54 @@ +@@ -339,18 +339,54 @@ { TaskState *ts = env->opaque; uint32_t opcode; @@ -9,9 +9,9 @@ /* we handle the FPU emulation here, as Linux */ /* we get the opcode */ opcode = tget32(env->regs[15]); - + - if (EmulateAll(opcode, &ts->fpa, env) == 0) { -+ if ((rc=EmulateAll(opcode, &ts->fpa, env)) == 0) { /* illegal instruction */ ++ if ((rc=EmulateAll(opcode, &ts->fpa, env)) == 0) { info.si_signo = SIGILL; info.si_errno = 0; info.si_code = TARGET_ILL_ILLOPN; diff --git a/qemu-0.7.1-jobsignals.patch b/qemu-0.7.1-jobsignals.patch index 35493478..179a8310 100644 --- a/qemu-0.7.1-jobsignals.patch +++ b/qemu-0.7.1-jobsignals.patch @@ -1,6 +1,6 @@ --- linux-user/signal.c +++ linux-user/signal.c -@@ -341,10 +341,15 @@ +@@ -364,10 +364,15 @@ k = &sigact_table[sig - 1]; handler = k->sa._sa_handler; if (handler == TARGET_SIG_DFL) { @@ -9,8 +9,8 @@ + return 0; + } else /* default handler : ignore some signal. The other are fatal */ - if (sig != TARGET_SIGCHLD && - sig != TARGET_SIGURG && + if (sig != TARGET_SIGCHLD && + sig != TARGET_SIGURG && - sig != TARGET_SIGWINCH) { + sig != TARGET_SIGWINCH && + sig != TARGET_SIGCONT) { diff --git a/qemu-0.8.3-gcc4.patch b/qemu-0.8.3-gcc4.patch index 8287f4d9..b15eb2eb 100644 --- a/qemu-0.8.3-gcc4.patch +++ b/qemu-0.8.3-gcc4.patch @@ -13,9 +13,10 @@ * gcc4 host support. ---- qemu-0.8.3/dyngen-exec.h.gcc4 2006-12-23 01:49:32.000000000 +0100 -+++ qemu-0.8.3/dyngen-exec.h 2007-01-30 18:14:25.000000000 +0100 -@@ -188,7 +188,12 @@ extern int printf(const char *, ...); +================================================================================ +--- qemu/dyngen-exec.h ++++ qemu/dyngen-exec.h +@@ -194,7 +194,12 @@ #endif /* force GCC to generate only one epilog at the end of the function */ @@ -28,7 +29,7 @@ #ifndef OPPROTO #define OPPROTO -@@ -238,9 +243,16 @@ extern int __op_jmp0, __op_jmp1, __op_jm +@@ -244,11 +249,18 @@ #endif #if defined(__i386__) @@ -49,8 +50,10 @@ +#define GOTO_LABEL_PARAM(n) \ + asm volatile ("cli;.long " ASM_NAME(__op_gen_label) #n " - 1f;1:") #elif defined(__powerpc__) ---- qemu-0.8.3/dyngen.c.gcc4 2006-12-21 17:49:27.000000000 +0100 -+++ qemu-0.8.3/dyngen.c 2007-01-30 18:11:21.000000000 +0100 + #define EXIT_TB() asm volatile ("blr") + #define GOTO_LABEL_PARAM(n) asm volatile ("b " ASM_NAME(__op_gen_label) #n) +--- qemu/dyngen.c ++++ qemu/dyngen.c @@ -32,6 +32,8 @@ #include "config-host.h" @@ -60,7 +63,7 @@ /* NOTE: we test CONFIG_WIN32 instead of _WIN32 to enabled cross compilation */ #if defined(CONFIG_WIN32) -@@ -1414,6 +1416,644 @@ int arm_emit_ldr_info(const char *name, +@@ -1429,6 +1431,644 @@ #endif @@ -705,7 +708,7 @@ #define MAX_ARGS 3 /* generate op code */ -@@ -1427,6 +2067,11 @@ void gen_code(const char *name, host_ulo +@@ -1442,6 +2082,11 @@ uint8_t args_present[MAX_ARGS]; const char *sym_name, *p; EXE_RELOC *rel; @@ -717,7 +720,7 @@ /* Compute exact size excluding prologue and epilogue instructions. * Increment start_offset to skip epilogue instructions, then compute -@@ -1437,33 +2082,12 @@ void gen_code(const char *name, host_ulo +@@ -1452,33 +2097,12 @@ p_end = p_start + size; start_offset = offset; #if defined(HOST_I386) || defined(HOST_X86_64) @@ -748,11 +751,11 @@ + retpos = trace_i386_op(name, p_start, &len, &patch_bytes, exit_addrs); copy_size = len; } --#endif +-#endif #elif defined(HOST_PPC) { uint8_t *p; -@@ -1675,6 +2299,13 @@ void gen_code(const char *name, host_ulo +@@ -1710,6 +2334,13 @@ } if (gen_switch == 2) { @@ -766,7 +769,7 @@ fprintf(outfile, "DEF(%s, %d, %d)\n", name + 3, nb_args, copy_size); } else if (gen_switch == 1) { -@@ -1879,7 +2510,43 @@ void gen_code(const char *name, host_ulo +@@ -1915,7 +2546,43 @@ #error unsupport object format #endif } @@ -810,7 +813,7 @@ } #elif defined(HOST_X86_64) { -@@ -1913,6 +2580,42 @@ void gen_code(const char *name, host_ulo +@@ -1949,6 +2616,42 @@ } } } @@ -853,9 +856,9 @@ } #elif defined(HOST_PPC) { ---- qemu-0.8.3/exec-all.h.gcc4 2006-11-12 21:40:55.000000000 +0100 -+++ qemu-0.8.3/exec-all.h 2007-01-30 18:11:21.000000000 +0100 -@@ -326,14 +326,15 @@ do {\ +--- qemu/exec-all.h ++++ qemu/exec-all.h +@@ -339,14 +339,15 @@ #elif defined(__i386__) && defined(USE_DIRECT_JUMP) @@ -873,9 +876,9 @@ "1:\n");\ } while (0) ---- qemu-0.8.3/target-i386/op.c~ 2007-02-17 17:12:48.000000000 +0100 -+++ qemu-0.8.3/target-i386/op.c 2007-02-17 17:48:46.000000000 +0100 -@@ -303,6 +303,7 @@ +--- qemu/target-i386/op.c ++++ qemu/target-i386/op.c +@@ -290,6 +290,7 @@ EDX = (uint32_t)(res >> 32); CC_DST = res; CC_SRC = (res != (int32_t)res); @@ -883,7 +886,7 @@ } void OPPROTO op_imulw_T0_T1(void) -@@ -312,6 +313,7 @@ +@@ -299,6 +300,7 @@ T0 = res; CC_DST = res; CC_SRC = (res != (int16_t)res); @@ -891,7 +894,7 @@ } void OPPROTO op_imull_T0_T1(void) -@@ -321,6 +323,7 @@ +@@ -308,6 +310,7 @@ T0 = res; CC_DST = res; CC_SRC = (res != (int32_t)res); diff --git a/qemu-0.9.0-nousbdevfs.patch b/qemu-0.9.0-nousbdevfs.patch index 5012291b..db3a0986 100644 --- a/qemu-0.9.0-nousbdevfs.patch +++ b/qemu-0.9.0-nousbdevfs.patch @@ -1,20 +1,20 @@ ---- usb-linux.c 2006-07-22 19:23:34.000000000 +0200 -+++ usb-linux.c 2007-02-03 09:26:48.000000000 +0100 -@@ -50,7 +50,7 @@ - - //#define DEBUG +--- usb-linux.c ++++ usb-linux.c +@@ -52,7 +52,7 @@ + //#define DEBUG_ISOCH + //#define USE_ASYNCIO -#define USBDEVFS_PATH "/proc/bus/usb" +#define USBDEVFS_PATH "/dev/bus/usb" #define PRODUCT_NAME_SZ 32 - - typedef struct USBHostDevice { -@@ -257,102 +257,96 @@ - return (USBDevice *)dev; + #define SIG_ISOCOMPLETE (SIGRTMIN+7) + #define MAX_ENDPOINTS 16 +@@ -707,102 +707,96 @@ + return NULL; } -static int get_tag_value(char *buf, int buf_size, -- const char *str, const char *tag, +- const char *str, const char *tag, - const char *stopchars) -{ - const char *p; @@ -44,12 +44,13 @@ + int bus_num, addr, speed, class_id, product_id, vendor_id; int ret; char product_name[512]; -+ DIR* d; -+ struct dirent* de; - +- - f = fopen(USBDEVFS_PATH "/devices", "r"); - if (!f) { - term_printf("Could not open %s\n", USBDEVFS_PATH "/devices"); ++ DIR* d; ++ struct dirent* de; ++ + d = opendir("/sys/bus/usb/devices"); + if (!d) { + term_printf("Could not open /sys/bus/usb/devices\n"); @@ -66,7 +67,7 @@ - if (line[0] == 'T' && line[1] == ':') { - if (device_count && (vendor_id || product_id)) { - /* New device. Add the previously discovered device. */ -- ret = func(opaque, bus_num, addr, class_id, vendor_id, +- ret = func(opaque, bus_num, addr, class_id, vendor_id, - product_id, product_name, speed); - if (ret) - goto the_end; @@ -173,16 +174,18 @@ - } - if (device_count && (vendor_id || product_id)) { - /* Add the last device. */ -- ret = func(opaque, bus_num, addr, class_id, vendor_id, +- ret = func(opaque, bus_num, addr, class_id, vendor_id, - product_id, product_name, speed); +- } +- the_end: +- fclose(f); + ret = func(opaque, bus_num, addr, class_id, vendor_id, + product_id, product_name, speed); + if (ret) + goto the_end; + } - } - the_end: -- fclose(f); ++ } ++ the_end: + closedir(d); return ret; } diff --git a/qemu-0.7.0-binfmt.patch b/qemu-0.9.0.cvs-binfmt.patch similarity index 70% rename from qemu-0.7.0-binfmt.patch rename to qemu-0.9.0.cvs-binfmt.patch index f2383fca..092b5cec 100644 --- a/qemu-0.7.0-binfmt.patch +++ b/qemu-0.9.0.cvs-binfmt.patch @@ -1,8 +1,8 @@ Index: qemu-0.9.0/qemu-binfmt-conf.sh -=================================================================== ---- qemu-0.9.0.orig/qemu-binfmt-conf.sh -+++ qemu-0.9.0/qemu-binfmt-conf.sh -@@ -12,7 +12,7 @@ fi +================================================================================ +--- qemu/qemu-binfmt-conf.sh ++++ qemu/qemu-binfmt-conf.sh +@@ -12,7 +12,7 @@ # probe cpu type cpu=`uname -m` case "$cpu" in @@ -11,7 +11,7 @@ Index: qemu-0.9.0/qemu-binfmt-conf.sh cpu="i386" ;; m68k) -@@ -24,32 +24,34 @@ case "$cpu" in +@@ -24,36 +24,39 @@ "Power Macintosh"|ppc|ppc64) cpu="ppc" ;; @@ -21,6 +21,7 @@ Index: qemu-0.9.0/qemu-binfmt-conf.sh ;; + sparc*) + cpu="sparc" ++ ;; esac # register the interpreter for each cpu except for the native one @@ -46,13 +47,21 @@ Index: qemu-0.9.0/qemu-binfmt-conf.sh fi if [ $cpu != "m68k" ] ; then echo 'Please check cpu value and header information for m68k!' -- echo ':m68k:M::\x7fELF\x01\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x04\x00\x08:\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff:/usr/local/bin/qemu-m68k:' > /proc/sys/fs/binfmt_misc/register +- echo ':m68k:M::\x7fELF\x01\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x04:\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff:/usr/local/bin/qemu-m68k:' > /proc/sys/fs/binfmt_misc/register + echo ':m68k:M::\x7fELF\x01\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x04\x00\x08:\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff:/usr/bin/qemu-m68k:' > /proc/sys/fs/binfmt_misc/register fi if [ $cpu != "mips" ] ; then # FIXME: We could use the other endianness on a MIPS host. - echo ':mips:M::\x7fELF\x01\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x08:\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff:/usr/local/bin/qemu-mips:' > /proc/sys/fs/binfmt_misc/register - echo ':mipsel:M::\x7fELF\x01\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x08\x00:\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff\xff:/usr/local/bin/qemu-mipsel:' > /proc/sys/fs/binfmt_misc/register +- echo ':mipsn32:M::\x7fELF\x01\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x08:\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff:/usr/local/bin/qemu-mipsn32:' > /proc/sys/fs/binfmt_misc/register +- echo ':mipsn32el:M::\x7fELF\x01\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x08\x00:\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff\xff:/usr/local/bin/qemu-mipsn32el:' > /proc/sys/fs/binfmt_misc/register +- echo ':mips64:M::\x7fELF\x02\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x08:\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff:/usr/local/bin/qemu-mips64:' > /proc/sys/fs/binfmt_misc/register +- echo ':mips64el:M::\x7fELF\x02\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x08\x00:\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff\xff:/usr/local/bin/qemu-mips64el:' > /proc/sys/fs/binfmt_misc/register + echo ':mips:M::\x7fELF\x01\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x08:\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff:/usr/bin/qemu-mips:' > /proc/sys/fs/binfmt_misc/register + echo ':mipsel:M::\x7fELF\x01\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x08\x00:\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff\xff:/usr/bin/qemu-mipsel:' > /proc/sys/fs/binfmt_misc/register ++ echo ':mipsn32:M::\x7fELF\x01\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x08:\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff:/usr/bin/qemu-mipsn32:' > /proc/sys/fs/binfmt_misc/register ++ echo ':mipsn32el:M::\x7fELF\x01\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x08\x00:\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff\xff:/usr/bin/qemu-mipsn32el:' > /proc/sys/fs/binfmt_misc/register ++ echo ':mips64:M::\x7fELF\x02\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x08:\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff:/usr/bin/qemu-mips64:' > /proc/sys/fs/binfmt_misc/register ++ echo ':mips64el:M::\x7fELF\x02\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x08\x00:\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff\xff:/usr/bin/qemu-mips64el:' > /proc/sys/fs/binfmt_misc/register fi diff --git a/qemu-0.9.0.cvs.tar.bz2 b/qemu-0.9.0.cvs.tar.bz2 index f1d91d81..ab4fb6ff 100644 --- a/qemu-0.9.0.cvs.tar.bz2 +++ b/qemu-0.9.0.cvs.tar.bz2 @@ -1,3 +1,3 @@ version https://git-lfs.github.com/spec/v1 -oid sha256:b21915f6e941724eba05dce9b0f96295e4f7ff69b7ea0f743f5798c678b8839e -size 2043438 +oid sha256:8892fead8e0caa1af63419e3376a784e56040e15d82e967e139f54c13ae22b49 +size 2330234 diff --git a/qemu-cvs-alsa_bitfield.patch b/qemu-cvs-alsa_bitfield.patch index 5f77dbe6..ef2a6aff 100644 --- a/qemu-cvs-alsa_bitfield.patch +++ b/qemu-cvs-alsa_bitfield.patch @@ -1,36 +1,8 @@ Index: qemu/thunk.h -=================================================================== ---- qemu.orig/thunk.h -+++ qemu/thunk.h -@@ -38,6 +38,7 @@ typedef enum argtype { - TYPE_PTR, - TYPE_ARRAY, - TYPE_STRUCT, -+ TYPE_INTBITFIELD, - } argtype; - - #define MK_PTR(type) TYPE_PTR, type -@@ -87,6 +88,7 @@ static inline int thunk_type_size(const - case TYPE_SHORT: - return 2; - case TYPE_INT: -+ case TYPE_INTBITFIELD: - return 4; - case TYPE_LONGLONG: - case TYPE_ULONGLONG: -@@ -124,6 +126,7 @@ static inline int thunk_type_align(const - case TYPE_SHORT: - return 2; - case TYPE_INT: -+ case TYPE_INTBITFIELD: - return 4; - case TYPE_LONGLONG: - case TYPE_ULONGLONG: -Index: qemu/thunk.c -=================================================================== ---- qemu.orig/thunk.c +================================================================================ +--- qemu/thunk.c +++ qemu/thunk.c -@@ -40,6 +40,7 @@ static inline const argtype *thunk_type_ +@@ -40,6 +40,7 @@ case TYPE_CHAR: case TYPE_SHORT: case TYPE_INT: @@ -38,7 +10,7 @@ Index: qemu/thunk.c case TYPE_LONGLONG: case TYPE_ULONGLONG: case TYPE_LONG: -@@ -132,6 +133,26 @@ const argtype *thunk_convert(void *dst, +@@ -132,6 +133,26 @@ case TYPE_INT: *(uint32_t *)dst = tswap32(*(uint32_t *)src); break; @@ -65,3 +37,29 @@ Index: qemu/thunk.c case TYPE_LONGLONG: case TYPE_ULONGLONG: *(uint64_t *)dst = tswap64(*(uint64_t *)src); +--- qemu/thunk.h ++++ qemu/thunk.h +@@ -38,6 +38,7 @@ + TYPE_PTR, + TYPE_ARRAY, + TYPE_STRUCT, ++ TYPE_INTBITFIELD, + } argtype; + + #define MK_PTR(type) TYPE_PTR, type +@@ -87,6 +88,7 @@ + case TYPE_SHORT: + return 2; + case TYPE_INT: ++ case TYPE_INTBITFIELD: + return 4; + case TYPE_LONGLONG: + case TYPE_ULONGLONG: +@@ -124,6 +126,7 @@ + case TYPE_SHORT: + return 2; + case TYPE_INT: ++ case TYPE_INTBITFIELD: + return 4; + case TYPE_LONGLONG: + case TYPE_ULONGLONG: diff --git a/qemu-cvs-alsa_ioctl.patch b/qemu-cvs-alsa_ioctl.patch index 2deae202..ef73fba1 100644 --- a/qemu-cvs-alsa_ioctl.patch +++ b/qemu-cvs-alsa_ioctl.patch @@ -1,6 +1,6 @@ Index: qemu/linux-user/ioctls.h -=================================================================== ---- qemu.orig/linux-user/ioctls.h +================================================================================ +--- qemu/linux-user/ioctls.h +++ qemu/linux-user/ioctls.h @@ -300,3 +300,8 @@ @@ -11,9 +11,7 @@ Index: qemu/linux-user/ioctls.h +#ifdef __powerpc__ +#include "ioctls_alsa.h" +#endif -Index: qemu/linux-user/ioctls_alsa.h -=================================================================== ---- /dev/null +--- qemu/linux-user/ioctls_alsa.h +++ qemu/linux-user/ioctls_alsa.h @@ -0,0 +1,467 @@ +#define SNDRV_SEQ_IOCTL_PVERSION _IOR ('S', 0x00, int) @@ -483,9 +481,7 @@ Index: qemu/linux-user/ioctls_alsa.h +IOCTL( SNDRV_SB_CSP_IOCTL_RESTART , 0, TYPE_NULL ) +IOCTL( SND_SSCAPE_LOAD_BOOTB , IOC_RW, MK_PTR(MK_STRUCT(STRUCT_sscape_bootblock)) ) +IOCTL( SND_SSCAPE_LOAD_MCODE , IOC_W, MK_PTR(MK_STRUCT(STRUCT_sscape_microcode)) ) -Index: qemu/linux-user/ioctls_alsa_structs.h -=================================================================== ---- /dev/null +--- qemu/linux-user/ioctls_alsa_structs.h +++ qemu/linux-user/ioctls_alsa_structs.h @@ -0,0 +1,1740 @@ +/* @@ -2228,20 +2224,16 @@ Index: qemu/linux-user/ioctls_alsa_structs.h +{ + unsigned char *code; +}; -Index: qemu/linux-user/syscall_defs.h -=================================================================== ---- qemu.orig/linux-user/syscall_defs.h +--- qemu/linux-user/syscall_defs.h +++ qemu/linux-user/syscall_defs.h -@@ -1677,3 +1677,4 @@ struct target_sysinfo { +@@ -1875,3 +1875,4 @@ #include "socket.h" #include "errno_defs.h" +#include "ioctls_alsa_structs.h" -Index: qemu/linux-user/syscall_types.h -=================================================================== ---- qemu.orig/linux-user/syscall_types.h +--- qemu/linux-user/syscall_types.h +++ qemu/linux-user/syscall_types.h -@@ -79,3 +79,8 @@ STRUCT(count_info, +@@ -79,3 +79,8 @@ STRUCT(mixer_info, MK_ARRAY(TYPE_CHAR, 16), MK_ARRAY(TYPE_CHAR, 32), TYPE_INT, MK_ARRAY(TYPE_INT, 10)) @@ -2250,9 +2242,7 @@ Index: qemu/linux-user/syscall_types.h +#ifdef __powerpc__ +#include "syscall_types_alsa.h" +#endif -Index: qemu/linux-user/syscall_types_alsa.h -=================================================================== ---- /dev/null +--- qemu/linux-user/syscall_types_alsa.h +++ qemu/linux-user/syscall_types_alsa.h @@ -0,0 +1,1337 @@ +/* diff --git a/qemu-cvs-alsa_mmap.patch b/qemu-cvs-alsa_mmap.patch index 1b34f51b..bc44c870 100644 --- a/qemu-cvs-alsa_mmap.patch +++ b/qemu-cvs-alsa_mmap.patch @@ -1,8 +1,8 @@ Index: qemu/linux-user/mmap.c -=================================================================== ---- qemu.orig/linux-user/mmap.c +================================================================================ +--- qemu/linux-user/mmap.c +++ qemu/linux-user/mmap.c -@@ -152,6 +152,9 @@ static int mmap_frag(target_ulong real_s +@@ -153,6 +153,9 @@ return 0; } @@ -10,9 +10,9 @@ Index: qemu/linux-user/mmap.c +#define SNDRV_PCM_MMAP_OFFSET_CONTROL 0x81000000 + /* NOTE: all the constants are the HOST ones */ - long target_mmap(target_ulong start, target_ulong len, int prot, - int flags, int fd, target_ulong offset) -@@ -192,6 +195,17 @@ long target_mmap(target_ulong start, tar + abi_long target_mmap(abi_ulong start, abi_ulong len, int prot, + int flags, int fd, abi_ulong offset) +@@ -194,6 +197,17 @@ } #endif diff --git a/qemu-cvs-atapi.patch b/qemu-cvs-atapi.patch deleted file mode 100644 index f69fa59b..00000000 --- a/qemu-cvs-atapi.patch +++ /dev/null @@ -1,25 +0,0 @@ -Index: qemu-0.9.0/hw/ide.c -=================================================================== ---- qemu-0.9.0.orig/hw/ide.c -+++ qemu-0.9.0/hw/ide.c -@@ -586,7 +586,9 @@ static void ide_transfer_start(IDEState - s->end_transfer_func = end_transfer_func; - s->data_ptr = buf; - s->data_end = buf + size; -- s->status |= DRQ_STAT; -+ /* don't violate the HSM */ -+ if (!(s->status & ERR_STAT)) -+ s->status |= DRQ_STAT; - } - - static void ide_transfer_stop(IDEState *s) -@@ -1805,6 +1807,7 @@ static void ide_ioport_write(void *opaqu - /* overlapping commands not supported */ - if (s->feature & 0x02) - goto abort_cmd; -+ s->status = READY_STAT; - s->atapi_dma = s->feature & 1; - s->nsector = 1; - ide_transfer_start(s, s->io_buffer, ATAPI_PACKET_SIZE, - - diff --git a/qemu-cvs-cache-info.patch b/qemu-cvs-cache-info.patch deleted file mode 100644 index 1b94e3d6..00000000 --- a/qemu-cvs-cache-info.patch +++ /dev/null @@ -1,20 +0,0 @@ -Index: target-i386/helper.c -=================================================================== -RCS file: /sources/qemu/qemu/target-i386/helper.c,v -retrieving revision 1.84 -diff -u -r1.84 helper.c ---- target-i386/helper.c 26 Jun 2007 08:35:18 -0000 1.84 -+++ target-i386/helper.c 8 Sep 2007 16:07:23 -0000 -@@ -1657,10 +1657,10 @@ - break; - case 2: - /* cache info: needed for Pentium Pro compatibility */ -- EAX = 0x410601; -+ EAX = 1; - EBX = 0; - ECX = 0; -- EDX = 0; -+ EDX = 0x2c307d; - break; - case 0x80000000: - EAX = env->cpuid_xlevel; diff --git a/qemu-cvs-eepro100-flow-control.patch b/qemu-cvs-eepro100-flow-control.patch deleted file mode 100644 index f16d8286..00000000 --- a/qemu-cvs-eepro100-flow-control.patch +++ /dev/null @@ -1,26 +0,0 @@ -Index: eepro100.c -=================================================================== -RCS file: /sources/qemu/qemu/hw/eepro100.c,v -retrieving revision 1.3 -diff -u -r1.3 eepro100.c ---- hw/eepro100.c 2 Jul 2007 13:38:46 -0000 1.3 -+++ hw/eepro100.c 10 Sep 2007 08:38:51 -0000 -@@ -140,6 +140,7 @@ - SCBflash = 12, SCBeeprom = 14, /* EEPROM and flash memory control. */ - SCBCtrlMDI = 16, /* MDI interface control. */ - SCBEarlyRx = 20, /* Early receive byte count. */ -+ SCBFlow = 24 - }; - - /* A speedo3 transmit buffer descriptor with two buffers... */ -@@ -1256,6 +1257,10 @@ - eepro100_interrupt(s, 0); - break; - case SCBPort + 3: -+ case SCBFlow: -+ case SCBFlow + 1: -+ case SCBFlow + 2: -+ case SCBFlow + 3: - logout("addr=%s val=0x%02x\n", regname(addr), val); - break; - case SCBeeprom: diff --git a/qemu-cvs-fdc.patch b/qemu-cvs-fdc.patch deleted file mode 100644 index 13074cf3..00000000 --- a/qemu-cvs-fdc.patch +++ /dev/null @@ -1,16 +0,0 @@ ---- qemu-orig/hw/fdc.c Mon Aug 20 19:51:42 2007 -+++ qemu/hw/fdc.c Tue Aug 28 15:46:31 2007 -@@ -1843,5 +1843,13 @@ - static void fdctrl_result_timer(void *opaque) - { - fdctrl_t *fdctrl = opaque; -+ fdrive_t *cur_drv = get_cur_drv(fdctrl); -+ /* Pretend we are spinning. -+ * This is needed for Coherent, which uses READ ID to check for -+ * sector interleaving. -+ */ -+ if (cur_drv->last_sect != 0) { -+ cur_drv->sect = (cur_drv->sect % cur_drv->last_sect) + 1; -+ } - fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00); - } diff --git a/qemu-cvs-flash.patch b/qemu-cvs-flash.patch index 22464548..d468ab88 100644 --- a/qemu-cvs-flash.patch +++ b/qemu-cvs-flash.patch @@ -1,8 +1,8 @@ Index: qemu/linux-user/syscall.c -=================================================================== ---- qemu.orig/linux-user/syscall.c +================================================================================ +--- qemu/linux-user/syscall.c +++ qemu/linux-user/syscall.c -@@ -1736,6 +1736,8 @@ static long do_ipc(long call, long first +@@ -1867,6 +1867,8 @@ switch (call) { case IPCOP_semop: diff --git a/qemu-cvs-futex.patch b/qemu-cvs-futex.patch index b8d38770..a87549be 100644 --- a/qemu-cvs-futex.patch +++ b/qemu-cvs-futex.patch @@ -1,7 +1,7 @@ Index: qemu.bkp/linux-user/syscall.c -=================================================================== ---- qemu.bkp.orig/linux-user/syscall.c -+++ qemu.bkp/linux-user/syscall.c +================================================================================ +--- qemu/linux-user/syscall.c ++++ qemu/linux-user/syscall.c @@ -17,6 +17,8 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. @@ -19,7 +19,7 @@ Index: qemu.bkp/linux-user/syscall.c #include #include #include -@@ -2554,6 +2557,91 @@ static inline void host_to_target_timesp +@@ -2715,6 +2718,91 @@ unlock_user_struct(target_ts, target_addr, 1); } @@ -108,10 +108,10 @@ Index: qemu.bkp/linux-user/syscall.c + return retval; +} + - long do_syscall(void *cpu_env, int num, long arg1, long arg2, long arg3, - long arg4, long arg5, long arg6) - { -@@ -4713,6 +4801,11 @@ long do_syscall(void *cpu_env, int num, + /* do_syscall() should always have a single exit point at the end so + that actions, such as logging of syscall results, can be performed. + All errnos that do_syscall() returns must be -TARGET_. */ +@@ -5116,6 +5204,11 @@ } #endif diff --git a/qemu-cvs-gettimeofday.patch b/qemu-cvs-gettimeofday.patch index 14a37d6d..eed34b43 100644 --- a/qemu-cvs-gettimeofday.patch +++ b/qemu-cvs-gettimeofday.patch @@ -1,8 +1,8 @@ Index: qemu/linux-user/syscall.c -=================================================================== ---- qemu.orig/linux-user/syscall.c +================================================================================ +--- qemu/linux-user/syscall.c +++ qemu/linux-user/syscall.c -@@ -3596,6 +3596,7 @@ long do_syscall(void *cpu_env, int num, +@@ -3895,6 +3895,7 @@ case TARGET_NR_gettimeofday: { struct timeval tv; @@ -10,25 +10,3 @@ Index: qemu/linux-user/syscall.c ret = get_errno(gettimeofday(&tv, NULL)); if (!is_error(ret)) { host_to_target_timeval(arg1, &tv); -Index: qemu/linux-user/signal.c -=================================================================== ---- qemu.orig/linux-user/signal.c -+++ qemu/linux-user/signal.c -@@ -207,6 +207,8 @@ static inline void host_to_target_siginf - /* should never come here, but who knows. The information for - the target is irrelevant */ - tinfo->_sifields._sigfault._addr = 0; -+ } else if (sig == SIGIO) { -+ tinfo->_sifields._sigpoll._fd = info->si_fd; - } else if (sig >= TARGET_SIGRTMIN) { - tinfo->_sifields._rt._pid = info->si_pid; - tinfo->_sifields._rt._uid = info->si_uid; -@@ -228,6 +230,8 @@ static void tswap_siginfo(target_siginfo - sig == SIGBUS || sig == SIGTRAP) { - tinfo->_sifields._sigfault._addr = - tswapl(info->_sifields._sigfault._addr); -+ } else if (sig == SIGIO) { -+ tinfo->_sifields._sigpoll._fd = tswap32(info->_sifields._sigpoll._fd); - } else if (sig >= TARGET_SIGRTMIN) { - tinfo->_sifields._rt._pid = tswap32(info->_sifields._rt._pid); - tinfo->_sifields._rt._uid = tswap32(info->_sifields._rt._uid); diff --git a/qemu-cvs-ia64.patch b/qemu-cvs-ia64.patch index ca245f6c..75fc71db 100644 --- a/qemu-cvs-ia64.patch +++ b/qemu-cvs-ia64.patch @@ -1,6 +1,6 @@ ---- Makefile.target.~1.186.~ 2007-07-02 17:08:34.000000000 +0200 -+++ Makefile.target 2007-07-09 19:13:35.000000000 +0200 -@@ -92,6 +92,8 @@ cc-option = $(shell if $(CC) $(OP_CFLAGS +--- Makefile.target ++++ Makefile.target +@@ -111,6 +111,8 @@ OP_CFLAGS+=$(call cc-option, -fno-reorder-blocks, "") OP_CFLAGS+=$(call cc-option, -fno-gcse, "") OP_CFLAGS+=$(call cc-option, -fno-tree-ch, "") @@ -9,7 +9,7 @@ OP_CFLAGS+=$(call cc-option, -fno-optimize-sibling-calls, "") OP_CFLAGS+=$(call cc-option, -fno-crossjumping, "") OP_CFLAGS+=$(call cc-option, -fno-align-labels, "") -@@ -165,8 +167,9 @@ BASE_LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH) +@@ -185,8 +187,9 @@ endif ifeq ($(ARCH),ia64) @@ -21,8 +21,8 @@ BASE_LDFLAGS+=-Wl,-G0 -Wl,-T,$(SRC_PATH)/$(ARCH).ld endif ---- target-alpha/op.c.~1.1.~ 2007-04-05 08:58:33.000000000 +0200 -+++ target-alpha/op.c 2007-07-09 20:11:42.000000000 +0200 +--- target-alpha/op.c ++++ target-alpha/op.c @@ -18,8 +18,6 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ @@ -31,8 +31,8 @@ - #include "config.h" #include "exec.h" - -@@ -125,8 +123,12 @@ + #include "host-utils.h" +@@ -126,8 +124,12 @@ void OPPROTO op_no_op (void) { #if !defined (DEBUG_OP) @@ -44,4 +44,4 @@ +#endif RETURN(); } - + diff --git a/qemu-cvs-ide-allow-more-powermgmt.patch b/qemu-cvs-ide-allow-more-powermgmt.patch deleted file mode 100644 index 75753a52..00000000 --- a/qemu-cvs-ide-allow-more-powermgmt.patch +++ /dev/null @@ -1,29 +0,0 @@ -diff -r 106bc46793ca hw/ide.c ---- a/hw/ide.c Mon Aug 27 16:20:33 2007 -0400 -+++ b/hw/ide.c Mon Aug 27 16:27:28 2007 -0400 -@@ -1914,6 +1914,8 @@ static void ide_ioport_write(void *opaqu - case 0x67: /* NOP */ - case 0x96: /* NOP */ - case 0x9a: /* NOP */ -+ case 0x42: /* enable Automatic Acoustic Mode */ -+ case 0xc2: /* disable Automatic Acoustic Mode */ - s->status = READY_STAT | SEEK_STAT; - ide_set_irq(s); - break; -@@ -1952,12 +1954,16 @@ static void ide_ioport_write(void *opaqu - s->status = READY_STAT; - ide_set_irq(s); - break; -+ case WIN_STANDBY: -+ case WIN_STANDBY2: - case WIN_STANDBYNOW1: - case WIN_STANDBYNOW2: - case WIN_IDLEIMMEDIATE: - case CFA_IDLEIMMEDIATE: - case WIN_SETIDLE1: - case WIN_SETIDLE2: -+ case WIN_SLEEPNOW1: -+ case WIN_SLEEPNOW2: - s->status = READY_STAT; - ide_set_irq(s); - break; diff --git a/qemu-cvs-ide-dvd.patch b/qemu-cvs-ide-dvd.patch deleted file mode 100644 index 57eade0d..00000000 --- a/qemu-cvs-ide-dvd.patch +++ /dev/null @@ -1,121 +0,0 @@ -Index: hw/ide.c -=================================================================== -RCS file: /sources/qemu/qemu/hw/ide.c,v -retrieving revision 1.65 -diff -u -r1.65 ide.c ---- hw/ide.c 26 Aug 2007 17:42:20 -0000 1.65 -+++ hw/ide.c 8 Sep 2007 16:05:27 -0000 -@@ -261,6 +261,7 @@ - * older drives only. - */ - #define GPCMD_GET_MEDIA_STATUS 0xda -+#define GPCMD_MODE_SENSE_6 0x1a - - /* Mode page codes for mode sense/set */ - #define GPMODE_R_W_ERROR_PAGE 0x01 -@@ -1329,10 +1330,14 @@ - ASC_MEDIUM_NOT_PRESENT); - } - break; -+ case GPCMD_MODE_SENSE_6: - case GPCMD_MODE_SENSE_10: - { - int action, code; -- max_len = ube16_to_cpu(packet + 7); -+ if (packet[0] == GPCMD_MODE_SENSE_10) -+ max_len = ube16_to_cpu(packet + 7); -+ else -+ max_len = packet[4]; - action = packet[2] >> 6; - code = packet[2] & 0x3f; - switch(action) { -@@ -1368,7 +1373,7 @@ - - buf[8] = 0x2a; - buf[9] = 0x12; -- buf[10] = 0x00; -+ buf[10] = 0x08; - buf[11] = 0x00; - - buf[12] = 0x70; -@@ -1582,6 +1587,50 @@ - ide_atapi_cmd_reply(s, 8, 8); - } - break; -+ case GPCMD_READ_DVD_STRUCTURE: -+ { -+ int media = packet[1]; -+ int layer = packet[6]; -+ int format = packet[2]; -+ int64_t total_sectors; -+ -+ if (media != 0 || layer != 0) -+ { -+ ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST, -+ ASC_INV_FIELD_IN_CMD_PACKET); -+ } -+ -+ switch (format) { -+ case 0: -+ bdrv_get_geometry(s->bs, &total_sectors); -+ total_sectors >>= 2; -+ -+ memset(buf, 0, 2052); -+ -+ buf[4] = 1; // DVD-ROM, part version 1 -+ buf[5] = 0xf; // 120mm disc, maximum rate unspecified -+ buf[6] = 0; // one layer, embossed data -+ buf[7] = 0; -+ -+ cpu_to_ube32(buf + 8, 0); -+ cpu_to_ube32(buf + 12, total_sectors - 1); -+ cpu_to_ube32(buf + 16, total_sectors - 1); -+ -+ cpu_to_be16wu((uint16_t *)buf, 2048 + 4); -+ -+ ide_atapi_cmd_reply(s, 2048 + 3, 2048 + 4); -+ break; -+ -+ default: -+ ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST, -+ ASC_INV_FIELD_IN_CMD_PACKET); -+ break; -+ } -+ } -+ break; -+ case GPCMD_SET_SPEED: -+ ide_atapi_cmd_ok(s); -+ break; - case GPCMD_INQUIRY: - max_len = packet[4]; - buf[0] = 0x05; /* CD-ROM */ -@@ -1597,6 +1646,29 @@ - padstr8(buf + 32, 4, QEMU_VERSION); - ide_atapi_cmd_reply(s, 36, max_len); - break; -+ case GPCMD_GET_CONFIGURATION: -+ { -+ int64_t total_sectors; -+ -+ /* only feature 0 is supported */ -+ if (packet[2] != 0 || packet[3] != 0) { -+ ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST, -+ ASC_INV_FIELD_IN_CMD_PACKET); -+ break; -+ } -+ memset(buf, 0, 32); -+ bdrv_get_geometry(s->bs, &total_sectors); -+ buf[3] = 16; -+ buf[7] = total_sectors <= 1433600 ? 0x08 : 0x10; /* current profile */ -+ buf[10] = 0x10 | 0x1; -+ buf[11] = 0x08; /* size of profile list */ -+ buf[13] = 0x10; /* DVD-ROM profile */ -+ buf[14] = buf[7] == 0x10; /* (in)active */ -+ buf[17] = 0x08; /* CD-ROM profile */ -+ buf[18] = buf[7] == 0x08; /* (in)active */ -+ ide_atapi_cmd_reply(s, 32, 32); -+ break; -+ } - default: - ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST, - ASC_ILLEGAL_OPCODE); diff --git a/qemu-cvs-img.patch b/qemu-cvs-img.patch deleted file mode 100644 index b5744dd8..00000000 --- a/qemu-cvs-img.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- Makefile.orig 2007-07-05 14:43:40.000000000 +0000 -+++ Makefile 2007-07-05 14:46:50.000000000 +0000 -@@ -33,7 +33,7 @@ - recurse-all: $(patsubst %,subdir-%, $(TARGET_DIRS)) - - qemu-img$(EXESUF): qemu-img.c cutils.c block.c block-raw.c block-cow.c block-qcow.c aes.c block-vmdk.c block-cloop.c block-dmg.c block-bochs.c block-vpc.c block-vvfat.c block-qcow2.c -- $(CC) -DQEMU_TOOL $(CFLAGS) $(CPPFLAGS) $(BASE_CFLAGS) $(LDFLAGS) $(BASE_LDFLAGS) -o $@ $^ -lz $(LIBS) -+ $(CC) -DQEMU_TOOL $(CFLAGS) $(CPPFLAGS) $(BASE_CFLAGS) $(LDFLAGS) -o $@ $^ -lz $(LIBS) - - dyngen$(EXESUF): dyngen.c - $(HOST_CC) $(CFLAGS) $(CPPFLAGS) $(BASE_CFLAGS) -o $@ $^ diff --git a/qemu-cvs-ioctl_debug.patch b/qemu-cvs-ioctl_debug.patch index cd3ca9c1..cbb5a5dc 100644 --- a/qemu-cvs-ioctl_debug.patch +++ b/qemu-cvs-ioctl_debug.patch @@ -1,18 +1,18 @@ Index: qemu/linux-user/syscall.c -=================================================================== ---- qemu.orig/linux-user/syscall.c +================================================================================ +--- qemu/linux-user/syscall.c +++ qemu/linux-user/syscall.c -@@ -1950,7 +1950,12 @@ static long do_ioctl(long fd, long cmd, +@@ -2087,7 +2087,12 @@ ie = ioctl_entries; for(;;) { if (ie->target_cmd == 0) { -- gemu_log("Unsupported ioctl: cmd=0x%04lx\n", cmd); +- gemu_log("Unsupported ioctl: cmd=0x%04lx\n", (long)cmd); + int i; + gemu_log("Unsupported ioctl: cmd=0x%04lx (%x)\n", cmd, (cmd & (TARGET_IOC_SIZEMASK << TARGET_IOC_SIZESHIFT)) >> TARGET_IOC_SIZESHIFT); + for(i=0;ioctl_entries[i].target_cmd;i++) { + if((ioctl_entries[i].target_cmd & ~(TARGET_IOC_SIZEMASK << TARGET_IOC_SIZESHIFT)) == (cmd & ~(TARGET_IOC_SIZEMASK << TARGET_IOC_SIZESHIFT))) + gemu_log("%p\t->\t%s (%x)\n", ioctl_entries[i].host_cmd, ioctl_entries[i].name, (ioctl_entries[i].target_cmd & (TARGET_IOC_SIZEMASK << TARGET_IOC_SIZESHIFT)) >> TARGET_IOC_SIZESHIFT); + } - return -ENOSYS; + return -TARGET_ENOSYS; } if (ie->target_cmd == cmd) diff --git a/qemu-cvs-ioctl_nodirection.patch b/qemu-cvs-ioctl_nodirection.patch index 11c99d08..cd523000 100644 --- a/qemu-cvs-ioctl_nodirection.patch +++ b/qemu-cvs-ioctl_nodirection.patch @@ -1,8 +1,8 @@ Index: qemu/linux-user/syscall.c -=================================================================== ---- qemu.orig/linux-user/syscall.c +================================================================================ +--- qemu/linux-user/syscall.c +++ qemu/linux-user/syscall.c -@@ -1980,6 +1980,11 @@ static long do_ioctl(long fd, long cmd, +@@ -2117,6 +2117,11 @@ arg_type++; target_size = thunk_type_size(arg_type, 0); switch(ie->access) { @@ -14,7 +14,7 @@ Index: qemu/linux-user/syscall.c case IOC_R: ret = get_errno(ioctl(fd, ie->host_cmd, buf_temp)); if (!is_error(ret)) { -@@ -1994,6 +1999,7 @@ static long do_ioctl(long fd, long cmd, +@@ -2131,6 +2136,7 @@ unlock_user(argptr, arg, 0); ret = get_errno(ioctl(fd, ie->host_cmd, buf_temp)); break; diff --git a/qemu-cvs-ipc.patch b/qemu-cvs-ipc.patch index 82b3ae3c..9ffb9b49 100644 --- a/qemu-cvs-ipc.patch +++ b/qemu-cvs-ipc.patch @@ -1,6 +1,6 @@ Index: qemu/linux-user/syscall.c -=================================================================== ---- qemu.orig/linux-user/syscall.c +================================================================================ +--- qemu/linux-user/syscall.c +++ qemu/linux-user/syscall.c @@ -29,7 +29,7 @@ #include @@ -21,27 +21,27 @@ Index: qemu/linux-user/syscall.c #include #include #include -@@ -150,6 +153,7 @@ type name (type1 arg1,type2 arg2,type3 a - #define __NR_sys_tgkill __NR_tgkill +@@ -164,6 +167,7 @@ + #define __NR_sys_utimensat __NR_utimensat #define __NR_sys_clone __NR_clone #define __NR_sys_sched_getaffinity __NR_sched_getaffinity +#define __NR_sys_ipc __NR_ipc #if defined(__alpha__) || defined (__ia64__) || defined(__x86_64__) #define __NR__llseek __NR_lseek -@@ -172,6 +176,10 @@ _syscall3(int,sys_rt_sigqueueinfo,int,pi - _syscall3(int,sys_syslog,int,type,char*,bufp,int,len) - _syscall3(int,sys_tgkill,int,tgid,int,pid,int,sig) +@@ -235,6 +239,10 @@ + #ifdef __NR_sys_clone _syscall5(int,sys_clone, int, flags, void *, child_stack, int *, parent_tidptr, void *, newtls, int *, child_tidptr) + #endif +#ifdef __NR_ipc +_syscall6(int,sys_ipc, long, call, long, first, long, second, long, third, void *, ptr, long, fifth) +#define semctl(a,b,c,d) sys_ipc(IPCOP_semctl,a,b,c,&d,0l) +#endif + #ifdef __NR_sys_sched_getaffinity _syscall3(int,sys_sched_getaffinity,pid_t,pid,unsigned int,cpusetsize,void*,mask) - #ifdef __NR_exit_group - _syscall1(int,exit_group,int,error_code) -@@ -1255,6 +1263,21 @@ struct target_ipc_perm - target_ulong __unused2; + #endif +@@ -1464,6 +1472,21 @@ + abi_ulong __unused2; }; +struct target_ipc64_perm @@ -62,8 +62,8 @@ Index: qemu/linux-user/syscall.c struct target_semid_ds { struct target_ipc_perm sem_perm; -@@ -1267,6 +1290,18 @@ struct target_semid_ds - target_ulong __unused4; +@@ -1476,6 +1499,18 @@ + abi_ulong __unused4; }; +struct target_semid64_ds @@ -78,19 +78,19 @@ Index: qemu/linux-user/syscall.c + target_ulong __unused4; +}; + - static inline void target_to_host_ipc_perm(struct ipc_perm *host_ip, - target_ulong target_addr) + static inline abi_long target_to_host_ipc_perm(struct ipc_perm *host_ip, + abi_ulong target_addr) { -@@ -1301,6 +1336,41 @@ static inline void host_to_target_ipc_pe - unlock_user_struct(target_sd, target_addr, 1); +@@ -1514,6 +1549,43 @@ + return 0; } -+static inline void target_to_host_ipc64_perm( struct ipc64_perm *host_ip, target_ulong target_addr ) ++static inline abi_long target_to_host_ipc64_perm( struct ipc64_perm *host_ip, target_ulong target_addr ) +{ + struct target_ipc64_perm *target_ip; + struct target_semid64_ds *target_sd; + -+ lock_user_struct(target_sd, target_addr, 1); ++ lock_user_struct(VERIFY_READ, target_sd, target_addr, 1); + target_ip=&(target_sd->sem_perm); + host_ip->key = tswapl(target_ip->key); + host_ip->uid = tswapl(target_ip->uid); @@ -100,15 +100,16 @@ Index: qemu/linux-user/syscall.c + host_ip->mode = tswap16(target_ip->mode); + host_ip->seq = tswap16(target_ip->seq); + unlock_user_struct(target_sd, target_addr, 1); ++ return 0; +} + -+static inline void host_to_target_ipc64_perm(target_ulong target_addr, ++static inline abi_long host_to_target_ipc64_perm(target_ulong target_addr, + struct ipc64_perm *host_ip) +{ + struct target_ipc64_perm *target_ip; + struct target_semid64_ds *target_sd; + -+ lock_user_struct(target_sd, target_addr, 0); ++ lock_user_struct(VERIFY_WRITE, target_sd, target_addr, 0); + target_ip = &(target_sd->sem_perm); + target_ip->key = tswapl(host_ip->key); + target_ip->uid = tswapl(host_ip->uid); @@ -118,13 +119,14 @@ Index: qemu/linux-user/syscall.c + target_ip->mode = tswap16(host_ip->mode); + target_ip->seq = tswap16(host_ip->seq); + unlock_user_struct(target_sd, target_addr, 1); ++ return 0; +} + - static inline void target_to_host_semid_ds(struct semid_ds *host_sd, - target_ulong target_addr) + static inline abi_long target_to_host_semid_ds(struct semid_ds *host_sd, + abi_ulong target_addr) { -@@ -1327,6 +1397,32 @@ static inline void host_to_target_semid_ - unlock_user_struct(target_sd, target_addr, 1); +@@ -1544,6 +1616,32 @@ + return 0; } +static inline void target_to_host_semid64_ds(struct semid64_ds *host_sd, @@ -132,7 +134,7 @@ Index: qemu/linux-user/syscall.c +{ + struct target_semid64_ds *target_sd; + -+ lock_user_struct(target_sd, target_addr, 1); ++ lock_user_struct(VERIFY_READ, target_sd, target_addr, 1); + target_to_host_ipc64_perm(&(host_sd->sem_perm),target_addr); + host_sd->sem_nsems = tswapl(target_sd->sem_nsems); + host_sd->sem_otime = tswapl(target_sd->sem_otime); @@ -145,7 +147,7 @@ Index: qemu/linux-user/syscall.c +{ + struct target_semid64_ds *target_sd; + -+ lock_user_struct(target_sd, target_addr, 0); ++ lock_user_struct(VERIFY_WRITE, target_sd, target_addr, 0); + host_to_target_ipc64_perm(target_addr,&(host_sd->sem_perm)); + target_sd->sem_nsems = tswapl(host_sd->sem_nsems); + target_sd->sem_otime = tswapl(host_sd->sem_otime); @@ -156,7 +158,7 @@ Index: qemu/linux-user/syscall.c union semun { int val; struct semid_ds *buf; -@@ -1339,6 +1435,10 @@ union target_semun { +@@ -1556,6 +1654,10 @@ unsigned short int *array; }; @@ -164,13 +166,13 @@ Index: qemu/linux-user/syscall.c +#define IPC_64 0x100 +#endif + - static inline void target_to_host_semun(unsigned long cmd, - union semun *host_su, - target_ulong target_addr, -@@ -1350,7 +1450,16 @@ static inline void target_to_host_semun( - case IPC_STAT: + static inline abi_long target_to_host_semun(int cmd, + union semun *host_su, + abi_ulong target_addr, +@@ -1568,7 +1670,15 @@ case IPC_SET: - lock_user_struct(target_su, target_addr, 1); + if (!lock_user_struct(VERIFY_READ, target_su, target_addr, 1)) + return -TARGET_EFAULT; - target_to_host_semid_ds(ds,target_su->buf); + target_to_host_semid_ds(ds,tswapl(target_su->buf)); + host_su->buf = ds; @@ -178,40 +180,39 @@ Index: qemu/linux-user/syscall.c + break; + case IPC_STAT + IPC_64: + case IPC_SET + IPC_64: -+ lock_user_struct(target_su, target_addr, 1); -+ -+ //target_to_host_semid_ds(ds,tswapl(target_su->buf)); -+ target_to_host_semid64_ds((struct semid64_ds *)ds,tswapl(target_su->buf)); ++ if (!lock_user_struct(VERIFY_READ, target_su, target_addr, 1)) ++ return -TARGET_EFAULT; ++ target_to_host_semid64_ds((struct semid64_ds*)ds,tswapl(target_su->buf)); host_su->buf = ds; unlock_user_struct(target_su, target_addr, 0); break; -@@ -1382,7 +1491,14 @@ static inline void host_to_target_semun( - case IPC_STAT: +@@ -1604,7 +1714,14 @@ case IPC_SET: - lock_user_struct(target_su, target_addr, 0); + if (lock_user_struct(VERIFY_WRITE, target_su, target_addr, 0)) + return -TARGET_EFAULT; - host_to_target_semid_ds(target_su->buf,ds); + host_to_target_semid_ds(tswapl(target_su->buf),ds); + unlock_user_struct(target_su, target_addr, 1); + break; + case IPC_STAT + IPC_64: + case IPC_SET + IPC_64: -+ lock_user_struct(target_su, target_addr, 0); -+ //host_to_target_semid_ds(tswapl(target_su->buf),ds); -+ host_to_target_semid64_ds(tswapl(target_su->buf),(struct semid64_ds *)ds); ++ if (lock_user_struct(VERIFY_WRITE, target_su, target_addr, 0)) ++ return -TARGET_EFAULT; ++ host_to_target_semid64_ds(tswapl(target_su->buf),(struct semid64_ds*)ds); unlock_user_struct(target_su, target_addr, 1); break; case GETVAL: -@@ -1406,7 +1522,8 @@ static inline long do_semctl(long first, +@@ -1632,7 +1749,8 @@ { union semun arg; struct semid_ds dsarg; - int cmd = third&0xff; + struct semid64_ds dsarg64; -+ int cmd = third; // & 0xff; - long ret = 0; ++ int cmd = third; // &0xff; + abi_long ret = 0; switch( cmd ) { -@@ -1435,13 +1552,23 @@ static inline long do_semctl(long first, +@@ -1661,13 +1779,23 @@ ret = get_errno(semctl(first, second, cmd, arg)); host_to_target_semun(cmd,ptr,&arg,&dsarg); break; @@ -236,11 +237,10 @@ Index: qemu/linux-user/syscall.c } return ret; -@@ -1465,6 +1592,42 @@ struct target_msqid_ds - target_ulong __unused5; +@@ -1691,6 +1819,41 @@ + abi_ulong __unused5; }; -+ +struct target_shmid64_ds { + struct target_ipc64_perm shm_perm; /* operation perms */ + target_ulong shm_segsz; /* size of segment (bytes) */ @@ -276,10 +276,10 @@ Index: qemu/linux-user/syscall.c + unsigned long __unused6; + }; + - static inline void target_to_host_msqid_ds(struct msqid_ds *host_md, - target_ulong target_addr) + static inline abi_long target_to_host_msqid_ds(struct msqid_ds *host_md, + abi_ulong target_addr) { -@@ -1665,11 +1828,59 @@ static long do_ipc(long call, long first +@@ -1919,11 +2082,59 @@ case IPCOP_shmctl: switch(second) { case IPC_RMID: @@ -297,7 +297,7 @@ Index: qemu/linux-user/syscall.c +#ifdef DEBUG + gemu_log("qemu: doing IPC_STAT\n"); +#endif -+ lock_user_struct(target_buf, ptr, 1); ++ lock_user_struct(VERIFY_WRITE, target_buf, ptr, 1); + ret = get_errno(shmctl(first, second, (struct shmid_ds*)&buf)); + + host_to_target_ipc64_perm(ptr, &buf.shm_perm); @@ -318,7 +318,7 @@ Index: qemu/linux-user/syscall.c +#ifdef DEBUG + gemu_log("qemu: doing IPC_SET\n"); +#endif -+ lock_user_struct(target_buf, ptr, 1); ++ lock_user_struct(VERIFY_READ, target_buf, ptr, 1); + + target_to_host_ipc64_perm(&buf.shm_perm, ptr); + buf.shm_atime = tswapl(target_buf->shm_atime); diff --git a/qemu-cvs-ipc_semop.patch b/qemu-cvs-ipc_semop.patch index 1984196e..62c507f0 100644 --- a/qemu-cvs-ipc_semop.patch +++ b/qemu-cvs-ipc_semop.patch @@ -1,16 +1,16 @@ Index: qemu/linux-user/syscall.c -=================================================================== ---- qemu.orig/linux-user/syscall.c +================================================================================ +--- qemu/linux-user/syscall.c +++ qemu/linux-user/syscall.c -@@ -1573,9 +1732,19 @@ static long do_ipc(long call, long first +@@ -1983,9 +1983,19 @@ switch (call) { case IPCOP_semop: -- ret = get_errno(semop(first,(struct sembuf *) ptr, second)); +- ret = get_errno(semop(first,(struct sembuf *)g2h(ptr), second)); + { + struct sembuf *target_sops; + int i; -+ lock_user_struct(target_sops, ptr, 0); ++ lock_user_struct(VERIFY_READ, target_sops, ptr, 0); + for(i=0; i open("/usr/gnemul/i386-linux/lib/foo.so"); diff --git a/qemu-cvs-nofadvise64.patch b/qemu-cvs-nofadvise64.patch index 9e08293c..581aa731 100644 --- a/qemu-cvs-nofadvise64.patch +++ b/qemu-cvs-nofadvise64.patch @@ -1,9 +1,9 @@ Index: qemu/linux-user/syscall.c -=================================================================== ---- qemu.orig/linux-user/syscall.c +================================================================================ +--- qemu/linux-user/syscall.c +++ qemu/linux-user/syscall.c -@@ -5059,6 +5059,11 @@ long do_syscall(void *cpu_env, int num, - goto unimplemented_nowarn; +@@ -5491,6 +5491,11 @@ + break; #endif +#ifdef TARGET_NR_fadvise64 diff --git a/qemu-cvs-noppcemb.patch b/qemu-cvs-noppcemb.patch index 83f2a606..fa3b024d 100644 --- a/qemu-cvs-noppcemb.patch +++ b/qemu-cvs-noppcemb.patch @@ -1,13 +1,13 @@ Index: qemu-0.9.0/configure -=================================================================== ---- qemu-0.9.0.orig/configure -+++ qemu-0.9.0/configure -@@ -473,7 +473,7 @@ fi +================================================================================ +--- qemu/configure ++++ qemu/configure +@@ -506,7 +506,7 @@ if test -z "$target_list" ; then # these targets are portable if [ "$softmmu" = "yes" ] ; then -- target_list="i386-softmmu ppc-softmmu sparc-softmmu x86_64-softmmu mips-softmmu mipsel-softmmu mips64-softmmu mips64el-softmmu arm-softmmu ppc64-softmmu ppcemb-softmmu m68k-softmmu z80-softmmu" -+ target_list="i386-softmmu ppc-softmmu sparc-softmmu x86_64-softmmu mips-softmmu mipsel-softmmu mips64-softmmu mips64el-softmmu arm-softmmu ppc64-softmmu m68k-softmmu z80-softmmu" +- target_list="i386-softmmu sparc-softmmu x86_64-softmmu mips-softmmu mipsel-softmmu mips64-softmmu mips64el-softmmu arm-softmmu ppc-softmmu ppcemb-softmmu ppc64-softmmu m68k-softmmu sh4-softmmu cris-softmmu z80-softmmu" ++ target_list="i386-softmmu sparc-softmmu x86_64-softmmu mips-softmmu mipsel-softmmu mips64-softmmu mips64el-softmmu arm-softmmu ppc-softmmu ppc64-softmmu m68k-softmmu sh4-softmmu cris-softmmu z80-softmmu" fi # the following are Linux specific if [ "$linux_user" = "yes" ] ; then diff --git a/qemu-cvs-ppcspe.patch b/qemu-cvs-ppcspe.patch new file mode 100644 index 00000000..c9908541 --- /dev/null +++ b/qemu-cvs-ppcspe.patch @@ -0,0 +1,33 @@ +--- target-ppc/op.c ++++ target-ppc/op.c +@@ -2720,6 +2720,7 @@ + } + #endif /* !defined(CONFIG_USER_ONLY) */ + ++#if defined(TARGET_PPC64) + /* SPE extension */ + void OPPROTO op_splatw_T1_64 (void) + { +@@ -3438,3 +3439,4 @@ + T0 = _do_efdtsteq(T0_64, T1_64); + RETURN(); + } ++#endif +--- target-ppc/translate.c ++++ target-ppc/translate.c +@@ -5853,6 +5853,7 @@ + + #endif /* !defined(TARGET_PPC64) */ + ++#if defined(TARGET_PPC64) + #define GEN_SPE(name0, name1, opc2, opc3, inval, type) \ + GEN_HANDLER(name0##_##name1, 0x04, opc2, opc3, inval, type) \ + { \ +@@ -6760,6 +6761,7 @@ + GEN_SPE(efdctsiz, speundef, 0x1D, 0x0B, 0x00180000, PPC_SPEFPU); // + GEN_SPE(efdtstgt, efdtstlt, 0x1E, 0x0B, 0x00600000, PPC_SPEFPU); // + GEN_SPE(efdtsteq, speundef, 0x1F, 0x0B, 0x00600000, PPC_SPEFPU); // ++#endif + + /* End opcode list */ + GEN_OPCODE_MARK(end); diff --git a/qemu-cvs-pthread.patch b/qemu-cvs-pthread.patch index 91f9d810..e90e4cd7 100644 --- a/qemu-cvs-pthread.patch +++ b/qemu-cvs-pthread.patch @@ -1,13 +1,13 @@ Index: qemu-0.9.0/Makefile -=================================================================== ---- qemu-0.9.0.orig/Makefile -+++ qemu-0.9.0/Makefile -@@ -12,7 +12,7 @@ BASE_CFLAGS += $(OS_CFLAGS) $(ARCH_CFLAG - BASE_LDFLAGS += $(OS_LDFLAGS) $(ARCH_LDFLAGS) +================================================================================ +--- qemu/Makefile ++++ qemu/Makefile +@@ -13,7 +13,7 @@ - CPPFLAGS += -I. -D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE + CPPFLAGS += -I. -I$(SRC_PATH) -MMD -MP + CPPFLAGS += -D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE -LIBS= +LIBS=-lpthread - TOOLS=qemu-img$(EXESUF) ifdef CONFIG_STATIC BASE_LDFLAGS += -static + endif diff --git a/qemu-cvs-raw-io-reliability.patch b/qemu-cvs-raw-io-reliability.patch deleted file mode 100644 index 9d0fbd6b..00000000 --- a/qemu-cvs-raw-io-reliability.patch +++ /dev/null @@ -1,134 +0,0 @@ -diff -r 808c4b54209f block-raw.c ---- a/block-raw.c Fri Aug 10 16:30:38 2007 -0400 -+++ b/block-raw.c Fri Aug 10 16:30:38 2007 -0400 -@@ -59,6 +59,13 @@ - - //#define DEBUG_FLOPPY - -+#undef DEBUG_BLOCK -+#ifdef DEBUG_BLOCK -+#define DEBUG_BLOCK_PRINT( formatCstr, args... ) fprintf( logfile, formatCstr, ##args ); fflush( logfile ) -+#else -+#define DEBUG_BLOCK_PRINT( formatCstr, args... ) -+#endif -+ - #define FTYPE_FILE 0 - #define FTYPE_CD 1 - #define FTYPE_FD 2 -@@ -70,6 +77,7 @@ typedef struct BDRVRawState { - typedef struct BDRVRawState { - int fd; - int type; -+ unsigned int lseek_err_cnt; - #if defined(__linux__) - /* linux floppy specific */ - int fd_open_flags; -@@ -87,6 +95,8 @@ static int raw_open(BlockDriverState *bs - BDRVRawState *s = bs->opaque; - int fd, open_flags, ret; - -+ s->lseek_err_cnt = 0; -+ - open_flags = O_BINARY; - if ((flags & BDRV_O_ACCESS) == O_RDWR) { - open_flags |= O_RDWR; -@@ -137,8 +147,58 @@ static int raw_pread(BlockDriverState *b - if (ret < 0) - return ret; - -- lseek(s->fd, offset, SEEK_SET); -+ if (lseek(s->fd, offset, SEEK_SET) == (off_t)-1) { -+ ++(s->lseek_err_cnt); -+ if(s->lseek_err_cnt <= 10) { -+ DEBUG_BLOCK_PRINT("raw_pread(%d:%s, %ld, %p, %d) [%ld] lseek failed : %d = %s\n", -+ s->fd, -+ bs->filename, -+ offset, -+ buf, -+ count, -+ bs->total_sectors, errno, strerror(errno) ); -+ } -+ return -1; -+ } -+ s->lseek_err_cnt=0; -+ - ret = read(s->fd, buf, count); -+ if (ret == count) -+ goto label__raw_read__success; -+ -+ DEBUG_BLOCK_PRINT("raw_read(%d:%s, %ld, %p, %d) [%ld] read failed %d : %d = %s\n", -+ s->fd, -+ bs->filename, -+ offset, -+ buf, -+ count, -+ bs->total_sectors, -+ ret, errno, strerror(errno) ); -+ -+ if (bs->type == BDRV_TYPE_CDROM) { // Try harder for CDrom -+ lseek(s->fd, offset, SEEK_SET); -+ ret = read(s->fd, buf, count); -+ if (ret == count) -+ goto label__raw_read__success; -+ lseek(s->fd, offset, SEEK_SET); -+ ret = read(s->fd, buf, count); -+ if (ret == count) -+ goto label__raw_read__success; -+ -+ DEBUG_BLOCK_PRINT("raw_read(%d:%s, %ld, %p, %d) [%ld] retry read failed %d : %d = %s\n", -+ s->fd, -+ bs->filename, -+ offset, -+ buf, -+ count, -+ bs->total_sectors, -+ ret, errno, strerror(errno) ); -+ } -+ -+ return -1; -+ -+label__raw_read__success: -+ - return ret; - } - -@@ -152,8 +212,38 @@ static int raw_pwrite(BlockDriverState * - if (ret < 0) - return ret; - -- lseek(s->fd, offset, SEEK_SET); -+ if (lseek(s->fd, offset, SEEK_SET) == (off_t)-1) { -+ ++(s->lseek_err_cnt); -+ if(s->lseek_err_cnt) { -+ DEBUG_BLOCK_PRINT("raw_write(%d:%s, %ld, %p, %d) [%ld] lseek failed : %d = %s\n", -+ s->fd, -+ bs->filename, -+ offset, -+ buf, -+ count, -+ bs->total_sectors, errno, strerror(errno) ); -+ } -+ return -1; -+ } -+ s->lseek_err_cnt = 0; -+ - ret = write(s->fd, buf, count); -+ if (ret == count) -+ goto label__raw_write__success; -+ -+ DEBUG_BLOCK_PRINT("raw_write(%d:%s, %ld, %p, %d) [%ld] write failed %d : %d = %s\n", -+ s->fd, -+ bs->filename, -+ offset, -+ buf, -+ count, -+ bs->total_sectors, -+ ret, errno, strerror(errno) ); -+ -+ return -1; -+ -+label__raw_write__success: -+ - return ret; - } - diff --git a/qemu-cvs-sched_getaffinity.patch b/qemu-cvs-sched_getaffinity.patch index f26d76fd..0ecbb3ce 100644 --- a/qemu-cvs-sched_getaffinity.patch +++ b/qemu-cvs-sched_getaffinity.patch @@ -1,32 +1,34 @@ Index: qemu.bkp/linux-user/syscall.c -=================================================================== ---- qemu.bkp.orig/linux-user/syscall.c -+++ qemu.bkp/linux-user/syscall.c -@@ -149,6 +149,7 @@ type name (type1 arg1,type2 arg2,type3 a - #define __NR_sys_syslog __NR_syslog - #define __NR_sys_tgkill __NR_tgkill +================================================================================ +--- qemu/linux-user/syscall.c ++++ qemu/linux-user/syscall.c +@@ -163,6 +163,7 @@ + #define __NR_sys_unlinkat __NR_unlinkat + #define __NR_sys_utimensat __NR_utimensat #define __NR_sys_clone __NR_clone +#define __NR_sys_sched_getaffinity __NR_sched_getaffinity #if defined(__alpha__) || defined (__ia64__) || defined(__x86_64__) #define __NR__llseek __NR_lseek -@@ -171,6 +172,7 @@ _syscall3(int,sys_rt_sigqueueinfo,int,pi - _syscall3(int,sys_syslog,int,type,char*,bufp,int,len) - _syscall3(int,sys_tgkill,int,tgid,int,pid,int,sig) +@@ -234,6 +235,9 @@ + #ifdef __NR_sys_clone _syscall5(int,sys_clone, int, flags, void *, child_stack, int *, parent_tidptr, void *, newtls, int *, child_tidptr) + #endif ++#ifdef __NR_sys_sched_getaffinity +_syscall3(int,sys_sched_getaffinity,pid_t,pid,unsigned int,cpusetsize,void*,mask) ++#endif #ifdef __NR_exit_group _syscall1(int,exit_group,int,error_code) #endif -@@ -4823,6 +4825,17 @@ long do_syscall(void *cpu_env, int num, - goto unimplemented_nowarn; +@@ -5254,6 +5258,17 @@ + break; #endif +#ifdef TARGET_NR_sched_getaffinity + case TARGET_NR_sched_getaffinity: + { + cpu_set_t *mask; -+ lock_user_struct(mask, arg3, 1); ++ lock_user_struct(VERIFY_READ, mask, arg3, 1); + ret = get_errno(sys_sched_getaffinity((pid_t)arg1, (unsigned int)arg2, mask)); + unlock_user_struct(mask, arg3, 0); + break; diff --git a/qemu-cvs-svm.patch b/qemu-cvs-svm.patch deleted file mode 100644 index 544cd960..00000000 --- a/qemu-cvs-svm.patch +++ /dev/null @@ -1,1812 +0,0 @@ -Index: qemu-0.9.0.cvs/target-i386/helper2.c -=================================================================== ---- qemu-0.9.0.cvs.orig/target-i386/helper2.c -+++ qemu-0.9.0.cvs/target-i386/helper2.c -@@ -27,6 +27,7 @@ - - #include "cpu.h" - #include "exec-all.h" -+#include "svm.h" - - //#define DEBUG_MMU - -@@ -111,10 +112,11 @@ CPUX86State *cpu_x86_init(void) - CPUID_CX8 | CPUID_PGE | CPUID_CMOV | - CPUID_PAT); - env->pat = 0x0007040600070406ULL; -+ env->cpuid_ext3_features = CPUID_EXT3_SVM; - env->cpuid_ext_features = CPUID_EXT_SSE3; - env->cpuid_features |= CPUID_FXSR | CPUID_MMX | CPUID_SSE | CPUID_SSE2 | CPUID_PAE | CPUID_SEP; - env->cpuid_features |= CPUID_APIC; -- env->cpuid_xlevel = 0; -+ env->cpuid_xlevel = 0x8000000a; - { - const char *model_id = "QEMU Virtual CPU version " QEMU_VERSION; - int c, len, i; -@@ -131,7 +133,6 @@ CPUX86State *cpu_x86_init(void) - /* currently not enabled for std i386 because not fully tested */ - env->cpuid_ext2_features = (env->cpuid_features & 0x0183F3FF); - env->cpuid_ext2_features |= CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX; -- env->cpuid_xlevel = 0x80000008; - - /* these features are needed for Win64 and aren't fully implemented */ - env->cpuid_features |= CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA; -@@ -160,6 +161,7 @@ void cpu_reset(CPUX86State *env) - #ifdef CONFIG_SOFTMMU - env->hflags |= HF_SOFTMMU_MASK; - #endif -+ env->hflags |= HF_GIF_MASK; - - cpu_x86_update_cr0(env, 0x60000010); - env->a20_mask = 0xffffffff; -@@ -863,7 +865,6 @@ int cpu_x86_handle_mmu_fault(CPUX86State - do_fault_protect: - error_code = PG_ERROR_P_MASK; - do_fault: -- env->cr[2] = addr; - error_code |= (is_write << PG_ERROR_W_BIT); - if (is_user) - error_code |= PG_ERROR_U_MASK; -@@ -871,8 +872,15 @@ int cpu_x86_handle_mmu_fault(CPUX86State - (env->efer & MSR_EFER_NXE) && - (env->cr[4] & CR4_PAE_MASK)) - error_code |= PG_ERROR_I_D_MASK; -+ if (INTERCEPTEDl(_exceptions, 1 << EXCP0E_PAGE)) { -+ stq_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_info_2), addr); -+ } else { -+ env->cr[2] = addr; -+ } - env->error_code = error_code; - env->exception_index = EXCP0E_PAGE; -+ if (INTERCEPTEDl(_exceptions, 1 << EXCP0E_PAGE)) // the VMM will handle this -+ return 2; - return 1; - } - -Index: qemu-0.9.0.cvs/target-i386/translate.c -=================================================================== ---- qemu-0.9.0.cvs.orig/target-i386/translate.c -+++ qemu-0.9.0.cvs/target-i386/translate.c -@@ -77,6 +77,7 @@ typedef struct DisasContext { - static state change (stop translation) */ - /* current block context */ - target_ulong cs_base; /* base of CS segment */ -+ uint64_t intercept; /* SVM intercept vector */ - int pe; /* protected mode */ - int code32; /* 32 bit code segment */ - #ifdef TARGET_X86_64 -@@ -2003,6 +2004,86 @@ static void gen_movl_seg_T0(DisasContext - } - } - -+#ifdef TARGET_X86_64 -+#define SVM_movq_T1_im(x) gen_op_movq_T1_im64((x) >> 32, x) -+#else -+#define SVM_movq_T1_im(x) gen_op_movl_T1_im(x) -+#endif -+ -+static inline int gen_svm_check_io(DisasContext *s, target_ulong pc_start, uint64_t type) { -+#if !defined(CONFIG_USER_ONLY) -+ if(s->intercept & (1ULL << INTERCEPT_IOIO_PROT)) { -+ if (s->cc_op != CC_OP_DYNAMIC) -+ gen_op_set_cc_op(s->cc_op); -+ SVM_movq_T1_im(s->pc - s->cs_base); -+ gen_jmp_im(pc_start - s->cs_base); -+ gen_op_geneflags(); -+ gen_op_svm_check_intercept_io((uint32_t)(type >> 32), (uint32_t)type); -+ s->cc_op = CC_OP_DYNAMIC; -+ // FIXME: maybe we could move the io intercept vector to env as well -+ // so we know if this is an EOB or not ... let's assume it's not -+ // for now -+ } -+ return 0; -+#endif -+} -+ -+static inline int svm_is_rep(int prefixes) { -+ return ((prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) ? 8 : 0); -+} -+ -+static inline int gen_svm_check_intercept_param(DisasContext *s, target_ulong pc_start, uint64_t type, uint64_t param) { -+ if(!(s->intercept & (INTERCEPT_SVM_MASK))) return 0; // no SVM activated -+ switch(type) { -+ case SVM_EXIT_READ_CR0 ... SVM_EXIT_EXCP_BASE - 1: // CRx and DRx reads/writes -+ if (s->cc_op != CC_OP_DYNAMIC) { -+ gen_op_set_cc_op(s->cc_op); -+ s->cc_op = CC_OP_DYNAMIC; -+ } -+ gen_jmp_im(pc_start - s->cs_base); -+ SVM_movq_T1_im(param); -+ gen_op_geneflags(); -+ gen_op_svm_check_intercept_param((uint32_t)(type >> 32), (uint32_t)type); -+ // this is a special case as we do not know if the interception occurs -+ // so we assume there was none -+ return 0; -+ case SVM_EXIT_MSR: -+ if(s->intercept & (1ULL << INTERCEPT_MSR_PROT)) { -+ if (s->cc_op != CC_OP_DYNAMIC) { -+ gen_op_set_cc_op(s->cc_op); -+ s->cc_op = CC_OP_DYNAMIC; -+ } -+ gen_jmp_im(pc_start - s->cs_base); -+ SVM_movq_T1_im(param); -+ gen_op_geneflags(); -+ gen_op_svm_check_intercept_param((uint32_t)(type >> 32), (uint32_t)type); -+ // this is a special case as we do not know if the interception occurs -+ // so we assume there was none -+ return 0; -+ } -+ break; -+ default: -+ if(s->intercept & (1ULL << (type - SVM_EXIT_INTR))) { -+ if (s->cc_op != CC_OP_DYNAMIC) { -+ gen_op_set_cc_op(s->cc_op); -+ s->cc_op = CC_OP_EFLAGS; -+ } -+ gen_jmp_im(pc_start - s->cs_base); -+ SVM_movq_T1_im(param); -+ gen_op_geneflags(); -+ gen_op_svm_vmexit(type >> 32, type); -+ // we can optimize this one so TBs don't get longer than up to vmexit -+ gen_eob(s); -+ return 1; -+ } -+ } -+ return 0; -+} -+ -+static inline int gen_svm_check_intercept(DisasContext *s, target_ulong pc_start, uint64_t type) { -+ return gen_svm_check_intercept_param(s, pc_start, type, 0); -+} -+ - static inline void gen_stack_update(DisasContext *s, int addend) - { - #ifdef TARGET_X86_64 -@@ -4888,6 +4967,9 @@ static target_ulong disas_insn(DisasCont - else - ot = dflag ? OT_LONG : OT_WORD; - gen_check_io(s, ot, 1, pc_start - s->cs_base); -+ gen_op_mov_TN_reg[OT_WORD][0][R_EDX](); -+ gen_op_andl_T0_ffff(); -+ if(gen_svm_check_io(s, pc_start, SVM_IOIO_TYPE_MASK | (1 << (4+ot)) | svm_is_rep(prefixes )| 4 | (1 << (7+s->aflag)))) break; - if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) { - gen_repz_ins(s, ot, pc_start - s->cs_base, s->pc - s->cs_base); - } else { -@@ -4901,6 +4983,9 @@ static target_ulong disas_insn(DisasCont - else - ot = dflag ? OT_LONG : OT_WORD; - gen_check_io(s, ot, 1, pc_start - s->cs_base); -+ gen_op_mov_TN_reg[OT_WORD][0][R_EDX](); -+ gen_op_andl_T0_ffff(); -+ if(gen_svm_check_io(s, pc_start, (1 << (4+ot)) | svm_is_rep(prefixes) | 4 | (1 << (7+s->aflag)))) break; - if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) { - gen_repz_outs(s, ot, pc_start - s->cs_base, s->pc - s->cs_base); - } else { -@@ -4910,6 +4995,7 @@ static target_ulong disas_insn(DisasCont - - /************************/ - /* port I/O */ -+ - case 0xe4: - case 0xe5: - if ((b & 1) == 0) -@@ -4919,6 +5005,7 @@ static target_ulong disas_insn(DisasCont - val = ldub_code(s->pc++); - gen_op_movl_T0_im(val); - gen_check_io(s, ot, 0, pc_start - s->cs_base); -+ if(gen_svm_check_io(s, pc_start, SVM_IOIO_TYPE_MASK | svm_is_rep(prefixes) | (1 << (4+ot)))) break; - gen_op_in[ot](); - gen_op_mov_reg_T1[ot][R_EAX](); - break; -@@ -4931,6 +5018,7 @@ static target_ulong disas_insn(DisasCont - val = ldub_code(s->pc++); - gen_op_movl_T0_im(val); - gen_check_io(s, ot, 0, pc_start - s->cs_base); -+ if(gen_svm_check_io(s, pc_start, svm_is_rep(prefixes) | (1 << (4+ot)))) break; - gen_op_mov_TN_reg[ot][1][R_EAX](); - gen_op_out[ot](); - break; -@@ -4943,6 +5031,7 @@ static target_ulong disas_insn(DisasCont - gen_op_mov_TN_reg[OT_WORD][0][R_EDX](); - gen_op_andl_T0_ffff(); - gen_check_io(s, ot, 0, pc_start - s->cs_base); -+ if(gen_svm_check_io(s, pc_start, SVM_IOIO_TYPE_MASK | svm_is_rep(prefixes) | (1 << (4+ot)))) break; - gen_op_in[ot](); - gen_op_mov_reg_T1[ot][R_EAX](); - break; -@@ -4955,6 +5044,7 @@ static target_ulong disas_insn(DisasCont - gen_op_mov_TN_reg[OT_WORD][0][R_EDX](); - gen_op_andl_T0_ffff(); - gen_check_io(s, ot, 0, pc_start - s->cs_base); -+ if(gen_svm_check_io(s, pc_start, svm_is_rep(prefixes) | (1 << (4+ot)))) break; - gen_op_mov_TN_reg[ot][1][R_EAX](); - gen_op_out[ot](); - break; -@@ -5012,6 +5102,7 @@ static target_ulong disas_insn(DisasCont - val = 0; - goto do_lret; - case 0xcf: /* iret */ -+ if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_IRET)) break; - if (!s->pe) { - /* real mode */ - gen_op_iret_real(s->dflag); -@@ -5133,6 +5224,7 @@ static target_ulong disas_insn(DisasCont - /************************/ - /* flags */ - case 0x9c: /* pushf */ -+ if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_PUSHF)) break; - if (s->vm86 && s->iopl != 3) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); - } else { -@@ -5143,6 +5235,7 @@ static target_ulong disas_insn(DisasCont - } - break; - case 0x9d: /* popf */ -+ if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_POPF)) break; - if (s->vm86 && s->iopl != 3) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); - } else { -@@ -5356,6 +5449,9 @@ static target_ulong disas_insn(DisasCont - /* XXX: correct lock test for all insn */ - if (prefixes & PREFIX_LOCK) - goto illegal_op; -+ if (prefixes & PREFIX_REPZ) { -+ gen_svm_check_intercept(s, pc_start, SVM_EXIT_PAUSE); -+ } - break; - case 0x9b: /* fwait */ - if ((s->flags & (HF_MP_MASK | HF_TS_MASK)) == -@@ -5369,11 +5465,13 @@ static target_ulong disas_insn(DisasCont - } - break; - case 0xcc: /* int3 */ -+ if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_SWINT)) break; - gen_interrupt(s, EXCP03_INT3, pc_start - s->cs_base, s->pc - s->cs_base); - break; - case 0xcd: /* int N */ - val = ldub_code(s->pc++); -- if (s->vm86 && s->iopl != 3) { -+ if(gen_svm_check_intercept(s, pc_start, SVM_EXIT_SWINT)) break; -+ if (s->vm86 && s->iopl != 3) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); - } else { - gen_interrupt(s, val, pc_start - s->cs_base, s->pc - s->cs_base); -@@ -5382,12 +5480,14 @@ static target_ulong disas_insn(DisasCont - case 0xce: /* into */ - if (CODE64(s)) - goto illegal_op; -+ if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_SWINT)) break; - if (s->cc_op != CC_OP_DYNAMIC) - gen_op_set_cc_op(s->cc_op); - gen_jmp_im(pc_start - s->cs_base); - gen_op_into(s->pc - pc_start); - break; - case 0xf1: /* icebp (undocumented, exits to external debugger) */ -+ if(gen_svm_check_intercept(s, pc_start, SVM_EXIT_ICEBP)) break; - #if 1 - gen_debug(s, pc_start - s->cs_base); - #else -@@ -5423,6 +5523,7 @@ static target_ulong disas_insn(DisasCont - gen_op_set_inhibit_irq(); - /* give a chance to handle pending irqs */ - gen_jmp_im(s->pc - s->cs_base); -+ if(gen_svm_check_intercept(s, pc_start, SVM_EXIT_VINTR)) break; - gen_eob(s); - } else { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); -@@ -5515,13 +5616,20 @@ static target_ulong disas_insn(DisasCont - if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); - } else { -- if (b & 2) -+ int retval = 0; -+ if (b & 2) { -+ retval = gen_svm_check_intercept_param(s, pc_start, SVM_EXIT_MSR, 0); - gen_op_rdmsr(); -- else -+ } else { -+ retval = gen_svm_check_intercept_param(s, pc_start, SVM_EXIT_MSR, 1); - gen_op_wrmsr(); -+ } -+ if(retval) -+ gen_eob(s); - } - break; - case 0x131: /* rdtsc */ -+ if(gen_svm_check_intercept(s, pc_start, SVM_EXIT_RDTSC)) break; - gen_jmp_im(pc_start - s->cs_base); - gen_op_rdtsc(); - break; -@@ -5584,12 +5692,14 @@ static target_ulong disas_insn(DisasCont - break; - #endif - case 0x1a2: /* cpuid */ -+ if(gen_svm_check_intercept(s, pc_start, SVM_EXIT_CPUID)) break; - gen_op_cpuid(); - break; - case 0xf4: /* hlt */ - if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); - } else { -+ if(gen_svm_check_intercept(s, pc_start, SVM_EXIT_HLT)) break; - if (s->cc_op != CC_OP_DYNAMIC) - gen_op_set_cc_op(s->cc_op); - gen_jmp_im(s->pc - s->cs_base); -@@ -5605,6 +5715,7 @@ static target_ulong disas_insn(DisasCont - case 0: /* sldt */ - if (!s->pe || s->vm86) - goto illegal_op; -+ if(gen_svm_check_intercept(s, pc_start, SVM_EXIT_LDTR_READ)) break; - gen_op_movl_T0_env(offsetof(CPUX86State,ldt.selector)); - ot = OT_WORD; - if (mod == 3) -@@ -5617,6 +5728,7 @@ static target_ulong disas_insn(DisasCont - if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); - } else { -+ if(gen_svm_check_intercept(s, pc_start, SVM_EXIT_LDTR_WRITE)) break; - gen_ldst_modrm(s, modrm, OT_WORD, OR_TMP0, 0); - gen_jmp_im(pc_start - s->cs_base); - gen_op_lldt_T0(); -@@ -5625,6 +5737,7 @@ static target_ulong disas_insn(DisasCont - case 1: /* str */ - if (!s->pe || s->vm86) - goto illegal_op; -+ if(gen_svm_check_intercept(s, pc_start, SVM_EXIT_TR_READ)) break; - gen_op_movl_T0_env(offsetof(CPUX86State,tr.selector)); - ot = OT_WORD; - if (mod == 3) -@@ -5637,6 +5750,7 @@ static target_ulong disas_insn(DisasCont - if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); - } else { -+ if(gen_svm_check_intercept(s, pc_start, SVM_EXIT_TR_WRITE)) break; - gen_ldst_modrm(s, modrm, OT_WORD, OR_TMP0, 0); - gen_jmp_im(pc_start - s->cs_base); - gen_op_ltr_T0(); -@@ -5668,6 +5782,7 @@ static target_ulong disas_insn(DisasCont - case 0: /* sgdt */ - if (mod == 3) - goto illegal_op; -+ if(gen_svm_check_intercept(s, pc_start, SVM_EXIT_GDTR_READ)) break; - gen_lea_modrm(s, modrm, ®_addr, &offset_addr); - gen_op_movl_T0_env(offsetof(CPUX86State, gdt.limit)); - gen_op_st_T0_A0[OT_WORD + s->mem_index](); -@@ -5684,6 +5799,7 @@ static target_ulong disas_insn(DisasCont - if (!(s->cpuid_ext_features & CPUID_EXT_MONITOR) || - s->cpl != 0) - goto illegal_op; -+ if(gen_svm_check_intercept(s, pc_start, SVM_EXIT_MONITOR)) break; - gen_jmp_im(pc_start - s->cs_base); - #ifdef TARGET_X86_64 - if (s->aflag == 2) { -@@ -5708,6 +5824,7 @@ static target_ulong disas_insn(DisasCont - gen_op_set_cc_op(s->cc_op); - s->cc_op = CC_OP_DYNAMIC; - } -+ if(gen_svm_check_intercept(s, pc_start, SVM_EXIT_MWAIT)) break; - gen_jmp_im(s->pc - s->cs_base); - gen_op_mwait(); - gen_eob(s); -@@ -5716,6 +5833,7 @@ static target_ulong disas_insn(DisasCont - goto illegal_op; - } - } else { /* sidt */ -+ if(gen_svm_check_intercept(s, pc_start, SVM_EXIT_IDTR_READ)) break; - gen_lea_modrm(s, modrm, ®_addr, &offset_addr); - gen_op_movl_T0_env(offsetof(CPUX86State, idt.limit)); - gen_op_st_T0_A0[OT_WORD + s->mem_index](); -@@ -5728,11 +5846,53 @@ static target_ulong disas_insn(DisasCont - break; - case 2: /* lgdt */ - case 3: /* lidt */ -- if (mod == 3) -- goto illegal_op; -- if (s->cpl != 0) { -+ if (mod == 3) { -+ switch(rm) { -+ case 0: /* VMRUN */ -+ if(gen_svm_check_intercept(s, pc_start, SVM_EXIT_VMRUN)) break; -+ if (s->cc_op != CC_OP_DYNAMIC) -+ gen_op_set_cc_op(s->cc_op); -+ gen_jmp_im(s->pc - s->cs_base); -+ gen_op_vmrun(); -+ s->cc_op = CC_OP_EFLAGS; -+ gen_eob(s); -+ break; -+ case 1: /* VMMCALL */ -+ if(gen_svm_check_intercept(s, pc_start, SVM_EXIT_VMMCALL)) break; -+ // FIXME: cause #UD if hflags & SVM -+ gen_op_vmmcall(); -+ break; -+ case 2: /* VMLOAD */ -+ if(gen_svm_check_intercept(s, pc_start, SVM_EXIT_VMLOAD)) break; -+ gen_op_vmload(); -+ break; -+ case 3: /* VMSAVE */ -+ if(gen_svm_check_intercept(s, pc_start, SVM_EXIT_VMSAVE)) break; -+ gen_op_vmsave(); -+ break; -+ case 4: /* STGI */ -+ if(gen_svm_check_intercept(s, pc_start, SVM_EXIT_STGI)) break; -+ gen_op_stgi(); -+ break; -+ case 5: /* CLGI */ -+ if(gen_svm_check_intercept(s, pc_start, SVM_EXIT_CLGI)) break; -+ gen_op_clgi(); -+ break; -+ case 6: /* SKINIT */ -+ if(gen_svm_check_intercept(s, pc_start, SVM_EXIT_SKINIT)) break; -+ gen_op_skinit(); -+ break; -+ case 7: /* INVLPGA */ -+ if(gen_svm_check_intercept(s, pc_start, SVM_EXIT_INVLPGA)) break; -+ gen_op_invlpga(); -+ break; -+ default: -+ goto illegal_op; -+ } -+ } else if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); - } else { -+ if(gen_svm_check_intercept(s, pc_start, op==2 ? SVM_EXIT_GDTR_WRITE : SVM_EXIT_IDTR_WRITE)) break; - gen_lea_modrm(s, modrm, ®_addr, &offset_addr); - gen_op_ld_T1_A0[OT_WORD + s->mem_index](); - gen_add_A0_im(s, 2); -@@ -5749,6 +5909,7 @@ static target_ulong disas_insn(DisasCont - } - break; - case 4: /* smsw */ -+ if(gen_svm_check_intercept(s, pc_start, SVM_EXIT_READ_CR0)) break; - gen_op_movl_T0_env(offsetof(CPUX86State,cr[0])); - gen_ldst_modrm(s, modrm, OT_WORD, OR_TMP0, 1); - break; -@@ -5756,6 +5917,7 @@ static target_ulong disas_insn(DisasCont - if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); - } else { -+ if(gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_CR0)) break; - gen_ldst_modrm(s, modrm, OT_WORD, OR_TMP0, 0); - gen_op_lmsw_T0(); - gen_jmp_im(s->pc - s->cs_base); -@@ -5780,6 +5942,7 @@ static target_ulong disas_insn(DisasCont - goto illegal_op; - } - } else { -+ if(gen_svm_check_intercept(s, pc_start, SVM_EXIT_INVLPG)) break; - gen_lea_modrm(s, modrm, ®_addr, &offset_addr); - gen_op_invlpg_A0(); - gen_jmp_im(s->pc - s->cs_base); -@@ -5796,6 +5959,7 @@ static target_ulong disas_insn(DisasCont - if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); - } else { -+ if(gen_svm_check_intercept(s, pc_start, SVM_EXIT_INVD)) break; - /* nothing to do */ - } - break; -@@ -5916,11 +6080,13 @@ static target_ulong disas_insn(DisasCont - case 4: - case 8: - if (b & 2) { -+ gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_CR0 + reg); - gen_op_mov_TN_reg[ot][0][rm](); - gen_op_movl_crN_T0(reg); - gen_jmp_im(s->pc - s->cs_base); - gen_eob(s); - } else { -+ gen_svm_check_intercept(s, pc_start, SVM_EXIT_READ_CR0 + reg); - #if !defined(CONFIG_USER_ONLY) - if (reg == 8) - gen_op_movtl_T0_cr8(); -@@ -5953,11 +6119,13 @@ static target_ulong disas_insn(DisasCont - if (reg == 4 || reg == 5 || reg >= 8) - goto illegal_op; - if (b & 2) { -+ gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_DR0 + reg); - gen_op_mov_TN_reg[ot][0][rm](); - gen_op_movl_drN_T0(reg); - gen_jmp_im(s->pc - s->cs_base); - gen_eob(s); - } else { -+ gen_svm_check_intercept(s, pc_start, SVM_EXIT_READ_DR0 + reg); - gen_op_movtl_T0_env(offsetof(CPUX86State,dr[reg])); - gen_op_mov_reg_T0[ot][rm](); - } -@@ -5967,6 +6135,7 @@ static target_ulong disas_insn(DisasCont - if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); - } else { -+ gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_CR0); - gen_op_clts(); - /* abort block because static cpu state changed */ - gen_jmp_im(s->pc - s->cs_base); -@@ -6058,6 +6227,7 @@ static target_ulong disas_insn(DisasCont - /* ignore for now */ - break; - case 0x1aa: /* rsm */ -+ if(gen_svm_check_intercept(s, pc_start, SVM_EXIT_RSM)) break; - if (!(s->flags & HF_SMM_MASK)) - goto illegal_op; - if (s->cc_op != CC_OP_DYNAMIC) { -@@ -6492,6 +6662,7 @@ static inline int gen_intermediate_code_ - dc->singlestep_enabled = env->singlestep_enabled; - dc->cc_op = CC_OP_DYNAMIC; - dc->cs_base = cs_base; -+ dc->intercept = tb->intercept; - dc->tb = tb; - dc->popl_esp_hack = 0; - /* select memory access functions */ -Index: qemu-0.9.0.cvs/target-i386/cpu.h -=================================================================== ---- qemu-0.9.0.cvs.orig/target-i386/cpu.h -+++ qemu-0.9.0.cvs/target-i386/cpu.h -@@ -46,6 +46,8 @@ - - #include "softfloat.h" - -+#include "svm.h" -+ - #if defined(__i386__) && !defined(CONFIG_SOFTMMU) && !defined(__APPLE__) - #define USE_CODE_COPY - #endif -@@ -84,6 +86,7 @@ - #define DESC_AVL_MASK (1 << 20) - #define DESC_P_MASK (1 << 15) - #define DESC_DPL_SHIFT 13 -+#define DESC_DPL_MASK (1 << DESC_DPL_SHIFT) - #define DESC_S_MASK (1 << 12) - #define DESC_TYPE_SHIFT 8 - #define DESC_A_MASK (1 << 8) -@@ -149,6 +152,8 @@ - #define HF_VM_SHIFT 17 /* must be same as eflags */ - #define HF_HALTED_SHIFT 18 /* CPU halted */ - #define HF_SMM_SHIFT 19 /* CPU in SMM mode */ -+#define HF_GIF_SHIFT 20 /* if set CPU takes interrupts */ -+#define HF_HIF_SHIFT 21 /* shadow copy of IF_MASK when in SVM */ - - #define HF_CPL_MASK (3 << HF_CPL_SHIFT) - #define HF_SOFTMMU_MASK (1 << HF_SOFTMMU_SHIFT) -@@ -166,6 +171,8 @@ - #define HF_OSFXSR_MASK (1 << HF_OSFXSR_SHIFT) - #define HF_HALTED_MASK (1 << HF_HALTED_SHIFT) - #define HF_SMM_MASK (1 << HF_SMM_SHIFT) -+#define HF_GIF_MASK (1 << HF_GIF_SHIFT) -+#define HF_HIF_MASK (1 << HF_HIF_SHIFT) - - #define CR0_PE_MASK (1 << 0) - #define CR0_MP_MASK (1 << 1) -@@ -249,6 +256,8 @@ - #define MSR_GSBASE 0xc0000101 - #define MSR_KERNELGSBASE 0xc0000102 - -+#define MSR_VM_HSAVE_PA 0xc0010117 -+ - /* cpuid_features bits */ - #define CPUID_FP87 (1 << 0) - #define CPUID_VME (1 << 1) -@@ -283,6 +292,8 @@ - #define CPUID_EXT2_FFXSR (1 << 25) - #define CPUID_EXT2_LM (1 << 29) - -+#define CPUID_EXT3_SVM (1 << 2) -+ - #define EXCP00_DIVZ 0 - #define EXCP01_SSTP 1 - #define EXCP02_NMI 2 -@@ -489,6 +500,16 @@ typedef struct CPUX86State { - uint32_t sysenter_eip; - uint64_t efer; - uint64_t star; -+ -+ target_phys_addr_t vm_hsave; -+ target_phys_addr_t vm_vmcb; -+ uint64_t intercept; -+ uint16_t intercept_cr_read; -+ uint16_t intercept_cr_write; -+ uint16_t intercept_dr_read; -+ uint16_t intercept_dr_write; -+ uint32_t intercept_exceptions; -+ - #ifdef TARGET_X86_64 - target_ulong lstar; - target_ulong cstar; -@@ -530,6 +551,7 @@ typedef struct CPUX86State { - uint32_t cpuid_xlevel; - uint32_t cpuid_model[12]; - uint32_t cpuid_ext2_features; -+ uint32_t cpuid_ext3_features; - uint32_t cpuid_apic_id; - - #ifdef USE_KQEMU -Index: qemu-0.9.0.cvs/target-i386/op.c -=================================================================== ---- qemu-0.9.0.cvs.orig/target-i386/op.c -+++ qemu-0.9.0.cvs/target-i386/op.c -@@ -513,8 +513,6 @@ typedef union UREG64 { - } UREG64; - #endif - --#ifdef TARGET_X86_64 -- - #define PARAMQ1 \ - ({\ - UREG64 __p;\ -@@ -523,6 +521,8 @@ typedef union UREG64 { - __p.q;\ - }) - -+#ifdef TARGET_X86_64 -+ - void OPPROTO op_movq_T0_im64(void) - { - T0 = PARAMQ1; -@@ -1248,6 +1248,44 @@ void OPPROTO op_movl_crN_T0(void) - helper_movl_crN_T0(PARAM1); - } - -+// these pseudo-opcodes check for SVM intercepts -+void OPPROTO op_svm_check_intercept(void) -+{ -+ A0 = PARAM1 & PARAM2; -+ svm_check_intercept(PARAMQ1); -+} -+ -+void OPPROTO op_svm_check_intercept_param(void) -+{ -+ A0 = PARAM1 & PARAM2; -+ svm_check_intercept_param(PARAMQ1, T1); -+} -+ -+void OPPROTO op_svm_vmexit(void) -+{ -+ A0 = PARAM1 & PARAM2; -+ vmexit(PARAMQ1, T1); -+} -+ -+void OPPROTO op_geneflags(void) -+{ -+ CC_SRC = cc_table[CC_OP].compute_all(); -+} -+ -+// this pseudo-opcode checks for IO intercepts -+#if !defined(CONFIG_USER_ONLY) -+void OPPROTO op_svm_check_intercept_io(void) -+{ -+ A0 = PARAM1 & PARAM2; -+ // PARAMQ1 = TYPE (0 = OUT, 1 = IN; 4 = STRING; 8 = REP) -+ // T0 = PORT -+ // T1 = next eip -+ stq_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_info_2), T1); -+ // ASIZE does not appear on real hw -+ svm_check_intercept_param(SVM_EXIT_IOIO, (PARAMQ1 & ~SVM_IOIO_ASIZE_MASK) | ((T0 & 0xffff) << 16)); -+} -+#endif -+ - #if !defined(CONFIG_USER_ONLY) - void OPPROTO op_movtl_T0_cr8(void) - { -@@ -2452,3 +2490,45 @@ void OPPROTO op_emms(void) - - #define SHIFT 1 - #include "ops_sse.h" -+ -+/* Secure Virtual Machine ops */ -+ -+void OPPROTO op_vmrun(void) -+{ -+ helper_vmrun(EAX); -+} -+ -+void OPPROTO op_vmmcall(void) -+{ -+ helper_vmmcall(); -+} -+ -+void OPPROTO op_vmload(void) -+{ -+ helper_vmload(EAX); -+} -+ -+void OPPROTO op_vmsave(void) -+{ -+ helper_vmsave(EAX); -+} -+ -+void OPPROTO op_stgi(void) -+{ -+ helper_stgi(); -+} -+ -+void OPPROTO op_clgi(void) -+{ -+ helper_clgi(); -+} -+ -+void OPPROTO op_skinit(void) -+{ -+ helper_skinit(); -+} -+ -+void OPPROTO op_invlpga(void) -+{ -+ helper_invlpga(); -+} -Index: qemu-0.9.0.cvs/target-i386/helper.c -=================================================================== ---- qemu-0.9.0.cvs.orig/target-i386/helper.c -+++ qemu-0.9.0.cvs/target-i386/helper.c -@@ -594,7 +594,18 @@ static void do_interrupt_protected(int i - int has_error_code, new_stack, shift; - uint32_t e1, e2, offset, ss, esp, ss_e1, ss_e2; - uint32_t old_eip, sp_mask; -+ int svm_should_check = 1; - -+ if((env->intercept & INTERCEPT_SVM_MASK) && !is_int && next_eip==-1) { -+ next_eip = EIP; -+ svm_should_check = 0; -+ } -+ -+ if(svm_should_check -+ && (INTERCEPTEDl(_exceptions, 1 << intno) -+ && !is_int)) { -+ raise_interrupt(intno, is_int, error_code, 0); -+ } - has_error_code = 0; - if (!is_int && !is_hw) { - switch(intno) { -@@ -830,7 +841,17 @@ static void do_interrupt64(int intno, in - int has_error_code, new_stack; - uint32_t e1, e2, e3, ss; - target_ulong old_eip, esp, offset; -+ int svm_should_check = 1; - -+ if((env->intercept & INTERCEPT_SVM_MASK) && !is_int && next_eip==-1) { -+ next_eip = EIP; -+ svm_should_check = 0; -+ } -+ if(svm_should_check -+ && INTERCEPTEDl(_exceptions, 1 << intno) -+ && !is_int) { -+ raise_interrupt(intno, is_int, error_code, 0); -+ } - has_error_code = 0; - if (!is_int && !is_hw) { - switch(intno) { -@@ -1077,7 +1098,17 @@ static void do_interrupt_real(int intno, - int selector; - uint32_t offset, esp; - uint32_t old_cs, old_eip; -+ int svm_should_check = 1; - -+ if((env->intercept & INTERCEPT_SVM_MASK) && !is_int && next_eip==-1) { -+ next_eip = EIP; -+ svm_should_check = 0; -+ } -+ if(svm_should_check -+ && INTERCEPTEDl(_exceptions, 1 << intno) -+ && !is_int) { -+ raise_interrupt(intno, is_int, error_code, 0); -+ } - /* real mode (simpler !) */ - dt = &env->idt; - if (intno * 4 + 3 > dt->limit) -@@ -1227,13 +1258,16 @@ int check_exception(int intno, int *erro - void raise_interrupt(int intno, int is_int, int error_code, - int next_eip_addend) - { -- if (!is_int) -+ if (!is_int) { -+ svm_check_intercept_param(SVM_EXIT_EXCP_BASE + intno, error_code); - intno = check_exception(intno, &error_code); -+ } - - env->exception_index = intno; - env->error_code = error_code; - env->exception_is_int = is_int; - env->exception_next_eip = env->eip + next_eip_addend; -+ - cpu_loop_exit(); - } - -@@ -1671,7 +1705,7 @@ void helper_cpuid(void) - case 0x80000001: - EAX = env->cpuid_features; - EBX = 0; -- ECX = 0; -+ ECX = env->cpuid_ext3_features; - EDX = env->cpuid_ext2_features; - break; - case 0x80000002: -@@ -2745,6 +2779,9 @@ void helper_wrmsr(void) - case MSR_PAT: - env->pat = val; - break; -+ case MSR_VM_HSAVE_PA: -+ env->vm_hsave = val; -+ break; - #ifdef TARGET_X86_64 - case MSR_LSTAR: - env->lstar = val; -@@ -2796,6 +2833,9 @@ void helper_rdmsr(void) - case MSR_PAT: - val = env->pat; - break; -+ case MSR_VM_HSAVE_PA: -+ val = env->vm_hsave; -+ break; - #ifdef TARGET_X86_64 - case MSR_LSTAR: - val = env->lstar; -@@ -3880,3 +3920,450 @@ void tlb_fill(target_ulong addr, int is_ - } - env = saved_env; - } -+ -+ -+/* Secure Virtual Machine helpers */ -+ -+void helper_stgi() -+{ -+ env->hflags |= HF_GIF_MASK; -+} -+ -+void helper_clgi() -+{ -+ env->hflags &= ~HF_GIF_MASK; -+} -+ -+#if defined(CONFIG_USER_ONLY) -+ -+void helper_vmrun(target_ulong addr) { } -+void helper_vmmcall() { } -+void helper_vmload(target_ulong addr) { } -+void helper_vmsave(target_ulong addr) { } -+void helper_skinit() { } -+void helper_invlpga() { } -+void vmexit(uint64_t exit_code, uint64_t exit_info_1) { } -+int svm_check_intercept_param(uint32_t type, uint64_t param) -+{ -+ return 0; -+} -+ -+#else -+ -+static inline uint32_t vmcb2cpu_attrib(uint16_t vmcb_attrib, uint32_t vmcb_base, uint32_t vmcb_limit) { -+ return ((vmcb_attrib & 0x00ff) << 8) // Type, S, DPL, P -+ | ((vmcb_attrib & 0x0f00) << 12) // AVL, L, DB, G -+ | ((vmcb_base >> 16) & 0xff) // Base 23-16 -+ | (vmcb_base & 0xff000000) // Base 31-24 -+ | (vmcb_limit & 0xf0000); // Limit 19-16 -+} -+ -+static inline uint16_t cpu2vmcb_attrib(uint32_t cpu_attrib) { -+ return ((cpu_attrib >> 8) & 0xff) // Type, S, DPL, P -+ | ((cpu_attrib & 0xf00000) >> 12); // AVL, L, DB, G -+} -+ -+extern uint8_t *phys_ram_base; -+void helper_vmrun(target_ulong addr) -+{ -+ uint32_t event_inj; -+ uint32_t int_ctl; -+ -+ if (loglevel & CPU_LOG_TB_IN_ASM) fprintf(logfile,"vmrun! %#lx\n", addr); -+ -+ env->vm_vmcb = addr; -+ regs_to_env(); -+ -+ // save the current CPU state in the hsave page -+ stq_phys(env->vm_hsave + offsetof(struct vmcb, save.gdtr.base), env->gdt.base); -+ stl_phys(env->vm_hsave + offsetof(struct vmcb, save.gdtr.limit), env->gdt.limit); -+ -+ stq_phys(env->vm_hsave + offsetof(struct vmcb, save.idtr.base), env->idt.base); -+ stl_phys(env->vm_hsave + offsetof(struct vmcb, save.idtr.limit), env->idt.limit); -+ -+ stq_phys(env->vm_hsave + offsetof(struct vmcb, save.cr0), env->cr[0]); -+ stq_phys(env->vm_hsave + offsetof(struct vmcb, save.cr2), env->cr[2]); -+ stq_phys(env->vm_hsave + offsetof(struct vmcb, save.cr3), env->cr[3]); -+ stq_phys(env->vm_hsave + offsetof(struct vmcb, save.cr4), env->cr[4]); -+ stq_phys(env->vm_hsave + offsetof(struct vmcb, save.cr8), env->cr[8]); -+ stq_phys(env->vm_hsave + offsetof(struct vmcb, save.dr6), env->dr[6]); -+ stq_phys(env->vm_hsave + offsetof(struct vmcb, save.dr7), env->dr[7]); -+ -+ stq_phys(env->vm_hsave + offsetof(struct vmcb, save.efer), env->efer); -+ stq_phys(env->vm_hsave + offsetof(struct vmcb, save.rflags), compute_eflags()); -+ -+ SVM_SAVE_SEG(env->vm_hsave, segs[R_ES], es); -+ SVM_SAVE_SEG(env->vm_hsave, segs[R_CS], cs); -+ SVM_SAVE_SEG(env->vm_hsave, segs[R_SS], ss); -+ SVM_SAVE_SEG(env->vm_hsave, segs[R_DS], ds); -+ -+ stq_phys(env->vm_hsave + offsetof(struct vmcb, save.rip), EIP); -+ stq_phys(env->vm_hsave + offsetof(struct vmcb, save.rsp), ESP); -+ stq_phys(env->vm_hsave + offsetof(struct vmcb, save.rax), EAX); -+ -+ // load the interception bitmaps so we do not need to access the vmcb in svm mode -+ env->intercept = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, control.intercept)) | INTERCEPT_SVM_MASK; -+ env->intercept_cr_read = lduw_phys(env->vm_vmcb + offsetof(struct vmcb, control.intercept_cr_read)); -+ env->intercept_cr_write = lduw_phys(env->vm_vmcb + offsetof(struct vmcb, control.intercept_cr_write)); -+ env->intercept_dr_read = lduw_phys(env->vm_vmcb + offsetof(struct vmcb, control.intercept_dr_read)); -+ env->intercept_dr_write = lduw_phys(env->vm_vmcb + offsetof(struct vmcb, control.intercept_dr_write)); -+ env->intercept_exceptions = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.intercept_exceptions)); -+ -+ env->gdt.base = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.gdtr.base)); -+ env->gdt.limit = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, save.gdtr.limit)); -+ -+ env->idt.base = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.idtr.base)); -+ env->idt.limit = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, save.idtr.limit)); -+ -+ // clear exit_info_2 so we behave like the real hardware -+ stq_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_info_2), 0); -+ -+ cpu_x86_update_cr0(env, ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.cr0))); -+ cpu_x86_update_cr4(env, ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.cr4))); -+ cpu_x86_update_cr3(env, ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.cr3))); -+ env->cr[2] = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.cr2)); -+ int_ctl = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_ctl)); -+ if(int_ctl & V_INTR_MASKING_MASK) { -+ env->cr[8] = int_ctl & V_TPR_MASK; -+ if(env->eflags & IF_MASK) env->hflags |= HF_HIF_MASK; -+ } -+ -+#ifdef TARGET_X86_64 -+ env->efer = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.efer)); -+ env->hflags &= ~HF_LMA_MASK; -+ if (env->efer & MSR_EFER_LMA) -+ env->hflags |= HF_LMA_MASK; -+#endif -+ env->eflags = 0; -+ load_eflags(ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rflags)), ~(CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C | DF_MASK)); -+ CC_OP = CC_OP_EFLAGS; -+ CC_DST = 0xffffffff; -+ -+ SVM_LOAD_SEG(env->vm_vmcb, ES, es); -+ SVM_LOAD_SEG(env->vm_vmcb, CS, cs); -+ SVM_LOAD_SEG(env->vm_vmcb, SS, ss); -+ SVM_LOAD_SEG(env->vm_vmcb, DS, ds); -+ -+ EIP = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rip)); -+ env->eip = EIP; -+ ESP = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rsp)); -+ EAX = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rax)); -+ env->dr[7] = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.dr7)); -+ env->dr[6] = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.dr6)); -+ cpu_x86_set_cpl(env, ldub_phys(env->vm_vmcb + offsetof(struct vmcb, save.cpl))); -+ -+ // FIXME: guest state consistency checks -+ -+ switch(ldub_phys(env->vm_vmcb + offsetof(struct vmcb, control.tlb_ctl))) { -+ case TLB_CONTROL_DO_NOTHING: -+ break; -+ case TLB_CONTROL_FLUSH_ALL_ASID: -+ // FIXME: this is not 100% correct but should work for now -+ tlb_flush(env, 1); -+ break; -+ } -+ -+ helper_stgi(); -+ -+ regs_to_env(); -+ -+ // maybe we need to inject an event -+ event_inj = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.event_inj)); -+ if(event_inj & SVM_EVTINJ_VALID) { -+ uint8_t vector = event_inj & SVM_EVTINJ_VEC_MASK; -+ uint16_t valid_err = event_inj & SVM_EVTINJ_VALID_ERR; -+ uint32_t event_inj_err = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.event_inj_err)); -+ stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.event_inj), event_inj & ~SVM_EVTINJ_VALID); -+ -+ if (loglevel & CPU_LOG_TB_IN_ASM) fprintf(logfile, "Injecting(%#hx): ", valid_err); -+ // FIXME: need to implement valid_err -+ switch(event_inj & SVM_EVTINJ_TYPE_MASK) { -+ case SVM_EVTINJ_TYPE_INTR: -+ env->exception_index = vector; -+ env->error_code = event_inj_err; -+ env->exception_is_int = 1; -+ env->exception_next_eip = -1; -+ if (loglevel & CPU_LOG_TB_IN_ASM) fprintf(logfile, "INTR"); -+ break; -+ case SVM_EVTINJ_TYPE_NMI: -+ env->exception_index = vector; -+ env->error_code = event_inj_err; -+ env->exception_is_int = 1; -+ env->exception_next_eip = EIP; -+ if (loglevel & CPU_LOG_TB_IN_ASM) fprintf(logfile, "NMI"); -+ break; -+ case SVM_EVTINJ_TYPE_EXEPT: -+ env->exception_index = vector; -+ env->error_code = event_inj_err; -+ env->exception_is_int = 0; -+ env->exception_next_eip = -1; -+ if (loglevel & CPU_LOG_TB_IN_ASM) fprintf(logfile, "EXEPT"); -+ break; -+ case SVM_EVTINJ_TYPE_SOFT: -+ env->exception_index = vector; -+ env->error_code = event_inj_err; -+ env->exception_is_int = 1; -+ env->exception_next_eip = EIP; -+ if (loglevel & CPU_LOG_TB_IN_ASM) fprintf(logfile, "SOFT"); -+ break; -+ } -+ if (loglevel & CPU_LOG_TB_IN_ASM) fprintf(logfile, " %#x %#x\n", env->exception_index, env->error_code); -+ } -+ if (int_ctl & V_IRQ_MASK) -+ env->interrupt_request |= CPU_INTERRUPT_VIRQ; -+ -+ cpu_loop_exit(); -+} -+ -+void helper_vmmcall() -+{ -+ if (loglevel & CPU_LOG_TB_IN_ASM) fprintf(logfile,"vmmcall!\n"); -+} -+ -+void helper_vmload(target_ulong addr) -+{ -+ if (loglevel & CPU_LOG_TB_IN_ASM) fprintf(logfile,"vmload! %#lx\nFS: %#lx | %#lx\n", addr, ldq_phys(addr + offsetof(struct vmcb, save.fs.base)), env->segs[R_FS].base); -+ -+ SVM_LOAD_SEG2(addr, segs[R_FS], fs); -+ SVM_LOAD_SEG2(addr, segs[R_GS], gs); -+ SVM_LOAD_SEG2(addr, tr, tr); -+ SVM_LOAD_SEG2(addr, ldt, ldtr); -+ -+#ifdef TARGET_X86_64 -+ env->kernelgsbase = ldq_phys(addr + offsetof(struct vmcb, save.kernel_gs_base)); -+ env->lstar = ldq_phys(addr + offsetof(struct vmcb, save.lstar)); -+ env->cstar = ldq_phys(addr + offsetof(struct vmcb, save.cstar)); -+ env->fmask = ldq_phys(addr + offsetof(struct vmcb, save.sfmask)); -+#endif -+ env->star = ldq_phys(addr + offsetof(struct vmcb, save.star)); -+ env->sysenter_cs = ldq_phys(addr + offsetof(struct vmcb, save.sysenter_cs)); -+ env->sysenter_esp = ldq_phys(addr + offsetof(struct vmcb, save.sysenter_esp)); -+ env->sysenter_eip = ldq_phys(addr + offsetof(struct vmcb, save.sysenter_eip)); -+} -+ -+void helper_vmsave(target_ulong addr) -+{ -+ if (loglevel & CPU_LOG_TB_IN_ASM) fprintf(logfile,"vmsave! %#lx\nFS: %#lx | %#lx\n", addr, ldq_phys(addr + offsetof(struct vmcb, save.fs.base)), env->segs[R_FS].base); -+ -+ SVM_SAVE_SEG(addr, segs[R_FS], fs); -+ SVM_SAVE_SEG(addr, segs[R_GS], gs); -+ SVM_SAVE_SEG(addr, tr, tr); -+ SVM_SAVE_SEG(addr, ldt, ldtr); -+ -+#ifdef TARGET_X86_64 -+ stq_phys(addr + offsetof(struct vmcb, save.kernel_gs_base), env->kernelgsbase); -+ stq_phys(addr + offsetof(struct vmcb, save.lstar), env->lstar); -+ stq_phys(addr + offsetof(struct vmcb, save.cstar), env->cstar); -+ stq_phys(addr + offsetof(struct vmcb, save.sfmask), env->fmask); -+#endif -+ stq_phys(addr + offsetof(struct vmcb, save.star), env->star); -+ stq_phys(addr + offsetof(struct vmcb, save.sysenter_cs), env->sysenter_cs); -+ stq_phys(addr + offsetof(struct vmcb, save.sysenter_esp), env->sysenter_esp); -+ stq_phys(addr + offsetof(struct vmcb, save.sysenter_eip), env->sysenter_eip); -+} -+ -+void helper_skinit() -+{ -+ if (loglevel & CPU_LOG_TB_IN_ASM) fprintf(logfile,"skinit!\n"); -+} -+ -+void helper_invlpga() -+{ -+ tlb_flush(env, 0); -+} -+ -+int svm_check_intercept_param(uint32_t type, uint64_t param) { -+ switch(type) { -+ case SVM_EXIT_READ_CR0 ... SVM_EXIT_READ_CR0 + 8: -+ if (INTERCEPTEDw(_cr_read, (1 << (type - SVM_EXIT_READ_CR0)))) { -+ vmexit(type, param); -+ return 1; -+ } -+ break; -+ case SVM_EXIT_READ_DR0 ... SVM_EXIT_READ_DR0 + 8: -+ if (INTERCEPTEDw(_dr_read, (1 << (type - SVM_EXIT_READ_DR0)))) { -+ vmexit(type, param); -+ return 1; -+ } -+ break; -+ case SVM_EXIT_WRITE_CR0 ... SVM_EXIT_WRITE_CR0 + 8: -+ if (INTERCEPTEDw(_cr_write, (1 << (type - SVM_EXIT_WRITE_CR0)))) { -+ vmexit(type, param); -+ return 1; -+ } -+ break; -+ case SVM_EXIT_WRITE_DR0 ... SVM_EXIT_WRITE_DR0 + 8: -+ if (INTERCEPTEDw(_dr_write, (1 << (type - SVM_EXIT_WRITE_DR0)))) { -+ vmexit(type, param); -+ return 1; -+ } -+ break; -+ case SVM_EXIT_EXCP_BASE ... SVM_EXIT_EXCP_BASE + 16: -+ if (INTERCEPTEDl(_exceptions, (1 << (type - SVM_EXIT_EXCP_BASE)))) { -+ vmexit(type, param); -+ return 1; -+ } -+ break; -+ case SVM_EXIT_IOIO: -+ if (INTERCEPTED(INTERCEPT_IOIO_PROT)) { -+ // FIXME: this should be read in at vmrun (faster this way?) -+ uint64_t addr = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, control.iopm_base_pa)); -+ uint16_t port = (uint16_t) (param >> 16); -+ -+ if(ldub_phys(addr + port / 8) & (1 << (port % 8))) -+ vmexit(type, param); -+ } -+ break; -+ -+ case SVM_EXIT_MSR: -+ if (INTERCEPTED(1L << INTERCEPT_MSR_PROT)) { -+ // FIXME: this should be read in at vmrun (faster this way?) -+ uint64_t addr = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, control.msrpm_base_pa)); -+ switch((uint32_t)ECX) { -+ case 0 ... 0x1fff: -+ T0 = (ECX * 2) % 8; -+ T1 = ECX / 8; -+ break; -+ case 0xc0000000 ... 0xc0001fff: -+ T0 = (8192 + ECX - 0xc0000000) * 2; -+ T1 = (T0 / 8); -+ T0 %= 8; -+ break; -+ case 0xc0010000 ... 0xc0011fff: -+ T0 = (16384 + ECX - 0xc0010000) * 2; -+ T1 = (T0 / 8); -+ T0 %= 8; -+ break; -+ default: -+ vmexit(type, param); -+ return 1; -+ } -+ if (ldub_phys(addr + T1) & ((1 << param) << T0)) -+ vmexit(type, param); -+ return 1; -+ } -+ break; -+ default: -+ if (INTERCEPTED((1 << (type - SVM_EXIT_INTR)))) { -+ vmexit(type, param); -+ return 1; -+ } -+ break; -+ } -+ return 0; -+} -+ -+void vmexit(uint64_t exit_code, uint64_t exit_info_1) -+{ -+ uint32_t int_ctl; -+ -+ if (loglevel & CPU_LOG_TB_IN_ASM) fprintf(logfile,"vmexit(%#lx, %#lx, %#lx, %#lx)!\n", exit_code, exit_info_1, ldq_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_info_2)), EIP); -+ -+// Save the VM state in the vmcb -+ SVM_SAVE_SEG(env->vm_vmcb, segs[R_ES], es); -+ SVM_SAVE_SEG(env->vm_vmcb, segs[R_CS], cs); -+ SVM_SAVE_SEG(env->vm_vmcb, segs[R_SS], ss); -+ SVM_SAVE_SEG(env->vm_vmcb, segs[R_DS], ds); -+ -+ stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.gdtr.base), env->gdt.base); -+ stl_phys(env->vm_vmcb + offsetof(struct vmcb, save.gdtr.limit), env->gdt.limit); -+ -+ stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.idtr.base), env->idt.base); -+ stl_phys(env->vm_vmcb + offsetof(struct vmcb, save.idtr.limit), env->idt.limit); -+ -+ stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.efer), env->efer); -+ stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.cr0), env->cr[0]); -+ stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.cr2), env->cr[2]); -+ stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.cr3), env->cr[3]); -+ stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.cr4), env->cr[4]); -+ -+ if((int_ctl = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_ctl))) & V_INTR_MASKING_MASK) { -+ int_ctl &= ~V_TPR_MASK; -+ int_ctl |= env->cr[8] & V_TPR_MASK; -+ stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_ctl), int_ctl); -+ } -+ -+ stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rflags), compute_eflags()); -+ stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rip), env->eip); -+ stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rsp), ESP); -+ stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rax), EAX); -+ stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.dr7), env->dr[7]); -+ stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.dr6), env->dr[6]); -+ stb_phys(env->vm_vmcb + offsetof(struct vmcb, save.cpl), env->hflags & HF_CPL_MASK); -+ -+// Reload the host state from vm_hsave -+ env->hflags &= ~HF_HIF_MASK; -+ env->intercept = 0; -+ env->intercept_exceptions = 0; -+ env->interrupt_request &= ~CPU_INTERRUPT_VIRQ; -+ -+ env->gdt.base = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.gdtr.base)); -+ env->gdt.limit = ldl_phys(env->vm_hsave + offsetof(struct vmcb, save.gdtr.limit)); -+ -+ env->idt.base = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.idtr.base)); -+ env->idt.limit = ldl_phys(env->vm_hsave + offsetof(struct vmcb, save.idtr.limit)); -+ -+ cpu_x86_update_cr0(env, ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.cr0)) | CR0_PE_MASK); -+ cpu_x86_update_cr4(env, ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.cr4))); -+ cpu_x86_update_cr3(env, ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.cr3))); -+ if(int_ctl & V_INTR_MASKING_MASK) -+ env->cr[8] = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.cr8)); -+ // we need to set the efer after the crs so the hidden flags get set properly -+#ifdef TARGET_X86_64 -+ env->efer = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.efer)); -+ env->hflags &= ~HF_LMA_MASK; -+ if (env->efer & MSR_EFER_LMA) -+ env->hflags |= HF_LMA_MASK; -+#endif -+ -+ env->eflags = 0; -+ load_eflags(ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.rflags)), ~(CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C | DF_MASK)); -+ CC_OP = CC_OP_EFLAGS; -+ -+ SVM_LOAD_SEG(env->vm_hsave, ES, es); -+ SVM_LOAD_SEG(env->vm_hsave, CS, cs); -+ SVM_LOAD_SEG(env->vm_hsave, SS, ss); -+ SVM_LOAD_SEG(env->vm_hsave, DS, ds); -+ -+ EIP = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.rip)); -+ ESP = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.rsp)); -+ EAX = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.rax)); -+ -+ env->dr[6] = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.dr6)); -+ env->dr[7] = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.dr7)); -+ -+// other setups -+ cpu_x86_set_cpl(env, 0); -+ stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_code_hi), (uint32_t)(exit_code >> 32)); -+ stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_code), exit_code); -+ stq_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_info_1), exit_info_1); -+ -+ helper_clgi(); -+ // FIXME: Resets the current ASID register to zero (host ASID). -+ -+ // Clears the V_IRQ and V_INTR_MASKING bits inside the processor. -+ -+ // Clears the TSC_OFFSET inside the processor. -+ -+ // If the host is in PAE mode, the processor reloads the host's PDPEs from the page table indicated the host's CR3. If the PDPEs contain illegal state, the processor causes a shutdown. -+ -+ // Forces CR0.PE = 1, RFLAGS.VM = 0. -+ env->cr[0] |= CR0_PE_MASK; -+ env->eflags &= ~VM_MASK; -+ -+ // Disables all breakpoints in the host DR7 register. -+ -+ // Checks the reloaded host state for consistency; -+ -+ // If the host’s rIP reloaded by #VMEXIT is outside the limit of the host’s code segment or non-canonical (in the case of long mode), a #GP fault is delivered inside the host.) -+ -+ // remove any pending exception -+ env->exception_index = -1; -+ env->error_code = 0; -+ env->old_exception = -1; -+ -+ regs_to_env(); -+ cpu_loop_exit(); -+} -+ -+#endif -Index: qemu-0.9.0.cvs/target-i386/svm.h -=================================================================== ---- /dev/null -+++ qemu-0.9.0.cvs/target-i386/svm.h -@@ -0,0 +1,357 @@ -+#ifndef __SVM_H -+#define __SVM_H -+ -+enum { -+ INTERCEPT_INTR, -+ INTERCEPT_NMI, -+ INTERCEPT_SMI, -+ INTERCEPT_INIT, -+ INTERCEPT_VINTR, -+ INTERCEPT_SELECTIVE_CR0, -+ INTERCEPT_STORE_IDTR, -+ INTERCEPT_STORE_GDTR, -+ INTERCEPT_STORE_LDTR, -+ INTERCEPT_STORE_TR, -+ INTERCEPT_LOAD_IDTR, -+ INTERCEPT_LOAD_GDTR, -+ INTERCEPT_LOAD_LDTR, -+ INTERCEPT_LOAD_TR, -+ INTERCEPT_RDTSC, -+ INTERCEPT_RDPMC, -+ INTERCEPT_PUSHF, -+ INTERCEPT_POPF, -+ INTERCEPT_CPUID, -+ INTERCEPT_RSM, -+ INTERCEPT_IRET, -+ INTERCEPT_INTn, -+ INTERCEPT_INVD, -+ INTERCEPT_PAUSE, -+ INTERCEPT_HLT, -+ INTERCEPT_INVLPG, -+ INTERCEPT_INVLPGA, -+ INTERCEPT_IOIO_PROT, -+ INTERCEPT_MSR_PROT, -+ INTERCEPT_TASK_SWITCH, -+ INTERCEPT_FERR_FREEZE, -+ INTERCEPT_SHUTDOWN, -+ INTERCEPT_VMRUN, -+ INTERCEPT_VMMCALL, -+ INTERCEPT_VMLOAD, -+ INTERCEPT_VMSAVE, -+ INTERCEPT_STGI, -+ INTERCEPT_CLGI, -+ INTERCEPT_SKINIT, -+ INTERCEPT_RDTSCP, -+ INTERCEPT_ICEBP, -+ INTERCEPT_WBINVD, -+}; -+// This is not really an intercept but rather a placeholder to -+// show that we are in an SVM (just like a hidden flag, but keeps the -+// TBs clean) -+#define INTERCEPT_SVM 63 -+#define INTERCEPT_SVM_MASK (1ULL << INTERCEPT_SVM) -+ -+struct __attribute__ ((__packed__)) vmcb_control_area { -+ uint16_t intercept_cr_read; -+ uint16_t intercept_cr_write; -+ uint16_t intercept_dr_read; -+ uint16_t intercept_dr_write; -+ uint32_t intercept_exceptions; -+ uint64_t intercept; -+ uint8_t reserved_1[44]; -+ uint64_t iopm_base_pa; -+ uint64_t msrpm_base_pa; -+ uint64_t tsc_offset; -+ uint32_t asid; -+ uint8_t tlb_ctl; -+ uint8_t reserved_2[3]; -+ uint32_t int_ctl; -+ uint32_t int_vector; -+ uint32_t int_state; -+ uint8_t reserved_3[4]; -+ uint32_t exit_code; -+ uint32_t exit_code_hi; -+ uint64_t exit_info_1; -+ uint64_t exit_info_2; -+ uint32_t exit_int_info; -+ uint32_t exit_int_info_err; -+ uint64_t nested_ctl; -+ uint8_t reserved_4[16]; -+ uint32_t event_inj; -+ uint32_t event_inj_err; -+ uint64_t nested_cr3; -+ uint64_t lbr_ctl; -+ uint8_t reserved_5[832]; -+}; -+ -+ -+#define TLB_CONTROL_DO_NOTHING 0 -+#define TLB_CONTROL_FLUSH_ALL_ASID 1 -+ -+#define V_TPR_MASK 0x0f -+ -+#define V_IRQ_SHIFT 8 -+#define V_IRQ_MASK (1 << V_IRQ_SHIFT) -+ -+#define V_INTR_PRIO_SHIFT 16 -+#define V_INTR_PRIO_MASK (0x0f << V_INTR_PRIO_SHIFT) -+ -+#define V_IGN_TPR_SHIFT 20 -+#define V_IGN_TPR_MASK (1 << V_IGN_TPR_SHIFT) -+ -+#define V_INTR_MASKING_SHIFT 24 -+#define V_INTR_MASKING_MASK (1 << V_INTR_MASKING_SHIFT) -+ -+#define SVM_INTERRUPT_SHADOW_MASK 1 -+ -+#define SVM_IOIO_STR_SHIFT 2 -+#define SVM_IOIO_REP_SHIFT 3 -+#define SVM_IOIO_SIZE_SHIFT 4 -+#define SVM_IOIO_ASIZE_SHIFT 7 -+ -+#define SVM_IOIO_TYPE_MASK 1 -+#define SVM_IOIO_STR_MASK (1 << SVM_IOIO_STR_SHIFT) -+#define SVM_IOIO_REP_MASK (1 << SVM_IOIO_REP_SHIFT) -+#define SVM_IOIO_SIZE_MASK (7 << SVM_IOIO_SIZE_SHIFT) -+#define SVM_IOIO_ASIZE_MASK (7 << SVM_IOIO_ASIZE_SHIFT) -+ -+struct __attribute__ ((__packed__)) vmcb_seg { -+ uint16_t selector; -+ uint16_t attrib; -+ uint32_t limit; -+ uint64_t base; -+}; -+ -+struct __attribute__ ((__packed__)) vmcb_save_area { -+ struct vmcb_seg es; -+ struct vmcb_seg cs; -+ struct vmcb_seg ss; -+ struct vmcb_seg ds; -+ struct vmcb_seg fs; -+ struct vmcb_seg gs; -+ struct vmcb_seg gdtr; -+ struct vmcb_seg ldtr; -+ struct vmcb_seg idtr; -+ struct vmcb_seg tr; -+ uint8_t reserved_1[43]; -+ uint8_t cpl; -+ uint8_t reserved_2[4]; -+ uint64_t efer; -+ uint8_t reserved_3[112]; -+ uint64_t cr4; -+ uint64_t cr3; -+ uint64_t cr0; -+ uint64_t dr7; -+ uint64_t dr6; -+ uint64_t rflags; -+ uint64_t rip; -+ uint8_t reserved_4[88]; -+ uint64_t rsp; -+ uint8_t reserved_5[24]; -+ uint64_t rax; -+ uint64_t star; -+ uint64_t lstar; -+ uint64_t cstar; -+ uint64_t sfmask; -+ uint64_t kernel_gs_base; -+ uint64_t sysenter_cs; -+ uint64_t sysenter_esp; -+ uint64_t sysenter_eip; -+ uint64_t cr2; -+ // qemu: added to reuse this as hsave -+ uint64_t cr8; -+ // end of add -+ uint8_t reserved_6[32 - 8]; // originally 32 -+ uint64_t g_pat; -+ uint64_t dbgctl; -+ uint64_t br_from; -+ uint64_t br_to; -+ uint64_t last_excp_from; -+ uint64_t last_excp_to; -+}; -+ -+struct __attribute__ ((__packed__)) vmcb { -+ struct vmcb_control_area control; -+ struct vmcb_save_area save; -+}; -+ -+#define SVM_CPUID_FEATURE_SHIFT 2 -+#define SVM_CPUID_FUNC 0x8000000a -+ -+#define MSR_EFER_SVME_MASK (1ULL << 12) -+ -+#define SVM_SELECTOR_S_SHIFT 4 -+#define SVM_SELECTOR_DPL_SHIFT 5 -+#define SVM_SELECTOR_P_SHIFT 7 -+#define SVM_SELECTOR_AVL_SHIFT 8 -+#define SVM_SELECTOR_L_SHIFT 9 -+#define SVM_SELECTOR_DB_SHIFT 10 -+#define SVM_SELECTOR_G_SHIFT 11 -+ -+#define SVM_SELECTOR_TYPE_MASK (0xf) -+#define SVM_SELECTOR_S_MASK (1 << SVM_SELECTOR_S_SHIFT) -+#define SVM_SELECTOR_DPL_MASK (3 << SVM_SELECTOR_DPL_SHIFT) -+#define SVM_SELECTOR_P_MASK (1 << SVM_SELECTOR_P_SHIFT) -+#define SVM_SELECTOR_AVL_MASK (1 << SVM_SELECTOR_AVL_SHIFT) -+#define SVM_SELECTOR_L_MASK (1 << SVM_SELECTOR_L_SHIFT) -+#define SVM_SELECTOR_DB_MASK (1 << SVM_SELECTOR_DB_SHIFT) -+#define SVM_SELECTOR_G_MASK (1 << SVM_SELECTOR_G_SHIFT) -+ -+#define SVM_SELECTOR_WRITE_MASK (1 << 1) -+#define SVM_SELECTOR_READ_MASK SVM_SELECTOR_WRITE_MASK -+#define SVM_SELECTOR_CODE_MASK (1 << 3) -+ -+#define INTERCEPT_CR0_MASK 1 -+#define INTERCEPT_CR3_MASK (1 << 3) -+#define INTERCEPT_CR4_MASK (1 << 4) -+ -+#define INTERCEPT_DR0_MASK 1 -+#define INTERCEPT_DR1_MASK (1 << 1) -+#define INTERCEPT_DR2_MASK (1 << 2) -+#define INTERCEPT_DR3_MASK (1 << 3) -+#define INTERCEPT_DR4_MASK (1 << 4) -+#define INTERCEPT_DR5_MASK (1 << 5) -+#define INTERCEPT_DR6_MASK (1 << 6) -+#define INTERCEPT_DR7_MASK (1 << 7) -+ -+#define SVM_EVTINJ_VEC_MASK 0xff -+ -+#define SVM_EVTINJ_TYPE_SHIFT 8 -+#define SVM_EVTINJ_TYPE_MASK (7 << SVM_EVTINJ_TYPE_SHIFT) -+ -+#define SVM_EVTINJ_TYPE_INTR (0 << SVM_EVTINJ_TYPE_SHIFT) -+#define SVM_EVTINJ_TYPE_NMI (2 << SVM_EVTINJ_TYPE_SHIFT) -+#define SVM_EVTINJ_TYPE_EXEPT (3 << SVM_EVTINJ_TYPE_SHIFT) -+#define SVM_EVTINJ_TYPE_SOFT (4 << SVM_EVTINJ_TYPE_SHIFT) -+ -+#define SVM_EVTINJ_VALID (1 << 31) -+#define SVM_EVTINJ_VALID_ERR (1 << 11) -+ -+#define SVM_EXITINTINFO_VEC_MASK SVM_EVTINJ_VEC_MASK -+ -+#define SVM_EXITINTINFO_TYPE_INTR SVM_EVTINJ_TYPE_INTR -+#define SVM_EXITINTINFO_TYPE_NMI SVM_EVTINJ_TYPE_NMI -+#define SVM_EXITINTINFO_TYPE_EXEPT SVM_EVTINJ_TYPE_EXEPT -+#define SVM_EXITINTINFO_TYPE_SOFT SVM_EVTINJ_TYPE_SOFT -+ -+#define SVM_EXITINTINFO_VALID SVM_EVTINJ_VALID -+#define SVM_EXITINTINFO_VALID_ERR SVM_EVTINJ_VALID_ERR -+ -+#define SVM_EXIT_READ_CR0 0x000 -+#define SVM_EXIT_READ_CR3 0x003 -+#define SVM_EXIT_READ_CR4 0x004 -+#define SVM_EXIT_READ_CR8 0x008 -+#define SVM_EXIT_WRITE_CR0 0x010 -+#define SVM_EXIT_WRITE_CR3 0x013 -+#define SVM_EXIT_WRITE_CR4 0x014 -+#define SVM_EXIT_WRITE_CR8 0x018 -+#define SVM_EXIT_READ_DR0 0x020 -+#define SVM_EXIT_READ_DR1 0x021 -+#define SVM_EXIT_READ_DR2 0x022 -+#define SVM_EXIT_READ_DR3 0x023 -+#define SVM_EXIT_READ_DR4 0x024 -+#define SVM_EXIT_READ_DR5 0x025 -+#define SVM_EXIT_READ_DR6 0x026 -+#define SVM_EXIT_READ_DR7 0x027 -+#define SVM_EXIT_WRITE_DR0 0x030 -+#define SVM_EXIT_WRITE_DR1 0x031 -+#define SVM_EXIT_WRITE_DR2 0x032 -+#define SVM_EXIT_WRITE_DR3 0x033 -+#define SVM_EXIT_WRITE_DR4 0x034 -+#define SVM_EXIT_WRITE_DR5 0x035 -+#define SVM_EXIT_WRITE_DR6 0x036 -+#define SVM_EXIT_WRITE_DR7 0x037 -+#define SVM_EXIT_EXCP_BASE 0x040 -+#define SVM_EXIT_INTR 0x060 -+#define SVM_EXIT_NMI 0x061 -+#define SVM_EXIT_SMI 0x062 -+#define SVM_EXIT_INIT 0x063 -+#define SVM_EXIT_VINTR 0x064 -+#define SVM_EXIT_CR0_SEL_WRITE 0x065 -+#define SVM_EXIT_IDTR_READ 0x066 -+#define SVM_EXIT_GDTR_READ 0x067 -+#define SVM_EXIT_LDTR_READ 0x068 -+#define SVM_EXIT_TR_READ 0x069 -+#define SVM_EXIT_IDTR_WRITE 0x06a -+#define SVM_EXIT_GDTR_WRITE 0x06b -+#define SVM_EXIT_LDTR_WRITE 0x06c -+#define SVM_EXIT_TR_WRITE 0x06d -+#define SVM_EXIT_RDTSC 0x06e -+#define SVM_EXIT_RDPMC 0x06f -+#define SVM_EXIT_PUSHF 0x070 -+#define SVM_EXIT_POPF 0x071 -+#define SVM_EXIT_CPUID 0x072 -+#define SVM_EXIT_RSM 0x073 -+#define SVM_EXIT_IRET 0x074 -+#define SVM_EXIT_SWINT 0x075 -+#define SVM_EXIT_INVD 0x076 -+#define SVM_EXIT_PAUSE 0x077 -+#define SVM_EXIT_HLT 0x078 -+#define SVM_EXIT_INVLPG 0x079 -+#define SVM_EXIT_INVLPGA 0x07a -+#define SVM_EXIT_IOIO 0x07b -+#define SVM_EXIT_MSR 0x07c -+#define SVM_EXIT_TASK_SWITCH 0x07d -+#define SVM_EXIT_FERR_FREEZE 0x07e -+#define SVM_EXIT_SHUTDOWN 0x07f -+#define SVM_EXIT_VMRUN 0x080 -+#define SVM_EXIT_VMMCALL 0x081 -+#define SVM_EXIT_VMLOAD 0x082 -+#define SVM_EXIT_VMSAVE 0x083 -+#define SVM_EXIT_STGI 0x084 -+#define SVM_EXIT_CLGI 0x085 -+#define SVM_EXIT_SKINIT 0x086 -+#define SVM_EXIT_RDTSCP 0x087 -+#define SVM_EXIT_ICEBP 0x088 -+#define SVM_EXIT_WBINVD 0x089 -+// only included in documentation, maybe wrong -+#define SVM_EXIT_MONITOR 0x08a -+#define SVM_EXIT_MWAIT 0x08b -+#define SVM_EXIT_NPF 0x400 -+ -+#define SVM_EXIT_ERR -1 -+ -+#define SVM_CR0_SELECTIVE_MASK (1 << 3 | 1) // TS and MP -+ -+#define SVM_VMLOAD ".byte 0x0f, 0x01, 0xda" -+#define SVM_VMRUN ".byte 0x0f, 0x01, 0xd8" -+#define SVM_VMSAVE ".byte 0x0f, 0x01, 0xdb" -+#define SVM_CLGI ".byte 0x0f, 0x01, 0xdd" -+#define SVM_STGI ".byte 0x0f, 0x01, 0xdc" -+#define SVM_INVLPGA ".byte 0x0f, 0x01, 0xdf" -+ -+/////// function references -+ -+void helper_stgi(); -+void vmexit(uint64_t exit_code, uint64_t exit_info_1); -+int svm_check_intercept_param(uint32_t type, uint64_t param); -+static inline int svm_check_intercept(unsigned int type) { -+ return svm_check_intercept_param(type, 0); -+} -+ -+ -+#define INTERCEPTED(mask) (env->intercept & mask) -+#define INTERCEPTEDw(var, mask) (env->intercept ## var & mask) -+#define INTERCEPTEDl(var, mask) (env->intercept ## var & mask) -+ -+#define SVM_LOAD_SEG(addr, seg_index, seg) \ -+ cpu_x86_load_seg_cache(env, \ -+ R_##seg_index, \ -+ lduw_phys(addr + offsetof(struct vmcb, save.seg.selector)),\ -+ ldq_phys(addr + offsetof(struct vmcb, save.seg.base)),\ -+ ldl_phys(addr + offsetof(struct vmcb, save.seg.limit)),\ -+ vmcb2cpu_attrib(lduw_phys(addr + offsetof(struct vmcb, save.seg.attrib)), ldq_phys(addr + offsetof(struct vmcb, save.seg.base)), ldl_phys(addr + offsetof(struct vmcb, save.seg.limit)))) -+ -+#define SVM_LOAD_SEG2(addr, seg_qemu, seg_vmcb) \ -+ env->seg_qemu.selector = lduw_phys(addr + offsetof(struct vmcb, save.seg_vmcb.selector)); \ -+ env->seg_qemu.base = ldq_phys(addr + offsetof(struct vmcb, save.seg_vmcb.base)); \ -+ env->seg_qemu.limit = ldl_phys(addr + offsetof(struct vmcb, save.seg_vmcb.limit)); \ -+ env->seg_qemu.flags = vmcb2cpu_attrib(lduw_phys(addr + offsetof(struct vmcb, save.seg_vmcb.attrib)), env->seg_qemu.base, env->seg_qemu.limit) -+ -+#define SVM_SAVE_SEG(addr, seg_qemu, seg_vmcb) \ -+ stw_phys(addr + offsetof(struct vmcb, save.seg_vmcb.selector), env->seg_qemu.selector); \ -+ stq_phys(addr + offsetof(struct vmcb, save.seg_vmcb.base), env->seg_qemu.base); \ -+ stl_phys(addr + offsetof(struct vmcb, save.seg_vmcb.limit), env->seg_qemu.limit); \ -+ stw_phys(addr + offsetof(struct vmcb, save.seg_vmcb.attrib), cpu2vmcb_attrib(env->seg_qemu.flags)) -+ -+#endif -Index: qemu-0.9.0.cvs/cpu-exec.c -=================================================================== ---- qemu-0.9.0.cvs.orig/cpu-exec.c -+++ qemu-0.9.0.cvs/cpu-exec.c -@@ -104,6 +104,9 @@ static TranslationBlock *tb_find_slow(ta - if (tb->pc == pc && - tb->page_addr[0] == phys_page1 && - tb->cs_base == cs_base && -+#if defined(TARGET_I386) -+ tb->intercept == env->intercept && -+#endif - tb->flags == flags) { - /* check next page if needed */ - if (tb->page_addr[1] != -1) { -@@ -132,6 +135,9 @@ static TranslationBlock *tb_find_slow(ta - tc_ptr = code_gen_ptr; - tb->tc_ptr = tc_ptr; - tb->cs_base = cs_base; -+#if defined(TARGET_I386) -+ tb->intercept = env->intercept; -+#endif - tb->flags = flags; - cpu_gen_code(env, tb, CODE_GEN_MAX_SIZE, &code_gen_size); - code_gen_ptr = (void *)(((unsigned long)code_gen_ptr + code_gen_size + CODE_GEN_ALIGN - 1) & ~(CODE_GEN_ALIGN - 1)); -@@ -218,7 +224,11 @@ static inline TranslationBlock *tb_find_ - #endif - tb = env->tb_jmp_cache[tb_jmp_cache_hash_func(pc)]; - if (__builtin_expect(!tb || tb->pc != pc || tb->cs_base != cs_base || -- tb->flags != flags, 0)) { -+ tb->flags != flags -+#if defined(TARGET_I386) -+ || tb->intercept != env->intercept -+#endif -+ , 0)) { - tb = tb_find_slow(pc, cs_base, flags); - /* Note: we do it here to avoid a gcc bug on Mac OS X when - doing it in tb_find_slow */ -@@ -386,7 +396,11 @@ int cpu_exec(CPUState *env1) - tmp_T0 = T0; - #endif - interrupt_request = env->interrupt_request; -- if (__builtin_expect(interrupt_request, 0)) { -+ if (__builtin_expect(interrupt_request, 0) -+#if defined(TARGET_I386) -+ && env->hflags & HF_GIF_MASK -+#endif -+ ) { - if (interrupt_request & CPU_INTERRUPT_DEBUG) { - env->interrupt_request &= ~CPU_INTERRUPT_DEBUG; - env->exception_index = EXCP_DEBUG; -@@ -404,6 +418,7 @@ int cpu_exec(CPUState *env1) - #if defined(TARGET_I386) - if ((interrupt_request & CPU_INTERRUPT_SMI) && - !(env->hflags & HF_SMM_MASK)) { -+ svm_check_intercept(SVM_EXIT_SMI); - env->interrupt_request &= ~CPU_INTERRUPT_SMI; - do_smm_enter(); - #if defined(__sparc__) && !defined(HOST_SOLARIS) -@@ -412,9 +427,10 @@ int cpu_exec(CPUState *env1) - T0 = 0; - #endif - } else if ((interrupt_request & CPU_INTERRUPT_HARD) && -- (env->eflags & IF_MASK) && -+ (env->eflags & IF_MASK || env->hflags & HF_HIF_MASK) && - !(env->hflags & HF_INHIBIT_IRQ_MASK)) { - int intno; -+ svm_check_intercept(SVM_EXIT_INTR); - env->interrupt_request &= ~CPU_INTERRUPT_HARD; - intno = cpu_get_pic_interrupt(env); - if (loglevel & CPU_LOG_TB_IN_ASM) { -@@ -428,6 +444,23 @@ int cpu_exec(CPUState *env1) - #else - T0 = 0; - #endif -+#if !defined(CONFIG_USER_ONLY) -+ } else if((interrupt_request & CPU_INTERRUPT_VIRQ) && -+ (env->eflags & IF_MASK) && !(env->hflags & HF_INHIBIT_IRQ_MASK)) { -+ int intno; -+ // FIXME: this should respect TPR -+ env->interrupt_request &= ~CPU_INTERRUPT_VIRQ; -+ stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_ctl), ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_ctl)) & ~V_IRQ_MASK); -+ intno = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_vector)); -+ if (loglevel & CPU_LOG_TB_IN_ASM) -+ fprintf(logfile, "Servicing virtual hardware INT=0x%02x\n", intno); -+ do_interrupt(intno, 0, 0, -1, 1); -+#if defined(__sparc__) && !defined(HOST_SOLARIS) -+ tmp_T0 = 0; -+#else -+ T0 = 0; -+#endif -+#endif - } - #elif defined(TARGET_PPC) - #if 0 -Index: qemu-0.9.0.cvs/target-i386/exec.h -=================================================================== ---- qemu-0.9.0.cvs.orig/target-i386/exec.h -+++ qemu-0.9.0.cvs/target-i386/exec.h -@@ -502,6 +502,15 @@ void update_fp_status(void); - void helper_hlt(void); - void helper_monitor(void); - void helper_mwait(void); -+void helper_vmrun(target_ulong addr); -+void helper_vmmcall(void); -+void helper_vmload(target_ulong addr); -+void helper_vmsave(target_ulong addr); -+void helper_stgi(void); -+void helper_clgi(void); -+void helper_skinit(void); -+void helper_invlpga(void); -+void vmexit(uint64_t exit_code, uint64_t exit_info_1); - - extern const uint8_t parity_table[256]; - extern const uint8_t rclw_table[32]; -@@ -589,3 +598,4 @@ static inline int cpu_halted(CPUState *e - } - return EXCP_HALTED; - } -+ -Index: qemu-0.9.0.cvs/exec.c -=================================================================== ---- qemu-0.9.0.cvs.orig/exec.c -+++ qemu-0.9.0.cvs/exec.c -@@ -1295,6 +1295,11 @@ void cpu_abort(CPUState *env, const char - vfprintf(stderr, fmt, ap); - fprintf(stderr, "\n"); - #ifdef TARGET_I386 -+ if(env->intercept & INTERCEPT_SVM_MASK) { -+ // most probably the virtual machine should not -+ // be shut down but rather caught by the VMM -+ vmexit(SVM_EXIT_SHUTDOWN, 0); -+ } - cpu_dump_state(env, stderr, fprintf, X86_DUMP_FPU | X86_DUMP_CCOP); - #else - cpu_dump_state(env, stderr, fprintf, 0); -Index: qemu-0.9.0.cvs/exec-all.h -=================================================================== ---- qemu-0.9.0.cvs.orig/exec-all.h -+++ qemu-0.9.0.cvs/exec-all.h -@@ -166,6 +166,7 @@ static inline int tlb_set_page(CPUState - typedef struct TranslationBlock { - target_ulong pc; /* simulated PC corresponding to this block (EIP + CS base) */ - target_ulong cs_base; /* CS base for this block */ -+ uint64_t intercept; /* SVM intercept vector */ - unsigned int flags; /* flags defining in which context the code was generated */ - uint16_t size; /* size of target code for this block (1 <= - size <= TARGET_PAGE_SIZE) */ -Index: qemu-0.9.0.cvs/cpu-all.h -=================================================================== ---- qemu-0.9.0.cvs.orig/cpu-all.h -+++ qemu-0.9.0.cvs/cpu-all.h -@@ -715,6 +715,7 @@ extern int code_copy_enabled; - #define CPU_INTERRUPT_HALT 0x20 /* CPU halt wanted */ - #define CPU_INTERRUPT_SMI 0x40 /* (x86 only) SMI interrupt pending */ - #define CPU_INTERRUPT_DEBUG 0x80 /* Debug event occured. */ -+#define CPU_INTERRUPT_VIRQ 0x100 /* virtual interrupt pending. */ - - void cpu_interrupt(CPUState *s, int mask); - void cpu_reset_interrupt(CPUState *env, int mask); diff --git a/qemu-cvs-tls.patch b/qemu-cvs-tls.patch index d4e88710..c129f257 100644 --- a/qemu-cvs-tls.patch +++ b/qemu-cvs-tls.patch @@ -1,8 +1,8 @@ Index: qemu.bkp/linux-user/main.c -=================================================================== ---- qemu.bkp.orig/linux-user/main.c -+++ qemu.bkp/linux-user/main.c -@@ -156,7 +156,7 @@ static void set_gate(void *ptr, unsigned +================================================================================ +--- qemu/linux-user/main.c ++++ qemu/linux-user/main.c +@@ -156,7 +156,7 @@ p[1] = tswapl(e2); } @@ -11,31 +11,31 @@ Index: qemu.bkp/linux-user/main.c uint64_t idt_table[256]; /* only dpl matters as we do only user space emulation */ -Index: qemu.bkp/linux-user/syscall.c -=================================================================== ---- qemu.bkp.orig/linux-user/syscall.c -+++ qemu.bkp/linux-user/syscall.c -@@ -145,6 +145,7 @@ type name (type1 arg1,type2 arg2,type3 a - #define __NR_sys_rt_sigqueueinfo __NR_rt_sigqueueinfo - #define __NR_sys_syslog __NR_syslog - #define __NR_sys_tgkill __NR_tgkill +--- qemu/linux-user/syscall.c ++++ qemu/linux-user/syscall.c +@@ -159,6 +159,7 @@ + #define __NR_sys_tkill __NR_tkill + #define __NR_sys_unlinkat __NR_unlinkat + #define __NR_sys_utimensat __NR_utimensat +#define __NR_sys_clone __NR_clone #if defined(__alpha__) || defined (__ia64__) || defined(__x86_64__) #define __NR__llseek __NR_lseek -@@ -166,6 +167,7 @@ _syscall5(int, _llseek, uint, fd, ulon - _syscall3(int,sys_rt_sigqueueinfo,int,pid,int,sig,siginfo_t *,uinfo) - _syscall3(int,sys_syslog,int,type,char*,bufp,int,len) - _syscall3(int,sys_tgkill,int,tgid,int,pid,int,sig) +@@ -227,6 +228,9 @@ + #if defined(TARGET_NR_tkill) && defined(__NR_tkill) + _syscall2(int,sys_tkill,int,tid,int,sig) + #endif ++#ifdef __NR_sys_clone +_syscall5(int,sys_clone, int, flags, void *, child_stack, int *, parent_tidptr, void *, newtls, int *, child_tidptr) ++#endif #ifdef __NR_exit_group _syscall1(int,exit_group,int,error_code) #endif -@@ -2115,29 +2117,107 @@ int do_modify_ldt(CPUX86State *env, int +@@ -2249,6 +2253,80 @@ return ret; } -+int do_set_thread_area(CPUX86State *env, target_ulong ptr) ++int do_set_thread_area(CPUX86State *env, abi_ulong ptr) +{ + uint64_t *gdt_table = g2h(env->gdt.base); + struct target_modify_ldt_ldt_s ldt_info; @@ -45,7 +45,7 @@ Index: qemu.bkp/linux-user/syscall.c + uint32_t *lp, entry_1, entry_2; + int i; + -+ lock_user_struct(target_ldt_info, ptr, 1); ++ lock_user_struct(VERIFY_WRITE, target_ldt_info, ptr, 1); + ldt_info.entry_number = tswap32(target_ldt_info->entry_number); + ldt_info.base_addr = tswapl(target_ldt_info->base_addr); + ldt_info.limit = tswap32(target_ldt_info->limit); @@ -112,39 +112,29 @@ Index: qemu.bkp/linux-user/syscall.c #endif /* defined(TARGET_I386) */ /* this stack is the equivalent of the kernel stack associated with a - thread/process */ - #define NEW_STACK_SIZE 8192 +@@ -2265,15 +2343,20 @@ --static int clone_func(void *arg) -+static int clone_func(void *cloneenv) - { -- CPUState *env = arg; -- cpu_loop(env); -+ cpu_loop((CPUState *)cloneenv); - /* never exits */ - return 0; - } - --int do_fork(CPUState *env, unsigned int flags, unsigned long newsp) -+int do_fork(CPUState *env, unsigned int flags, target_ulong newsp, target_ulong parent_tidptr, target_ulong newtls, target_ulong child_tidptr) + /* do_fork() Must return host values and target errnos (unlike most + do_*() functions). */ +-int do_fork(CPUState *env, unsigned int flags, abi_ulong newsp) ++int do_fork(CPUState *env, unsigned int flags, abi_ulong newsp, abi_ulong parent_tidptr, abi_ulong newtls, abi_ulong child_tidptr) { int ret; -+ unsigned long parent_tid=gettid(); ++ unsigned long parent_tid = gettid(); TaskState *ts; uint8_t *new_stack; CPUState *new_env; -- +#if defined(TARGET_I386) + uint64_t *new_gdt_table; +#endif + if (flags & CLONE_VM) { ts = malloc(sizeof(TaskState) + NEW_STACK_SIZE); -+ if (!ts) -+ return -ENOMEM; ++ if (!ts) return -ENOMEM; memset(ts, 0, sizeof(TaskState)); new_stack = ts->stack; ts->used = 1; -@@ -2149,6 +2229,27 @@ int do_fork(CPUState *env, unsigned int +@@ -2285,6 +2368,27 @@ #if defined(TARGET_I386) if (!newsp) newsp = env->regs[R_ESP]; @@ -172,7 +162,7 @@ Index: qemu.bkp/linux-user/syscall.c new_env->regs[R_ESP] = newsp; new_env->regs[R_EAX] = 0; #elif defined(TARGET_ARM) -@@ -2202,15 +2303,27 @@ int do_fork(CPUState *env, unsigned int +@@ -2342,15 +2446,27 @@ #endif new_env->opaque = ts; #ifdef __ia64__ @@ -205,7 +195,7 @@ Index: qemu.bkp/linux-user/syscall.c } return ret; } -@@ -2458,7 +2571,7 @@ long do_syscall(void *cpu_env, int num, +@@ -2623,7 +2739,7 @@ _mcleanup(); #endif gdb_exit(cpu_env, arg1); @@ -214,7 +204,7 @@ Index: qemu.bkp/linux-user/syscall.c _exit(arg1); ret = 0; /* avoid warning */ break; -@@ -2487,7 +2600,7 @@ long do_syscall(void *cpu_env, int num, +@@ -2671,7 +2787,7 @@ ret = do_brk(arg1); break; case TARGET_NR_fork: @@ -223,7 +213,7 @@ Index: qemu.bkp/linux-user/syscall.c break; #ifdef TARGET_NR_waitpid case TARGET_NR_waitpid: -@@ -3651,7 +3764,7 @@ long do_syscall(void *cpu_env, int num, +@@ -4020,7 +4136,7 @@ ret = get_errno(fsync(arg1)); break; case TARGET_NR_clone: @@ -232,7 +222,7 @@ Index: qemu.bkp/linux-user/syscall.c break; #ifdef __NR_exit_group /* new thread calls */ -@@ -4039,7 +4152,7 @@ long do_syscall(void *cpu_env, int num, +@@ -4419,7 +4535,7 @@ #endif #ifdef TARGET_NR_vfork case TARGET_NR_vfork: @@ -241,7 +231,7 @@ Index: qemu.bkp/linux-user/syscall.c break; #endif #ifdef TARGET_NR_ugetrlimit -@@ -4561,12 +4674,12 @@ long do_syscall(void *cpu_env, int num, +@@ -4957,13 +5073,17 @@ #ifdef TARGET_NR_set_thread_area case TARGET_NR_set_thread_area: #ifdef TARGET_MIPS @@ -250,11 +240,16 @@ Index: qemu.bkp/linux-user/syscall.c - break; + ((CPUMIPSState *) cpu_env)->tls_value = arg1; + ret = 0; ++#else ++#ifdef TARGET_I386 ++ ret = get_errno(do_set_thread_area(cpu_env, arg1)); #else - goto unimplemented_nowarn; -+ ret = get_errno(do_set_thread_area(cpu_env, arg1)); ++ goto unimplemented_nowarn; + #endif #endif + break; - #endif ++#endif #ifdef TARGET_NR_get_thread_area case TARGET_NR_get_thread_area: + goto unimplemented_nowarn; diff --git a/qemu-cvs-usb-isoch.patch b/qemu-cvs-usb-isoch.patch deleted file mode 100644 index 005dc6ea..00000000 --- a/qemu-cvs-usb-isoch.patch +++ /dev/null @@ -1,660 +0,0 @@ -diff --git a/qemu/usb-linux.c b/qemu/usb-linux.c -old mode 100644 -new mode 100755 -index 50386ea..e790f00 ---- a/qemu/usb-linux.c -+++ b/qemu/usb-linux.c -@@ -28,6 +28,7 @@ - #include - #include - #include -+#include - - /* We redefine it to avoid version problems */ - struct usb_ctrltransfer { -@@ -48,15 +49,152 @@ static int usb_host_find_device(int *pbus_num, int *paddr, - const char *devname); - - //#define DEBUG -+//#define DEBUG_ISOCH -+//#define USE_ASYNCIO - - #define USBDEVFS_PATH "/dev/bus/usb" - #define PRODUCT_NAME_SZ 32 -+#define SIG_ISOCOMPLETE (SIGRTMIN+7) -+#define MAX_ENDPOINTS 16 -+ -+struct sigaction sigact; -+ -+// endpoint association data -+struct endp_data { -+ uint8_t type; -+}; - - typedef struct USBHostDevice { - USBDevice dev; - int fd; -+ struct usbdevfs_urb *urb; -+ USBPacket *packet; -+ QEMUBH *bh; -+ int status; -+ struct endp_data endp_table[MAX_ENDPOINTS]; -+ int configuration; -+ uint8_t descr[1024]; -+ int descr_len; - } USBHostDevice; - -+typedef struct PendingURB { -+ struct usbdevfs_urb *urb; -+ struct PendingURB *next; -+} PendingURB; -+ -+PendingURB *pending_urbs = NULL; -+ -+int add_pending_urb(struct usbdevfs_urb *urb) -+{ -+ PendingURB *purb = qemu_mallocz(sizeof(PendingURB)); -+ if (purb) { -+ purb->urb = urb; -+ purb->next = pending_urbs; -+ pending_urbs = purb; -+ return 1; -+ } -+ return 0; -+} -+ -+int del_pending_urb(struct usbdevfs_urb *urb) -+{ -+ PendingURB *purb = pending_urbs; -+ PendingURB *prev = NULL; -+ -+ while (purb && purb->urb != urb) { -+ prev = purb; -+ purb = purb->next; -+ } -+ -+ if (purb && purb->urb == urb) { -+ if (prev) { -+ prev->next = purb->next; -+ } else { -+ pending_urbs = purb->next; -+ } -+ qemu_free(purb); -+ return 1; -+ } -+ return 0; -+} -+ -+static int usb_host_update_interfaces(USBHostDevice *dev, int configuration) -+{ -+ int dev_descr_len, config_descr_len; -+ int interface, nb_interfaces, nb_configurations; -+ int ret, i; -+ -+ if (configuration == 0) // address state - ignore -+ return 1; -+ -+ i = 0; -+ dev_descr_len = dev->descr[0]; -+ if (dev_descr_len > dev->descr_len) -+ goto fail; -+ nb_configurations = dev->descr[17]; -+ -+ i += dev_descr_len; -+ while (i < dev->descr_len) { -+#ifdef DEBUG -+ printf("i is %d, descr_len is %d, dl %d, dt %d\n", i, dev->descr_len, -+ dev->descr[i], dev->descr[i+1]); -+#endif -+ if (dev->descr[i+1] != USB_DT_CONFIG) { -+ i += dev->descr[i]; -+ continue; -+ } -+ config_descr_len = dev->descr[i]; -+ -+ if (configuration == dev->descr[i + 5]) -+ break; -+ -+ i += config_descr_len; -+ } -+ -+ if (i >= dev->descr_len) { -+ printf("usb_host: error - device has no matching configuration\n"); -+ goto fail; -+ } -+ nb_interfaces = dev->descr[i + 4]; -+ -+#ifdef USBDEVFS_DISCONNECT -+ /* earlier Linux 2.4 do not support that */ -+ { -+ struct usbdevfs_ioctl ctrl; -+ for (interface = 0; interface < nb_interfaces; interface++) { -+ ctrl.ioctl_code = USBDEVFS_DISCONNECT; -+ ctrl.ifno = interface; -+ ret = ioctl(dev->fd, USBDEVFS_IOCTL, &ctrl); -+ if (ret < 0 && errno != ENODATA) { -+ perror("USBDEVFS_DISCONNECT"); -+ goto fail; -+ } -+ } -+ } -+#endif -+ -+ /* XXX: only grab if all interfaces are free */ -+ for (interface = 0; interface < nb_interfaces; interface++) { -+ ret = ioctl(dev->fd, USBDEVFS_CLAIMINTERFACE, &interface); -+ if (ret < 0) { -+ if (errno == EBUSY) { -+ fprintf(stderr, "usb_host: warning - device already grabbed\n"); -+ } else { -+ perror("USBDEVFS_CLAIMINTERFACE"); -+ } -+ fail: -+ return 0; -+ } -+ } -+ -+#ifdef DEBUG -+ printf("usb_host: %d interfaces claimed for configuration %d\n", nb_interfaces, -+ configuration); -+#endif -+ -+ return 1; -+} -+ - static void usb_host_handle_reset(USBDevice *dev) - { - #if 0 -@@ -76,6 +214,8 @@ static void usb_host_handle_destroy(USBDevice *dev) - qemu_free(s); - } - -+static int usb_linux_update_endp_table(USBHostDevice *s); -+ - static int usb_host_handle_control(USBDevice *dev, - int request, - int value, -@@ -85,13 +225,32 @@ static int usb_host_handle_control(USBDevice *dev, - { - USBHostDevice *s = (USBHostDevice *)dev; - struct usb_ctrltransfer ct; -+ struct usbdevfs_setinterface si; -+ int intf_update_required = 0; - int ret; - - if (request == (DeviceOutRequest | USB_REQ_SET_ADDRESS)) { - /* specific SET_ADDRESS support */ - dev->addr = value; - return 0; -+ } else if (request == ((USB_RECIP_INTERFACE << 8) | USB_REQ_SET_INTERFACE)) { -+ /* set alternate setting for the interface */ -+ si.interface = index; -+ si.altsetting = value; -+ ret = ioctl(s->fd, USBDEVFS_SETINTERFACE, &si); -+ usb_linux_update_endp_table(dev); -+ } else if (request == (DeviceOutRequest | USB_REQ_SET_CONFIGURATION)) { -+#ifdef DEBUG -+ printf("usb_host_handle_control: SET_CONFIGURATION request - config %d\n", -+ value & 0xff); -+#endif -+ if (s->configuration != (value & 0xff)) { -+ s->configuration = (value & 0xff); -+ intf_update_required = 1; -+ } -+ goto do_request; - } else { -+ do_request: - ct.bRequestType = request >> 8; - ct.bRequest = request; - ct.wValue = value; -@@ -100,19 +259,28 @@ static int usb_host_handle_control(USBDevice *dev, - ct.timeout = 50; - ct.data = data; - ret = ioctl(s->fd, USBDEVFS_CONTROL, &ct); -- if (ret < 0) { -- switch(errno) { -- case ETIMEDOUT: -- return USB_RET_NAK; -- default: -- return USB_RET_STALL; -- } -- } else { -- return ret; -+ } -+ -+ if (ret < 0) { -+ switch(errno) { -+ case ETIMEDOUT: -+ return USB_RET_NAK; -+ default: -+ return USB_RET_STALL; -+ } -+ } else { -+ if (intf_update_required) { -+#ifdef DEBUG -+ printf("usb_host_handle_control: updating interfaces\n"); -+#endif -+ usb_host_update_interfaces(s, value & 0xff); - } -- } -+ return ret; -+ } - } - -+static int usb_host_handle_isoch(USBDevice *dev, USBPacket *p); -+ - static int usb_host_handle_data(USBDevice *dev, USBPacket *p) - { - USBHostDevice *s = (USBHostDevice *)dev; -@@ -120,6 +288,10 @@ static int usb_host_handle_data(USBDevice *dev, USBPacket *p) - int ret; - uint8_t devep = p->devep; - -+ if (s->endp_table[p->devep - 1].type == USBDEVFS_URB_TYPE_ISO) { -+ return usb_host_handle_isoch(dev, p); -+ } -+ - /* XXX: optimize and handle all data types by looking at the - config descriptor */ - if (p->pid == USB_TOKEN_IN) -@@ -145,18 +317,268 @@ static int usb_host_handle_data(USBDevice *dev, USBPacket *p) - } - } - -+void isoch_done(int signum, siginfo_t *info, void *context) { -+ struct usbdevfs_urb *urb = (struct usbdevfs_urb *)info->si_addr; -+ USBHostDevice *s = (USBHostDevice *)urb->usercontext; -+ -+ if (info->si_code != SI_ASYNCIO || -+ info->si_signo != SIG_ISOCOMPLETE) { -+ return; -+ } -+ -+ s->status = info->si_errno; -+ qemu_bh_schedule(s->bh); -+} -+ -+static int usb_host_handle_isoch(USBDevice *dev, USBPacket *p) -+{ -+ USBHostDevice *s = (USBHostDevice *)dev; -+ struct usbdevfs_urb *urb, *purb = NULL; -+ int ret; -+ uint8_t devep = p->devep; -+ -+ if (p->pid == USB_TOKEN_IN) -+ devep |= 0x80; -+ -+ urb = qemu_mallocz(sizeof(struct usbdevfs_urb) + -+ sizeof(struct usbdevfs_iso_packet_desc)); -+ if (!urb) { -+ printf("usb_host_handle_isoch: malloc failed\n"); -+ return 0; -+ } -+ -+ urb->type = USBDEVFS_URB_TYPE_ISO; -+ urb->endpoint = devep; -+ urb->status = 0; -+ urb->flags = USBDEVFS_URB_ISO_ASAP; -+ urb->buffer = p->data; -+ urb->buffer_length = p->len; -+ urb->actual_length = 0; -+ urb->start_frame = 0; -+ urb->error_count = 0; -+#ifdef USE_ASYNCIO -+ urb->signr = SIG_ISOCOMPLETE; -+#else -+ urb->signr = 0; -+#endif -+ urb->usercontext = s; -+ urb->number_of_packets = 1; -+ urb->iso_frame_desc[0].length = p->len; -+ urb->iso_frame_desc[0].actual_length = 0; -+ urb->iso_frame_desc[0].status = 0; -+ ret = ioctl(s->fd, USBDEVFS_SUBMITURB, urb); -+ if (ret == 0) { -+ if (!add_pending_urb(urb)) { -+ printf("usb_host_handle_isoch: add_pending_urb failed %p\n", urb); -+ } -+ } else { -+ printf("usb_host_handle_isoch: SUBMITURB ioctl=%d errno=%d\n", ret, errno); -+ qemu_free(urb); -+ switch(errno) { -+ case ETIMEDOUT: -+ return USB_RET_NAK; -+ case EPIPE: -+ default: -+ return USB_RET_STALL; -+ } -+ } -+#ifdef USE_ASYNCIO -+ s->urb = urb; -+ s->packet = p; -+ return USB_RET_ASYNC; -+#else -+ ret = ioctl(s->fd, USBDEVFS_REAPURBNDELAY, &purb); -+ if (ret == 0) { -+ if (del_pending_urb(purb)) { -+ ret = purb->actual_length; -+ qemu_free(purb); -+ } else { -+ printf("usb_host_handle_isoch: del_pending_urb failed %p\n", purb); -+ } -+ } else { -+#ifdef DEBUG_ISOCH -+ printf("usb_host_handle_isoch: REAPURBNDELAY ioctl=%d errno=%d\n", ret, errno); -+#endif -+ } -+ return ret; -+#endif -+} -+ -+static void usb_linux_bh_cb(void *opaque) -+{ -+ USBHostDevice *s = (USBHostDevice *)opaque; -+ struct usbdevfs_urb *purb = NULL; -+ USBPacket *p = s->packet; -+ int ret; -+ -+ if (!s || !p) -+ return; -+ -+#ifdef DEBUG_ISOCH -+ printf("completion: devaddr %d - devep 0x%02x\n", p->devaddr, p->devep); -+#endif -+ -+ ret = ioctl(s->fd, USBDEVFS_REAPURBNDELAY, &purb); -+ if (ret < 0) { -+ perror("USBDEVFS_REAPURBNDELAY"); -+ return; -+ } -+ -+ /* FIXME: handle s->status */ -+ if (del_pending_urb(purb)) { -+ p->len = purb->actual_length; -+ qemu_free(purb); -+ s->packet = NULL; -+ usb_packet_complete(p); -+ } else { -+ printf("usb_linux_bh_cb: purb NOT found %p\n", purb); -+ qemu_free(purb); -+ s->packet = NULL; -+ } -+} -+ -+// returns 1 on problem encountered or 0 for success -+static int usb_linux_update_endp_table(USBHostDevice *s) -+{ -+ uint8_t descriptors[1024]; -+ uint8_t data, devep, type; -+ struct usb_ctrltransfer ct; -+ int configuration, interface, alt_interface; -+ int ret, length, i; -+ -+ ct.bRequestType = USB_DIR_IN; -+ ct.bRequest = USB_REQ_GET_CONFIGURATION; -+ ct.wValue = 0; -+ ct.wIndex = 0; -+ ct.wLength = 1; -+ ct.data = &data; -+ ct.timeout = 50; -+ -+ ret = ioctl(s->fd, USBDEVFS_CONTROL, &ct); -+ if (ret < 0) { -+ perror("usb_linux_update_endp_table"); -+ return 1; -+ } -+ configuration = data; -+ -+ // in address state -+ if (configuration == 0) -+ return 1; -+ -+ /* get the desired configuration, interface, and endpoint -+ * descriptors in one shot - could also re-read all data from -+ * open file descriptor, go through sysfs entries, etc. -+ */ -+ ct.bRequestType = USB_DIR_IN; -+ ct.bRequest = USB_REQ_GET_DESCRIPTOR; -+ ct.wValue = (USB_DT_CONFIG << 8) | (configuration - 1); -+ ct.wIndex = 0; -+ ct.wLength = 1024; -+ ct.data = descriptors; -+ ct.timeout = 50; -+ -+ ret = ioctl(s->fd, USBDEVFS_CONTROL, &ct); -+ if (ret < 0) { -+ perror("usb_linux_update_endp_table"); -+ return 1; -+ } -+ -+ length = ret; -+ i = 0; -+ -+ if (descriptors[i + 1] != USB_DT_CONFIG || -+ descriptors[i + 5] != configuration) { -+ printf("invalid descriptor data - configuration\n"); -+ return 1; -+ } -+ i += descriptors[i]; -+ -+ while (i < length) { -+ if (descriptors[i + 1] != USB_DT_INTERFACE || -+ (descriptors[i + 1] == USB_DT_INTERFACE && -+ descriptors[i + 4] == 0)) { -+ i += descriptors[i]; -+ continue; -+ } -+ -+ interface = descriptors[i + 2]; -+ -+ ct.bRequestType = USB_DIR_IN | USB_RECIP_INTERFACE; -+ ct.bRequest = USB_REQ_GET_INTERFACE; -+ ct.wValue = 0; -+ ct.wIndex = interface; -+ ct.wLength = 1; -+ ct.data = &data; -+ ct.timeout = 50; -+ -+ ret = ioctl(s->fd, USBDEVFS_CONTROL, &ct); -+ if (ret < 0) { -+ perror("usb_linux_update_endp_table"); -+ return 1; -+ } -+ alt_interface = data; -+ -+ // the current interface descriptor is the active interface -+ // and has endpoints -+ if (descriptors[i + 3] != alt_interface) { -+ i += descriptors[i]; -+ continue; -+ } -+ -+ // advance to the endpoints -+ while (i < length && descriptors[i +1] != USB_DT_ENDPOINT) -+ i += descriptors[i]; -+ -+ if (i >= length) -+ break; -+ -+ while (i < length) { -+ if (descriptors[i + 1] != USB_DT_ENDPOINT) -+ break; -+ -+ devep = descriptors[i + 2]; -+ switch (descriptors[i + 3] & 0x3) { -+ case 0x00: -+ type = USBDEVFS_URB_TYPE_CONTROL; -+ break; -+ case 0x01: -+ type = USBDEVFS_URB_TYPE_ISO; -+ break; -+ case 0x02: -+ type = USBDEVFS_URB_TYPE_BULK; -+ break; -+ case 0x03: -+ type = USBDEVFS_URB_TYPE_INTERRUPT; -+ break; -+ default: -+ printf("usb_host: malformed endpoint type\n"); -+ type = USBDEVFS_URB_TYPE_BULK; -+ } -+ s->endp_table[(devep & 0xf) - 1].type = type; -+ -+ i += descriptors[i]; -+ } -+ } -+ return 0; -+} -+ - /* XXX: exclude high speed devices or implement EHCI */ - USBDevice *usb_host_device_open(const char *devname) - { -- int fd, interface, ret, i; -- USBHostDevice *dev; -+ int fd = -1, ret; -+ USBHostDevice *dev = NULL; - struct usbdevfs_connectinfo ci; -- uint8_t descr[1024]; - char buf[1024]; -- int descr_len, dev_descr_len, config_descr_len, nb_interfaces; - int bus_num, addr; - char product_name[PRODUCT_NAME_SZ]; - -+ dev = qemu_mallocz(sizeof(USBHostDevice)); -+ if (!dev) -+ goto fail; -+ -+#ifdef DEBUG_ISOCH -+ printf("usb_host_device_open %s\n", devname); -+#endif - if (usb_host_find_device(&bus_num, &addr, - product_name, sizeof(product_name), - devname) < 0) -@@ -164,61 +586,35 @@ USBDevice *usb_host_device_open(const char *devname) - - snprintf(buf, sizeof(buf), USBDEVFS_PATH "/%03d/%03d", - bus_num, addr); -- fd = open(buf, O_RDWR); -+ fd = open(buf, O_RDWR | O_NONBLOCK); - if (fd < 0) { - perror(buf); - return NULL; - } - -- /* read the config description */ -- descr_len = read(fd, descr, sizeof(descr)); -- if (descr_len <= 0) { -- perror("read descr"); -- goto fail; -- } -- -- i = 0; -- dev_descr_len = descr[0]; -- if (dev_descr_len > descr_len) -- goto fail; -- i += dev_descr_len; -- config_descr_len = descr[i]; -- if (i + config_descr_len > descr_len) -- goto fail; -- nb_interfaces = descr[i + 4]; -- if (nb_interfaces != 1) { -- /* NOTE: currently we grab only one interface */ -- fprintf(stderr, "usb_host: only one interface supported\n"); -+ /* read the device description */ -+ dev->descr_len = read(fd, dev->descr, sizeof(dev->descr)); -+ if (dev->descr_len <= 0) { -+ perror("usb_host_update_interfaces: reading device data failed"); - goto fail; - } - --#ifdef USBDEVFS_DISCONNECT -- /* earlier Linux 2.4 do not support that */ -+#ifdef DEBUG - { -- struct usbdevfs_ioctl ctrl; -- ctrl.ioctl_code = USBDEVFS_DISCONNECT; -- ctrl.ifno = 0; -- ret = ioctl(fd, USBDEVFS_IOCTL, &ctrl); -- if (ret < 0 && errno != ENODATA) { -- perror("USBDEVFS_DISCONNECT"); -- goto fail; -- } -+ int x; -+ printf("=== begin dumping device descriptor data ===\n"); -+ for (x = 0; x < dev->descr_len; x++) -+ printf("%02x ", dev->descr[x]); -+ printf("\n=== end dumping device descriptor data ===\n"); - } - #endif - -- /* XXX: only grab if all interfaces are free */ -- interface = 0; -- ret = ioctl(fd, USBDEVFS_CLAIMINTERFACE, &interface); -- if (ret < 0) { -- if (errno == EBUSY) { -- fprintf(stderr, "usb_host: device already grabbed\n"); -- } else { -- perror("USBDEVFS_CLAIMINTERFACE"); -- } -- fail: -- close(fd); -- return NULL; -- } -+ dev->fd = fd; -+ dev->configuration = 1; -+ -+ // XXX - do something about initial configuration -+ if (!usb_host_update_interfaces(dev, 1)) -+ goto fail; - - ret = ioctl(fd, USBDEVFS_CONNECTINFO, &ci); - if (ret < 0) { -@@ -230,10 +626,20 @@ USBDevice *usb_host_device_open(const char *devname) - printf("host USB device %d.%d grabbed\n", bus_num, addr); - #endif - -- dev = qemu_mallocz(sizeof(USBHostDevice)); -- if (!dev) -+ ret = usb_linux_update_endp_table(dev); -+ if (ret) { -+ qemu_free(dev); - goto fail; -- dev->fd = fd; -+ } -+ -+#ifdef USE_ASYNCIO -+ dev->bh = qemu_bh_new(usb_linux_bh_cb, dev); -+ if (!dev->bh) { -+ qemu_free(dev); -+ goto fail; -+ } -+#endif -+ - if (ci.slow) - dev->dev.speed = USB_SPEED_LOW; - else -@@ -252,7 +658,24 @@ USBDevice *usb_host_device_open(const char *devname) - pstrcpy(dev->dev.devname, sizeof(dev->dev.devname), - product_name); - -+#ifdef USE_ASYNCIO -+ /* set up the signal handlers */ -+ sigemptyset(&sigact.sa_mask); -+ sigact.sa_sigaction = isoch_done; -+ sigact.sa_flags = SA_SIGINFO; -+ sigact.sa_restorer = 0; -+ ret = sigaction(SIG_ISOCOMPLETE, &sigact, NULL); -+ if (ret < 0) { -+ printf("sigaction SIG_ISOCOMPLETE=%d errno=%d\n", ret, errno); -+ } -+#endif -+ - return (USBDevice *)dev; -+fail: -+ if (dev) -+ qemu_free(dev); -+ close(fd); -+ return NULL; - } - - static int get_tag_value(char *buf, int buf_size, diff --git a/qemu-m68k.diff b/qemu-m68k.diff index 0304d95d..36aa4bab 100644 --- a/qemu-m68k.diff +++ b/qemu-m68k.diff @@ -1,11 +1,8 @@ Index: gdbstub.c -=================================================================== -RCS file: /sources/qemu/qemu/gdbstub.c,v -retrieving revision 1.59 -diff -u -a -p -r1.59 gdbstub.c ---- gdbstub.c 7 Jul 2007 20:53:22 -0000 1.59 -+++ gdbstub.c 10 Jul 2007 12:36:35 -0000 -@@ -510,7 +510,9 @@ static int cpu_gdb_read_registers(CPUSta +================================================================================ +--- gdbstub.c ++++ gdbstub.c +@@ -558,7 +558,9 @@ for (i = 0; i < 8; i++) { u.d = env->fregs[i]; *(uint32_t *)ptr = tswap32(u.l.upper); @@ -15,36 +12,29 @@ diff -u -a -p -r1.59 gdbstub.c } /* FP control regs (not implemented). */ memset (ptr, 0, 3 * 4); -@@ -544,7 +546,9 @@ static void cpu_gdb_write_registers(CPUS +@@ -592,7 +594,9 @@ ColdFire has 8-bit double precision registers. */ for (i = 0; i < 8; i++) { - u.l.upper = tswap32(*(uint32_t *)ptr); -+ ptr += 4; + u.l.upper = tswap32(*(uint32_t *)ptr); ++ ptr += 4; u.l.lower = tswap32(*(uint32_t *)ptr); -+ ptr += 8; ++ ptr += 8; env->fregs[i] = u.d; } /* FP control regs (not implemented). */ -Index: target-m68k/cpu.h -=================================================================== -RCS file: /sources/qemu/qemu/target-m68k/cpu.h,v -retrieving revision 1.11 -diff -u -a -p -r1.11 cpu.h ---- target-m68k/cpu.h 3 Jun 2007 21:02:38 -0000 1.11 -+++ target-m68k/cpu.h 10 Jul 2007 12:36:35 -0000 -@@ -86,7 +86,10 @@ typedef struct CPUM68KState { - /* Temporary storage for DIV helpers. */ +--- target-m68k/cpu.h ++++ target-m68k/cpu.h +@@ -89,6 +89,9 @@ uint32_t div1; uint32_t div2; -- -+ + + /* Upper 32 bits of a 64bit operand for quad MUL/DIV. */ + uint32_t quadh; + /* MMU status. */ struct { uint32_t ar; -@@ -133,14 +136,26 @@ enum { +@@ -135,14 +138,26 @@ CC_OP_DYNAMIC, /* Use env->cc_op */ CC_OP_FLAGS, /* CC_DEST = CVZN, CC_SRC = unused */ CC_OP_LOGIC, /* CC_DEST = result, CC_SRC = unused */ @@ -73,7 +63,7 @@ diff -u -a -p -r1.11 cpu.h CC_OP_SAR, /* CC_DEST = source, CC_SRC = shift */ }; -@@ -189,6 +204,12 @@ void do_m68k_semihosting(CPUM68KState *e +@@ -191,6 +206,12 @@ ISA revisions mentioned. */ enum m68k_features { @@ -86,7 +76,7 @@ diff -u -a -p -r1.11 cpu.h M68K_FEATURE_CF_ISA_A, M68K_FEATURE_CF_ISA_B, /* (ISA B or C). */ M68K_FEATURE_CF_ISA_APLUSC, /* BIT/BITREV, FF1, STRLDSR (ISA A+ or C). */ -@@ -199,7 +220,9 @@ enum m68k_features { +@@ -201,7 +222,9 @@ M68K_FEATURE_CF_EMAC_B, /* Revision B EMAC (dual accumulate). */ M68K_FEATURE_USP, /* User Stack Pointer. (ISA A+, B or C). */ M68K_FEATURE_EXT_FULL, /* 68020+ full extension word. */ @@ -97,7 +87,7 @@ diff -u -a -p -r1.11 cpu.h }; static inline int m68k_feature(CPUM68KState *env, int feature) -@@ -210,8 +233,8 @@ static inline int m68k_feature(CPUM68KSt +@@ -212,8 +235,8 @@ void register_m68k_insns (CPUM68KState *env); #ifdef CONFIG_USER_ONLY @@ -106,16 +96,11 @@ diff -u -a -p -r1.11 cpu.h +/* Linux uses 4k pages. */ +#define TARGET_PAGE_BITS 12 #else - /* Smallest TLB entry size is 1k. */ + /* Smallest TLB entry size is 1k. */ #define TARGET_PAGE_BITS 10 -Index: target-m68k/exec.h -=================================================================== -RCS file: /sources/qemu/qemu/target-m68k/exec.h,v -retrieving revision 1.3 -diff -u -a -p -r1.3 exec.h ---- target-m68k/exec.h 3 Jun 2007 17:44:36 -0000 1.3 -+++ target-m68k/exec.h 10 Jul 2007 12:36:35 -0000 -@@ -48,6 +48,10 @@ void cpu_m68k_flush_flags(CPUM68KState * +--- target-m68k/exec.h ++++ target-m68k/exec.h +@@ -48,6 +48,10 @@ float64 helper_sub_cmpf64(CPUM68KState *env, float64 src0, float64 src1); void helper_movec(CPUM68KState *env, int reg, uint32_t val); @@ -126,13 +111,8 @@ diff -u -a -p -r1.3 exec.h void cpu_loop_exit(void); static inline int cpu_halted(CPUState *env) { -Index: target-m68k/helper.c -=================================================================== -RCS file: /sources/qemu/qemu/target-m68k/helper.c,v -retrieving revision 1.6 -diff -u -a -p -r1.6 helper.c ---- target-m68k/helper.c 3 Jun 2007 12:35:08 -0000 1.6 -+++ target-m68k/helper.c 10 Jul 2007 12:36:35 -0000 +--- target-m68k/helper.c ++++ target-m68k/helper.c @@ -27,6 +27,10 @@ #include "exec-all.h" @@ -144,7 +124,7 @@ diff -u -a -p -r1.6 helper.c M68K_CPUID_M5206, M68K_CPUID_M5208, M68K_CPUID_CFV4E, -@@ -39,6 +43,10 @@ struct m68k_def_t { +@@ -39,6 +43,10 @@ }; static m68k_def_t m68k_cpu_defs[] = { @@ -152,10 +132,10 @@ diff -u -a -p -r1.6 helper.c + {"m68020", M68K_CPUID_M68020}, + {"m68040", M68K_CPUID_M68040}, + {"m68060", M68K_CPUID_M68060}, - {"m5206", M68K_CPUID_M5206}, - {"m5208", M68K_CPUID_M5208}, + {"m5206", M68K_CPUID_M5206}, + {"m5208", M68K_CPUID_M5208}, {"cfv4e", M68K_CPUID_CFV4E}, -@@ -63,12 +71,41 @@ int cpu_m68k_set_model(CPUM68KState *env +@@ -63,12 +71,41 @@ return 1; switch (def->id) { @@ -197,7 +177,7 @@ diff -u -a -p -r1.6 helper.c m68k_set_feature(env, M68K_FEATURE_BRAL); m68k_set_feature(env, M68K_FEATURE_CF_EMAC); m68k_set_feature(env, M68K_FEATURE_USP); -@@ -76,12 +113,19 @@ int cpu_m68k_set_model(CPUM68KState *env +@@ -76,12 +113,19 @@ case M68K_CPUID_CFV4E: m68k_set_feature(env, M68K_FEATURE_CF_ISA_A); m68k_set_feature(env, M68K_FEATURE_CF_ISA_B); @@ -217,7 +197,7 @@ diff -u -a -p -r1.6 helper.c m68k_set_feature(env, M68K_FEATURE_CF_ISA_A); m68k_set_feature(env, M68K_FEATURE_CF_ISA_B); m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC); -@@ -93,6 +137,7 @@ int cpu_m68k_set_model(CPUM68KState *env +@@ -93,6 +137,7 @@ m68k_set_feature(env, M68K_FEATURE_CF_EMAC_B); m68k_set_feature(env, M68K_FEATURE_USP); m68k_set_feature(env, M68K_FEATURE_EXT_FULL); @@ -225,7 +205,7 @@ diff -u -a -p -r1.6 helper.c m68k_set_feature(env, M68K_FEATURE_WORD_INDEX); break; } -@@ -102,6 +147,42 @@ int cpu_m68k_set_model(CPUM68KState *env +@@ -102,6 +147,42 @@ return 0; } @@ -268,7 +248,7 @@ diff -u -a -p -r1.6 helper.c void cpu_m68k_flush_flags(CPUM68KState *env, int cc_op) { int flags; -@@ -127,6 +208,66 @@ void cpu_m68k_flush_flags(CPUM68KState * +@@ -127,6 +208,66 @@ flags |= CCF_V; \ } while (0) @@ -335,7 +315,7 @@ diff -u -a -p -r1.6 helper.c flags = 0; src = env->cc_src; dest = env->cc_dest; -@@ -137,68 +278,68 @@ void cpu_m68k_flush_flags(CPUM68KState * +@@ -137,68 +278,68 @@ case CC_OP_LOGIC: SET_NZ(dest); break; @@ -450,14 +430,9 @@ diff -u -a -p -r1.6 helper.c break; default: cpu_abort(env, "Bad CC_OP %d", cc_op); -Index: target-m68k/op-hacks.h -=================================================================== -RCS file: /sources/qemu/qemu/target-m68k/op-hacks.h,v -retrieving revision 1.3 -diff -u -a -p -r1.3 op-hacks.h ---- target-m68k/op-hacks.h 9 Jun 2007 20:50:00 -0000 1.3 -+++ target-m68k/op-hacks.h 10 Jul 2007 12:36:35 -0000 -@@ -89,6 +89,36 @@ static inline void gen_op_sar_im_cc(int +--- target-m68k/op-hacks.h ++++ target-m68k/op-hacks.h +@@ -89,6 +89,36 @@ gen_op_sar_cc(val, gen_im32(shift)); } @@ -494,14 +469,9 @@ diff -u -a -p -r1.3 op-hacks.h #ifdef USE_DIRECT_JUMP #define TBPARAM(x) #else -Index: target-m68k/op.c -=================================================================== -RCS file: /sources/qemu/qemu/target-m68k/op.c,v -retrieving revision 1.11 -diff -u -a -p -r1.11 op.c ---- target-m68k/op.c 9 Jun 2007 20:50:01 -0000 1.11 -+++ target-m68k/op.c 10 Jul 2007 12:36:35 -0000 -@@ -136,6 +136,76 @@ OP(mul32) +--- target-m68k/op.c ++++ target-m68k/op.c +@@ -136,6 +136,76 @@ FORCE_RET(); } @@ -578,7 +548,7 @@ diff -u -a -p -r1.11 op.c OP(not32) { uint32_t arg = get_op(PARAM2); -@@ -180,6 +250,22 @@ OP(ff1) +@@ -180,6 +250,22 @@ FORCE_RET(); } @@ -601,7 +571,7 @@ diff -u -a -p -r1.11 op.c OP(subx_cc) { uint32_t op1 = get_op(PARAM1); -@@ -253,14 +339,60 @@ OP(shl32) +@@ -253,14 +339,60 @@ FORCE_RET(); } @@ -664,7 +634,7 @@ diff -u -a -p -r1.11 op.c FORCE_RET(); } -@@ -279,9 +411,55 @@ OP(shr_cc) +@@ -279,9 +411,55 @@ uint32_t op1 = get_op(PARAM1); uint32_t op2 = get_op(PARAM2); uint32_t result; @@ -722,7 +692,7 @@ diff -u -a -p -r1.11 op.c FORCE_RET(); } -@@ -300,12 +478,199 @@ OP(sar_cc) +@@ -300,12 +478,199 @@ int32_t op1 = get_op(PARAM1); uint32_t op2 = get_op(PARAM2); uint32_t result; @@ -924,7 +894,7 @@ diff -u -a -p -r1.11 op.c /* Value extend. */ OP(ext8u32) -@@ -361,14 +726,17 @@ OP(divu) +@@ -361,14 +726,17 @@ /* Avoid using a PARAM1 of zero. This breaks dyngen because it uses the address of a symbol, and gcc knows symbols can't have address zero. */ @@ -945,16 +915,16 @@ diff -u -a -p -r1.11 op.c env->cc_dest = flags; FORCE_RET(); } -@@ -379,7 +747,7 @@ OP(divs) +@@ -379,7 +747,7 @@ int32_t den; int32_t quot; int32_t rem; - int32_t flags; + uint32_t flags; - + num = env->div1; den = env->div2; -@@ -388,14 +756,78 @@ OP(divs) +@@ -388,14 +756,78 @@ quot = num / den; rem = num % den; flags = 0; @@ -1036,14 +1006,9 @@ diff -u -a -p -r1.11 op.c env->cc_dest = flags; FORCE_RET(); } -Index: target-m68k/qregs.def -=================================================================== -RCS file: /sources/qemu/qemu/target-m68k/qregs.def,v -retrieving revision 1.3 -diff -u -a -p -r1.3 qregs.def ---- target-m68k/qregs.def 29 May 2007 14:57:59 -0000 1.3 -+++ target-m68k/qregs.def 10 Jul 2007 12:36:35 -0000 -@@ -32,6 +32,7 @@ DEFO32(CC_SRC, cc_src) +--- target-m68k/qregs.def ++++ target-m68k/qregs.def +@@ -32,6 +32,7 @@ DEFO32(CC_X, cc_x) DEFO32(DIV1, div1) DEFO32(DIV2, div2) @@ -1051,14 +1016,9 @@ diff -u -a -p -r1.3 qregs.def DEFO32(EXCEPTION, exception_index) DEFO32(MACSR, macsr) DEFO32(MAC_MASK, mac_mask) -Index: target-m68k/translate.c -=================================================================== -RCS file: /sources/qemu/qemu/target-m68k/translate.c,v -retrieving revision 1.17 -diff -u -a -p -r1.17 translate.c ---- target-m68k/translate.c 9 Jun 2007 21:30:14 -0000 1.17 -+++ target-m68k/translate.c 10 Jul 2007 12:36:35 -0000 -@@ -250,6 +250,9 @@ static int gen_lea_indexed(DisasContext +--- target-m68k/translate.c ++++ target-m68k/translate.c +@@ -250,6 +250,9 @@ if ((ext & 0x800) == 0 && !m68k_feature(s->env, M68K_FEATURE_WORD_INDEX)) return -1; @@ -1068,7 +1028,7 @@ diff -u -a -p -r1.17 translate.c if (ext & 0x100) { /* full extension word format */ if (!m68k_feature(s->env, M68K_FEATURE_EXT_FULL)) -@@ -258,7 +261,7 @@ static int gen_lea_indexed(DisasContext +@@ -258,7 +261,7 @@ if ((ext & 0x30) > 0x10) { /* base displacement */ if ((ext & 0x30) == 0x20) { @@ -1077,7 +1037,7 @@ diff -u -a -p -r1.17 translate.c s->pc += 2; } else { bd = read_im32(s); -@@ -307,7 +310,7 @@ static int gen_lea_indexed(DisasContext +@@ -307,7 +310,7 @@ if ((ext & 3) > 1) { /* outer displacement */ if ((ext & 3) == 2) { @@ -1086,7 +1046,7 @@ diff -u -a -p -r1.17 translate.c s->pc += 2; } else { od = read_im32(s); -@@ -366,6 +369,25 @@ static inline int opsize_bytes(int opsiz +@@ -366,6 +369,25 @@ } } @@ -1112,7 +1072,7 @@ diff -u -a -p -r1.17 translate.c /* Assign value to a register. If the width is less than the register width only the low part of the register is set. */ static void gen_partset_reg(int opsize, int reg, int val) -@@ -881,8 +903,27 @@ DISAS_INSN(divl) +@@ -881,8 +903,27 @@ ext = lduw_code(s->pc); s->pc += 2; @@ -1142,7 +1102,7 @@ diff -u -a -p -r1.17 translate.c return; } num = DREG(ext, 12); -@@ -895,13 +936,10 @@ DISAS_INSN(divl) +@@ -895,13 +936,10 @@ } else { gen_op_divu(2); } @@ -1160,7 +1120,7 @@ diff -u -a -p -r1.17 translate.c gen_op_flags_set(); s->cc_op = CC_OP_FLAGS; } -@@ -914,31 +952,33 @@ DISAS_INSN(addsub) +@@ -914,31 +952,33 @@ int tmp; int addr; int add; @@ -1200,7 +1160,7 @@ diff -u -a -p -r1.17 translate.c } } -@@ -1065,6 +1105,8 @@ DISAS_INSN(movem) +@@ -1065,6 +1105,8 @@ int reg; int tmp; int is_load; @@ -1209,7 +1169,7 @@ diff -u -a -p -r1.17 translate.c mask = lduw_code(s->pc); s->pc += 2; -@@ -1076,21 +1118,40 @@ DISAS_INSN(movem) +@@ -1076,21 +1118,40 @@ addr = gen_new_qreg(QMODE_I32); gen_op_mov32(addr, tmp); is_load = ((insn & 0x0400) != 0); @@ -1265,7 +1225,7 @@ diff -u -a -p -r1.17 translate.c } } -@@ -1158,10 +1219,26 @@ DISAS_INSN(arith_im) +@@ -1158,10 +1219,26 @@ int dest; int src2; int addr; @@ -1294,7 +1254,7 @@ diff -u -a -p -r1.17 translate.c dest = gen_new_qreg(QMODE_I32); switch (op) { case 0: /* ori */ -@@ -1177,14 +1254,14 @@ DISAS_INSN(arith_im) +@@ -1177,14 +1254,14 @@ gen_op_update_xflag_lt(dest, src2); gen_op_sub32(dest, dest, src2); gen_op_update_cc_add(dest, src2); @@ -1311,7 +1271,7 @@ diff -u -a -p -r1.17 translate.c break; case 5: /* eori */ gen_op_xor32(dest, src1, src2); -@@ -1194,13 +1271,13 @@ DISAS_INSN(arith_im) +@@ -1194,13 +1271,13 @@ gen_op_mov32(dest, src1); gen_op_sub32(dest, dest, src2); gen_op_update_cc_add(dest, src2); @@ -1327,7 +1287,7 @@ diff -u -a -p -r1.17 translate.c } } -@@ -1290,19 +1367,7 @@ DISAS_INSN(clr) +@@ -1290,19 +1367,7 @@ { int opsize; @@ -1348,7 +1308,7 @@ diff -u -a -p -r1.17 translate.c DEST_EA(insn, opsize, gen_im32(0), NULL); gen_logic_cc(s, gen_im32(0)); } -@@ -1331,17 +1396,20 @@ DISAS_INSN(move_from_ccr) +@@ -1331,17 +1396,20 @@ DISAS_INSN(neg) { @@ -1378,7 +1338,7 @@ diff -u -a -p -r1.17 translate.c } static void gen_set_sr_im(DisasContext *s, uint16_t val, int ccr_only) -@@ -1390,11 +1458,17 @@ DISAS_INSN(move_to_ccr) +@@ -1390,11 +1458,17 @@ DISAS_INSN(not) { @@ -1400,7 +1360,7 @@ diff -u -a -p -r1.17 translate.c } DISAS_INSN(swap) -@@ -1452,19 +1526,7 @@ DISAS_INSN(tst) +@@ -1452,19 +1526,7 @@ int opsize; int tmp; @@ -1421,7 +1381,7 @@ diff -u -a -p -r1.17 translate.c SRC_EA(tmp, opsize, -1, NULL); gen_logic_cc(s, tmp); } -@@ -1493,28 +1555,149 @@ DISAS_INSN(tas) +@@ -1493,28 +1555,149 @@ DEST_EA(insn, OS_BYTE, dest, &addr); } @@ -1577,7 +1537,7 @@ diff -u -a -p -r1.17 translate.c } DISAS_INSN(link) -@@ -1534,6 +1717,22 @@ DISAS_INSN(link) +@@ -1534,6 +1717,22 @@ gen_op_add32(QREG_SP, tmp, gen_im32(offset)); } @@ -1600,7 +1560,7 @@ diff -u -a -p -r1.17 translate.c DISAS_INSN(unlk) { int src; -@@ -1586,8 +1785,14 @@ DISAS_INSN(addsubq) +@@ -1586,8 +1785,14 @@ int dest; int val; int addr; @@ -1616,7 +1576,7 @@ diff -u -a -p -r1.17 translate.c val = (insn >> 9) & 7; if (val == 0) val = 8; -@@ -1606,15 +1811,15 @@ DISAS_INSN(addsubq) +@@ -1606,15 +1811,15 @@ if (insn & 0x0100) { gen_op_update_xflag_lt(dest, src2); gen_op_sub32(dest, dest, src2); @@ -1635,7 +1595,7 @@ diff -u -a -p -r1.17 translate.c } DISAS_INSN(tpf) -@@ -1633,6 +1838,47 @@ DISAS_INSN(tpf) +@@ -1633,6 +1838,47 @@ } } @@ -1683,7 +1643,7 @@ diff -u -a -p -r1.17 translate.c DISAS_INSN(branch) { int32_t offset; -@@ -1698,17 +1944,19 @@ DISAS_INSN(or) +@@ -1698,17 +1944,19 @@ int dest; int src; int addr; @@ -1707,7 +1667,7 @@ diff -u -a -p -r1.17 translate.c } gen_logic_cc(s, dest); } -@@ -1718,7 +1966,7 @@ DISAS_INSN(suba) +@@ -1718,7 +1966,7 @@ int src; int reg; @@ -1716,7 +1676,7 @@ diff -u -a -p -r1.17 translate.c reg = AREG(insn, 9); gen_op_sub32(reg, reg, src); } -@@ -1763,34 +2011,18 @@ DISAS_INSN(mov3q) +@@ -1763,34 +2011,18 @@ DISAS_INSN(cmp) { @@ -1753,7 +1713,7 @@ diff -u -a -p -r1.17 translate.c } DISAS_INSN(cmpa) -@@ -1810,7 +2042,7 @@ DISAS_INSN(cmpa) +@@ -1810,7 +2042,7 @@ dest = gen_new_qreg(QMODE_I32); gen_op_sub32(dest, reg, src); gen_op_update_cc_add(dest, src); @@ -1762,7 +1722,7 @@ diff -u -a -p -r1.17 translate.c } DISAS_INSN(eor) -@@ -1819,13 +2051,15 @@ DISAS_INSN(eor) +@@ -1819,13 +2051,15 @@ int reg; int dest; int addr; @@ -1780,7 +1740,7 @@ diff -u -a -p -r1.17 translate.c } DISAS_INSN(and) -@@ -1834,17 +2068,19 @@ DISAS_INSN(and) +@@ -1834,17 +2068,19 @@ int reg; int dest; int addr; @@ -1804,7 +1764,7 @@ diff -u -a -p -r1.17 translate.c } gen_logic_cc(s, dest); } -@@ -1854,7 +2090,7 @@ DISAS_INSN(adda) +@@ -1854,7 +2090,7 @@ int src; int reg; @@ -1813,7 +1773,7 @@ diff -u -a -p -r1.17 translate.c reg = AREG(insn, 9); gen_op_add32(reg, reg, src); } -@@ -1907,6 +2143,58 @@ DISAS_INSN(shift_im) +@@ -1907,6 +2143,58 @@ } } @@ -1872,7 +1832,7 @@ diff -u -a -p -r1.17 translate.c DISAS_INSN(shift_reg) { int reg; -@@ -1931,6 +2219,603 @@ DISAS_INSN(shift_reg) +@@ -1931,6 +2219,603 @@ } } @@ -2476,7 +2436,7 @@ diff -u -a -p -r1.17 translate.c DISAS_INSN(ff1) { int reg; -@@ -2194,17 +3079,42 @@ DISAS_INSN(fpu) +@@ -2194,17 +3079,42 @@ case 7: { int addr; @@ -2525,7 +2485,7 @@ diff -u -a -p -r1.17 translate.c dest = QREG_F0; while (mask) { if (ext & mask) { -@@ -2216,8 +3126,11 @@ DISAS_INSN(fpu) +@@ -2216,8 +3126,11 @@ /* load */ gen_ld(s, f64, dest, addr); } @@ -2539,7 +2499,7 @@ diff -u -a -p -r1.17 translate.c } mask >>= 1; dest++; -@@ -2293,6 +3206,12 @@ DISAS_INSN(fpu) +@@ -2293,6 +3206,12 @@ case 0x23: case 0x63: case 0x67: /* fmul */ gen_op_mulf64(res, res, src); break; @@ -2552,7 +2512,7 @@ diff -u -a -p -r1.17 translate.c case 0x28: case 0x68: case 0x6c: /* fsub */ gen_op_subf64(res, res, src); break; -@@ -2759,85 +3678,158 @@ void register_m68k_insns (CPUM68KState * +@@ -2759,85 +3678,158 @@ register_opcode(disas_##name, 0x##opcode, 0x##mask); \ } while(0) INSN(undef, 0000, 0000, CF_ISA_A); @@ -2713,7 +2673,7 @@ diff -u -a -p -r1.17 translate.c INSN(mac, a000, f100, CF_EMAC); INSN(from_mac, a180, f9b0, CF_EMAC); INSN(move_mac, a110, f9fc, CF_EMAC); -@@ -2856,19 +3848,50 @@ void register_m68k_insns (CPUM68KState * +@@ -2856,19 +3848,50 @@ INSN(cmpa, b0c0, f1c0, CF_ISA_B); /* cmpa.w */ INSN(cmp, b080, f1c0, CF_ISA_A); INSN(cmpa, b1c0, f1c0, CF_ISA_A); diff --git a/qemu-s390.patch b/qemu-s390.patch index bf7730ab..aed44ba3 100644 --- a/qemu-s390.patch +++ b/qemu-s390.patch @@ -1,6 +1,6 @@ ---- qemu-0.9.0.cvs/Makefile.target -+++ qemu-0.9.0.cvs/Makefile.target -@@ -360,6 +360,9 @@ +--- qemu/Makefile.target ++++ qemu/Makefile.target +@@ -396,6 +396,9 @@ ifeq ($(findstring z80, $(TARGET_ARCH) $(ARCH)),z80) LIBOBJS+=z80-dis.o endif @@ -10,69 +10,18 @@ ifdef CONFIG_GDBSTUB OBJS+=gdbstub.o ---- qemu-0.9.0.cvs/configure -+++ qemu-0.9.0.cvs/configure -@@ -53,7 +53,7 @@ - mips64) - cpu="mips64" - ;; -- s390) -+ s390*) - cpu="s390" - ;; - sparc|sun4[cdmuv]) -@@ -296,7 +296,7 @@ - if [ "$bsd" = "yes" -o "$darwin" = "yes" -o "$mingw32" = "yes" ] ; then - AIOLIBS= - else -- AIOLIBS="-lrt" -+ AIOLIBS="-lrt -lpthread" - fi - - # default flags for all hosts ---- qemu-0.9.0.cvs/dis-asm.h -+++ qemu-0.9.0.cvs/dis-asm.h -@@ -202,6 +202,8 @@ - bfd_arch_mn10300, /* Matsushita MN10300 */ - bfd_arch_last - }; -+#define bfd_mach_s390_31 31 -+#define bfd_mach_s390_64 64 - - typedef struct symbol_cache_entry - { -@@ -380,6 +382,7 @@ - extern int print_insn_ppc PARAMS ((bfd_vma, disassemble_info*)); - extern int print_insn_alpha PARAMS ((bfd_vma, disassemble_info*)); +--- qemu/dis-asm.h ++++ qemu/dis-asm.h +@@ -388,6 +388,7 @@ + extern int print_insn_s390 PARAMS ((bfd_vma, disassemble_info*)); + extern int print_insn_crisv32 PARAMS ((bfd_vma, disassemble_info*)); extern int print_insn_z80 PARAMS ((bfd_vma, disassemble_info*)); +extern int print_insn_s390 PARAMS ((bfd_vma, disassemble_info*)); #if 0 /* Fetch the disassembler for a given BFD, if that support is available. */ ---- qemu-0.9.0.cvs/disas.c -+++ qemu-0.9.0.cvs/disas.c -@@ -271,6 +271,8 @@ - print_insn = print_insn_little_mips; - #elif defined(__m68k__) - print_insn = print_insn_m68k; -+#elif defined(__s390__) -+ print_insn = print_insn_s390; - #else - fprintf(out, "0x%lx: Asm output not supported on this arch\n", - (long) code); ---- qemu-0.9.0.cvs/dyngen-exec.h -+++ qemu-0.9.0.cvs/dyngen-exec.h -@@ -254,7 +254,7 @@ - #define GOTO_LABEL_PARAM(n) asm volatile ("b " ASM_NAME(__op_gen_label) #n) - #elif defined(__s390__) - #define EXIT_TB() asm volatile ("br %r14") --#define GOTO_LABEL_PARAM(n) asm volatile ("b " ASM_NAME(__op_gen_label) #n) -+#define GOTO_LABEL_PARAM(n) asm volatile ("bras %r7,8; .long " ASM_NAME(__op_gen_label) #n "; l %r7, 0(%r7); br %r7") - #elif defined(__alpha__) - #define EXIT_TB() asm volatile ("ret") - #elif defined(__ia64__) ---- qemu-0.9.0.cvs/dyngen.c -+++ qemu-0.9.0.cvs/dyngen.c +--- qemu/dyngen.c ++++ qemu/dyngen.c @@ -1495,8 +1495,8 @@ p = (void *)(p_end - 2); if (p == p_start) @@ -84,1785 +33,8 @@ copy_size = p - p_start; } #elif defined(HOST_ALPHA) ---- qemu-0.9.0.cvs/exec-all.h -+++ qemu-0.9.0.cvs/exec-all.h -@@ -340,6 +340,24 @@ - "1:\n");\ - } while (0) - -+#elif defined(__s390__) -+/* GCC spills R13, so we have to restore it before branching away */ -+ -+#define GOTO_TB(opname, tbparam, n)\ -+do {\ -+ static void __attribute__((used)) *dummy ## n = &&dummy_label ## n;\ -+ static void __attribute__((used)) *__op_label ## n \ -+ __asm__(ASM_OP_LABEL_NAME(n, opname)) = &&label ## n;\ -+ __asm__ __volatile__ ( \ -+ "l %%r13,52(%%r15)\n" \ -+ "br %0\n" \ -+ : : "r" (((TranslationBlock*)tbparam)->tb_next[n]));\ -+ \ -+ for(;*((int*)0);); /* just to keep GCC busy */ \ -+label ## n: ;\ -+dummy_label ## n: ;\ -+} while(0) -+ - #else - - /* jump to next block operations (more portable code, does not need ---- qemu-0.9.0.cvs/s390-dis.c -+++ qemu-0.9.0.cvs/s390-dis.c -@@ -0,0 +1,1711 @@ -+/* s390-dis.c -- Disassemble S390 instructions -+ Copyright 2000, 2001, 2002, 2003, 2005, 2007 Free Software Foundation, Inc. -+ Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com). -+ -+ This file is part of the GNU opcodes library. -+ -+ This library is free software; you can redistribute it and/or modify -+ it under the terms of the GNU General Public License as published by -+ the Free Software Foundation; either version 3, or (at your option) -+ any later version. -+ -+ It is distributed in the hope that it will be useful, but WITHOUT -+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public -+ License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this file; see the file COPYING. If not, write to the -+ Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, -+ MA 02110-1301, USA. */ -+ -+#include -+#include "dis-asm.h" -+ -+/* s390.h -- Header file for S390 opcode table -+ Copyright 2000, 2001, 2003 Free Software Foundation, Inc. -+ Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com). -+ -+ This file is part of BFD, the Binary File Descriptor library. -+ -+ This program is free software; you can redistribute it and/or modify -+ it under the terms of the GNU General Public License as published by -+ the Free Software Foundation; either version 2 of the License, or -+ (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, -+ but WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ GNU General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA -+ 02110-1301, USA. */ -+ -+#ifndef S390_H -+#define S390_H -+ -+/* List of instruction sets variations. */ -+ -+enum s390_opcode_mode_val -+ { -+ S390_OPCODE_ESA = 0, -+ S390_OPCODE_ZARCH -+ }; -+ -+enum s390_opcode_cpu_val -+ { -+ S390_OPCODE_G5 = 0, -+ S390_OPCODE_G6, -+ S390_OPCODE_Z900, -+ S390_OPCODE_Z990, -+ S390_OPCODE_Z9_109, -+ S390_OPCODE_Z9_EC -+ }; -+ -+/* The opcode table is an array of struct s390_opcode. */ -+ -+struct s390_opcode -+ { -+ /* The opcode name. */ -+ const char * name; -+ -+ /* The opcode itself. Those bits which will be filled in with -+ operands are zeroes. */ -+ unsigned char opcode[6]; -+ -+ /* The opcode mask. This is used by the disassembler. This is a -+ mask containing ones indicating those bits which must match the -+ opcode field, and zeroes indicating those bits which need not -+ match (and are presumably filled in by operands). */ -+ unsigned char mask[6]; -+ -+ /* The opcode length in bytes. */ -+ int oplen; -+ -+ /* An array of operand codes. Each code is an index into the -+ operand table. They appear in the order which the operands must -+ appear in assembly code, and are terminated by a zero. */ -+ unsigned char operands[6]; -+ -+ /* Bitmask of execution modes this opcode is available for. */ -+ unsigned int modes; -+ -+ /* First cpu this opcode is available for. */ -+ enum s390_opcode_cpu_val min_cpu; -+ }; -+ -+/* The table itself is sorted by major opcode number, and is otherwise -+ in the order in which the disassembler should consider -+ instructions. */ -+extern const struct s390_opcode s390_opcodes[]; -+extern const int s390_num_opcodes; -+ -+/* A opcode format table for the .insn pseudo mnemonic. */ -+extern const struct s390_opcode s390_opformats[]; -+extern const int s390_num_opformats; -+ -+/* Values defined for the flags field of a struct powerpc_opcode. */ -+ -+/* The operands table is an array of struct s390_operand. */ -+ -+struct s390_operand -+ { -+ /* The number of bits in the operand. */ -+ int bits; -+ -+ /* How far the operand is left shifted in the instruction. */ -+ int shift; -+ -+ /* One bit syntax flags. */ -+ unsigned long flags; -+ }; -+ -+/* Elements in the table are retrieved by indexing with values from -+ the operands field of the powerpc_opcodes table. */ -+ -+extern const struct s390_operand s390_operands[]; -+ -+/* Values defined for the flags field of a struct s390_operand. */ -+ -+/* This operand names a register. The disassembler uses this to print -+ register names with a leading 'r'. */ -+#define S390_OPERAND_GPR 0x1 -+ -+/* This operand names a floating point register. The disassembler -+ prints these with a leading 'f'. */ -+#define S390_OPERAND_FPR 0x2 -+ -+/* This operand names an access register. The disassembler -+ prints these with a leading 'a'. */ -+#define S390_OPERAND_AR 0x4 -+ -+/* This operand names a control register. The disassembler -+ prints these with a leading 'c'. */ -+#define S390_OPERAND_CR 0x8 -+ -+/* This operand is a displacement. */ -+#define S390_OPERAND_DISP 0x10 -+ -+/* This operand names a base register. */ -+#define S390_OPERAND_BASE 0x20 -+ -+/* This operand names an index register, it can be skipped. */ -+#define S390_OPERAND_INDEX 0x40 -+ -+/* This operand is a relative branch displacement. The disassembler -+ prints these symbolically if possible. */ -+#define S390_OPERAND_PCREL 0x80 -+ -+/* This operand takes signed values. */ -+#define S390_OPERAND_SIGNED 0x100 -+ -+/* This operand is a length. */ -+#define S390_OPERAND_LENGTH 0x200 -+ -+/* This operand is optional. Only a single operand at the end of -+ the instruction may be optional. */ -+#define S390_OPERAND_OPTIONAL 0x400 -+ -+ #endif /* S390_H */ -+ -+ -+static int init_flag = 0; -+static int opc_index[256]; -+static int current_arch_mask = 0; -+ -+/* Set up index table for first opcode byte. */ -+ -+static void -+init_disasm (struct disassemble_info *info) -+{ -+ const struct s390_opcode *opcode; -+ const struct s390_opcode *opcode_end; -+ -+ memset (opc_index, 0, sizeof (opc_index)); -+ opcode_end = s390_opcodes + s390_num_opcodes; -+ for (opcode = s390_opcodes; opcode < opcode_end; opcode++) -+ { -+ opc_index[(int) opcode->opcode[0]] = opcode - s390_opcodes; -+ while ((opcode < opcode_end) && -+ (opcode[1].opcode[0] == opcode->opcode[0])) -+ opcode++; -+ } -+// switch (info->mach) -+// { -+// case bfd_mach_s390_31: -+ current_arch_mask = 1 << S390_OPCODE_ESA; -+// break; -+// case bfd_mach_s390_64: -+// current_arch_mask = 1 << S390_OPCODE_ZARCH; -+// break; -+// default: -+// abort (); -+// } -+ init_flag = 1; -+} -+ -+/* Extracts an operand value from an instruction. */ -+ -+static inline unsigned int -+s390_extract_operand (unsigned char *insn, const struct s390_operand *operand) -+{ -+ unsigned int val; -+ int bits; -+ -+ /* Extract fragments of the operand byte for byte. */ -+ insn += operand->shift / 8; -+ bits = (operand->shift & 7) + operand->bits; -+ val = 0; -+ do -+ { -+ val <<= 8; -+ val |= (unsigned int) *insn++; -+ bits -= 8; -+ } -+ while (bits > 0); -+ val >>= -bits; -+ val &= ((1U << (operand->bits - 1)) << 1) - 1; -+ -+ /* Check for special long displacement case. */ -+ if (operand->bits == 20 && operand->shift == 20) -+ val = (val & 0xff) << 12 | (val & 0xfff00) >> 8; -+ -+ /* Sign extend value if the operand is signed or pc relative. */ -+ if ((operand->flags & (S390_OPERAND_SIGNED | S390_OPERAND_PCREL)) -+ && (val & (1U << (operand->bits - 1)))) -+ val |= (-1U << (operand->bits - 1)) << 1; -+ -+ /* Double value if the operand is pc relative. */ -+ if (operand->flags & S390_OPERAND_PCREL) -+ val <<= 1; -+ -+ /* Length x in an instructions has real length x + 1. */ -+ if (operand->flags & S390_OPERAND_LENGTH) -+ val++; -+ return val; -+} -+ -+/* Print a S390 instruction. */ -+ -+int -+print_insn_s390 (bfd_vma memaddr, struct disassemble_info *info) -+{ -+ bfd_byte buffer[6]; -+ const struct s390_opcode *opcode; -+ const struct s390_opcode *opcode_end; -+ unsigned int value; -+ int status, opsize, bufsize; -+ char separator; -+ -+ if (init_flag == 0) -+ init_disasm (info); -+ -+ /* The output looks better if we put 6 bytes on a line. */ -+ info->bytes_per_line = 6; -+ -+ /* Every S390 instruction is max 6 bytes long. */ -+ memset (buffer, 0, 6); -+ status = (*info->read_memory_func) (memaddr, buffer, 6, info); -+ if (status != 0) -+ { -+ for (bufsize = 0; bufsize < 6; bufsize++) -+ if ((*info->read_memory_func) (memaddr, buffer, bufsize + 1, info) != 0) -+ break; -+ if (bufsize <= 0) -+ { -+ (*info->memory_error_func) (status, memaddr, info); -+ return -1; -+ } -+ /* Opsize calculation looks strange but it works -+ 00xxxxxx -> 2 bytes, 01xxxxxx/10xxxxxx -> 4 bytes, -+ 11xxxxxx -> 6 bytes. */ -+ opsize = ((((buffer[0] >> 6) + 1) >> 1) + 1) << 1; -+ status = opsize > bufsize; -+ } -+ else -+ { -+ bufsize = 6; -+ opsize = ((((buffer[0] >> 6) + 1) >> 1) + 1) << 1; -+ } -+ -+ if (status == 0) -+ { -+ /* Find the first match in the opcode table. */ -+ opcode_end = s390_opcodes + s390_num_opcodes; -+ for (opcode = s390_opcodes + opc_index[(int) buffer[0]]; -+ (opcode < opcode_end) && (buffer[0] == opcode->opcode[0]); -+ opcode++) -+ { -+ const struct s390_operand *operand; -+ const unsigned char *opindex; -+ -+ /* Check architecture. */ -+ if (!(opcode->modes & current_arch_mask)) -+ continue; -+ /* Check signature of the opcode. */ -+ if ((buffer[1] & opcode->mask[1]) != opcode->opcode[1] -+ || (buffer[2] & opcode->mask[2]) != opcode->opcode[2] -+ || (buffer[3] & opcode->mask[3]) != opcode->opcode[3] -+ || (buffer[4] & opcode->mask[4]) != opcode->opcode[4] -+ || (buffer[5] & opcode->mask[5]) != opcode->opcode[5]) -+ continue; -+ -+ /* The instruction is valid. */ -+ if (opcode->operands[0] != 0) -+ (*info->fprintf_func) (info->stream, "%s\t", opcode->name); -+ else -+ (*info->fprintf_func) (info->stream, "%s", opcode->name); -+ -+ /* Extract the operands. */ -+ separator = 0; -+ for (opindex = opcode->operands; *opindex != 0; opindex++) -+ { -+ unsigned int value; -+ -+ operand = s390_operands + *opindex; -+ value = s390_extract_operand (buffer, operand); -+ -+ if ((operand->flags & S390_OPERAND_INDEX) && value == 0) -+ continue; -+ if ((operand->flags & S390_OPERAND_BASE) && -+ value == 0 && separator == '(') -+ { -+ separator = ','; -+ continue; -+ } -+ -+ if (separator) -+ (*info->fprintf_func) (info->stream, "%c", separator); -+ -+ if (operand->flags & S390_OPERAND_GPR) -+ (*info->fprintf_func) (info->stream, "%%r%i", value); -+ else if (operand->flags & S390_OPERAND_FPR) -+ (*info->fprintf_func) (info->stream, "%%f%i", value); -+ else if (operand->flags & S390_OPERAND_AR) -+ (*info->fprintf_func) (info->stream, "%%a%i", value); -+ else if (operand->flags & S390_OPERAND_CR) -+ (*info->fprintf_func) (info->stream, "%%c%i", value); -+ else if (operand->flags & S390_OPERAND_PCREL) -+ (*info->print_address_func) (memaddr + (int) value, info); -+ else if (operand->flags & S390_OPERAND_SIGNED) -+ (*info->fprintf_func) (info->stream, "%i", (int) value); -+ else -+ (*info->fprintf_func) (info->stream, "%u", value); -+ -+ if (operand->flags & S390_OPERAND_DISP) -+ { -+ separator = '('; -+ } -+ else if (operand->flags & S390_OPERAND_BASE) -+ { -+ (*info->fprintf_func) (info->stream, ")"); -+ separator = ','; -+ } -+ else -+ separator = ','; -+ } -+ -+ /* Found instruction, printed it, return its size. */ -+ return opsize; -+ } -+ /* No matching instruction found, fall through to hex print. */ -+ } -+ -+ if (bufsize >= 4) -+ { -+ value = (unsigned int) buffer[0]; -+ value = (value << 8) + (unsigned int) buffer[1]; -+ value = (value << 8) + (unsigned int) buffer[2]; -+ value = (value << 8) + (unsigned int) buffer[3]; -+ (*info->fprintf_func) (info->stream, ".long\t0x%08x", value); -+ return 4; -+ } -+ else if (bufsize >= 2) -+ { -+ value = (unsigned int) buffer[0]; -+ value = (value << 8) + (unsigned int) buffer[1]; -+ (*info->fprintf_func) (info->stream, ".short\t0x%04x", value); -+ return 2; -+ } -+ else -+ { -+ value = (unsigned int) buffer[0]; -+ (*info->fprintf_func) (info->stream, ".byte\t0x%02x", value); -+ return 1; -+ } -+} -+/* s390-opc.c -- S390 opcode list -+ Copyright 2000, 2001, 2003, 2007 Free Software Foundation, Inc. -+ Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com). -+ -+ This file is part of the GNU opcodes library. -+ -+ This library is free software; you can redistribute it and/or modify -+ it under the terms of the GNU General Public License as published by -+ the Free Software Foundation; either version 3, or (at your option) -+ any later version. -+ -+ It is distributed in the hope that it will be useful, but WITHOUT -+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public -+ License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this file; see the file COPYING. If not, write to the -+ Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, -+ MA 02110-1301, USA. */ -+ -+#include -+ -+/* This file holds the S390 opcode table. The opcode table -+ includes almost all of the extended instruction mnemonics. This -+ permits the disassembler to use them, and simplifies the assembler -+ logic, at the cost of increasing the table size. The table is -+ strictly constant data, so the compiler should be able to put it in -+ the .text section. -+ -+ This file also holds the operand table. All knowledge about -+ inserting operands into instructions and vice-versa is kept in this -+ file. */ -+ -+/* The operands table. -+ The fields are bits, shift, insert, extract, flags. */ -+ -+const struct s390_operand s390_operands[] = -+{ -+#define UNUSED 0 -+ { 0, 0, 0 }, /* Indicates the end of the operand list */ -+ -+#define R_8 1 /* GPR starting at position 8 */ -+ { 4, 8, S390_OPERAND_GPR }, -+#define R_12 2 /* GPR starting at position 12 */ -+ { 4, 12, S390_OPERAND_GPR }, -+#define R_16 3 /* GPR starting at position 16 */ -+ { 4, 16, S390_OPERAND_GPR }, -+#define R_20 4 /* GPR starting at position 20 */ -+ { 4, 20, S390_OPERAND_GPR }, -+#define R_24 5 /* GPR starting at position 24 */ -+ { 4, 24, S390_OPERAND_GPR }, -+#define R_28 6 /* GPR starting at position 28 */ -+ { 4, 28, S390_OPERAND_GPR }, -+#define R_32 7 /* GPR starting at position 32 */ -+ { 4, 32, S390_OPERAND_GPR }, -+ -+#define F_8 8 /* FPR starting at position 8 */ -+ { 4, 8, S390_OPERAND_FPR }, -+#define F_12 9 /* FPR starting at position 12 */ -+ { 4, 12, S390_OPERAND_FPR }, -+#define F_16 10 /* FPR starting at position 16 */ -+ { 4, 16, S390_OPERAND_FPR }, -+#define F_20 11 /* FPR starting at position 16 */ -+ { 4, 16, S390_OPERAND_FPR }, -+#define F_24 12 /* FPR starting at position 24 */ -+ { 4, 24, S390_OPERAND_FPR }, -+#define F_28 13 /* FPR starting at position 28 */ -+ { 4, 28, S390_OPERAND_FPR }, -+#define F_32 14 /* FPR starting at position 32 */ -+ { 4, 32, S390_OPERAND_FPR }, -+ -+#define A_8 15 /* Access reg. starting at position 8 */ -+ { 4, 8, S390_OPERAND_AR }, -+#define A_12 16 /* Access reg. starting at position 12 */ -+ { 4, 12, S390_OPERAND_AR }, -+#define A_24 17 /* Access reg. starting at position 24 */ -+ { 4, 24, S390_OPERAND_AR }, -+#define A_28 18 /* Access reg. starting at position 28 */ -+ { 4, 28, S390_OPERAND_AR }, -+ -+#define C_8 19 /* Control reg. starting at position 8 */ -+ { 4, 8, S390_OPERAND_CR }, -+#define C_12 20 /* Control reg. starting at position 12 */ -+ { 4, 12, S390_OPERAND_CR }, -+ -+#define B_16 21 /* Base register starting at position 16 */ -+ { 4, 16, S390_OPERAND_BASE|S390_OPERAND_GPR }, -+#define B_32 22 /* Base register starting at position 32 */ -+ { 4, 32, S390_OPERAND_BASE|S390_OPERAND_GPR }, -+ -+#define X_12 23 /* Index register starting at position 12 */ -+ { 4, 12, S390_OPERAND_INDEX|S390_OPERAND_GPR }, -+ -+#define D_20 24 /* Displacement starting at position 20 */ -+ { 12, 20, S390_OPERAND_DISP }, -+#define D_36 25 /* Displacement starting at position 36 */ -+ { 12, 36, S390_OPERAND_DISP }, -+#define D20_20 26 /* 20 bit displacement starting at 20 */ -+ { 20, 20, S390_OPERAND_DISP|S390_OPERAND_SIGNED }, -+ -+#define L4_8 27 /* 4 bit length starting at position 8 */ -+ { 4, 8, S390_OPERAND_LENGTH }, -+#define L4_12 28 /* 4 bit length starting at position 12 */ -+ { 4, 12, S390_OPERAND_LENGTH }, -+#define L8_8 29 /* 8 bit length starting at position 8 */ -+ { 8, 8, S390_OPERAND_LENGTH }, -+ -+#define U4_8 30 /* 4 bit unsigned value starting at 8 */ -+ { 4, 8, 0 }, -+#define U4_12 31 /* 4 bit unsigned value starting at 12 */ -+ { 4, 12, 0 }, -+#define U4_16 32 /* 4 bit unsigned value starting at 16 */ -+ { 4, 16, 0 }, -+#define U4_20 33 /* 4 bit unsigned value starting at 20 */ -+ { 4, 20, 0 }, -+#define U8_8 34 /* 8 bit unsigned value starting at 8 */ -+ { 8, 8, 0 }, -+#define U8_16 35 /* 8 bit unsigned value starting at 16 */ -+ { 8, 16, 0 }, -+#define I16_16 36 /* 16 bit signed value starting at 16 */ -+ { 16, 16, S390_OPERAND_SIGNED }, -+#define U16_16 37 /* 16 bit unsigned value starting at 16 */ -+ { 16, 16, 0 }, -+#define J16_16 38 /* PC relative jump offset at 16 */ -+ { 16, 16, S390_OPERAND_PCREL }, -+#define J32_16 39 /* PC relative long offset at 16 */ -+ { 32, 16, S390_OPERAND_PCREL }, -+#define I32_16 40 /* 32 bit signed value starting at 16 */ -+ { 32, 16, S390_OPERAND_SIGNED }, -+#define U32_16 41 /* 32 bit unsigned value starting at 16 */ -+ { 32, 16, 0 }, -+#define M_16 42 /* 4 bit optional mask starting at 16 */ -+ { 4, 16, S390_OPERAND_OPTIONAL }, -+#define RO_28 43 /* optional GPR starting at position 28 */ -+ { 4, 28, (S390_OPERAND_GPR | S390_OPERAND_OPTIONAL) } -+ -+}; -+ -+ -+/* Macros used to form opcodes. */ -+ -+/* 8/16/48 bit opcodes. */ -+#define OP8(x) { x, 0x00, 0x00, 0x00, 0x00, 0x00 } -+#define OP16(x) { x >> 8, x & 255, 0x00, 0x00, 0x00, 0x00 } -+#define OP48(x) { x >> 40, (x >> 32) & 255, (x >> 24) & 255, \ -+ (x >> 16) & 255, (x >> 8) & 255, x & 255} -+ -+/* The new format of the INSTR_x_y and MASK_x_y defines is based -+ on the following rules: -+ 1) the middle part of the definition (x in INSTR_x_y) is the official -+ names of the instruction format that you can find in the principals -+ of operation. -+ 2) the last part of the definition (y in INSTR_x_y) gives you an idea -+ which operands the binary represenation of the instruction has. -+ The meanings of the letters in y are: -+ a - access register -+ c - control register -+ d - displacement, 12 bit -+ f - floating pointer register -+ i - signed integer, 4, 8, 16 or 32 bit -+ l - length, 4 or 8 bit -+ p - pc relative -+ r - general purpose register -+ u - unsigned integer, 4, 8, 16 or 32 bit -+ m - mode field, 4 bit -+ 0 - operand skipped. -+ The order of the letters reflects the layout of the format in -+ storage and not the order of the paramaters of the instructions. -+ The use of the letters is not a 100% match with the PoP but it is -+ quite close. -+ -+ For example the instruction "mvo" is defined in the PoP as follows: -+ -+ MVO D1(L1,B1),D2(L2,B2) [SS] -+ -+ -------------------------------------- -+ | 'F1' | L1 | L2 | B1 | D1 | B2 | D2 | -+ -------------------------------------- -+ 0 8 12 16 20 32 36 -+ -+ The instruction format is: INSTR_SS_LLRDRD / MASK_SS_LLRDRD. */ -+ -+#define INSTR_E 2, { 0,0,0,0,0,0 } /* e.g. pr */ -+#define INSTR_RIE_RRP 6, { R_8,R_12,J16_16,0,0,0 } /* e.g. brxhg */ -+#define INSTR_RIL_0P 6, { J32_16,0,0,0,0 } /* e.g. jg */ -+#define INSTR_RIL_RP 6, { R_8,J32_16,0,0,0,0 } /* e.g. brasl */ -+#define INSTR_RIL_UP 6, { U4_8,J32_16,0,0,0,0 } /* e.g. brcl */ -+#define INSTR_RIL_RI 6, { R_8,I32_16,0,0,0,0 } /* e.g. afi */ -+#define INSTR_RIL_RU 6, { R_8,U32_16,0,0,0,0 } /* e.g. alfi */ -+#define INSTR_RI_0P 4, { J16_16,0,0,0,0,0 } /* e.g. j */ -+#define INSTR_RI_RI 4, { R_8,I16_16,0,0,0,0 } /* e.g. ahi */ -+#define INSTR_RI_RP 4, { R_8,J16_16,0,0,0,0 } /* e.g. brct */ -+#define INSTR_RI_RU 4, { R_8,U16_16,0,0,0,0 } /* e.g. tml */ -+#define INSTR_RI_UP 4, { U4_8,J16_16,0,0,0,0 } /* e.g. brc */ -+#define INSTR_RRE_00 4, { 0,0,0,0,0,0 } /* e.g. palb */ -+#define INSTR_RRE_0R 4, { R_28,0,0,0,0,0 } /* e.g. tb */ -+#define INSTR_RRE_AA 4, { A_24,A_28,0,0,0,0 } /* e.g. cpya */ -+#define INSTR_RRE_AR 4, { A_24,R_28,0,0,0,0 } /* e.g. sar */ -+#define INSTR_RRE_F0 4, { F_24,0,0,0,0,0 } /* e.g. sqer */ -+#define INSTR_RRE_FF 4, { F_24,F_28,0,0,0,0 } /* e.g. debr */ -+#define INSTR_RRE_R0 4, { R_24,0,0,0,0,0 } /* e.g. ipm */ -+#define INSTR_RRE_RA 4, { R_24,A_28,0,0,0,0 } /* e.g. ear */ -+#define INSTR_RRE_RF 4, { R_24,F_28,0,0,0,0 } /* e.g. cefbr */ -+#define INSTR_RRE_RR 4, { R_24,R_28,0,0,0,0 } /* e.g. lura */ -+#define INSTR_RRE_FR 4, { F_24,R_28,0,0,0,0 } /* e.g. ldgr */ -+/* Actually efpc and sfpc do not take an optional operand. -+ This is just a workaround for existing code e.g. glibc. */ -+#define INSTR_RRE_RR_OPT 4, { R_24,RO_28,0,0,0,0 } /* efpc, sfpc */ -+#define INSTR_RRF_F0FF 4, { F_16,F_24,F_28,0,0,0 } /* e.g. madbr */ -+#define INSTR_RRF_F0FF2 4, { F_24,F_16,F_28,0,0,0 } /* e.g. cpsdr */ -+#define INSTR_RRF_F0FR 4, { F_24,F_16,R_28,0,0,0 } /* e.g. iedtr */ -+#define INSTR_RRF_FUFF 4, { F_24,F_16,F_28,U4_20,0,0 } /* e.g. didbr */ -+#define INSTR_RRF_RURR 4, { R_24,R_28,R_16,U4_20,0,0 } /* e.g. .insn */ -+#define INSTR_RRF_R0RR 4, { R_24,R_28,R_16,0,0,0 } /* e.g. idte */ -+#define INSTR_RRF_U0FF 4, { F_24,U4_16,F_28,0,0,0 } /* e.g. fixr */ -+#define INSTR_RRF_U0RF 4, { R_24,U4_16,F_28,0,0,0 } /* e.g. cfebr */ -+#define INSTR_RRF_UUFF 4, { F_24,U4_16,F_28,U4_20,0,0 } /* e.g. fidtr */ -+#define INSTR_RRF_0UFF 4, { F_24,F_28,U4_20,0,0,0 } /* e.g. ldetr */ -+#define INSTR_RRF_FFFU 4, { F_24,F_16,F_28,U4_20,0,0 } /* e.g. qadtr */ -+#define INSTR_RRF_M0RR 4, { R_24,R_28,M_16,0,0,0 } /* e.g. sske */ -+#define INSTR_RR_0R 2, { R_12, 0,0,0,0,0 } /* e.g. br */ -+#define INSTR_RR_FF 2, { F_8,F_12,0,0,0,0 } /* e.g. adr */ -+#define INSTR_RR_R0 2, { R_8, 0,0,0,0,0 } /* e.g. spm */ -+#define INSTR_RR_RR 2, { R_8,R_12,0,0,0,0 } /* e.g. lr */ -+#define INSTR_RR_U0 2, { U8_8, 0,0,0,0,0 } /* e.g. svc */ -+#define INSTR_RR_UR 2, { U4_8,R_12,0,0,0,0 } /* e.g. bcr */ -+#define INSTR_RRR_F0FF 4, { F_24,F_28,F_16,0,0,0 } /* e.g. ddtr */ -+#define INSTR_RSE_RRRD 6, { R_8,R_12,D_20,B_16,0,0 } /* e.g. lmh */ -+#define INSTR_RSE_CCRD 6, { C_8,C_12,D_20,B_16,0,0 } /* e.g. lmh */ -+#define INSTR_RSE_RURD 6, { R_8,U4_12,D_20,B_16,0,0 } /* e.g. icmh */ -+#define INSTR_RSL_R0RD 6, { R_8,D_20,B_16,0,0,0 } /* e.g. tp */ -+#define INSTR_RSI_RRP 4, { R_8,R_12,J16_16,0,0,0 } /* e.g. brxh */ -+#define INSTR_RSY_RRRD 6, { R_8,R_12,D20_20,B_16,0,0 } /* e.g. stmy */ -+#define INSTR_RSY_RURD 6, { R_8,U4_12,D20_20,B_16,0,0 } /* e.g. icmh */ -+#define INSTR_RSY_AARD 6, { A_8,A_12,D20_20,B_16,0,0 } /* e.g. lamy */ -+#define INSTR_RSY_CCRD 6, { C_8,C_12,D20_20,B_16,0,0 } /* e.g. lamy */ -+#define INSTR_RS_AARD 4, { A_8,A_12,D_20,B_16,0,0 } /* e.g. lam */ -+#define INSTR_RS_CCRD 4, { C_8,C_12,D_20,B_16,0,0 } /* e.g. lctl */ -+#define INSTR_RS_R0RD 4, { R_8,D_20,B_16,0,0,0 } /* e.g. sll */ -+#define INSTR_RS_RRRD 4, { R_8,R_12,D_20,B_16,0,0 } /* e.g. cs */ -+#define INSTR_RS_RURD 4, { R_8,U4_12,D_20,B_16,0,0 } /* e.g. icm */ -+#define INSTR_RXE_FRRD 6, { F_8,D_20,X_12,B_16,0,0 } /* e.g. axbr */ -+#define INSTR_RXE_RRRD 6, { R_8,D_20,X_12,B_16,0,0 } /* e.g. lg */ -+#define INSTR_RXF_FRRDF 6, { F_32,F_8,D_20,X_12,B_16,0 } /* e.g. madb */ -+#define INSTR_RXF_RRRDR 6, { R_32,R_8,D_20,X_12,B_16,0 } /* e.g. .insn */ -+#define INSTR_RXY_RRRD 6, { R_8,D20_20,X_12,B_16,0,0 } /* e.g. ly */ -+#define INSTR_RXY_FRRD 6, { F_8,D20_20,X_12,B_16,0,0 } /* e.g. ley */ -+#define INSTR_RX_0RRD 4, { D_20,X_12,B_16,0,0,0 } /* e.g. be */ -+#define INSTR_RX_FRRD 4, { F_8,D_20,X_12,B_16,0,0 } /* e.g. ae */ -+#define INSTR_RX_RRRD 4, { R_8,D_20,X_12,B_16,0,0 } /* e.g. l */ -+#define INSTR_RX_URRD 4, { U4_8,D_20,X_12,B_16,0,0 } /* e.g. bc */ -+#define INSTR_SI_URD 4, { D_20,B_16,U8_8,0,0,0 } /* e.g. cli */ -+#define INSTR_SIY_URD 6, { D20_20,B_16,U8_8,0,0,0 } /* e.g. tmy */ -+#define INSTR_SSE_RDRD 6, { D_20,B_16,D_36,B_32,0,0 } /* e.g. mvsdk */ -+#define INSTR_SS_L0RDRD 6, { D_20,L8_8,B_16,D_36,B_32,0 } /* e.g. mvc */ -+#define INSTR_SS_L2RDRD 6, { D_20,B_16,D_36,L8_8,B_32,0 } /* e.g. pka */ -+#define INSTR_SS_LIRDRD 6, { D_20,L4_8,B_16,D_36,B_32,U4_12 } /* e.g. srp */ -+#define INSTR_SS_LLRDRD 6, { D_20,L4_8,B_16,D_36,L4_12,B_32 } /* e.g. pack */ -+#define INSTR_SS_RRRDRD 6, { D_20,R_8,B_16,D_36,B_32,R_12 } /* e.g. mvck */ -+#define INSTR_SS_RRRDRD2 6, { R_8,D_20,B_16,R_12,D_36,B_32 } /* e.g. plo */ -+#define INSTR_SS_RRRDRD3 6, { R_8,R_12,D_20,B_16,D_36,B_32 } /* e.g. lmd */ -+#define INSTR_S_00 4, { 0,0,0,0,0,0 } /* e.g. hsch */ -+#define INSTR_S_RD 4, { D_20,B_16,0,0,0,0 } /* e.g. lpsw */ -+#define INSTR_SSF_RRDRD 6, { D_20,B_16,D_36,B_32,R_8,0 } /* e.g. mvcos */ -+ -+#define MASK_E { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RIE_RRP { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } -+#define MASK_RIL_0P { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RIL_RP { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RIL_UP { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RIL_RI { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RIL_RU { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RI_0P { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RI_RI { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RI_RP { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RI_RU { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RI_UP { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RRE_00 { 0xff, 0xff, 0xff, 0xff, 0x00, 0x00 } -+#define MASK_RRE_0R { 0xff, 0xff, 0xff, 0xf0, 0x00, 0x00 } -+#define MASK_RRE_AA { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 } -+#define MASK_RRE_AR { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 } -+#define MASK_RRE_F0 { 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00 } -+#define MASK_RRE_FF { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 } -+#define MASK_RRE_R0 { 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00 } -+#define MASK_RRE_RA { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 } -+#define MASK_RRE_RF { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 } -+#define MASK_RRE_RR { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 } -+#define MASK_RRE_FR { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 } -+#define MASK_RRE_RR_OPT { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 } -+#define MASK_RRF_F0FF { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 } -+#define MASK_RRF_F0FF2 { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 } -+#define MASK_RRF_F0FR { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 } -+#define MASK_RRF_FUFF { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RRF_RURR { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RRF_R0RR { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RRF_U0FF { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 } -+#define MASK_RRF_U0RF { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 } -+#define MASK_RRF_UUFF { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RRF_0UFF { 0xff, 0xff, 0xf0, 0x00, 0x00, 0x00 } -+#define MASK_RRF_FFFU { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RRF_M0RR { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 } -+#define MASK_RR_0R { 0xff, 0xf0, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RR_FF { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RR_R0 { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RR_RR { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RR_U0 { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RR_UR { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RRR_F0FF { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 } -+#define MASK_RSE_RRRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } -+#define MASK_RSE_CCRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } -+#define MASK_RSE_RURD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } -+#define MASK_RSL_R0RD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } -+#define MASK_RSI_RRP { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RS_AARD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RS_CCRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RS_R0RD { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RS_RRRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RS_RURD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RSY_RRRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } -+#define MASK_RSY_RURD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } -+#define MASK_RSY_AARD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } -+#define MASK_RSY_CCRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } -+#define MASK_RXE_FRRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } -+#define MASK_RXE_RRRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } -+#define MASK_RXF_FRRDF { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } -+#define MASK_RXF_RRRDR { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } -+#define MASK_RXY_RRRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } -+#define MASK_RXY_FRRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } -+#define MASK_RX_0RRD { 0xff, 0xf0, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RX_FRRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RX_RRRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_RX_URRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_SI_URD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_SIY_URD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff } -+#define MASK_SSE_RDRD { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_SS_L0RDRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_SS_L2RDRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_SS_LIRDRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_SS_LLRDRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_SS_RRRDRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_SS_RRRDRD2 { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_SS_RRRDRD3 { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_S_00 { 0xff, 0xff, 0xff, 0xff, 0x00, 0x00 } -+#define MASK_S_RD { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } -+#define MASK_SSF_RRDRD { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 } -+ -+/* The opcode formats table (blueprints for .insn pseudo mnemonic). */ -+ -+const struct s390_opcode s390_opformats[] = -+ { -+ { "e", OP8(0x00LL), MASK_E, INSTR_E, 3, 0 }, -+ { "ri", OP8(0x00LL), MASK_RI_RI, INSTR_RI_RI, 3, 0 }, -+ { "rie", OP8(0x00LL), MASK_RIE_RRP, INSTR_RIE_RRP, 3, 0 }, -+ { "ril", OP8(0x00LL), MASK_RIL_RP, INSTR_RIL_RP, 3, 0 }, -+ { "rilu", OP8(0x00LL), MASK_RIL_RU, INSTR_RIL_RU, 3, 0 }, -+ { "rr", OP8(0x00LL), MASK_RR_RR, INSTR_RR_RR, 3, 0 }, -+ { "rre", OP8(0x00LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0 }, -+ { "rrf", OP8(0x00LL), MASK_RRF_RURR, INSTR_RRF_RURR, 3, 0 }, -+ { "rs", OP8(0x00LL), MASK_RS_RRRD, INSTR_RS_RRRD, 3, 0 }, -+ { "rse", OP8(0x00LL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 3, 0 }, -+ { "rsi", OP8(0x00LL), MASK_RSI_RRP, INSTR_RSI_RRP, 3, 0 }, -+ { "rsy", OP8(0x00LL), MASK_RSY_RRRD, INSTR_RSY_RRRD, 3, 3 }, -+ { "rx", OP8(0x00LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0 }, -+ { "rxe", OP8(0x00LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 3, 0 }, -+ { "rxf", OP8(0x00LL), MASK_RXF_RRRDR, INSTR_RXF_RRRDR,3, 0 }, -+ { "rxy", OP8(0x00LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 3, 3 }, -+ { "s", OP8(0x00LL), MASK_S_RD, INSTR_S_RD, 3, 0 }, -+ { "si", OP8(0x00LL), MASK_SI_URD, INSTR_SI_URD, 3, 0 }, -+ { "siy", OP8(0x00LL), MASK_SIY_URD, INSTR_SIY_URD, 3, 3 }, -+ { "ss", OP8(0x00LL), MASK_SS_RRRDRD, INSTR_SS_RRRDRD,3, 0 }, -+ { "sse", OP8(0x00LL), MASK_SSE_RDRD, INSTR_SSE_RDRD, 3, 0 }, -+ { "ssf", OP8(0x00LL), MASK_SSF_RRDRD, INSTR_SSF_RRDRD,3, 0 }, -+}; -+ -+const int s390_num_opformats = -+ sizeof (s390_opformats) / sizeof (s390_opformats[0]); -+ -+/* The opcode table. This file was generated by s390-mkopc. -+ -+ The format of the opcode table is: -+ -+ NAME OPCODE MASK OPERANDS -+ -+ Name is the name of the instruction. -+ OPCODE is the instruction opcode. -+ MASK is the opcode mask; this is used to tell the disassembler -+ which bits in the actual opcode must match OPCODE. -+ OPERANDS is the list of operands. -+ -+ The disassembler reads the table in order and prints the first -+ instruction which matches. */ -+ -+const struct s390_opcode s390_opcodes[] = -+ { -+ { "dp", OP8(0xfdLL), MASK_SS_LLRDRD, INSTR_SS_LLRDRD, 3, 0}, -+ { "mp", OP8(0xfcLL), MASK_SS_LLRDRD, INSTR_SS_LLRDRD, 3, 0}, -+ { "sp", OP8(0xfbLL), MASK_SS_LLRDRD, INSTR_SS_LLRDRD, 3, 0}, -+ { "ap", OP8(0xfaLL), MASK_SS_LLRDRD, INSTR_SS_LLRDRD, 3, 0}, -+ { "cp", OP8(0xf9LL), MASK_SS_LLRDRD, INSTR_SS_LLRDRD, 3, 0}, -+ { "zap", OP8(0xf8LL), MASK_SS_LLRDRD, INSTR_SS_LLRDRD, 3, 0}, -+ { "unpk", OP8(0xf3LL), MASK_SS_LLRDRD, INSTR_SS_LLRDRD, 3, 0}, -+ { "pack", OP8(0xf2LL), MASK_SS_LLRDRD, INSTR_SS_LLRDRD, 3, 0}, -+ { "mvo", OP8(0xf1LL), MASK_SS_LLRDRD, INSTR_SS_LLRDRD, 3, 0}, -+ { "srp", OP8(0xf0LL), MASK_SS_LIRDRD, INSTR_SS_LIRDRD, 3, 0}, -+ { "lmd", OP8(0xefLL), MASK_SS_RRRDRD3, INSTR_SS_RRRDRD3, 2, 2}, -+ { "plo", OP8(0xeeLL), MASK_SS_RRRDRD2, INSTR_SS_RRRDRD2, 3, 0}, -+ { "stdy", OP48(0xed0000000067LL), MASK_RXY_FRRD, INSTR_RXY_FRRD, 2, 3}, -+ { "stey", OP48(0xed0000000066LL), MASK_RXY_FRRD, INSTR_RXY_FRRD, 2, 3}, -+ { "ldy", OP48(0xed0000000065LL), MASK_RXY_FRRD, INSTR_RXY_FRRD, 2, 3}, -+ { "ley", OP48(0xed0000000064LL), MASK_RXY_FRRD, INSTR_RXY_FRRD, 2, 3}, -+ { "tgxt", OP48(0xed0000000059LL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 2, 5}, -+ { "tcxt", OP48(0xed0000000058LL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 2, 5}, -+ { "tgdt", OP48(0xed0000000055LL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 2, 5}, -+ { "tcdt", OP48(0xed0000000054LL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 2, 5}, -+ { "tget", OP48(0xed0000000051LL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 2, 5}, -+ { "tcet", OP48(0xed0000000050LL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 2, 5}, -+ { "srxt", OP48(0xed0000000049LL), MASK_RXF_FRRDF, INSTR_RXF_FRRDF, 2, 5}, -+ { "slxt", OP48(0xed0000000048LL), MASK_RXF_FRRDF, INSTR_RXF_FRRDF, 2, 5}, -+ { "srdt", OP48(0xed0000000041LL), MASK_RXF_FRRDF, INSTR_RXF_FRRDF, 2, 5}, -+ { "sldt", OP48(0xed0000000040LL), MASK_RXF_FRRDF, INSTR_RXF_FRRDF, 2, 5}, -+ { "msd", OP48(0xed000000003fLL), MASK_RXF_FRRDF, INSTR_RXF_FRRDF, 3, 3}, -+ { "mad", OP48(0xed000000003eLL), MASK_RXF_FRRDF, INSTR_RXF_FRRDF, 3, 3}, -+ { "myh", OP48(0xed000000003dLL), MASK_RXF_FRRDF, INSTR_RXF_FRRDF, 2, 4}, -+ { "mayh", OP48(0xed000000003cLL), MASK_RXF_FRRDF, INSTR_RXF_FRRDF, 2, 4}, -+ { "my", OP48(0xed000000003bLL), MASK_RXF_FRRDF, INSTR_RXF_FRRDF, 2, 4}, -+ { "may", OP48(0xed000000003aLL), MASK_RXF_FRRDF, INSTR_RXF_FRRDF, 2, 4}, -+ { "myl", OP48(0xed0000000039LL), MASK_RXF_FRRDF, INSTR_RXF_FRRDF, 2, 4}, -+ { "mayl", OP48(0xed0000000038LL), MASK_RXF_FRRDF, INSTR_RXF_FRRDF, 2, 4}, -+ { "mee", OP48(0xed0000000037LL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 3, 0}, -+ { "sqe", OP48(0xed0000000034LL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 3, 0}, -+ { "mse", OP48(0xed000000002fLL), MASK_RXF_FRRDF, INSTR_RXF_FRRDF, 3, 3}, -+ { "mae", OP48(0xed000000002eLL), MASK_RXF_FRRDF, INSTR_RXF_FRRDF, 3, 3}, -+ { "lxe", OP48(0xed0000000026LL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 3, 0}, -+ { "lxd", OP48(0xed0000000025LL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 3, 0}, -+ { "lde", OP48(0xed0000000024LL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 3, 0}, -+ { "msdb", OP48(0xed000000001fLL), MASK_RXF_FRRDF, INSTR_RXF_FRRDF, 3, 0}, -+ { "madb", OP48(0xed000000001eLL), MASK_RXF_FRRDF, INSTR_RXF_FRRDF, 3, 0}, -+ { "ddb", OP48(0xed000000001dLL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 3, 0}, -+ { "mdb", OP48(0xed000000001cLL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 3, 0}, -+ { "sdb", OP48(0xed000000001bLL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 3, 0}, -+ { "adb", OP48(0xed000000001aLL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 3, 0}, -+ { "cdb", OP48(0xed0000000019LL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 3, 0}, -+ { "kdb", OP48(0xed0000000018LL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 3, 0}, -+ { "meeb", OP48(0xed0000000017LL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 3, 0}, -+ { "sqdb", OP48(0xed0000000015LL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 3, 0}, -+ { "sqeb", OP48(0xed0000000014LL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 3, 0}, -+ { "tcxb", OP48(0xed0000000012LL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 3, 0}, -+ { "tcdb", OP48(0xed0000000011LL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 3, 0}, -+ { "tceb", OP48(0xed0000000010LL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 3, 0}, -+ { "mseb", OP48(0xed000000000fLL), MASK_RXF_FRRDF, INSTR_RXF_FRRDF, 3, 0}, -+ { "maeb", OP48(0xed000000000eLL), MASK_RXF_FRRDF, INSTR_RXF_FRRDF, 3, 0}, -+ { "deb", OP48(0xed000000000dLL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 3, 0}, -+ { "mdeb", OP48(0xed000000000cLL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 3, 0}, -+ { "seb", OP48(0xed000000000bLL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 3, 0}, -+ { "aeb", OP48(0xed000000000aLL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 3, 0}, -+ { "ceb", OP48(0xed0000000009LL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 3, 0}, -+ { "keb", OP48(0xed0000000008LL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 3, 0}, -+ { "mxdb", OP48(0xed0000000007LL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 3, 0}, -+ { "lxeb", OP48(0xed0000000006LL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 3, 0}, -+ { "lxdb", OP48(0xed0000000005LL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 3, 0}, -+ { "ldeb", OP48(0xed0000000004LL), MASK_RXE_FRRD, INSTR_RXE_FRRD, 3, 0}, -+ { "brxlg", OP48(0xec0000000045LL), MASK_RIE_RRP, INSTR_RIE_RRP, 2, 2}, -+ { "brxhg", OP48(0xec0000000044LL), MASK_RIE_RRP, INSTR_RIE_RRP, 2, 2}, -+ { "tp", OP48(0xeb00000000c0LL), MASK_RSL_R0RD, INSTR_RSL_R0RD, 3, 0}, -+ { "stamy", OP48(0xeb000000009bLL), MASK_RSY_AARD, INSTR_RSY_AARD, 2, 3}, -+ { "lamy", OP48(0xeb000000009aLL), MASK_RSY_AARD, INSTR_RSY_AARD, 2, 3}, -+ { "lmy", OP48(0xeb0000000098LL), MASK_RSY_RRRD, INSTR_RSY_RRRD, 2, 3}, -+ { "lmh", OP48(0xeb0000000096LL), MASK_RSY_RRRD, INSTR_RSY_RRRD, 2, 3}, -+ { "lmh", OP48(0xeb0000000096LL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 2, 2}, -+ { "stmy", OP48(0xeb0000000090LL), MASK_RSY_RRRD, INSTR_RSY_RRRD, 2, 3}, -+ { "clclu", OP48(0xeb000000008fLL), MASK_RSY_RRRD, INSTR_RSY_RRRD, 2, 3}, -+ { "mvclu", OP48(0xeb000000008eLL), MASK_RSY_RRRD, INSTR_RSY_RRRD, 3, 3}, -+ { "mvclu", OP48(0xeb000000008eLL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 3, 0}, -+ { "icmy", OP48(0xeb0000000081LL), MASK_RSY_RURD, INSTR_RSY_RURD, 2, 3}, -+ { "icmh", OP48(0xeb0000000080LL), MASK_RSY_RURD, INSTR_RSY_RURD, 2, 3}, -+ { "icmh", OP48(0xeb0000000080LL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2}, -+ { "xiy", OP48(0xeb0000000057LL), MASK_SIY_URD, INSTR_SIY_URD, 2, 3}, -+ { "oiy", OP48(0xeb0000000056LL), MASK_SIY_URD, INSTR_SIY_URD, 2, 3}, -+ { "cliy", OP48(0xeb0000000055LL), MASK_SIY_URD, INSTR_SIY_URD, 2, 3}, -+ { "niy", OP48(0xeb0000000054LL), MASK_SIY_URD, INSTR_SIY_URD, 2, 3}, -+ { "mviy", OP48(0xeb0000000052LL), MASK_SIY_URD, INSTR_SIY_URD, 2, 3}, -+ { "tmy", OP48(0xeb0000000051LL), MASK_SIY_URD, INSTR_SIY_URD, 2, 3}, -+ { "bxleg", OP48(0xeb0000000045LL), MASK_RSY_RRRD, INSTR_RSY_RRRD, 2, 3}, -+ { "bxleg", OP48(0xeb0000000045LL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 2, 2}, -+ { "bxhg", OP48(0xeb0000000044LL), MASK_RSY_RRRD, INSTR_RSY_RRRD, 2, 3}, -+ { "bxhg", OP48(0xeb0000000044LL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 2, 2}, -+ { "cdsg", OP48(0xeb000000003eLL), MASK_RSY_RRRD, INSTR_RSY_RRRD, 2, 3}, -+ { "cdsg", OP48(0xeb000000003eLL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 2, 2}, -+ { "cdsy", OP48(0xeb0000000031LL), MASK_RSY_RRRD, INSTR_RSY_RRRD, 2, 3}, -+ { "csg", OP48(0xeb0000000030LL), MASK_RSY_RRRD, INSTR_RSY_RRRD, 2, 3}, -+ { "csg", OP48(0xeb0000000030LL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 2, 2}, -+ { "lctlg", OP48(0xeb000000002fLL), MASK_RSY_CCRD, INSTR_RSY_CCRD, 2, 3}, -+ { "lctlg", OP48(0xeb000000002fLL), MASK_RSE_CCRD, INSTR_RSE_CCRD, 2, 2}, -+ { "stcmy", OP48(0xeb000000002dLL), MASK_RSY_RURD, INSTR_RSY_RURD, 2, 3}, -+ { "stcmh", OP48(0xeb000000002cLL), MASK_RSY_RURD, INSTR_RSY_RURD, 2, 3}, -+ { "stcmh", OP48(0xeb000000002cLL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2}, -+ { "stmh", OP48(0xeb0000000026LL), MASK_RSY_RRRD, INSTR_RSY_RRRD, 2, 3}, -+ { "stmh", OP48(0xeb0000000026LL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 2, 2}, -+ { "stctg", OP48(0xeb0000000025LL), MASK_RSY_CCRD, INSTR_RSY_CCRD, 2, 3}, -+ { "stctg", OP48(0xeb0000000025LL), MASK_RSE_CCRD, INSTR_RSE_CCRD, 2, 2}, -+ { "stmg", OP48(0xeb0000000024LL), MASK_RSY_RRRD, INSTR_RSY_RRRD, 2, 3}, -+ { "stmg", OP48(0xeb0000000024LL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 2, 2}, -+ { "clmy", OP48(0xeb0000000021LL), MASK_RSY_RURD, INSTR_RSY_RURD, 2, 3}, -+ { "clmh", OP48(0xeb0000000020LL), MASK_RSY_RURD, INSTR_RSY_RURD, 2, 3}, -+ { "clmh", OP48(0xeb0000000020LL), MASK_RSE_RURD, INSTR_RSE_RURD, 2, 2}, -+ { "rll", OP48(0xeb000000001dLL), MASK_RSY_RRRD, INSTR_RSY_RRRD, 3, 3}, -+ { "rll", OP48(0xeb000000001dLL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 3, 2}, -+ { "rllg", OP48(0xeb000000001cLL), MASK_RSY_RRRD, INSTR_RSY_RRRD, 2, 3}, -+ { "rllg", OP48(0xeb000000001cLL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 2, 2}, -+ { "csy", OP48(0xeb0000000014LL), MASK_RSY_RRRD, INSTR_RSY_RRRD, 2, 3}, -+ { "tracg", OP48(0xeb000000000fLL), MASK_RSY_RRRD, INSTR_RSY_RRRD, 2, 3}, -+ { "tracg", OP48(0xeb000000000fLL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 2, 2}, -+ { "sllg", OP48(0xeb000000000dLL), MASK_RSY_RRRD, INSTR_RSY_RRRD, 2, 3}, -+ { "sllg", OP48(0xeb000000000dLL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 2, 2}, -+ { "srlg", OP48(0xeb000000000cLL), MASK_RSY_RRRD, INSTR_RSY_RRRD, 2, 3}, -+ { "srlg", OP48(0xeb000000000cLL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 2, 2}, -+ { "slag", OP48(0xeb000000000bLL), MASK_RSY_RRRD, INSTR_RSY_RRRD, 2, 3}, -+ { "slag", OP48(0xeb000000000bLL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 2, 2}, -+ { "srag", OP48(0xeb000000000aLL), MASK_RSY_RRRD, INSTR_RSY_RRRD, 2, 3}, -+ { "srag", OP48(0xeb000000000aLL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 2, 2}, -+ { "lmg", OP48(0xeb0000000004LL), MASK_RSY_RRRD, INSTR_RSY_RRRD, 2, 3}, -+ { "lmg", OP48(0xeb0000000004LL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 2, 2}, -+ { "unpka", OP8(0xeaLL), MASK_SS_L0RDRD, INSTR_SS_L0RDRD, 3, 0}, -+ { "pka", OP8(0xe9LL), MASK_SS_L2RDRD, INSTR_SS_L2RDRD, 3, 0}, -+ { "mvcin", OP8(0xe8LL), MASK_SS_L0RDRD, INSTR_SS_L0RDRD, 3, 0}, -+ { "mvcdk", OP16(0xe50fLL), MASK_SSE_RDRD, INSTR_SSE_RDRD, 3, 0}, -+ { "mvcsk", OP16(0xe50eLL), MASK_SSE_RDRD, INSTR_SSE_RDRD, 3, 0}, -+ { "tprot", OP16(0xe501LL), MASK_SSE_RDRD, INSTR_SSE_RDRD, 3, 0}, -+ { "strag", OP48(0xe50000000002LL), MASK_SSE_RDRD, INSTR_SSE_RDRD, 2, 2}, -+ { "lasp", OP16(0xe500LL), MASK_SSE_RDRD, INSTR_SSE_RDRD, 3, 0}, -+ { "slb", OP48(0xe30000000099LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 3, 3}, -+ { "slb", OP48(0xe30000000099LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 3, 2}, -+ { "alc", OP48(0xe30000000098LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 3, 3}, -+ { "alc", OP48(0xe30000000098LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 3, 2}, -+ { "dl", OP48(0xe30000000097LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 3, 3}, -+ { "dl", OP48(0xe30000000097LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 3, 2}, -+ { "ml", OP48(0xe30000000096LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 3, 3}, -+ { "ml", OP48(0xe30000000096LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 3, 2}, -+ { "llh", OP48(0xe30000000095LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 4}, -+ { "llc", OP48(0xe30000000094LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 4}, -+ { "llgh", OP48(0xe30000000091LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "llgh", OP48(0xe30000000091LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "llgc", OP48(0xe30000000090LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "llgc", OP48(0xe30000000090LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "lpq", OP48(0xe3000000008fLL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "lpq", OP48(0xe3000000008fLL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "stpq", OP48(0xe3000000008eLL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "stpq", OP48(0xe3000000008eLL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "slbg", OP48(0xe30000000089LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "slbg", OP48(0xe30000000089LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "alcg", OP48(0xe30000000088LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "alcg", OP48(0xe30000000088LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "dlg", OP48(0xe30000000087LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "dlg", OP48(0xe30000000087LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "mlg", OP48(0xe30000000086LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "mlg", OP48(0xe30000000086LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "xg", OP48(0xe30000000082LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "xg", OP48(0xe30000000082LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "og", OP48(0xe30000000081LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "og", OP48(0xe30000000081LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "ng", OP48(0xe30000000080LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "ng", OP48(0xe30000000080LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "shy", OP48(0xe3000000007bLL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "ahy", OP48(0xe3000000007aLL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "chy", OP48(0xe30000000079LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "lhy", OP48(0xe30000000078LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "lgb", OP48(0xe30000000077LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "lb", OP48(0xe30000000076LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "icy", OP48(0xe30000000073LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "stcy", OP48(0xe30000000072LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "lay", OP48(0xe30000000071LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "sthy", OP48(0xe30000000070LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "sly", OP48(0xe3000000005fLL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "aly", OP48(0xe3000000005eLL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "sy", OP48(0xe3000000005bLL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "ay", OP48(0xe3000000005aLL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "cy", OP48(0xe30000000059LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "ly", OP48(0xe30000000058LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "xy", OP48(0xe30000000057LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "oy", OP48(0xe30000000056LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "cly", OP48(0xe30000000055LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "ny", OP48(0xe30000000054LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "msy", OP48(0xe30000000051LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "sty", OP48(0xe30000000050LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "bctg", OP48(0xe30000000046LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "bctg", OP48(0xe30000000046LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "strvh", OP48(0xe3000000003fLL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "strvh", OP48(0xe3000000003fLL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 3, 2}, -+ { "strv", OP48(0xe3000000003eLL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 3, 3}, -+ { "strv", OP48(0xe3000000003eLL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 3, 2}, -+ { "clgf", OP48(0xe30000000031LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "clgf", OP48(0xe30000000031LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "cgf", OP48(0xe30000000030LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "cgf", OP48(0xe30000000030LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "strvg", OP48(0xe3000000002fLL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "strvg", OP48(0xe3000000002fLL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "cvdg", OP48(0xe3000000002eLL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "cvdg", OP48(0xe3000000002eLL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "cvdy", OP48(0xe30000000026LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "stg", OP48(0xe30000000024LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "stg", OP48(0xe30000000024LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "clg", OP48(0xe30000000021LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "clg", OP48(0xe30000000021LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "cg", OP48(0xe30000000020LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "cg", OP48(0xe30000000020LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "lrvh", OP48(0xe3000000001fLL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 3, 3}, -+ { "lrvh", OP48(0xe3000000001fLL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 3, 2}, -+ { "lrv", OP48(0xe3000000001eLL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 3, 3}, -+ { "lrv", OP48(0xe3000000001eLL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 3, 2}, -+ { "dsgf", OP48(0xe3000000001dLL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "dsgf", OP48(0xe3000000001dLL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "msgf", OP48(0xe3000000001cLL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "msgf", OP48(0xe3000000001cLL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "slgf", OP48(0xe3000000001bLL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "slgf", OP48(0xe3000000001bLL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "algf", OP48(0xe3000000001aLL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "algf", OP48(0xe3000000001aLL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "sgf", OP48(0xe30000000019LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "sgf", OP48(0xe30000000019LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "agf", OP48(0xe30000000018LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "agf", OP48(0xe30000000018LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "llgt", OP48(0xe30000000017LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "llgt", OP48(0xe30000000017LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "llgf", OP48(0xe30000000016LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "llgf", OP48(0xe30000000016LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "lgh", OP48(0xe30000000015LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "lgh", OP48(0xe30000000015LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "lgf", OP48(0xe30000000014LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "lgf", OP48(0xe30000000014LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "lray", OP48(0xe30000000013LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "lt", OP48(0xe30000000012LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 4}, -+ { "lrvg", OP48(0xe3000000000fLL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "lrvg", OP48(0xe3000000000fLL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "cvbg", OP48(0xe3000000000eLL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "cvbg", OP48(0xe3000000000eLL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "dsg", OP48(0xe3000000000dLL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "dsg", OP48(0xe3000000000dLL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "msg", OP48(0xe3000000000cLL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "msg", OP48(0xe3000000000cLL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "slg", OP48(0xe3000000000bLL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "slg", OP48(0xe3000000000bLL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "alg", OP48(0xe3000000000aLL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "alg", OP48(0xe3000000000aLL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "sg", OP48(0xe30000000009LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "sg", OP48(0xe30000000009LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "ag", OP48(0xe30000000008LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "ag", OP48(0xe30000000008LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "cvby", OP48(0xe30000000006LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "lg", OP48(0xe30000000004LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "lg", OP48(0xe30000000004LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "lrag", OP48(0xe30000000003LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 3}, -+ { "lrag", OP48(0xe30000000003LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 2, 2}, -+ { "ltg", OP48(0xe30000000002LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 2, 4}, -+ { "unpku", OP8(0xe2LL), MASK_SS_L0RDRD, INSTR_SS_L0RDRD, 3, 0}, -+ { "pku", OP8(0xe1LL), MASK_SS_L0RDRD, INSTR_SS_L0RDRD, 3, 0}, -+ { "edmk", OP8(0xdfLL), MASK_SS_L0RDRD, INSTR_SS_L0RDRD, 3, 0}, -+ { "ed", OP8(0xdeLL), MASK_SS_L0RDRD, INSTR_SS_L0RDRD, 3, 0}, -+ { "trt", OP8(0xddLL), MASK_SS_L0RDRD, INSTR_SS_L0RDRD, 3, 0}, -+ { "tr", OP8(0xdcLL), MASK_SS_L0RDRD, INSTR_SS_L0RDRD, 3, 0}, -+ { "mvcs", OP8(0xdbLL), MASK_SS_RRRDRD, INSTR_SS_RRRDRD, 3, 0}, -+ { "mvcp", OP8(0xdaLL), MASK_SS_RRRDRD, INSTR_SS_RRRDRD, 3, 0}, -+ { "mvck", OP8(0xd9LL), MASK_SS_RRRDRD, INSTR_SS_RRRDRD, 3, 0}, -+ { "xc", OP8(0xd7LL), MASK_SS_L0RDRD, INSTR_SS_L0RDRD, 3, 0}, -+ { "oc", OP8(0xd6LL), MASK_SS_L0RDRD, INSTR_SS_L0RDRD, 3, 0}, -+ { "clc", OP8(0xd5LL), MASK_SS_L0RDRD, INSTR_SS_L0RDRD, 3, 0}, -+ { "nc", OP8(0xd4LL), MASK_SS_L0RDRD, INSTR_SS_L0RDRD, 3, 0}, -+ { "mvz", OP8(0xd3LL), MASK_SS_L0RDRD, INSTR_SS_L0RDRD, 3, 0}, -+ { "mvc", OP8(0xd2LL), MASK_SS_L0RDRD, INSTR_SS_L0RDRD, 3, 0}, -+ { "mvn", OP8(0xd1LL), MASK_SS_L0RDRD, INSTR_SS_L0RDRD, 3, 0}, -+ { "csst", OP16(0xc802LL), MASK_SSF_RRDRD, INSTR_SSF_RRDRD, 2, 5}, -+ { "ectg", OP16(0xc801LL), MASK_SSF_RRDRD, INSTR_SSF_RRDRD, 2, 5}, -+ { "mvcos", OP16(0xc800LL), MASK_SSF_RRDRD, INSTR_SSF_RRDRD, 2, 4}, -+ { "clfi", OP16(0xc20fLL), MASK_RIL_RU, INSTR_RIL_RU, 2, 4}, -+ { "clgfi", OP16(0xc20eLL), MASK_RIL_RU, INSTR_RIL_RU, 2, 4}, -+ { "cfi", OP16(0xc20dLL), MASK_RIL_RI, INSTR_RIL_RI, 2, 4}, -+ { "cgfi", OP16(0xc20cLL), MASK_RIL_RI, INSTR_RIL_RI, 2, 4}, -+ { "alfi", OP16(0xc20bLL), MASK_RIL_RU, INSTR_RIL_RU, 2, 4}, -+ { "algfi", OP16(0xc20aLL), MASK_RIL_RU, INSTR_RIL_RU, 2, 4}, -+ { "afi", OP16(0xc209LL), MASK_RIL_RI, INSTR_RIL_RI, 2, 4}, -+ { "agfi", OP16(0xc208LL), MASK_RIL_RI, INSTR_RIL_RI, 2, 4}, -+ { "slfi", OP16(0xc205LL), MASK_RIL_RU, INSTR_RIL_RU, 2, 4}, -+ { "slgfi", OP16(0xc204LL), MASK_RIL_RU, INSTR_RIL_RU, 2, 4}, -+ { "jg", OP16(0xc0f4LL), MASK_RIL_0P, INSTR_RIL_0P, 3, 2}, -+ { "jgno", OP16(0xc0e4LL), MASK_RIL_0P, INSTR_RIL_0P, 3, 2}, -+ { "jgnh", OP16(0xc0d4LL), MASK_RIL_0P, INSTR_RIL_0P, 3, 2}, -+ { "jgnp", OP16(0xc0d4LL), MASK_RIL_0P, INSTR_RIL_0P, 3, 2}, -+ { "jgle", OP16(0xc0c4LL), MASK_RIL_0P, INSTR_RIL_0P, 3, 2}, -+ { "jgnl", OP16(0xc0b4LL), MASK_RIL_0P, INSTR_RIL_0P, 3, 2}, -+ { "jgnm", OP16(0xc0b4LL), MASK_RIL_0P, INSTR_RIL_0P, 3, 2}, -+ { "jghe", OP16(0xc0a4LL), MASK_RIL_0P, INSTR_RIL_0P, 3, 2}, -+ { "jgnlh", OP16(0xc094LL), MASK_RIL_0P, INSTR_RIL_0P, 3, 2}, -+ { "jge", OP16(0xc084LL), MASK_RIL_0P, INSTR_RIL_0P, 3, 2}, -+ { "jgz", OP16(0xc084LL), MASK_RIL_0P, INSTR_RIL_0P, 3, 2}, -+ { "jgne", OP16(0xc074LL), MASK_RIL_0P, INSTR_RIL_0P, 3, 2}, -+ { "jgnz", OP16(0xc074LL), MASK_RIL_0P, INSTR_RIL_0P, 3, 2}, -+ { "jglh", OP16(0xc064LL), MASK_RIL_0P, INSTR_RIL_0P, 3, 2}, -+ { "jgnhe", OP16(0xc054LL), MASK_RIL_0P, INSTR_RIL_0P, 3, 2}, -+ { "jgl", OP16(0xc044LL), MASK_RIL_0P, INSTR_RIL_0P, 3, 2}, -+ { "jgm", OP16(0xc044LL), MASK_RIL_0P, INSTR_RIL_0P, 3, 2}, -+ { "jgnle", OP16(0xc034LL), MASK_RIL_0P, INSTR_RIL_0P, 3, 2}, -+ { "jgh", OP16(0xc024LL), MASK_RIL_0P, INSTR_RIL_0P, 3, 2}, -+ { "jgp", OP16(0xc024LL), MASK_RIL_0P, INSTR_RIL_0P, 3, 2}, -+ { "jgo", OP16(0xc014LL), MASK_RIL_0P, INSTR_RIL_0P, 3, 2}, -+ { "llilf", OP16(0xc00fLL), MASK_RIL_RU, INSTR_RIL_RU, 2, 4}, -+ { "llihf", OP16(0xc00eLL), MASK_RIL_RU, INSTR_RIL_RU, 2, 4}, -+ { "oilf", OP16(0xc00dLL), MASK_RIL_RU, INSTR_RIL_RU, 2, 4}, -+ { "oihf", OP16(0xc00cLL), MASK_RIL_RU, INSTR_RIL_RU, 2, 4}, -+ { "nilf", OP16(0xc00bLL), MASK_RIL_RU, INSTR_RIL_RU, 2, 4}, -+ { "nihf", OP16(0xc00aLL), MASK_RIL_RU, INSTR_RIL_RU, 2, 4}, -+ { "iilf", OP16(0xc009LL), MASK_RIL_RU, INSTR_RIL_RU, 2, 4}, -+ { "iihf", OP16(0xc008LL), MASK_RIL_RU, INSTR_RIL_RU, 2, 4}, -+ { "xilf", OP16(0xc007LL), MASK_RIL_RU, INSTR_RIL_RU, 2, 4}, -+ { "xihf", OP16(0xc006LL), MASK_RIL_RU, INSTR_RIL_RU, 2, 4}, -+ { "brasl", OP16(0xc005LL), MASK_RIL_RP, INSTR_RIL_RP, 3, 2}, -+ { "brcl", OP16(0xc004LL), MASK_RIL_UP, INSTR_RIL_UP, 3, 2}, -+ { "lgfi", OP16(0xc001LL), MASK_RIL_RI, INSTR_RIL_RI, 2, 4}, -+ { "larl", OP16(0xc000LL), MASK_RIL_RP, INSTR_RIL_RP, 3, 2}, -+ { "icm", OP8(0xbfLL), MASK_RS_RURD, INSTR_RS_RURD, 3, 0}, -+ { "stcm", OP8(0xbeLL), MASK_RS_RURD, INSTR_RS_RURD, 3, 0}, -+ { "clm", OP8(0xbdLL), MASK_RS_RURD, INSTR_RS_RURD, 3, 0}, -+ { "cds", OP8(0xbbLL), MASK_RS_RRRD, INSTR_RS_RRRD, 3, 0}, -+ { "cs", OP8(0xbaLL), MASK_RS_RRRD, INSTR_RS_RRRD, 3, 0}, -+ { "cu42", OP16(0xb9b3LL), MASK_RRF_M0RR, INSTR_RRF_M0RR, 2, 4}, -+ { "cu41", OP16(0xb9b2LL), MASK_RRF_M0RR, INSTR_RRF_M0RR, 2, 4}, -+ { "cu24", OP16(0xb9b1LL), MASK_RRF_M0RR, INSTR_RRF_M0RR, 2, 4}, -+ { "cu14", OP16(0xb9b0LL), MASK_RRF_M0RR, INSTR_RRF_M0RR, 2, 4}, -+ { "lptea", OP16(0xb9aaLL), MASK_RRF_RURR, INSTR_RRF_RURR, 2, 4}, -+ { "esea", OP16(0xb99dLL), MASK_RRE_R0, INSTR_RRE_R0, 2, 2}, -+ { "slbr", OP16(0xb999LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 2}, -+ { "alcr", OP16(0xb998LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 2}, -+ { "dlr", OP16(0xb997LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 2}, -+ { "mlr", OP16(0xb996LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 2}, -+ { "llhr", OP16(0xb995LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 4}, -+ { "llcr", OP16(0xb994LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 4}, -+ { "troo", OP16(0xb993LL), MASK_RRF_M0RR, INSTR_RRF_M0RR, 3, 4}, -+ { "troo", OP16(0xb993LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "trot", OP16(0xb992LL), MASK_RRF_M0RR, INSTR_RRF_M0RR, 3, 4}, -+ { "trot", OP16(0xb992LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "trto", OP16(0xb991LL), MASK_RRF_M0RR, INSTR_RRF_M0RR, 3, 4}, -+ { "trto", OP16(0xb991LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "trtt", OP16(0xb990LL), MASK_RRF_M0RR, INSTR_RRF_M0RR, 3, 4}, -+ { "trtt", OP16(0xb990LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "idte", OP16(0xb98eLL), MASK_RRF_R0RR, INSTR_RRF_R0RR, 2, 3}, -+ { "epsw", OP16(0xb98dLL), MASK_RRE_RR, INSTR_RRE_RR, 3, 2}, -+ { "cspg", OP16(0xb98aLL), MASK_RRE_RR, INSTR_RRE_RR, 2, 3}, -+ { "slbgr", OP16(0xb989LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "alcgr", OP16(0xb988LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "dlgr", OP16(0xb987LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "mlgr", OP16(0xb986LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "llghr", OP16(0xb985LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 4}, -+ { "llgcr", OP16(0xb984LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 4}, -+ { "flogr", OP16(0xb983LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 4}, -+ { "xgr", OP16(0xb982LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "ogr", OP16(0xb981LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "ngr", OP16(0xb980LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "bctgr", OP16(0xb946LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "klmd", OP16(0xb93fLL), MASK_RRE_RR, INSTR_RRE_RR, 3, 3}, -+ { "kimd", OP16(0xb93eLL), MASK_RRE_RR, INSTR_RRE_RR, 3, 3}, -+ { "clgfr", OP16(0xb931LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "cgfr", OP16(0xb930LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "kmc", OP16(0xb92fLL), MASK_RRE_RR, INSTR_RRE_RR, 3, 3}, -+ { "km", OP16(0xb92eLL), MASK_RRE_RR, INSTR_RRE_RR, 3, 3}, -+ { "lhr", OP16(0xb927LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 4}, -+ { "lbr", OP16(0xb926LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 4}, -+ { "sturg", OP16(0xb925LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "clgr", OP16(0xb921LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "cgr", OP16(0xb920LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "lrvr", OP16(0xb91fLL), MASK_RRE_RR, INSTR_RRE_RR, 3, 2}, -+ { "kmac", OP16(0xb91eLL), MASK_RRE_RR, INSTR_RRE_RR, 3, 3}, -+ { "dsgfr", OP16(0xb91dLL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "msgfr", OP16(0xb91cLL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "slgfr", OP16(0xb91bLL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "algfr", OP16(0xb91aLL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "sgfr", OP16(0xb919LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "agfr", OP16(0xb918LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "llgtr", OP16(0xb917LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "llgfr", OP16(0xb916LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "lgfr", OP16(0xb914LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "lcgfr", OP16(0xb913LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "ltgfr", OP16(0xb912LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "lngfr", OP16(0xb911LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "lpgfr", OP16(0xb910LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "lrvgr", OP16(0xb90fLL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "eregg", OP16(0xb90eLL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "dsgr", OP16(0xb90dLL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "msgr", OP16(0xb90cLL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "slgr", OP16(0xb90bLL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "algr", OP16(0xb90aLL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "sgr", OP16(0xb909LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "agr", OP16(0xb908LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "lghr", OP16(0xb907LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 4}, -+ { "lgbr", OP16(0xb906LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 4}, -+ { "lurag", OP16(0xb905LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "lgr", OP16(0xb904LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "lcgr", OP16(0xb903LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "ltgr", OP16(0xb902LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "lngr", OP16(0xb901LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "lpgr", OP16(0xb900LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "lctl", OP8(0xb7LL), MASK_RS_CCRD, INSTR_RS_CCRD, 3, 0}, -+ { "stctl", OP8(0xb6LL), MASK_RS_CCRD, INSTR_RS_CCRD, 3, 0}, -+ { "rrxtr", OP16(0xb3ffLL), MASK_RRF_FFFU, INSTR_RRF_FFFU, 2, 5}, -+ { "iextr", OP16(0xb3feLL), MASK_RRF_F0FR, INSTR_RRF_F0FR, 2, 5}, -+ { "qaxtr", OP16(0xb3fdLL), MASK_RRF_FFFU, INSTR_RRF_FFFU, 2, 5}, -+ { "cextr", OP16(0xb3fcLL), MASK_RRE_FF, INSTR_RRE_FF, 2, 5}, -+ { "cxstr", OP16(0xb3fbLL), MASK_RRE_FR, INSTR_RRE_FR, 2, 5}, -+ { "cxutr", OP16(0xb3faLL), MASK_RRE_FR, INSTR_RRE_FR, 2, 5}, -+ { "cxgtr", OP16(0xb3f9LL), MASK_RRE_FR, INSTR_RRE_FR, 2, 5}, -+ { "rrdtr", OP16(0xb3f7LL), MASK_RRF_FFFU, INSTR_RRF_FFFU, 2, 5}, -+ { "iedtr", OP16(0xb3f6LL), MASK_RRF_F0FR, INSTR_RRF_F0FR, 2, 5}, -+ { "qadtr", OP16(0xb3f5LL), MASK_RRF_FFFU, INSTR_RRF_FFFU, 2, 5}, -+ { "cedtr", OP16(0xb3f4LL), MASK_RRE_FF, INSTR_RRE_FF, 2, 5}, -+ { "cdstr", OP16(0xb3f3LL), MASK_RRE_FR, INSTR_RRE_FR, 2, 5}, -+ { "cdutr", OP16(0xb3f2LL), MASK_RRE_FR, INSTR_RRE_FR, 2, 5}, -+ { "cdgtr", OP16(0xb3f1LL), MASK_RRE_FR, INSTR_RRE_FR, 2, 5}, -+ { "esxtr", OP16(0xb3efLL), MASK_RRE_RF, INSTR_RRE_RF, 2, 5}, -+ { "eextr", OP16(0xb3edLL), MASK_RRE_RF, INSTR_RRE_RF, 2, 5}, -+ { "cxtr", OP16(0xb3ecLL), MASK_RRE_FF, INSTR_RRE_FF, 2, 5}, -+ { "csxtr", OP16(0xb3ebLL), MASK_RRE_RF, INSTR_RRE_RF, 2, 5}, -+ { "cuxtr", OP16(0xb3eaLL), MASK_RRE_RF, INSTR_RRE_RF, 2, 5}, -+ { "cgxtr", OP16(0xb3e9LL), MASK_RRF_U0RF, INSTR_RRF_U0RF, 2, 5}, -+ { "kxtr", OP16(0xb3e8LL), MASK_RRE_FF, INSTR_RRE_FF, 2, 5}, -+ { "esdtr", OP16(0xb3e7LL), MASK_RRE_RF, INSTR_RRE_RF, 2, 5}, -+ { "eedtr", OP16(0xb3e5LL), MASK_RRE_RF, INSTR_RRE_RF, 2, 5}, -+ { "cdtr", OP16(0xb3e4LL), MASK_RRE_FF, INSTR_RRE_FF, 2, 5}, -+ { "csdtr", OP16(0xb3e3LL), MASK_RRE_RF, INSTR_RRE_RF, 2, 5}, -+ { "cudtr", OP16(0xb3e2LL), MASK_RRE_RF, INSTR_RRE_RF, 2, 5}, -+ { "cgdtr", OP16(0xb3e1LL), MASK_RRF_U0RF, INSTR_RRF_U0RF, 2, 5}, -+ { "kdtr", OP16(0xb3e0LL), MASK_RRE_FF, INSTR_RRE_FF, 2, 5}, -+ { "fixtr", OP16(0xb3dfLL), MASK_RRF_UUFF, INSTR_RRF_UUFF, 2, 5}, -+ { "ltxtr", OP16(0xb3deLL), MASK_RRE_FF, INSTR_RRE_FF, 2, 5}, -+ { "ldxtr", OP16(0xb3ddLL), MASK_RRF_UUFF, INSTR_RRF_UUFF, 2, 5}, -+ { "lxdtr", OP16(0xb3dcLL), MASK_RRF_0UFF, INSTR_RRF_0UFF, 2, 5}, -+ { "sxtr", OP16(0xb3dbLL), MASK_RRR_F0FF, INSTR_RRR_F0FF, 2, 5}, -+ { "axtr", OP16(0xb3daLL), MASK_RRR_F0FF, INSTR_RRR_F0FF, 2, 5}, -+ { "dxtr", OP16(0xb3d9LL), MASK_RRR_F0FF, INSTR_RRR_F0FF, 2, 5}, -+ { "mxtr", OP16(0xb3d8LL), MASK_RRR_F0FF, INSTR_RRR_F0FF, 2, 5}, -+ { "fidtr", OP16(0xb3d7LL), MASK_RRF_UUFF, INSTR_RRF_UUFF, 2, 5}, -+ { "ltdtr", OP16(0xb3d6LL), MASK_RRE_FF, INSTR_RRE_FF, 2, 5}, -+ { "ledtr", OP16(0xb3d5LL), MASK_RRF_UUFF, INSTR_RRF_UUFF, 2, 5}, -+ { "ldetr", OP16(0xb3d4LL), MASK_RRF_0UFF, INSTR_RRF_0UFF, 2, 5}, -+ { "sdtr", OP16(0xb3d3LL), MASK_RRR_F0FF, INSTR_RRR_F0FF, 2, 5}, -+ { "adtr", OP16(0xb3d2LL), MASK_RRR_F0FF, INSTR_RRR_F0FF, 2, 5}, -+ { "ddtr", OP16(0xb3d1LL), MASK_RRR_F0FF, INSTR_RRR_F0FF, 2, 5}, -+ { "mdtr", OP16(0xb3d0LL), MASK_RRR_F0FF, INSTR_RRR_F0FF, 2, 5}, -+ { "lgdr", OP16(0xb3cdLL), MASK_RRE_RF, INSTR_RRE_RF, 2, 5}, -+ { "cgxr", OP16(0xb3caLL), MASK_RRF_U0RF, INSTR_RRF_U0RF, 2, 2}, -+ { "cgdr", OP16(0xb3c9LL), MASK_RRF_U0RF, INSTR_RRF_U0RF, 2, 2}, -+ { "cger", OP16(0xb3c8LL), MASK_RRF_U0RF, INSTR_RRF_U0RF, 2, 2}, -+ { "cxgr", OP16(0xb3c6LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "cdgr", OP16(0xb3c5LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "cegr", OP16(0xb3c4LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "ldgr", OP16(0xb3c1LL), MASK_RRE_FR, INSTR_RRE_FR, 2, 5}, -+ { "cfxr", OP16(0xb3baLL), MASK_RRF_U0RF, INSTR_RRF_U0RF, 2, 2}, -+ { "cfdr", OP16(0xb3b9LL), MASK_RRF_U0RF, INSTR_RRF_U0RF, 2, 2}, -+ { "cfer", OP16(0xb3b8LL), MASK_RRF_U0RF, INSTR_RRF_U0RF, 2, 2}, -+ { "cxfr", OP16(0xb3b6LL), MASK_RRE_RF, INSTR_RRE_RF, 3, 0}, -+ { "cdfr", OP16(0xb3b5LL), MASK_RRE_RF, INSTR_RRE_RF, 3, 0}, -+ { "cefr", OP16(0xb3b4LL), MASK_RRE_RF, INSTR_RRE_RF, 3, 0}, -+ { "cgxbr", OP16(0xb3aaLL), MASK_RRF_U0RF, INSTR_RRF_U0RF, 2, 2}, -+ { "cgdbr", OP16(0xb3a9LL), MASK_RRF_U0RF, INSTR_RRF_U0RF, 2, 2}, -+ { "cgebr", OP16(0xb3a8LL), MASK_RRF_U0RF, INSTR_RRF_U0RF, 2, 2}, -+ { "cxgbr", OP16(0xb3a6LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "cdgbr", OP16(0xb3a5LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "cegbr", OP16(0xb3a4LL), MASK_RRE_RR, INSTR_RRE_RR, 2, 2}, -+ { "cfxbr", OP16(0xb39aLL), MASK_RRF_U0RF, INSTR_RRF_U0RF, 3, 0}, -+ { "cfdbr", OP16(0xb399LL), MASK_RRF_U0RF, INSTR_RRF_U0RF, 3, 0}, -+ { "cfebr", OP16(0xb398LL), MASK_RRF_U0RF, INSTR_RRF_U0RF, 3, 0}, -+ { "cxfbr", OP16(0xb396LL), MASK_RRE_RF, INSTR_RRE_RF, 3, 0}, -+ { "cdfbr", OP16(0xb395LL), MASK_RRE_RF, INSTR_RRE_RF, 3, 0}, -+ { "cefbr", OP16(0xb394LL), MASK_RRE_RF, INSTR_RRE_RF, 3, 0}, -+ { "efpc", OP16(0xb38cLL), MASK_RRE_RR_OPT, INSTR_RRE_RR_OPT, 3, 0}, -+ { "sfasr", OP16(0xb385LL), MASK_RRE_R0, INSTR_RRE_R0, 2, 5}, -+ { "sfpc", OP16(0xb384LL), MASK_RRE_RR_OPT, INSTR_RRE_RR_OPT, 3, 0}, -+ { "fidr", OP16(0xb37fLL), MASK_RRF_U0FF, INSTR_RRF_U0FF, 3, 0}, -+ { "fier", OP16(0xb377LL), MASK_RRF_U0FF, INSTR_RRF_U0FF, 3, 0}, -+ { "lzxr", OP16(0xb376LL), MASK_RRE_R0, INSTR_RRE_R0, 3, 0}, -+ { "lzdr", OP16(0xb375LL), MASK_RRE_R0, INSTR_RRE_R0, 3, 0}, -+ { "lzer", OP16(0xb374LL), MASK_RRE_R0, INSTR_RRE_R0, 3, 0}, -+ { "lcdfr", OP16(0xb373LL), MASK_RRE_FF, INSTR_RRE_FF, 2, 5}, -+ { "cpsdr", OP16(0xb372LL), MASK_RRF_F0FF2, INSTR_RRF_F0FF2, 2, 5}, -+ { "lndfr", OP16(0xb371LL), MASK_RRE_FF, INSTR_RRE_FF, 2, 5}, -+ { "lpdfr", OP16(0xb370LL), MASK_RRE_FF, INSTR_RRE_FF, 2, 5}, -+ { "cxr", OP16(0xb369LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "fixr", OP16(0xb367LL), MASK_RRF_U0FF, INSTR_RRF_U0FF, 3, 0}, -+ { "lexr", OP16(0xb366LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "lxr", OP16(0xb365LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "lcxr", OP16(0xb363LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "ltxr", OP16(0xb362LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "lnxr", OP16(0xb361LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "lpxr", OP16(0xb360LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "fidbr", OP16(0xb35fLL), MASK_RRF_U0FF, INSTR_RRF_U0FF, 3, 0}, -+ { "didbr", OP16(0xb35bLL), MASK_RRF_FUFF, INSTR_RRF_FUFF, 3, 0}, -+ { "thdr", OP16(0xb359LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "thder", OP16(0xb358LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "fiebr", OP16(0xb357LL), MASK_RRF_U0FF, INSTR_RRF_U0FF, 3, 0}, -+ { "diebr", OP16(0xb353LL), MASK_RRF_FUFF, INSTR_RRF_FUFF, 3, 0}, -+ { "tbdr", OP16(0xb351LL), MASK_RRF_U0FF, INSTR_RRF_U0FF, 3, 0}, -+ { "tbedr", OP16(0xb350LL), MASK_RRF_U0FF, INSTR_RRF_U0FF, 3, 0}, -+ { "dxbr", OP16(0xb34dLL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "mxbr", OP16(0xb34cLL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "sxbr", OP16(0xb34bLL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "axbr", OP16(0xb34aLL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "cxbr", OP16(0xb349LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "kxbr", OP16(0xb348LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "fixbr", OP16(0xb347LL), MASK_RRF_U0FF, INSTR_RRF_U0FF, 3, 0}, -+ { "lexbr", OP16(0xb346LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "ldxbr", OP16(0xb345LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "ledbr", OP16(0xb344LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "lcxbr", OP16(0xb343LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "ltxbr", OP16(0xb342LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "lnxbr", OP16(0xb341LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "lpxbr", OP16(0xb340LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "msdr", OP16(0xb33fLL), MASK_RRF_F0FF, INSTR_RRF_F0FF, 3, 3}, -+ { "madr", OP16(0xb33eLL), MASK_RRF_F0FF, INSTR_RRF_F0FF, 3, 3}, -+ { "myhr", OP16(0xb33dLL), MASK_RRF_F0FF, INSTR_RRF_F0FF, 2, 4}, -+ { "mayhr", OP16(0xb33cLL), MASK_RRF_F0FF, INSTR_RRF_F0FF, 2, 4}, -+ { "myr", OP16(0xb33bLL), MASK_RRF_F0FF, INSTR_RRF_F0FF, 2, 4}, -+ { "mayr", OP16(0xb33aLL), MASK_RRF_F0FF, INSTR_RRF_F0FF, 2, 4}, -+ { "mylr", OP16(0xb339LL), MASK_RRF_F0FF, INSTR_RRF_F0FF, 2, 4}, -+ { "maylr", OP16(0xb338LL), MASK_RRF_F0FF, INSTR_RRF_F0FF, 2, 4}, -+ { "meer", OP16(0xb337LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "sqxr", OP16(0xb336LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "mser", OP16(0xb32fLL), MASK_RRF_F0FF, INSTR_RRF_F0FF, 3, 3}, -+ { "maer", OP16(0xb32eLL), MASK_RRF_F0FF, INSTR_RRF_F0FF, 3, 3}, -+ { "lxer", OP16(0xb326LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "lxdr", OP16(0xb325LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "lder", OP16(0xb324LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "msdbr", OP16(0xb31fLL), MASK_RRF_F0FF, INSTR_RRF_F0FF, 3, 0}, -+ { "madbr", OP16(0xb31eLL), MASK_RRF_F0FF, INSTR_RRF_F0FF, 3, 0}, -+ { "ddbr", OP16(0xb31dLL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "mdbr", OP16(0xb31cLL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "sdbr", OP16(0xb31bLL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "adbr", OP16(0xb31aLL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "cdbr", OP16(0xb319LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "kdbr", OP16(0xb318LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "meebr", OP16(0xb317LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "sqxbr", OP16(0xb316LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "sqdbr", OP16(0xb315LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "sqebr", OP16(0xb314LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "lcdbr", OP16(0xb313LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "ltdbr", OP16(0xb312LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "lndbr", OP16(0xb311LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "lpdbr", OP16(0xb310LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "msebr", OP16(0xb30fLL), MASK_RRF_F0FF, INSTR_RRF_F0FF, 3, 0}, -+ { "maebr", OP16(0xb30eLL), MASK_RRF_F0FF, INSTR_RRF_F0FF, 3, 0}, -+ { "debr", OP16(0xb30dLL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "mdebr", OP16(0xb30cLL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "sebr", OP16(0xb30bLL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "aebr", OP16(0xb30aLL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "cebr", OP16(0xb309LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "kebr", OP16(0xb308LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "mxdbr", OP16(0xb307LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "lxebr", OP16(0xb306LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "lxdbr", OP16(0xb305LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "ldebr", OP16(0xb304LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "lcebr", OP16(0xb303LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "ltebr", OP16(0xb302LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "lnebr", OP16(0xb301LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "lpebr", OP16(0xb300LL), MASK_RRE_FF, INSTR_RRE_FF, 3, 0}, -+ { "trap4", OP16(0xb2ffLL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "lfas", OP16(0xb2bdLL), MASK_S_RD, INSTR_S_RD, 2, 5}, -+ { "srnmt", OP16(0xb2b9LL), MASK_S_RD, INSTR_S_RD, 2, 5}, -+ { "lpswe", OP16(0xb2b2LL), MASK_S_RD, INSTR_S_RD, 2, 2}, -+ { "stfl", OP16(0xb2b1LL), MASK_S_RD, INSTR_S_RD, 3, 2}, -+ { "stfle", OP16(0xb2b0LL), MASK_S_RD, INSTR_S_RD, 2, 4}, -+ { "cu12", OP16(0xb2a7LL), MASK_RRF_M0RR, INSTR_RRF_M0RR, 2, 4}, -+ { "cutfu", OP16(0xb2a7LL), MASK_RRF_M0RR, INSTR_RRF_M0RR, 2, 4}, -+ { "cutfu", OP16(0xb2a7LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "cu21", OP16(0xb2a6LL), MASK_RRF_M0RR, INSTR_RRF_M0RR, 2, 4}, -+ { "cuutf", OP16(0xb2a6LL), MASK_RRF_M0RR, INSTR_RRF_M0RR, 2, 4}, -+ { "cuutf", OP16(0xb2a6LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "tre", OP16(0xb2a5LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "lfpc", OP16(0xb29dLL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "stfpc", OP16(0xb29cLL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "srnm", OP16(0xb299LL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "stsi", OP16(0xb27dLL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "stckf", OP16(0xb27cLL), MASK_S_RD, INSTR_S_RD, 2, 4}, -+ { "sacf", OP16(0xb279LL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "stcke", OP16(0xb278LL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "rp", OP16(0xb277LL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "xsch", OP16(0xb276LL), MASK_S_00, INSTR_S_00, 3, 0}, -+ { "siga", OP16(0xb274LL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "cmpsc", OP16(0xb263LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "cmpsc", OP16(0xb263LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "srst", OP16(0xb25eLL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "clst", OP16(0xb25dLL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "bsa", OP16(0xb25aLL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "bsg", OP16(0xb258LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "cuse", OP16(0xb257LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "mvst", OP16(0xb255LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "mvpg", OP16(0xb254LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "msr", OP16(0xb252LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "csp", OP16(0xb250LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "ear", OP16(0xb24fLL), MASK_RRE_RA, INSTR_RRE_RA, 3, 0}, -+ { "sar", OP16(0xb24eLL), MASK_RRE_AR, INSTR_RRE_AR, 3, 0}, -+ { "cpya", OP16(0xb24dLL), MASK_RRE_AA, INSTR_RRE_AA, 3, 0}, -+ { "tar", OP16(0xb24cLL), MASK_RRE_AR, INSTR_RRE_AR, 3, 0}, -+ { "lura", OP16(0xb24bLL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "esta", OP16(0xb24aLL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "ereg", OP16(0xb249LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "palb", OP16(0xb248LL), MASK_RRE_00, INSTR_RRE_00, 3, 0}, -+ { "msta", OP16(0xb247LL), MASK_RRE_R0, INSTR_RRE_R0, 3, 0}, -+ { "stura", OP16(0xb246LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "sqer", OP16(0xb245LL), MASK_RRE_F0, INSTR_RRE_F0, 3, 0}, -+ { "sqdr", OP16(0xb244LL), MASK_RRE_F0, INSTR_RRE_F0, 3, 0}, -+ { "cksm", OP16(0xb241LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "bakr", OP16(0xb240LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "schm", OP16(0xb23cLL), MASK_S_00, INSTR_S_00, 3, 0}, -+ { "rchp", OP16(0xb23bLL), MASK_S_00, INSTR_S_00, 3, 0}, -+ { "stcps", OP16(0xb23aLL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "stcrw", OP16(0xb239LL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "rsch", OP16(0xb238LL), MASK_S_00, INSTR_S_00, 3, 0}, -+ { "sal", OP16(0xb237LL), MASK_S_00, INSTR_S_00, 3, 0}, -+ { "tpi", OP16(0xb236LL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "tsch", OP16(0xb235LL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "stsch", OP16(0xb234LL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "ssch", OP16(0xb233LL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "msch", OP16(0xb232LL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "hsch", OP16(0xb231LL), MASK_S_00, INSTR_S_00, 3, 0}, -+ { "csch", OP16(0xb230LL), MASK_S_00, INSTR_S_00, 3, 0}, -+ { "pgout", OP16(0xb22fLL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "pgin", OP16(0xb22eLL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "dxr", OP16(0xb22dLL), MASK_RRE_F0, INSTR_RRE_F0, 3, 0}, -+ { "tb", OP16(0xb22cLL), MASK_RRE_0R, INSTR_RRE_0R, 3, 0}, -+ { "sske", OP16(0xb22bLL), MASK_RRF_M0RR, INSTR_RRF_M0RR, 2, 4}, -+ { "sske", OP16(0xb22bLL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "rrbe", OP16(0xb22aLL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "iske", OP16(0xb229LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "pt", OP16(0xb228LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "esar", OP16(0xb227LL), MASK_RRE_R0, INSTR_RRE_R0, 3, 0}, -+ { "epar", OP16(0xb226LL), MASK_RRE_R0, INSTR_RRE_R0, 3, 0}, -+ { "ssar", OP16(0xb225LL), MASK_RRE_R0, INSTR_RRE_R0, 3, 0}, -+ { "iac", OP16(0xb224LL), MASK_RRE_R0, INSTR_RRE_R0, 3, 0}, -+ { "ivsk", OP16(0xb223LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "ipm", OP16(0xb222LL), MASK_RRE_R0, INSTR_RRE_R0, 3, 0}, -+ { "ipte", OP16(0xb221LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0}, -+ { "cfc", OP16(0xb21aLL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "sac", OP16(0xb219LL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "pc", OP16(0xb218LL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "sie", OP16(0xb214LL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "stap", OP16(0xb212LL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "stpx", OP16(0xb211LL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "spx", OP16(0xb210LL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "ptlb", OP16(0xb20dLL), MASK_S_00, INSTR_S_00, 3, 0}, -+ { "ipk", OP16(0xb20bLL), MASK_S_00, INSTR_S_00, 3, 0}, -+ { "spka", OP16(0xb20aLL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "stpt", OP16(0xb209LL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "spt", OP16(0xb208LL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "stckc", OP16(0xb207LL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "sckc", OP16(0xb206LL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "stck", OP16(0xb205LL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "sck", OP16(0xb204LL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "stidp", OP16(0xb202LL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "lra", OP8(0xb1LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "mc", OP8(0xafLL), MASK_SI_URD, INSTR_SI_URD, 3, 0}, -+ { "sigp", OP8(0xaeLL), MASK_RS_RRRD, INSTR_RS_RRRD, 3, 0}, -+ { "stosm", OP8(0xadLL), MASK_SI_URD, INSTR_SI_URD, 3, 0}, -+ { "stnsm", OP8(0xacLL), MASK_SI_URD, INSTR_SI_URD, 3, 0}, -+ { "clcle", OP8(0xa9LL), MASK_RS_RRRD, INSTR_RS_RRRD, 3, 0}, -+ { "mvcle", OP8(0xa8LL), MASK_RS_RRRD, INSTR_RS_RRRD, 3, 0}, -+ { "j", OP16(0xa7f4LL), MASK_RI_0P, INSTR_RI_0P, 3, 0}, -+ { "jno", OP16(0xa7e4LL), MASK_RI_0P, INSTR_RI_0P, 3, 0}, -+ { "jnh", OP16(0xa7d4LL), MASK_RI_0P, INSTR_RI_0P, 3, 0}, -+ { "jnp", OP16(0xa7d4LL), MASK_RI_0P, INSTR_RI_0P, 3, 0}, -+ { "jle", OP16(0xa7c4LL), MASK_RI_0P, INSTR_RI_0P, 3, 0}, -+ { "jnl", OP16(0xa7b4LL), MASK_RI_0P, INSTR_RI_0P, 3, 0}, -+ { "jnm", OP16(0xa7b4LL), MASK_RI_0P, INSTR_RI_0P, 3, 0}, -+ { "jhe", OP16(0xa7a4LL), MASK_RI_0P, INSTR_RI_0P, 3, 0}, -+ { "jnlh", OP16(0xa794LL), MASK_RI_0P, INSTR_RI_0P, 3, 0}, -+ { "je", OP16(0xa784LL), MASK_RI_0P, INSTR_RI_0P, 3, 0}, -+ { "jz", OP16(0xa784LL), MASK_RI_0P, INSTR_RI_0P, 3, 0}, -+ { "jne", OP16(0xa774LL), MASK_RI_0P, INSTR_RI_0P, 3, 0}, -+ { "jnz", OP16(0xa774LL), MASK_RI_0P, INSTR_RI_0P, 3, 0}, -+ { "jlh", OP16(0xa764LL), MASK_RI_0P, INSTR_RI_0P, 3, 0}, -+ { "jnhe", OP16(0xa754LL), MASK_RI_0P, INSTR_RI_0P, 3, 0}, -+ { "jl", OP16(0xa744LL), MASK_RI_0P, INSTR_RI_0P, 3, 0}, -+ { "jm", OP16(0xa744LL), MASK_RI_0P, INSTR_RI_0P, 3, 0}, -+ { "jnle", OP16(0xa734LL), MASK_RI_0P, INSTR_RI_0P, 3, 0}, -+ { "jh", OP16(0xa724LL), MASK_RI_0P, INSTR_RI_0P, 3, 0}, -+ { "jp", OP16(0xa724LL), MASK_RI_0P, INSTR_RI_0P, 3, 0}, -+ { "jo", OP16(0xa714LL), MASK_RI_0P, INSTR_RI_0P, 3, 0}, -+ { "cghi", OP16(0xa70fLL), MASK_RI_RI, INSTR_RI_RI, 2, 2}, -+ { "chi", OP16(0xa70eLL), MASK_RI_RI, INSTR_RI_RI, 3, 0}, -+ { "mghi", OP16(0xa70dLL), MASK_RI_RI, INSTR_RI_RI, 2, 2}, -+ { "mhi", OP16(0xa70cLL), MASK_RI_RI, INSTR_RI_RI, 3, 0}, -+ { "aghi", OP16(0xa70bLL), MASK_RI_RI, INSTR_RI_RI, 2, 2}, -+ { "ahi", OP16(0xa70aLL), MASK_RI_RI, INSTR_RI_RI, 3, 0}, -+ { "lghi", OP16(0xa709LL), MASK_RI_RI, INSTR_RI_RI, 2, 2}, -+ { "lhi", OP16(0xa708LL), MASK_RI_RI, INSTR_RI_RI, 3, 0}, -+ { "brctg", OP16(0xa707LL), MASK_RI_RP, INSTR_RI_RP, 2, 2}, -+ { "brct", OP16(0xa706LL), MASK_RI_RP, INSTR_RI_RP, 3, 0}, -+ { "bras", OP16(0xa705LL), MASK_RI_RP, INSTR_RI_RP, 3, 0}, -+ { "brc", OP16(0xa704LL), MASK_RI_UP, INSTR_RI_UP, 3, 0}, -+ { "tmhl", OP16(0xa703LL), MASK_RI_RU, INSTR_RI_RU, 2, 2}, -+ { "tmhh", OP16(0xa702LL), MASK_RI_RU, INSTR_RI_RU, 2, 2}, -+ { "tml", OP16(0xa701LL), MASK_RI_RU, INSTR_RI_RU, 3, 0}, -+ { "tmll", OP16(0xa701LL), MASK_RI_RU, INSTR_RI_RU, 3, 0}, -+ { "tmh", OP16(0xa700LL), MASK_RI_RU, INSTR_RI_RU, 3, 0}, -+ { "tmlh", OP16(0xa700LL), MASK_RI_RU, INSTR_RI_RU, 3, 0}, -+ { "llill", OP16(0xa50fLL), MASK_RI_RU, INSTR_RI_RU, 2, 2}, -+ { "llilh", OP16(0xa50eLL), MASK_RI_RU, INSTR_RI_RU, 2, 2}, -+ { "llihl", OP16(0xa50dLL), MASK_RI_RU, INSTR_RI_RU, 2, 2}, -+ { "llihh", OP16(0xa50cLL), MASK_RI_RU, INSTR_RI_RU, 2, 2}, -+ { "oill", OP16(0xa50bLL), MASK_RI_RU, INSTR_RI_RU, 2, 2}, -+ { "oilh", OP16(0xa50aLL), MASK_RI_RU, INSTR_RI_RU, 2, 2}, -+ { "oihl", OP16(0xa509LL), MASK_RI_RU, INSTR_RI_RU, 2, 2}, -+ { "oihh", OP16(0xa508LL), MASK_RI_RU, INSTR_RI_RU, 2, 2}, -+ { "nill", OP16(0xa507LL), MASK_RI_RU, INSTR_RI_RU, 2, 2}, -+ { "nilh", OP16(0xa506LL), MASK_RI_RU, INSTR_RI_RU, 2, 2}, -+ { "nihl", OP16(0xa505LL), MASK_RI_RU, INSTR_RI_RU, 2, 2}, -+ { "nihh", OP16(0xa504LL), MASK_RI_RU, INSTR_RI_RU, 2, 2}, -+ { "iill", OP16(0xa503LL), MASK_RI_RU, INSTR_RI_RU, 2, 2}, -+ { "iilh", OP16(0xa502LL), MASK_RI_RU, INSTR_RI_RU, 2, 2}, -+ { "iihl", OP16(0xa501LL), MASK_RI_RU, INSTR_RI_RU, 2, 2}, -+ { "iihh", OP16(0xa500LL), MASK_RI_RU, INSTR_RI_RU, 2, 2}, -+ { "stam", OP8(0x9bLL), MASK_RS_AARD, INSTR_RS_AARD, 3, 0}, -+ { "lam", OP8(0x9aLL), MASK_RS_AARD, INSTR_RS_AARD, 3, 0}, -+ { "trace", OP8(0x99LL), MASK_RS_RRRD, INSTR_RS_RRRD, 3, 0}, -+ { "lm", OP8(0x98LL), MASK_RS_RRRD, INSTR_RS_RRRD, 3, 0}, -+ { "xi", OP8(0x97LL), MASK_SI_URD, INSTR_SI_URD, 3, 0}, -+ { "oi", OP8(0x96LL), MASK_SI_URD, INSTR_SI_URD, 3, 0}, -+ { "cli", OP8(0x95LL), MASK_SI_URD, INSTR_SI_URD, 3, 0}, -+ { "ni", OP8(0x94LL), MASK_SI_URD, INSTR_SI_URD, 3, 0}, -+ { "ts", OP8(0x93LL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "mvi", OP8(0x92LL), MASK_SI_URD, INSTR_SI_URD, 3, 0}, -+ { "tm", OP8(0x91LL), MASK_SI_URD, INSTR_SI_URD, 3, 0}, -+ { "stm", OP8(0x90LL), MASK_RS_RRRD, INSTR_RS_RRRD, 3, 0}, -+ { "slda", OP8(0x8fLL), MASK_RS_R0RD, INSTR_RS_R0RD, 3, 0}, -+ { "srda", OP8(0x8eLL), MASK_RS_R0RD, INSTR_RS_R0RD, 3, 0}, -+ { "sldl", OP8(0x8dLL), MASK_RS_R0RD, INSTR_RS_R0RD, 3, 0}, -+ { "srdl", OP8(0x8cLL), MASK_RS_R0RD, INSTR_RS_R0RD, 3, 0}, -+ { "sla", OP8(0x8bLL), MASK_RS_R0RD, INSTR_RS_R0RD, 3, 0}, -+ { "sra", OP8(0x8aLL), MASK_RS_R0RD, INSTR_RS_R0RD, 3, 0}, -+ { "sll", OP8(0x89LL), MASK_RS_R0RD, INSTR_RS_R0RD, 3, 0}, -+ { "srl", OP8(0x88LL), MASK_RS_R0RD, INSTR_RS_R0RD, 3, 0}, -+ { "bxle", OP8(0x87LL), MASK_RS_RRRD, INSTR_RS_RRRD, 3, 0}, -+ { "bxh", OP8(0x86LL), MASK_RS_RRRD, INSTR_RS_RRRD, 3, 0}, -+ { "brxle", OP8(0x85LL), MASK_RSI_RRP, INSTR_RSI_RRP, 3, 0}, -+ { "brxh", OP8(0x84LL), MASK_RSI_RRP, INSTR_RSI_RRP, 3, 0}, -+ { "diag", OP8(0x83LL), MASK_RS_RRRD, INSTR_RS_RRRD, 3, 0}, -+ { "lpsw", OP8(0x82LL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "ssm", OP8(0x80LL), MASK_S_RD, INSTR_S_RD, 3, 0}, -+ { "su", OP8(0x7fLL), MASK_RX_FRRD, INSTR_RX_FRRD, 3, 0}, -+ { "au", OP8(0x7eLL), MASK_RX_FRRD, INSTR_RX_FRRD, 3, 0}, -+ { "de", OP8(0x7dLL), MASK_RX_FRRD, INSTR_RX_FRRD, 3, 0}, -+ { "me", OP8(0x7cLL), MASK_RX_FRRD, INSTR_RX_FRRD, 3, 0}, -+ { "mde", OP8(0x7cLL), MASK_RX_FRRD, INSTR_RX_FRRD, 3, 0}, -+ { "se", OP8(0x7bLL), MASK_RX_FRRD, INSTR_RX_FRRD, 3, 0}, -+ { "ae", OP8(0x7aLL), MASK_RX_FRRD, INSTR_RX_FRRD, 3, 0}, -+ { "ce", OP8(0x79LL), MASK_RX_FRRD, INSTR_RX_FRRD, 3, 0}, -+ { "le", OP8(0x78LL), MASK_RX_FRRD, INSTR_RX_FRRD, 3, 0}, -+ { "ms", OP8(0x71LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "ste", OP8(0x70LL), MASK_RX_FRRD, INSTR_RX_FRRD, 3, 0}, -+ { "sw", OP8(0x6fLL), MASK_RX_FRRD, INSTR_RX_FRRD, 3, 0}, -+ { "aw", OP8(0x6eLL), MASK_RX_FRRD, INSTR_RX_FRRD, 3, 0}, -+ { "dd", OP8(0x6dLL), MASK_RX_FRRD, INSTR_RX_FRRD, 3, 0}, -+ { "md", OP8(0x6cLL), MASK_RX_FRRD, INSTR_RX_FRRD, 3, 0}, -+ { "sd", OP8(0x6bLL), MASK_RX_FRRD, INSTR_RX_FRRD, 3, 0}, -+ { "ad", OP8(0x6aLL), MASK_RX_FRRD, INSTR_RX_FRRD, 3, 0}, -+ { "cd", OP8(0x69LL), MASK_RX_FRRD, INSTR_RX_FRRD, 3, 0}, -+ { "ld", OP8(0x68LL), MASK_RX_FRRD, INSTR_RX_FRRD, 3, 0}, -+ { "mxd", OP8(0x67LL), MASK_RX_FRRD, INSTR_RX_FRRD, 3, 0}, -+ { "std", OP8(0x60LL), MASK_RX_FRRD, INSTR_RX_FRRD, 3, 0}, -+ { "sl", OP8(0x5fLL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "al", OP8(0x5eLL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "d", OP8(0x5dLL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "m", OP8(0x5cLL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "s", OP8(0x5bLL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "a", OP8(0x5aLL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "c", OP8(0x59LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "l", OP8(0x58LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "x", OP8(0x57LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "o", OP8(0x56LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "cl", OP8(0x55LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "n", OP8(0x54LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "lae", OP8(0x51LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "st", OP8(0x50LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "cvb", OP8(0x4fLL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "cvd", OP8(0x4eLL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "bas", OP8(0x4dLL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "mh", OP8(0x4cLL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "sh", OP8(0x4bLL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "ah", OP8(0x4aLL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "ch", OP8(0x49LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "lh", OP8(0x48LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "b", OP16(0x47f0LL), MASK_RX_0RRD, INSTR_RX_0RRD, 3, 0}, -+ { "bno", OP16(0x47e0LL), MASK_RX_0RRD, INSTR_RX_0RRD, 3, 0}, -+ { "bnh", OP16(0x47d0LL), MASK_RX_0RRD, INSTR_RX_0RRD, 3, 0}, -+ { "bnp", OP16(0x47d0LL), MASK_RX_0RRD, INSTR_RX_0RRD, 3, 0}, -+ { "ble", OP16(0x47c0LL), MASK_RX_0RRD, INSTR_RX_0RRD, 3, 0}, -+ { "bnl", OP16(0x47b0LL), MASK_RX_0RRD, INSTR_RX_0RRD, 3, 0}, -+ { "bnm", OP16(0x47b0LL), MASK_RX_0RRD, INSTR_RX_0RRD, 3, 0}, -+ { "bhe", OP16(0x47a0LL), MASK_RX_0RRD, INSTR_RX_0RRD, 3, 0}, -+ { "bnlh", OP16(0x4790LL), MASK_RX_0RRD, INSTR_RX_0RRD, 3, 0}, -+ { "be", OP16(0x4780LL), MASK_RX_0RRD, INSTR_RX_0RRD, 3, 0}, -+ { "bz", OP16(0x4780LL), MASK_RX_0RRD, INSTR_RX_0RRD, 3, 0}, -+ { "bne", OP16(0x4770LL), MASK_RX_0RRD, INSTR_RX_0RRD, 3, 0}, -+ { "bnz", OP16(0x4770LL), MASK_RX_0RRD, INSTR_RX_0RRD, 3, 0}, -+ { "blh", OP16(0x4760LL), MASK_RX_0RRD, INSTR_RX_0RRD, 3, 0}, -+ { "bnhe", OP16(0x4750LL), MASK_RX_0RRD, INSTR_RX_0RRD, 3, 0}, -+ { "bl", OP16(0x4740LL), MASK_RX_0RRD, INSTR_RX_0RRD, 3, 0}, -+ { "bm", OP16(0x4740LL), MASK_RX_0RRD, INSTR_RX_0RRD, 3, 0}, -+ { "bnle", OP16(0x4730LL), MASK_RX_0RRD, INSTR_RX_0RRD, 3, 0}, -+ { "bh", OP16(0x4720LL), MASK_RX_0RRD, INSTR_RX_0RRD, 3, 0}, -+ { "bp", OP16(0x4720LL), MASK_RX_0RRD, INSTR_RX_0RRD, 3, 0}, -+ { "bo", OP16(0x4710LL), MASK_RX_0RRD, INSTR_RX_0RRD, 3, 0}, -+ { "bc", OP8(0x47LL), MASK_RX_URRD, INSTR_RX_URRD, 3, 0}, -+ { "nop", OP16(0x4700LL), MASK_RX_0RRD, INSTR_RX_0RRD, 3, 0}, -+ { "bct", OP8(0x46LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "bal", OP8(0x45LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "ex", OP8(0x44LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "ic", OP8(0x43LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "stc", OP8(0x42LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "la", OP8(0x41LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "sth", OP8(0x40LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0}, -+ { "sur", OP8(0x3fLL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "aur", OP8(0x3eLL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "der", OP8(0x3dLL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "mer", OP8(0x3cLL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "mder", OP8(0x3cLL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "ser", OP8(0x3bLL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "aer", OP8(0x3aLL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "cer", OP8(0x39LL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "ler", OP8(0x38LL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "sxr", OP8(0x37LL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "axr", OP8(0x36LL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "lrer", OP8(0x35LL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "ledr", OP8(0x35LL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "her", OP8(0x34LL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "lcer", OP8(0x33LL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "lter", OP8(0x32LL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "lner", OP8(0x31LL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "lper", OP8(0x30LL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "swr", OP8(0x2fLL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "awr", OP8(0x2eLL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "ddr", OP8(0x2dLL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "mdr", OP8(0x2cLL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "sdr", OP8(0x2bLL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "adr", OP8(0x2aLL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "cdr", OP8(0x29LL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "ldr", OP8(0x28LL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "mxdr", OP8(0x27LL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "mxr", OP8(0x26LL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "lrdr", OP8(0x25LL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "ldxr", OP8(0x25LL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "hdr", OP8(0x24LL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "lcdr", OP8(0x23LL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "ltdr", OP8(0x22LL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "lndr", OP8(0x21LL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "lpdr", OP8(0x20LL), MASK_RR_FF, INSTR_RR_FF, 3, 0}, -+ { "slr", OP8(0x1fLL), MASK_RR_RR, INSTR_RR_RR, 3, 0}, -+ { "alr", OP8(0x1eLL), MASK_RR_RR, INSTR_RR_RR, 3, 0}, -+ { "dr", OP8(0x1dLL), MASK_RR_RR, INSTR_RR_RR, 3, 0}, -+ { "mr", OP8(0x1cLL), MASK_RR_RR, INSTR_RR_RR, 3, 0}, -+ { "sr", OP8(0x1bLL), MASK_RR_RR, INSTR_RR_RR, 3, 0}, -+ { "ar", OP8(0x1aLL), MASK_RR_RR, INSTR_RR_RR, 3, 0}, -+ { "cr", OP8(0x19LL), MASK_RR_RR, INSTR_RR_RR, 3, 0}, -+ { "lr", OP8(0x18LL), MASK_RR_RR, INSTR_RR_RR, 3, 0}, -+ { "xr", OP8(0x17LL), MASK_RR_RR, INSTR_RR_RR, 3, 0}, -+ { "or", OP8(0x16LL), MASK_RR_RR, INSTR_RR_RR, 3, 0}, -+ { "clr", OP8(0x15LL), MASK_RR_RR, INSTR_RR_RR, 3, 0}, -+ { "nr", OP8(0x14LL), MASK_RR_RR, INSTR_RR_RR, 3, 0}, -+ { "lcr", OP8(0x13LL), MASK_RR_RR, INSTR_RR_RR, 3, 0}, -+ { "ltr", OP8(0x12LL), MASK_RR_RR, INSTR_RR_RR, 3, 0}, -+ { "lnr", OP8(0x11LL), MASK_RR_RR, INSTR_RR_RR, 3, 0}, -+ { "lpr", OP8(0x10LL), MASK_RR_RR, INSTR_RR_RR, 3, 0}, -+ { "clcl", OP8(0x0fLL), MASK_RR_RR, INSTR_RR_RR, 3, 0}, -+ { "mvcl", OP8(0x0eLL), MASK_RR_RR, INSTR_RR_RR, 3, 0}, -+ { "basr", OP8(0x0dLL), MASK_RR_RR, INSTR_RR_RR, 3, 0}, -+ { "bassm", OP8(0x0cLL), MASK_RR_RR, INSTR_RR_RR, 3, 0}, -+ { "bsm", OP8(0x0bLL), MASK_RR_RR, INSTR_RR_RR, 3, 0}, -+ { "svc", OP8(0x0aLL), MASK_RR_U0, INSTR_RR_U0, 3, 0}, -+ { "br", OP16(0x07f0LL), MASK_RR_0R, INSTR_RR_0R, 3, 0}, -+ { "bnor", OP16(0x07e0LL), MASK_RR_0R, INSTR_RR_0R, 3, 0}, -+ { "bnhr", OP16(0x07d0LL), MASK_RR_0R, INSTR_RR_0R, 3, 0}, -+ { "bnpr", OP16(0x07d0LL), MASK_RR_0R, INSTR_RR_0R, 3, 0}, -+ { "bler", OP16(0x07c0LL), MASK_RR_0R, INSTR_RR_0R, 3, 0}, -+ { "bnlr", OP16(0x07b0LL), MASK_RR_0R, INSTR_RR_0R, 3, 0}, -+ { "bnmr", OP16(0x07b0LL), MASK_RR_0R, INSTR_RR_0R, 3, 0}, -+ { "bher", OP16(0x07a0LL), MASK_RR_0R, INSTR_RR_0R, 3, 0}, -+ { "bnlhr", OP16(0x0790LL), MASK_RR_0R, INSTR_RR_0R, 3, 0}, -+ { "ber", OP16(0x0780LL), MASK_RR_0R, INSTR_RR_0R, 3, 0}, -+ { "bzr", OP16(0x0780LL), MASK_RR_0R, INSTR_RR_0R, 3, 0}, -+ { "bner", OP16(0x0770LL), MASK_RR_0R, INSTR_RR_0R, 3, 0}, -+ { "bnzr", OP16(0x0770LL), MASK_RR_0R, INSTR_RR_0R, 3, 0}, -+ { "blhr", OP16(0x0760LL), MASK_RR_0R, INSTR_RR_0R, 3, 0}, -+ { "bnher", OP16(0x0750LL), MASK_RR_0R, INSTR_RR_0R, 3, 0}, -+ { "blr", OP16(0x0740LL), MASK_RR_0R, INSTR_RR_0R, 3, 0}, -+ { "bmr", OP16(0x0740LL), MASK_RR_0R, INSTR_RR_0R, 3, 0}, -+ { "bnler", OP16(0x0730LL), MASK_RR_0R, INSTR_RR_0R, 3, 0}, -+ { "bhr", OP16(0x0720LL), MASK_RR_0R, INSTR_RR_0R, 3, 0}, -+ { "bpr", OP16(0x0720LL), MASK_RR_0R, INSTR_RR_0R, 3, 0}, -+ { "bor", OP16(0x0710LL), MASK_RR_0R, INSTR_RR_0R, 3, 0}, -+ { "bcr", OP8(0x07LL), MASK_RR_UR, INSTR_RR_UR, 3, 0}, -+ { "nopr", OP16(0x0700LL), MASK_RR_0R, INSTR_RR_0R, 3, 0}, -+ { "bctr", OP8(0x06LL), MASK_RR_RR, INSTR_RR_RR, 3, 0}, -+ { "balr", OP8(0x05LL), MASK_RR_RR, INSTR_RR_RR, 3, 0}, -+ { "spm", OP8(0x04LL), MASK_RR_R0, INSTR_RR_R0, 3, 0}, -+ { "trap2", OP16(0x01ffLL), MASK_E, INSTR_E, 3, 0}, -+ { "sam64", OP16(0x010eLL), MASK_E, INSTR_E, 2, 2}, -+ { "sam31", OP16(0x010dLL), MASK_E, INSTR_E, 3, 2}, -+ { "sam24", OP16(0x010cLL), MASK_E, INSTR_E, 3, 2}, -+ { "tam", OP16(0x010bLL), MASK_E, INSTR_E, 3, 2}, -+ { "pfpo", OP16(0x010aLL), MASK_E, INSTR_E, 2, 5}, -+ { "sckpf", OP16(0x0107LL), MASK_E, INSTR_E, 3, 0}, -+ { "upt", OP16(0x0102LL), MASK_E, INSTR_E, 3, 0}, -+ { "pr", OP16(0x0101LL), MASK_E, INSTR_E, 3, 0} -+}; -+ -+const int s390_num_opcodes = -+ sizeof (s390_opcodes) / sizeof (s390_opcodes[0]); -+ ---- qemu-0.9.0.cvs/target-alpha/op_helper.c -+++ qemu-0.9.0.cvs/target-alpha/op_helper.c -@@ -1229,6 +1229,9 @@ - CPUState *saved_env; - target_phys_addr_t pc; - int ret; -+#ifdef __s390__ -+ retaddr = (void*)((unsigned long)retaddr & 0x7fffffffUL); -+#endif - - /* XXX: hack to restore env in all cases, even if not called from - generated code */ ---- qemu-0.9.0.cvs/target-arm/op_helper.c -+++ qemu-0.9.0.cvs/target-arm/op_helper.c -@@ -202,6 +202,9 @@ - CPUState *saved_env; - target_phys_addr_t pc; - int ret; -+#ifdef __s390__ -+ retaddr = (void*)((unsigned long)retaddr & 0x7fffffffUL); -+#endif - - /* XXX: hack to restore env in all cases, even if not called from - generated code */ ---- qemu-0.9.0.cvs/target-i386/helper.c -+++ qemu-0.9.0.cvs/target-i386/helper.c -@@ -3852,6 +3852,9 @@ - int ret; - unsigned long pc; - CPUX86State *saved_env; -+#ifdef __s390__ -+ retaddr = (void*)((unsigned long)retaddr & 0x7fffffffUL); -+#endif - - /* XXX: hack to restore env in all cases, even if not called from - generated code */ ---- qemu-0.9.0.cvs/target-i386/translate.c -+++ qemu-0.9.0.cvs/target-i386/translate.c +--- qemu/target-i386/translate.c ++++ qemu/target-i386/translate.c @@ -1795,7 +1795,11 @@ case CC_OP_SUBW: case CC_OP_SUBL: @@ -1873,7 +45,7 @@ func = gen_jcc_sub[s->cc_op - CC_OP_SUBB][jcc_op]; +#endif break; - + /* some jumps are easy to compute */ @@ -1843,7 +1847,11 @@ func = gen_jcc_sub[(s->cc_op - CC_OP_ADDB) % 4][jcc_op]; @@ -1887,92 +59,3 @@ break; default: func = NULL; ---- qemu-0.9.0.cvs/target-m68k/op_helper.c -+++ qemu-0.9.0.cvs/target-m68k/op_helper.c -@@ -55,6 +55,9 @@ - CPUState *saved_env; - target_phys_addr_t pc; - int ret; -+#ifdef __s390__ -+ retaddr = (void*)((unsigned long)retaddr & 0x7fffffffUL); -+#endif - - /* XXX: hack to restore env in all cases, even if not called from - generated code */ ---- qemu-0.9.0.cvs/target-mips/op.c -+++ qemu-0.9.0.cvs/target-mips/op.c -@@ -1616,6 +1616,18 @@ - - void op_cfc1 (void) - { -+#ifdef __s390__ -+ if(!T1) -+ T0 = (int32_t)env->fcr0; -+ else if(T1 == 25) -+ T0 = ((env->fcr31 >> 24) & 0xfe) | ((env->fcr31 >> 23) & 0x1); -+ else if(T1 == 26) -+ T0 = env->fcr31 & 0x0003f07c; -+ else if(T1 == 28) -+ T0 = (env->fcr31 & 0x00000f83) | ((env->fcr31 >> 22) & 0x4); -+ else -+ T0 = (int32_t)env->fcr31; -+#else - switch (T1) { - case 0: - T0 = (int32_t)env->fcr0; -@@ -1633,6 +1645,7 @@ - T0 = (int32_t)env->fcr31; - break; - } -+#endif - DEBUG_FPU_STATE(); - RETURN(); - } ---- qemu-0.9.0.cvs/target-mips/op_helper.c -+++ qemu-0.9.0.cvs/target-mips/op_helper.c -@@ -571,6 +571,9 @@ - CPUState *saved_env; - unsigned long pc; - int ret; -+#ifdef __s390__ -+ retaddr = (void*)((unsigned long)retaddr & 0x7fffffffUL); -+#endif - - /* XXX: hack to restore env in all cases, even if not called from - generated code */ ---- qemu-0.9.0.cvs/target-ppc/op_helper.c -+++ qemu-0.9.0.cvs/target-ppc/op_helper.c -@@ -2228,6 +2228,9 @@ - CPUState *saved_env; - target_phys_addr_t pc; - int ret; -+#ifdef __s390__ -+ retaddr = (void*)((unsigned long)retaddr & 0x7fffffffUL); -+#endif - - /* XXX: hack to restore env in all cases, even if not called from - generated code */ ---- qemu-0.9.0.cvs/target-sh4/op_helper.c -+++ qemu-0.9.0.cvs/target-sh4/op_helper.c -@@ -48,6 +48,9 @@ - CPUState *saved_env; - unsigned long pc; - int ret; -+#ifdef __s390__ -+ retaddr = (void*)((unsigned long)retaddr & 0x7fffffffUL); -+#endif - - /* XXX: hack to restore env in all cases, even if not called from - generated code */ ---- qemu-0.9.0.cvs/target-sparc/op_helper.c -+++ qemu-0.9.0.cvs/target-sparc/op_helper.c -@@ -1059,6 +1059,9 @@ - int ret; - unsigned long pc; - CPUState *saved_env; -+#ifdef __s390__ -+ retaddr = (void*)((unsigned long)retaddr & 0x7fffffffUL); -+#endif - - /* XXX: hack to restore env in all cases, even if not called from - generated code */ diff --git a/qemu-z80.diff b/qemu-z80.diff index 9b4e9194..571f306b 100644 --- a/qemu-z80.diff +++ b/qemu-z80.diff @@ -1,7 +1,80 @@ -diff --exclude='*.orig' --exclude=CVS -ruN qemu/configure qemu-z80/configure ---- qemu/configure 2007-06-23 18:03:35.000000000 +0200 -+++ qemu-z80/configure 2007-07-06 13:07:47.000000000 +0200 -@@ -86,6 +86,7 @@ +--- qemu/Makefile ++++ qemu/Makefile +@@ -73,7 +73,7 @@ + mkdir -p "$(DESTDIR)$(datadir)" + for x in bios.bin vgabios.bin vgabios-cirrus.bin ppc_rom.bin \ + video.x openbios-sparc32 pxe-ne2k_pci.bin \ +- pxe-rtl8139.bin pxe-pcnet.bin; do \ ++ pxe-rtl8139.bin pxe-pcnet.bin zx-rom.bin ; do \ + $(INSTALL) -m 644 $(SRC_PATH)/pc-bios/$$x "$(DESTDIR)$(datadir)"; \ + done + ifndef CONFIG_WIN32 +--- qemu/Makefile.target ++++ qemu/Makefile.target +@@ -348,6 +348,13 @@ + endif + endif + ++ifeq ($(TARGET_BASE_ARCH), z80) ++LIBOBJS+=helper.o helper2.o ++ifdef CONFIG_LIBSPECTRUM ++LIBS+=-lspectrum ++endif ++endif ++ + # NOTE: the disassembler code is only needed for debugging + LIBOBJS+=disas.o + ifeq ($(findstring i386, $(TARGET_ARCH) $(ARCH)),i386) +@@ -383,6 +390,9 @@ + ifeq ($(findstring s390, $(TARGET_ARCH) $(ARCH)),s390) + LIBOBJS+=s390-dis.o + endif ++ifeq ($(findstring z80, $(TARGET_ARCH) $(ARCH)),z80) ++LIBOBJS+=z80-dis.o ++endif + + ifdef CONFIG_GDBSTUB + OBJS+=gdbstub.o +@@ -531,6 +541,10 @@ + VL_OBJS+= an5206.o mcf5206.o ptimer.o mcf_uart.o mcf_intc.o mcf5208.o mcf_fec.o + VL_OBJS+= m68k-semi.o + endif ++ifeq ($(TARGET_BASE_ARCH), z80) ++VL_OBJS+= zx_spectrum.o zx_ula.o dma.o $(AUDIODRV) ++VL_OBJS+= serial.o i8259.o ++endif + ifdef CONFIG_GDBSTUB + VL_OBJS+=gdbstub.o + endif +@@ -641,9 +655,15 @@ + helper.o: helper.c + $(CC) $(HELPER_CFLAGS) $(CPPFLAGS) $(BASE_CFLAGS) -c -o $@ $< + else ++ifeq ($(TARGET_BASE_ARCH), z80) ++# XXX: rename helper.c to op_helper.c ++helper.o: helper.c ++ $(CC) $(HELPER_CFLAGS) $(CPPFLAGS) $(BASE_CFLAGS) -c -o $@ $< ++else + op_helper.o: op_helper.c + $(CC) $(HELPER_CFLAGS) $(CPPFLAGS) $(BASE_CFLAGS) -c -o $@ $< + endif ++endif + + cpu-exec.o: cpu-exec.c + $(CC) $(HELPER_CFLAGS) $(CPPFLAGS) $(BASE_CFLAGS) -c -o $@ $< +@@ -667,6 +687,9 @@ + ifneq ($(PROGS),) + $(INSTALL) -m 755 -s $(PROGS) "$(DESTDIR)$(bindir)" + endif ++ifeq ($(TARGET_BASE_ARCH), z80) ++op.o: op.c opreg_template.h ops_mem.h ++endif + + ifneq ($(wildcard .depend),) + include .depend +--- qemu/configure ++++ qemu/configure +@@ -89,6 +89,7 @@ dsound="no" coreaudio="no" alsa="no" @@ -9,33 +82,33 @@ diff --exclude='*.orig' --exclude=CVS -ruN qemu/configure qemu-z80/configure fmod="no" fmod_lib="" fmod_inc="" -@@ -245,6 +246,8 @@ +@@ -264,6 +265,8 @@ ;; - --fmod-inc=*) fmod_inc="$optarg" + --disable-vnc-tls) vnc_tls="no" ;; + --enable-libspectrum) libspectrum="yes" + ;; --enable-mingw32) mingw32="yes" ; cross_prefix="i386-mingw32-" ; linux_user="no" ;; --disable-slirp) slirp="no" -@@ -355,6 +358,7 @@ - echo " --enable-alsa enable ALSA audio driver" +@@ -387,6 +390,7 @@ echo " --enable-fmod enable FMOD audio driver" echo " --enable-dsound enable DirectSound audio driver" + echo " --disable-vnc-tls disable TLS encryption for VNC server" +echo " --enable-libspectrum enable ZX Spectrum snapshot loading" echo " --enable-system enable all system emulation targets" echo " --disable-system disable all system emulation targets" echo " --enable-linux-user enable all linux usermode emulation targets" -@@ -473,7 +477,7 @@ +@@ -502,7 +506,7 @@ if test -z "$target_list" ; then # these targets are portable if [ "$softmmu" = "yes" ] ; then -- target_list="i386-softmmu ppc-softmmu sparc-softmmu x86_64-softmmu mips-softmmu mipsel-softmmu mips64-softmmu mips64el-softmmu arm-softmmu ppc64-softmmu ppcemb-softmmu m68k-softmmu" -+ target_list="i386-softmmu ppc-softmmu sparc-softmmu x86_64-softmmu mips-softmmu mipsel-softmmu mips64-softmmu mips64el-softmmu arm-softmmu ppc64-softmmu ppcemb-softmmu m68k-softmmu z80-softmmu" +- target_list="i386-softmmu sparc-softmmu x86_64-softmmu mips-softmmu mipsel-softmmu mips64-softmmu mips64el-softmmu arm-softmmu ppc-softmmu ppcemb-softmmu ppc64-softmmu m68k-softmmu sh4-softmmu cris-softmmu" ++ target_list="i386-softmmu sparc-softmmu x86_64-softmmu mips-softmmu mipsel-softmmu mips64-softmmu mips64el-softmmu arm-softmmu ppc-softmmu ppcemb-softmmu ppc64-softmmu m68k-softmmu sh4-softmmu cris-softmmu z80-softmmu" fi # the following are Linux specific if [ "$linux_user" = "yes" ] ; then -@@ -680,6 +684,7 @@ +@@ -718,6 +722,7 @@ if test -n "$sparc_cpu"; then echo "Target Sparc Arch $sparc_cpu" fi @@ -43,9 +116,9 @@ diff --exclude='*.orig' --exclude=CVS -ruN qemu/configure qemu-z80/configure echo "kqemu support $kqemu" echo "Documentation $build_docs" [ ! -z "$uname_release" ] && \ -@@ -841,6 +846,10 @@ - echo "CONFIG_FMOD_INC=$fmod_inc" >> $config_mak - echo "#define CONFIG_FMOD 1" >> $config_h +@@ -896,6 +901,10 @@ + echo "CONFIG_VNC_TLS_LIBS=$vnc_tls_libs" >> $config_mak + echo "#define CONFIG_VNC_TLS 1" >> $config_h fi +if test "$libspectrum" = "yes" ; then + echo "CONFIG_LIBSPECTRUM=yes" >> $config_mak @@ -54,7 +127,7 @@ diff --exclude='*.orig' --exclude=CVS -ruN qemu/configure qemu-z80/configure qemu_version=`head $source_path/VERSION` echo "VERSION=$qemu_version" >>$config_mak echo "#define QEMU_VERSION \"$qemu_version\"" >> $config_h -@@ -1008,6 +1017,11 @@ +@@ -1109,6 +1118,11 @@ echo "TARGET_ARCH=alpha" >> $config_mak echo "#define TARGET_ARCH \"alpha\"" >> $config_h echo "#define TARGET_ALPHA 1" >> $config_h @@ -66,11 +139,10 @@ diff --exclude='*.orig' --exclude=CVS -ruN qemu/configure qemu-z80/configure else echo "Unsupported target CPU" exit 1 -diff --exclude='*.orig' --exclude=CVS -ruN qemu/cpu-exec.c qemu-z80/cpu-exec.c ---- qemu/cpu-exec.c 2007-06-03 20:52:15.000000000 +0200 -+++ qemu-z80/cpu-exec.c 2007-07-05 18:36:50.000000000 +0200 -@@ -209,6 +209,10 @@ - flags = env->ps; +--- qemu/cpu-exec.c ++++ qemu/cpu-exec.c +@@ -214,6 +214,10 @@ + flags = 0; cs_base = 0; pc = env->pc; +#elif defined(TARGET_Z80) @@ -80,9 +152,9 @@ diff --exclude='*.orig' --exclude=CVS -ruN qemu/cpu-exec.c qemu-z80/cpu-exec.c #else #error unsupported CPU #endif -@@ -284,6 +288,15 @@ - #elif defined(TARGET_MIPS) +@@ -290,6 +294,15 @@ #elif defined(TARGET_SH4) + #elif defined(TARGET_CRIS) /* XXXXX */ +#elif defined(TARGET_Z80) + env_to_regs(); @@ -96,7 +168,7 @@ diff --exclude='*.orig' --exclude=CVS -ruN qemu/cpu-exec.c qemu-z80/cpu-exec.c #else #error unsupported target CPU #endif -@@ -500,6 +513,13 @@ +@@ -541,6 +554,13 @@ env->exception_index = env->pending_vector; do_interrupt(1); } @@ -110,18 +182,18 @@ diff --exclude='*.orig' --exclude=CVS -ruN qemu/cpu-exec.c qemu-z80/cpu-exec.c #endif /* Don't use the cached interupt_request value, do_interrupt may have updated the EXITTB flag. */ -@@ -547,6 +567,8 @@ - cpu_dump_state(env, logfile, fprintf, 0); - #elif defined(TARGET_ALPHA) +@@ -590,6 +610,8 @@ + cpu_dump_state(env, logfile, fprintf, 0); + #elif defined(TARGET_CRIS) cpu_dump_state(env, logfile, fprintf, 0); +#elif defined(TARGET_Z80) + cpu_dump_state(env, logfile, fprintf, 0); #else - #error unsupported target CPU + #error unsupported target CPU #endif -@@ -741,6 +763,9 @@ - #elif defined(TARGET_SH4) +@@ -785,6 +807,9 @@ #elif defined(TARGET_ALPHA) + #elif defined(TARGET_CRIS) /* XXXXX */ +#elif defined(TARGET_Z80) + /* restore flags in standard format */ @@ -129,53 +201,40 @@ diff --exclude='*.orig' --exclude=CVS -ruN qemu/cpu-exec.c qemu-z80/cpu-exec.c #else #error unsupported target CPU #endif -diff --exclude='*.orig' --exclude=CVS -ruN qemu/disas.c qemu-z80/disas.c ---- qemu/disas.c 2007-06-03 21:16:42.000000000 +0200 -+++ qemu-z80/disas.c 2007-07-05 18:03:59.000000000 +0200 -@@ -200,6 +200,8 @@ - #elif defined(TARGET_ALPHA) - disasm_info.mach = bfd_mach_alpha; - print_insn = print_insn_alpha; +--- qemu/dis-asm.h ++++ qemu/dis-asm.h +@@ -387,6 +387,7 @@ + extern int print_insn_alpha PARAMS ((bfd_vma, disassemble_info*)); + extern int print_insn_s390 PARAMS ((bfd_vma, disassemble_info*)); + extern int print_insn_crisv32 PARAMS ((bfd_vma, disassemble_info*)); ++extern int print_insn_z80 PARAMS ((bfd_vma, disassemble_info*)); + + #if 0 + /* Fetch the disassembler for a given BFD, if that support is available. */ +--- qemu/disas.c ++++ qemu/disas.c +@@ -208,6 +208,8 @@ + #elif defined(TARGET_CRIS) + disasm_info.mach = bfd_mach_cris_v32; + print_insn = print_insn_crisv32; +#elif defined(TARGET_Z80) + print_insn = print_insn_z80; #else fprintf(out, "0x" TARGET_FMT_lx ": Asm output not supported on this arch\n", code); -diff --exclude='*.orig' --exclude=CVS -ruN qemu/dis-asm.h qemu-z80/dis-asm.h ---- qemu/dis-asm.h 2007-04-05 09:22:49.000000000 +0200 -+++ qemu-z80/dis-asm.h 2007-07-05 18:05:17.000000000 +0200 -@@ -379,6 +379,7 @@ - extern int print_insn_tic30 PARAMS ((bfd_vma, disassemble_info*)); - extern int print_insn_ppc PARAMS ((bfd_vma, disassemble_info*)); - extern int print_insn_alpha PARAMS ((bfd_vma, disassemble_info*)); -+extern int print_insn_z80 PARAMS ((bfd_vma, disassemble_info*)); - - #if 0 - /* Fetch the disassembler for a given BFD, if that support is available. */ -diff --exclude='*.orig' --exclude=CVS -ruN qemu/exec-all.h qemu-z80/exec-all.h ---- qemu/exec-all.h 2007-07-02 16:06:26.000000000 +0200 -+++ qemu-z80/exec-all.h 2007-07-05 18:04:44.000000000 +0200 -@@ -69,7 +69,7 @@ +--- qemu/exec-all.h ++++ qemu/exec-all.h +@@ -82,7 +82,7 @@ typedef void (GenOpFunc2)(long, long); typedef void (GenOpFunc3)(long, long, long); - + -#if defined(TARGET_I386) +#if defined(TARGET_I386) | defined(TARGET_Z80) void optimize_flags_init(void); -@@ -586,6 +586,8 @@ - is_user = ((env->ps >> 3) & 3); - #elif defined (TARGET_M68K) - is_user = ((env->sr & SR_S) == 0); -+#elif defined (TARGET_Z80) -+ is_user = 0; /* no user-mode */ - #else - #error unimplemented CPU - #endif -diff --exclude='*.orig' --exclude=CVS -ruN qemu/exec.c qemu-z80/exec.c ---- qemu/exec.c 2007-07-01 20:21:11.000000000 +0200 -+++ qemu-z80/exec.c 2007-07-06 12:04:38.000000000 +0200 +--- qemu/exec.c ++++ qemu/exec.c @@ -709,6 +709,9 @@ current_flags |= (env->eflags & (IOPL_MASK | TF_MASK | VM_MASK)); current_cs_base = (target_ulong)env->segs[R_CS].base; @@ -186,12 +245,11 @@ diff --exclude='*.orig' --exclude=CVS -ruN qemu/exec.c qemu-z80/exec.c #else #error unsupported CPU #endif -diff --exclude='*.orig' --exclude=CVS -ruN qemu/gdbstub.c qemu-z80/gdbstub.c ---- qemu/gdbstub.c 2007-06-03 19:08:32.000000000 +0200 -+++ qemu-z80/gdbstub.c 2007-07-05 18:03:12.000000000 +0200 -@@ -718,6 +718,34 @@ - for (i = 0; i < 8; i++) LOAD(env->gregs[i]); - for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]); +--- qemu/gdbstub.c ++++ qemu/gdbstub.c +@@ -853,6 +853,34 @@ + for (i = 0; i < 16; i++) LOAD(env->regs[i]); + LOAD (env->pc); } +#elif defined(TARGET_Z80) +/* Z80 FIXME Z80 TODO Z80 */ @@ -224,9 +282,8 @@ diff --exclude='*.orig' --exclude=CVS -ruN qemu/gdbstub.c qemu-z80/gdbstub.c #else static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) { -diff --exclude='*.orig' --exclude=CVS -ruN qemu/hw/zx_spectrum.c qemu-z80/hw/zx_spectrum.c ---- qemu/hw/zx_spectrum.c 1970-01-01 01:00:00.000000000 +0100 -+++ qemu-z80/hw/zx_spectrum.c 2007-07-06 13:17:46.000000000 +0200 +--- qemu/hw/zx_spectrum.c ++++ qemu/hw/zx_spectrum.c @@ -0,0 +1,303 @@ +/* + * QEMU ZX Spectrum Emulator @@ -531,9 +588,8 @@ diff --exclude='*.orig' --exclude=CVS -ruN qemu/hw/zx_spectrum.c qemu-z80/hw/zx_ + "Z80 Machine", + zx_spectrum_init, +}; -diff --exclude='*.orig' --exclude=CVS -ruN qemu/hw/zx_ula.c qemu-z80/hw/zx_ula.c ---- qemu/hw/zx_ula.c 1970-01-01 01:00:00.000000000 +0100 -+++ qemu-z80/hw/zx_ula.c 2007-07-06 13:01:14.000000000 +0200 +--- qemu/hw/zx_ula.c ++++ qemu/hw/zx_ula.c @@ -0,0 +1,355 @@ +/* + * QEMU ZX Spectrum Video Emulation. @@ -890,108 +946,9 @@ diff --exclude='*.orig' --exclude=CVS -ruN qemu/hw/zx_ula.c qemu-z80/hw/zx_ula.c + /* ZX Spectrum ULA */ + register_ioport_write(0, 0x10000, 1, io_spectrum_write, s); +} -diff --exclude='*.orig' --exclude=CVS -ruN qemu/Makefile qemu-z80/Makefile ---- qemu/Makefile 2007-06-17 18:41:04.000000000 +0200 -+++ qemu-z80/Makefile 2007-07-05 18:07:36.000000000 +0200 -@@ -72,7 +72,7 @@ - mkdir -p "$(DESTDIR)$(datadir)" - for x in bios.bin vgabios.bin vgabios-cirrus.bin ppc_rom.bin \ - video.x openbios-sparc32 pxe-ne2k_pci.bin \ -- pxe-rtl8139.bin pxe-pcnet.bin; do \ -+ pxe-rtl8139.bin pxe-pcnet.bin zx-rom.bin ; do \ - $(INSTALL) -m 644 $(SRC_PATH)/pc-bios/$$x "$(DESTDIR)$(datadir)"; \ - done - ifndef CONFIG_WIN32 -diff --exclude='*.orig' --exclude=CVS -ruN qemu/Makefile.target qemu-z80/Makefile.target ---- qemu/Makefile.target 2007-06-30 19:32:17.000000000 +0200 -+++ qemu-z80/Makefile.target 2007-07-06 14:59:02.000000000 +0200 -@@ -315,6 +315,13 @@ - LIBOBJS+= op_helper.o helper.o alpha_palcode.o - endif - -+ifeq ($(TARGET_BASE_ARCH), z80) -+LIBOBJS+=helper.o helper2.o -+ifdef CONFIG_LIBSPECTRUM -+LIBS+=-lspectrum -+endif -+endif -+ - # NOTE: the disassembler code is only needed for debugging - LIBOBJS+=disas.o - ifeq ($(findstring i386, $(TARGET_ARCH) $(ARCH)),i386) -@@ -347,6 +354,9 @@ - ifeq ($(findstring sh4, $(TARGET_ARCH) $(ARCH)),sh4) - LIBOBJS+=sh4-dis.o - endif -+ifeq ($(findstring z80, $(TARGET_ARCH) $(ARCH)),z80) -+LIBOBJS+=z80-dis.o -+endif - - ifdef CONFIG_GDBSTUB - OBJS+=gdbstub.o -@@ -472,6 +482,10 @@ - VL_OBJS+= an5206.o mcf5206.o ptimer.o mcf_uart.o mcf_intc.o mcf5208.o mcf_fec.o - VL_OBJS+= m68k-semi.o - endif -+ifeq ($(TARGET_BASE_ARCH), z80) -+VL_OBJS+= zx_spectrum.o zx_ula.o dma.o $(AUDIODRV) -+VL_OBJS+= serial.o i8259.o mixeng.o -+endif - ifdef CONFIG_GDBSTUB - VL_OBJS+=gdbstub.o - endif -@@ -582,9 +596,15 @@ - helper.o: helper.c - $(CC) $(HELPER_CFLAGS) $(CPPFLAGS) $(BASE_CFLAGS) -c -o $@ $< - else -+ifeq ($(TARGET_BASE_ARCH), z80) -+# XXX: rename helper.c to op_helper.c -+helper.o: helper.c -+ $(CC) $(HELPER_CFLAGS) $(CPPFLAGS) $(BASE_CFLAGS) -c -o $@ $< -+else - op_helper.o: op_helper.c - $(CC) $(HELPER_CFLAGS) $(CPPFLAGS) $(BASE_CFLAGS) -c -o $@ $< - endif -+endif - - cpu-exec.o: cpu-exec.c - $(CC) $(HELPER_CFLAGS) $(CPPFLAGS) $(BASE_CFLAGS) -c -o $@ $< -@@ -601,6 +621,9 @@ - ifeq ($(TARGET_BASE_ARCH), i386) - op.o: op.c opreg_template.h ops_template.h ops_template_mem.h ops_mem.h ops_sse.h - endif -+ifeq ($(TARGET_BASE_ARCH), z80) -+op.o: op.c opreg_template.h ops_mem.h -+endif - - ifeq ($(TARGET_ARCH), arm) - op.o: op.c op_template.h -Files qemu/school.z80 and qemu-z80/school.z80 differ -diff --exclude='*.orig' --exclude=CVS -ruN qemu/softmmu_header.h qemu-z80/softmmu_header.h ---- qemu/softmmu_header.h 2007-05-23 21:58:10.000000000 +0200 -+++ qemu-z80/softmmu_header.h 2007-07-05 18:11:08.000000000 +0200 -@@ -67,6 +67,8 @@ - #define CPU_MEM_INDEX ((env->ps >> 3) & 3) - #elif defined (TARGET_M68K) - #define CPU_MEM_INDEX ((env->sr & SR_S) == 0) -+#elif defined (TARGET_Z80) -+#define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3) - #else - #error unsupported CPU - #endif -@@ -90,6 +92,8 @@ - #define CPU_MEM_INDEX ((env->ps >> 3) & 3) - #elif defined (TARGET_M68K) - #define CPU_MEM_INDEX ((env->sr & SR_S) == 0) -+#elif defined (TARGET_Z80) -+#define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3) - #else - #error unsupported CPU - #endif -diff --exclude='*.orig' --exclude=CVS -ruN qemu/target-z80/cpu.h qemu-z80/target-z80/cpu.h ---- qemu/target-z80/cpu.h 1970-01-01 01:00:00.000000000 +0100 -+++ qemu-z80/target-z80/cpu.h 2007-07-06 11:59:06.000000000 +0200 -@@ -0,0 +1,243 @@ +--- qemu/target-z80/cpu.h ++++ qemu/target-z80/cpu.h +@@ -0,0 +1,252 @@ +/* + * Z80 virtual CPU header + * @@ -1063,6 +1020,9 @@ diff --exclude='*.orig' --exclude=CVS -ruN qemu/target-z80/cpu.h qemu-z80/target +#define CC_Z 0x0040 +#define CC_S 0x0080 + ++#define NB_MMU_MODES 1 ++#define MMU_MODE0_SUFFIX _kernel ++ +/* hidden flags - used internally by qemu to represent additionnal cpu + states. Only the CPL, INHIBIT_IRQ and HALTED are not redundant. We avoid + using the IOPL_MASK, TF_MASK and VM_MASK bit position to ease oring @@ -1232,12 +1192,17 @@ diff --exclude='*.orig' --exclude=CVS -ruN qemu/target-z80/cpu.h qemu-z80/target +#define cpu_gen_code cpu_z80_gen_code +#define cpu_signal_handler cpu_z80_signal_handler + ++static inline int cpu_mmu_index (CPUState *env) ++{ ++ return (env->hflags & HF_CPL_MASK) == 3; ++} ++ ++ +#include "cpu-all.h" + +#endif /* CPU_Z80_H */ -diff --exclude='*.orig' --exclude=CVS -ruN qemu/target-z80/exec.h qemu-z80/target-z80/exec.h ---- qemu/target-z80/exec.h 1970-01-01 01:00:00.000000000 +0100 -+++ qemu-z80/target-z80/exec.h 2007-07-05 18:30:59.000000000 +0200 +--- qemu/target-z80/exec.h ++++ qemu/target-z80/exec.h @@ -0,0 +1,372 @@ +/* + * Z80 execution defines @@ -1611,9 +1576,292 @@ diff --exclude='*.orig' --exclude=CVS -ruN qemu/target-z80/exec.h qemu-z80/targe + } + return EXCP_HALTED; +} -diff --exclude='*.orig' --exclude=CVS -ruN qemu/target-z80/helper2.c qemu-z80/target-z80/helper2.c ---- qemu/target-z80/helper2.c 1970-01-01 01:00:00.000000000 +0100 -+++ qemu-z80/target-z80/helper2.c 2007-07-05 18:37:36.000000000 +0200 +--- qemu/target-z80/helper.c ++++ qemu/target-z80/helper.c +@@ -0,0 +1,281 @@ ++/* ++ * Z80 helpers ++ * ++ * Copyright (c) 2007 Stuart Brady ++ * Copyright (c) 2003 Fabrice Bellard ++ * ++ * This library is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU Lesser General Public ++ * License as published by the Free Software Foundation; either ++ * version 2 of the License, or (at your option) any later version. ++ * ++ * This library is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * Lesser General Public License for more details. ++ * ++ * You should have received a copy of the GNU Lesser General Public ++ * License along with this library; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ */ ++#include "exec.h" ++#include "host-utils.h" ++ ++//#define DEBUG_PCALL ++ ++const uint8_t parity_table[256] = { ++ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, ++ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, ++ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, ++ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, ++ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, ++ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, ++ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, ++ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, ++ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, ++ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, ++ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, ++ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, ++ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, ++ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, ++ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, ++ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, ++ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, ++ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, ++ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, ++ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, ++ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, ++ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, ++ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, ++ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, ++ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, ++ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, ++ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, ++ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, ++ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, ++ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, ++ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, ++ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, ++}; ++ ++/* modulo 17 table */ ++const uint8_t rclw_table[32] = { ++ 0, 1, 2, 3, 4, 5, 6, 7, ++ 8, 9,10,11,12,13,14,15, ++ 16, 0, 1, 2, 3, 4, 5, 6, ++ 7, 8, 9,10,11,12,13,14, ++}; ++ ++/* modulo 9 table */ ++const uint8_t rclb_table[32] = { ++ 0, 1, 2, 3, 4, 5, 6, 7, ++ 8, 0, 1, 2, 3, 4, 5, 6, ++ 7, 8, 0, 1, 2, 3, 4, 5, ++ 6, 7, 8, 0, 1, 2, 3, 4, ++}; ++ ++ ++/* thread support */ ++ ++spinlock_t global_cpu_lock = SPIN_LOCK_UNLOCKED; ++ ++void cpu_lock(void) ++{ ++ spin_lock(&global_cpu_lock); ++} ++ ++void cpu_unlock(void) ++{ ++ spin_unlock(&global_cpu_lock); ++} ++ ++void do_interrupt(CPUZ80State *env) ++{ ++// printf("z80: do_interrupt()\n"); ++ ++ if (!env->iff1) ++ return; ++ ++ env->iff1 = 0; ++ env->iff2 = 0; /* XXX: Unchanged for NMI */ ++ ++ { ++ target_ulong sp; ++ sp = (uint16_t)(env->regs[R_SP] - 2); ++ env->regs[R_SP] = sp; ++ stw_kernel(sp, env->pc); ++ } ++ ++ /* IM0 = execute data on bus (0xff == rst $38) */ ++ /* IM1 = execute rst $38 (ROM uses this)*/ ++ /* IM2 = indirect jump -- address is held at (I << 8) | DATA */ ++ ++ /* value on data bus is 0xff for the zx spectrum */ ++ ++ /* when an interrupt occurs, iff1 and iff2 are reset, disabling interrupts */ ++ /* when an NMI occurs, iff1 is reset. iff2 is left unchanged */ ++ ++ uint8_t d; ++ switch (env->imode) { ++ case 0: ++ /* XXX: assuming 0xff on data bus */ ++ case 1: ++ env->pc = 0x0038; ++ break; ++ case 2: ++ /* XXX: assuming 0xff on data bus */ ++ d = 0xff; ++ env->pc = lduw_kernel((env->regs[R_I] << 8) | d); ++ break; ++ } ++} ++ ++/* ++ * Signal an interruption. It is executed in the main CPU loop. ++ * is_int is TRUE if coming from the int instruction. next_eip is the ++ * EIP value AFTER the interrupt instruction. It is only relevant if ++ * is_int is TRUE. ++ */ ++void raise_interrupt(int intno, int is_int, int error_code, ++ int next_eip_addend) ++{ ++ env->exception_index = intno; ++ env->error_code = error_code; ++ env->exception_is_int = is_int; ++ env->exception_next_pc = env->pc + next_eip_addend; ++ cpu_loop_exit(); ++} ++ ++/* same as raise_exception_err, but do not restore global registers */ ++static void raise_exception_err_norestore(int exception_index, int error_code) ++{ ++ env->exception_index = exception_index; ++ env->error_code = error_code; ++ env->exception_is_int = 0; ++ env->exception_next_pc = 0; ++ longjmp(env->jmp_env, 1); ++} ++ ++/* shortcuts to generate exceptions */ ++ ++void (raise_exception_err)(int exception_index, int error_code) ++{ ++ raise_interrupt(exception_index, 0, error_code, 0); ++} ++ ++void raise_exception(int exception_index) ++{ ++ raise_interrupt(exception_index, 0, 0, 0); ++} ++ ++void helper_hlt(void) ++{ ++ env->halted = 1; ++ env->hflags &= ~HF_INHIBIT_IRQ_MASK; /* needed if sti is just before */ ++ env->hflags |= HF_HALTED_MASK; ++ env->exception_index = EXCP_HLT; ++ cpu_loop_exit(); ++} ++ ++void helper_monitor(void) ++{ ++} ++ ++void helper_mwait(void) ++{ ++} ++ ++#if !defined(CONFIG_USER_ONLY) ++ ++#define MMUSUFFIX _mmu ++#ifdef __s390__ ++# define GETPC() ((void*)((unsigned long)__builtin_return_address(0) & 0x7fffffffUL)) ++#else ++# define GETPC() (__builtin_return_address(0)) ++#endif ++ ++#define SHIFT 0 ++#include "softmmu_template.h" ++ ++#define SHIFT 1 ++#include "softmmu_template.h" ++ ++#define SHIFT 2 ++#include "softmmu_template.h" ++ ++#define SHIFT 3 ++#include "softmmu_template.h" ++ ++#endif ++ ++/* try to fill the TLB and return an exception if error. If retaddr is ++ NULL, it means that the function was called in C code (i.e. not ++ from generated code or from helper.c) */ ++/* XXX: fix it to restore all registers */ ++void tlb_fill(target_ulong addr, int is_write, int is_user, void *retaddr) ++{ ++ TranslationBlock *tb; ++ int ret; ++ unsigned long pc; ++ CPUZ80State *saved_env; ++ ++ /* XXX: hack to restore env in all cases, even if not called from ++ generated code */ ++ saved_env = env; ++ env = cpu_single_env; ++ ++ ret = cpu_z80_handle_mmu_fault(env, addr, is_write, is_user, 1); ++ if (ret) { ++ if (retaddr) { ++ /* now we have a real cpu fault */ ++ pc = (unsigned long)retaddr; ++ tb = tb_find_pc(pc); ++ if (tb) { ++ /* the PC is inside the translated code. It means that we have ++ a virtual CPU fault */ ++ cpu_restore_state(tb, env, pc, NULL); ++ } ++ } ++ if (retaddr) ++ raise_exception_err(env->exception_index, env->error_code); ++ else ++ raise_exception_err_norestore(env->exception_index, env->error_code); ++ } ++ env = saved_env; ++} ++ ++void helper_in_debug(int port) ++{ ++// printf("IN with port %02x\n", port); ++} ++ ++void helper_dump_registers(int pc) ++{ ++ int fl = env->regs[R_F]; ++ printf("--------------\n" ++ "AF =%04x BC =%04x DE =%04x HL =%04x IX=%04x\n" ++ "AF'=%04x BC'=%04x DE'=%04x HL'=%04x IY=%04x\n" ++ "PC =%04x SP =%04x F=[%c%c%c%c%c%c%c%c]\n" ++ "IM=%i IFF1=%i IFF2=%i I=%02x R=%02x\n", ++ (env->regs[R_A] << 8) | env->regs[R_F], ++ env->regs[R_BC], ++ env->regs[R_DE], ++ env->regs[R_HL], ++ env->regs[R_IX], ++ env->regs[R_AFX], ++ env->regs[R_BCX], ++ env->regs[R_DEX], ++ env->regs[R_HLX], ++ env->regs[R_IY], ++ pc == -1 ? env->pc : pc, ++ env->regs[R_SP], ++ fl & 0x80 ? 'S' : '-', ++ fl & 0x40 ? 'Z' : '-', ++ fl & 0x20 ? '5' : '-', ++ fl & 0x10 ? 'H' : '-', ++ fl & 0x08 ? '3' : '-', ++ fl & 0x04 ? 'P' : '-', ++ fl & 0x02 ? 'N' : '-', ++ fl & 0x01 ? 'C' : '-', ++ env->imode, env->iff1, env->iff2, env->regs[R_I], env->regs[R_R]); ++} +--- qemu/target-z80/helper2.c ++++ qemu/target-z80/helper2.c @@ -0,0 +1,170 @@ +/* + * Z80 helpers (without register variable usage) @@ -1785,289 +2033,8 @@ diff --exclude='*.orig' --exclude=CVS -ruN qemu/target-z80/helper2.c qemu-z80/ta + paddr = (pte & TARGET_PAGE_MASK) + page_offset; + return paddr; +} -diff --exclude='*.orig' --exclude=CVS -ruN qemu/target-z80/helper.c qemu-z80/target-z80/helper.c ---- qemu/target-z80/helper.c 1970-01-01 01:00:00.000000000 +0100 -+++ qemu-z80/target-z80/helper.c 2007-07-05 18:38:49.000000000 +0200 -@@ -0,0 +1,276 @@ -+/* -+ * Z80 helpers -+ * -+ * Copyright (c) 2007 Stuart Brady -+ * Copyright (c) 2003 Fabrice Bellard -+ * -+ * This library is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU Lesser General Public -+ * License as published by the Free Software Foundation; either -+ * version 2 of the License, or (at your option) any later version. -+ * -+ * This library is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * Lesser General Public License for more details. -+ * -+ * You should have received a copy of the GNU Lesser General Public -+ * License along with this library; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -+ */ -+#include "exec.h" -+ -+//#define DEBUG_PCALL -+ -+const uint8_t parity_table[256] = { -+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, -+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, -+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, -+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, -+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, -+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, -+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, -+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, -+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, -+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, -+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, -+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, -+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, -+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, -+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, -+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, -+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, -+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, -+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, -+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, -+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, -+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, -+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, -+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, -+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, -+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, -+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, -+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, -+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, -+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, -+ CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, -+ 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P, -+}; -+ -+/* modulo 17 table */ -+const uint8_t rclw_table[32] = { -+ 0, 1, 2, 3, 4, 5, 6, 7, -+ 8, 9,10,11,12,13,14,15, -+ 16, 0, 1, 2, 3, 4, 5, 6, -+ 7, 8, 9,10,11,12,13,14, -+}; -+ -+/* modulo 9 table */ -+const uint8_t rclb_table[32] = { -+ 0, 1, 2, 3, 4, 5, 6, 7, -+ 8, 0, 1, 2, 3, 4, 5, 6, -+ 7, 8, 0, 1, 2, 3, 4, 5, -+ 6, 7, 8, 0, 1, 2, 3, 4, -+}; -+ -+ -+/* thread support */ -+ -+spinlock_t global_cpu_lock = SPIN_LOCK_UNLOCKED; -+ -+void cpu_lock(void) -+{ -+ spin_lock(&global_cpu_lock); -+} -+ -+void cpu_unlock(void) -+{ -+ spin_unlock(&global_cpu_lock); -+} -+ -+void do_interrupt(CPUZ80State *env) -+{ -+// printf("z80: do_interrupt()\n"); -+ -+ if (!env->iff1) -+ return; -+ -+ env->iff1 = 0; -+ env->iff2 = 0; /* XXX: Unchanged for NMI */ -+ -+ { -+ target_ulong sp; -+ sp = (uint16_t)(env->regs[R_SP] - 2); -+ env->regs[R_SP] = sp; -+ stw_kernel(sp, env->pc); -+ } -+ -+ /* IM0 = execute data on bus (0xff == rst $38) */ -+ /* IM1 = execute rst $38 (ROM uses this)*/ -+ /* IM2 = indirect jump -- address is held at (I << 8) | DATA */ -+ -+ /* value on data bus is 0xff for the zx spectrum */ -+ -+ /* when an interrupt occurs, iff1 and iff2 are reset, disabling interrupts */ -+ /* when an NMI occurs, iff1 is reset. iff2 is left unchanged */ -+ -+ uint8_t d; -+ switch (env->imode) { -+ case 0: -+ /* XXX: assuming 0xff on data bus */ -+ case 1: -+ env->pc = 0x0038; -+ break; -+ case 2: -+ /* XXX: assuming 0xff on data bus */ -+ d = 0xff; -+ env->pc = lduw_kernel((env->regs[R_I] << 8) | d); -+ break; -+ } -+} -+ -+/* -+ * Signal an interruption. It is executed in the main CPU loop. -+ * is_int is TRUE if coming from the int instruction. next_eip is the -+ * EIP value AFTER the interrupt instruction. It is only relevant if -+ * is_int is TRUE. -+ */ -+void raise_interrupt(int intno, int is_int, int error_code, -+ int next_eip_addend) -+{ -+ env->exception_index = intno; -+ env->error_code = error_code; -+ env->exception_is_int = is_int; -+ env->exception_next_pc = env->pc + next_eip_addend; -+ cpu_loop_exit(); -+} -+ -+/* same as raise_exception_err, but do not restore global registers */ -+static void raise_exception_err_norestore(int exception_index, int error_code) -+{ -+ env->exception_index = exception_index; -+ env->error_code = error_code; -+ env->exception_is_int = 0; -+ env->exception_next_pc = 0; -+ longjmp(env->jmp_env, 1); -+} -+ -+/* shortcuts to generate exceptions */ -+ -+void (raise_exception_err)(int exception_index, int error_code) -+{ -+ raise_interrupt(exception_index, 0, error_code, 0); -+} -+ -+void raise_exception(int exception_index) -+{ -+ raise_interrupt(exception_index, 0, 0, 0); -+} -+ -+void helper_hlt(void) -+{ -+ env->halted = 1; -+ env->hflags &= ~HF_INHIBIT_IRQ_MASK; /* needed if sti is just before */ -+ env->hflags |= HF_HALTED_MASK; -+ env->exception_index = EXCP_HLT; -+ cpu_loop_exit(); -+} -+ -+void helper_monitor(void) -+{ -+} -+ -+void helper_mwait(void) -+{ -+} -+ -+#if !defined(CONFIG_USER_ONLY) -+ -+#define MMUSUFFIX _mmu -+#define GETPC() (__builtin_return_address(0)) -+ -+#define SHIFT 0 -+#include "softmmu_template.h" -+ -+#define SHIFT 1 -+#include "softmmu_template.h" -+ -+#define SHIFT 2 -+#include "softmmu_template.h" -+ -+#define SHIFT 3 -+#include "softmmu_template.h" -+ -+#endif -+ -+/* try to fill the TLB and return an exception if error. If retaddr is -+ NULL, it means that the function was called in C code (i.e. not -+ from generated code or from helper.c) */ -+/* XXX: fix it to restore all registers */ -+void tlb_fill(target_ulong addr, int is_write, int is_user, void *retaddr) -+{ -+ TranslationBlock *tb; -+ int ret; -+ unsigned long pc; -+ CPUZ80State *saved_env; -+ -+ /* XXX: hack to restore env in all cases, even if not called from -+ generated code */ -+ saved_env = env; -+ env = cpu_single_env; -+ -+ ret = cpu_z80_handle_mmu_fault(env, addr, is_write, is_user, 1); -+ if (ret) { -+ if (retaddr) { -+ /* now we have a real cpu fault */ -+ pc = (unsigned long)retaddr; -+ tb = tb_find_pc(pc); -+ if (tb) { -+ /* the PC is inside the translated code. It means that we have -+ a virtual CPU fault */ -+ cpu_restore_state(tb, env, pc, NULL); -+ } -+ } -+ if (retaddr) -+ raise_exception_err(env->exception_index, env->error_code); -+ else -+ raise_exception_err_norestore(env->exception_index, env->error_code); -+ } -+ env = saved_env; -+} -+ -+void helper_in_debug(int port) -+{ -+// printf("IN with port %02x\n", port); -+} -+ -+void helper_dump_registers(int pc) -+{ -+ int fl = env->regs[R_F]; -+ printf("--------------\n" -+ "AF =%04x BC =%04x DE =%04x HL =%04x IX=%04x\n" -+ "AF'=%04x BC'=%04x DE'=%04x HL'=%04x IY=%04x\n" -+ "PC =%04x SP =%04x F=[%c%c%c%c%c%c%c%c]\n" -+ "IM=%i IFF1=%i IFF2=%i I=%02x R=%02x\n", -+ (env->regs[R_A] << 8) | env->regs[R_F], -+ env->regs[R_BC], -+ env->regs[R_DE], -+ env->regs[R_HL], -+ env->regs[R_IX], -+ env->regs[R_AFX], -+ env->regs[R_BCX], -+ env->regs[R_DEX], -+ env->regs[R_HLX], -+ env->regs[R_IY], -+ pc == -1 ? env->pc : pc, -+ env->regs[R_SP], -+ fl & 0x80 ? 'S' : '-', -+ fl & 0x40 ? 'Z' : '-', -+ fl & 0x20 ? '5' : '-', -+ fl & 0x10 ? 'H' : '-', -+ fl & 0x08 ? '3' : '-', -+ fl & 0x04 ? 'P' : '-', -+ fl & 0x02 ? 'N' : '-', -+ fl & 0x01 ? 'C' : '-', -+ env->imode, env->iff1, env->iff2, env->regs[R_I], env->regs[R_R]); -+} -diff --exclude='*.orig' --exclude=CVS -ruN qemu/target-z80/op.c qemu-z80/target-z80/op.c ---- qemu/target-z80/op.c 1970-01-01 01:00:00.000000000 +0100 -+++ qemu-z80/target-z80/op.c 2007-07-05 18:03:12.000000000 +0200 +--- qemu/target-z80/op.c ++++ qemu/target-z80/op.c @@ -0,0 +1,1175 @@ +/* + * Z80 micro operations @@ -3244,76 +3211,8 @@ diff --exclude='*.orig' --exclude=CVS -ruN qemu/target-z80/op.c qemu-z80/target- +{ + cpu_unlock(); +} -diff --exclude='*.orig' --exclude=CVS -ruN qemu/target-z80/opreg_template2.h qemu-z80/target-z80/opreg_template2.h ---- qemu/target-z80/opreg_template2.h 1970-01-01 01:00:00.000000000 +0100 -+++ qemu-z80/target-z80/opreg_template2.h 2007-07-05 18:03:12.000000000 +0200 -@@ -0,0 +1,63 @@ -+/* -+ * Z80 micro operations (templates for various register related -+ * operations) -+ * -+ * Copyright (c) 2007 Stuart Brady -+ * Copyright (c) 2003 Fabrice Bellard -+ * -+ * This library is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU Lesser General Public -+ * License as published by the Free Software Foundation; either -+ * version 2 of the License, or (at your option) any later version. -+ * -+ * This library is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * Lesser General Public License for more details. -+ * -+ * You should have received a copy of the GNU Lesser General Public -+ * License along with this library; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -+ */ -+ -+void OPPROTO glue(op_movw_T0,REGPAIRNAME)(void) -+{ -+ T0 = (REGHIGH << 8) | REGLOW; -+} -+ -+void OPPROTO glue(op_movb_T0,REGHIGHNAME)(void) -+{ -+ T0 = REGHIGH; -+} -+ -+void OPPROTO glue(op_movb_T0,REGLOWNAME)(void) -+{ -+ T0 = REGLOW; -+} -+ -+void OPPROTO glue(op_movw_T1,REGPAIRNAME)(void) -+{ -+ T1 = (REGHIGH << 8) | REGLOW; -+} -+ -+void OPPROTO glue(glue(op_movw,REGPAIRNAME),_T0)(void) -+{ -+ REGHIGH = (uint8_t)(T0 >> 8); -+ REGLOW = (uint8_t)T0; -+} -+ -+void OPPROTO glue(glue(op_movb,REGHIGHNAME),_T0)(void) -+{ -+ REGHIGH = (uint8_t)T0; -+} -+ -+void OPPROTO glue(glue(op_movb,REGLOWNAME),_T0)(void) -+{ -+ REGLOW = (uint8_t)T0; -+} -+ -+void OPPROTO glue(glue(op_movw,REGPAIRNAME),_T1)(void) -+{ -+ REGHIGH = (uint16_t)(T1 >> 8); -+ REGLOW = (uint16_t)T1; -+} -diff --exclude='*.orig' --exclude=CVS -ruN qemu/target-z80/opreg_template.h qemu-z80/target-z80/opreg_template.h ---- qemu/target-z80/opreg_template.h 1970-01-01 01:00:00.000000000 +0100 -+++ qemu-z80/target-z80/opreg_template.h 2007-07-05 18:03:12.000000000 +0200 +--- qemu/target-z80/opreg_template.h ++++ qemu/target-z80/opreg_template.h @@ -0,0 +1,74 @@ +/* + * Z80 micro operations (templates for various register related @@ -3389,9 +3288,74 @@ diff --exclude='*.orig' --exclude=CVS -ruN qemu/target-z80/opreg_template.h qemu +{ + REG = (uint16_t)T1; +} -diff --exclude='*.orig' --exclude=CVS -ruN qemu/target-z80/ops_mem.h qemu-z80/target-z80/ops_mem.h ---- qemu/target-z80/ops_mem.h 1970-01-01 01:00:00.000000000 +0100 -+++ qemu-z80/target-z80/ops_mem.h 2007-07-05 18:03:12.000000000 +0200 +--- qemu/target-z80/opreg_template2.h ++++ qemu/target-z80/opreg_template2.h +@@ -0,0 +1,63 @@ ++/* ++ * Z80 micro operations (templates for various register related ++ * operations) ++ * ++ * Copyright (c) 2007 Stuart Brady ++ * Copyright (c) 2003 Fabrice Bellard ++ * ++ * This library is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU Lesser General Public ++ * License as published by the Free Software Foundation; either ++ * version 2 of the License, or (at your option) any later version. ++ * ++ * This library is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * Lesser General Public License for more details. ++ * ++ * You should have received a copy of the GNU Lesser General Public ++ * License along with this library; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ */ ++ ++void OPPROTO glue(op_movw_T0,REGPAIRNAME)(void) ++{ ++ T0 = (REGHIGH << 8) | REGLOW; ++} ++ ++void OPPROTO glue(op_movb_T0,REGHIGHNAME)(void) ++{ ++ T0 = REGHIGH; ++} ++ ++void OPPROTO glue(op_movb_T0,REGLOWNAME)(void) ++{ ++ T0 = REGLOW; ++} ++ ++void OPPROTO glue(op_movw_T1,REGPAIRNAME)(void) ++{ ++ T1 = (REGHIGH << 8) | REGLOW; ++} ++ ++void OPPROTO glue(glue(op_movw,REGPAIRNAME),_T0)(void) ++{ ++ REGHIGH = (uint8_t)(T0 >> 8); ++ REGLOW = (uint8_t)T0; ++} ++ ++void OPPROTO glue(glue(op_movb,REGHIGHNAME),_T0)(void) ++{ ++ REGHIGH = (uint8_t)T0; ++} ++ ++void OPPROTO glue(glue(op_movb,REGLOWNAME),_T0)(void) ++{ ++ REGLOW = (uint8_t)T0; ++} ++ ++void OPPROTO glue(glue(op_movw,REGPAIRNAME),_T1)(void) ++{ ++ REGHIGH = (uint16_t)(T1 >> 8); ++ REGLOW = (uint16_t)T1; ++} +--- qemu/target-z80/ops_mem.h ++++ qemu/target-z80/ops_mem.h @@ -0,0 +1,59 @@ +void OPPROTO glue(glue(op_ldub, MEMSUFFIX), _T0_A0)(void) +{ @@ -3452,9 +3416,8 @@ diff --exclude='*.orig' --exclude=CVS -ruN qemu/target-z80/ops_mem.h qemu-z80/ta +} + +#undef MEMSUFFIX -diff --exclude='*.orig' --exclude=CVS -ruN qemu/target-z80/translate.c qemu-z80/target-z80/translate.c ---- qemu/target-z80/translate.c 1970-01-01 01:00:00.000000000 +0100 -+++ qemu-z80/target-z80/translate.c 2007-07-05 18:03:12.000000000 +0200 +--- qemu/target-z80/translate.c ++++ qemu/target-z80/translate.c @@ -0,0 +1,1600 @@ +/* + * Z80 translation @@ -5056,18 +5019,9 @@ diff --exclude='*.orig' --exclude=CVS -ruN qemu/target-z80/translate.c qemu-z80/ + return gen_intermediate_code_internal(env, tb, 1); +} + -diff --exclude='*.orig' --exclude=CVS -ruN qemu/vl.c qemu-z80/vl.c ---- qemu/vl.c 2007-07-02 17:03:13.000000000 +0200 -+++ qemu-z80/vl.c 2007-07-05 18:09:48.000000000 +0200 -@@ -5595,6 +5595,7 @@ - qemu_get_be64s(f, &env->fmask); - qemu_get_be64s(f, &env->kernelgsbase); - #endif -+ - if (version_id >= 4) - qemu_get_be32s(f, &env->smbase); - -@@ -5846,6 +5847,19 @@ +--- qemu/vl.c ++++ qemu/vl.c +@@ -6253,6 +6253,19 @@ return 0; } @@ -5087,19 +5041,18 @@ diff --exclude='*.orig' --exclude=CVS -ruN qemu/vl.c qemu-z80/vl.c #else #warning No CPU save/restore functions -@@ -6997,6 +7011,8 @@ - #elif defined(TARGET_M68K) - qemu_register_machine(&mcf5208evb_machine); +@@ -7420,6 +7433,8 @@ qemu_register_machine(&an5206_machine); + #elif defined(TARGET_CRIS) + qemu_register_machine(&bareetraxfs_machine); +#elif defined(TARGET_Z80) + qemu_register_machine(&z80pc_machine); #else #error unsupported CPU #endif -diff --exclude='*.orig' --exclude=CVS -ruN qemu/vl.h qemu-z80/vl.h ---- qemu/vl.h 2007-06-30 19:32:17.000000000 +0200 -+++ qemu-z80/vl.h 2007-07-05 18:03:12.000000000 +0200 -@@ -959,6 +959,11 @@ +--- qemu/vl.h ++++ qemu/vl.h +@@ -967,6 +967,11 @@ void pci_vmsvga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, unsigned long vga_ram_offset, int vga_ram_size); @@ -5111,7 +5064,7 @@ diff --exclude='*.orig' --exclude=CVS -ruN qemu/vl.h qemu-z80/vl.h /* sdl.c */ void sdl_display_init(DisplayState *ds, int full_screen, int no_frame); -@@ -1150,6 +1155,9 @@ +@@ -1175,6 +1180,9 @@ extern QEMUMachine isapc_machine; extern int fd_bootchk; @@ -5121,9 +5074,8 @@ diff --exclude='*.orig' --exclude=CVS -ruN qemu/vl.h qemu-z80/vl.h void ioport_set_a20(int enable); int ioport_get_a20(void); -diff --exclude='*.orig' --exclude=CVS -ruN qemu/z80-dis.c qemu-z80/z80-dis.c ---- qemu/z80-dis.c 1970-01-01 01:00:00.000000000 +0100 -+++ qemu-z80/z80-dis.c 2007-07-05 18:03:12.000000000 +0200 +--- qemu/z80-dis.c ++++ qemu/z80-dis.c @@ -0,0 +1,621 @@ +/* Print Z80 and R800 instructions + Copyright 2005 Free Software Foundation, Inc. diff --git a/qemu.changes b/qemu.changes index 09c846b1..50d779e9 100644 --- a/qemu.changes +++ b/qemu.changes @@ -1,3 +1,15 @@ +------------------------------------------------------------------- +Tue Nov 13 15:54:45 CET 2007 - uli@suse.de + +- update -> current CVS: + - Read-only support for Parallels disk images (Alex Beregszaszi) + - CRIS emulation (Edgar E. Iglesias) + - SPARC32PLUS execution support (Blue Swirl) + - MIPS mipssim pseudo machine (Thiemo Seufer) + - Strace for Linux userland emulation (Stuart Anderson, Thayne Harbaugh) + - OMAP310 MPU emulation plus Palm T|E machine (Andrzej Zaborowski) + - ARM v6, v7, NEON SIMD and SMP emulation (Paul Brook/CodeSourcery) + ------------------------------------------------------------------- Fri Oct 12 01:30:23 CEST 2007 - ro@suse.de diff --git a/qemu.spec b/qemu.spec index c91f7970..4cb028b9 100644 --- a/qemu.spec +++ b/qemu.spec @@ -13,17 +13,16 @@ Name: qemu BuildRequires: SDL-devel bison e2fsprogs-devel Url: http://fabrice.bellard.free.fr/qemu/ -License: BSD 3-Clause; GPL v2 or later; LGPL v2 or later; X11/MIT +License: BSD 3-Clause; GPL v2 or later; LGPL v2.1 or later; X11/MIT Group: System/Emulators/PC Summary: Universal CPU emulator Version: 0.9.0.cvs -Release: 37 +Release: 50 Source: %name-%version.tar.bz2 #Patch400: qemu-0.7.0-gcc4-dot-syms.patch #Patch401: qemu-0.8.0-gcc4-hacks.patch #Patch402: qemu-0.8.3-gcc4.patch -Patch1: qemu-0.7.0-binfmt.patch -Patch5: qemu-0.7.0-sigaltstackhack.patch +Patch1: qemu-0.9.0.cvs-binfmt.patch Patch6: qemu-0.7.0-amd64.patch Patch8: qemu-cvs-pthread.patch Patch10: linkerscripts.patch @@ -35,13 +34,11 @@ Patch37: qemu-0.9.0-kvm.patch Patch38: qemu-0.9.0-kvm-bios.patch Patch39: qemu-0.9.0-kvm-kqemu-window-caption.patch Patch48: qemu-z80.diff -Patch49: qemu-cvs-img.patch Patch50: qemu-cvs-newpath.patch Patch51: qemu-cvs-tls.patch Patch52: qemu-cvs-futex.patch Patch53: qemu-cvs-sched_getaffinity.patch Patch54: qemu-cvs-mplayer.patch -Patch55: qemu-cvs-netlink.patch Patch56: qemu-cvs-ipc.patch Patch57: qemu-cvs-ipc_semop.patch Patch58: qemu-cvs-ioctl_debug.patch @@ -58,16 +55,8 @@ Patch68: qemu-0.8.3-gcc4.patch Patch69: qemu-cvs-ia64.patch Patch70: qemu-m68k.diff Patch71: qemu-s390.patch -Patch72: qemu-cvs-atapi.patch -Patch73: qemu-cvs-svm.patch -Patch74: qemu-cvs-cache-info.patch -Patch76: qemu-cvs-eepro100-flow-control.patch -Patch77: qemu-cvs-fdc.patch -Patch78: qemu-cvs-ide-allow-more-powermgmt.patch -Patch79: qemu-cvs-ide-dvd.patch -Patch80: qemu-cvs-raw-io-reliability.patch -Patch81: qemu-cvs-usb-isoch.patch Patch82: qemu-cvs-svm2.patch +Patch83: qemu-cvs-ppcspe.patch Source200: kvm_bios.bin Source201: zx-rom.bin Source202: COPYING.zx-rom @@ -112,7 +101,7 @@ Patch701: gcc-3.3.5.dif # this is to make lint happy Source300: rpmlintrc BuildRoot: %{_tmppath}/%{name}-%{version}-build -ExclusiveArch: %ix86 ppc sparc x86_64 ia64 s390 +ExclusiveArch: %ix86 ppc sparc x86_64 ia64 s390 ppc64 %description QEMU is an extremely well-performing CPU emulator that allows you to @@ -128,12 +117,11 @@ Authors: Fabrice Bellard %prep -%setup -q -a601 +%setup -n qemu -q -a601 #%patch400 -p1 #%patch401 -p1 #%patch402 -p1 %patch1 -p1 -%patch5 %patch6 %patch8 -p1 %patch10 @@ -145,13 +133,11 @@ Authors: #%patch38 -p1 #%patch39 -p1 %patch48 -p1 -%patch49 %patch50 -p1 %patch51 -p1 %patch52 -p1 %patch53 -p1 %patch54 -p1 -%patch55 -p1 %patch56 -p1 %patch57 -p1 %patch58 -p1 @@ -167,20 +153,12 @@ Authors: %patch69 %patch70 %patch71 -p1 -%patch72 -p1 -%patch73 -p1 -%patch74 -%patch76 -# needs fixing -%patch77 -p1 -%patch78 -p1 -%patch79 -%patch80 -p1 -%patch81 -p2 %ifarch ia64 ppc64 #this is the dyngen for gcc4 patch (does not work on x86) %patch68 -p1 %endif +%patch83 +%if 1 cd gcc-3.3.5 %patch600 %patch601 @@ -215,6 +193,7 @@ cd gcc-3.3.5 %patch700 -p1 %patch701 cd .. +%endif %build cp -p %SOURCE200 pc-bios/ @@ -277,7 +256,7 @@ make clean ./configure --prefix=/usr \ --interp-prefix=/usr/share/qemu/qemu-i386 \ %ifarch s390 # alpha-linux-user broken (ICE) - --target-list="i386-linux-user arm-linux-user armeb-linux-user sparc-linux-user ppc-linux-user mips-linux-user mipsel-linux-user m68k-linux-user" \ + --target-list="i386-linux-user arm-linux-user armeb-linux-user sparc-linux-user sparc64-linux-user sparc32plus-linux-user mips-linux-user mipsel-linux-user m68k-linux-user sh4-linux-user ppc-linux-user ppc64-linux-user ppc64abi32-linux-user x86_64-linux-user cris-linux-user" \ %else --enable-linux-user \ %endif @@ -285,6 +264,8 @@ make clean --static --disable-gcc-check \ --extra-cflags="$QEMU_OPT_FLAGS" make %{?jobs:-j%{jobs}} +mv ppc64abi32-linux-user/qemu-ppc64 ppc64abi32-linux-user/qemu-ppc64abi32 +make qemu-img %install install -d -m 755 $RPM_BUILD_ROOT/usr/bin @@ -328,6 +309,15 @@ rm -rf %{gcc33tmp} %dir /emul/ia32-linux %endif %changelog +* Tue Nov 13 2007 - uli@suse.de +- update -> current CVS: + - Read-only support for Parallels disk images (Alex Beregszaszi) + - CRIS emulation (Edgar E. Iglesias) + - SPARC32PLUS execution support (Blue Swirl) + - MIPS mipssim pseudo machine (Thiemo Seufer) + - Strace for Linux userland emulation (Stuart Anderson, Thayne Harbaugh) + - OMAP310 MPU emulation plus Palm T|E machine (Andrzej Zaborowski) + - ARM v6, v7, NEON SIMD and SMP emulation (Paul Brook/CodeSourcery) * Fri Oct 12 2007 - ro@suse.de - hack to fix build: undef DEBUG_BLOCK for now * Fri Sep 28 2007 - agraf@suse.de diff --git a/rpmlintrc b/rpmlintrc index 719aa890..020dc21b 100644 --- a/rpmlintrc +++ b/rpmlintrc @@ -1,5 +1,5 @@ # This line is mandatory to access the configuration functions from Config import * -addFilter("qemu arch-dependent-file-in-usr-share") +addFilter("arch-dependent-file-in-usr-share")