42aeb20e68
Update to v5.0.0 OBS-URL: https://build.opensuse.org/request/show/798748 OBS-URL: https://build.opensuse.org/package/show/Virtualization/qemu?expand=0&rev=547
31 lines
1.0 KiB
Diff
31 lines
1.0 KiB
Diff
From: Bruce Rogers <brogers@suse.com>
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Date: Wed, 22 Apr 2020 08:50:55 -0600
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Subject: gcc10: maybe-uninitialized
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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References: boo#1169728
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gcc 10 needs some help to understand that indeed cpu_irqs[0] does get
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initialized in all cases. In this case an assert is sufficient.
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Reported-by: Martin Liška <mliska@suse.cz>
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Signed-off-by: Bruce Rogers <brogers@suse.com>
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---
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hw/openrisc/openrisc_sim.c | 1 +
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1 file changed, 1 insertion(+)
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diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
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index d08ce6181199aa1e75a7c5bc2157..02f5259e5e33272b17bba701f5d5 100644
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--- a/hw/openrisc/openrisc_sim.c
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+++ b/hw/openrisc/openrisc_sim.c
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@@ -134,6 +134,7 @@ static void openrisc_sim_init(MachineState *machine)
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int n;
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unsigned int smp_cpus = machine->smp.cpus;
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+ assert(smp_cpus >= 1 && smp_cpus <= 2);
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for (n = 0; n < smp_cpus; n++) {
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cpu = OPENRISC_CPU(cpu_create(machine->cpu_type));
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if (cpu == NULL) {
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