a447edb5e5
- Include upstream patches targeted for the next stable release (bug fixes only) block-io-fix-bdrv_co_do_copy_on_readv.patch compat-disable-edid-on-correct-virtio-gp.patch target-ppc-Fix-rlwinm-on-ppc64.patch vhost-correctly-turn-on-VIRTIO_F_IOMMU_P.patch - s390x Protected Virtualization support - start and control guest in secure mode. (note: binary patch from patch series dropped since for s390x we rebuild the patched binary anyways) (bsc#1167075 jsc#SLE-7407) s390-sclp-improve-special-wait-psw-logic.patch s390x-Add-missing-vcpu-reset-functions.patch s390x-Add-SIDA-memory-ops.patch s390x-Add-unpack-facility-feature-to-GA1.patch s390x-Beautify-diag308-handling.patch s390x-Don-t-do-a-normal-reset-on-the-ini.patch s390x-ipl-Consolidate-iplb-validity-chec.patch s390x-kvm-Make-kvm_sclp_service_call-voi.patch s390x-Move-clear-reset.patch s390x-Move-diagnose-308-subcodes-and-rcs.patch s390x-Move-initial-reset.patch s390x-Move-reset-normal-to-shared-reset-.patch s390x-protvirt-Add-migration-blocker.patch s390x-protvirt-Disable-address-checks-fo.patch s390x-protvirt-Handle-SIGP-store-status-.patch s390x-protvirt-Inhibit-balloon-when-swit.patch s390x-protvirt-KVM-intercept-changes.patch s390x-protvirt-Move-diag-308-data-over-S.patch s390x-protvirt-Move-IO-control-structure.patch s390x-protvirt-Move-STSI-data-over-SIDAD.patch s390x-protvirt-SCLP-interpretation.patch s390x-protvirt-Set-guest-IPL-PSW.patch s390x-protvirt-Support-unpack-facility.patch Sync-pv.patch OBS-URL: https://build.opensuse.org/request/show/787000 OBS-URL: https://build.opensuse.org/package/show/Virtualization/qemu?expand=0&rev=538
60 lines
2.3 KiB
Diff
60 lines
2.3 KiB
Diff
From: Vitaly Chikunov <vt@altlinux.org>
|
|
Date: Mon, 9 Mar 2020 23:45:57 +0300
|
|
Subject: target/ppc: Fix rlwinm on ppc64
|
|
|
|
Git-commit: 94f040aaecf4e41cc68991b80204b1b6886bbdd0
|
|
|
|
rlwinm cannot just AND with Mask if shift value is zero on ppc64 when
|
|
Mask Begin is greater than Mask End and high bits are set to 1.
|
|
|
|
Note that PowerISA 3.0B says that for `rlwinm' ROTL32 is used, and
|
|
ROTL32 is defined (in 3.3.14) so that rotated value should have two
|
|
copies of lower word of the source value.
|
|
|
|
This seems to be another incarnation of the fix from 820724d170
|
|
("target-ppc: Fix rlwimi, rlwinm, rlwnm again"), except I leave
|
|
optimization when Mask value is less than 32 bits.
|
|
|
|
Fixes: 7b4d326f47 ("target-ppc: Use the new deposit and extract ops")
|
|
Cc: qemu-stable@nongnu.org
|
|
Signed-off-by: Vitaly Chikunov <vt@altlinux.org>
|
|
Message-Id: <20200309204557.14836-1-vt@altlinux.org>
|
|
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
|
|
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
|
|
Signed-off-by: Bruce Rogers <brogers@suse.com>
|
|
---
|
|
target/ppc/translate.c | 20 +++++++++++---------
|
|
1 file changed, 11 insertions(+), 9 deletions(-)
|
|
|
|
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
|
|
index f5fe5d06118a7c86d11f38767fab..f87f6eeaf7d988896c61b025320a 100644
|
|
--- a/target/ppc/translate.c
|
|
+++ b/target/ppc/translate.c
|
|
@@ -1938,15 +1938,17 @@ static void gen_rlwinm(DisasContext *ctx)
|
|
me += 32;
|
|
#endif
|
|
mask = MASK(mb, me);
|
|
- if (sh == 0) {
|
|
- tcg_gen_andi_tl(t_ra, t_rs, mask);
|
|
- } else if (mask <= 0xffffffffu) {
|
|
- TCGv_i32 t0 = tcg_temp_new_i32();
|
|
- tcg_gen_trunc_tl_i32(t0, t_rs);
|
|
- tcg_gen_rotli_i32(t0, t0, sh);
|
|
- tcg_gen_andi_i32(t0, t0, mask);
|
|
- tcg_gen_extu_i32_tl(t_ra, t0);
|
|
- tcg_temp_free_i32(t0);
|
|
+ if (mask <= 0xffffffffu) {
|
|
+ if (sh == 0) {
|
|
+ tcg_gen_andi_tl(t_ra, t_rs, mask);
|
|
+ } else {
|
|
+ TCGv_i32 t0 = tcg_temp_new_i32();
|
|
+ tcg_gen_trunc_tl_i32(t0, t_rs);
|
|
+ tcg_gen_rotli_i32(t0, t0, sh);
|
|
+ tcg_gen_andi_i32(t0, t0, mask);
|
|
+ tcg_gen_extu_i32_tl(t_ra, t0);
|
|
+ tcg_temp_free_i32(t0);
|
|
+ }
|
|
} else {
|
|
#if defined(TARGET_PPC64)
|
|
tcg_gen_deposit_i64(t_ra, t_rs, t_rs, 32, 32);
|