40d6206ff1
Add note about QED format support being withdrawn. Also add a few more security fixes OBS-URL: https://build.opensuse.org/request/show/536899 OBS-URL: https://build.opensuse.org/package/show/Virtualization/qemu?expand=0&rev=372
58 lines
1.9 KiB
Diff
58 lines
1.9 KiB
Diff
From f3c7b39cec549039b89fa1c6b2ab238b4bac1a97 Mon Sep 17 00:00:00 2001
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From: Gerd Hoffmann <kraxel@redhat.com>
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Date: Wed, 18 Oct 2017 14:54:15 -0600
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Subject: [PATCH] cirrus: fix oob access in mode4and5 write functions
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Move dst calculation into the loop, so we apply the mask on each
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interation and will not overflow vga memory.
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Cc: Prasad J Pandit <pjp@fedoraproject.org>
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Reported-by: Niu Guoxiang <niuguoxiang@huawei.com>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Message-id: 20171011084314.21752-1-kraxel@redhat.com
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[BR: BSC#1063122 CVE-2017-15289]
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Signed-off-by: Bruce Rogers <brogers@suse.com
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---
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hw/display/cirrus_vga.c | 6 ++----
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1 file changed, 2 insertions(+), 4 deletions(-)
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diff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c
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index afc290ab91..077a8cb74f 100644
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--- a/hw/display/cirrus_vga.c
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+++ b/hw/display/cirrus_vga.c
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@@ -2038,15 +2038,14 @@ static void cirrus_mem_writeb_mode4and5_8bpp(CirrusVGAState * s,
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unsigned val = mem_value;
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uint8_t *dst;
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- dst = s->vga.vram_ptr + (offset &= s->cirrus_addr_mask);
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for (x = 0; x < 8; x++) {
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+ dst = s->vga.vram_ptr + ((offset + x) & s->cirrus_addr_mask);
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if (val & 0x80) {
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*dst = s->cirrus_shadow_gr1;
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} else if (mode == 5) {
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*dst = s->cirrus_shadow_gr0;
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}
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val <<= 1;
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- dst++;
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}
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memory_region_set_dirty(&s->vga.vram, offset, 8);
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}
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@@ -2060,8 +2059,8 @@ static void cirrus_mem_writeb_mode4and5_16bpp(CirrusVGAState * s,
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unsigned val = mem_value;
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uint8_t *dst;
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- dst = s->vga.vram_ptr + (offset &= s->cirrus_addr_mask);
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for (x = 0; x < 8; x++) {
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+ dst = s->vga.vram_ptr + ((offset + 2 * x) & s->cirrus_addr_mask & ~1);
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if (val & 0x80) {
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*dst = s->cirrus_shadow_gr1;
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*(dst + 1) = s->vga.gr[0x11];
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@@ -2070,7 +2069,6 @@ static void cirrus_mem_writeb_mode4and5_16bpp(CirrusVGAState * s,
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*(dst + 1) = s->vga.gr[0x10];
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}
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val <<= 1;
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- dst += 2;
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}
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memory_region_set_dirty(&s->vga.vram, offset, 16);
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}
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