Jan Engelhardt
660be9089a
OBS-URL: https://build.opensuse.org/package/show/X11:Wayland/spirv-headers?expand=0&rev=92
3359 lines
130 KiB
Diff
3359 lines
130 KiB
Diff
# Generated from: diff vulkan-sdk-1.3.275..8b246ff >this.diff
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diff --git a/.github/dependabot.yml b/.github/dependabot.yml
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new file mode 100644
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index 0000000..2390d8c
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--- /dev/null
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+++ b/.github/dependabot.yml
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@@ -0,0 +1,10 @@
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+version: 2
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+updates:
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+ - package-ecosystem: "github-actions"
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+ directory: "/"
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+ schedule:
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+ interval: "monthly"
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+ groups:
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+ github-actions:
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+ patterns:
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+ - "*"
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diff --git a/.github/workflows/presubmit.yml b/.github/workflows/presubmit.yml
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index 306f50e..d7958ca 100644
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--- a/.github/workflows/presubmit.yml
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+++ b/.github/workflows/presubmit.yml
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@@ -12,7 +12,7 @@ jobs:
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matrix:
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os: [ubuntu-latest, macos-latest, windows-latest]
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steps:
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- - uses: actions/checkout@v3
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+ - uses: actions/checkout@v4
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- name: Install Ubuntu packages
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if: matrix.os == 'ubuntu-latest'
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run: sudo apt install -y dos2unix
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@@ -42,7 +42,7 @@ jobs:
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test_cmake_min_required:
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runs-on: ubuntu-latest
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steps:
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- - uses: actions/checkout@v3
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+ - uses: actions/checkout@v4
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- uses: lukka/get-cmake@latest
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with:
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cmakeVersion: 3.14.0
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@@ -54,7 +54,7 @@ jobs:
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test_cmake_latest:
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runs-on: ubuntu-latest
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steps:
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- - uses: actions/checkout@v3
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+ - uses: actions/checkout@v4
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- uses: lukka/get-cmake@latest
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- name: CMake build
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run: |
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@@ -64,7 +64,7 @@ jobs:
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add_subdirectory:
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runs-on: ubuntu-latest
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steps:
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- - uses: actions/checkout@v3
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+ - uses: actions/checkout@v4
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- uses: lukka/get-cmake@latest
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with:
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cmakeVersion: 3.15.0
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@@ -76,7 +76,7 @@ jobs:
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find_package:
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runs-on: ubuntu-latest
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steps:
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- - uses: actions/checkout@v3
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+ - uses: actions/checkout@v4
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- uses: lukka/get-cmake@latest
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with:
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cmakeVersion: 3.15.0
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@@ -92,7 +92,7 @@ jobs:
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find_pkg_config:
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runs-on: ubuntu-latest
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steps:
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- - uses: actions/checkout@v3
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+ - uses: actions/checkout@v4
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- uses: lukka/get-cmake@latest
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with:
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cmakeVersion: 3.15.0
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@@ -109,7 +109,7 @@ jobs:
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find_pkg_config_absolute:
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runs-on: ubuntu-latest
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steps:
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- - uses: actions/checkout@v3
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+ - uses: actions/checkout@v4
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- uses: lukka/get-cmake@latest
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with:
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cmakeVersion: 3.15.0
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diff --git a/BUILD.bazel b/BUILD.bazel
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index c898ade..25634d9 100644
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--- a/BUILD.bazel
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+++ b/BUILD.bazel
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@@ -81,6 +81,11 @@ filegroup(
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srcs = ["include/spirv/unified1/extinst.nonsemantic.clspvreflection.grammar.json"],
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)
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+filegroup(
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+ name = "spirv_ext_inst_nonsemantic_vkspreflection_grammar_unified1",
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+ srcs = ["include/spirv/unified1/extinst.nonsemantic.vkspreflection.grammar.json"],
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+)
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+
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filegroup(
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name = "spirv_ext_inst_nonsemantic_debugprintf_grammar_unified1",
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srcs = ["include/spirv/unified1/extinst.nonsemantic.debugprintf.grammar.json"],
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@@ -128,6 +133,7 @@ cc_library(
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"include/spirv/unified1/GLSL.std.450.h",
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"include/spirv/unified1/NonSemanticClspvReflection.h",
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"include/spirv/unified1/NonSemanticDebugPrintf.h",
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+ "include/spirv/unified1/NonSemanticVkspReflection.h",
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"include/spirv/unified1/OpenCL.std.h",
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],
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includes = ["include"],
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diff --git a/BUILD.gn b/BUILD.gn
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index be3f43b..34294e0 100644
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--- a/BUILD.gn
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+++ b/BUILD.gn
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@@ -1,4 +1,4 @@
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-# Copyright (c) 2020 Google LLC
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+# Copyright (c) 2020-2024 Google LLC
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#
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# Permission is hereby granted, free of charge, to any person obtaining a copy
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# of this software and/or associated documentation files (the "Materials"),
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@@ -35,6 +35,7 @@ source_set("spv_headers") {
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"include/spirv/unified1/GLSL.std.450.h",
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"include/spirv/unified1/NonSemanticClspvReflection.h",
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"include/spirv/unified1/NonSemanticDebugPrintf.h",
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+ "include/spirv/unified1/NonSemanticVkspReflection.h",
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"include/spirv/unified1/OpenCL.std.h",
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"include/spirv/unified1/spirv.h",
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"include/spirv/unified1/spirv.hpp",
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diff --git a/CMakeLists.txt b/CMakeLists.txt
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index e3d76d9..b018b23 100644
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--- a/CMakeLists.txt
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+++ b/CMakeLists.txt
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@@ -1,4 +1,4 @@
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-# Copyright (c) 2015-2023 The Khronos Group Inc.
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+# Copyright (c) 2015-2024 The Khronos Group Inc.
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#
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# Permission is hereby granted, free of charge, to any person obtaining a
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# copy of this software and/or associated documentation files (the
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@@ -35,12 +35,14 @@ add_library(SPIRV-Headers INTERFACE)
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add_library(SPIRV-Headers::SPIRV-Headers ALIAS SPIRV-Headers)
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target_include_directories(SPIRV-Headers INTERFACE $<BUILD_INTERFACE:${CMAKE_CURRENT_SOURCE_DIR}/include>)
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-if (PROJECT_IS_TOP_LEVEL)
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- option(BUILD_TESTS "Build the tests")
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- if (BUILD_TESTS)
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- add_subdirectory(tests)
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- endif()
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+option(SPIRV_HEADERS_ENABLE_TESTS "Test SPIRV-Headers" ${PROJECT_IS_TOP_LEVEL})
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+option(SPIRV_HEADERS_ENABLE_INSTALL "Install SPIRV-Headers" ${PROJECT_IS_TOP_LEVEL})
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+if(SPIRV_HEADERS_ENABLE_TESTS)
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+ add_subdirectory(tests)
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+endif()
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+
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+if(SPIRV_HEADERS_ENABLE_INSTALL)
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include(GNUInstallDirs)
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include(CMakePackageConfigHelpers)
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diff --git a/LICENSE b/LICENSE
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index 47974f8..a02ace1 100644
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--- a/LICENSE
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+++ b/LICENSE
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@@ -1,4 +1,5 @@
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-Copyright (c) 2015-2018 The Khronos Group Inc.
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+Files: All files except for those called out below.
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+Copyright (c) 2015-2024 The Khronos Group Inc.
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and/or associated documentation files (the
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@@ -23,3 +24,80 @@ IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
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MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
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+
|
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+---
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+
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+Files: include/spirv/spir-v.xml
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+Copyright (c) 2015-2024 The Khronos Group Inc.
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+
|
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+Permission is hereby granted, free of charge, to any person obtaining a
|
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+copy of this software and/or associated documentation files (the
|
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+"Materials"), to deal in the Materials without restriction, including
|
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+without limitation the rights to use, copy, modify, merge, publish,
|
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+distribute, sublicense, and/or sell copies of the Materials, and to
|
|
+permit persons to whom the Materials are furnished to do so, subject to
|
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+the following conditions:
|
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+
|
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+The above copyright notice and this permission notice shall be included
|
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+in all copies or substantial portions of the Materials.
|
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+
|
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+THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
+EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
+MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
+IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
|
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+CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
|
+TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
|
+MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
|
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+
|
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+---
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+
|
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+Files: tools/buildHeaders/jsoncpp/*
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+The JsonCpp library's source code, including accompanying documentation,
|
|
+tests and demonstration applications, are licensed under the following
|
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+conditions...
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+
|
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+The author (Baptiste Lepilleur) explicitly disclaims copyright in all
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+jurisdictions which recognize such a disclaimer. In such jurisdictions,
|
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+this software is released into the Public Domain.
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+
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+In jurisdictions which do not recognize Public Domain property (e.g. Germany as of
|
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+2010), this software is Copyright (c) 2007-2010 by Baptiste Lepilleur, and is
|
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+released under the terms of the MIT License (see below).
|
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+
|
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+In jurisdictions which recognize Public Domain property, the user of this
|
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+software may choose to accept it either as 1) Public Domain, 2) under the
|
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+conditions of the MIT License (see below), or 3) under the terms of dual
|
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+Public Domain/MIT License conditions described here, as they choose.
|
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+
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+The MIT License is about as close to Public Domain as a license can get, and is
|
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+described in clear, concise terms at:
|
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+
|
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+ http://en.wikipedia.org/wiki/MIT_License
|
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+
|
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+The full text of the MIT License follows:
|
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+
|
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+========================================================================
|
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+Copyright (c) 2007-2010 Baptiste Lepilleur
|
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+
|
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+Permission is hereby granted, free of charge, to any person
|
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+obtaining a copy of this software and associated documentation
|
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+files (the "Software"), to deal in the Software without
|
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+restriction, including without limitation the rights to use, copy,
|
|
+modify, merge, publish, distribute, sublicense, and/or sell copies
|
|
+of the Software, and to permit persons to whom the Software is
|
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+furnished to do so, subject to the following conditions:
|
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+
|
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+The above copyright notice and this permission notice shall be
|
|
+included in all copies or substantial portions of the Software.
|
|
+
|
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+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
+EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
+MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
|
+NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
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+BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
|
+ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
|
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
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+SOFTWARE.
|
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+========================================================================
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+
|
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+---
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diff --git a/README.md b/README.md
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index 8c7039f..ed38828 100644
|
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--- a/README.md
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+++ b/README.md
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@@ -198,7 +198,7 @@ python3 bin/makeExtinstHeaders.py
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## License
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<a name="license"></a>
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```
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-Copyright (c) 2015-2018 The Khronos Group Inc.
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+Copyright (c) 2015-2024 The Khronos Group Inc.
|
|
|
|
Permission is hereby granted, free of charge, to any person obtaining a
|
|
copy of this software and/or associated documentation files (the
|
|
diff --git a/include/spirv/spir-v.xml b/include/spirv/spir-v.xml
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index 1305df5..4a2de83 100644
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--- a/include/spirv/spir-v.xml
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+++ b/include/spirv/spir-v.xml
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@@ -1,7 +1,7 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<registry>
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<!--
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- Copyright (c) 2015 The Khronos Group Inc.
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+ Copyright (c) 2015-2024 The Khronos Group Inc.
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|
|
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Permission is hereby granted, free of charge, to any person obtaining a
|
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copy of this software and/or associated documentation files (the
|
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@@ -91,7 +91,8 @@
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<id value="38" vendor="Meta" tool="SparkSL" comment="Contact Dunfan Lu, dunfanlu@meta.com, https://sparkar.facebook.com/ar-studio/learn/sparksl/sparksl-overview"/>
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<id value="39" vendor="SirLynix" tool="Nazara ShaderLang Compiler" comment="Contact Jérôme Leclercq, https://github.com/NazaraEngine/ShaderLang"/>
|
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<id value="40" vendor="NVIDIA" tool="Slang Compiler" comment="Contact Theresa Foley, tfoley@nvidia.com, https://github.com/shader-slang/slang/"/>
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- <unused start="41" end="0xFFFF" comment="Tool ID range reservable for future use by vendors"/>
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+ <id value="41" vendor="Zig Software Foundation" tool="Zig Compiler" comment="Contact Robin Voetter, https://github.com/Snektron"/>
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+ <unused start="42" end="0xFFFF" comment="Tool ID range reservable for future use by vendors"/>
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</ids>
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<!-- SECTION: SPIR-V Opcodes and Enumerants -->
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@@ -248,7 +249,8 @@
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<!-- Reserved FP fast math mode bits -->
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<ids type="FPFastMathMode" start="0" end="15" vendor="Khronos" comment="Reserved FPFastMathMode bits, not available to vendors - see the SPIR-V Specification"/>
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<ids type="FPFastMathMode" start="16" end="17" vendor="Intel" comment="Contact michael.kinsner@intel.com"/>
|
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- <ids type="FPFastMathMode" start="18" end="31" comment="Unreserved bits reservable for use by vendors"/>
|
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+ <ids type="FPFastMathMode" start="18" end="18" vendor="khronos" comment="Reserved FPFastMathMode bit, not available to vendors - see SPV_KHR_float_controls2"/>
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+ <ids type="FPFastMathMode" start="19" end="31" comment="Unreserved bits reservable for use by vendors"/>
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<!-- SECTION: SPIR-V Memory Operand Bit Reservations -->
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diff --git a/include/spirv/unified1/AMD_gcn_shader.h b/include/spirv/unified1/AMD_gcn_shader.h
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index 80165ae..e626a7a 100644
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--- a/include/spirv/unified1/AMD_gcn_shader.h
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+++ b/include/spirv/unified1/AMD_gcn_shader.h
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@@ -1,4 +1,4 @@
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-// Copyright (c) 2020 The Khronos Group Inc.
|
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+// Copyright (c) 2020-2024 The Khronos Group Inc.
|
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//
|
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// Permission is hereby granted, free of charge, to any person obtaining a
|
|
// copy of this software and/or associated documentation files (the
|
|
diff --git a/include/spirv/unified1/AMD_shader_ballot.h b/include/spirv/unified1/AMD_shader_ballot.h
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index 8a8bb6e..563c0b6 100644
|
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--- a/include/spirv/unified1/AMD_shader_ballot.h
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+++ b/include/spirv/unified1/AMD_shader_ballot.h
|
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@@ -1,4 +1,4 @@
|
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-// Copyright (c) 2020 The Khronos Group Inc.
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+// Copyright (c) 2020-2024 The Khronos Group Inc.
|
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//
|
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// Permission is hereby granted, free of charge, to any person obtaining a
|
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// copy of this software and/or associated documentation files (the
|
|
diff --git a/include/spirv/unified1/AMD_shader_explicit_vertex_parameter.h b/include/spirv/unified1/AMD_shader_explicit_vertex_parameter.h
|
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index 12b6480..e663330 100644
|
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--- a/include/spirv/unified1/AMD_shader_explicit_vertex_parameter.h
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+++ b/include/spirv/unified1/AMD_shader_explicit_vertex_parameter.h
|
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@@ -1,4 +1,4 @@
|
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-// Copyright (c) 2020 The Khronos Group Inc.
|
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+// Copyright (c) 2020-2024 The Khronos Group Inc.
|
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//
|
|
// Permission is hereby granted, free of charge, to any person obtaining a
|
|
// copy of this software and/or associated documentation files (the
|
|
diff --git a/include/spirv/unified1/AMD_shader_trinary_minmax.h b/include/spirv/unified1/AMD_shader_trinary_minmax.h
|
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index 1b14997..dd51c5f 100644
|
|
--- a/include/spirv/unified1/AMD_shader_trinary_minmax.h
|
|
+++ b/include/spirv/unified1/AMD_shader_trinary_minmax.h
|
|
@@ -1,4 +1,4 @@
|
|
-// Copyright (c) 2020 The Khronos Group Inc.
|
|
+// Copyright (c) 2020-2024 The Khronos Group Inc.
|
|
//
|
|
// Permission is hereby granted, free of charge, to any person obtaining a
|
|
// copy of this software and/or associated documentation files (the
|
|
diff --git a/include/spirv/unified1/DebugInfo.h b/include/spirv/unified1/DebugInfo.h
|
|
index 4657556..a3c0af4 100644
|
|
--- a/include/spirv/unified1/DebugInfo.h
|
|
+++ b/include/spirv/unified1/DebugInfo.h
|
|
@@ -1,4 +1,4 @@
|
|
-// Copyright (c) 2017 The Khronos Group Inc.
|
|
+// Copyright (c) 2017-2024 The Khronos Group Inc.
|
|
//
|
|
// Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
// of this software and/or associated documentation files (the "Materials"),
|
|
diff --git a/include/spirv/unified1/GLSL.std.450.h b/include/spirv/unified1/GLSL.std.450.h
|
|
index 54cc00e..0594f90 100644
|
|
--- a/include/spirv/unified1/GLSL.std.450.h
|
|
+++ b/include/spirv/unified1/GLSL.std.450.h
|
|
@@ -1,5 +1,5 @@
|
|
/*
|
|
-** Copyright (c) 2014-2016 The Khronos Group Inc.
|
|
+** Copyright (c) 2014-2024 The Khronos Group Inc.
|
|
**
|
|
** Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
** of this software and/or associated documentation files (the "Materials"),
|
|
diff --git a/include/spirv/unified1/NonSemanticClspvReflection.h b/include/spirv/unified1/NonSemanticClspvReflection.h
|
|
index 4ee87c2..b6c27fa 100644
|
|
--- a/include/spirv/unified1/NonSemanticClspvReflection.h
|
|
+++ b/include/spirv/unified1/NonSemanticClspvReflection.h
|
|
@@ -1,4 +1,4 @@
|
|
-// Copyright (c) 2020 The Khronos Group Inc.
|
|
+// Copyright (c) 2020-2024 The Khronos Group Inc.
|
|
//
|
|
// Permission is hereby granted, free of charge, to any person obtaining a
|
|
// copy of this software and/or associated documentation files (the
|
|
diff --git a/include/spirv/unified1/NonSemanticDebugBreak.h b/include/spirv/unified1/NonSemanticDebugBreak.h
|
|
index 6ec2b5b..8604fe7 100644
|
|
--- a/include/spirv/unified1/NonSemanticDebugBreak.h
|
|
+++ b/include/spirv/unified1/NonSemanticDebugBreak.h
|
|
@@ -1,4 +1,4 @@
|
|
-// Copyright (c) 2020 The Khronos Group Inc.
|
|
+// Copyright (c) 2020-2024 The Khronos Group Inc.
|
|
//
|
|
// Permission is hereby granted, free of charge, to any person obtaining a
|
|
// copy of this software and/or associated documentation files (the
|
|
diff --git a/include/spirv/unified1/NonSemanticDebugPrintf.h b/include/spirv/unified1/NonSemanticDebugPrintf.h
|
|
index 83796d7..bc24683 100644
|
|
--- a/include/spirv/unified1/NonSemanticDebugPrintf.h
|
|
+++ b/include/spirv/unified1/NonSemanticDebugPrintf.h
|
|
@@ -1,4 +1,4 @@
|
|
-// Copyright (c) 2020 The Khronos Group Inc.
|
|
+// Copyright (c) 2020-2024 The Khronos Group Inc.
|
|
//
|
|
// Permission is hereby granted, free of charge, to any person obtaining a
|
|
// copy of this software and/or associated documentation files (the
|
|
diff --git a/include/spirv/unified1/NonSemanticShaderDebugInfo100.h b/include/spirv/unified1/NonSemanticShaderDebugInfo100.h
|
|
index c52f32f..b276b56 100644
|
|
--- a/include/spirv/unified1/NonSemanticShaderDebugInfo100.h
|
|
+++ b/include/spirv/unified1/NonSemanticShaderDebugInfo100.h
|
|
@@ -1,4 +1,4 @@
|
|
-// Copyright (c) 2018 The Khronos Group Inc.
|
|
+// Copyright (c) 2018-2024 The Khronos Group Inc.
|
|
//
|
|
// Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
// of this software and/or associated documentation files (the "Materials"),
|
|
diff --git a/include/spirv/unified1/NonSemanticVkspReflection.h b/include/spirv/unified1/NonSemanticVkspReflection.h
|
|
new file mode 100644
|
|
index 0000000..0ef478a
|
|
--- /dev/null
|
|
+++ b/include/spirv/unified1/NonSemanticVkspReflection.h
|
|
@@ -0,0 +1,57 @@
|
|
+// Copyright (c) 2020-2024 The Khronos Group Inc.
|
|
+//
|
|
+// Permission is hereby granted, free of charge, to any person obtaining a
|
|
+// copy of this software and/or associated documentation files (the
|
|
+// "Materials"), to deal in the Materials without restriction, including
|
|
+// without limitation the rights to use, copy, modify, merge, publish,
|
|
+// distribute, sublicense, and/or sell copies of the Materials, and to
|
|
+// permit persons to whom the Materials are furnished to do so, subject to
|
|
+// the following conditions:
|
|
+//
|
|
+// The above copyright notice and this permission notice shall be included
|
|
+// in all copies or substantial portions of the Materials.
|
|
+//
|
|
+// MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS
|
|
+// KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS
|
|
+// SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT
|
|
+// https://www.khronos.org/registry/
|
|
+//
|
|
+// THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
+// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
+// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
|
|
+// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
|
+// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
|
+// MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
|
|
+//
|
|
+
|
|
+#ifndef SPIRV_UNIFIED1_NonSemanticVkspReflection_H_
|
|
+#define SPIRV_UNIFIED1_NonSemanticVkspReflection_H_
|
|
+
|
|
+#ifdef __cplusplus
|
|
+extern "C" {
|
|
+#endif
|
|
+
|
|
+enum {
|
|
+ NonSemanticVkspReflectionRevision = 1,
|
|
+ NonSemanticVkspReflectionRevision_BitWidthPadding = 0x7fffffff
|
|
+};
|
|
+
|
|
+enum NonSemanticVkspReflectionInstructions {
|
|
+ NonSemanticVkspReflectionConfiguration = 1,
|
|
+ NonSemanticVkspReflectionStartCounter = 2,
|
|
+ NonSemanticVkspReflectionStopCounter = 3,
|
|
+ NonSemanticVkspReflectionPushConstants = 4,
|
|
+ NonSemanticVkspReflectionSpecializationMapEntry = 5,
|
|
+ NonSemanticVkspReflectionDescriptorSetBuffer = 6,
|
|
+ NonSemanticVkspReflectionDescriptorSetImage = 7,
|
|
+ NonSemanticVkspReflectionDescriptorSetSampler = 8,
|
|
+ NonSemanticVkspReflectionInstructionsMax = 0x7fffffff
|
|
+};
|
|
+
|
|
+
|
|
+#ifdef __cplusplus
|
|
+}
|
|
+#endif
|
|
+
|
|
+#endif // SPIRV_UNIFIED1_NonSemanticVkspReflection_H_
|
|
diff --git a/include/spirv/unified1/OpenCL.std.h b/include/spirv/unified1/OpenCL.std.h
|
|
index 2745e30..ed74f20 100644
|
|
--- a/include/spirv/unified1/OpenCL.std.h
|
|
+++ b/include/spirv/unified1/OpenCL.std.h
|
|
@@ -1,5 +1,5 @@
|
|
/*
|
|
-** Copyright (c) 2015-2019 The Khronos Group Inc.
|
|
+** Copyright (c) 2015-2024 The Khronos Group Inc.
|
|
**
|
|
** Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
** of this software and/or associated documentation files (the "Materials"),
|
|
diff --git a/include/spirv/unified1/OpenCLDebugInfo100.h b/include/spirv/unified1/OpenCLDebugInfo100.h
|
|
index e3847c9..ffbd16f 100644
|
|
--- a/include/spirv/unified1/OpenCLDebugInfo100.h
|
|
+++ b/include/spirv/unified1/OpenCLDebugInfo100.h
|
|
@@ -1,4 +1,4 @@
|
|
-// Copyright (c) 2018 The Khronos Group Inc.
|
|
+// Copyright (c) 2018-2024 The Khronos Group Inc.
|
|
//
|
|
// Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
// of this software and/or associated documentation files (the "Materials"),
|
|
diff --git a/include/spirv/unified1/extinst.debuginfo.grammar.json b/include/spirv/unified1/extinst.debuginfo.grammar.json
|
|
index 7d6e8e5..918a9e5 100644
|
|
--- a/include/spirv/unified1/extinst.debuginfo.grammar.json
|
|
+++ b/include/spirv/unified1/extinst.debuginfo.grammar.json
|
|
@@ -1,6 +1,6 @@
|
|
{
|
|
"copyright" : [
|
|
- "Copyright (c) 2017 The Khronos Group Inc.",
|
|
+ "Copyright (c) 2017-2024 The Khronos Group Inc.",
|
|
"",
|
|
"Permission is hereby granted, free of charge, to any person obtaining a copy",
|
|
"of this software and/or associated documentation files (the \"Materials\"),",
|
|
diff --git a/include/spirv/unified1/extinst.glsl.std.450.grammar.json b/include/spirv/unified1/extinst.glsl.std.450.grammar.json
|
|
index 3d9f39e..ac8fc6d 100644
|
|
--- a/include/spirv/unified1/extinst.glsl.std.450.grammar.json
|
|
+++ b/include/spirv/unified1/extinst.glsl.std.450.grammar.json
|
|
@@ -1,6 +1,6 @@
|
|
{
|
|
"copyright" : [
|
|
- "Copyright (c) 2014-2016 The Khronos Group Inc.",
|
|
+ "Copyright (c) 2014-2024 The Khronos Group Inc.",
|
|
"",
|
|
"Permission is hereby granted, free of charge, to any person obtaining a copy",
|
|
"of this software and/or associated documentation files (the \"Materials\"),",
|
|
diff --git a/include/spirv/unified1/extinst.nonsemantic.shader.debuginfo.100.grammar.json b/include/spirv/unified1/extinst.nonsemantic.shader.debuginfo.100.grammar.json
|
|
index f3621b0..1eb2859 100644
|
|
--- a/include/spirv/unified1/extinst.nonsemantic.shader.debuginfo.100.grammar.json
|
|
+++ b/include/spirv/unified1/extinst.nonsemantic.shader.debuginfo.100.grammar.json
|
|
@@ -1,6 +1,6 @@
|
|
{
|
|
"copyright" : [
|
|
- "Copyright (c) 2018 The Khronos Group Inc.",
|
|
+ "Copyright (c) 2018-2024 The Khronos Group Inc.",
|
|
"",
|
|
"Permission is hereby granted, free of charge, to any person obtaining a copy",
|
|
"of this software and/or associated documentation files (the \"Materials\"),",
|
|
diff --git a/include/spirv/unified1/extinst.nonsemantic.vkspreflection.grammar.json b/include/spirv/unified1/extinst.nonsemantic.vkspreflection.grammar.json
|
|
new file mode 100644
|
|
index 0000000..bee1bea
|
|
--- /dev/null
|
|
+++ b/include/spirv/unified1/extinst.nonsemantic.vkspreflection.grammar.json
|
|
@@ -0,0 +1,135 @@
|
|
+{
|
|
+ "revision" : 1,
|
|
+ "instructions" : [
|
|
+ {
|
|
+ "opname" : "Configuration",
|
|
+ "opcode" : 1,
|
|
+ "operands" : [
|
|
+ {"kind" : "LiteralString", "name" : "enabledExtensionNames" },
|
|
+ {"kind" : "LiteralInteger", "name" : "specializationInfoDataSize" },
|
|
+ {"kind" : "LiteralString", "name" : "specializationInfoData" },
|
|
+ {"kind" : "LiteralString", "name" : "shaderName" },
|
|
+ {"kind" : "LiteralString", "name" : "EntryPoint" },
|
|
+ {"kind" : "LiteralInteger", "name" : "groupCountX" },
|
|
+ {"kind" : "LiteralInteger", "name" : "groupCountY" },
|
|
+ {"kind" : "LiteralInteger", "name" : "groupCountZ" }
|
|
+ ]
|
|
+ },
|
|
+ {
|
|
+ "opname" : "StartCounter",
|
|
+ "opcode" : 2,
|
|
+ "operands" : [
|
|
+ {"kind" : "LiteralString", "name" : "name" }
|
|
+ ]
|
|
+ },
|
|
+ {
|
|
+ "opname" : "StopCounter",
|
|
+ "opcode" : 3,
|
|
+ "operands" : [
|
|
+ {"kind" : "IdRef", "name" : "counter" }
|
|
+ ]
|
|
+ },
|
|
+ {
|
|
+ "opname" : "PushConstants",
|
|
+ "opcode" : 4,
|
|
+ "operands" : [
|
|
+ { "kind" : "LiteralInteger", "name" : "offset" },
|
|
+ { "kind" : "LiteralInteger", "name" : "size" },
|
|
+ { "kind" : "LiteralString", "name" : "pValues" },
|
|
+ { "kind" : "LiteralInteger", "name" : "stageFlags" }
|
|
+ ]
|
|
+ },
|
|
+ {
|
|
+ "opname" : "SpecializationMapEntry",
|
|
+ "opcode" : 5,
|
|
+ "operands" : [
|
|
+ {"kind" : "LiteralInteger", "name" : "constantID" },
|
|
+ {"kind" : "LiteralInteger", "name" : "offset" },
|
|
+ {"kind" : "LiteralInteger", "name" : "size" }
|
|
+ ]
|
|
+ },
|
|
+ {
|
|
+ "opname" : "DescriptorSetBuffer",
|
|
+ "opcode" : 6,
|
|
+ "operands" : [
|
|
+ { "kind" : "LiteralInteger", "name" : "ds" },
|
|
+ { "kind" : "LiteralInteger", "name" : "binding" },
|
|
+ { "kind" : "LiteralInteger", "name" : "type" },
|
|
+ { "kind" : "LiteralInteger", "name" : "flags" },
|
|
+ { "kind" : "LiteralInteger", "name" : "queueFamilyIndexCount" },
|
|
+ { "kind" : "LiteralInteger", "name" : "sharingMode" },
|
|
+ { "kind" : "LiteralInteger", "name" : "size" },
|
|
+ { "kind" : "LiteralInteger", "name" : "usage" },
|
|
+ { "kind" : "LiteralInteger", "name" : "range" },
|
|
+ { "kind" : "LiteralInteger", "name" : "offset" },
|
|
+ { "kind" : "LiteralInteger", "name" : "memorySize" },
|
|
+ { "kind" : "LiteralInteger", "name" : "memoryType" },
|
|
+ { "kind" : "LiteralInteger", "name" : "bindOffset" }
|
|
+ ]
|
|
+ },
|
|
+ {
|
|
+ "opname" : "DescriptorSetImage",
|
|
+ "opcode" : 7,
|
|
+ "operands" : [
|
|
+ { "kind" : "LiteralInteger", "name" : "ds" },
|
|
+ { "kind" : "LiteralInteger", "name" : "binding" },
|
|
+ { "kind" : "LiteralInteger", "name" : "type" },
|
|
+ { "kind" : "LiteralInteger", "name" : "imageLayout"},
|
|
+ { "kind" : "LiteralInteger", "name" : "imageFlags"},
|
|
+ { "kind" : "LiteralInteger", "name" : "imageType"},
|
|
+ { "kind" : "LiteralInteger", "name" : "imageformat"},
|
|
+ { "kind" : "LiteralInteger", "name" : "width"},
|
|
+ { "kind" : "LiteralInteger", "name" : "height"},
|
|
+ { "kind" : "LiteralInteger", "name" : "depth"},
|
|
+ { "kind" : "LiteralInteger", "name" : "mipLevels"},
|
|
+ { "kind" : "LiteralInteger", "name" : "arrayLayers"},
|
|
+ { "kind" : "LiteralInteger", "name" : "samples"},
|
|
+ { "kind" : "LiteralInteger", "name" : "tiling"},
|
|
+ { "kind" : "LiteralInteger", "name" : "usage"},
|
|
+ { "kind" : "LiteralInteger", "name" : "sharingMode"},
|
|
+ { "kind" : "LiteralInteger", "name" : "queueFamilyIndexCount"},
|
|
+ { "kind" : "LiteralInteger", "name" : "initialLayout"},
|
|
+ { "kind" : "LiteralInteger", "name" : "aspectMask"},
|
|
+ { "kind" : "LiteralInteger", "name" : "baseMipLevel"},
|
|
+ { "kind" : "LiteralInteger", "name" : "levelCount"},
|
|
+ { "kind" : "LiteralInteger", "name" : "baseArrayLayer"},
|
|
+ { "kind" : "LiteralInteger", "name" : "layerCount"},
|
|
+ { "kind" : "LiteralInteger", "name" : "viewFlags"},
|
|
+ { "kind" : "LiteralInteger", "name" : "viewType"},
|
|
+ { "kind" : "LiteralInteger", "name" : "viewFormat"},
|
|
+ { "kind" : "LiteralInteger", "name" : "component_a"},
|
|
+ { "kind" : "LiteralInteger", "name" : "component_b"},
|
|
+ { "kind" : "LiteralInteger", "name" : "component_g"},
|
|
+ { "kind" : "LiteralInteger", "name" : "component_r"},
|
|
+ { "kind" : "LiteralInteger", "name" : "memorySize" },
|
|
+ { "kind" : "LiteralInteger", "name" : "memoryType" },
|
|
+ { "kind" : "LiteralInteger", "name" : "bindOffset"}
|
|
+ ]
|
|
+ },
|
|
+ {
|
|
+ "opname" : "DescriptorSetSampler",
|
|
+ "opcode" : 8,
|
|
+ "operands" : [
|
|
+ { "kind" : "LiteralInteger", "name" : "ds" },
|
|
+ { "kind" : "LiteralInteger", "name" : "binding" },
|
|
+ { "kind" : "LiteralInteger", "name" : "type" },
|
|
+ { "kind" : "LiteralInteger", "name" : "flags"},
|
|
+ { "kind" : "LiteralInteger", "name" : "magFilter"},
|
|
+ { "kind" : "LiteralInteger", "name" : "minFilter"},
|
|
+ { "kind" : "LiteralInteger", "name" : "mipmapMode"},
|
|
+ { "kind" : "LiteralInteger", "name" : "addressModeU"},
|
|
+ { "kind" : "LiteralInteger", "name" : "addressModeV"},
|
|
+ { "kind" : "LiteralInteger", "name" : "addressModeW"},
|
|
+ { "kind" : "LiteralFloat", "name" : "mipLodBias"},
|
|
+ { "kind" : "LiteralInteger", "name" : "anisotropyEnable"},
|
|
+ { "kind" : "LiteralFloat", "name" : "maxAnisotropy"},
|
|
+ { "kind" : "LiteralInteger", "name" : "compareEnable"},
|
|
+ { "kind" : "LiteralInteger", "name" : "compareOp"},
|
|
+ { "kind" : "LiteralFloat", "name" : "minLod"},
|
|
+ { "kind" : "LiteralFloat", "name" : "maxLod"},
|
|
+ { "kind" : "LiteralInteger", "name" : "borderColor"},
|
|
+ { "kind" : "LiteralInteger", "name" : "unnormalizedCoordinates"}
|
|
+ ]
|
|
+ }
|
|
+ ]
|
|
+}
|
|
diff --git a/include/spirv/unified1/extinst.opencl.debuginfo.100.grammar.json b/include/spirv/unified1/extinst.opencl.debuginfo.100.grammar.json
|
|
index 699fe40..53b001c 100644
|
|
--- a/include/spirv/unified1/extinst.opencl.debuginfo.100.grammar.json
|
|
+++ b/include/spirv/unified1/extinst.opencl.debuginfo.100.grammar.json
|
|
@@ -1,6 +1,6 @@
|
|
{
|
|
"copyright" : [
|
|
- "Copyright (c) 2018 The Khronos Group Inc.",
|
|
+ "Copyright (c) 2018-2024 The Khronos Group Inc.",
|
|
"",
|
|
"Permission is hereby granted, free of charge, to any person obtaining a copy",
|
|
"of this software and/or associated documentation files (the \"Materials\"),",
|
|
diff --git a/include/spirv/unified1/extinst.opencl.std.100.grammar.json b/include/spirv/unified1/extinst.opencl.std.100.grammar.json
|
|
index 4fe4506..21b7876 100644
|
|
--- a/include/spirv/unified1/extinst.opencl.std.100.grammar.json
|
|
+++ b/include/spirv/unified1/extinst.opencl.std.100.grammar.json
|
|
@@ -1,6 +1,6 @@
|
|
{
|
|
"copyright" : [
|
|
- "Copyright (c) 2014-2016 The Khronos Group Inc.",
|
|
+ "Copyright (c) 2014-2024 The Khronos Group Inc.",
|
|
"",
|
|
"Permission is hereby granted, free of charge, to any person obtaining a copy",
|
|
"of this software and/or associated documentation files (the \"Materials\"),",
|
|
diff --git a/include/spirv/unified1/spirv.bf b/include/spirv/unified1/spirv.bf
|
|
index 2528b9c..92b95c8 100644
|
|
--- a/include/spirv/unified1/spirv.bf
|
|
+++ b/include/spirv/unified1/spirv.bf
|
|
@@ -1,4 +1,4 @@
|
|
-// Copyright (c) 2014-2020 The Khronos Group Inc.
|
|
+// Copyright (c) 2014-2024 The Khronos Group Inc.
|
|
//
|
|
// Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
// of this software and/or associated documentation files (the "Materials"),
|
|
@@ -70,6 +70,7 @@ namespace Spv
|
|
NZSL = 9,
|
|
WGSL = 10,
|
|
Slang = 11,
|
|
+ Zig = 12,
|
|
}
|
|
|
|
[AllowDuplicates, CRepr] public enum ExecutionModel
|
|
@@ -180,6 +181,8 @@ namespace Spv
|
|
StencilRefUnchangedBackAMD = 5082,
|
|
StencilRefGreaterBackAMD = 5083,
|
|
StencilRefLessBackAMD = 5084,
|
|
+ QuadDerivativesKHR = 5088,
|
|
+ RequireFullQuadsKHR = 5089,
|
|
OutputLinesEXT = 5269,
|
|
OutputLinesNV = 5269,
|
|
OutputPrimitivesEXT = 5270,
|
|
@@ -204,9 +207,14 @@ namespace Spv
|
|
NoGlobalOffsetINTEL = 5895,
|
|
NumSIMDWorkitemsINTEL = 5896,
|
|
SchedulerTargetFmaxMhzINTEL = 5903,
|
|
+ MaximallyReconvergesKHR = 6023,
|
|
+ FPFastMathDefault = 6028,
|
|
StreamingInterfaceINTEL = 6154,
|
|
RegisterMapInterfaceINTEL = 6160,
|
|
NamedBarrierCountINTEL = 6417,
|
|
+ MaximumRegistersINTEL = 6461,
|
|
+ MaximumRegistersIdINTEL = 6462,
|
|
+ NamedMaximumRegistersINTEL = 6463,
|
|
}
|
|
|
|
[AllowDuplicates, CRepr] public enum StorageClass
|
|
@@ -424,8 +432,11 @@ namespace Spv
|
|
NSZ = 2,
|
|
AllowRecip = 3,
|
|
Fast = 4,
|
|
+ AllowContract = 16,
|
|
AllowContractFastINTEL = 16,
|
|
+ AllowReassoc = 17,
|
|
AllowReassocINTEL = 17,
|
|
+ AllowTransform = 18,
|
|
}
|
|
|
|
[AllowDuplicates, CRepr] public enum FPFastMathModeMask
|
|
@@ -436,8 +447,11 @@ namespace Spv
|
|
NSZ = 0x00000004,
|
|
AllowRecip = 0x00000008,
|
|
Fast = 0x00000010,
|
|
+ AllowContract = 0x00010000,
|
|
AllowContractFastINTEL = 0x00010000,
|
|
+ AllowReassoc = 0x00020000,
|
|
AllowReassocINTEL = 0x00020000,
|
|
+ AllowTransform = 0x00040000,
|
|
}
|
|
|
|
[AllowDuplicates, CRepr] public enum FPRoundingMode
|
|
@@ -528,6 +542,7 @@ namespace Spv
|
|
NoUnsignedWrap = 4470,
|
|
WeightTextureQCOM = 4487,
|
|
BlockMatchTextureQCOM = 4488,
|
|
+ BlockMatchSamplerQCOM = 4499,
|
|
ExplicitInterpAMD = 4999,
|
|
NodeSharesPayloadLimitsWithAMDX = 5019,
|
|
NodeMaxPayloadsAMDX = 5020,
|
|
@@ -1069,6 +1084,7 @@ namespace Spv
|
|
TextureSampleWeightedQCOM = 4484,
|
|
TextureBoxFilterQCOM = 4485,
|
|
TextureBlockMatchQCOM = 4486,
|
|
+ TextureBlockMatch2QCOM = 4498,
|
|
Float16ImageAMD = 5008,
|
|
ImageGatherBiasLodAMD = 5009,
|
|
FragmentMaskAMD = 5010,
|
|
@@ -1077,6 +1093,7 @@ namespace Spv
|
|
Int64ImageEXT = 5016,
|
|
ShaderClockKHR = 5055,
|
|
ShaderEnqueueAMDX = 5067,
|
|
+ QuadControlKHR = 5087,
|
|
SampleMaskOverrideCoverageNV = 5249,
|
|
GeometryShaderPassthroughNV = 5251,
|
|
ShaderViewportIndexLayerEXT = 5254,
|
|
@@ -1141,7 +1158,9 @@ namespace Spv
|
|
ShaderInvocationReorderNV = 5383,
|
|
BindlessTextureNV = 5390,
|
|
RayQueryPositionFetchKHR = 5391,
|
|
+ AtomicFloat16VectorNV = 5404,
|
|
RayTracingDisplacementMicromapNV = 5409,
|
|
+ RawAccessChainsNV = 5414,
|
|
SubgroupShuffleINTEL = 5568,
|
|
SubgroupBufferBlockIOINTEL = 5569,
|
|
SubgroupImageBlockIOINTEL = 5570,
|
|
@@ -1196,6 +1215,7 @@ namespace Spv
|
|
CooperativeMatrixKHR = 6022,
|
|
BitInstructions = 6025,
|
|
GroupNonUniformRotateKHR = 6026,
|
|
+ FloatControls2 = 6029,
|
|
AtomicFloat32AddEXT = 6033,
|
|
AtomicFloat64AddEXT = 6034,
|
|
LongCompositesINTEL = 6089,
|
|
@@ -1212,7 +1232,9 @@ namespace Spv
|
|
GlobalVariableHostAccessINTEL = 6187,
|
|
GlobalVariableFPGADecorationsINTEL = 6189,
|
|
GroupUniformArithmeticKHR = 6400,
|
|
+ MaskedGatherScatterINTEL = 6427,
|
|
CacheControlsINTEL = 6441,
|
|
+ RegisterLimitsINTEL = 6460,
|
|
}
|
|
|
|
[AllowDuplicates, CRepr] public enum RayFlagsShift
|
|
@@ -1383,6 +1405,24 @@ namespace Spv
|
|
StreamingINTEL = 3,
|
|
}
|
|
|
|
+ [AllowDuplicates, CRepr] public enum NamedMaximumNumberOfRegisters
|
|
+ {
|
|
+ AutoINTEL = 0,
|
|
+ }
|
|
+
|
|
+ [AllowDuplicates, CRepr] public enum RawAccessChainOperandsShift
|
|
+ {
|
|
+ RobustnessPerComponentNV = 0,
|
|
+ RobustnessPerElementNV = 1,
|
|
+ }
|
|
+
|
|
+ [AllowDuplicates, CRepr] public enum RawAccessChainOperandsMask
|
|
+ {
|
|
+ MaskNone = 0,
|
|
+ RobustnessPerComponentNV = 0x00000001,
|
|
+ RobustnessPerElementNV = 0x00000002,
|
|
+ }
|
|
+
|
|
[AllowDuplicates, CRepr] public enum Op
|
|
{
|
|
OpNop = 0,
|
|
@@ -1773,6 +1813,10 @@ namespace Spv
|
|
OpImageBoxFilterQCOM = 4481,
|
|
OpImageBlockMatchSSDQCOM = 4482,
|
|
OpImageBlockMatchSADQCOM = 4483,
|
|
+ OpImageBlockMatchWindowSSDQCOM = 4500,
|
|
+ OpImageBlockMatchWindowSADQCOM = 4501,
|
|
+ OpImageBlockMatchGatherSSDQCOM = 4502,
|
|
+ OpImageBlockMatchGatherSADQCOM = 4503,
|
|
OpGroupIAddNonUniformAMD = 5000,
|
|
OpGroupFAddNonUniformAMD = 5001,
|
|
OpGroupFMinNonUniformAMD = 5002,
|
|
@@ -1787,6 +1831,8 @@ namespace Spv
|
|
OpFinalizeNodePayloadsAMDX = 5075,
|
|
OpFinishWritingNodePayloadAMDX = 5078,
|
|
OpInitializeNodePayloadsAMDX = 5090,
|
|
+ OpGroupNonUniformQuadAllKHR = 5110,
|
|
+ OpGroupNonUniformQuadAnyKHR = 5111,
|
|
OpHitObjectRecordHitMotionNV = 5249,
|
|
OpHitObjectRecordHitWithIndexMotionNV = 5250,
|
|
OpHitObjectRecordMissMotionNV = 5251,
|
|
@@ -1855,6 +1901,7 @@ namespace Spv
|
|
OpConvertUToSampledImageNV = 5395,
|
|
OpConvertSampledImageToUNV = 5396,
|
|
OpSamplerImageAddressingModeNV = 5397,
|
|
+ OpRawAccessChainNV = 5398,
|
|
OpSubgroupShuffleINTEL = 5571,
|
|
OpSubgroupShuffleDownINTEL = 5572,
|
|
OpSubgroupShuffleUpINTEL = 5573,
|
|
@@ -2109,6 +2156,8 @@ namespace Spv
|
|
OpGroupLogicalAndKHR = 6406,
|
|
OpGroupLogicalOrKHR = 6407,
|
|
OpGroupLogicalXorKHR = 6408,
|
|
+ OpMaskedGatherINTEL = 6428,
|
|
+ OpMaskedScatterINTEL = 6429,
|
|
}
|
|
}
|
|
}
|
|
diff --git a/include/spirv/unified1/spirv.core.grammar.json b/include/spirv/unified1/spirv.core.grammar.json
|
|
index 4de8edc..5d904ca 100644
|
|
--- a/include/spirv/unified1/spirv.core.grammar.json
|
|
+++ b/include/spirv/unified1/spirv.core.grammar.json
|
|
@@ -1,6 +1,6 @@
|
|
{
|
|
"copyright" : [
|
|
- "Copyright (c) 2014-2020 The Khronos Group Inc.",
|
|
+ "Copyright (c) 2014-2024 The Khronos Group Inc.",
|
|
"",
|
|
"Permission is hereby granted, free of charge, to any person obtaining a copy",
|
|
"of this software and/or associated documentation files (the \"Materials\"),",
|
|
@@ -5050,6 +5050,70 @@
|
|
"capabilities" : [ "TextureBlockMatchQCOM" ],
|
|
"version" : "None"
|
|
},
|
|
+ {
|
|
+ "opname" : "OpImageBlockMatchWindowSSDQCOM",
|
|
+ "class" : "Image",
|
|
+ "opcode" : 4500,
|
|
+ "operands" : [
|
|
+ { "kind" : "IdResultType" },
|
|
+ { "kind" : "IdResult" },
|
|
+ { "kind" : "IdRef", "name" : "'Target Sampled Image'" },
|
|
+ { "kind" : "IdRef", "name" : "'Target Coordinates'" },
|
|
+ { "kind" : "IdRef", "name" : "'Reference Sampled Image'" },
|
|
+ { "kind" : "IdRef", "name" : "'Reference Coordinates'" },
|
|
+ { "kind" : "IdRef", "name" : "'Block Size'" }
|
|
+ ],
|
|
+ "capabilities" : [ "TextureBlockMatch2QCOM" ],
|
|
+ "version" : "None"
|
|
+ },
|
|
+ {
|
|
+ "opname" : "OpImageBlockMatchWindowSADQCOM",
|
|
+ "class" : "Image",
|
|
+ "opcode" : 4501,
|
|
+ "operands" : [
|
|
+ { "kind" : "IdResultType" },
|
|
+ { "kind" : "IdResult" },
|
|
+ { "kind" : "IdRef", "name" : "'Target Sampled Image'" },
|
|
+ { "kind" : "IdRef", "name" : "'Target Coordinates'" },
|
|
+ { "kind" : "IdRef", "name" : "'Reference Sampled Image'" },
|
|
+ { "kind" : "IdRef", "name" : "'Reference Coordinates'" },
|
|
+ { "kind" : "IdRef", "name" : "'Block Size'" }
|
|
+ ],
|
|
+ "capabilities" : [ "TextureBlockMatch2QCOM" ],
|
|
+ "version" : "None"
|
|
+ },
|
|
+ {
|
|
+ "opname" : "OpImageBlockMatchGatherSSDQCOM",
|
|
+ "class" : "Image",
|
|
+ "opcode" : 4502,
|
|
+ "operands" : [
|
|
+ { "kind" : "IdResultType" },
|
|
+ { "kind" : "IdResult" },
|
|
+ { "kind" : "IdRef", "name" : "'Target Sampled Image'" },
|
|
+ { "kind" : "IdRef", "name" : "'Target Coordinates'" },
|
|
+ { "kind" : "IdRef", "name" : "'Reference Sampled Image'" },
|
|
+ { "kind" : "IdRef", "name" : "'Reference Coordinates'" },
|
|
+ { "kind" : "IdRef", "name" : "'Block Size'" }
|
|
+ ],
|
|
+ "capabilities" : [ "TextureBlockMatch2QCOM" ],
|
|
+ "version" : "None"
|
|
+ },
|
|
+ {
|
|
+ "opname" : "OpImageBlockMatchGatherSADQCOM",
|
|
+ "class" : "Image",
|
|
+ "opcode" : 4503,
|
|
+ "operands" : [
|
|
+ { "kind" : "IdResultType" },
|
|
+ { "kind" : "IdResult" },
|
|
+ { "kind" : "IdRef", "name" : "'Target Sampled Image'" },
|
|
+ { "kind" : "IdRef", "name" : "'Target Coordinates'" },
|
|
+ { "kind" : "IdRef", "name" : "'Reference Sampled Image'" },
|
|
+ { "kind" : "IdRef", "name" : "'Reference Coordinates'" },
|
|
+ { "kind" : "IdRef", "name" : "'Block Size'" }
|
|
+ ],
|
|
+ "capabilities" : [ "TextureBlockMatch2QCOM" ],
|
|
+ "version" : "None"
|
|
+ },
|
|
{
|
|
"opname" : "OpGroupIAddNonUniformAMD",
|
|
"class" : "Group",
|
|
@@ -5246,6 +5310,30 @@
|
|
"capabilities" : [ "ShaderEnqueueAMDX" ],
|
|
"version" : "None"
|
|
},
|
|
+ {
|
|
+ "opname" : "OpGroupNonUniformQuadAllKHR",
|
|
+ "class" : "Non-Uniform",
|
|
+ "opcode" : 5110,
|
|
+ "operands" : [
|
|
+ { "kind" : "IdResultType" },
|
|
+ { "kind" : "IdResult" },
|
|
+ { "kind" : "IdRef", "name" : "'Predicate'" }
|
|
+ ],
|
|
+ "capabilities" : [ "QuadControlKHR" ],
|
|
+ "version" : "None"
|
|
+ },
|
|
+ {
|
|
+ "opname" : "OpGroupNonUniformQuadAnyKHR",
|
|
+ "class" : "Non-Uniform",
|
|
+ "opcode" : 5111,
|
|
+ "operands" : [
|
|
+ { "kind" : "IdResultType" },
|
|
+ { "kind" : "IdResult" },
|
|
+ { "kind" : "IdRef", "name" : "'Predicate'" }
|
|
+ ],
|
|
+ "capabilities" : [ "QuadControlKHR" ],
|
|
+ "version" : "None"
|
|
+ },
|
|
{
|
|
"opname" : "OpHitObjectRecordHitMotionNV",
|
|
"class" : "Reserved",
|
|
@@ -6163,6 +6251,24 @@
|
|
"capabilities" : [ "BindlessTextureNV" ],
|
|
"version" : "None"
|
|
},
|
|
+ {
|
|
+ "opname" : "OpRawAccessChainNV",
|
|
+ "class" : "Memory",
|
|
+ "opcode" : 5398,
|
|
+ "operands" : [
|
|
+ { "kind" : "IdResultType" },
|
|
+ { "kind" : "IdResult" },
|
|
+ { "kind" : "IdRef", "name" : "'Base'" },
|
|
+ { "kind" : "IdRef", "name" : "'Byte stride'" },
|
|
+ { "kind" : "IdRef", "name" : "'Element index'" },
|
|
+ { "kind" : "IdRef", "name" : "'Byte offset'" },
|
|
+ { "kind" : "RawAccessChainOperands", "quantifier" : "?" }
|
|
+ ],
|
|
+ "capabilities" : [
|
|
+ "RawAccessChainsNV"
|
|
+ ],
|
|
+ "version" : "None"
|
|
+ },
|
|
{
|
|
"opname" : "OpSubgroupShuffleINTEL",
|
|
"class" : "Group",
|
|
@@ -6552,7 +6658,7 @@
|
|
{ "kind" : "IdMemorySemantics", "name" : "'Semantics'" },
|
|
{ "kind" : "IdRef", "name" : "'Value'" }
|
|
],
|
|
- "capabilities" : [ "AtomicFloat16MinMaxEXT", "AtomicFloat32MinMaxEXT", "AtomicFloat64MinMaxEXT" ],
|
|
+ "capabilities" : [ "AtomicFloat16MinMaxEXT", "AtomicFloat32MinMaxEXT", "AtomicFloat64MinMaxEXT", "AtomicFloat16VectorNV" ],
|
|
"version" : "None"
|
|
},
|
|
{
|
|
@@ -6567,7 +6673,7 @@
|
|
{ "kind" : "IdMemorySemantics", "name" : "'Semantics'" },
|
|
{ "kind" : "IdRef", "name" : "'Value'" }
|
|
],
|
|
- "capabilities" : [ "AtomicFloat16MinMaxEXT", "AtomicFloat32MinMaxEXT", "AtomicFloat64MinMaxEXT" ],
|
|
+ "capabilities" : [ "AtomicFloat16MinMaxEXT", "AtomicFloat32MinMaxEXT", "AtomicFloat64MinMaxEXT", "AtomicFloat16VectorNV" ],
|
|
"version" : "None"
|
|
},
|
|
{
|
|
@@ -9539,7 +9645,7 @@
|
|
{ "kind" : "IdMemorySemantics", "name" : "'Semantics'" },
|
|
{ "kind" : "IdRef", "name" : "'Value'" }
|
|
],
|
|
- "capabilities" : [ "AtomicFloat16AddEXT", "AtomicFloat32AddEXT", "AtomicFloat64AddEXT" ],
|
|
+ "capabilities" : [ "AtomicFloat16AddEXT", "AtomicFloat32AddEXT", "AtomicFloat64AddEXT", "AtomicFloat16VectorNV" ],
|
|
"extensions" : [ "SPV_EXT_shader_atomic_float_add" ],
|
|
"version" : "None"
|
|
},
|
|
@@ -9758,6 +9864,34 @@
|
|
],
|
|
"capabilities" : [ "GroupUniformArithmeticKHR" ],
|
|
"version" : "None"
|
|
+ },
|
|
+ {
|
|
+ "opname" : "OpMaskedGatherINTEL",
|
|
+ "class" : "Memory",
|
|
+ "opcode" : 6428,
|
|
+ "operands" : [
|
|
+ { "kind" : "IdResultType" },
|
|
+ { "kind" : "IdResult" },
|
|
+ { "kind" : "IdRef", "name" : "'PtrVector'" },
|
|
+ { "kind" : "LiteralInteger", "name" : "'Alignment'" },
|
|
+ { "kind" : "IdRef", "name" : "'Mask'" },
|
|
+ { "kind" : "IdRef", "name" : "'FillEmpty'" }
|
|
+ ],
|
|
+ "capabilities" : [ "MaskedGatherScatterINTEL" ],
|
|
+ "version" : "None"
|
|
+ },
|
|
+ {
|
|
+ "opname" : "OpMaskedScatterINTEL",
|
|
+ "class" : "Memory",
|
|
+ "opcode" : 6429,
|
|
+ "operands" : [
|
|
+ { "kind" : "IdRef", "name" : "'InputVector'" },
|
|
+ { "kind" : "IdRef", "name" : "'PtrVector'" },
|
|
+ { "kind" : "LiteralInteger", "name" : "'Alignment'" },
|
|
+ { "kind" : "IdRef", "name" : "'Mask'" }
|
|
+ ],
|
|
+ "capabilities" : [ "MaskedGatherScatterINTEL" ],
|
|
+ "version" : "None"
|
|
}
|
|
],
|
|
"operand_kinds" : [
|
|
@@ -9961,16 +10095,34 @@
|
|
"value" : "0x0010",
|
|
"version" : "1.0"
|
|
},
|
|
+ {
|
|
+ "enumerant" : "AllowContract",
|
|
+ "value" : "0x10000",
|
|
+ "capabilities" : [ "FloatControls2", "FPFastMathModeINTEL" ],
|
|
+ "version" : "None"
|
|
+ },
|
|
{
|
|
"enumerant" : "AllowContractFastINTEL",
|
|
"value" : "0x10000",
|
|
- "capabilities" : [ "FPFastMathModeINTEL" ],
|
|
+ "capabilities" : [ "FloatControls2", "FPFastMathModeINTEL" ],
|
|
+ "version" : "None"
|
|
+ },
|
|
+ {
|
|
+ "enumerant" : "AllowReassoc",
|
|
+ "value" : "0x20000",
|
|
+ "capabilities" : [ "FloatControls2", "FPFastMathModeINTEL" ],
|
|
"version" : "None"
|
|
},
|
|
{
|
|
"enumerant" : "AllowReassocINTEL",
|
|
"value" : "0x20000",
|
|
- "capabilities" : [ "FPFastMathModeINTEL" ],
|
|
+ "capabilities" : [ "FloatControls2", "FPFastMathModeINTEL" ],
|
|
+ "version" : "None"
|
|
+ },
|
|
+ {
|
|
+ "enumerant" : "AllowTransform",
|
|
+ "value" : "0x40000",
|
|
+ "capabilities" : [ "FloatControls2" ],
|
|
"version" : "None"
|
|
}
|
|
]
|
|
@@ -10533,6 +10685,28 @@
|
|
}
|
|
]
|
|
},
|
|
+ {
|
|
+ "category" : "BitEnum",
|
|
+ "kind" : "RawAccessChainOperands",
|
|
+ "enumerants" : [
|
|
+ {
|
|
+ "enumerant" : "None",
|
|
+ "value" : "0x0000"
|
|
+ },
|
|
+ {
|
|
+ "enumerant" : "RobustnessPerComponentNV",
|
|
+ "value" : "0x0001",
|
|
+ "capabilities" : [ "RawAccessChainsNV" ],
|
|
+ "version" : "None"
|
|
+ },
|
|
+ {
|
|
+ "enumerant" : "RobustnessPerElementNV",
|
|
+ "value" : "0x0002",
|
|
+ "capabilities" : [ "RawAccessChainsNV" ],
|
|
+ "version" : "None"
|
|
+ }
|
|
+ ]
|
|
+ },
|
|
{
|
|
"category" : "ValueEnum",
|
|
"kind" : "SourceLanguage",
|
|
@@ -10596,6 +10770,11 @@
|
|
"enumerant" : "Slang",
|
|
"value" : 11,
|
|
"version" : "1.0"
|
|
+ },
|
|
+ {
|
|
+ "enumerant" : "Zig",
|
|
+ "value" : 12,
|
|
+ "version" : "1.0"
|
|
}
|
|
]
|
|
},
|
|
@@ -11269,6 +11448,18 @@
|
|
"extensions": [ "SPV_AMD_shader_early_and_late_fragment_tests", "SPV_EXT_shader_stencil_export" ],
|
|
"version": "None"
|
|
},
|
|
+ {
|
|
+ "enumerant": "QuadDerivativesKHR",
|
|
+ "value": 5088,
|
|
+ "capabilities": [ "QuadControlKHR" ],
|
|
+ "version": "None"
|
|
+ },
|
|
+ {
|
|
+ "enumerant" : "RequireFullQuadsKHR",
|
|
+ "value" : 5089,
|
|
+ "capabilities" : [ "QuadControlKHR" ],
|
|
+ "version" : "None"
|
|
+ },
|
|
{
|
|
"enumerant" : "OutputLinesNV",
|
|
"value" : 5269,
|
|
@@ -11467,6 +11658,23 @@
|
|
"version" : "None"
|
|
},
|
|
{
|
|
+ "enumerant" : "MaximallyReconvergesKHR",
|
|
+ "value" : 6023,
|
|
+ "capabilities" : [ "Shader" ],
|
|
+ "extensions" : [ "SPV_KHR_maximal_reconvergence" ],
|
|
+ "version" : "None"
|
|
+ },
|
|
+ {
|
|
+ "enumerant" : "FPFastMathDefault",
|
|
+ "value" : 6028,
|
|
+ "parameters" : [
|
|
+ { "kind" : "IdRef", "name" : "'Target Type'" },
|
|
+ { "kind" : "IdRef", "name" : "'Fast-Math Mode'" }
|
|
+ ],
|
|
+ "capabilities" : [ "FloatControls2" ],
|
|
+ "version" : "None"
|
|
+ },
|
|
+ {
|
|
"enumerant" : "StreamingInterfaceINTEL",
|
|
"value" : 6154,
|
|
"parameters" : [
|
|
@@ -11492,6 +11700,33 @@
|
|
],
|
|
"capabilities" : [ "VectorComputeINTEL" ],
|
|
"version" : "None"
|
|
+ },
|
|
+ {
|
|
+ "enumerant" : "MaximumRegistersINTEL",
|
|
+ "value" : 6461,
|
|
+ "parameters" : [
|
|
+ { "kind" : "LiteralInteger", "name" : "'Number of Registers'" }
|
|
+ ],
|
|
+ "capabilities" : [ "RegisterLimitsINTEL" ],
|
|
+ "version" : "None"
|
|
+ },
|
|
+ {
|
|
+ "enumerant" : "MaximumRegistersIdINTEL",
|
|
+ "value" : 6462,
|
|
+ "parameters" : [
|
|
+ { "kind" : "IdRef", "name" : "'Number of Registers'" }
|
|
+ ],
|
|
+ "capabilities" : [ "RegisterLimitsINTEL" ],
|
|
+ "version" : "None"
|
|
+ },
|
|
+ {
|
|
+ "enumerant" : "NamedMaximumRegistersINTEL",
|
|
+ "value" : 6463,
|
|
+ "parameters" : [
|
|
+ { "kind" : "NamedMaximumNumberOfRegisters", "name" : "'Named Maximum Number of Registers'" }
|
|
+ ],
|
|
+ "capabilities" : [ "RegisterLimitsINTEL" ],
|
|
+ "version" : "None"
|
|
}
|
|
]
|
|
},
|
|
@@ -12094,121 +12329,101 @@
|
|
{
|
|
"enumerant" : "R",
|
|
"value" : 0,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "A",
|
|
"value" : 1,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "RG",
|
|
"value" : 2,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "RA",
|
|
"value" : 3,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "RGB",
|
|
"value" : 4,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "RGBA",
|
|
"value" : 5,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "BGRA",
|
|
"value" : 6,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "ARGB",
|
|
"value" : 7,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "Intensity",
|
|
"value" : 8,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "Luminance",
|
|
"value" : 9,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "Rx",
|
|
"value" : 10,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "RGx",
|
|
"value" : 11,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "RGBx",
|
|
"value" : 12,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "Depth",
|
|
"value" : 13,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "DepthStencil",
|
|
"value" : 14,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "sRGB",
|
|
"value" : 15,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "sRGBx",
|
|
"value" : 16,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "sRGBA",
|
|
"value" : 17,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "sBGRA",
|
|
"value" : 18,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "ABGR",
|
|
"value" : 19,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
}
|
|
]
|
|
@@ -12220,115 +12435,96 @@
|
|
{
|
|
"enumerant" : "SnormInt8",
|
|
"value" : 0,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "SnormInt16",
|
|
"value" : 1,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "UnormInt8",
|
|
"value" : 2,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "UnormInt16",
|
|
"value" : 3,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "UnormShort565",
|
|
"value" : 4,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "UnormShort555",
|
|
"value" : 5,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "UnormInt101010",
|
|
"value" : 6,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "SignedInt8",
|
|
"value" : 7,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "SignedInt16",
|
|
"value" : 8,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "SignedInt32",
|
|
"value" : 9,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "UnsignedInt8",
|
|
"value" : 10,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "UnsignedInt16",
|
|
"value" : 11,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "UnsignedInt32",
|
|
"value" : 12,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "HalfFloat",
|
|
"value" : 13,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "Float",
|
|
"value" : 14,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "UnormInt24",
|
|
"value" : 15,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "UnormInt101010_2",
|
|
"value" : 16,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "UnsignedIntRaw10EXT",
|
|
"value" : 19,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
},
|
|
{
|
|
"enumerant" : "UnsignedIntRaw12EXT",
|
|
"value" : 20,
|
|
- "capabilities" : [ "Kernel" ],
|
|
"version": "1.0"
|
|
}
|
|
]
|
|
@@ -12900,7 +13096,7 @@
|
|
{
|
|
"enumerant" : "FPFastMathMode",
|
|
"value" : 40,
|
|
- "capabilities" : [ "Kernel" ],
|
|
+ "capabilities" : [ "Kernel", "FloatControls2" ],
|
|
"parameters" : [
|
|
{ "kind" : "FPFastMathMode", "name" : "'Fast-Math Mode'" }
|
|
],
|
|
@@ -12991,6 +13187,12 @@
|
|
"extensions" : [ "SPV_QCOM_image_processing" ],
|
|
"version" : "None"
|
|
},
|
|
+ {
|
|
+ "enumerant" : "BlockMatchSamplerQCOM",
|
|
+ "value" : 4499,
|
|
+ "extensions" : [ "SPV_QCOM_image_processing2" ],
|
|
+ "version" : "None"
|
|
+ },
|
|
{
|
|
"enumerant" : "ExplicitInterpAMD",
|
|
"value" : 4999,
|
|
@@ -15419,6 +15621,12 @@
|
|
"extensions" : [ "SPV_QCOM_image_processing" ],
|
|
"version" : "None"
|
|
},
|
|
+ {
|
|
+ "enumerant" : "TextureBlockMatch2QCOM",
|
|
+ "value" : 4498,
|
|
+ "extensions" : [ "SPV_QCOM_image_processing2" ],
|
|
+ "version" : "None"
|
|
+ },
|
|
{
|
|
"enumerant" : "Float16ImageAMD",
|
|
"value" : 5008,
|
|
@@ -15474,6 +15682,12 @@
|
|
"extensions" : [ "SPV_AMDX_shader_enqueue" ],
|
|
"version" : "None"
|
|
},
|
|
+ {
|
|
+ "enumerant" : "QuadControlKHR",
|
|
+ "value" : 5087,
|
|
+ "extensions" : [ "SPV_KHR_quad_control" ],
|
|
+ "version" : "None"
|
|
+ },
|
|
{
|
|
"enumerant" : "SampleMaskOverrideCoverageNV",
|
|
"value" : 5249,
|
|
@@ -15896,6 +16110,12 @@
|
|
"extensions" : [ "SPV_KHR_ray_tracing_position_fetch" ],
|
|
"version" : "None"
|
|
},
|
|
+ {
|
|
+ "enumerant" : "AtomicFloat16VectorNV",
|
|
+ "value" : 5404,
|
|
+ "extensions" : [ "SPV_NV_shader_atomic_fp16_vector" ],
|
|
+ "version" : "None"
|
|
+ },
|
|
{
|
|
"enumerant" : "RayTracingDisplacementMicromapNV",
|
|
"value" : 5409,
|
|
@@ -15903,6 +16123,12 @@
|
|
"extensions" : [ "SPV_NV_displacement_micromap" ],
|
|
"version" : "None"
|
|
},
|
|
+ {
|
|
+ "enumerant" : "RawAccessChainsNV",
|
|
+ "value" : 5414,
|
|
+ "extensions" : [ "SPV_NV_raw_access_chains" ],
|
|
+ "version" : "None"
|
|
+ },
|
|
{
|
|
"enumerant" : "SubgroupShuffleINTEL",
|
|
"value" : 5568,
|
|
@@ -16229,6 +16455,12 @@
|
|
"extensions" : [ "SPV_KHR_subgroup_rotate" ],
|
|
"version" : "None"
|
|
},
|
|
+ {
|
|
+ "enumerant" : "FloatControls2",
|
|
+ "value" : 6029,
|
|
+ "extensions" : [ "SPV_KHR_float_controls2" ],
|
|
+ "version" : "None"
|
|
+ },
|
|
{
|
|
"enumerant" : "AtomicFloat32AddEXT",
|
|
"value" : 6033,
|
|
@@ -16327,11 +16559,23 @@
|
|
"extensions" : [ "SPV_KHR_uniform_group_instructions"],
|
|
"version" : "None"
|
|
},
|
|
+ {
|
|
+ "enumerant" : "MaskedGatherScatterINTEL",
|
|
+ "value" : 6427,
|
|
+ "extensions" : [ "SPV_INTEL_masked_gather_scatter"],
|
|
+ "version" : "None"
|
|
+ },
|
|
{
|
|
"enumerant" : "CacheControlsINTEL",
|
|
"value" : 6441,
|
|
"extensions" : [ "SPV_INTEL_cache_controls" ],
|
|
"version" : "None"
|
|
+ },
|
|
+ {
|
|
+ "enumerant" : "RegisterLimitsINTEL",
|
|
+ "value" : 6460,
|
|
+ "extensions" : [ "SPV_INTEL_maximum_registers" ],
|
|
+ "version" : "None"
|
|
}
|
|
]
|
|
},
|
|
@@ -16569,6 +16813,18 @@
|
|
}
|
|
]
|
|
},
|
|
+ {
|
|
+ "category" : "ValueEnum",
|
|
+ "kind" : "NamedMaximumNumberOfRegisters",
|
|
+ "enumerants" : [
|
|
+ {
|
|
+ "enumerant" : "AutoINTEL",
|
|
+ "value" : 0,
|
|
+ "capabilities" : [ "RegisterLimitsINTEL" ],
|
|
+ "version" : "None"
|
|
+ }
|
|
+ ]
|
|
+ },
|
|
{
|
|
"category" : "Id",
|
|
"kind" : "IdResultType",
|
|
diff --git a/include/spirv/unified1/spirv.cs b/include/spirv/unified1/spirv.cs
|
|
index 686a588..8d85cce 100644
|
|
--- a/include/spirv/unified1/spirv.cs
|
|
+++ b/include/spirv/unified1/spirv.cs
|
|
@@ -1,4 +1,4 @@
|
|
-// Copyright (c) 2014-2020 The Khronos Group Inc.
|
|
+// Copyright (c) 2014-2024 The Khronos Group Inc.
|
|
//
|
|
// Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
// of this software and/or associated documentation files (the "Materials"),
|
|
@@ -69,6 +69,7 @@ namespace Spv
|
|
NZSL = 9,
|
|
WGSL = 10,
|
|
Slang = 11,
|
|
+ Zig = 12,
|
|
}
|
|
|
|
public enum ExecutionModel
|
|
@@ -179,6 +180,8 @@ namespace Spv
|
|
StencilRefUnchangedBackAMD = 5082,
|
|
StencilRefGreaterBackAMD = 5083,
|
|
StencilRefLessBackAMD = 5084,
|
|
+ QuadDerivativesKHR = 5088,
|
|
+ RequireFullQuadsKHR = 5089,
|
|
OutputLinesEXT = 5269,
|
|
OutputLinesNV = 5269,
|
|
OutputPrimitivesEXT = 5270,
|
|
@@ -203,9 +206,14 @@ namespace Spv
|
|
NoGlobalOffsetINTEL = 5895,
|
|
NumSIMDWorkitemsINTEL = 5896,
|
|
SchedulerTargetFmaxMhzINTEL = 5903,
|
|
+ MaximallyReconvergesKHR = 6023,
|
|
+ FPFastMathDefault = 6028,
|
|
StreamingInterfaceINTEL = 6154,
|
|
RegisterMapInterfaceINTEL = 6160,
|
|
NamedBarrierCountINTEL = 6417,
|
|
+ MaximumRegistersINTEL = 6461,
|
|
+ MaximumRegistersIdINTEL = 6462,
|
|
+ NamedMaximumRegistersINTEL = 6463,
|
|
}
|
|
|
|
public enum StorageClass
|
|
@@ -423,8 +431,11 @@ namespace Spv
|
|
NSZ = 2,
|
|
AllowRecip = 3,
|
|
Fast = 4,
|
|
+ AllowContract = 16,
|
|
AllowContractFastINTEL = 16,
|
|
+ AllowReassoc = 17,
|
|
AllowReassocINTEL = 17,
|
|
+ AllowTransform = 18,
|
|
}
|
|
|
|
public enum FPFastMathModeMask
|
|
@@ -435,8 +446,11 @@ namespace Spv
|
|
NSZ = 0x00000004,
|
|
AllowRecip = 0x00000008,
|
|
Fast = 0x00000010,
|
|
+ AllowContract = 0x00010000,
|
|
AllowContractFastINTEL = 0x00010000,
|
|
+ AllowReassoc = 0x00020000,
|
|
AllowReassocINTEL = 0x00020000,
|
|
+ AllowTransform = 0x00040000,
|
|
}
|
|
|
|
public enum FPRoundingMode
|
|
@@ -527,6 +541,7 @@ namespace Spv
|
|
NoUnsignedWrap = 4470,
|
|
WeightTextureQCOM = 4487,
|
|
BlockMatchTextureQCOM = 4488,
|
|
+ BlockMatchSamplerQCOM = 4499,
|
|
ExplicitInterpAMD = 4999,
|
|
NodeSharesPayloadLimitsWithAMDX = 5019,
|
|
NodeMaxPayloadsAMDX = 5020,
|
|
@@ -1068,6 +1083,7 @@ namespace Spv
|
|
TextureSampleWeightedQCOM = 4484,
|
|
TextureBoxFilterQCOM = 4485,
|
|
TextureBlockMatchQCOM = 4486,
|
|
+ TextureBlockMatch2QCOM = 4498,
|
|
Float16ImageAMD = 5008,
|
|
ImageGatherBiasLodAMD = 5009,
|
|
FragmentMaskAMD = 5010,
|
|
@@ -1076,6 +1092,7 @@ namespace Spv
|
|
Int64ImageEXT = 5016,
|
|
ShaderClockKHR = 5055,
|
|
ShaderEnqueueAMDX = 5067,
|
|
+ QuadControlKHR = 5087,
|
|
SampleMaskOverrideCoverageNV = 5249,
|
|
GeometryShaderPassthroughNV = 5251,
|
|
ShaderViewportIndexLayerEXT = 5254,
|
|
@@ -1140,7 +1157,9 @@ namespace Spv
|
|
ShaderInvocationReorderNV = 5383,
|
|
BindlessTextureNV = 5390,
|
|
RayQueryPositionFetchKHR = 5391,
|
|
+ AtomicFloat16VectorNV = 5404,
|
|
RayTracingDisplacementMicromapNV = 5409,
|
|
+ RawAccessChainsNV = 5414,
|
|
SubgroupShuffleINTEL = 5568,
|
|
SubgroupBufferBlockIOINTEL = 5569,
|
|
SubgroupImageBlockIOINTEL = 5570,
|
|
@@ -1195,6 +1214,7 @@ namespace Spv
|
|
CooperativeMatrixKHR = 6022,
|
|
BitInstructions = 6025,
|
|
GroupNonUniformRotateKHR = 6026,
|
|
+ FloatControls2 = 6029,
|
|
AtomicFloat32AddEXT = 6033,
|
|
AtomicFloat64AddEXT = 6034,
|
|
LongCompositesINTEL = 6089,
|
|
@@ -1211,7 +1231,9 @@ namespace Spv
|
|
GlobalVariableHostAccessINTEL = 6187,
|
|
GlobalVariableFPGADecorationsINTEL = 6189,
|
|
GroupUniformArithmeticKHR = 6400,
|
|
+ MaskedGatherScatterINTEL = 6427,
|
|
CacheControlsINTEL = 6441,
|
|
+ RegisterLimitsINTEL = 6460,
|
|
}
|
|
|
|
public enum RayFlagsShift
|
|
@@ -1382,6 +1404,24 @@ namespace Spv
|
|
StreamingINTEL = 3,
|
|
}
|
|
|
|
+ public enum NamedMaximumNumberOfRegisters
|
|
+ {
|
|
+ AutoINTEL = 0,
|
|
+ }
|
|
+
|
|
+ public enum RawAccessChainOperandsShift
|
|
+ {
|
|
+ RobustnessPerComponentNV = 0,
|
|
+ RobustnessPerElementNV = 1,
|
|
+ }
|
|
+
|
|
+ public enum RawAccessChainOperandsMask
|
|
+ {
|
|
+ MaskNone = 0,
|
|
+ RobustnessPerComponentNV = 0x00000001,
|
|
+ RobustnessPerElementNV = 0x00000002,
|
|
+ }
|
|
+
|
|
public enum Op
|
|
{
|
|
OpNop = 0,
|
|
@@ -1772,6 +1812,10 @@ namespace Spv
|
|
OpImageBoxFilterQCOM = 4481,
|
|
OpImageBlockMatchSSDQCOM = 4482,
|
|
OpImageBlockMatchSADQCOM = 4483,
|
|
+ OpImageBlockMatchWindowSSDQCOM = 4500,
|
|
+ OpImageBlockMatchWindowSADQCOM = 4501,
|
|
+ OpImageBlockMatchGatherSSDQCOM = 4502,
|
|
+ OpImageBlockMatchGatherSADQCOM = 4503,
|
|
OpGroupIAddNonUniformAMD = 5000,
|
|
OpGroupFAddNonUniformAMD = 5001,
|
|
OpGroupFMinNonUniformAMD = 5002,
|
|
@@ -1786,6 +1830,8 @@ namespace Spv
|
|
OpFinalizeNodePayloadsAMDX = 5075,
|
|
OpFinishWritingNodePayloadAMDX = 5078,
|
|
OpInitializeNodePayloadsAMDX = 5090,
|
|
+ OpGroupNonUniformQuadAllKHR = 5110,
|
|
+ OpGroupNonUniformQuadAnyKHR = 5111,
|
|
OpHitObjectRecordHitMotionNV = 5249,
|
|
OpHitObjectRecordHitWithIndexMotionNV = 5250,
|
|
OpHitObjectRecordMissMotionNV = 5251,
|
|
@@ -1854,6 +1900,7 @@ namespace Spv
|
|
OpConvertUToSampledImageNV = 5395,
|
|
OpConvertSampledImageToUNV = 5396,
|
|
OpSamplerImageAddressingModeNV = 5397,
|
|
+ OpRawAccessChainNV = 5398,
|
|
OpSubgroupShuffleINTEL = 5571,
|
|
OpSubgroupShuffleDownINTEL = 5572,
|
|
OpSubgroupShuffleUpINTEL = 5573,
|
|
@@ -2108,6 +2155,8 @@ namespace Spv
|
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OpGroupLogicalAndKHR = 6406,
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OpGroupLogicalOrKHR = 6407,
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OpGroupLogicalXorKHR = 6408,
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+ OpMaskedGatherINTEL = 6428,
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+ OpMaskedScatterINTEL = 6429,
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}
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}
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}
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diff --git a/include/spirv/unified1/spirv.h b/include/spirv/unified1/spirv.h
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index 58b1932..e544a85 100644
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--- a/include/spirv/unified1/spirv.h
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+++ b/include/spirv/unified1/spirv.h
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@@ -1,5 +1,5 @@
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/*
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-** Copyright (c) 2014-2020 The Khronos Group Inc.
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+** Copyright (c) 2014-2024 The Khronos Group Inc.
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**
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** Permission is hereby granted, free of charge, to any person obtaining a copy
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** of this software and/or associated documentation files (the "Materials"),
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@@ -77,6 +77,7 @@ typedef enum SpvSourceLanguage_ {
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SpvSourceLanguageNZSL = 9,
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SpvSourceLanguageWGSL = 10,
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SpvSourceLanguageSlang = 11,
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+ SpvSourceLanguageZig = 12,
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SpvSourceLanguageMax = 0x7fffffff,
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} SpvSourceLanguage;
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@@ -187,6 +188,8 @@ typedef enum SpvExecutionMode_ {
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SpvExecutionModeStencilRefUnchangedBackAMD = 5082,
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SpvExecutionModeStencilRefGreaterBackAMD = 5083,
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SpvExecutionModeStencilRefLessBackAMD = 5084,
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+ SpvExecutionModeQuadDerivativesKHR = 5088,
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+ SpvExecutionModeRequireFullQuadsKHR = 5089,
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SpvExecutionModeOutputLinesEXT = 5269,
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SpvExecutionModeOutputLinesNV = 5269,
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SpvExecutionModeOutputPrimitivesEXT = 5270,
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@@ -211,9 +214,14 @@ typedef enum SpvExecutionMode_ {
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SpvExecutionModeNoGlobalOffsetINTEL = 5895,
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SpvExecutionModeNumSIMDWorkitemsINTEL = 5896,
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SpvExecutionModeSchedulerTargetFmaxMhzINTEL = 5903,
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+ SpvExecutionModeMaximallyReconvergesKHR = 6023,
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+ SpvExecutionModeFPFastMathDefault = 6028,
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SpvExecutionModeStreamingInterfaceINTEL = 6154,
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SpvExecutionModeRegisterMapInterfaceINTEL = 6160,
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SpvExecutionModeNamedBarrierCountINTEL = 6417,
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+ SpvExecutionModeMaximumRegistersINTEL = 6461,
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+ SpvExecutionModeMaximumRegistersIdINTEL = 6462,
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+ SpvExecutionModeNamedMaximumRegistersINTEL = 6463,
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SpvExecutionModeMax = 0x7fffffff,
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} SpvExecutionMode;
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@@ -430,8 +438,11 @@ typedef enum SpvFPFastMathModeShift_ {
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SpvFPFastMathModeNSZShift = 2,
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SpvFPFastMathModeAllowRecipShift = 3,
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SpvFPFastMathModeFastShift = 4,
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+ SpvFPFastMathModeAllowContractShift = 16,
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SpvFPFastMathModeAllowContractFastINTELShift = 16,
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+ SpvFPFastMathModeAllowReassocShift = 17,
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SpvFPFastMathModeAllowReassocINTELShift = 17,
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+ SpvFPFastMathModeAllowTransformShift = 18,
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SpvFPFastMathModeMax = 0x7fffffff,
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} SpvFPFastMathModeShift;
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@@ -442,8 +453,11 @@ typedef enum SpvFPFastMathModeMask_ {
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SpvFPFastMathModeNSZMask = 0x00000004,
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SpvFPFastMathModeAllowRecipMask = 0x00000008,
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SpvFPFastMathModeFastMask = 0x00000010,
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+ SpvFPFastMathModeAllowContractMask = 0x00010000,
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SpvFPFastMathModeAllowContractFastINTELMask = 0x00010000,
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+ SpvFPFastMathModeAllowReassocMask = 0x00020000,
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SpvFPFastMathModeAllowReassocINTELMask = 0x00020000,
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+ SpvFPFastMathModeAllowTransformMask = 0x00040000,
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} SpvFPFastMathModeMask;
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typedef enum SpvFPRoundingMode_ {
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@@ -533,6 +547,7 @@ typedef enum SpvDecoration_ {
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SpvDecorationNoUnsignedWrap = 4470,
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SpvDecorationWeightTextureQCOM = 4487,
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SpvDecorationBlockMatchTextureQCOM = 4488,
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+ SpvDecorationBlockMatchSamplerQCOM = 4499,
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SpvDecorationExplicitInterpAMD = 4999,
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SpvDecorationNodeSharesPayloadLimitsWithAMDX = 5019,
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SpvDecorationNodeMaxPayloadsAMDX = 5020,
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@@ -1068,6 +1083,7 @@ typedef enum SpvCapability_ {
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SpvCapabilityTextureSampleWeightedQCOM = 4484,
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SpvCapabilityTextureBoxFilterQCOM = 4485,
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SpvCapabilityTextureBlockMatchQCOM = 4486,
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+ SpvCapabilityTextureBlockMatch2QCOM = 4498,
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SpvCapabilityFloat16ImageAMD = 5008,
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SpvCapabilityImageGatherBiasLodAMD = 5009,
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SpvCapabilityFragmentMaskAMD = 5010,
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@@ -1076,6 +1092,7 @@ typedef enum SpvCapability_ {
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SpvCapabilityInt64ImageEXT = 5016,
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SpvCapabilityShaderClockKHR = 5055,
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SpvCapabilityShaderEnqueueAMDX = 5067,
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+ SpvCapabilityQuadControlKHR = 5087,
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SpvCapabilitySampleMaskOverrideCoverageNV = 5249,
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SpvCapabilityGeometryShaderPassthroughNV = 5251,
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SpvCapabilityShaderViewportIndexLayerEXT = 5254,
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@@ -1140,7 +1157,9 @@ typedef enum SpvCapability_ {
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SpvCapabilityShaderInvocationReorderNV = 5383,
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SpvCapabilityBindlessTextureNV = 5390,
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SpvCapabilityRayQueryPositionFetchKHR = 5391,
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+ SpvCapabilityAtomicFloat16VectorNV = 5404,
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SpvCapabilityRayTracingDisplacementMicromapNV = 5409,
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+ SpvCapabilityRawAccessChainsNV = 5414,
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SpvCapabilitySubgroupShuffleINTEL = 5568,
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SpvCapabilitySubgroupBufferBlockIOINTEL = 5569,
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SpvCapabilitySubgroupImageBlockIOINTEL = 5570,
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@@ -1195,6 +1214,7 @@ typedef enum SpvCapability_ {
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SpvCapabilityCooperativeMatrixKHR = 6022,
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SpvCapabilityBitInstructions = 6025,
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SpvCapabilityGroupNonUniformRotateKHR = 6026,
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+ SpvCapabilityFloatControls2 = 6029,
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SpvCapabilityAtomicFloat32AddEXT = 6033,
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SpvCapabilityAtomicFloat64AddEXT = 6034,
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SpvCapabilityLongCompositesINTEL = 6089,
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@@ -1211,7 +1231,9 @@ typedef enum SpvCapability_ {
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SpvCapabilityGlobalVariableHostAccessINTEL = 6187,
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SpvCapabilityGlobalVariableFPGADecorationsINTEL = 6189,
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SpvCapabilityGroupUniformArithmeticKHR = 6400,
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+ SpvCapabilityMaskedGatherScatterINTEL = 6427,
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SpvCapabilityCacheControlsINTEL = 6441,
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+ SpvCapabilityRegisterLimitsINTEL = 6460,
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SpvCapabilityMax = 0x7fffffff,
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} SpvCapability;
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@@ -1380,6 +1402,23 @@ typedef enum SpvStoreCacheControl_ {
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SpvStoreCacheControlMax = 0x7fffffff,
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} SpvStoreCacheControl;
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+typedef enum SpvNamedMaximumNumberOfRegisters_ {
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+ SpvNamedMaximumNumberOfRegistersAutoINTEL = 0,
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+ SpvNamedMaximumNumberOfRegistersMax = 0x7fffffff,
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+} SpvNamedMaximumNumberOfRegisters;
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+
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+typedef enum SpvRawAccessChainOperandsShift_ {
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+ SpvRawAccessChainOperandsRobustnessPerComponentNVShift = 0,
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+ SpvRawAccessChainOperandsRobustnessPerElementNVShift = 1,
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+ SpvRawAccessChainOperandsMax = 0x7fffffff,
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+} SpvRawAccessChainOperandsShift;
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+
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+typedef enum SpvRawAccessChainOperandsMask_ {
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+ SpvRawAccessChainOperandsMaskNone = 0,
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+ SpvRawAccessChainOperandsRobustnessPerComponentNVMask = 0x00000001,
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+ SpvRawAccessChainOperandsRobustnessPerElementNVMask = 0x00000002,
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+} SpvRawAccessChainOperandsMask;
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+
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typedef enum SpvOp_ {
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SpvOpNop = 0,
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SpvOpUndef = 1,
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@@ -1769,6 +1808,10 @@ typedef enum SpvOp_ {
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SpvOpImageBoxFilterQCOM = 4481,
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SpvOpImageBlockMatchSSDQCOM = 4482,
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SpvOpImageBlockMatchSADQCOM = 4483,
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+ SpvOpImageBlockMatchWindowSSDQCOM = 4500,
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+ SpvOpImageBlockMatchWindowSADQCOM = 4501,
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+ SpvOpImageBlockMatchGatherSSDQCOM = 4502,
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+ SpvOpImageBlockMatchGatherSADQCOM = 4503,
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SpvOpGroupIAddNonUniformAMD = 5000,
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SpvOpGroupFAddNonUniformAMD = 5001,
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SpvOpGroupFMinNonUniformAMD = 5002,
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@@ -1783,6 +1826,8 @@ typedef enum SpvOp_ {
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SpvOpFinalizeNodePayloadsAMDX = 5075,
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SpvOpFinishWritingNodePayloadAMDX = 5078,
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SpvOpInitializeNodePayloadsAMDX = 5090,
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+ SpvOpGroupNonUniformQuadAllKHR = 5110,
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+ SpvOpGroupNonUniformQuadAnyKHR = 5111,
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SpvOpHitObjectRecordHitMotionNV = 5249,
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SpvOpHitObjectRecordHitWithIndexMotionNV = 5250,
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SpvOpHitObjectRecordMissMotionNV = 5251,
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@@ -1851,6 +1896,7 @@ typedef enum SpvOp_ {
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SpvOpConvertUToSampledImageNV = 5395,
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SpvOpConvertSampledImageToUNV = 5396,
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SpvOpSamplerImageAddressingModeNV = 5397,
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+ SpvOpRawAccessChainNV = 5398,
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SpvOpSubgroupShuffleINTEL = 5571,
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SpvOpSubgroupShuffleDownINTEL = 5572,
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SpvOpSubgroupShuffleUpINTEL = 5573,
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@@ -2105,6 +2151,8 @@ typedef enum SpvOp_ {
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SpvOpGroupLogicalAndKHR = 6406,
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SpvOpGroupLogicalOrKHR = 6407,
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SpvOpGroupLogicalXorKHR = 6408,
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+ SpvOpMaskedGatherINTEL = 6428,
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+ SpvOpMaskedScatterINTEL = 6429,
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SpvOpMax = 0x7fffffff,
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} SpvOp;
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@@ -2498,6 +2546,10 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
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case SpvOpImageBoxFilterQCOM: *hasResult = true; *hasResultType = true; break;
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case SpvOpImageBlockMatchSSDQCOM: *hasResult = true; *hasResultType = true; break;
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case SpvOpImageBlockMatchSADQCOM: *hasResult = true; *hasResultType = true; break;
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+ case SpvOpImageBlockMatchWindowSSDQCOM: *hasResult = true; *hasResultType = true; break;
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+ case SpvOpImageBlockMatchWindowSADQCOM: *hasResult = true; *hasResultType = true; break;
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+ case SpvOpImageBlockMatchGatherSSDQCOM: *hasResult = true; *hasResultType = true; break;
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+ case SpvOpImageBlockMatchGatherSADQCOM: *hasResult = true; *hasResultType = true; break;
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case SpvOpGroupIAddNonUniformAMD: *hasResult = true; *hasResultType = true; break;
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case SpvOpGroupFAddNonUniformAMD: *hasResult = true; *hasResultType = true; break;
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case SpvOpGroupFMinNonUniformAMD: *hasResult = true; *hasResultType = true; break;
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@@ -2512,6 +2564,8 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
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case SpvOpFinalizeNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break;
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case SpvOpFinishWritingNodePayloadAMDX: *hasResult = true; *hasResultType = true; break;
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case SpvOpInitializeNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break;
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+ case SpvOpGroupNonUniformQuadAllKHR: *hasResult = true; *hasResultType = true; break;
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+ case SpvOpGroupNonUniformQuadAnyKHR: *hasResult = true; *hasResultType = true; break;
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case SpvOpHitObjectRecordHitMotionNV: *hasResult = false; *hasResultType = false; break;
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case SpvOpHitObjectRecordHitWithIndexMotionNV: *hasResult = false; *hasResultType = false; break;
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case SpvOpHitObjectRecordMissMotionNV: *hasResult = false; *hasResultType = false; break;
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@@ -2577,6 +2631,7 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
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case SpvOpConvertUToSampledImageNV: *hasResult = true; *hasResultType = true; break;
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case SpvOpConvertSampledImageToUNV: *hasResult = true; *hasResultType = true; break;
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case SpvOpSamplerImageAddressingModeNV: *hasResult = false; *hasResultType = false; break;
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+ case SpvOpRawAccessChainNV: *hasResult = true; *hasResultType = true; break;
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case SpvOpSubgroupShuffleINTEL: *hasResult = true; *hasResultType = true; break;
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case SpvOpSubgroupShuffleDownINTEL: *hasResult = true; *hasResultType = true; break;
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case SpvOpSubgroupShuffleUpINTEL: *hasResult = true; *hasResultType = true; break;
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@@ -2829,6 +2884,8 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
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case SpvOpGroupLogicalAndKHR: *hasResult = true; *hasResultType = true; break;
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case SpvOpGroupLogicalOrKHR: *hasResult = true; *hasResultType = true; break;
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case SpvOpGroupLogicalXorKHR: *hasResult = true; *hasResultType = true; break;
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+ case SpvOpMaskedGatherINTEL: *hasResult = true; *hasResultType = true; break;
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+ case SpvOpMaskedScatterINTEL: *hasResult = false; *hasResultType = false; break;
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}
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}
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#endif /* SPV_ENABLE_UTILITY_CODE */
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diff --git a/include/spirv/unified1/spirv.hpp b/include/spirv/unified1/spirv.hpp
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index 188e2f1..a383739 100644
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--- a/include/spirv/unified1/spirv.hpp
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+++ b/include/spirv/unified1/spirv.hpp
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@@ -1,4 +1,4 @@
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-// Copyright (c) 2014-2020 The Khronos Group Inc.
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+// Copyright (c) 2014-2024 The Khronos Group Inc.
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy
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// of this software and/or associated documentation files (the "Materials"),
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@@ -73,6 +73,7 @@ enum SourceLanguage {
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SourceLanguageNZSL = 9,
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SourceLanguageWGSL = 10,
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SourceLanguageSlang = 11,
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+ SourceLanguageZig = 12,
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SourceLanguageMax = 0x7fffffff,
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};
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@@ -183,6 +184,8 @@ enum ExecutionMode {
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ExecutionModeStencilRefUnchangedBackAMD = 5082,
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ExecutionModeStencilRefGreaterBackAMD = 5083,
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ExecutionModeStencilRefLessBackAMD = 5084,
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+ ExecutionModeQuadDerivativesKHR = 5088,
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+ ExecutionModeRequireFullQuadsKHR = 5089,
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ExecutionModeOutputLinesEXT = 5269,
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ExecutionModeOutputLinesNV = 5269,
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ExecutionModeOutputPrimitivesEXT = 5270,
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@@ -207,9 +210,14 @@ enum ExecutionMode {
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ExecutionModeNoGlobalOffsetINTEL = 5895,
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ExecutionModeNumSIMDWorkitemsINTEL = 5896,
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ExecutionModeSchedulerTargetFmaxMhzINTEL = 5903,
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+ ExecutionModeMaximallyReconvergesKHR = 6023,
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+ ExecutionModeFPFastMathDefault = 6028,
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ExecutionModeStreamingInterfaceINTEL = 6154,
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ExecutionModeRegisterMapInterfaceINTEL = 6160,
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ExecutionModeNamedBarrierCountINTEL = 6417,
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+ ExecutionModeMaximumRegistersINTEL = 6461,
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+ ExecutionModeMaximumRegistersIdINTEL = 6462,
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+ ExecutionModeNamedMaximumRegistersINTEL = 6463,
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ExecutionModeMax = 0x7fffffff,
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};
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@@ -426,8 +434,11 @@ enum FPFastMathModeShift {
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FPFastMathModeNSZShift = 2,
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FPFastMathModeAllowRecipShift = 3,
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FPFastMathModeFastShift = 4,
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+ FPFastMathModeAllowContractShift = 16,
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FPFastMathModeAllowContractFastINTELShift = 16,
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+ FPFastMathModeAllowReassocShift = 17,
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FPFastMathModeAllowReassocINTELShift = 17,
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+ FPFastMathModeAllowTransformShift = 18,
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FPFastMathModeMax = 0x7fffffff,
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};
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@@ -438,8 +449,11 @@ enum FPFastMathModeMask {
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FPFastMathModeNSZMask = 0x00000004,
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FPFastMathModeAllowRecipMask = 0x00000008,
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FPFastMathModeFastMask = 0x00000010,
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+ FPFastMathModeAllowContractMask = 0x00010000,
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FPFastMathModeAllowContractFastINTELMask = 0x00010000,
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+ FPFastMathModeAllowReassocMask = 0x00020000,
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FPFastMathModeAllowReassocINTELMask = 0x00020000,
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+ FPFastMathModeAllowTransformMask = 0x00040000,
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};
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enum FPRoundingMode {
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@@ -529,6 +543,7 @@ enum Decoration {
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DecorationNoUnsignedWrap = 4470,
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DecorationWeightTextureQCOM = 4487,
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DecorationBlockMatchTextureQCOM = 4488,
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+ DecorationBlockMatchSamplerQCOM = 4499,
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DecorationExplicitInterpAMD = 4999,
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DecorationNodeSharesPayloadLimitsWithAMDX = 5019,
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DecorationNodeMaxPayloadsAMDX = 5020,
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@@ -1064,6 +1079,7 @@ enum Capability {
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CapabilityTextureSampleWeightedQCOM = 4484,
|
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CapabilityTextureBoxFilterQCOM = 4485,
|
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CapabilityTextureBlockMatchQCOM = 4486,
|
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+ CapabilityTextureBlockMatch2QCOM = 4498,
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CapabilityFloat16ImageAMD = 5008,
|
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CapabilityImageGatherBiasLodAMD = 5009,
|
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CapabilityFragmentMaskAMD = 5010,
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@@ -1072,6 +1088,7 @@ enum Capability {
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CapabilityInt64ImageEXT = 5016,
|
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CapabilityShaderClockKHR = 5055,
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CapabilityShaderEnqueueAMDX = 5067,
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+ CapabilityQuadControlKHR = 5087,
|
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CapabilitySampleMaskOverrideCoverageNV = 5249,
|
|
CapabilityGeometryShaderPassthroughNV = 5251,
|
|
CapabilityShaderViewportIndexLayerEXT = 5254,
|
|
@@ -1136,7 +1153,9 @@ enum Capability {
|
|
CapabilityShaderInvocationReorderNV = 5383,
|
|
CapabilityBindlessTextureNV = 5390,
|
|
CapabilityRayQueryPositionFetchKHR = 5391,
|
|
+ CapabilityAtomicFloat16VectorNV = 5404,
|
|
CapabilityRayTracingDisplacementMicromapNV = 5409,
|
|
+ CapabilityRawAccessChainsNV = 5414,
|
|
CapabilitySubgroupShuffleINTEL = 5568,
|
|
CapabilitySubgroupBufferBlockIOINTEL = 5569,
|
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CapabilitySubgroupImageBlockIOINTEL = 5570,
|
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@@ -1191,6 +1210,7 @@ enum Capability {
|
|
CapabilityCooperativeMatrixKHR = 6022,
|
|
CapabilityBitInstructions = 6025,
|
|
CapabilityGroupNonUniformRotateKHR = 6026,
|
|
+ CapabilityFloatControls2 = 6029,
|
|
CapabilityAtomicFloat32AddEXT = 6033,
|
|
CapabilityAtomicFloat64AddEXT = 6034,
|
|
CapabilityLongCompositesINTEL = 6089,
|
|
@@ -1207,7 +1227,9 @@ enum Capability {
|
|
CapabilityGlobalVariableHostAccessINTEL = 6187,
|
|
CapabilityGlobalVariableFPGADecorationsINTEL = 6189,
|
|
CapabilityGroupUniformArithmeticKHR = 6400,
|
|
+ CapabilityMaskedGatherScatterINTEL = 6427,
|
|
CapabilityCacheControlsINTEL = 6441,
|
|
+ CapabilityRegisterLimitsINTEL = 6460,
|
|
CapabilityMax = 0x7fffffff,
|
|
};
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|
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@@ -1376,6 +1398,23 @@ enum StoreCacheControl {
|
|
StoreCacheControlMax = 0x7fffffff,
|
|
};
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|
|
+enum NamedMaximumNumberOfRegisters {
|
|
+ NamedMaximumNumberOfRegistersAutoINTEL = 0,
|
|
+ NamedMaximumNumberOfRegistersMax = 0x7fffffff,
|
|
+};
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|
+
|
|
+enum RawAccessChainOperandsShift {
|
|
+ RawAccessChainOperandsRobustnessPerComponentNVShift = 0,
|
|
+ RawAccessChainOperandsRobustnessPerElementNVShift = 1,
|
|
+ RawAccessChainOperandsMax = 0x7fffffff,
|
|
+};
|
|
+
|
|
+enum RawAccessChainOperandsMask {
|
|
+ RawAccessChainOperandsMaskNone = 0,
|
|
+ RawAccessChainOperandsRobustnessPerComponentNVMask = 0x00000001,
|
|
+ RawAccessChainOperandsRobustnessPerElementNVMask = 0x00000002,
|
|
+};
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+
|
|
enum Op {
|
|
OpNop = 0,
|
|
OpUndef = 1,
|
|
@@ -1765,6 +1804,10 @@ enum Op {
|
|
OpImageBoxFilterQCOM = 4481,
|
|
OpImageBlockMatchSSDQCOM = 4482,
|
|
OpImageBlockMatchSADQCOM = 4483,
|
|
+ OpImageBlockMatchWindowSSDQCOM = 4500,
|
|
+ OpImageBlockMatchWindowSADQCOM = 4501,
|
|
+ OpImageBlockMatchGatherSSDQCOM = 4502,
|
|
+ OpImageBlockMatchGatherSADQCOM = 4503,
|
|
OpGroupIAddNonUniformAMD = 5000,
|
|
OpGroupFAddNonUniformAMD = 5001,
|
|
OpGroupFMinNonUniformAMD = 5002,
|
|
@@ -1779,6 +1822,8 @@ enum Op {
|
|
OpFinalizeNodePayloadsAMDX = 5075,
|
|
OpFinishWritingNodePayloadAMDX = 5078,
|
|
OpInitializeNodePayloadsAMDX = 5090,
|
|
+ OpGroupNonUniformQuadAllKHR = 5110,
|
|
+ OpGroupNonUniformQuadAnyKHR = 5111,
|
|
OpHitObjectRecordHitMotionNV = 5249,
|
|
OpHitObjectRecordHitWithIndexMotionNV = 5250,
|
|
OpHitObjectRecordMissMotionNV = 5251,
|
|
@@ -1847,6 +1892,7 @@ enum Op {
|
|
OpConvertUToSampledImageNV = 5395,
|
|
OpConvertSampledImageToUNV = 5396,
|
|
OpSamplerImageAddressingModeNV = 5397,
|
|
+ OpRawAccessChainNV = 5398,
|
|
OpSubgroupShuffleINTEL = 5571,
|
|
OpSubgroupShuffleDownINTEL = 5572,
|
|
OpSubgroupShuffleUpINTEL = 5573,
|
|
@@ -2101,6 +2147,8 @@ enum Op {
|
|
OpGroupLogicalAndKHR = 6406,
|
|
OpGroupLogicalOrKHR = 6407,
|
|
OpGroupLogicalXorKHR = 6408,
|
|
+ OpMaskedGatherINTEL = 6428,
|
|
+ OpMaskedScatterINTEL = 6429,
|
|
OpMax = 0x7fffffff,
|
|
};
|
|
|
|
@@ -2494,6 +2542,10 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
|
|
case OpImageBoxFilterQCOM: *hasResult = true; *hasResultType = true; break;
|
|
case OpImageBlockMatchSSDQCOM: *hasResult = true; *hasResultType = true; break;
|
|
case OpImageBlockMatchSADQCOM: *hasResult = true; *hasResultType = true; break;
|
|
+ case OpImageBlockMatchWindowSSDQCOM: *hasResult = true; *hasResultType = true; break;
|
|
+ case OpImageBlockMatchWindowSADQCOM: *hasResult = true; *hasResultType = true; break;
|
|
+ case OpImageBlockMatchGatherSSDQCOM: *hasResult = true; *hasResultType = true; break;
|
|
+ case OpImageBlockMatchGatherSADQCOM: *hasResult = true; *hasResultType = true; break;
|
|
case OpGroupIAddNonUniformAMD: *hasResult = true; *hasResultType = true; break;
|
|
case OpGroupFAddNonUniformAMD: *hasResult = true; *hasResultType = true; break;
|
|
case OpGroupFMinNonUniformAMD: *hasResult = true; *hasResultType = true; break;
|
|
@@ -2508,6 +2560,8 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
|
|
case OpFinalizeNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break;
|
|
case OpFinishWritingNodePayloadAMDX: *hasResult = true; *hasResultType = true; break;
|
|
case OpInitializeNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break;
|
|
+ case OpGroupNonUniformQuadAllKHR: *hasResult = true; *hasResultType = true; break;
|
|
+ case OpGroupNonUniformQuadAnyKHR: *hasResult = true; *hasResultType = true; break;
|
|
case OpHitObjectRecordHitMotionNV: *hasResult = false; *hasResultType = false; break;
|
|
case OpHitObjectRecordHitWithIndexMotionNV: *hasResult = false; *hasResultType = false; break;
|
|
case OpHitObjectRecordMissMotionNV: *hasResult = false; *hasResultType = false; break;
|
|
@@ -2573,6 +2627,7 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
|
|
case OpConvertUToSampledImageNV: *hasResult = true; *hasResultType = true; break;
|
|
case OpConvertSampledImageToUNV: *hasResult = true; *hasResultType = true; break;
|
|
case OpSamplerImageAddressingModeNV: *hasResult = false; *hasResultType = false; break;
|
|
+ case OpRawAccessChainNV: *hasResult = true; *hasResultType = true; break;
|
|
case OpSubgroupShuffleINTEL: *hasResult = true; *hasResultType = true; break;
|
|
case OpSubgroupShuffleDownINTEL: *hasResult = true; *hasResultType = true; break;
|
|
case OpSubgroupShuffleUpINTEL: *hasResult = true; *hasResultType = true; break;
|
|
@@ -2825,6 +2880,8 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
|
|
case OpGroupLogicalAndKHR: *hasResult = true; *hasResultType = true; break;
|
|
case OpGroupLogicalOrKHR: *hasResult = true; *hasResultType = true; break;
|
|
case OpGroupLogicalXorKHR: *hasResult = true; *hasResultType = true; break;
|
|
+ case OpMaskedGatherINTEL: *hasResult = true; *hasResultType = true; break;
|
|
+ case OpMaskedScatterINTEL: *hasResult = false; *hasResultType = false; break;
|
|
}
|
|
}
|
|
#endif /* SPV_ENABLE_UTILITY_CODE */
|
|
@@ -2875,6 +2932,10 @@ inline CooperativeMatrixOperandsMask operator|(CooperativeMatrixOperandsMask a,
|
|
inline CooperativeMatrixOperandsMask operator&(CooperativeMatrixOperandsMask a, CooperativeMatrixOperandsMask b) { return CooperativeMatrixOperandsMask(unsigned(a) & unsigned(b)); }
|
|
inline CooperativeMatrixOperandsMask operator^(CooperativeMatrixOperandsMask a, CooperativeMatrixOperandsMask b) { return CooperativeMatrixOperandsMask(unsigned(a) ^ unsigned(b)); }
|
|
inline CooperativeMatrixOperandsMask operator~(CooperativeMatrixOperandsMask a) { return CooperativeMatrixOperandsMask(~unsigned(a)); }
|
|
+inline RawAccessChainOperandsMask operator|(RawAccessChainOperandsMask a, RawAccessChainOperandsMask b) { return RawAccessChainOperandsMask(unsigned(a) | unsigned(b)); }
|
|
+inline RawAccessChainOperandsMask operator&(RawAccessChainOperandsMask a, RawAccessChainOperandsMask b) { return RawAccessChainOperandsMask(unsigned(a) & unsigned(b)); }
|
|
+inline RawAccessChainOperandsMask operator^(RawAccessChainOperandsMask a, RawAccessChainOperandsMask b) { return RawAccessChainOperandsMask(unsigned(a) ^ unsigned(b)); }
|
|
+inline RawAccessChainOperandsMask operator~(RawAccessChainOperandsMask a) { return RawAccessChainOperandsMask(~unsigned(a)); }
|
|
|
|
} // end namespace spv
|
|
|
|
diff --git a/include/spirv/unified1/spirv.hpp11 b/include/spirv/unified1/spirv.hpp11
|
|
index cc2590c..d6b4fb7 100644
|
|
--- a/include/spirv/unified1/spirv.hpp11
|
|
+++ b/include/spirv/unified1/spirv.hpp11
|
|
@@ -1,4 +1,4 @@
|
|
-// Copyright (c) 2014-2020 The Khronos Group Inc.
|
|
+// Copyright (c) 2014-2024 The Khronos Group Inc.
|
|
//
|
|
// Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
// of this software and/or associated documentation files (the "Materials"),
|
|
@@ -73,6 +73,7 @@ enum class SourceLanguage : unsigned {
|
|
NZSL = 9,
|
|
WGSL = 10,
|
|
Slang = 11,
|
|
+ Zig = 12,
|
|
Max = 0x7fffffff,
|
|
};
|
|
|
|
@@ -183,6 +184,8 @@ enum class ExecutionMode : unsigned {
|
|
StencilRefUnchangedBackAMD = 5082,
|
|
StencilRefGreaterBackAMD = 5083,
|
|
StencilRefLessBackAMD = 5084,
|
|
+ QuadDerivativesKHR = 5088,
|
|
+ RequireFullQuadsKHR = 5089,
|
|
OutputLinesEXT = 5269,
|
|
OutputLinesNV = 5269,
|
|
OutputPrimitivesEXT = 5270,
|
|
@@ -207,9 +210,14 @@ enum class ExecutionMode : unsigned {
|
|
NoGlobalOffsetINTEL = 5895,
|
|
NumSIMDWorkitemsINTEL = 5896,
|
|
SchedulerTargetFmaxMhzINTEL = 5903,
|
|
+ MaximallyReconvergesKHR = 6023,
|
|
+ FPFastMathDefault = 6028,
|
|
StreamingInterfaceINTEL = 6154,
|
|
RegisterMapInterfaceINTEL = 6160,
|
|
NamedBarrierCountINTEL = 6417,
|
|
+ MaximumRegistersINTEL = 6461,
|
|
+ MaximumRegistersIdINTEL = 6462,
|
|
+ NamedMaximumRegistersINTEL = 6463,
|
|
Max = 0x7fffffff,
|
|
};
|
|
|
|
@@ -426,8 +434,11 @@ enum class FPFastMathModeShift : unsigned {
|
|
NSZ = 2,
|
|
AllowRecip = 3,
|
|
Fast = 4,
|
|
+ AllowContract = 16,
|
|
AllowContractFastINTEL = 16,
|
|
+ AllowReassoc = 17,
|
|
AllowReassocINTEL = 17,
|
|
+ AllowTransform = 18,
|
|
Max = 0x7fffffff,
|
|
};
|
|
|
|
@@ -438,8 +449,11 @@ enum class FPFastMathModeMask : unsigned {
|
|
NSZ = 0x00000004,
|
|
AllowRecip = 0x00000008,
|
|
Fast = 0x00000010,
|
|
+ AllowContract = 0x00010000,
|
|
AllowContractFastINTEL = 0x00010000,
|
|
+ AllowReassoc = 0x00020000,
|
|
AllowReassocINTEL = 0x00020000,
|
|
+ AllowTransform = 0x00040000,
|
|
};
|
|
|
|
enum class FPRoundingMode : unsigned {
|
|
@@ -529,6 +543,7 @@ enum class Decoration : unsigned {
|
|
NoUnsignedWrap = 4470,
|
|
WeightTextureQCOM = 4487,
|
|
BlockMatchTextureQCOM = 4488,
|
|
+ BlockMatchSamplerQCOM = 4499,
|
|
ExplicitInterpAMD = 4999,
|
|
NodeSharesPayloadLimitsWithAMDX = 5019,
|
|
NodeMaxPayloadsAMDX = 5020,
|
|
@@ -1064,6 +1079,7 @@ enum class Capability : unsigned {
|
|
TextureSampleWeightedQCOM = 4484,
|
|
TextureBoxFilterQCOM = 4485,
|
|
TextureBlockMatchQCOM = 4486,
|
|
+ TextureBlockMatch2QCOM = 4498,
|
|
Float16ImageAMD = 5008,
|
|
ImageGatherBiasLodAMD = 5009,
|
|
FragmentMaskAMD = 5010,
|
|
@@ -1072,6 +1088,7 @@ enum class Capability : unsigned {
|
|
Int64ImageEXT = 5016,
|
|
ShaderClockKHR = 5055,
|
|
ShaderEnqueueAMDX = 5067,
|
|
+ QuadControlKHR = 5087,
|
|
SampleMaskOverrideCoverageNV = 5249,
|
|
GeometryShaderPassthroughNV = 5251,
|
|
ShaderViewportIndexLayerEXT = 5254,
|
|
@@ -1136,7 +1153,9 @@ enum class Capability : unsigned {
|
|
ShaderInvocationReorderNV = 5383,
|
|
BindlessTextureNV = 5390,
|
|
RayQueryPositionFetchKHR = 5391,
|
|
+ AtomicFloat16VectorNV = 5404,
|
|
RayTracingDisplacementMicromapNV = 5409,
|
|
+ RawAccessChainsNV = 5414,
|
|
SubgroupShuffleINTEL = 5568,
|
|
SubgroupBufferBlockIOINTEL = 5569,
|
|
SubgroupImageBlockIOINTEL = 5570,
|
|
@@ -1191,6 +1210,7 @@ enum class Capability : unsigned {
|
|
CooperativeMatrixKHR = 6022,
|
|
BitInstructions = 6025,
|
|
GroupNonUniformRotateKHR = 6026,
|
|
+ FloatControls2 = 6029,
|
|
AtomicFloat32AddEXT = 6033,
|
|
AtomicFloat64AddEXT = 6034,
|
|
LongCompositesINTEL = 6089,
|
|
@@ -1207,7 +1227,9 @@ enum class Capability : unsigned {
|
|
GlobalVariableHostAccessINTEL = 6187,
|
|
GlobalVariableFPGADecorationsINTEL = 6189,
|
|
GroupUniformArithmeticKHR = 6400,
|
|
+ MaskedGatherScatterINTEL = 6427,
|
|
CacheControlsINTEL = 6441,
|
|
+ RegisterLimitsINTEL = 6460,
|
|
Max = 0x7fffffff,
|
|
};
|
|
|
|
@@ -1376,6 +1398,23 @@ enum class StoreCacheControl : unsigned {
|
|
Max = 0x7fffffff,
|
|
};
|
|
|
|
+enum class NamedMaximumNumberOfRegisters : unsigned {
|
|
+ AutoINTEL = 0,
|
|
+ Max = 0x7fffffff,
|
|
+};
|
|
+
|
|
+enum class RawAccessChainOperandsShift : unsigned {
|
|
+ RobustnessPerComponentNV = 0,
|
|
+ RobustnessPerElementNV = 1,
|
|
+ Max = 0x7fffffff,
|
|
+};
|
|
+
|
|
+enum class RawAccessChainOperandsMask : unsigned {
|
|
+ MaskNone = 0,
|
|
+ RobustnessPerComponentNV = 0x00000001,
|
|
+ RobustnessPerElementNV = 0x00000002,
|
|
+};
|
|
+
|
|
enum class Op : unsigned {
|
|
OpNop = 0,
|
|
OpUndef = 1,
|
|
@@ -1765,6 +1804,10 @@ enum class Op : unsigned {
|
|
OpImageBoxFilterQCOM = 4481,
|
|
OpImageBlockMatchSSDQCOM = 4482,
|
|
OpImageBlockMatchSADQCOM = 4483,
|
|
+ OpImageBlockMatchWindowSSDQCOM = 4500,
|
|
+ OpImageBlockMatchWindowSADQCOM = 4501,
|
|
+ OpImageBlockMatchGatherSSDQCOM = 4502,
|
|
+ OpImageBlockMatchGatherSADQCOM = 4503,
|
|
OpGroupIAddNonUniformAMD = 5000,
|
|
OpGroupFAddNonUniformAMD = 5001,
|
|
OpGroupFMinNonUniformAMD = 5002,
|
|
@@ -1779,6 +1822,8 @@ enum class Op : unsigned {
|
|
OpFinalizeNodePayloadsAMDX = 5075,
|
|
OpFinishWritingNodePayloadAMDX = 5078,
|
|
OpInitializeNodePayloadsAMDX = 5090,
|
|
+ OpGroupNonUniformQuadAllKHR = 5110,
|
|
+ OpGroupNonUniformQuadAnyKHR = 5111,
|
|
OpHitObjectRecordHitMotionNV = 5249,
|
|
OpHitObjectRecordHitWithIndexMotionNV = 5250,
|
|
OpHitObjectRecordMissMotionNV = 5251,
|
|
@@ -1847,6 +1892,7 @@ enum class Op : unsigned {
|
|
OpConvertUToSampledImageNV = 5395,
|
|
OpConvertSampledImageToUNV = 5396,
|
|
OpSamplerImageAddressingModeNV = 5397,
|
|
+ OpRawAccessChainNV = 5398,
|
|
OpSubgroupShuffleINTEL = 5571,
|
|
OpSubgroupShuffleDownINTEL = 5572,
|
|
OpSubgroupShuffleUpINTEL = 5573,
|
|
@@ -2101,6 +2147,8 @@ enum class Op : unsigned {
|
|
OpGroupLogicalAndKHR = 6406,
|
|
OpGroupLogicalOrKHR = 6407,
|
|
OpGroupLogicalXorKHR = 6408,
|
|
+ OpMaskedGatherINTEL = 6428,
|
|
+ OpMaskedScatterINTEL = 6429,
|
|
Max = 0x7fffffff,
|
|
};
|
|
|
|
@@ -2494,6 +2542,10 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
|
|
case Op::OpImageBoxFilterQCOM: *hasResult = true; *hasResultType = true; break;
|
|
case Op::OpImageBlockMatchSSDQCOM: *hasResult = true; *hasResultType = true; break;
|
|
case Op::OpImageBlockMatchSADQCOM: *hasResult = true; *hasResultType = true; break;
|
|
+ case Op::OpImageBlockMatchWindowSSDQCOM: *hasResult = true; *hasResultType = true; break;
|
|
+ case Op::OpImageBlockMatchWindowSADQCOM: *hasResult = true; *hasResultType = true; break;
|
|
+ case Op::OpImageBlockMatchGatherSSDQCOM: *hasResult = true; *hasResultType = true; break;
|
|
+ case Op::OpImageBlockMatchGatherSADQCOM: *hasResult = true; *hasResultType = true; break;
|
|
case Op::OpGroupIAddNonUniformAMD: *hasResult = true; *hasResultType = true; break;
|
|
case Op::OpGroupFAddNonUniformAMD: *hasResult = true; *hasResultType = true; break;
|
|
case Op::OpGroupFMinNonUniformAMD: *hasResult = true; *hasResultType = true; break;
|
|
@@ -2508,6 +2560,8 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
|
|
case Op::OpFinalizeNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break;
|
|
case Op::OpFinishWritingNodePayloadAMDX: *hasResult = true; *hasResultType = true; break;
|
|
case Op::OpInitializeNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break;
|
|
+ case Op::OpGroupNonUniformQuadAllKHR: *hasResult = true; *hasResultType = true; break;
|
|
+ case Op::OpGroupNonUniformQuadAnyKHR: *hasResult = true; *hasResultType = true; break;
|
|
case Op::OpHitObjectRecordHitMotionNV: *hasResult = false; *hasResultType = false; break;
|
|
case Op::OpHitObjectRecordHitWithIndexMotionNV: *hasResult = false; *hasResultType = false; break;
|
|
case Op::OpHitObjectRecordMissMotionNV: *hasResult = false; *hasResultType = false; break;
|
|
@@ -2573,6 +2627,7 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
|
|
case Op::OpConvertUToSampledImageNV: *hasResult = true; *hasResultType = true; break;
|
|
case Op::OpConvertSampledImageToUNV: *hasResult = true; *hasResultType = true; break;
|
|
case Op::OpSamplerImageAddressingModeNV: *hasResult = false; *hasResultType = false; break;
|
|
+ case Op::OpRawAccessChainNV: *hasResult = true; *hasResultType = true; break;
|
|
case Op::OpSubgroupShuffleINTEL: *hasResult = true; *hasResultType = true; break;
|
|
case Op::OpSubgroupShuffleDownINTEL: *hasResult = true; *hasResultType = true; break;
|
|
case Op::OpSubgroupShuffleUpINTEL: *hasResult = true; *hasResultType = true; break;
|
|
@@ -2825,6 +2880,8 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
|
|
case Op::OpGroupLogicalAndKHR: *hasResult = true; *hasResultType = true; break;
|
|
case Op::OpGroupLogicalOrKHR: *hasResult = true; *hasResultType = true; break;
|
|
case Op::OpGroupLogicalXorKHR: *hasResult = true; *hasResultType = true; break;
|
|
+ case Op::OpMaskedGatherINTEL: *hasResult = true; *hasResultType = true; break;
|
|
+ case Op::OpMaskedScatterINTEL: *hasResult = false; *hasResultType = false; break;
|
|
}
|
|
}
|
|
#endif /* SPV_ENABLE_UTILITY_CODE */
|
|
@@ -2875,6 +2932,10 @@ constexpr CooperativeMatrixOperandsMask operator|(CooperativeMatrixOperandsMask
|
|
constexpr CooperativeMatrixOperandsMask operator&(CooperativeMatrixOperandsMask a, CooperativeMatrixOperandsMask b) { return CooperativeMatrixOperandsMask(unsigned(a) & unsigned(b)); }
|
|
constexpr CooperativeMatrixOperandsMask operator^(CooperativeMatrixOperandsMask a, CooperativeMatrixOperandsMask b) { return CooperativeMatrixOperandsMask(unsigned(a) ^ unsigned(b)); }
|
|
constexpr CooperativeMatrixOperandsMask operator~(CooperativeMatrixOperandsMask a) { return CooperativeMatrixOperandsMask(~unsigned(a)); }
|
|
+constexpr RawAccessChainOperandsMask operator|(RawAccessChainOperandsMask a, RawAccessChainOperandsMask b) { return RawAccessChainOperandsMask(unsigned(a) | unsigned(b)); }
|
|
+constexpr RawAccessChainOperandsMask operator&(RawAccessChainOperandsMask a, RawAccessChainOperandsMask b) { return RawAccessChainOperandsMask(unsigned(a) & unsigned(b)); }
|
|
+constexpr RawAccessChainOperandsMask operator^(RawAccessChainOperandsMask a, RawAccessChainOperandsMask b) { return RawAccessChainOperandsMask(unsigned(a) ^ unsigned(b)); }
|
|
+constexpr RawAccessChainOperandsMask operator~(RawAccessChainOperandsMask a) { return RawAccessChainOperandsMask(~unsigned(a)); }
|
|
|
|
} // end namespace spv
|
|
|
|
diff --git a/include/spirv/unified1/spirv.json b/include/spirv/unified1/spirv.json
|
|
index 505db1f..204a9c5 100644
|
|
--- a/include/spirv/unified1/spirv.json
|
|
+++ b/include/spirv/unified1/spirv.json
|
|
@@ -6,7 +6,7 @@
|
|
"Comment":
|
|
[
|
|
[
|
|
- "Copyright (c) 2014-2020 The Khronos Group Inc.",
|
|
+ "Copyright (c) 2014-2024 The Khronos Group Inc.",
|
|
"",
|
|
"Permission is hereby granted, free of charge, to any person obtaining a copy",
|
|
"of this software and/or associated documentation files (the \"Materials\"),",
|
|
@@ -79,7 +79,8 @@
|
|
"HERO_C": 8,
|
|
"NZSL": 9,
|
|
"WGSL": 10,
|
|
- "Slang": 11
|
|
+ "Slang": 11,
|
|
+ "Zig": 12
|
|
}
|
|
},
|
|
{
|
|
@@ -202,6 +203,8 @@
|
|
"StencilRefUnchangedBackAMD": 5082,
|
|
"StencilRefGreaterBackAMD": 5083,
|
|
"StencilRefLessBackAMD": 5084,
|
|
+ "QuadDerivativesKHR": 5088,
|
|
+ "RequireFullQuadsKHR": 5089,
|
|
"OutputLinesEXT": 5269,
|
|
"OutputLinesNV": 5269,
|
|
"OutputPrimitivesEXT": 5270,
|
|
@@ -226,9 +229,14 @@
|
|
"NoGlobalOffsetINTEL": 5895,
|
|
"NumSIMDWorkitemsINTEL": 5896,
|
|
"SchedulerTargetFmaxMhzINTEL": 5903,
|
|
+ "MaximallyReconvergesKHR": 6023,
|
|
+ "FPFastMathDefault": 6028,
|
|
"StreamingInterfaceINTEL": 6154,
|
|
"RegisterMapInterfaceINTEL": 6160,
|
|
- "NamedBarrierCountINTEL": 6417
|
|
+ "NamedBarrierCountINTEL": 6417,
|
|
+ "MaximumRegistersINTEL": 6461,
|
|
+ "MaximumRegistersIdINTEL": 6462,
|
|
+ "NamedMaximumRegistersINTEL": 6463
|
|
}
|
|
},
|
|
{
|
|
@@ -448,8 +456,11 @@
|
|
"NSZ": 2,
|
|
"AllowRecip": 3,
|
|
"Fast": 4,
|
|
+ "AllowContract": 16,
|
|
"AllowContractFastINTEL": 16,
|
|
- "AllowReassocINTEL": 17
|
|
+ "AllowReassoc": 17,
|
|
+ "AllowReassocINTEL": 17,
|
|
+ "AllowTransform": 18
|
|
}
|
|
},
|
|
{
|
|
@@ -555,6 +566,7 @@
|
|
"NoUnsignedWrap": 4470,
|
|
"WeightTextureQCOM": 4487,
|
|
"BlockMatchTextureQCOM": 4488,
|
|
+ "BlockMatchSamplerQCOM": 4499,
|
|
"ExplicitInterpAMD": 4999,
|
|
"NodeSharesPayloadLimitsWithAMDX": 5019,
|
|
"NodeMaxPayloadsAMDX": 5020,
|
|
@@ -1044,6 +1056,7 @@
|
|
"TextureSampleWeightedQCOM": 4484,
|
|
"TextureBoxFilterQCOM": 4485,
|
|
"TextureBlockMatchQCOM": 4486,
|
|
+ "TextureBlockMatch2QCOM": 4498,
|
|
"Float16ImageAMD": 5008,
|
|
"ImageGatherBiasLodAMD": 5009,
|
|
"FragmentMaskAMD": 5010,
|
|
@@ -1052,6 +1065,7 @@
|
|
"Int64ImageEXT": 5016,
|
|
"ShaderClockKHR": 5055,
|
|
"ShaderEnqueueAMDX": 5067,
|
|
+ "QuadControlKHR": 5087,
|
|
"SampleMaskOverrideCoverageNV": 5249,
|
|
"GeometryShaderPassthroughNV": 5251,
|
|
"ShaderViewportIndexLayerEXT": 5254,
|
|
@@ -1116,7 +1130,9 @@
|
|
"ShaderInvocationReorderNV": 5383,
|
|
"BindlessTextureNV": 5390,
|
|
"RayQueryPositionFetchKHR": 5391,
|
|
+ "AtomicFloat16VectorNV": 5404,
|
|
"RayTracingDisplacementMicromapNV": 5409,
|
|
+ "RawAccessChainsNV": 5414,
|
|
"SubgroupShuffleINTEL": 5568,
|
|
"SubgroupBufferBlockIOINTEL": 5569,
|
|
"SubgroupImageBlockIOINTEL": 5570,
|
|
@@ -1171,6 +1187,7 @@
|
|
"CooperativeMatrixKHR": 6022,
|
|
"BitInstructions": 6025,
|
|
"GroupNonUniformRotateKHR": 6026,
|
|
+ "FloatControls2": 6029,
|
|
"AtomicFloat32AddEXT": 6033,
|
|
"AtomicFloat64AddEXT": 6034,
|
|
"LongCompositesINTEL": 6089,
|
|
@@ -1187,7 +1204,9 @@
|
|
"GlobalVariableHostAccessINTEL": 6187,
|
|
"GlobalVariableFPGADecorationsINTEL": 6189,
|
|
"GroupUniformArithmeticKHR": 6400,
|
|
- "CacheControlsINTEL": 6441
|
|
+ "MaskedGatherScatterINTEL": 6427,
|
|
+ "CacheControlsINTEL": 6441,
|
|
+ "RegisterLimitsINTEL": 6460
|
|
}
|
|
},
|
|
{
|
|
@@ -1374,6 +1393,23 @@
|
|
"StreamingINTEL": 3
|
|
}
|
|
},
|
|
+ {
|
|
+ "Name": "NamedMaximumNumberOfRegisters",
|
|
+ "Type": "Value",
|
|
+ "Values":
|
|
+ {
|
|
+ "AutoINTEL": 0
|
|
+ }
|
|
+ },
|
|
+ {
|
|
+ "Name": "RawAccessChainOperands",
|
|
+ "Type": "Bit",
|
|
+ "Values":
|
|
+ {
|
|
+ "RobustnessPerComponentNV": 0,
|
|
+ "RobustnessPerElementNV": 1
|
|
+ }
|
|
+ },
|
|
{
|
|
"Name": "Op",
|
|
"Type": "Value",
|
|
@@ -1767,6 +1803,10 @@
|
|
"OpImageBoxFilterQCOM": 4481,
|
|
"OpImageBlockMatchSSDQCOM": 4482,
|
|
"OpImageBlockMatchSADQCOM": 4483,
|
|
+ "OpImageBlockMatchWindowSSDQCOM": 4500,
|
|
+ "OpImageBlockMatchWindowSADQCOM": 4501,
|
|
+ "OpImageBlockMatchGatherSSDQCOM": 4502,
|
|
+ "OpImageBlockMatchGatherSADQCOM": 4503,
|
|
"OpGroupIAddNonUniformAMD": 5000,
|
|
"OpGroupFAddNonUniformAMD": 5001,
|
|
"OpGroupFMinNonUniformAMD": 5002,
|
|
@@ -1781,6 +1821,8 @@
|
|
"OpFinalizeNodePayloadsAMDX": 5075,
|
|
"OpFinishWritingNodePayloadAMDX": 5078,
|
|
"OpInitializeNodePayloadsAMDX": 5090,
|
|
+ "OpGroupNonUniformQuadAllKHR": 5110,
|
|
+ "OpGroupNonUniformQuadAnyKHR": 5111,
|
|
"OpHitObjectRecordHitMotionNV": 5249,
|
|
"OpHitObjectRecordHitWithIndexMotionNV": 5250,
|
|
"OpHitObjectRecordMissMotionNV": 5251,
|
|
@@ -1849,6 +1891,7 @@
|
|
"OpConvertUToSampledImageNV": 5395,
|
|
"OpConvertSampledImageToUNV": 5396,
|
|
"OpSamplerImageAddressingModeNV": 5397,
|
|
+ "OpRawAccessChainNV": 5398,
|
|
"OpSubgroupShuffleINTEL": 5571,
|
|
"OpSubgroupShuffleDownINTEL": 5572,
|
|
"OpSubgroupShuffleUpINTEL": 5573,
|
|
@@ -2102,7 +2145,9 @@
|
|
"OpGroupBitwiseXorKHR": 6405,
|
|
"OpGroupLogicalAndKHR": 6406,
|
|
"OpGroupLogicalOrKHR": 6407,
|
|
- "OpGroupLogicalXorKHR": 6408
|
|
+ "OpGroupLogicalXorKHR": 6408,
|
|
+ "OpMaskedGatherINTEL": 6428,
|
|
+ "OpMaskedScatterINTEL": 6429
|
|
}
|
|
}
|
|
]
|
|
diff --git a/include/spirv/unified1/spirv.lua b/include/spirv/unified1/spirv.lua
|
|
index fb86460..6dcd1b8 100644
|
|
--- a/include/spirv/unified1/spirv.lua
|
|
+++ b/include/spirv/unified1/spirv.lua
|
|
@@ -1,4 +1,4 @@
|
|
--- Copyright (c) 2014-2020 The Khronos Group Inc.
|
|
+-- Copyright (c) 2014-2024 The Khronos Group Inc.
|
|
--
|
|
-- Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
-- of this software and/or associated documentation files (the "Materials"),
|
|
@@ -64,6 +64,7 @@ spv = {
|
|
NZSL = 9,
|
|
WGSL = 10,
|
|
Slang = 11,
|
|
+ Zig = 12,
|
|
},
|
|
|
|
ExecutionModel = {
|
|
@@ -170,6 +171,8 @@ spv = {
|
|
StencilRefUnchangedBackAMD = 5082,
|
|
StencilRefGreaterBackAMD = 5083,
|
|
StencilRefLessBackAMD = 5084,
|
|
+ QuadDerivativesKHR = 5088,
|
|
+ RequireFullQuadsKHR = 5089,
|
|
OutputLinesEXT = 5269,
|
|
OutputLinesNV = 5269,
|
|
OutputPrimitivesEXT = 5270,
|
|
@@ -194,9 +197,14 @@ spv = {
|
|
NoGlobalOffsetINTEL = 5895,
|
|
NumSIMDWorkitemsINTEL = 5896,
|
|
SchedulerTargetFmaxMhzINTEL = 5903,
|
|
+ MaximallyReconvergesKHR = 6023,
|
|
+ FPFastMathDefault = 6028,
|
|
StreamingInterfaceINTEL = 6154,
|
|
RegisterMapInterfaceINTEL = 6160,
|
|
NamedBarrierCountINTEL = 6417,
|
|
+ MaximumRegistersINTEL = 6461,
|
|
+ MaximumRegistersIdINTEL = 6462,
|
|
+ NamedMaximumRegistersINTEL = 6463,
|
|
},
|
|
|
|
StorageClass = {
|
|
@@ -404,8 +412,11 @@ spv = {
|
|
NSZ = 2,
|
|
AllowRecip = 3,
|
|
Fast = 4,
|
|
+ AllowContract = 16,
|
|
AllowContractFastINTEL = 16,
|
|
+ AllowReassoc = 17,
|
|
AllowReassocINTEL = 17,
|
|
+ AllowTransform = 18,
|
|
},
|
|
|
|
FPFastMathModeMask = {
|
|
@@ -415,8 +426,11 @@ spv = {
|
|
NSZ = 0x00000004,
|
|
AllowRecip = 0x00000008,
|
|
Fast = 0x00000010,
|
|
+ AllowContract = 0x00010000,
|
|
AllowContractFastINTEL = 0x00010000,
|
|
+ AllowReassoc = 0x00020000,
|
|
AllowReassocINTEL = 0x00020000,
|
|
+ AllowTransform = 0x00040000,
|
|
},
|
|
|
|
FPRoundingMode = {
|
|
@@ -502,6 +516,7 @@ spv = {
|
|
NoUnsignedWrap = 4470,
|
|
WeightTextureQCOM = 4487,
|
|
BlockMatchTextureQCOM = 4488,
|
|
+ BlockMatchSamplerQCOM = 4499,
|
|
ExplicitInterpAMD = 4999,
|
|
NodeSharesPayloadLimitsWithAMDX = 5019,
|
|
NodeMaxPayloadsAMDX = 5020,
|
|
@@ -1026,6 +1041,7 @@ spv = {
|
|
TextureSampleWeightedQCOM = 4484,
|
|
TextureBoxFilterQCOM = 4485,
|
|
TextureBlockMatchQCOM = 4486,
|
|
+ TextureBlockMatch2QCOM = 4498,
|
|
Float16ImageAMD = 5008,
|
|
ImageGatherBiasLodAMD = 5009,
|
|
FragmentMaskAMD = 5010,
|
|
@@ -1034,6 +1050,7 @@ spv = {
|
|
Int64ImageEXT = 5016,
|
|
ShaderClockKHR = 5055,
|
|
ShaderEnqueueAMDX = 5067,
|
|
+ QuadControlKHR = 5087,
|
|
SampleMaskOverrideCoverageNV = 5249,
|
|
GeometryShaderPassthroughNV = 5251,
|
|
ShaderViewportIndexLayerEXT = 5254,
|
|
@@ -1098,7 +1115,9 @@ spv = {
|
|
ShaderInvocationReorderNV = 5383,
|
|
BindlessTextureNV = 5390,
|
|
RayQueryPositionFetchKHR = 5391,
|
|
+ AtomicFloat16VectorNV = 5404,
|
|
RayTracingDisplacementMicromapNV = 5409,
|
|
+ RawAccessChainsNV = 5414,
|
|
SubgroupShuffleINTEL = 5568,
|
|
SubgroupBufferBlockIOINTEL = 5569,
|
|
SubgroupImageBlockIOINTEL = 5570,
|
|
@@ -1153,6 +1172,7 @@ spv = {
|
|
CooperativeMatrixKHR = 6022,
|
|
BitInstructions = 6025,
|
|
GroupNonUniformRotateKHR = 6026,
|
|
+ FloatControls2 = 6029,
|
|
AtomicFloat32AddEXT = 6033,
|
|
AtomicFloat64AddEXT = 6034,
|
|
LongCompositesINTEL = 6089,
|
|
@@ -1169,7 +1189,9 @@ spv = {
|
|
GlobalVariableHostAccessINTEL = 6187,
|
|
GlobalVariableFPGADecorationsINTEL = 6189,
|
|
GroupUniformArithmeticKHR = 6400,
|
|
+ MaskedGatherScatterINTEL = 6427,
|
|
CacheControlsINTEL = 6441,
|
|
+ RegisterLimitsINTEL = 6460,
|
|
},
|
|
|
|
RayFlagsShift = {
|
|
@@ -1320,6 +1342,21 @@ spv = {
|
|
StreamingINTEL = 3,
|
|
},
|
|
|
|
+ NamedMaximumNumberOfRegisters = {
|
|
+ AutoINTEL = 0,
|
|
+ },
|
|
+
|
|
+ RawAccessChainOperandsShift = {
|
|
+ RobustnessPerComponentNV = 0,
|
|
+ RobustnessPerElementNV = 1,
|
|
+ },
|
|
+
|
|
+ RawAccessChainOperandsMask = {
|
|
+ MaskNone = 0,
|
|
+ RobustnessPerComponentNV = 0x00000001,
|
|
+ RobustnessPerElementNV = 0x00000002,
|
|
+ },
|
|
+
|
|
Op = {
|
|
OpNop = 0,
|
|
OpUndef = 1,
|
|
@@ -1709,6 +1746,10 @@ spv = {
|
|
OpImageBoxFilterQCOM = 4481,
|
|
OpImageBlockMatchSSDQCOM = 4482,
|
|
OpImageBlockMatchSADQCOM = 4483,
|
|
+ OpImageBlockMatchWindowSSDQCOM = 4500,
|
|
+ OpImageBlockMatchWindowSADQCOM = 4501,
|
|
+ OpImageBlockMatchGatherSSDQCOM = 4502,
|
|
+ OpImageBlockMatchGatherSADQCOM = 4503,
|
|
OpGroupIAddNonUniformAMD = 5000,
|
|
OpGroupFAddNonUniformAMD = 5001,
|
|
OpGroupFMinNonUniformAMD = 5002,
|
|
@@ -1723,6 +1764,8 @@ spv = {
|
|
OpFinalizeNodePayloadsAMDX = 5075,
|
|
OpFinishWritingNodePayloadAMDX = 5078,
|
|
OpInitializeNodePayloadsAMDX = 5090,
|
|
+ OpGroupNonUniformQuadAllKHR = 5110,
|
|
+ OpGroupNonUniformQuadAnyKHR = 5111,
|
|
OpHitObjectRecordHitMotionNV = 5249,
|
|
OpHitObjectRecordHitWithIndexMotionNV = 5250,
|
|
OpHitObjectRecordMissMotionNV = 5251,
|
|
@@ -1791,6 +1834,7 @@ spv = {
|
|
OpConvertUToSampledImageNV = 5395,
|
|
OpConvertSampledImageToUNV = 5396,
|
|
OpSamplerImageAddressingModeNV = 5397,
|
|
+ OpRawAccessChainNV = 5398,
|
|
OpSubgroupShuffleINTEL = 5571,
|
|
OpSubgroupShuffleDownINTEL = 5572,
|
|
OpSubgroupShuffleUpINTEL = 5573,
|
|
@@ -2045,6 +2089,8 @@ spv = {
|
|
OpGroupLogicalAndKHR = 6406,
|
|
OpGroupLogicalOrKHR = 6407,
|
|
OpGroupLogicalXorKHR = 6408,
|
|
+ OpMaskedGatherINTEL = 6428,
|
|
+ OpMaskedScatterINTEL = 6429,
|
|
},
|
|
|
|
}
|
|
diff --git a/include/spirv/unified1/spirv.py b/include/spirv/unified1/spirv.py
|
|
index fd86fae..4b011cf 100644
|
|
--- a/include/spirv/unified1/spirv.py
|
|
+++ b/include/spirv/unified1/spirv.py
|
|
@@ -1,4 +1,4 @@
|
|
-# Copyright (c) 2014-2020 The Khronos Group Inc.
|
|
+# Copyright (c) 2014-2024 The Khronos Group Inc.
|
|
#
|
|
# Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
# of this software and/or associated documentation files (the "Materials"),
|
|
@@ -64,6 +64,7 @@ spv = {
|
|
'NZSL' : 9,
|
|
'WGSL' : 10,
|
|
'Slang' : 11,
|
|
+ 'Zig' : 12,
|
|
},
|
|
|
|
'ExecutionModel' : {
|
|
@@ -170,6 +171,8 @@ spv = {
|
|
'StencilRefUnchangedBackAMD' : 5082,
|
|
'StencilRefGreaterBackAMD' : 5083,
|
|
'StencilRefLessBackAMD' : 5084,
|
|
+ 'QuadDerivativesKHR' : 5088,
|
|
+ 'RequireFullQuadsKHR' : 5089,
|
|
'OutputLinesEXT' : 5269,
|
|
'OutputLinesNV' : 5269,
|
|
'OutputPrimitivesEXT' : 5270,
|
|
@@ -194,9 +197,14 @@ spv = {
|
|
'NoGlobalOffsetINTEL' : 5895,
|
|
'NumSIMDWorkitemsINTEL' : 5896,
|
|
'SchedulerTargetFmaxMhzINTEL' : 5903,
|
|
+ 'MaximallyReconvergesKHR' : 6023,
|
|
+ 'FPFastMathDefault' : 6028,
|
|
'StreamingInterfaceINTEL' : 6154,
|
|
'RegisterMapInterfaceINTEL' : 6160,
|
|
'NamedBarrierCountINTEL' : 6417,
|
|
+ 'MaximumRegistersINTEL' : 6461,
|
|
+ 'MaximumRegistersIdINTEL' : 6462,
|
|
+ 'NamedMaximumRegistersINTEL' : 6463,
|
|
},
|
|
|
|
'StorageClass' : {
|
|
@@ -404,8 +412,11 @@ spv = {
|
|
'NSZ' : 2,
|
|
'AllowRecip' : 3,
|
|
'Fast' : 4,
|
|
+ 'AllowContract' : 16,
|
|
'AllowContractFastINTEL' : 16,
|
|
+ 'AllowReassoc' : 17,
|
|
'AllowReassocINTEL' : 17,
|
|
+ 'AllowTransform' : 18,
|
|
},
|
|
|
|
'FPFastMathModeMask' : {
|
|
@@ -415,8 +426,11 @@ spv = {
|
|
'NSZ' : 0x00000004,
|
|
'AllowRecip' : 0x00000008,
|
|
'Fast' : 0x00000010,
|
|
+ 'AllowContract' : 0x00010000,
|
|
'AllowContractFastINTEL' : 0x00010000,
|
|
+ 'AllowReassoc' : 0x00020000,
|
|
'AllowReassocINTEL' : 0x00020000,
|
|
+ 'AllowTransform' : 0x00040000,
|
|
},
|
|
|
|
'FPRoundingMode' : {
|
|
@@ -502,6 +516,7 @@ spv = {
|
|
'NoUnsignedWrap' : 4470,
|
|
'WeightTextureQCOM' : 4487,
|
|
'BlockMatchTextureQCOM' : 4488,
|
|
+ 'BlockMatchSamplerQCOM' : 4499,
|
|
'ExplicitInterpAMD' : 4999,
|
|
'NodeSharesPayloadLimitsWithAMDX' : 5019,
|
|
'NodeMaxPayloadsAMDX' : 5020,
|
|
@@ -1026,6 +1041,7 @@ spv = {
|
|
'TextureSampleWeightedQCOM' : 4484,
|
|
'TextureBoxFilterQCOM' : 4485,
|
|
'TextureBlockMatchQCOM' : 4486,
|
|
+ 'TextureBlockMatch2QCOM' : 4498,
|
|
'Float16ImageAMD' : 5008,
|
|
'ImageGatherBiasLodAMD' : 5009,
|
|
'FragmentMaskAMD' : 5010,
|
|
@@ -1034,6 +1050,7 @@ spv = {
|
|
'Int64ImageEXT' : 5016,
|
|
'ShaderClockKHR' : 5055,
|
|
'ShaderEnqueueAMDX' : 5067,
|
|
+ 'QuadControlKHR' : 5087,
|
|
'SampleMaskOverrideCoverageNV' : 5249,
|
|
'GeometryShaderPassthroughNV' : 5251,
|
|
'ShaderViewportIndexLayerEXT' : 5254,
|
|
@@ -1098,7 +1115,9 @@ spv = {
|
|
'ShaderInvocationReorderNV' : 5383,
|
|
'BindlessTextureNV' : 5390,
|
|
'RayQueryPositionFetchKHR' : 5391,
|
|
+ 'AtomicFloat16VectorNV' : 5404,
|
|
'RayTracingDisplacementMicromapNV' : 5409,
|
|
+ 'RawAccessChainsNV' : 5414,
|
|
'SubgroupShuffleINTEL' : 5568,
|
|
'SubgroupBufferBlockIOINTEL' : 5569,
|
|
'SubgroupImageBlockIOINTEL' : 5570,
|
|
@@ -1153,6 +1172,7 @@ spv = {
|
|
'CooperativeMatrixKHR' : 6022,
|
|
'BitInstructions' : 6025,
|
|
'GroupNonUniformRotateKHR' : 6026,
|
|
+ 'FloatControls2' : 6029,
|
|
'AtomicFloat32AddEXT' : 6033,
|
|
'AtomicFloat64AddEXT' : 6034,
|
|
'LongCompositesINTEL' : 6089,
|
|
@@ -1169,7 +1189,9 @@ spv = {
|
|
'GlobalVariableHostAccessINTEL' : 6187,
|
|
'GlobalVariableFPGADecorationsINTEL' : 6189,
|
|
'GroupUniformArithmeticKHR' : 6400,
|
|
+ 'MaskedGatherScatterINTEL' : 6427,
|
|
'CacheControlsINTEL' : 6441,
|
|
+ 'RegisterLimitsINTEL' : 6460,
|
|
},
|
|
|
|
'RayFlagsShift' : {
|
|
@@ -1320,6 +1342,21 @@ spv = {
|
|
'StreamingINTEL' : 3,
|
|
},
|
|
|
|
+ 'NamedMaximumNumberOfRegisters' : {
|
|
+ 'AutoINTEL' : 0,
|
|
+ },
|
|
+
|
|
+ 'RawAccessChainOperandsShift' : {
|
|
+ 'RobustnessPerComponentNV' : 0,
|
|
+ 'RobustnessPerElementNV' : 1,
|
|
+ },
|
|
+
|
|
+ 'RawAccessChainOperandsMask' : {
|
|
+ 'MaskNone' : 0,
|
|
+ 'RobustnessPerComponentNV' : 0x00000001,
|
|
+ 'RobustnessPerElementNV' : 0x00000002,
|
|
+ },
|
|
+
|
|
'Op' : {
|
|
'OpNop' : 0,
|
|
'OpUndef' : 1,
|
|
@@ -1709,6 +1746,10 @@ spv = {
|
|
'OpImageBoxFilterQCOM' : 4481,
|
|
'OpImageBlockMatchSSDQCOM' : 4482,
|
|
'OpImageBlockMatchSADQCOM' : 4483,
|
|
+ 'OpImageBlockMatchWindowSSDQCOM' : 4500,
|
|
+ 'OpImageBlockMatchWindowSADQCOM' : 4501,
|
|
+ 'OpImageBlockMatchGatherSSDQCOM' : 4502,
|
|
+ 'OpImageBlockMatchGatherSADQCOM' : 4503,
|
|
'OpGroupIAddNonUniformAMD' : 5000,
|
|
'OpGroupFAddNonUniformAMD' : 5001,
|
|
'OpGroupFMinNonUniformAMD' : 5002,
|
|
@@ -1723,6 +1764,8 @@ spv = {
|
|
'OpFinalizeNodePayloadsAMDX' : 5075,
|
|
'OpFinishWritingNodePayloadAMDX' : 5078,
|
|
'OpInitializeNodePayloadsAMDX' : 5090,
|
|
+ 'OpGroupNonUniformQuadAllKHR' : 5110,
|
|
+ 'OpGroupNonUniformQuadAnyKHR' : 5111,
|
|
'OpHitObjectRecordHitMotionNV' : 5249,
|
|
'OpHitObjectRecordHitWithIndexMotionNV' : 5250,
|
|
'OpHitObjectRecordMissMotionNV' : 5251,
|
|
@@ -1791,6 +1834,7 @@ spv = {
|
|
'OpConvertUToSampledImageNV' : 5395,
|
|
'OpConvertSampledImageToUNV' : 5396,
|
|
'OpSamplerImageAddressingModeNV' : 5397,
|
|
+ 'OpRawAccessChainNV' : 5398,
|
|
'OpSubgroupShuffleINTEL' : 5571,
|
|
'OpSubgroupShuffleDownINTEL' : 5572,
|
|
'OpSubgroupShuffleUpINTEL' : 5573,
|
|
@@ -2045,6 +2089,8 @@ spv = {
|
|
'OpGroupLogicalAndKHR' : 6406,
|
|
'OpGroupLogicalOrKHR' : 6407,
|
|
'OpGroupLogicalXorKHR' : 6408,
|
|
+ 'OpMaskedGatherINTEL' : 6428,
|
|
+ 'OpMaskedScatterINTEL' : 6429,
|
|
},
|
|
|
|
}
|
|
diff --git a/include/spirv/unified1/spv.d b/include/spirv/unified1/spv.d
|
|
index 1f56630..64c115e 100644
|
|
--- a/include/spirv/unified1/spv.d
|
|
+++ b/include/spirv/unified1/spv.d
|
|
@@ -1,5 +1,5 @@
|
|
/+
|
|
- + Copyright (c) 2014-2020 The Khronos Group Inc.
|
|
+ + Copyright (c) 2014-2024 The Khronos Group Inc.
|
|
+
|
|
+ Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
+ of this software and/or associated documentation files (the "Materials"),
|
|
@@ -72,6 +72,7 @@ enum SourceLanguage : uint
|
|
NZSL = 9,
|
|
WGSL = 10,
|
|
Slang = 11,
|
|
+ Zig = 12,
|
|
}
|
|
|
|
enum ExecutionModel : uint
|
|
@@ -182,6 +183,8 @@ enum ExecutionMode : uint
|
|
StencilRefUnchangedBackAMD = 5082,
|
|
StencilRefGreaterBackAMD = 5083,
|
|
StencilRefLessBackAMD = 5084,
|
|
+ QuadDerivativesKHR = 5088,
|
|
+ RequireFullQuadsKHR = 5089,
|
|
OutputLinesEXT = 5269,
|
|
OutputLinesNV = 5269,
|
|
OutputPrimitivesEXT = 5270,
|
|
@@ -206,9 +209,14 @@ enum ExecutionMode : uint
|
|
NoGlobalOffsetINTEL = 5895,
|
|
NumSIMDWorkitemsINTEL = 5896,
|
|
SchedulerTargetFmaxMhzINTEL = 5903,
|
|
+ MaximallyReconvergesKHR = 6023,
|
|
+ FPFastMathDefault = 6028,
|
|
StreamingInterfaceINTEL = 6154,
|
|
RegisterMapInterfaceINTEL = 6160,
|
|
NamedBarrierCountINTEL = 6417,
|
|
+ MaximumRegistersINTEL = 6461,
|
|
+ MaximumRegistersIdINTEL = 6462,
|
|
+ NamedMaximumRegistersINTEL = 6463,
|
|
}
|
|
|
|
enum StorageClass : uint
|
|
@@ -426,8 +434,11 @@ enum FPFastMathModeShift : uint
|
|
NSZ = 2,
|
|
AllowRecip = 3,
|
|
Fast = 4,
|
|
+ AllowContract = 16,
|
|
AllowContractFastINTEL = 16,
|
|
+ AllowReassoc = 17,
|
|
AllowReassocINTEL = 17,
|
|
+ AllowTransform = 18,
|
|
}
|
|
|
|
enum FPFastMathModeMask : uint
|
|
@@ -438,8 +449,11 @@ enum FPFastMathModeMask : uint
|
|
NSZ = 0x00000004,
|
|
AllowRecip = 0x00000008,
|
|
Fast = 0x00000010,
|
|
+ AllowContract = 0x00010000,
|
|
AllowContractFastINTEL = 0x00010000,
|
|
+ AllowReassoc = 0x00020000,
|
|
AllowReassocINTEL = 0x00020000,
|
|
+ AllowTransform = 0x00040000,
|
|
}
|
|
|
|
enum FPRoundingMode : uint
|
|
@@ -530,6 +544,7 @@ enum Decoration : uint
|
|
NoUnsignedWrap = 4470,
|
|
WeightTextureQCOM = 4487,
|
|
BlockMatchTextureQCOM = 4488,
|
|
+ BlockMatchSamplerQCOM = 4499,
|
|
ExplicitInterpAMD = 4999,
|
|
NodeSharesPayloadLimitsWithAMDX = 5019,
|
|
NodeMaxPayloadsAMDX = 5020,
|
|
@@ -1071,6 +1086,7 @@ enum Capability : uint
|
|
TextureSampleWeightedQCOM = 4484,
|
|
TextureBoxFilterQCOM = 4485,
|
|
TextureBlockMatchQCOM = 4486,
|
|
+ TextureBlockMatch2QCOM = 4498,
|
|
Float16ImageAMD = 5008,
|
|
ImageGatherBiasLodAMD = 5009,
|
|
FragmentMaskAMD = 5010,
|
|
@@ -1079,6 +1095,7 @@ enum Capability : uint
|
|
Int64ImageEXT = 5016,
|
|
ShaderClockKHR = 5055,
|
|
ShaderEnqueueAMDX = 5067,
|
|
+ QuadControlKHR = 5087,
|
|
SampleMaskOverrideCoverageNV = 5249,
|
|
GeometryShaderPassthroughNV = 5251,
|
|
ShaderViewportIndexLayerEXT = 5254,
|
|
@@ -1143,7 +1160,9 @@ enum Capability : uint
|
|
ShaderInvocationReorderNV = 5383,
|
|
BindlessTextureNV = 5390,
|
|
RayQueryPositionFetchKHR = 5391,
|
|
+ AtomicFloat16VectorNV = 5404,
|
|
RayTracingDisplacementMicromapNV = 5409,
|
|
+ RawAccessChainsNV = 5414,
|
|
SubgroupShuffleINTEL = 5568,
|
|
SubgroupBufferBlockIOINTEL = 5569,
|
|
SubgroupImageBlockIOINTEL = 5570,
|
|
@@ -1198,6 +1217,7 @@ enum Capability : uint
|
|
CooperativeMatrixKHR = 6022,
|
|
BitInstructions = 6025,
|
|
GroupNonUniformRotateKHR = 6026,
|
|
+ FloatControls2 = 6029,
|
|
AtomicFloat32AddEXT = 6033,
|
|
AtomicFloat64AddEXT = 6034,
|
|
LongCompositesINTEL = 6089,
|
|
@@ -1214,7 +1234,9 @@ enum Capability : uint
|
|
GlobalVariableHostAccessINTEL = 6187,
|
|
GlobalVariableFPGADecorationsINTEL = 6189,
|
|
GroupUniformArithmeticKHR = 6400,
|
|
+ MaskedGatherScatterINTEL = 6427,
|
|
CacheControlsINTEL = 6441,
|
|
+ RegisterLimitsINTEL = 6460,
|
|
}
|
|
|
|
enum RayFlagsShift : uint
|
|
@@ -1385,6 +1407,24 @@ enum StoreCacheControl : uint
|
|
StreamingINTEL = 3,
|
|
}
|
|
|
|
+enum NamedMaximumNumberOfRegisters : uint
|
|
+{
|
|
+ AutoINTEL = 0,
|
|
+}
|
|
+
|
|
+enum RawAccessChainOperandsShift : uint
|
|
+{
|
|
+ RobustnessPerComponentNV = 0,
|
|
+ RobustnessPerElementNV = 1,
|
|
+}
|
|
+
|
|
+enum RawAccessChainOperandsMask : uint
|
|
+{
|
|
+ MaskNone = 0,
|
|
+ RobustnessPerComponentNV = 0x00000001,
|
|
+ RobustnessPerElementNV = 0x00000002,
|
|
+}
|
|
+
|
|
enum Op : uint
|
|
{
|
|
OpNop = 0,
|
|
@@ -1775,6 +1815,10 @@ enum Op : uint
|
|
OpImageBoxFilterQCOM = 4481,
|
|
OpImageBlockMatchSSDQCOM = 4482,
|
|
OpImageBlockMatchSADQCOM = 4483,
|
|
+ OpImageBlockMatchWindowSSDQCOM = 4500,
|
|
+ OpImageBlockMatchWindowSADQCOM = 4501,
|
|
+ OpImageBlockMatchGatherSSDQCOM = 4502,
|
|
+ OpImageBlockMatchGatherSADQCOM = 4503,
|
|
OpGroupIAddNonUniformAMD = 5000,
|
|
OpGroupFAddNonUniformAMD = 5001,
|
|
OpGroupFMinNonUniformAMD = 5002,
|
|
@@ -1789,6 +1833,8 @@ enum Op : uint
|
|
OpFinalizeNodePayloadsAMDX = 5075,
|
|
OpFinishWritingNodePayloadAMDX = 5078,
|
|
OpInitializeNodePayloadsAMDX = 5090,
|
|
+ OpGroupNonUniformQuadAllKHR = 5110,
|
|
+ OpGroupNonUniformQuadAnyKHR = 5111,
|
|
OpHitObjectRecordHitMotionNV = 5249,
|
|
OpHitObjectRecordHitWithIndexMotionNV = 5250,
|
|
OpHitObjectRecordMissMotionNV = 5251,
|
|
@@ -1857,6 +1903,7 @@ enum Op : uint
|
|
OpConvertUToSampledImageNV = 5395,
|
|
OpConvertSampledImageToUNV = 5396,
|
|
OpSamplerImageAddressingModeNV = 5397,
|
|
+ OpRawAccessChainNV = 5398,
|
|
OpSubgroupShuffleINTEL = 5571,
|
|
OpSubgroupShuffleDownINTEL = 5572,
|
|
OpSubgroupShuffleUpINTEL = 5573,
|
|
@@ -2111,6 +2158,8 @@ enum Op : uint
|
|
OpGroupLogicalAndKHR = 6406,
|
|
OpGroupLogicalOrKHR = 6407,
|
|
OpGroupLogicalXorKHR = 6408,
|
|
+ OpMaskedGatherINTEL = 6428,
|
|
+ OpMaskedScatterINTEL = 6429,
|
|
}
|
|
|
|
|
|
diff --git a/tests/CMakeLists.txt b/tests/CMakeLists.txt
|
|
index 6d86090..ebf7e12 100644
|
|
--- a/tests/CMakeLists.txt
|
|
+++ b/tests/CMakeLists.txt
|
|
@@ -1,4 +1,4 @@
|
|
-# Copyright (c) 2015-2023 The Khronos Group Inc.
|
|
+# Copyright (c) 2015-2024 The Khronos Group Inc.
|
|
#
|
|
# Permission is hereby granted, free of charge, to any person obtaining a
|
|
# copy of this software and/or associated documentation files (the
|
|
@@ -24,13 +24,13 @@
|
|
# TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
|
# MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
|
|
|
|
-add_library(simple_test STATIC)
|
|
+add_library(spirv_headers_simple_test STATIC)
|
|
|
|
-target_sources(simple_test PRIVATE
|
|
+target_sources(spirv_headers_simple_test PRIVATE
|
|
example.cpp
|
|
)
|
|
|
|
-target_link_libraries(simple_test PRIVATE
|
|
+target_link_libraries(spirv_headers_simple_test PRIVATE
|
|
SPIRV-Headers::SPIRV-Headers
|
|
)
|
|
|
|
diff --git a/tests/example.cpp b/tests/example.cpp
|
|
index d79b62f..1920e80 100644
|
|
--- a/tests/example.cpp
|
|
+++ b/tests/example.cpp
|
|
@@ -1,4 +1,4 @@
|
|
-// Copyright (c) 2016 The Khronos Group Inc.
|
|
+// Copyright (c) 2016-2024 The Khronos Group Inc.
|
|
//
|
|
// Permission is hereby granted, free of charge, to any person obtaining a
|
|
// copy of this software and/or associated documentation files (the
|
|
diff --git a/tools/buildHeaders/bin/generate_language_headers.py b/tools/buildHeaders/bin/generate_language_headers.py
|
|
index c56780c..ccd843b 100755
|
|
--- a/tools/buildHeaders/bin/generate_language_headers.py
|
|
+++ b/tools/buildHeaders/bin/generate_language_headers.py
|
|
@@ -1,5 +1,5 @@
|
|
#!/usr/bin/env python3
|
|
-# Copyright (c) 2017-2020 Google LLC
|
|
+# Copyright (c) 2017-2024 Google LLC
|
|
#
|
|
# Permission is hereby granted, free of charge, to any person obtaining a
|
|
# copy of this software and/or associated documentation files (the
|
|
@@ -32,7 +32,7 @@ import json
|
|
import os.path
|
|
import re
|
|
|
|
-DEFAULT_COPYRIGHT="""Copyright (c) 2020 The Khronos Group Inc.
|
|
+DEFAULT_COPYRIGHT="""Copyright (c) 2020-2024 The Khronos Group Inc.
|
|
|
|
Permission is hereby granted, free of charge, to any person obtaining a
|
|
copy of this software and/or associated documentation files (the
|
|
diff --git a/tools/buildHeaders/bin/makeExtinstHeaders.py b/tools/buildHeaders/bin/makeExtinstHeaders.py
|
|
index 8852d19..96ce008 100755
|
|
--- a/tools/buildHeaders/bin/makeExtinstHeaders.py
|
|
+++ b/tools/buildHeaders/bin/makeExtinstHeaders.py
|
|
@@ -27,3 +27,4 @@ mk_extinst('AMD_shader_trinary_minmax', 'extinst.spv-amd-shader-trinary-minmax.g
|
|
mk_extinst('NonSemanticDebugPrintf', 'extinst.nonsemantic.debugprintf.grammar.json')
|
|
mk_extinst('NonSemanticClspvReflection', 'extinst.nonsemantic.clspvreflection.grammar.json')
|
|
mk_extinst('NonSemanticDebugBreak', 'extinst.nonsemantic.debugbreak.grammar.json')
|
|
+mk_extinst('NonSemanticVkspReflection', 'extinst.nonsemantic.vkspreflection.grammar.json')
|
|
diff --git a/tools/buildHeaders/header.cpp b/tools/buildHeaders/header.cpp
|
|
index 4ee358b..d125a79 100644
|
|
--- a/tools/buildHeaders/header.cpp
|
|
+++ b/tools/buildHeaders/header.cpp
|
|
@@ -1,4 +1,4 @@
|
|
-// Copyright (c) 2014-2020 The Khronos Group Inc.
|
|
+// Copyright (c) 2014-2024 The Khronos Group Inc.
|
|
//
|
|
// Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
// of this software and/or associated documentation files (the "Materials"),
|
|
@@ -169,29 +169,30 @@ namespace {
|
|
}
|
|
|
|
const std::string TPrinter::DocCopyright =
|
|
- "Copyright (c) 2014-2020 The Khronos Group Inc.\n"
|
|
- "\n"
|
|
- "Permission is hereby granted, free of charge, to any person obtaining a copy\n"
|
|
- "of this software and/or associated documentation files (the \"Materials\"),\n"
|
|
- "to deal in the Materials without restriction, including without limitation\n"
|
|
- "the rights to use, copy, modify, merge, publish, distribute, sublicense,\n"
|
|
- "and/or sell copies of the Materials, and to permit persons to whom the\n"
|
|
- "Materials are furnished to do so, subject to the following conditions:\n"
|
|
- "\n"
|
|
- "The above copyright notice and this permission notice shall be included in\n"
|
|
- "all copies or substantial portions of the Materials.\n"
|
|
- "\n"
|
|
- "MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS KHRONOS\n"
|
|
- "STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS SPECIFICATIONS AND\n"
|
|
- "HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/ \n"
|
|
- "\n"
|
|
- "THE MATERIALS ARE PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS\n"
|
|
- "OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,\n"
|
|
- "FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL\n"
|
|
- "THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER\n"
|
|
- "LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING\n"
|
|
- "FROM,OUT OF OR IN CONNECTION WITH THE MATERIALS OR THE USE OR OTHER DEALINGS\n"
|
|
- "IN THE MATERIALS.\n";
|
|
+R"(Copyright (c) 2014-2024 The Khronos Group Inc.
|
|
+
|
|
+Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
+of this software and/or associated documentation files (the "Materials"),
|
|
+to deal in the Materials without restriction, including without limitation
|
|
+the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
+and/or sell copies of the Materials, and to permit persons to whom the
|
|
+Materials are furnished to do so, subject to the following conditions:
|
|
+
|
|
+The above copyright notice and this permission notice shall be included in
|
|
+all copies or substantial portions of the Materials.
|
|
+
|
|
+MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS KHRONOS
|
|
+STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS SPECIFICATIONS AND
|
|
+HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/
|
|
+
|
|
+THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
|
+OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
+THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
|
+FROM,OUT OF OR IN CONNECTION WITH THE MATERIALS OR THE USE OR OTHER DEALINGS
|
|
+IN THE MATERIALS.
|
|
+)";
|
|
|
|
const std::string TPrinter::DocComment1 =
|
|
"This header is automatically generated by the same tool that creates\n"
|
|
diff --git a/tools/buildHeaders/header.h b/tools/buildHeaders/header.h
|
|
index 1dd6e67..6854f80 100644
|
|
--- a/tools/buildHeaders/header.h
|
|
+++ b/tools/buildHeaders/header.h
|
|
@@ -1,4 +1,4 @@
|
|
-// Copyright (c) 2014-2019 The Khronos Group Inc.
|
|
+// Copyright (c) 2014-2024 The Khronos Group Inc.
|
|
//
|
|
// Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
// of this software and/or associated documentation files (the "Materials"),
|
|
diff --git a/tools/buildHeaders/jsonToSpirv.cpp b/tools/buildHeaders/jsonToSpirv.cpp
|
|
index ee396f0..34e0972 100644
|
|
--- a/tools/buildHeaders/jsonToSpirv.cpp
|
|
+++ b/tools/buildHeaders/jsonToSpirv.cpp
|
|
@@ -1,4 +1,4 @@
|
|
-// Copyright (c) 2014-2020 The Khronos Group Inc.
|
|
+// Copyright (c) 2014-2024 The Khronos Group Inc.
|
|
//
|
|
// Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
// of this software and/or associated documentation files (the "Materials"),
|
|
@@ -272,6 +272,8 @@ EnumValues InitializationModeQualifierParams;
|
|
EnumValues HostAccessQualifierParams;
|
|
EnumValues LoadCacheControlParams;
|
|
EnumValues StoreCacheControlParams;
|
|
+EnumValues NamedMaximumNumberOfRegistersParams;
|
|
+EnumValues RawAccessChainOperandsParams;
|
|
|
|
std::pair<bool, std::string> ReadFile(const std::string& path)
|
|
{
|
|
@@ -434,6 +436,10 @@ ClassOptionality ToOperandClassAndOptionality(const std::string& operandKind, co
|
|
type = OperandLoadCacheControl;
|
|
} else if (operandKind == "StoreCacheControl") {
|
|
type = OperandStoreCacheControl;
|
|
+ } else if (operandKind == "NamedMaximumNumberOfRegisters") {
|
|
+ type = OperandNamedMaximumNumberOfRegisters;
|
|
+ } else if (operandKind == "RawAccessChainOperands") {
|
|
+ type = OperandRawAccessChainOperands;
|
|
}
|
|
|
|
if (type == OperandNone) {
|
|
@@ -777,6 +783,10 @@ void jsonToSpirv(const std::string& jsonPath, bool buildingHeaders)
|
|
establishOperandClass(enumName, OperandLoadCacheControl, &LoadCacheControlParams, operandEnum, category);
|
|
} else if (enumName == "StoreCacheControl") {
|
|
establishOperandClass(enumName, OperandStoreCacheControl, &StoreCacheControlParams, operandEnum, category);
|
|
+ } else if (enumName == "NamedMaximumNumberOfRegisters") {
|
|
+ establishOperandClass(enumName, OperandNamedMaximumNumberOfRegisters, &NamedMaximumNumberOfRegistersParams, operandEnum, category);
|
|
+ } else if (enumName == "RawAccessChainOperands") {
|
|
+ establishOperandClass(enumName, OperandRawAccessChainOperands, &RawAccessChainOperandsParams, operandEnum, category);
|
|
}
|
|
}
|
|
|
|
diff --git a/tools/buildHeaders/jsonToSpirv.h b/tools/buildHeaders/jsonToSpirv.h
|
|
index db4855b..c8de68f 100644
|
|
--- a/tools/buildHeaders/jsonToSpirv.h
|
|
+++ b/tools/buildHeaders/jsonToSpirv.h
|
|
@@ -1,4 +1,4 @@
|
|
-// Copyright (c) 2014-2020 The Khronos Group Inc.
|
|
+// Copyright (c) 2014-2024 The Khronos Group Inc.
|
|
//
|
|
// Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
// of this software and/or associated documentation files (the "Materials"),
|
|
@@ -103,6 +103,8 @@ enum OperandClass {
|
|
OperandHostAccessQualifier,
|
|
OperandLoadCacheControl,
|
|
OperandStoreCacheControl,
|
|
+ OperandNamedMaximumNumberOfRegisters,
|
|
+ OperandRawAccessChainOperands,
|
|
|
|
OperandOpcode,
|
|
|
|
diff --git a/tools/buildHeaders/main.cpp b/tools/buildHeaders/main.cpp
|
|
index 9a59714..6e6a03b 100644
|
|
--- a/tools/buildHeaders/main.cpp
|
|
+++ b/tools/buildHeaders/main.cpp
|
|
@@ -1,4 +1,4 @@
|
|
-// Copyright (c) 2014-2019 The Khronos Group Inc.
|
|
+// Copyright (c) 2014-2024 The Khronos Group Inc.
|
|
//
|
|
// Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
// of this software and/or associated documentation files (the "Materials"),
|