2021-02-17 08:37:34 +01:00
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From bc8e6db54d2f5a51b2e74af47a79a0a366f3c611 Mon Sep 17 00:00:00 2001
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2020-12-24 17:44:52 +01:00
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From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
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2021-02-17 08:37:34 +01:00
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Date: Tue, 12 Jan 2021 13:55:28 +0100
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2020-12-24 17:44:52 +01:00
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Subject: [PATCH] xhci: translate virtual addresses into the bus's address
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space
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So far we've been content with passing physical addresses when
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configuring memory addresses into XHCI controllers, but not all
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platforms have buses with transparent mappings. Specifically the
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Raspberry Pi 4 might introduce an offset to memory accesses incoming
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from its PCIe port.
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Introduce xhci_virt_to_bus() and xhci_bus_to_virt() to cater with these
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limitations, and make sure we don't break non DM users.
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Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
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Reviewed-by: Simon Glass <sjg@chromium.org>
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Reviewed-by: Stefan Roese <sr@denx.de>
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2021-02-17 08:37:34 +01:00
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Tested-by: Peter Robinson <pbrobinson@gmail.com>
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2020-12-24 17:44:52 +01:00
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---
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drivers/usb/host/xhci-mem.c | 45 +++++++++++++++++++-----------------
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2021-02-17 08:37:34 +01:00
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drivers/usb/host/xhci-ring.c | 13 +++++++----
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2020-12-24 17:44:52 +01:00
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drivers/usb/host/xhci.c | 4 ++--
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include/usb/xhci.h | 20 +++++++++++++++-
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2021-02-17 08:37:34 +01:00
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4 files changed, 53 insertions(+), 29 deletions(-)
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2020-12-24 17:44:52 +01:00
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diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
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2021-02-17 08:37:34 +01:00
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index b002d6f166..83147d51b5 100644
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2020-12-24 17:44:52 +01:00
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--- a/drivers/usb/host/xhci-mem.c
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+++ b/drivers/usb/host/xhci-mem.c
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@@ -110,7 +110,7 @@ static void xhci_scratchpad_free(struct xhci_ctrl *ctrl)
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ctrl->dcbaa->dev_context_ptrs[0] = 0;
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- free((void *)(uintptr_t)le64_to_cpu(ctrl->scratchpad->sp_array[0]));
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+ free(xhci_bus_to_virt(ctrl, le64_to_cpu(ctrl->scratchpad->sp_array[0])));
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free(ctrl->scratchpad->sp_array);
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free(ctrl->scratchpad);
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ctrl->scratchpad = NULL;
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@@ -216,8 +216,8 @@ static void *xhci_malloc(unsigned int size)
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* @param link_trbs flag to indicate whether to link the trbs or NOT
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* @return none
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*/
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-static void xhci_link_segments(struct xhci_segment *prev,
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- struct xhci_segment *next, bool link_trbs)
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+static void xhci_link_segments(struct xhci_ctrl *ctrl, struct xhci_segment *prev,
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+ struct xhci_segment *next, bool link_trbs)
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{
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u32 val;
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u64 val_64 = 0;
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@@ -226,7 +226,7 @@ static void xhci_link_segments(struct xhci_segment *prev,
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return;
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prev->next = next;
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if (link_trbs) {
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- val_64 = virt_to_phys(next->trbs);
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+ val_64 = xhci_virt_to_bus(ctrl, next->trbs);
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prev->trbs[TRBS_PER_SEGMENT-1].link.segment_ptr =
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cpu_to_le64(val_64);
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2021-02-17 08:37:34 +01:00
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@@ -304,7 +304,8 @@ static struct xhci_segment *xhci_segment_alloc(void)
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2020-12-24 17:44:52 +01:00
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* @param link_trbs flag to indicate whether to link the trbs or NOT
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* @return pointer to the newly created RING
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*/
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-struct xhci_ring *xhci_ring_alloc(unsigned int num_segs, bool link_trbs)
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+struct xhci_ring *xhci_ring_alloc(struct xhci_ctrl *ctrl, unsigned int num_segs,
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+ bool link_trbs)
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{
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struct xhci_ring *ring;
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struct xhci_segment *prev;
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2021-02-17 08:37:34 +01:00
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@@ -327,12 +328,12 @@ struct xhci_ring *xhci_ring_alloc(unsigned int num_segs, bool link_trbs)
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2020-12-24 17:44:52 +01:00
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next = xhci_segment_alloc();
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BUG_ON(!next);
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- xhci_link_segments(prev, next, link_trbs);
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+ xhci_link_segments(ctrl, prev, next, link_trbs);
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prev = next;
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num_segs--;
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}
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- xhci_link_segments(prev, ring->first_seg, link_trbs);
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+ xhci_link_segments(ctrl, prev, ring->first_seg, link_trbs);
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if (link_trbs) {
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/* See section 4.9.2.1 and 6.4.4.1 */
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prev->trbs[TRBS_PER_SEGMENT-1].link.control |=
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2021-02-17 08:37:34 +01:00
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@@ -354,6 +355,7 @@ static int xhci_scratchpad_alloc(struct xhci_ctrl *ctrl)
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2020-12-24 17:44:52 +01:00
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struct xhci_hccr *hccr = ctrl->hccr;
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struct xhci_hcor *hcor = ctrl->hcor;
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struct xhci_scratchpad *scratchpad;
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+ uint64_t val_64;
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int num_sp;
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uint32_t page_size;
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void *buf;
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2021-02-17 08:37:34 +01:00
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@@ -371,8 +373,9 @@ static int xhci_scratchpad_alloc(struct xhci_ctrl *ctrl)
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2020-12-24 17:44:52 +01:00
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scratchpad->sp_array = xhci_malloc(num_sp * sizeof(u64));
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if (!scratchpad->sp_array)
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goto fail_sp2;
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- ctrl->dcbaa->dev_context_ptrs[0] =
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- cpu_to_le64((uintptr_t)scratchpad->sp_array);
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+
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+ val_64 = xhci_virt_to_bus(ctrl, scratchpad->sp_array);
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+ ctrl->dcbaa->dev_context_ptrs[0] = cpu_to_le64(val_64);
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xhci_flush_cache((uintptr_t)&ctrl->dcbaa->dev_context_ptrs[0],
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sizeof(ctrl->dcbaa->dev_context_ptrs[0]));
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2021-02-17 08:37:34 +01:00
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@@ -393,8 +396,8 @@ static int xhci_scratchpad_alloc(struct xhci_ctrl *ctrl)
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2020-12-24 17:44:52 +01:00
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xhci_flush_cache((uintptr_t)buf, num_sp * page_size);
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for (i = 0; i < num_sp; i++) {
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- uintptr_t ptr = (uintptr_t)buf + i * page_size;
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- scratchpad->sp_array[i] = cpu_to_le64(ptr);
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+ val_64 = xhci_virt_to_bus(ctrl, buf + i * page_size);
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+ scratchpad->sp_array[i] = cpu_to_le64(val_64);
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}
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xhci_flush_cache((uintptr_t)scratchpad->sp_array,
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2021-02-17 08:37:34 +01:00
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@@ -484,9 +487,9 @@ int xhci_alloc_virt_device(struct xhci_ctrl *ctrl, unsigned int slot_id)
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2020-12-24 17:44:52 +01:00
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}
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/* Allocate endpoint 0 ring */
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- virt_dev->eps[0].ring = xhci_ring_alloc(1, true);
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+ virt_dev->eps[0].ring = xhci_ring_alloc(ctrl, 1, true);
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- byte_64 = virt_to_phys(virt_dev->out_ctx->bytes);
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+ byte_64 = xhci_virt_to_bus(ctrl, virt_dev->out_ctx->bytes);
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/* Point to output device context in dcbaa. */
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ctrl->dcbaa->dev_context_ptrs[slot_id] = cpu_to_le64(byte_64);
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2021-02-17 08:37:34 +01:00
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@@ -522,15 +525,15 @@ int xhci_mem_init(struct xhci_ctrl *ctrl, struct xhci_hccr *hccr,
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2020-12-24 17:44:52 +01:00
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return -ENOMEM;
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}
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- val_64 = virt_to_phys(ctrl->dcbaa);
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+ val_64 = xhci_virt_to_bus(ctrl, ctrl->dcbaa);
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/* Set the pointer in DCBAA register */
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xhci_writeq(&hcor->or_dcbaap, val_64);
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/* Command ring control pointer register initialization */
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- ctrl->cmd_ring = xhci_ring_alloc(1, true);
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+ ctrl->cmd_ring = xhci_ring_alloc(ctrl, 1, true);
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/* Set the address in the Command Ring Control register */
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- trb_64 = virt_to_phys(ctrl->cmd_ring->first_seg->trbs);
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+ trb_64 = xhci_virt_to_bus(ctrl, ctrl->cmd_ring->first_seg->trbs);
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val_64 = xhci_readq(&hcor->or_crcr);
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val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
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(trb_64 & (u64) ~CMD_RING_RSVD_BITS) |
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2021-02-17 08:37:34 +01:00
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@@ -551,7 +554,7 @@ int xhci_mem_init(struct xhci_ctrl *ctrl, struct xhci_hccr *hccr,
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2020-12-24 17:44:52 +01:00
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ctrl->ir_set = &ctrl->run_regs->ir_set[0];
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/* Event ring does not maintain link TRB */
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- ctrl->event_ring = xhci_ring_alloc(ERST_NUM_SEGS, false);
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+ ctrl->event_ring = xhci_ring_alloc(ctrl, ERST_NUM_SEGS, false);
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2021-02-17 08:37:34 +01:00
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ctrl->erst.entries = xhci_malloc(sizeof(struct xhci_erst_entry) *
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ERST_NUM_SEGS);
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2020-12-24 17:44:52 +01:00
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2021-02-17 08:37:34 +01:00
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@@ -560,8 +563,8 @@ int xhci_mem_init(struct xhci_ctrl *ctrl, struct xhci_hccr *hccr,
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2020-12-24 17:44:52 +01:00
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for (val = 0, seg = ctrl->event_ring->first_seg;
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val < ERST_NUM_SEGS;
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val++) {
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- trb_64 = virt_to_phys(seg->trbs);
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struct xhci_erst_entry *entry = &ctrl->erst.entries[val];
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+ trb_64 = xhci_virt_to_bus(ctrl, seg->trbs);
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entry->seg_addr = cpu_to_le64(trb_64);
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entry->seg_size = cpu_to_le32(TRBS_PER_SEGMENT);
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entry->rsvd = 0;
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2021-02-17 08:37:34 +01:00
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@@ -570,7 +573,7 @@ int xhci_mem_init(struct xhci_ctrl *ctrl, struct xhci_hccr *hccr,
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2020-12-24 17:44:52 +01:00
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xhci_flush_cache((uintptr_t)ctrl->erst.entries,
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ERST_NUM_SEGS * sizeof(struct xhci_erst_entry));
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- deq = virt_to_phys(ctrl->event_ring->dequeue);
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+ deq = xhci_virt_to_bus(ctrl, ctrl->event_ring->dequeue);
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/* Update HC event ring dequeue pointer */
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xhci_writeq(&ctrl->ir_set->erst_dequeue,
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2021-02-17 08:37:34 +01:00
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@@ -585,7 +588,7 @@ int xhci_mem_init(struct xhci_ctrl *ctrl, struct xhci_hccr *hccr,
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2020-12-24 17:44:52 +01:00
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/* this is the event ring segment table pointer */
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val_64 = xhci_readq(&ctrl->ir_set->erst_base);
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val_64 &= ERST_PTR_MASK;
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- val_64 |= virt_to_phys(ctrl->erst.entries) & ~ERST_PTR_MASK;
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+ val_64 |= xhci_virt_to_bus(ctrl, ctrl->erst.entries) & ~ERST_PTR_MASK;
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xhci_writeq(&ctrl->ir_set->erst_base, val_64);
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2021-02-17 08:37:34 +01:00
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@@ -848,7 +851,7 @@ void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl,
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/* EP 0 can handle "burst" sizes of 1, so Max Burst Size field is 0 */
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ep0_ctx->ep_info2 |= cpu_to_le32(MAX_BURST(0) | ERROR_COUNT(3));
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2020-12-24 17:44:52 +01:00
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- trb_64 = virt_to_phys(virt_dev->eps[0].ring->first_seg->trbs);
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+ trb_64 = xhci_virt_to_bus(ctrl, virt_dev->eps[0].ring->first_seg->trbs);
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ep0_ctx->deq = cpu_to_le64(trb_64 | virt_dev->eps[0].ring->cycle_state);
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/*
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diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
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2021-02-17 08:37:34 +01:00
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index d708fc928b..6b31ad4398 100644
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2020-12-24 17:44:52 +01:00
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--- a/drivers/usb/host/xhci-ring.c
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+++ b/drivers/usb/host/xhci-ring.c
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@@ -275,10 +275,13 @@ void xhci_queue_command(struct xhci_ctrl *ctrl, u8 *ptr, u32 slot_id,
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u32 ep_index, trb_type cmd)
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{
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u32 fields[4];
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- u64 val_64 = virt_to_phys(ptr);
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+ u64 val_64 = 0;
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BUG_ON(prepare_ring(ctrl, ctrl->cmd_ring, EP_STATE_RUNNING));
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+ if (ptr)
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+ val_64 = xhci_virt_to_bus(ctrl, ptr);
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+
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fields[0] = lower_32_bits(val_64);
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fields[1] = upper_32_bits(val_64);
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fields[2] = 0;
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2021-02-17 08:37:34 +01:00
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@@ -401,7 +404,7 @@ void xhci_acknowledge_event(struct xhci_ctrl *ctrl)
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2020-12-24 17:44:52 +01:00
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/* Inform the hardware */
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xhci_writeq(&ctrl->ir_set->erst_dequeue,
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- virt_to_phys(ctrl->event_ring->dequeue) | ERST_EHB);
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+ xhci_virt_to_bus(ctrl, ctrl->event_ring->dequeue) | ERST_EHB);
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}
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/**
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2021-02-17 08:37:34 +01:00
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@@ -579,7 +582,7 @@ int xhci_bulk_tx(struct usb_device *udev, unsigned long pipe,
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2020-12-24 17:44:52 +01:00
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u64 addr;
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int ret;
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u32 trb_fields[4];
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- u64 val_64 = virt_to_phys(buffer);
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+ u64 val_64 = xhci_virt_to_bus(ctrl, buffer);
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2021-02-17 08:37:34 +01:00
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void *last_transfer_trb_addr;
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int available_length;
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@@ -723,7 +726,7 @@ again:
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return -ETIMEDOUT;
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}
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2020-12-24 17:44:52 +01:00
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2021-02-17 08:37:34 +01:00
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- if ((uintptr_t)(le64_to_cpu(event->trans_event.buffer))
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+ if ((uintptr_t)(le64_to_cpu(xhci_bus_to_virt(ctrl, event->trans_event.buffer)))
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!= (uintptr_t)last_transfer_trb_addr) {
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available_length -=
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(int)EVENT_TRB_LEN(le32_to_cpu(event->trans_event.transfer_len));
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@@ -884,7 +887,7 @@ int xhci_ctrl_tx(struct usb_device *udev, unsigned long pipe,
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2020-12-24 17:44:52 +01:00
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if (length > 0) {
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if (req->requesttype & USB_DIR_IN)
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field |= TRB_DIR_IN;
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- buf_64 = virt_to_phys(buffer);
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+ buf_64 = xhci_virt_to_bus(ctrl, buffer);
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trb_fields[0] = lower_32_bits(buf_64);
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trb_fields[1] = upper_32_bits(buf_64);
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diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
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2021-02-17 08:37:34 +01:00
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index 7080f8fabe..d27ac01c83 100644
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2020-12-24 17:44:52 +01:00
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--- a/drivers/usb/host/xhci.c
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+++ b/drivers/usb/host/xhci.c
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2021-02-17 08:37:34 +01:00
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@@ -604,7 +604,7 @@ static int xhci_set_configuration(struct usb_device *udev)
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2020-12-24 17:44:52 +01:00
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ep_ctx[ep_index] = xhci_get_ep_ctx(ctrl, in_ctx, ep_index);
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/* Allocate the ep rings */
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- virt_dev->eps[ep_index].ring = xhci_ring_alloc(1, true);
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+ virt_dev->eps[ep_index].ring = xhci_ring_alloc(ctrl, 1, true);
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if (!virt_dev->eps[ep_index].ring)
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return -ENOMEM;
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2021-02-17 08:37:34 +01:00
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@@ -628,7 +628,7 @@ static int xhci_set_configuration(struct usb_device *udev)
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2020-12-24 17:44:52 +01:00
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cpu_to_le32(MAX_BURST(max_burst) |
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ERROR_COUNT(err_count));
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- trb_64 = virt_to_phys(virt_dev->eps[ep_index].ring->enqueue);
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+ trb_64 = xhci_virt_to_bus(ctrl, virt_dev->eps[ep_index].ring->enqueue);
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ep_ctx[ep_index]->deq = cpu_to_le64(trb_64 |
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virt_dev->eps[ep_index].ring->cycle_state);
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diff --git a/include/usb/xhci.h b/include/usb/xhci.h
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2021-02-17 08:37:34 +01:00
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index e1d382369a..8d95e213b0 100644
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2020-12-24 17:44:52 +01:00
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--- a/include/usb/xhci.h
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+++ b/include/usb/xhci.h
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@@ -16,6 +16,7 @@
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#ifndef HOST_XHCI_H_
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#define HOST_XHCI_H_
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+#include <phys2bus.h>
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#include <reset.h>
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#include <asm/types.h>
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#include <asm/cache.h>
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2021-02-17 08:37:34 +01:00
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|
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@@ -1221,6 +1222,12 @@ struct xhci_ctrl {
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#define XHCI_MTK_HOST BIT(0)
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2020-12-24 17:44:52 +01:00
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};
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+#if CONFIG_IS_ENABLED(DM_USB)
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+#define xhci_to_dev(_ctrl) _ctrl->dev
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+#else
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+#define xhci_to_dev(_ctrl) NULL
|
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+#endif
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+
|
|
|
|
unsigned long trb_addr(struct xhci_segment *seg, union xhci_trb *trb);
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|
|
|
struct xhci_input_control_ctx
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|
|
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*xhci_get_input_control_ctx(struct xhci_container_ctx *ctx);
|
2021-02-17 08:37:34 +01:00
|
|
|
@@ -1250,7 +1257,8 @@ int xhci_check_maxpacket(struct usb_device *udev);
|
2020-12-24 17:44:52 +01:00
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|
|
void xhci_flush_cache(uintptr_t addr, u32 type_len);
|
|
|
|
void xhci_inval_cache(uintptr_t addr, u32 type_len);
|
|
|
|
void xhci_cleanup(struct xhci_ctrl *ctrl);
|
|
|
|
-struct xhci_ring *xhci_ring_alloc(unsigned int num_segs, bool link_trbs);
|
|
|
|
+struct xhci_ring *xhci_ring_alloc(struct xhci_ctrl *ctrl, unsigned int num_segs,
|
|
|
|
+ bool link_trbs);
|
|
|
|
int xhci_alloc_virt_device(struct xhci_ctrl *ctrl, unsigned int slot_id);
|
|
|
|
int xhci_mem_init(struct xhci_ctrl *ctrl, struct xhci_hccr *hccr,
|
|
|
|
struct xhci_hcor *hcor);
|
2021-02-17 08:37:34 +01:00
|
|
|
@@ -1278,4 +1286,14 @@ extern struct dm_usb_ops xhci_usb_ops;
|
2020-12-24 17:44:52 +01:00
|
|
|
|
|
|
|
struct xhci_ctrl *xhci_get_ctrl(struct usb_device *udev);
|
|
|
|
|
|
|
|
+static inline dma_addr_t xhci_virt_to_bus(struct xhci_ctrl *ctrl, void *addr)
|
|
|
|
+{
|
|
|
|
+ return dev_phys_to_bus(xhci_to_dev(ctrl), virt_to_phys(addr));
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static inline void *xhci_bus_to_virt(struct xhci_ctrl *ctrl, dma_addr_t addr)
|
|
|
|
+{
|
|
|
|
+ return phys_to_virt(dev_bus_to_phys(xhci_to_dev(ctrl), addr));
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
#endif /* HOST_XHCI_H_ */
|