65 lines
2.2 KiB
Diff
65 lines
2.2 KiB
Diff
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From 50ae76602cfb1079a3062a18c1767dce525985f0 Mon Sep 17 00:00:00 2001
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From: Heinrich Schuchardt <xypron.glpk@gmx.de>
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Date: Tue, 19 Nov 2019 04:02:10 +0100
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Subject: [PATCH] arm: arm11: allow unaligned memory access
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The UEFI spec mandates that unaligned memory access should be enabled if
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supported by the CPU architecture.
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This patch implements the function unaligned_access() to set the enable
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unaligned data support flag and to clear the aligned flag in the system
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control register (SCTLR). It is called when UEFI related commands like
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bootefi are invoked.
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Reported-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
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Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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---
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arch/arm/cpu/arm11/Makefile | 4 ++++
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arch/arm/cpu/arm11/sctlr.S | 25 +++++++++++++++++++++++++
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2 files changed, 29 insertions(+)
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create mode 100644 arch/arm/cpu/arm11/sctlr.S
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diff --git a/arch/arm/cpu/arm11/Makefile b/arch/arm/cpu/arm11/Makefile
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index 5d721fce12..5dfa01ae8d 100644
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--- a/arch/arm/cpu/arm11/Makefile
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+++ b/arch/arm/cpu/arm11/Makefile
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@@ -4,3 +4,7 @@
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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obj-y = cpu.o
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+
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+ifneq ($(CONFIG_SPL_BUILD),y)
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+obj-$(CONFIG_EFI_LOADER) += sctlr.o
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+endif
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diff --git a/arch/arm/cpu/arm11/sctlr.S b/arch/arm/cpu/arm11/sctlr.S
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new file mode 100644
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index 0000000000..74a7fc4a25
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--- /dev/null
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+++ b/arch/arm/cpu/arm11/sctlr.S
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@@ -0,0 +1,25 @@
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+/* SPDX-License-Identifier: GPL-2.0+ */
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+/*
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+ * Routines to access the system control register
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+ *
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+ * Copyright (c) 2019 Heinrich Schuchardt
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+ */
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+
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+#include <linux/linkage.h>
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+
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+/*
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+ * void allow_unaligned(void) - allow unaligned access
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+ *
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+ * This routine sets the enable unaligned data support flag and clears the
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+ * aligned flag in the system control register.
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+ * After calling this routine unaligned access does no longer leads to a
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+ * data abort or undefined behavior but is handled by the CPU.
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+ * For details see the "ARM Architecture Reference Manual" for ARMv6.
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+ */
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+ENTRY(allow_unaligned)
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+ mrc p15, 0, r0, c1, c0, 0 @ load system control register
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+ orr r0, r0, #1 << 22 @ set unaligned data support flag
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+ bic r0, r0, #2 @ clear aligned flag
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+ mcr p15, 0, r0, c1, c0, 0 @ write system control register
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+ bx lr @ return
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+ENDPROC(allow_unaligned)
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