Accepting request 1138155 from hardware👢staging

- Remove ls1012afrdmqspi flavor since it has been removed upstream
  with commit b60274e6900ed1b08ad41f6d7fdebb2726ded108
- Update to 2024.01

OBS-URL: https://build.opensuse.org/request/show/1138155
OBS-URL: https://build.opensuse.org/package/show/hardware:boot/u-boot?expand=0&rev=203

.gitattributes

@@ -23,3 +23,5 @@
 *.zst filter=lfs diff=lfs merge=lfs -text
 ## Specific LFS patterns
 arndale-bl1.img filter=lfs diff=lfs merge=lfs -text
+rk3568_bl31_v1.28.elf filter=lfs diff=lfs merge=lfs -text
+rk3568_ddr_1056MHz_v1.13.bin filter=lfs diff=lfs merge=lfs -text

0001-XXX-openSUSE-XXX-Prepend-partition-.patch

@@ -1,4 +1,4 @@
-From defcec8a26ffc9fe6f03bec58af89e0ad9219062 Mon Sep 17 00:00:00 2001
+From c7e79b8548265875ffea4f1192fbf563ffb675e3 Mon Sep 17 00:00:00 2001
 From: Guillaume GARDET <guillaume.gardet@free.fr>
 Date: Wed, 13 Apr 2016 13:44:29 +0200
 Subject: [PATCH] XXX openSUSE XXX: Prepend partition 3 (and 4 for chromebook
@@ -12,7 +12,7 @@ Subject: [PATCH] XXX openSUSE XXX: Prepend partition 3 (and 4 for chromebook
  1 file changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
-index 2a136b96a6d..f2d2c761616 100644
+index 2a136b96a6..f2d2c76161 100644
 --- a/include/config_distro_bootcmd.h
 +++ b/include/config_distro_bootcmd.h
 @@ -166,7 +166,7 @@

0002-Revert-Revert-omap3-Use-raw-SPL-by-.patch

@@ -1,4 +1,4 @@
-From 231d5ffc43bcfcf08b4747416f70a19a2889dd37 Mon Sep 17 00:00:00 2001
+From 8c427a512455c310e06b53a0e08b71517f40b62c Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@suse.de>
 Date: Mon, 2 May 2016 23:25:07 +0200
 Subject: [PATCH] Revert "Revert "omap3: Use raw SPL by default for mmc1""
@@ -9,7 +9,7 @@ This reverts commit 7fa75d0ac5502db813d109c1df7bd0da34688685.
  1 file changed, 2 deletions(-)
 
 diff --git a/arch/arm/mach-omap2/boot-common.c b/arch/arm/mach-omap2/boot-common.c
-index a2dd5f6df01..d2c8e7f5ef3 100644
+index a68b21aeac..c0938810cb 100644
 --- a/arch/arm/mach-omap2/boot-common.c
 +++ b/arch/arm/mach-omap2/boot-common.c
 @@ -126,8 +126,6 @@ void save_omap_boot_params(void)

0003-rpi-Use-firmware-provided-device-tr.patch

@@ -1,4 +1,4 @@
-From 4559c9605a9bdf4988d90f4f948fad70b93f5244 Mon Sep 17 00:00:00 2001
+From d9a7053db3ab0b4dfe26f9a4ea73d0f5ad0c7301 Mon Sep 17 00:00:00 2001
 From: Guillaume Gardet <guillaume.gardet@arm.com>
 Date: Fri, 18 Sep 2020 15:27:37 +0200
 Subject: [PATCH] rpi: Use firmware provided device tree
@@ -28,7 +28,7 @@ Signed-off-by: Guillaume Gardet <guillaume.gardet@free.fr>
  5 files changed, 5 insertions(+), 5 deletions(-)
 
 diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig
-index ab6e6bcf29e..a141bc44380 100644
+index ac3b40c1c1..e6765878d1 100644
 --- a/configs/rpi_0_w_defconfig
 +++ b/configs/rpi_0_w_defconfig
 @@ -24,7 +24,7 @@ CONFIG_CMD_GPIO=y
@@ -41,7 +41,7 @@ index ab6e6bcf29e..a141bc44380 100644
  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
  CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig
-index 0dea092f240..46bdbfb5328 100644
+index b6e06cfe20..0650344526 100644
 --- a/configs/rpi_2_defconfig
 +++ b/configs/rpi_2_defconfig
 @@ -25,7 +25,7 @@ CONFIG_CMD_GPIO=y
@@ -54,7 +54,7 @@ index 0dea092f240..46bdbfb5328 100644
  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
  CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig
-index 0ccc93d572b..4c912b28f64 100644
+index eadc418927..7f52b508c4 100644
 --- a/configs/rpi_3_32b_defconfig
 +++ b/configs/rpi_3_32b_defconfig
 @@ -24,7 +24,7 @@ CONFIG_CMD_GPIO=y
@@ -67,7 +67,7 @@ index 0ccc93d572b..4c912b28f64 100644
  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
  CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig
-index 84b61f862a5..210ec949748 100644
+index 6890af4d1d..0767518279 100644
 --- a/configs/rpi_3_defconfig
 +++ b/configs/rpi_3_defconfig
 @@ -23,7 +23,7 @@ CONFIG_CMD_GPIO=y
@@ -80,7 +80,7 @@ index 84b61f862a5..210ec949748 100644
  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
  CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig
-index d049d0fb5c6..adf46bec3d0 100644
+index 29c10060cf..79b507405d 100644
 --- a/configs/rpi_defconfig
 +++ b/configs/rpi_defconfig
 @@ -24,7 +24,7 @@ CONFIG_CMD_GPIO=y

0004-Temp-workaround-for-Chromebook-snow.patch

@@ -1,4 +1,4 @@
-From 4dfea5f29e331a721d44f138225aad377ecb86bf Mon Sep 17 00:00:00 2001
+From 9e1ca3171e9a1dd0ef40154799226bfc2a2c8013 Mon Sep 17 00:00:00 2001
 From: Guillaume GARDET <guillaume.gardet@free.fr>
 Date: Mon, 9 Apr 2018 10:28:26 +0200
 Subject: [PATCH] Temp workaround for Chromebook snow to avoid the 'unable to
@@ -9,10 +9,10 @@ Subject: [PATCH] Temp workaround for Chromebook snow to avoid the 'unable to
  1 file changed, 2 insertions(+), 1 deletion(-)
 
 diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
-index 5085a3b491d..6c098475bea 100644
+index 400066fa99..0cfbd83462 100644
 --- a/drivers/mmc/dw_mmc.c
 +++ b/drivers/mmc/dw_mmc.c
-@@ -609,7 +609,8 @@ void dwmci_setup_cfg(struct mmc_config *cfg, struct dwmci_host *host,
+@@ -613,7 +613,8 @@ void dwmci_setup_cfg(struct mmc_config *cfg, struct dwmci_host *host,
  		cfg->host_caps |= MMC_MODE_4BIT;
  		cfg->host_caps &= ~MMC_MODE_8BIT;
  	}

0005-tools-zynqmpbif-Add-support-for-loa.patch

@@ -1,4 +1,4 @@
-From 4acde1714c68f941d76f86d2489157cf2d7f64a6 Mon Sep 17 00:00:00 2001
+From 3815479aa92e745bb2cab03c86361442ddd68555 Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@suse.de>
 Date: Thu, 26 Apr 2018 13:30:32 +0200
 Subject: [PATCH] tools: zynqmpbif: Add support for load=after
@@ -34,7 +34,7 @@ Signed-off-by: Alexander Graf <agraf@suse.de>
  1 file changed, 15 insertions(+)
 
 diff --git a/tools/zynqmpbif.c b/tools/zynqmpbif.c
-index 82ce0ac1a52..b4302fa67ee 100644
+index 82ce0ac1a5..b4302fa67e 100644
 --- a/tools/zynqmpbif.c
 +++ b/tools/zynqmpbif.c
 @@ -42,6 +42,7 @@ enum bif_flag {

0006-Kconfig-add-btrfs-to-distro-boot.patch

@@ -1,4 +1,4 @@
-From e854dbdbb82d0a422440ecb94ab0a545a7bc7a0b Mon Sep 17 00:00:00 2001
+From 8161f9d335e3de50c32d572467734a7869a01c34 Mon Sep 17 00:00:00 2001
 From: Guillaume Gardet <guillaume.gardet@arm.com>
 Date: Wed, 5 Apr 2023 14:25:29 +0200
 Subject: [PATCH] Kconfig: add btrfs to distro boot
@@ -13,14 +13,14 @@ Signed-off-by: Matthias Brugger <mbrugger@suse.com>
  1 file changed, 1 insertion(+)
 
 diff --git a/boot/Kconfig b/boot/Kconfig
-index 86c2787dc53..fc01c8932f1 100644
+index fbc49c5bca..be576696c4 100644
 --- a/boot/Kconfig
 +++ b/boot/Kconfig
-@@ -885,6 +885,7 @@ config DISTRO_DEFAULTS
+@@ -815,6 +815,7 @@ config DISTRO_DEFAULTS
  	select CMD_SYSBOOT
  	select HUSH_PARSER
  	select SYS_LONGHELP
 +	imply CMD_BTRFS if !RISCV && !MIPS
  	help
- 	  Select this to enable various options and commands which are suitable
- 	  for building u-boot for booting general purpose Linux distributions.
+ 	  Note: These scripts have been replaced by Standard Boot. Do not use
+ 	  them on new boards. See 'Migrating from distro_boot' at

0007-configs-Re-sync-with-CONFIG_DISTRO_.patch

@@ -1,4 +1,4 @@
-From bfeb7f5da76408d16d8b8c10d033044181c0b0f5 Mon Sep 17 00:00:00 2001
+From fadb3a2b4644e55e9707defc4cc34e5dac9c8952 Mon Sep 17 00:00:00 2001
 From: Matthias Brugger <mbrugger@suse.com>
 Date: Wed, 29 Jan 2020 09:56:06 +0100
 Subject: [PATCH] configs: Re-sync with CONFIG_DISTRO_DEFAULTS
@@ -18,7 +18,7 @@ Signed-off-by: Matthias Brugger <mbrugger@suse.com>
  5 files changed, 2 insertions(+), 4 deletions(-)
 
 diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
-index 138a99b37fe..82c85f4e77c 100644
+index 6c488bac2b..de19fcb0e3 100644
 --- a/configs/sandbox64_defconfig
 +++ b/configs/sandbox64_defconfig
 @@ -88,7 +88,6 @@ CONFIG_CMD_REGULATOR=y
@@ -30,10 +30,10 @@ index 138a99b37fe..82c85f4e77c 100644
  CONFIG_CMD_CRAMFS=y
  CONFIG_CMD_EXT4_WRITE=y
 diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
-index 62bc182ca16..841e0c07ff0 100644
+index bc5bcb2a62..e0bab6fb6d 100644
 --- a/configs/sandbox_defconfig
 +++ b/configs/sandbox_defconfig
-@@ -122,7 +122,6 @@ CONFIG_CMD_REGULATOR=y
+@@ -121,7 +121,6 @@ CONFIG_CMD_REGULATOR=y
  CONFIG_CMD_AES=y
  CONFIG_CMD_TPM=y
  CONFIG_CMD_TPM_TEST=y
@@ -42,7 +42,7 @@ index 62bc182ca16..841e0c07ff0 100644
  CONFIG_CMD_CRAMFS=y
  CONFIG_CMD_EROFS=y
 diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig
-index 82b16418a6f..73e89da98ef 100644
+index c35a360a55..4695e23fd0 100644
 --- a/configs/socfpga_arria10_defconfig
 +++ b/configs/socfpga_arria10_defconfig
 @@ -69,3 +69,5 @@ CONFIG_DESIGNWARE_APB_TIMER=y
@@ -52,19 +52,19 @@ index 82b16418a6f..73e89da98ef 100644
 +# CONFIG_CMD_BTRFS is not set
 +# CONFIG_FS_BTRFS is not set
 diff --git a/configs/turris_mox_defconfig b/configs/turris_mox_defconfig
-index 234f1e721aa..e5197a8fb5f 100644
+index c9815b612f..dfc22ee0d2 100644
 --- a/configs/turris_mox_defconfig
 +++ b/configs/turris_mox_defconfig
-@@ -50,7 +50,6 @@ CONFIG_CMD_CACHE=y
+@@ -49,7 +49,6 @@ CONFIG_CMD_CACHE=y
  CONFIG_CMD_TIME=y
  CONFIG_CMD_AES=y
  CONFIG_CMD_HASH=y
 -CONFIG_CMD_BTRFS=y
  CONFIG_CMD_EXT4_WRITE=y
  CONFIG_MAC_PARTITION=y
- CONFIG_ENV_OVERWRITE=y
+ CONFIG_OF_LIST="armada-3720-turris-mox armada-3720-ripe-atlas"
 diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig
-index 22aaee26384..6ca655f49ce 100644
+index 65d4a296e7..9398d022f8 100644
 --- a/configs/turris_omnia_defconfig
 +++ b/configs/turris_omnia_defconfig
 @@ -73,7 +73,6 @@ CONFIG_CMD_CACHE=y

0008-sunxi-dts-OrangePi-Zero-Add-SPI-ali.patch

@@ -1,4 +1,4 @@
-From 7ac43cc15919c55b501d33922fdd4530177c252e Mon Sep 17 00:00:00 2001
+From 0e0f8aadc53d802deeb18040a957f4a8aeed00c7 Mon Sep 17 00:00:00 2001
 From: Michal Suchanek <msuchanek@suse.de>
 Date: Tue, 29 Sep 2020 10:13:33 +0200
 Subject: [PATCH] sunxi: dts: OrangePi Zero: Add SPI aliases to make bus usable
@@ -15,7 +15,7 @@ Signed-off-by: Matthias Brugger <mbrugger@suse.com>
  create mode 100644 arch/arm/dts/sunxi-spi-u-boot.dtsi
 
 diff --git a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
-index 3706216ffb4..c3660f72d9e 100644
+index 3706216ffb..c3660f72d9 100644
 --- a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
 +++ b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
 @@ -46,6 +46,7 @@
@@ -28,7 +28,7 @@ index 3706216ffb4..c3660f72d9e 100644
  #include <dt-bindings/input/input.h>
 diff --git a/arch/arm/dts/sunxi-spi-u-boot.dtsi b/arch/arm/dts/sunxi-spi-u-boot.dtsi
 new file mode 100644
-index 00000000000..df89d02ff2f
+index 0000000000..df89d02ff2
 --- /dev/null
 +++ b/arch/arm/dts/sunxi-spi-u-boot.dtsi
 @@ -0,0 +1,8 @@

0009-sunxi-dts-OrangePi-Zero-Enable-SPI-.patch

@@ -1,4 +1,4 @@
-From 37c10688ad651b4c732f7a63c196256380e146a5 Mon Sep 17 00:00:00 2001
+From 9ff7a738c7421f4b4957e9823405ae718583aac4 Mon Sep 17 00:00:00 2001
 From: Michal Suchanek <msuchanek@suse.de>
 Date: Mon, 28 Sep 2020 23:02:01 +0200
 Subject: [PATCH] sunxi: dts: OrangePi Zero: Enable SPI flash.
@@ -13,7 +13,7 @@ Signed-off-by: Matthias Brugger <mbrugger@suse.com>
  1 file changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
-index c3660f72d9e..80c1e66b38c 100644
+index c3660f72d9..80c1e66b38 100644
 --- a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
 +++ b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
 @@ -164,8 +164,8 @@

0010-Disable-CONFIG_CMD_BTRFS-in-xilinx_.patch

@@ -1,4 +1,4 @@
-From a85b553e66f31c191bbfa9d9667ead5c7e8970f8 Mon Sep 17 00:00:00 2001
+From ad9eb38e9e4f01cf328df9255e5ad2dee9513753 Mon Sep 17 00:00:00 2001
 From: Guillaume Gardet <guillaume.gardet@arm.com>
 Date: Wed, 18 Nov 2020 13:42:04 +0000
 Subject: [PATCH] Disable CONFIG_CMD_BTRFS in xilinx_zynqmp_virt_defconfig to
@@ -9,10 +9,10 @@ Subject: [PATCH] Disable CONFIG_CMD_BTRFS in xilinx_zynqmp_virt_defconfig to
  1 file changed, 1 insertion(+)
 
 diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig
-index acab38fefee..59889a1c0b7 100644
+index 239bb1f5cc..61ebb7f5be 100644
 --- a/configs/xilinx_zynqmp_virt_defconfig
 +++ b/configs/xilinx_zynqmp_virt_defconfig
-@@ -96,6 +96,7 @@ CONFIG_CMD_REGULATOR=y
+@@ -95,6 +95,7 @@ CONFIG_CMD_REGULATOR=y
  CONFIG_CMD_SMC=y
  CONFIG_CMD_TPM=y
  CONFIG_CMD_EXT4_WRITE=y

0011-smbios-Fix-table-when-no-string-is-.patch

@@ -1,4 +1,4 @@
-From 26f8b6445177efe725b16a14b82a016f2379c341 Mon Sep 17 00:00:00 2001
+From 78b4e69e9360e2548870b0b5cd706ea63995a26b Mon Sep 17 00:00:00 2001
 From: Matthias Brugger <mbrugger@suse.com>
 Date: Wed, 17 Mar 2021 12:20:32 +0100
 Subject: [PATCH] smbios: Fix table when no string is present
@@ -19,7 +19,7 @@ Series-cc: u-boot@lists.denx.de
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/lib/smbios.c b/lib/smbios.c
-index d7f4999e8b2..2cdfef7a2c9 100644
+index d7f4999e8b..2cdfef7a2c 100644
 --- a/lib/smbios.c
 +++ b/lib/smbios.c
 @@ -172,7 +172,7 @@ static int smbios_add_prop(struct smbios_ctx *ctx, const char *prop)

0012-riscv-enable-CMD_BTRFS.patch

@@ -1,4 +1,4 @@
-From c61fcd21f50d440b7cc202d846217d61f1033a83 Mon Sep 17 00:00:00 2001
+From 3c34df27f60b3e933cce6c953e568690e9d50632 Mon Sep 17 00:00:00 2001
 From: Guillaume Gardet <guillaume.gardet@arm.com>
 Date: Wed, 5 Apr 2023 14:27:09 +0200
 Subject: [PATCH] riscv: enable CMD_BTRFS
@@ -9,15 +9,15 @@ Signed-off-by: Matthias Brugger <mbrugger@suse.com>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/boot/Kconfig b/boot/Kconfig
-index fc01c8932f1..f8c1e170e9a 100644
+index be576696c4..a71a6a7dfc 100644
 --- a/boot/Kconfig
 +++ b/boot/Kconfig
-@@ -885,7 +885,7 @@ config DISTRO_DEFAULTS
+@@ -815,7 +815,7 @@ config DISTRO_DEFAULTS
  	select CMD_SYSBOOT
  	select HUSH_PARSER
  	select SYS_LONGHELP
 -	imply CMD_BTRFS if !RISCV && !MIPS
 +	imply CMD_BTRFS if !MIPS
  	help
- 	  Select this to enable various options and commands which are suitable
- 	  for building u-boot for booting general purpose Linux distributions.
+ 	  Note: These scripts have been replaced by Standard Boot. Do not use
+ 	  them on new boards. See 'Migrating from distro_boot' at

0013-Disable-timer-check-in-file-loading.patch

@@ -1,4 +1,4 @@
-From eb920203b4f5c1712524bf362991587ff24512d2 Mon Sep 17 00:00:00 2001
+From 624bc8f312d39604f04d07898dba58b9c28b6f33 Mon Sep 17 00:00:00 2001
 From: Michael Chang <mchang@suse.com>
 Date: Tue, 25 May 2021 06:45:01 +0000
 Subject: [PATCH] Disable timer check in file loading
@@ -25,7 +25,7 @@ Signed-off-by: Matthias Brugger <mbrugger@suse.com>
  1 file changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
-index f0d76113b00..314af7e2022 100644
+index f0d76113b0..314af7e202 100644
 --- a/lib/efi_loader/efi_disk.c
 +++ b/lib/efi_loader/efi_disk.c
 @@ -19,6 +19,7 @@

0014-Enable-EFI-and-ISO-partitions-suppo.patch

@@ -1,4 +1,4 @@
-From b7a53f16111faecbf89b62dcec654b8606a272bc Mon Sep 17 00:00:00 2001
+From 17dcd2b43a0b690c58c7115366e2817abdb217e6 Mon Sep 17 00:00:00 2001
 From: Guillaume Gardet <guillaume.gardet@arm.com>
 Date: Thu, 21 Oct 2021 09:55:50 +0200
 Subject: [PATCH] Enable EFI and ISO partitions support on socfpga_de0_nano_soc
@@ -10,7 +10,7 @@ Subject: [PATCH] Enable EFI and ISO partitions support on socfpga_de0_nano_soc
  1 file changed, 2 deletions(-)
 
 diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig
-index 364ae912ca5..f41e8fa0b89 100644
+index 646552cce6..bf0faed705 100644
 --- a/configs/socfpga_de0_nano_soc_defconfig
 +++ b/configs/socfpga_de0_nano_soc_defconfig
 @@ -45,8 +45,6 @@ CONFIG_CMD_EXT4_WRITE=y

0015-cmd-boot-add-brom-cmd-to-reboot-to-.patch

@@ -1,4 +1,4 @@
-From cc95069e85750a5a80d25a28b62068dbfe0f0965 Mon Sep 17 00:00:00 2001
+From 2d10fd4128213277d885dfb46970d3396bcdb5a8 Mon Sep 17 00:00:00 2001
 From: Andy Yan <andy.yan@rock-chips.com>
 Date: Tue, 6 Feb 2018 09:51:12 +0800
 Subject: [PATCH] cmd: boot: add brom cmd to reboot to brom dnl mode
@@ -12,7 +12,7 @@ Signed-off-by: Michal Suchanek <msuchanek@suse.de>
  2 files changed, 21 insertions(+)
 
 diff --git a/arch/arm/include/asm/arch-rockchip/boot_mode.h b/arch/arm/include/asm/arch-rockchip/boot_mode.h
-index 6b2a610cf4c..bcdf4420cfc 100644
+index 6b2a610cf4..bcdf4420cf 100644
 --- a/arch/arm/include/asm/arch-rockchip/boot_mode.h
 +++ b/arch/arm/include/asm/arch-rockchip/boot_mode.h
 @@ -19,6 +19,7 @@
@@ -24,7 +24,7 @@ index 6b2a610cf4c..bcdf4420cfc 100644
  #endif
  
 diff --git a/cmd/boot.c b/cmd/boot.c
-index 14839c1cedc..d7c7db449c5 100644
+index 14839c1ced..d7c7db449c 100644
 --- a/cmd/boot.c
 +++ b/cmd/boot.c
 @@ -44,16 +44,36 @@ static int do_go(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])

0016-cmd-boot-add-brom-cmd-to-reboot-to-.patch

@@ -1,4 +1,4 @@
-From 4c25eafaf0247cbe380594e6d4fa892ffd73ce09 Mon Sep 17 00:00:00 2001
+From 3949514f593647ace1a752ceddce988dfb4e0534 Mon Sep 17 00:00:00 2001
 From: Michal Suchanek <msuchanek@suse.de>
 Date: Sun, 3 Jul 2022 18:25:39 +0200
 Subject: [PATCH] cmd: boot: add brom cmd to reboot to FEL mode
@@ -16,10 +16,10 @@ Signed-off-by: Michal Suchanek <msuchanek@suse.de>
  4 files changed, 67 insertions(+), 1 deletion(-)
 
 diff --git a/arch/arm/include/asm/arch-sunxi/cpu.h b/arch/arm/include/asm/arch-sunxi/cpu.h
-index b08f2023748..36e7697b1c4 100644
+index 768c6572d6..86f4b1a103 100644
 --- a/arch/arm/include/asm/arch-sunxi/cpu.h
 +++ b/arch/arm/include/asm/arch-sunxi/cpu.h
-@@ -20,4 +20,15 @@
+@@ -22,4 +22,15 @@
  #define SOCID_H5	0x1718
  #define SOCID_R40	0x1701
  
@@ -36,10 +36,10 @@ index b08f2023748..36e7697b1c4 100644
 +
  #endif /* _SUNXI_CPU_H */
 diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
-index e20c3a3ee92..43a4575049a 100644
+index a4a8d8e944..acebc4ee33 100644
 --- a/arch/arm/mach-sunxi/Kconfig
 +++ b/arch/arm/mach-sunxi/Kconfig
-@@ -1073,6 +1073,22 @@ source "board/sunxi/Kconfig"
+@@ -1099,6 +1099,22 @@ source "board/sunxi/Kconfig"
  
  endif
  
@@ -63,10 +63,10 @@ index e20c3a3ee92..43a4575049a 100644
  	bool "Enable DIPs detection for CHIP board"
  	select SUPPORT_EXTENSION_SCAN
 diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
-index 78597ad932c..71844952d87 100644
+index 11a4941822..7a4291f483 100644
 --- a/arch/arm/mach-sunxi/board.c
 +++ b/arch/arm/mach-sunxi/board.c
-@@ -300,7 +300,30 @@ uint32_t sunxi_get_boot_device(void)
+@@ -315,7 +315,30 @@ uint32_t sunxi_get_boot_device(void)
  	return -1;		/* Never reached */
  }
  
@@ -97,7 +97,7 @@ index 78597ad932c..71844952d87 100644
  uint32_t sunxi_get_spl_size(void)
  {
  	struct boot_file_head *egon_head = (void *)SPL_ADDR;
-@@ -442,6 +465,7 @@ u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)
+@@ -457,6 +480,7 @@ u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)
  
  void board_init_f(ulong dummy)
  {
@@ -106,7 +106,7 @@ index 78597ad932c..71844952d87 100644
  
  #if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3
 diff --git a/cmd/boot.c b/cmd/boot.c
-index d7c7db449c5..111c9d94090 100644
+index d7c7db449c..111c9d9409 100644
 --- a/cmd/boot.c
 +++ b/cmd/boot.c
 @@ -47,6 +47,7 @@ static int do_go(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])

0017-bootstd-Scan-all-bootdevs-in-a-boot.patch

@@ -1,105 +0,0 @@
-From ab50ce2798c3a39dd186a72c3862ef923d4d713a Mon Sep 17 00:00:00 2001
-From: Simon Glass <sjg@chromium.org>
-Date: Sat, 23 Sep 2023 14:50:15 -0600
-Subject: [PATCH] bootstd: Scan all bootdevs in a boot_targets entry
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-When the boot_targets environment variable is used with the distro-boot
-scripts, each device is included individually. For example, if there
-are three mmc devices, then we will have something like:
-
-   boot_targets="mmc0 mmc1 mmc2"
-
-In contrast, standard boot supports specifying just the uclass, i.e.:
-
-   boot_targets="mmc"
-
-The intention is that this should scan all MMC devices, but in fact it
-currently only scans the first.
-
-Update the logic to handle this case, without required BOOTSTD_FULL to
-be enabled.
-
-I believe at least three people reported this, but I found two.
-
-Signed-off-by: Simon Glass <sjg@chromium.org>
-Reported-by: Date Huang <tjjh89017@hotmail.com>
-Reported-by: Vincent Stehlé <vincent.stehle@arm.com>
----
- boot/bootdev-uclass.c |  3 ++-
- boot/bootflow.c       | 21 +++++++++++++++++++--
- test/boot/bootdev.c   | 10 ++++++++++
- 3 files changed, 31 insertions(+), 3 deletions(-)
-
-diff --git a/boot/bootdev-uclass.c b/boot/bootdev-uclass.c
-index fa52bc3a9c4..5a60cf223c7 100644
---- a/boot/bootdev-uclass.c
-+++ b/boot/bootdev-uclass.c
-@@ -460,10 +460,11 @@ int bootdev_find_by_label(const char *label, struct udevice **devp,
- 			 * if no sequence number was provided, we must scan all
- 			 * bootdevs for this media uclass
- 			 */
--			if (IS_ENABLED(CONFIG_BOOTSTD_FULL) && seq == -1)
-+			if (seq == -1)
- 				method_flags |= BOOTFLOW_METHF_SINGLE_UCLASS;
- 			if (method_flagsp)
- 				*method_flagsp = method_flags;
-+			log_debug("method flags %x\n", method_flags);
- 			return 0;
- 		}
- 		log_debug("- no device in %s\n", media->name);
-diff --git a/boot/bootflow.c b/boot/bootflow.c
-index 81b5829d5b3..74abf3e17d7 100644
---- a/boot/bootflow.c
-+++ b/boot/bootflow.c
-@@ -260,8 +260,25 @@ static int iter_incr(struct bootflow_iter *iter)
- 		} else {
- 			log_debug("labels %p\n", iter->labels);
- 			if (iter->labels) {
--				ret = bootdev_next_label(iter, &dev,
--							 &method_flags);
-+				/*
-+				 * when the label is "mmc" we want to scan all
-+				 * mmc bootdevs, not just the first. See
-+				 * bootdev_find_by_label() where this flag is
-+				 * set up
-+				 */
-+				if (iter->method_flags & BOOTFLOW_METHF_SINGLE_UCLASS) {
-+					uclass_next_device(&dev);
-+					log_debug("looking for next device %s: %s\n",
-+						  iter->dev->name,
-+						  dev ? dev->name : "<none>");
-+				} else {
-+					dev = NULL;
-+				}
-+				if (!dev) {
-+					log_debug("looking at next label\n");
-+					ret = bootdev_next_label(iter, &dev,
-+								 &method_flags);
-+				}
- 			} else {
- 				ret = bootdev_next_prio(iter, &dev);
- 				method_flags = 0;
-diff --git a/test/boot/bootdev.c b/test/boot/bootdev.c
-index 6b29213416d..c5f14a7a132 100644
---- a/test/boot/bootdev.c
-+++ b/test/boot/bootdev.c
-@@ -221,6 +221,16 @@ static int bootdev_test_order(struct unit_test_state *uts)
- 	ut_asserteq_str("mmc2.bootdev", iter.dev_used[1]->name);
- 	bootflow_iter_uninit(&iter);
- 
-+	/* Make sure it scans a bootdevs in each target */
-+	ut_assertok(env_set("boot_targets", "mmc spi"));
-+	ut_asserteq(0, bootflow_scan_first(NULL, NULL, &iter, 0, &bflow));
-+	ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow));
-+	ut_asserteq(3, iter.num_devs);
-+	ut_asserteq_str("mmc2.bootdev", iter.dev_used[0]->name);
-+	ut_asserteq_str("mmc1.bootdev", iter.dev_used[1]->name);
-+	ut_asserteq_str("mmc0.bootdev", iter.dev_used[2]->name);
-+	bootflow_iter_uninit(&iter);
-+
- 	return 0;
- }
- BOOTSTD_TEST(bootdev_test_order, UT_TESTF_DM | UT_TESTF_SCAN_FDT);

0017-rpi5-add-initial-memory-map-for-bcm.patch

@@ -0,0 +1,79 @@
+From c9b27f8112c5d5fb545f49b5f6040ecdf4f60821 Mon Sep 17 00:00:00 2001
+From: Dmitry Malkin <dmitry@bedrocksystems.com>
+Date: Fri, 8 Dec 2023 17:31:10 +0200
+Subject: [PATCH] rpi5: add initial memory map for bcm2712
+
+includes:
+* 1GB of RAM (from 4GB or 8GB total)
+* VPU memory interface
+* AXI ranges (main peripherals)
+
+Signed-off-by: Dmitry Malkin <dmitry@bedrocksystems.com>
+Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
+---
+ arch/arm/mach-bcm283x/init.c | 38 +++++++++++++++++++++++++++++++++++-
+ 1 file changed, 37 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c
+index 7265faf6ce..af23b9711a 100644
+--- a/arch/arm/mach-bcm283x/init.c
++++ b/arch/arm/mach-bcm283x/init.c
+@@ -19,7 +19,7 @@
+ #ifdef CONFIG_ARM64
+ #include <asm/armv8/mmu.h>
+ 
+-#define MEM_MAP_MAX_ENTRIES (4)
++#define MEM_MAP_MAX_ENTRIES (5)
+ 
+ static struct mm_region bcm283x_mem_map[MEM_MAP_MAX_ENTRIES] = {
+ 	{
+@@ -68,6 +68,41 @@ static struct mm_region bcm2711_mem_map[MEM_MAP_MAX_ENTRIES] = {
+ 	}
+ };
+ 
++static struct mm_region bcm2712_mem_map[MEM_MAP_MAX_ENTRIES] = {
++	{
++		.virt = 0x00000000UL,
++		.phys = 0x00000000UL,
++		.size = 0x3f800000UL,
++		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
++			 PTE_BLOCK_INNER_SHARE
++	}, {
++		.virt = 0x3f800000UL,
++		.phys = 0x3f800000UL,
++		.size = 0x00800000UL,
++		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
++			 PTE_BLOCK_NON_SHARE |
++			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
++	}, {
++		/* Beginning of AXI bus where uSD controller lives */
++		.virt = 0x1000000000UL,
++		.phys = 0x1000000000UL,
++		.size = 0x0002000000UL,
++		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
++			 PTE_BLOCK_NON_SHARE |
++			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
++	}, {
++		.virt = 0x107c000000UL,
++		.phys = 0x107c000000UL,
++		.size = 0x0004000000UL,
++		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
++			 PTE_BLOCK_NON_SHARE |
++			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
++	}, {
++		/* List terminator */
++		0,
++	}
++};
++
+ struct mm_region *mem_map = bcm283x_mem_map;
+ 
+ /*
+@@ -78,6 +113,7 @@ static const struct udevice_id board_ids[] = {
+ 	{ .compatible = "brcm,bcm2837", .data = (ulong)&bcm283x_mem_map},
+ 	{ .compatible = "brcm,bcm2838", .data = (ulong)&bcm2711_mem_map},
+ 	{ .compatible = "brcm,bcm2711", .data = (ulong)&bcm2711_mem_map},
++	{ .compatible = "brcm,bcm2712", .data = (ulong)&bcm2712_mem_map},
+ 	{ },
+ };
+ 

0018-Revert-bootstd-Scan-all-bootdevs-in.patch

@@ -1,90 +0,0 @@
-From 922a2954f8bd2f980bf5e6f2be8c334129f27f85 Mon Sep 17 00:00:00 2001
-From: Simon Glass <sjg@chromium.org>
-Date: Mon, 23 Oct 2023 00:02:10 -0700
-Subject: [PATCH] Revert "bootstd: Scan all bootdevs in a boot_targets entry"
-
-This commit was intended to allow all bootdevs in each boot_targets
-entry to be scanned. However it causes bad ordering with bootdevs, e.g.
-scanning Ethernet bootdevs when it should be keeping to mmc.
-
-Revert it so we can try another approach.
-
-This reverts commit e824d0d0c219bc6da767f13f90c5b00eefe929f0.
-
-Signed-off-by: Simon Glass <sjg@chromium.org>
----
- boot/bootdev-uclass.c |  3 +--
- boot/bootflow.c       | 21 ++-------------------
- test/boot/bootdev.c   | 10 ----------
- 3 files changed, 3 insertions(+), 31 deletions(-)
-
-diff --git a/boot/bootdev-uclass.c b/boot/bootdev-uclass.c
-index 5a60cf223c7..fa52bc3a9c4 100644
---- a/boot/bootdev-uclass.c
-+++ b/boot/bootdev-uclass.c
-@@ -460,11 +460,10 @@ int bootdev_find_by_label(const char *label, struct udevice **devp,
- 			 * if no sequence number was provided, we must scan all
- 			 * bootdevs for this media uclass
- 			 */
--			if (seq == -1)
-+			if (IS_ENABLED(CONFIG_BOOTSTD_FULL) && seq == -1)
- 				method_flags |= BOOTFLOW_METHF_SINGLE_UCLASS;
- 			if (method_flagsp)
- 				*method_flagsp = method_flags;
--			log_debug("method flags %x\n", method_flags);
- 			return 0;
- 		}
- 		log_debug("- no device in %s\n", media->name);
-diff --git a/boot/bootflow.c b/boot/bootflow.c
-index 74abf3e17d7..81b5829d5b3 100644
---- a/boot/bootflow.c
-+++ b/boot/bootflow.c
-@@ -260,25 +260,8 @@ static int iter_incr(struct bootflow_iter *iter)
- 		} else {
- 			log_debug("labels %p\n", iter->labels);
- 			if (iter->labels) {
--				/*
--				 * when the label is "mmc" we want to scan all
--				 * mmc bootdevs, not just the first. See
--				 * bootdev_find_by_label() where this flag is
--				 * set up
--				 */
--				if (iter->method_flags & BOOTFLOW_METHF_SINGLE_UCLASS) {
--					uclass_next_device(&dev);
--					log_debug("looking for next device %s: %s\n",
--						  iter->dev->name,
--						  dev ? dev->name : "<none>");
--				} else {
--					dev = NULL;
--				}
--				if (!dev) {
--					log_debug("looking at next label\n");
--					ret = bootdev_next_label(iter, &dev,
--								 &method_flags);
--				}
-+				ret = bootdev_next_label(iter, &dev,
-+							 &method_flags);
- 			} else {
- 				ret = bootdev_next_prio(iter, &dev);
- 				method_flags = 0;
-diff --git a/test/boot/bootdev.c b/test/boot/bootdev.c
-index c5f14a7a132..6b29213416d 100644
---- a/test/boot/bootdev.c
-+++ b/test/boot/bootdev.c
-@@ -221,16 +221,6 @@ static int bootdev_test_order(struct unit_test_state *uts)
- 	ut_asserteq_str("mmc2.bootdev", iter.dev_used[1]->name);
- 	bootflow_iter_uninit(&iter);
- 
--	/* Make sure it scans a bootdevs in each target */
--	ut_assertok(env_set("boot_targets", "mmc spi"));
--	ut_asserteq(0, bootflow_scan_first(NULL, NULL, &iter, 0, &bflow));
--	ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow));
--	ut_asserteq(3, iter.num_devs);
--	ut_asserteq_str("mmc2.bootdev", iter.dev_used[0]->name);
--	ut_asserteq_str("mmc1.bootdev", iter.dev_used[1]->name);
--	ut_asserteq_str("mmc0.bootdev", iter.dev_used[2]->name);
--	bootflow_iter_uninit(&iter);
--
- 	return 0;
- }
- BOOTSTD_TEST(bootdev_test_order, UT_TESTF_DM | UT_TESTF_SCAN_FDT);

0018-rpi5-Use-devicetree-as-alternative-.patch

@@ -0,0 +1,162 @@
+From 4747a62ae051860501b095f6611da8c4d6577cb1 Mon Sep 17 00:00:00 2001
+From: Dmitry Malkin <dmitry@bedrocksystems.com>
+Date: Wed, 13 Dec 2023 09:27:36 +0100
+Subject: [PATCH] rpi5: Use devicetree as alternative way to read IO base
+ addresses
+
+MBOX and Watchdog on RPi5/bcm2712 has a different base IO offsets.
+Find them via devicetree blob passed by bootloader.
+
+Signed-off-by: Dmitry Malkin <dmitry@bedrocksystems.com>
+Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
+---
+ arch/arm/mach-bcm283x/include/mach/base.h  |  5 ++-
+ arch/arm/mach-bcm283x/include/mach/mbox.h  |  3 +-
+ arch/arm/mach-bcm283x/include/mach/sdhci.h |  3 +-
+ arch/arm/mach-bcm283x/include/mach/timer.h |  3 +-
+ arch/arm/mach-bcm283x/include/mach/wdog.h  |  3 +-
+ arch/arm/mach-bcm283x/init.c               | 43 ++++++++++++++++++----
+ 6 files changed, 43 insertions(+), 17 deletions(-)
+
+diff --git a/arch/arm/mach-bcm283x/include/mach/base.h b/arch/arm/mach-bcm283x/include/mach/base.h
+index 4ccaf69693..6de99e7ea1 100644
+--- a/arch/arm/mach-bcm283x/include/mach/base.h
++++ b/arch/arm/mach-bcm283x/include/mach/base.h
+@@ -6,7 +6,10 @@
+ #ifndef _BCM283x_BASE_H_
+ #define _BCM283x_BASE_H_
+ 
+-extern unsigned long rpi_bcm283x_base;
++extern unsigned long rpi_mbox_base;
++extern unsigned long rpi_timer_base;
++extern unsigned long rpi_sdhci_base;
++extern unsigned long rpi_wdog_base;
+ 
+ #ifdef CONFIG_ARMV7_LPAE
+ #ifdef CONFIG_TARGET_RPI_4_32B
+diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h
+index 490664f878..35d4e2f075 100644
+--- a/arch/arm/mach-bcm283x/include/mach/mbox.h
++++ b/arch/arm/mach-bcm283x/include/mach/mbox.h
+@@ -38,8 +38,7 @@
+ 
+ /* Raw mailbox HW */
+ 
+-#define BCM2835_MBOX_PHYSADDR ({ BUG_ON(!rpi_bcm283x_base); \
+-				 rpi_bcm283x_base + 0x0000b880; })
++#define BCM2835_MBOX_PHYSADDR	rpi_mbox_base
+ 
+ struct bcm2835_mbox_regs {
+ 	u32 read;
+diff --git a/arch/arm/mach-bcm283x/include/mach/sdhci.h b/arch/arm/mach-bcm283x/include/mach/sdhci.h
+index 7323690687..e837c679c4 100644
+--- a/arch/arm/mach-bcm283x/include/mach/sdhci.h
++++ b/arch/arm/mach-bcm283x/include/mach/sdhci.h
+@@ -8,8 +8,7 @@
+ 
+ #include <asm/arch/base.h>
+ 
+-#define BCM2835_SDHCI_PHYSADDR ({ BUG_ON(!rpi_bcm283x_base); \
+-				  rpi_bcm283x_base + 0x00300000; })
++#define BCM2835_SDHCI_PHYSADDR	rpi_sdhci_base
+ 
+ int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq);
+ 
+diff --git a/arch/arm/mach-bcm283x/include/mach/timer.h b/arch/arm/mach-bcm283x/include/mach/timer.h
+index 5567dbd7f3..60500a256d 100644
+--- a/arch/arm/mach-bcm283x/include/mach/timer.h
++++ b/arch/arm/mach-bcm283x/include/mach/timer.h
+@@ -11,8 +11,7 @@
+ #include <linux/bug.h>
+ #endif
+ 
+-#define BCM2835_TIMER_PHYSADDR ({ BUG_ON(!rpi_bcm283x_base); \
+-				  rpi_bcm283x_base + 0x00003000; })
++#define BCM2835_TIMER_PHYSADDR	rpi_timer_base
+ 
+ #define BCM2835_TIMER_CS_M3	(1 << 3)
+ #define BCM2835_TIMER_CS_M2	(1 << 2)
+diff --git a/arch/arm/mach-bcm283x/include/mach/wdog.h b/arch/arm/mach-bcm283x/include/mach/wdog.h
+index 9942666720..b950560674 100644
+--- a/arch/arm/mach-bcm283x/include/mach/wdog.h
++++ b/arch/arm/mach-bcm283x/include/mach/wdog.h
+@@ -8,8 +8,7 @@
+ 
+ #include <asm/arch/base.h>
+ 
+-#define BCM2835_WDOG_PHYSADDR ({ BUG_ON(!rpi_bcm283x_base); \
+-				 rpi_bcm283x_base + 0x00100000; })
++#define BCM2835_WDOG_PHYSADDR	rpi_wdog_base
+ 
+ struct bcm2835_wdog_regs {
+ 	u32 unknown0[7];
+diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c
+index af23b9711a..1c5c748484 100644
+--- a/arch/arm/mach-bcm283x/init.c
++++ b/arch/arm/mach-bcm283x/init.c
+@@ -151,7 +151,11 @@ static void rpi_update_mem_map(void)
+ static void rpi_update_mem_map(void) {}
+ #endif
+ 
+-unsigned long rpi_bcm283x_base = 0x3f000000;
++/* Default bcm283x devices addresses */
++unsigned long rpi_mbox_base  = 0x3f00b880;
++unsigned long rpi_sdhci_base = 0x3f300000;
++unsigned long rpi_wdog_base  = 0x3f100000;
++unsigned long rpi_timer_base = 0x3f003000;
+ 
+ int arch_cpu_init(void)
+ {
+@@ -162,22 +166,45 @@ int arch_cpu_init(void)
+ 
+ int mach_cpu_init(void)
+ {
+-	int ret, soc_offset;
++	int ret, soc, offset;
+ 	u64 io_base, size;
+ 
+ 	rpi_update_mem_map();
+ 
+ 	/* Get IO base from device tree */
+-	soc_offset = fdt_path_offset(gd->fdt_blob, "/soc");
+-	if (soc_offset < 0)
+-		return soc_offset;
++	soc = fdt_path_offset(gd->fdt_blob, "/soc");
++	if (soc < 0)
++		return soc;
+ 
+-	ret = fdt_read_range((void *)gd->fdt_blob, soc_offset, 0, NULL,
+-				&io_base, &size);
++	ret = fdt_read_range((void *)gd->fdt_blob, soc, 0, NULL,
++			     &io_base, &size);
+ 	if (ret)
+ 		return ret;
+ 
+-	rpi_bcm283x_base = io_base;
++	rpi_mbox_base  = io_base + 0x00b880;
++	rpi_sdhci_base = io_base + 0x300000;
++	rpi_wdog_base  = io_base + 0x100000;
++	rpi_timer_base = io_base + 0x003000;
++
++	offset = fdt_node_offset_by_compatible(gd->fdt_blob, soc,
++					       "brcm,bcm2835-mbox");
++	if (offset > soc)
++		rpi_mbox_base = fdt_get_base_address(gd->fdt_blob, offset);
++
++	offset = fdt_node_offset_by_compatible(gd->fdt_blob, soc,
++					       "brcm,bcm2835-sdhci");
++	if (offset > soc)
++		rpi_sdhci_base = fdt_get_base_address(gd->fdt_blob, offset);
++
++	offset = fdt_node_offset_by_compatible(gd->fdt_blob, soc,
++					       "brcm,bcm2835-system-timer");
++	if (offset > soc)
++		rpi_timer_base = fdt_get_base_address(gd->fdt_blob, offset);
++
++	offset = fdt_node_offset_by_compatible(gd->fdt_blob, soc,
++					       "brcm,bcm2712-pm");
++	if (offset > soc)
++		rpi_wdog_base = fdt_get_base_address(gd->fdt_blob, offset);
+ 
+ 	return 0;
+ }

0019-bootstd-Expand-boot-ordering-test-t.patch

@@ -1,59 +0,0 @@
-From 7d7d42a872edc05d43089d0e4e8540fd4948d515 Mon Sep 17 00:00:00 2001
-From: Simon Glass <sjg@chromium.org>
-Date: Mon, 23 Oct 2023 00:02:11 -0700
-Subject: [PATCH] bootstd: Expand boot-ordering test to include USB
-
-Scan the USB bus as well, so we can check that different uclasses work
-correctly in boot_targets
-
-update the function comment with more detail.
-
-Signed-off-by: Simon Glass <sjg@chromium.org>
----
- test/boot/bootdev.c | 17 ++++++++++++++---
- 1 file changed, 14 insertions(+), 3 deletions(-)
-
-diff --git a/test/boot/bootdev.c b/test/boot/bootdev.c
-index 6b29213416d..7228f545e9e 100644
---- a/test/boot/bootdev.c
-+++ b/test/boot/bootdev.c
-@@ -190,12 +190,21 @@ static int bootdev_test_any(struct unit_test_state *uts)
- BOOTSTD_TEST(bootdev_test_any, UT_TESTF_DM | UT_TESTF_SCAN_FDT |
- 	     UT_TESTF_ETH_BOOTDEV);
- 
--/* Check bootdev ordering with the bootdev-order property */
-+/*
-+ * Check bootdev ordering with the bootdev-order property and boot_targets
-+ * environment variable
-+ */
- static int bootdev_test_order(struct unit_test_state *uts)
- {
- 	struct bootflow_iter iter;
- 	struct bootflow bflow;
- 
-+	test_set_skip_delays(true);
-+
-+	/* Start up USB which gives us three additional bootdevs */
-+	usb_started = false;
-+	ut_assertok(run_command("usb start", 0));
-+
- 	/*
- 	 * First try the order set by the bootdev-order property
- 	 * Like all sandbox unit tests this relies on the devicetree setting up
-@@ -213,12 +222,14 @@ static int bootdev_test_order(struct unit_test_state *uts)
- 	bootflow_iter_uninit(&iter);
- 
- 	/* Use the environment variable to override it */
--	ut_assertok(env_set("boot_targets", "mmc1 mmc2"));
-+	ut_assertok(env_set("boot_targets", "mmc1 mmc2 usb"));
- 	ut_assertok(bootflow_scan_first(NULL, NULL, &iter, 0, &bflow));
- 	ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow));
--	ut_asserteq(2, iter.num_devs);
-+	ut_asserteq(3, iter.num_devs);
- 	ut_asserteq_str("mmc1.bootdev", iter.dev_used[0]->name);
- 	ut_asserteq_str("mmc2.bootdev", iter.dev_used[1]->name);
-+	ut_asserteq_str("usb_mass_storage.lun0.bootdev",
-+			iter.dev_used[2]->name);
- 	bootflow_iter_uninit(&iter);
- 
- 	return 0;

0019-rpi5-Use-devicetree-to-retrieve-boa.patch

@@ -0,0 +1,74 @@
+From b3cc55f71a99a60030ad611685dff7b8ed332791 Mon Sep 17 00:00:00 2001
+From: "Ivan T. Ivanov" <iivanov@suse.de>
+Date: Fri, 15 Dec 2023 10:17:14 +0100
+Subject: [PATCH] rpi5: Use devicetree to retrieve board revision
+
+Firmware on RPi5 return error on board revision query
+through firmware interface, but on the other hand it fills
+"linux,revision" in "system" node, so use it to detect board
+revision.
+
+	system {
+		linux,revision = <0xc04170>;
+		linux,serial = <0x6cf44e80 0x3c533ede>;
+	};
+
+Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
+---
+ board/raspberrypi/rpi/rpi.c | 22 +++++++++++++++++++---
+ 1 file changed, 19 insertions(+), 3 deletions(-)
+
+diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
+index cd823ad746..2851ebc985 100644
+--- a/board/raspberrypi/rpi/rpi.c
++++ b/board/raspberrypi/rpi/rpi.c
+@@ -171,6 +171,11 @@ static const struct rpi_model rpi_models_new_scheme[] = {
+ 		DTB_DIR "bcm2711-rpi-cm4.dtb",
+ 		true,
+ 	},
++	[0x17] = {
++		"5 Model B",
++		DTB_DIR "bcm2712-rpi-5-b.dtb",
++		true,
++	},
+ };
+ 
+ static const struct rpi_model rpi_models_old_scheme[] = {
+@@ -429,15 +434,27 @@ static void get_board_revision(void)
+ 	int ret;
+ 	const struct rpi_model *models;
+ 	uint32_t models_count;
++	ofnode node;
+ 
+ 	BCM2835_MBOX_INIT_HDR(msg);
+ 	BCM2835_MBOX_INIT_TAG(&msg->get_board_rev, GET_BOARD_REV);
+ 
+ 	ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg->hdr);
+ 	if (ret) {
+-		printf("bcm2835: Could not query board revision\n");
+ 		/* Ignore error; not critical */
+-		return;
++		node = ofnode_path("/system");
++		if (!ofnode_valid(node)) {
++			printf("bcm2835: Could not find /system node\n");
++			return;
++		}
++
++		ret = ofnode_read_u32(node, "linux,revision", &revision);
++		if (ret) {
++			printf("bcm2835: Could not find linux,revision\n");
++			return;
++		}
++	} else {
++		revision = msg->get_board_rev.body.resp.rev;
+ 	}
+ 
+ 	/*
+@@ -451,7 +468,6 @@ static void get_board_revision(void)
+ 	 * http://www.raspberrypi.org/forums/viewtopic.php?f=63&t=98367&start=250
+ 	 * http://www.raspberrypi.org/forums/viewtopic.php?f=31&t=20594
+ 	 */
+-	revision = msg->get_board_rev.body.resp.rev;
+ 	if (revision & 0x800000) {
+ 		rev_scheme = 1;
+ 		rev_type = (revision >> 4) & 0xff;

0020-bcm2835-brcm-bcm2708-fb-device-is-u.patch

@@ -0,0 +1,42 @@
+From 004ecbc32e40e1d041c7696cb948bacce39ad86d Mon Sep 17 00:00:00 2001
+From: "Ivan T. Ivanov" <iivanov@suse.de>
+Date: Mon, 18 Dec 2023 17:33:10 +0100
+Subject: [PATCH] bcm2835: brcm,bcm2708-fb device is using r5g6b5 format
+
+brcm,bcm2708-fb device provided by firmware on RPi5 uses
+16 bits per pixel. Update driver to properly handle this.
+
+Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
+---
+ drivers/video/bcm2835.c | 10 +++++-----
+ 1 file changed, 5 insertions(+), 5 deletions(-)
+
+diff --git a/drivers/video/bcm2835.c b/drivers/video/bcm2835.c
+index 14942526f1..245c958b6e 100644
+--- a/drivers/video/bcm2835.c
++++ b/drivers/video/bcm2835.c
+@@ -43,7 +43,7 @@ static int bcm2835_video_probe(struct udevice *dev)
+ 
+ 	uc_priv->xsize = w;
+ 	uc_priv->ysize = h;
+-	uc_priv->bpix = VIDEO_BPP32;
++	uc_priv->bpix = dev_get_driver_data(dev);
+ 	plat->base = fb_base;
+ 	plat->size = fb_size;
+ 
+@@ -51,11 +51,11 @@ static int bcm2835_video_probe(struct udevice *dev)
+ }
+ 
+ static const struct udevice_id bcm2835_video_ids[] = {
+-	{ .compatible = "brcm,bcm2835-hdmi" },
+-	{ .compatible = "brcm,bcm2711-hdmi0" },
+-	{ .compatible = "brcm,bcm2708-fb" },
++	{ .compatible = "brcm,bcm2835-hdmi",  .data = VIDEO_BPP32},
++	{ .compatible = "brcm,bcm2711-hdmi0", .data = VIDEO_BPP32},
++	{ .compatible = "brcm,bcm2708-fb",    .data = VIDEO_BPP16 },
+ #if !IS_ENABLED(CONFIG_VIDEO_DT_SIMPLEFB)
+-	{ .compatible = "simple-framebuffer" },
++	{ .compatible = "simple-framebuffer", .data = VIDEO_BPP32},
+ #endif
+ 	{ }
+ };

0020-bootstd-Correct-logic-for-single-uc.patch

@@ -1,81 +0,0 @@
-From c46f69b087a37ac68e43042ff84e8962eaeba19d Mon Sep 17 00:00:00 2001
-From: Simon Glass <sjg@chromium.org>
-Date: Mon, 23 Oct 2023 00:02:12 -0700
-Subject: [PATCH] bootstd: Correct logic for single uclass
-
-The current logic for "bootflow mmc" is flawed since it checks the
-uclass of the bootdev instead of its parent, the media device. Correct
-this and add a test that covers this scenario.
-
-Signed-off-by: Simon Glass <sjg@chromium.org>
----
- boot/bootflow.c     | 24 ++++++++++++++++++++++--
- test/boot/bootdev.c | 13 +++++++++++++
- 2 files changed, 35 insertions(+), 2 deletions(-)
-
-diff --git a/boot/bootflow.c b/boot/bootflow.c
-index 81b5829d5b3..7a9033b3b39 100644
---- a/boot/bootflow.c
-+++ b/boot/bootflow.c
-@@ -155,6 +155,27 @@ static void bootflow_iter_set_dev(struct bootflow_iter *iter,
- 	}
- }
- 
-+/**
-+ * scan_next_in_uclass() - Scan for the next bootdev in the same media uclass
-+ *
-+ * Move through the following bootdevs until we find another in this media
-+ * uclass, or run out
-+ *
-+ * @devp: On entry, the device to check, on exit the new device, or NULL if
-+ * there is none
-+ */
-+static void scan_next_in_uclass(struct udevice **devp)
-+{
-+	struct udevice *dev = *devp;
-+	enum uclass_id cur_id = device_get_uclass_id(dev->parent);
-+
-+	do {
-+		uclass_find_next_device(&dev);
-+	} while (dev && cur_id != device_get_uclass_id(dev->parent));
-+
-+	*devp = dev;
-+}
-+
- /**
-  * iter_incr() - Move to the next item (method, part, bootdev)
-  *
-@@ -230,8 +251,7 @@ static int iter_incr(struct bootflow_iter *iter)
- 						 &method_flags);
- 		} else if (IS_ENABLED(CONFIG_BOOTSTD_FULL) &&
- 			   (iter->flags & BOOTFLOWIF_SINGLE_UCLASS)) {
--			/* Move to the next bootdev in this uclass */
--			uclass_find_next_device(&dev);
-+			scan_next_in_uclass(&dev);
- 			if (!dev) {
- 				log_debug("finished uclass %s\n",
- 					  dev_get_uclass_name(dev));
-diff --git a/test/boot/bootdev.c b/test/boot/bootdev.c
-index 7228f545e9e..63786174805 100644
---- a/test/boot/bootdev.c
-+++ b/test/boot/bootdev.c
-@@ -232,6 +232,19 @@ static int bootdev_test_order(struct unit_test_state *uts)
- 			iter.dev_used[2]->name);
- 	bootflow_iter_uninit(&iter);
- 
-+	/* Try a single uclass */
-+	ut_assertok(env_set("boot_targets", NULL));
-+	ut_assertok(bootflow_scan_first(NULL, "mmc", &iter, 0, &bflow));
-+	ut_asserteq(2, iter.num_devs);
-+
-+	/* Now scan pass mmc1 and make sure that only mmc0 shows up */
-+	ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow));
-+	ut_asserteq(3, iter.num_devs);
-+	ut_asserteq_str("mmc2.bootdev", iter.dev_used[0]->name);
-+	ut_asserteq_str("mmc1.bootdev", iter.dev_used[1]->name);
-+	ut_asserteq_str("mmc0.bootdev", iter.dev_used[2]->name);
-+	bootflow_iter_uninit(&iter);
-+
- 	return 0;
- }
- BOOTSTD_TEST(bootdev_test_order, UT_TESTF_DM | UT_TESTF_SCAN_FDT);

0021-bootstd-Scan-all-bootdevs-in-a-boot.patch

@@ -1,141 +0,0 @@
-From e2de6a2b955ea225631bfd84a3401386a02585c1 Mon Sep 17 00:00:00 2001
-From: Simon Glass <sjg@chromium.org>
-Date: Mon, 23 Oct 2023 00:02:13 -0700
-Subject: [PATCH] bootstd: Scan all bootdevs in a boot_targets entry (take 2)
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-When the boot_targets environment variable is used with the distro-boot
-scripts, each device is included individually. For example, if there
-are three mmc devices, then we will have something like:
-
-   boot_targets="mmc0 mmc1 mmc2"
-
-In contrast, standard boot supports specifying just the uclass, i.e.:
-
-   boot_targets="mmc"
-
-The intention is that this should scan all MMC devices, but in fact it
-currently only scans the first.
-
-Update the logic to handle this case, without required BOOTSTD_FULL to
-be enabled.
-
-Signed-off-by: Simon Glass <sjg@chromium.org>
-Reported-by: Date Huang <tjjh89017@hotmail.com>
-Reported-by: Vincent Stehlé <vincent.stehle@arm.com>
-Reported-by: Ivan Ivanov <ivan.ivanov@suse.com>
----
- boot/bootdev-uclass.c |  3 ++-
- boot/bootflow.c       | 22 ++++++++++++++++++++--
- test/boot/bootdev.c   | 32 ++++++++++++++++++++++++++++++--
- 3 files changed, 52 insertions(+), 5 deletions(-)
-
-diff --git a/boot/bootdev-uclass.c b/boot/bootdev-uclass.c
-index fa52bc3a9c4..5a60cf223c7 100644
---- a/boot/bootdev-uclass.c
-+++ b/boot/bootdev-uclass.c
-@@ -460,10 +460,11 @@ int bootdev_find_by_label(const char *label, struct udevice **devp,
- 			 * if no sequence number was provided, we must scan all
- 			 * bootdevs for this media uclass
- 			 */
--			if (IS_ENABLED(CONFIG_BOOTSTD_FULL) && seq == -1)
-+			if (seq == -1)
- 				method_flags |= BOOTFLOW_METHF_SINGLE_UCLASS;
- 			if (method_flagsp)
- 				*method_flagsp = method_flags;
-+			log_debug("method flags %x\n", method_flags);
- 			return 0;
- 		}
- 		log_debug("- no device in %s\n", media->name);
-diff --git a/boot/bootflow.c b/boot/bootflow.c
-index 7a9033b3b39..0f09e638f28 100644
---- a/boot/bootflow.c
-+++ b/boot/bootflow.c
-@@ -280,8 +280,26 @@ static int iter_incr(struct bootflow_iter *iter)
- 		} else {
- 			log_debug("labels %p\n", iter->labels);
- 			if (iter->labels) {
--				ret = bootdev_next_label(iter, &dev,
--							 &method_flags);
-+				/*
-+				 * when the label is "mmc" we want to scan all
-+				 * mmc bootdevs, not just the first. See
-+				 * bootdev_find_by_label() where this flag is
-+				 * set up
-+				 */
-+				if (iter->method_flags &
-+				    BOOTFLOW_METHF_SINGLE_UCLASS) {
-+					scan_next_in_uclass(&dev);
-+					log_debug("looking for next device %s: %s\n",
-+						  iter->dev->name,
-+						  dev ? dev->name : "<none>");
-+				} else {
-+					dev = NULL;
-+				}
-+				if (!dev) {
-+					log_debug("looking at next label\n");
-+					ret = bootdev_next_label(iter, &dev,
-+								 &method_flags);
-+				}
- 			} else {
- 				ret = bootdev_next_prio(iter, &dev);
- 				method_flags = 0;
-diff --git a/test/boot/bootdev.c b/test/boot/bootdev.c
-index 63786174805..0702fccdae6 100644
---- a/test/boot/bootdev.c
-+++ b/test/boot/bootdev.c
-@@ -225,7 +225,7 @@ static int bootdev_test_order(struct unit_test_state *uts)
- 	ut_assertok(env_set("boot_targets", "mmc1 mmc2 usb"));
- 	ut_assertok(bootflow_scan_first(NULL, NULL, &iter, 0, &bflow));
- 	ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow));
--	ut_asserteq(3, iter.num_devs);
-+	ut_asserteq(5, iter.num_devs);
- 	ut_asserteq_str("mmc1.bootdev", iter.dev_used[0]->name);
- 	ut_asserteq_str("mmc2.bootdev", iter.dev_used[1]->name);
- 	ut_asserteq_str("usb_mass_storage.lun0.bootdev",
-@@ -237,7 +237,20 @@ static int bootdev_test_order(struct unit_test_state *uts)
- 	ut_assertok(bootflow_scan_first(NULL, "mmc", &iter, 0, &bflow));
- 	ut_asserteq(2, iter.num_devs);
- 
--	/* Now scan pass mmc1 and make sure that only mmc0 shows up */
-+	/* Now scan past mmc1 and make sure that only mmc0 shows up */
-+	ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow));
-+	ut_asserteq(3, iter.num_devs);
-+	ut_asserteq_str("mmc2.bootdev", iter.dev_used[0]->name);
-+	ut_asserteq_str("mmc1.bootdev", iter.dev_used[1]->name);
-+	ut_asserteq_str("mmc0.bootdev", iter.dev_used[2]->name);
-+	bootflow_iter_uninit(&iter);
-+
-+	/* Try a single uclass with boot_targets */
-+	ut_assertok(env_set("boot_targets", "mmc"));
-+	ut_assertok(bootflow_scan_first(NULL, NULL, &iter, 0, &bflow));
-+	ut_asserteq(2, iter.num_devs);
-+
-+	/* Now scan past mmc1 and make sure that only mmc0 shows up */
- 	ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow));
- 	ut_asserteq(3, iter.num_devs);
- 	ut_asserteq_str("mmc2.bootdev", iter.dev_used[0]->name);
-@@ -245,6 +258,21 @@ static int bootdev_test_order(struct unit_test_state *uts)
- 	ut_asserteq_str("mmc0.bootdev", iter.dev_used[2]->name);
- 	bootflow_iter_uninit(&iter);
- 
-+	/* Try a single uclass with boot_targets */
-+	ut_assertok(env_set("boot_targets", "mmc usb"));
-+	ut_assertok(bootflow_scan_first(NULL, NULL, &iter, 0, &bflow));
-+	ut_asserteq(2, iter.num_devs);
-+
-+	/* Now scan past mmc1 and make sure that the 3 USB devices show up */
-+	ut_asserteq(-ENODEV, bootflow_scan_next(&iter, &bflow));
-+	ut_asserteq(6, iter.num_devs);
-+	ut_asserteq_str("mmc2.bootdev", iter.dev_used[0]->name);
-+	ut_asserteq_str("mmc1.bootdev", iter.dev_used[1]->name);
-+	ut_asserteq_str("mmc0.bootdev", iter.dev_used[2]->name);
-+	ut_asserteq_str("usb_mass_storage.lun0.bootdev",
-+			iter.dev_used[3]->name);
-+	bootflow_iter_uninit(&iter);
-+
- 	return 0;
- }
- BOOTSTD_TEST(bootdev_test_order, UT_TESTF_DM | UT_TESTF_SCAN_FDT);

0021-mmc-bcmstb-Add-support-for-bcm2712-.patch

@@ -0,0 +1,240 @@
+From ceab0d2076af0777605701fd9bc8f93641f7accf Mon Sep 17 00:00:00 2001
+From: "Ivan T. Ivanov" <iivanov@suse.de>
+Date: Fri, 15 Dec 2023 09:43:45 +0100
+Subject: [PATCH] mmc: bcmstb: Add support for bcm2712 SD controller
+
+Borrow SD quirks from vendor Linux driver.
+
+"BCM2712 unfortunately carries with it a perennial bug with the SD
+controller register interface present on previous chips (2711/2709/2708).
+Accesses must be dword-sized and a read-modify-write cycle to the 32-bit
+registers containing the COMMAND, TRANSFER_MODE, BLOCK_SIZE and
+BLOCK_COUNT registers tramples the upper/lower 16 bits of data written.
+BCM2712 does not seem to need the extreme delay between each write as on
+previous chips, just the serialisation of writes to these registers in a
+single 32-bit operation."
+
+Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
+---
+ drivers/mmc/bcmstb_sdhci.c | 173 ++++++++++++++++++++++++++++++++++++-
+ 1 file changed, 172 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/mmc/bcmstb_sdhci.c b/drivers/mmc/bcmstb_sdhci.c
+index dc96818cff..21489e66c0 100644
+--- a/drivers/mmc/bcmstb_sdhci.c
++++ b/drivers/mmc/bcmstb_sdhci.c
+@@ -38,6 +38,16 @@
+  */
+ #define BCMSTB_SDHCI_MINIMUM_CLOCK_FREQUENCY	400000
+ 
++#define SDIO_CFG_CTRL				0x0
++#define  SDIO_CFG_CTRL_SDCD_N_TEST_EN		BIT(31)
++#define  SDIO_CFG_CTRL_SDCD_N_TEST_LEV		BIT(30)
++
++#define SDIO_CFG_SD_PIN_SEL			0x44
++#define  SDIO_CFG_SD_PIN_SEL_MASK		0x3
++#define  SDIO_CFG_SD_PIN_SEL_CARD		BIT(1)
++
++#define REG_OFFSET_IN_BITS(reg) ((reg) << 3 & 0x18)
++
+ /*
+  * This driver has only been tested with eMMC devices; SD devices may
+  * not work.
+@@ -47,6 +57,53 @@ struct sdhci_bcmstb_plat {
+ 	struct mmc mmc;
+ };
+ 
++struct sdhci_bcmstb_host {
++	struct sdhci_host host;
++	u32 shadow_cmd;
++	u32 shadow_blk;
++	bool is_cmd_shadowed;
++	bool is_blk_shadowed;
++};
++
++struct sdhci_brcmstb_dev_priv {
++	int (*init)(struct udevice *dev);
++	struct sdhci_ops *ops;
++};
++
++static inline struct sdhci_bcmstb_host *to_bcmstb_host(struct sdhci_host *host)
++{
++	return container_of(host, struct sdhci_bcmstb_host, host);
++}
++
++static int sdhci_brcmstb_init_2712(struct udevice *dev)
++{
++	struct sdhci_host *host = dev_get_priv(dev);
++	void *cfg_regs;
++	u32 reg;
++
++	/* Map in the non-standard CFG registers */
++	cfg_regs = dev_remap_addr_name(dev, "cfg");
++	if (!cfg_regs)
++		return -ENOENT;
++
++	if ((host->mmc->host_caps & MMC_CAP_NONREMOVABLE) ||
++	    (host->mmc->host_caps & MMC_CAP_NEEDS_POLL)) {
++		/* Force presence */
++		reg = readl(cfg_regs + SDIO_CFG_CTRL);
++		reg &= ~SDIO_CFG_CTRL_SDCD_N_TEST_LEV;
++		reg |= SDIO_CFG_CTRL_SDCD_N_TEST_EN;
++		writel(reg, cfg_regs + SDIO_CFG_CTRL);
++	} else {
++		/* Enable card detection line */
++		reg = readl(cfg_regs + SDIO_CFG_SD_PIN_SEL);
++		reg &= ~SDIO_CFG_SD_PIN_SEL_MASK;
++		reg |= SDIO_CFG_SD_PIN_SEL_CARD;
++		writel(reg, cfg_regs + SDIO_CFG_SD_PIN_SEL);
++	}
++
++	return 0;
++}
++
+ static int sdhci_bcmstb_bind(struct udevice *dev)
+ {
+ 	struct sdhci_bcmstb_plat *plat = dev_get_plat(dev);
+@@ -58,10 +115,14 @@ static int sdhci_bcmstb_probe(struct udevice *dev)
+ {
+ 	struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
+ 	struct sdhci_bcmstb_plat *plat = dev_get_plat(dev);
+-	struct sdhci_host *host = dev_get_priv(dev);
++	struct sdhci_bcmstb_host *bcmstb = dev_get_priv(dev);
++	struct sdhci_host *host = &bcmstb->host;
++	struct sdhci_brcmstb_dev_priv *dev_priv;
+ 	fdt_addr_t base;
+ 	int ret;
+ 
++	dev_priv = (struct sdhci_brcmstb_dev_priv *)dev_get_driver_data(dev);
++
+ 	base = dev_read_addr(dev);
+ 	if (base == FDT_ADDR_T_NONE)
+ 		return -EINVAL;
+@@ -75,6 +136,10 @@ static int sdhci_bcmstb_probe(struct udevice *dev)
+ 
+ 	host->mmc = &plat->mmc;
+ 	host->mmc->dev = dev;
++
++	if (dev_priv && dev_priv->ops)
++		host->ops = dev_priv->ops;
++
+ 	ret = sdhci_setup_cfg(&plat->cfg, host,
+ 			      BCMSTB_SDHCI_MAXIMUM_CLOCK_FREQUENCY,
+ 			      BCMSTB_SDHCI_MINIMUM_CLOCK_FREQUENCY);
+@@ -84,10 +149,116 @@ static int sdhci_bcmstb_probe(struct udevice *dev)
+ 	upriv->mmc = &plat->mmc;
+ 	host->mmc->priv = host;
+ 
++	if (dev_priv && dev_priv->init) {
++		ret = dev_priv->init(dev);
++		if (ret)
++			return ret;
++	}
++
+ 	return sdhci_probe(dev);
+ }
+ 
++static u16 sdhci_brcmstb_32bits_readw(struct sdhci_host *host, int reg)
++{
++	struct sdhci_bcmstb_host *bcmstb = to_bcmstb_host(host);
++	u16 word;
++	u32 val;
++
++	if (reg == SDHCI_TRANSFER_MODE && bcmstb->is_cmd_shadowed) {
++		/* Get the saved transfer mode */
++		val = bcmstb->shadow_cmd;
++	} else if ((reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) &&
++		   bcmstb->is_blk_shadowed) {
++		/* Get the saved block info */
++		val = bcmstb->shadow_blk;
++	} else {
++		val = readl(host->ioaddr + (reg & ~3));
++	}
++
++	word = val >> REG_OFFSET_IN_BITS(reg) & 0xffff;
++	return word;
++}
++
++static u8 sdhci_brcmstb_32bits_readb(struct sdhci_host *host, int reg)
++{
++	u32 val = readl(host->ioaddr + (reg & ~3));
++	u8 byte = val >> REG_OFFSET_IN_BITS(reg) & 0xff;
++	return byte;
++}
++
++/*
++ * BCM2712 unfortunately carries with it a perennial bug with the SD
++ * controller register interface present on previous chips (2711/2709/2708).
++ * Accesses must be dword-sized and a read-modify-write cycle to the
++ * 32-bit registers containing the COMMAND, TRANSFER_MODE, BLOCK_SIZE and
++ * BLOCK_COUNT registers tramples the upper/lower 16 bits of data written.
++ * BCM2712 does not seem to need the extreme delay between each write as
++ * on previous chips, just the serialisation of writes to these registers
++ * in a single 32-bit operation.
++ */
++static void sdhci_brcmstb_32bits_writew(struct sdhci_host *host, u16 val, int reg)
++{
++	struct sdhci_bcmstb_host *bcmstb = to_bcmstb_host(host);
++	u32 word_shift = REG_OFFSET_IN_BITS(reg);
++	u32 mask = 0xffff << word_shift;
++	u32 oldval, newval;
++
++	if (reg == SDHCI_COMMAND) {
++		/* Write the block now as we are issuing a command */
++		if (bcmstb->is_blk_shadowed) {
++			writel(bcmstb->shadow_blk, host->ioaddr + SDHCI_BLOCK_SIZE);
++			bcmstb->is_blk_shadowed = false;
++		}
++		oldval = bcmstb->shadow_cmd;
++		bcmstb->is_cmd_shadowed = false;
++	} else if ((reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) &&
++		   bcmstb->is_blk_shadowed) {
++		/* Block size and count are stored in shadow reg */
++		oldval = bcmstb->shadow_blk;
++	} else {
++		/* Read reg, all other registers are not shadowed */
++		oldval = readl(host->ioaddr + (reg & ~3));
++	}
++	newval = (oldval & ~mask) | (val << word_shift);
++
++	if (reg == SDHCI_TRANSFER_MODE) {
++		/* Save the transfer mode until the command is issued */
++		bcmstb->shadow_cmd = newval;
++		bcmstb->is_cmd_shadowed = true;
++	} else if (reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) {
++		/* Save the block info until the command is issued */
++		bcmstb->shadow_blk = newval;
++		bcmstb->is_blk_shadowed = true;
++	} else {
++		/* Command or other regular 32-bit write */
++		writel(newval, host->ioaddr + (reg & ~3));
++	}
++}
++
++static void sdhci_brcmstb_32bits_writeb(struct sdhci_host *host, u8 val, int reg)
++{
++	u32 oldval = readl(host->ioaddr + (reg & ~3));
++	u32 byte_shift = REG_OFFSET_IN_BITS(reg);
++	u32 mask = 0xff << byte_shift;
++	u32 newval = (oldval & ~mask) | (val << byte_shift);
++
++	writel(newval, host->ioaddr + (reg & ~3));
++}
++
++static struct sdhci_ops sdhci_brcmstb_ops_2712 = {
++	.read_b    = sdhci_brcmstb_32bits_readb,
++	.read_w    = sdhci_brcmstb_32bits_readw,
++	.write_w   = sdhci_brcmstb_32bits_writew,
++	.write_b   = sdhci_brcmstb_32bits_writeb,
++};
++
++static const struct sdhci_brcmstb_dev_priv match_priv_2712 = {
++	.init = sdhci_brcmstb_init_2712,
++	.ops = &sdhci_brcmstb_ops_2712,
++};
++
+ static const struct udevice_id sdhci_bcmstb_match[] = {
++	{ .compatible = "brcm,bcm2712-sdhci", .data = (ulong)&match_priv_2712 },
+ 	{ .compatible = "brcm,bcm7425-sdhci" },
+ 	{ .compatible = "brcm,sdhci-brcmstb" },
+ 	{ }

0022-configs-rpi_arm64-enable-SDHCI-BCMS.patch

@@ -0,0 +1,25 @@
+From 1133dd0e65418bac47257e742de89cf8310b2ec0 Mon Sep 17 00:00:00 2001
+From: "Ivan T. Ivanov" <iivanov@suse.de>
+Date: Fri, 15 Dec 2023 09:46:30 +0100
+Subject: [PATCH] configs: rpi_arm64: enable SDHCI BCMSTB driver
+
+RPi5 have "brcm,bcm2712-sdhci" controller which is
+handled by "sdhci-bcmstb" driver, so enable it.
+
+Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
+---
+ configs/rpi_arm64_defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig
+index f9dade18f6..1107fd11de 100644
+--- a/configs/rpi_arm64_defconfig
++++ b/configs/rpi_arm64_defconfig
+@@ -33,6 +33,7 @@ CONFIG_BCM2835_GPIO=y
+ CONFIG_MMC_SDHCI=y
+ CONFIG_MMC_SDHCI_SDMA=y
+ CONFIG_MMC_SDHCI_BCM2835=y
++CONFIG_MMC_SDHCI_BCMSTB=y
+ CONFIG_BCMGENET=y
+ CONFIG_PCI_BRCMSTB=y
+ CONFIG_PINCTRL=y

0023-pci-pcie-brcmstb-Add-bcm2712-PCIe-c.patch

@@ -0,0 +1,91 @@
+From 9a5ce738148019ec53d4d66bfd53a17128fb2ff1 Mon Sep 17 00:00:00 2001
+From: "Ivan T. Ivanov" <iivanov@suse.de>
+Date: Thu, 14 Dec 2023 09:25:49 +0100
+Subject: [PATCH] pci: pcie-brcmstb: Add bcm2712 PCIe controller support
+
+PCIe controller have minor register map difference compared
+to bcm2711 variant. Handle this using device specific register
+offset.
+
+Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
+---
+ drivers/pci/pcie_brcmstb.c | 23 +++++++++++++++++++----
+ 1 file changed, 19 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c
+index cd45f0bee9..d63e715b2e 100644
+--- a/drivers/pci/pcie_brcmstb.c
++++ b/drivers/pci/pcie_brcmstb.c
+@@ -90,7 +90,6 @@
+ #define PCIE_MEM_WIN0_LIMIT_HI(win)	\
+ 	 PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI + ((win) * 8)
+ 
+-#define PCIE_MISC_HARD_PCIE_HARD_DEBUG			0x4204
+ #define  PCIE_HARD_DEBUG_SERDES_IDDQ_MASK		0x08000000
+ 
+ #define PCIE_MSI_INTR2_CLR				0x4508
+@@ -131,6 +130,10 @@
+ #define SSC_STATUS_PLL_LOCK_MASK			0x800
+ #define SSC_STATUS_PLL_LOCK_SHIFT			11
+ 
++struct pcie_cfg_data {
++	unsigned long hard_debug_offs;
++};
++
+ /**
+  * struct brcm_pcie - the PCIe controller state
+  * @base: Base address of memory mapped IO registers of the controller
+@@ -141,6 +144,7 @@
+ struct brcm_pcie {
+ 	void __iomem		*base;
+ 
++	struct pcie_cfg_data	*cfg;
+ 	int			gen;
+ 	bool			ssc;
+ };
+@@ -458,7 +462,7 @@ static int brcm_pcie_probe(struct udevice *dev)
+ 	/* Take the bridge out of reset */
+ 	clrbits_le32(base + PCIE_RGR1_SW_INIT_1, RGR1_SW_INIT_1_INIT_MASK);
+ 
+-	clrbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG,
++	clrbits_le32(base + pcie->cfg->hard_debug_offs,
+ 		     PCIE_HARD_DEBUG_SERDES_IDDQ_MASK);
+ 
+ 	/* Wait for SerDes to be stable */
+@@ -599,7 +603,7 @@ static int brcm_pcie_remove(struct udevice *dev)
+ 	setbits_le32(base + PCIE_RGR1_SW_INIT_1, RGR1_SW_INIT_1_PERST_MASK);
+ 
+ 	/* Turn off SerDes */
+-	setbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG,
++	setbits_le32(base + pcie->cfg->hard_debug_offs,
+ 		     PCIE_HARD_DEBUG_SERDES_IDDQ_MASK);
+ 
+ 	/* Shutdown bridge */
+@@ -620,6 +624,8 @@ static int brcm_pcie_of_to_plat(struct udevice *dev)
+ 	if (!pcie->base)
+ 		return -EINVAL;
+ 
++	pcie->cfg = (struct pcie_cfg_data *)dev_get_driver_data(dev);
++
+ 	pcie->ssc = ofnode_read_bool(dn, "brcm,enable-ssc");
+ 
+ 	ret = ofnode_read_u32(dn, "max-link-speed", &max_link_speed);
+@@ -636,8 +642,17 @@ static const struct dm_pci_ops brcm_pcie_ops = {
+ 	.write_config	= brcm_pcie_write_config,
+ };
+ 
++static const struct pcie_cfg_data bcm2711_cfg = {
++	.hard_debug_offs	= 0x4204
++};
++
++static const struct pcie_cfg_data bcm2712_cfg = {
++	.hard_debug_offs	= 0x4304
++};
++
+ static const struct udevice_id brcm_pcie_ids[] = {
+-	{ .compatible = "brcm,bcm2711-pcie" },
++	{ .compatible = "brcm,bcm2711-pcie", .data = (ulong)&bcm2711_cfg },
++	{ .compatible = "brcm,bcm2712-pcie", .data = (ulong)&bcm2712_cfg },
+ 	{ }
+ };
+ 

_multibuild

@@ -34,7 +34,6 @@
   <flavor>lamobor1</flavor>
   <flavor>libretech-ac</flavor>
   <flavor>libretech-cc</flavor>
-  <flavor>ls1012afrdmqspi</flavor>
   <flavor>melea1000</flavor>
   <flavor>merriia80optimus</flavor>
   <flavor>microchipmpfsicicle</flavor>
@@ -76,6 +75,8 @@
   <flavor>qemu-ppce500</flavor>
   <flavor>qemu-riscv64</flavor>
   <flavor>qemu-riscv64smode</flavor>
+  <flavor>quartz64-a-rk3566</flavor>
+  <flavor>quartz64-b-rk3566</flavor>
   <flavor>rock-pi-4-rk3399</flavor>
   <flavor>rock-pi-n10-rk3399pro</flavor>
   <flavor>rock64-rk3328</flavor>
@@ -90,6 +91,8 @@
   <flavor>sifiveunmatched</flavor>
   <flavor>snow</flavor>
   <flavor>socfpgade0nanosoc</flavor>
+  <flavor>soquartz-blade-rk3566</flavor>
+  <flavor>soquartz-cm4-rk3566</flavor>
   <flavor>spring</flavor>
   <flavor>starfivevisionfive2</flavor>
   <flavor>tinker-rk3288</flavor>

rk3568_bl31_v1.28.elf

@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:67bf19566fb646e2f1f55b7fbf084f0d71b59b875a19a077e638b95adf1b254a
+size 335928

rk3568_ddr_1056MHz_v1.13.bin

@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:6f165b37640eb876b5f41297bcce6451eb8a86fa56649633d4aca76047136a36
+size 59392

u-boot-2023.10.tar.bz2

@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:e00e6c6f014e046101739d08d06f328811cebcf5ae101348f409cbbd55ce6900
-size 19645392

u-boot-2024.01.tar.bz2

@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:b99611f1ed237bf3541bdc8434b68c96a6e05967061f992443cb30aabebef5b3
+size 19926911

u-boot.changes

@@ -1,3 +1,36 @@
+-------------------------------------------------------------------
+Thu Jan 11 13:19:04 UTC 2024 - Guillaume GARDET <guillaume.gardet@opensuse.org>
+
+- Remove ls1012afrdmqspi flavor since it has been removed upstream
+  with commit b60274e6900ed1b08ad41f6d7fdebb2726ded108
+
+-------------------------------------------------------------------
+Wed Jan 10 15:11:01 UTC 2024 - Guillaume GARDET <guillaume.gardet@opensuse.org>
+
+- Update to 2024.01:
+  * Full changelog available at:
+    https://source.denx.de/u-boot/u-boot/-/compare/v2023.10...v2024.01
+- Add new platforms:
+  * quartz64-a-rk3566
+  * quartz64-b-rk3566
+  * soquartz-blade-rk3566
+  * soquartz-cm4-rk3566
+- Patch queue updated from https://github.com/openSUSE/u-boot.git tumbleweed-2024.01
+* Patches dropped:
+  0017-bootstd-Scan-all-bootdevs-in-a-boot.patch
+  0018-Revert-bootstd-Scan-all-bootdevs-in.patch
+  0019-bootstd-Expand-boot-ordering-test-t.patch
+  0020-bootstd-Correct-logic-for-single-uc.patch
+  0021-bootstd-Scan-all-bootdevs-in-a-boot.patch
+* Patches added:
+  0017-rpi5-add-initial-memory-map-for-bcm.patch
+  0018-rpi5-Use-devicetree-as-alternative-.patch
+  0019-rpi5-Use-devicetree-to-retrieve-boa.patch
+  0020-bcm2835-brcm-bcm2708-fb-device-is-u.patch
+  0021-mmc-bcmstb-Add-support-for-bcm2712-.patch
+  0022-configs-rpi_arm64-enable-SDHCI-BCMS.patch
+  0023-pci-pcie-brcmstb-Add-bcm2712-PCIe-c.patch
+
 -------------------------------------------------------------------
 Tue Oct 24 13:41:26 UTC 2023 - Matthias Brugger <mbrugger@suse.com>
 

u-boot.spec

@@ -1,7 +1,7 @@
 #
 # spec file for package u-boot
 #
-# Copyright (c) 2023 SUSE LLC
+# Copyright (c) 2024 SUSE LLC
 # Copyright (c) 2010 Texas Instruments Inc by Nishanth Menon
 # Copyright (c) 2007-2010 by Silvan Calarco <silvan.calarco@mambasoft.it>
 #
@@ -80,6 +80,12 @@
 %define rockchip_idb 1
 %define binext .itb
 %endif
+%if "%target" == "quartz64-a-rk3566" || "%target" == "quartz64-b-rk3566" || "%target" == "soquartz-blade-rk3566" || "%target" == "soquartz-cm4-rk3566"
+%define is_rk3566 1
+%define is_armv8 1
+%define rockchip_idb 1
+%define binext .itb
+%endif
 %if "%target" == "bananapim64" || "%target" == "nanopia64" || "%target" == "pine64plus" || "%target" == "pinebook"
 %define is_a64 1
 %define is_armv8 1
@@ -180,7 +186,7 @@
 %define is_ppc 1
 %endif
 # archive_version differs from version for RC version only
-%define archive_version 2023.10
+%define archive_version 2024.01
 %if "%{target}" == ""
 ExclusiveArch:  do_not_build
 %else
@@ -210,7 +216,7 @@ ExclusiveArch:  do_not_build
 %endif
 %endif
 %endif
-Version:        2023.10
+Version:        2024.01
 Release:        0
 Summary:        The U-Boot firmware for the %target platform
 License:        GPL-2.0-only
@@ -219,6 +225,8 @@ URL:            http://www.denx.de/wiki/U-Boot
 Source:         http://ftp.denx.de/pub/u-boot/u-boot-%{archive_version}.tar.bz2
 Source1:        http://ftp.denx.de/pub/u-boot/u-boot-%{archive_version}.tar.bz2.sig
 Source2:        arndale-bl1.img
+Source3:        https://github.com/JeffyCN/rockchip_mirrors/blob/6186debcac95553f6b311cee10669e12c9c9963d/bin/rk35/rk3568_bl31_v1.28.elf?raw=true#/rk3568_bl31_v1.28.elf
+Source4:        https://github.com/JeffyCN/rockchip_mirrors/blob/ddf03c1d80b33dac72a33c4f732fc5849b47ff99/bin/rk35/rk3568_ddr_1056MHz_v1.13.bin?raw=true#/rk3568_ddr_1056MHz_v1.13.bin
 Source99:       u-boot.keyring
 Source300:      u-boot-rpmlintrc
 Source900:      update_git.sh
@@ -239,11 +247,13 @@ Patch0013:      0013-Disable-timer-check-in-file-loading.patch
 Patch0014:      0014-Enable-EFI-and-ISO-partitions-suppo.patch
 Patch0015:      0015-cmd-boot-add-brom-cmd-to-reboot-to-.patch
 Patch0016:      0016-cmd-boot-add-brom-cmd-to-reboot-to-.patch
-Patch0017:      0017-bootstd-Scan-all-bootdevs-in-a-boot.patch
-Patch0018:      0018-Revert-bootstd-Scan-all-bootdevs-in.patch
-Patch0019:      0019-bootstd-Expand-boot-ordering-test-t.patch
-Patch0020:      0020-bootstd-Correct-logic-for-single-uc.patch
-Patch0021:      0021-bootstd-Scan-all-bootdevs-in-a-boot.patch
+Patch0017:      0017-rpi5-add-initial-memory-map-for-bcm.patch
+Patch0018:      0018-rpi5-Use-devicetree-as-alternative-.patch
+Patch0019:      0019-rpi5-Use-devicetree-to-retrieve-boa.patch
+Patch0020:      0020-bcm2835-brcm-bcm2708-fb-device-is-u.patch
+Patch0021:      0021-mmc-bcmstb-Add-support-for-bcm2712-.patch
+Patch0022:      0022-configs-rpi_arm64-enable-SDHCI-BCMS.patch
+Patch0023:      0023-pci-pcie-brcmstb-Add-bcm2712-PCIe-c.patch
 # Patches: end
 BuildRequires:  bc
 BuildRequires:  bison
@@ -301,6 +311,9 @@ BuildRequires:  arm-trusted-firmware-rk3399
 # make_fit_atf.py
 BuildRequires:  python3-pyelftools
 %endif
+%if 0%{?is_rk3566}
+BuildRequires:  python3-pyelftools
+%endif
 %if (0%{?is_a64} || 0%{?is_h5})
 BuildRequires:  arm-trusted-firmware-sun50i_a64
 %endif
@@ -426,6 +439,12 @@ cp %{_datadir}/arm-trusted-firmware-rk3328/bl31.elf ./atf-bl31
 %if 0%{?is_rk3399}
 cp %{_datadir}/arm-trusted-firmware-rk3399/bl31.elf ./atf-bl31
 %endif
+%if 0%{?is_rk3566}
+# Upstream Arm trusted-firmware does not support rk3566 yet
+# So, use pre-built blobs
+cp %{S:3} ./atf-bl31
+cp %{S:4} ./rockchip-tpl
+%endif
 
 %if %{is_zynq}
 confname="xilinx_zynq_virt_defconfig"

update_git.sh

@@ -13,8 +13,8 @@ set -e
 
 GIT_TREE=https://github.com/openSUSE/u-boot.git
 GIT_LOCAL_TREE=~/src/opensuse/u-boot-opensuse
-GIT_BRANCH=tumbleweed-2023.10
-GIT_UPSTREAM_TAG=v2023.10
+GIT_BRANCH=tumbleweed-2024.01
+GIT_UPSTREAM_TAG=v2024.01
 GIT_DIR=`mktemp -d -p /dev/shm`
 CMP_DIR=`mktemp -d -p /dev/shm`