054f8deb29
- enable build for one U-Boot image for RPi3/4 (rpiarm64) implements (jsc#59185) Patch queue updated from git://github.com/openSUSE/u-boot.git tumbleweed-2019.10 * Patches added: 0014-fdt-fix-bcm283x-dm-pre-reloc-defini.patch 0015-arm-dts-bcm283x-Rename-U-Boot-file.patch 0016-drivers-bcm283x-Set-pre-location-fl.patch 0017-pinctrl-bcm283x-Add-compatible-for-.patch 0018-rpi-push-fw_dtb_pointer-in-the-.dat.patch 0019-ARM-bcm283x-Move-BCM283x_BASE-to-a-.patch 0020-ARM-bcm283x-Set-rpi_bcm283x_base-at.patch 0021-ARM-bcm283x-Set-memory-map-at-run-t.patch 0022-ARM-defconfig-add-unified-config-fo.patch - RPi3 delete text base hack in spec file OBS-URL: https://build.opensuse.org/request/show/750139 OBS-URL: https://build.opensuse.org/package/show/hardware:boot/u-boot?expand=0&rev=62
233 lines
6.8 KiB
Diff
233 lines
6.8 KiB
Diff
From 3f5c91a5809b13ee0f2f75bda107398fede7536a Mon Sep 17 00:00:00 2001
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From: Matthias Brugger <mbrugger@suse.com>
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Date: Tue, 19 Nov 2019 16:01:03 +0100
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Subject: [PATCH] ARM: bcm283x: Move BCM283x_BASE to a global variable
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We move the per SOC define BCM283x_BASE to a global variable.
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This is a first step to provide a single binary for several bcm283x
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SoCs.
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Signed-off-by: Matthias Brugger <mbrugger@suse.com>
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---
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arch/arm/mach-bcm283x/include/mach/base.h | 11 +++++++++++
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arch/arm/mach-bcm283x/include/mach/mbox.h | 4 +++-
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arch/arm/mach-bcm283x/include/mach/sdhci.h | 5 ++++-
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arch/arm/mach-bcm283x/include/mach/timer.h | 7 ++++++-
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arch/arm/mach-bcm283x/include/mach/wdog.h | 5 ++++-
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arch/arm/mach-bcm283x/init.c | 8 ++++++++
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arch/arm/mach-bcm283x/mbox.c | 1 +
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arch/arm/mach-bcm283x/reset.c | 20 +++++++++++++++-----
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include/configs/rpi.h | 4 ++++
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9 files changed, 56 insertions(+), 9 deletions(-)
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create mode 100644 arch/arm/mach-bcm283x/include/mach/base.h
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diff --git a/arch/arm/mach-bcm283x/include/mach/base.h b/arch/arm/mach-bcm283x/include/mach/base.h
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new file mode 100644
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index 0000000000..c4ae39852f
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--- /dev/null
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+++ b/arch/arm/mach-bcm283x/include/mach/base.h
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@@ -0,0 +1,11 @@
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+/* SPDX-License-Identifier: GPL-2.0 */
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+/*
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+ * (C) Copyright 2019 Matthias Brugger
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+ */
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+
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+#ifndef _BCM283x_BASE_H_
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+#define _BCM283x_BASE_H_
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+
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+extern unsigned long rpi_bcm283x_base;
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+
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+#endif
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diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h
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index 0b6c2543d5..60e226ce1d 100644
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--- a/arch/arm/mach-bcm283x/include/mach/mbox.h
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+++ b/arch/arm/mach-bcm283x/include/mach/mbox.h
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@@ -7,6 +7,7 @@
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#define _BCM2835_MBOX_H
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#include <linux/compiler.h>
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+#include <asm/arch/base.h>
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/*
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* The BCM2835 SoC contains (at least) two CPUs; the VideoCore (a/k/a "GPU")
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@@ -37,7 +38,8 @@
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/* Raw mailbox HW */
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-#define BCM2835_MBOX_PHYSADDR (CONFIG_BCM283x_BASE + 0x0000b880)
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+#define BCM2835_MBOX_PHYSADDR ({ BUG_ON(!rpi_bcm283x_base); \
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+ rpi_bcm283x_base + 0x0000b880; })
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struct bcm2835_mbox_regs {
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u32 read;
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diff --git a/arch/arm/mach-bcm283x/include/mach/sdhci.h b/arch/arm/mach-bcm283x/include/mach/sdhci.h
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index b443c379d8..7323690687 100644
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--- a/arch/arm/mach-bcm283x/include/mach/sdhci.h
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+++ b/arch/arm/mach-bcm283x/include/mach/sdhci.h
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@@ -6,7 +6,10 @@
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#ifndef _BCM2835_SDHCI_H_
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#define _BCM2835_SDHCI_H_
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-#define BCM2835_SDHCI_BASE (CONFIG_BCM283x_BASE + 0x00300000)
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+#include <asm/arch/base.h>
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+
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+#define BCM2835_SDHCI_PHYSADDR ({ BUG_ON(!rpi_bcm283x_base); \
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+ rpi_bcm283x_base + 0x00300000; })
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int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq);
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diff --git a/arch/arm/mach-bcm283x/include/mach/timer.h b/arch/arm/mach-bcm283x/include/mach/timer.h
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index 014355e759..54f733a956 100644
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--- a/arch/arm/mach-bcm283x/include/mach/timer.h
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+++ b/arch/arm/mach-bcm283x/include/mach/timer.h
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@@ -6,7 +6,12 @@
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#ifndef _BCM2835_TIMER_H
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#define _BCM2835_TIMER_H
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-#define BCM2835_TIMER_PHYSADDR (CONFIG_BCM283x_BASE + 0x00003000)
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+#ifndef __ASSEMBLY__
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+#include <asm/arch/base.h>
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+#endif
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+
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+#define BCM2835_TIMER_PHYSADDR ({ BUG_ON(!rpi_bcm283x_base); \
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+ rpi_bcm283x_base + 0x00003000; })
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#define BCM2835_TIMER_CS_M3 (1 << 3)
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#define BCM2835_TIMER_CS_M2 (1 << 2)
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diff --git a/arch/arm/mach-bcm283x/include/mach/wdog.h b/arch/arm/mach-bcm283x/include/mach/wdog.h
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index 8292b3cf1f..9942666720 100644
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--- a/arch/arm/mach-bcm283x/include/mach/wdog.h
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+++ b/arch/arm/mach-bcm283x/include/mach/wdog.h
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@@ -6,7 +6,10 @@
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#ifndef _BCM2835_WDOG_H
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#define _BCM2835_WDOG_H
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-#define BCM2835_WDOG_PHYSADDR (CONFIG_BCM283x_BASE + 0x00100000)
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+#include <asm/arch/base.h>
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+
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+#define BCM2835_WDOG_PHYSADDR ({ BUG_ON(!rpi_bcm283x_base); \
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+ rpi_bcm283x_base + 0x00100000; })
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struct bcm2835_wdog_regs {
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u32 unknown0[7];
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diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c
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index 97414415a6..d36017e823 100644
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--- a/arch/arm/mach-bcm283x/init.c
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+++ b/arch/arm/mach-bcm283x/init.c
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@@ -8,6 +8,8 @@
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#include <common.h>
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+unsigned long rpi_bcm283x_base;
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+
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int arch_cpu_init(void)
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{
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icache_enable();
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@@ -15,6 +17,12 @@ int arch_cpu_init(void)
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return 0;
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}
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+int mach_cpu_init(void)
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+{
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+ rpi_bcm283x_base = CONFIG_BCM283x_BASE;
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+
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+ return 0;
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+}
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#ifdef CONFIG_ARMV7_LPAE
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void enable_caches(void)
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{
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diff --git a/arch/arm/mach-bcm283x/mbox.c b/arch/arm/mach-bcm283x/mbox.c
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index 3c67f68c17..467d0d5fba 100644
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--- a/arch/arm/mach-bcm283x/mbox.c
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+++ b/arch/arm/mach-bcm283x/mbox.c
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@@ -5,6 +5,7 @@
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#include <common.h>
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#include <asm/io.h>
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+#include <asm/arch/base.h>
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#include <asm/arch/mbox.h>
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#include <phys2bus.h>
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diff --git a/arch/arm/mach-bcm283x/reset.c b/arch/arm/mach-bcm283x/reset.c
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index b3da0c7cd6..cd8138d702 100644
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--- a/arch/arm/mach-bcm283x/reset.c
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+++ b/arch/arm/mach-bcm283x/reset.c
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@@ -8,6 +8,7 @@
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#include <common.h>
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#include <asm/io.h>
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+#include <asm/arch/base.h>
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#include <asm/arch/wdog.h>
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#include <efi_loader.h>
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@@ -25,10 +26,10 @@
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void hw_watchdog_disable(void) {}
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-__efi_runtime_data struct bcm2835_wdog_regs *wdog_regs =
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- (struct bcm2835_wdog_regs *)BCM2835_WDOG_PHYSADDR;
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+__efi_runtime_data struct bcm2835_wdog_regs *wdog_regs;
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-void __efi_runtime reset_cpu(ulong ticks)
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+static void __efi_runtime
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+__reset_cpu(struct bcm2835_wdog_regs *wdog_regs, ulong ticks)
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{
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uint32_t rstc, timeout;
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@@ -46,6 +47,14 @@ void __efi_runtime reset_cpu(ulong ticks)
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writel(BCM2835_WDOG_PASSWORD | rstc, &wdog_regs->rstc);
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}
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+void reset_cpu(ulong ticks)
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+{
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+ struct bcm2835_wdog_regs *regs =
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+ (struct bcm2835_wdog_regs *)BCM2835_WDOG_PHYSADDR;
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+
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+ __reset_cpu(regs, 0);
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+}
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+
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#ifdef CONFIG_EFI_LOADER
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void __efi_runtime EFIAPI efi_reset_system(
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@@ -58,7 +67,7 @@ void __efi_runtime EFIAPI efi_reset_system(
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if (reset_type == EFI_RESET_COLD ||
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reset_type == EFI_RESET_WARM ||
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reset_type == EFI_RESET_PLATFORM_SPECIFIC) {
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- reset_cpu(0);
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+ __reset_cpu(wdog_regs, 0);
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} else if (reset_type == EFI_RESET_SHUTDOWN) {
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/*
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* We set the watchdog hard reset bit here to distinguish this reset
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@@ -69,7 +78,7 @@ void __efi_runtime EFIAPI efi_reset_system(
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val |= BCM2835_WDOG_PASSWORD;
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val |= BCM2835_WDOG_RSTS_RASPBERRYPI_HALT;
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writel(val, &wdog_regs->rsts);
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- reset_cpu(0);
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+ __reset_cpu(wdog_regs, 0);
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}
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while (1) { }
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@@ -77,6 +86,7 @@ void __efi_runtime EFIAPI efi_reset_system(
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efi_status_t efi_reset_system_init(void)
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{
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+ wdog_regs = (struct bcm2835_wdog_regs *)BCM2835_WDOG_PHYSADDR;
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return efi_add_runtime_mmio(&wdog_regs, sizeof(*wdog_regs));
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}
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diff --git a/include/configs/rpi.h b/include/configs/rpi.h
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index 77d2d5458a..69b09f3f72 100644
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--- a/include/configs/rpi.h
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+++ b/include/configs/rpi.h
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@@ -9,6 +9,10 @@
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#include <linux/sizes.h>
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#include <asm/arch/timer.h>
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+#ifndef __ASSEMBLY__
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+#include <asm/arch/base.h>
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+#endif
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+
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#if defined(CONFIG_TARGET_RPI_2) || defined(CONFIG_TARGET_RPI_3_32B)
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#endif
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