e32bbea07e
- Update to 2022.07 - Update to 2022.07-rc6 - Drop obsolete 0015-mx6qsabrelite-Enable-DM_ETH-to-re-e.patch - Add rbrom command to enter mask rom on Rockchip devices + 0015-cmd-boot-add-brom-cmd-to-reboot-to-.patch - Add rbrom command to enter mask rom on Allwinner devices + 0016-cmd-boot-add-brom-cmd-to-reboot-to-.patch - ATF is required to boot rk3399. Do not build without it (boo#1201120). OBS-URL: https://build.opensuse.org/request/show/988566 OBS-URL: https://build.opensuse.org/package/show/hardware:boot/u-boot?expand=0&rev=168
150 lines
4.3 KiB
Diff
150 lines
4.3 KiB
Diff
From 2956d6fc64be6da6236f93849b55f530dcb8fe37 Mon Sep 17 00:00:00 2001
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From: Michal Suchanek <msuchanek@suse.de>
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Date: Sun, 3 Jul 2022 18:25:39 +0200
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Subject: [PATCH] cmd: boot: add brom cmd to reboot to FEL mode
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p-boot uses RTC GPR 1 value 0xb0010fe1 to flag FEL boot on A64
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Default to the same.
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Signed-off-by: Michal Suchanek <msuchanek@suse.de>
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---
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arch/arm/include/asm/arch-sunxi/cpu.h | 11 +++++++++++
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arch/arm/mach-sunxi/Kconfig | 16 ++++++++++++++++
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arch/arm/mach-sunxi/board.c | 24 ++++++++++++++++++++++++
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cmd/boot.c | 17 ++++++++++++++++-
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4 files changed, 67 insertions(+), 1 deletion(-)
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diff --git a/arch/arm/include/asm/arch-sunxi/cpu.h b/arch/arm/include/asm/arch-sunxi/cpu.h
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index b08f202374..36e7697b1c 100644
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--- a/arch/arm/include/asm/arch-sunxi/cpu.h
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+++ b/arch/arm/include/asm/arch-sunxi/cpu.h
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@@ -20,4 +20,15 @@
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#define SOCID_H5 0x1718
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#define SOCID_R40 0x1701
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+#if defined(CONFIG_SUNXI_RTC_FEL_ENTRY_GPR) && (CONFIG_SUNXI_RTC_FEL_ENTRY_GPR >= 0)
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+#ifdef CONFIG_MACH_SUN8I_H3
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+#define SUNXI_FEL_ENTRY_ADDRESS 0xffff0020
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+#define SUNXI_RTC_GPR_OFFSET 0x100
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+#define SUNXI_FEL_REG (SUNXI_RTC_BASE + SUNXI_RTC_GPR_OFFSET + CONFIG_SUNXI_RTC_FEL_ENTRY_GPR * 4)
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+#endif
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+#endif
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+#ifndef __ASSEMBLY__
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+void set_rtc_fel_flag(void);
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+#endif
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+
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#endif /* _SUNXI_CPU_H */
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diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
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index e712a89534..c623b4403e 100644
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--- a/arch/arm/mach-sunxi/Kconfig
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+++ b/arch/arm/mach-sunxi/Kconfig
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@@ -1048,6 +1048,22 @@ source "board/sunxi/Kconfig"
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endif
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+config SUNXI_RTC_FEL_ENTRY_GPR
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+ int "Use a RTC GPR to enter FEL"
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+ depends on MACH_SUN8I_H3
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+ range -1 7
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+ default 1
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+ help
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+ Add rbrom command to set a RTC general purpose register before reboot.
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+ Check the GPR value in SPL and jump to FEL if set.
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+ Value -1 disables the feature.
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+
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+config SUNXI_RTC_FEL_ENTRY_VALUE
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+ hex "Value to set in the RTC GPR"
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+ depends on SUNXI_RTC_FEL_ENTRY_GPR >= 0
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+ range 0x1 0xffffffff
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+ default 0xb0010fe1
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+
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config CHIP_DIP_SCAN
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bool "Enable DIPs detection for CHIP board"
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select SUPPORT_EXTENSION_SCAN
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diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
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index 8f7c894286..91866a3be6 100644
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--- a/arch/arm/mach-sunxi/board.c
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+++ b/arch/arm/mach-sunxi/board.c
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@@ -297,7 +297,30 @@ uint32_t sunxi_get_boot_device(void)
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return -1; /* Never reached */
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}
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+void set_rtc_fel_flag(void)
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+{
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+#ifdef SUNXI_FEL_REG
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+ volatile long *check_reg = (void *)SUNXI_FEL_REG;
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+
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+ *check_reg = CONFIG_SUNXI_RTC_FEL_ENTRY_VALUE;
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+#endif
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+}
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+
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#ifdef CONFIG_SPL_BUILD
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+
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+void check_rtc_fel_flag(void)
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+{
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+#ifdef SUNXI_FEL_REG
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+ volatile long *check_reg = (void *)SUNXI_FEL_REG;
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+ void (*entry)(void) = (void*)SUNXI_FEL_ENTRY_ADDRESS;
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+
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+ if (*check_reg == CONFIG_SUNXI_RTC_FEL_ENTRY_VALUE) {
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+ *check_reg = 0;
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+ return entry();
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+ }
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+#endif
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+}
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+
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uint32_t sunxi_get_spl_size(void)
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{
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struct boot_file_head *egon_head = (void *)SPL_ADDR;
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@@ -432,6 +455,7 @@ u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)
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void board_init_f(ulong dummy)
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{
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+ check_rtc_fel_flag();
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sunxi_sram_init();
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#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3
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diff --git a/cmd/boot.c b/cmd/boot.c
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index d48c0bf1b3..c870e6a217 100644
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--- a/cmd/boot.c
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+++ b/cmd/boot.c
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@@ -46,6 +46,7 @@ static int do_go(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
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#endif
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#if defined(CONFIG_ROCKCHIP_BOOT_MODE_REG) && CONFIG_ROCKCHIP_BOOT_MODE_REG
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+#define RBROM
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#include <asm/arch-rockchip/boot_mode.h>
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static int do_reboot_brom(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[])
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{
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@@ -56,6 +57,20 @@ static int do_reboot_brom(struct cmd_tbl *cmdtp, int flag, int argc, char * cons
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}
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#endif
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+#ifdef CONFIG_ARCH_SUNXI
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+#include <asm/arch-sunxi/cpu.h>
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+#ifdef SUNXI_FEL_REG
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+#define RBROM
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+static int do_reboot_brom(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[])
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+{
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+ set_rtc_fel_flag();
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+ do_reset(NULL, 0, 0, NULL);
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+
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+ return 0;
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+}
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+#endif
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+#endif
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+
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/* -------------------------------------------------------------------- */
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#ifdef CONFIG_CMD_GO
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@@ -67,7 +82,7 @@ U_BOOT_CMD(
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);
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#endif
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-#if defined(CONFIG_ROCKCHIP_BOOT_MODE_REG) && CONFIG_ROCKCHIP_BOOT_MODE_REG
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+#ifdef RBROM
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U_BOOT_CMD(
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rbrom, 1, 0, do_reboot_brom,
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"Perform RESET of the CPU and enter boot rom",
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