Dirk Mueller
392a357342
OBS-URL: https://build.opensuse.org/request/show/1146923 OBS-URL: https://build.opensuse.org/package/show/hardware:boot/u-boot?expand=0&rev=206
131 lines
3.8 KiB
Diff
131 lines
3.8 KiB
Diff
From 370b4e60fdfd9af54571f5e7aac55f6799f638ff Mon Sep 17 00:00:00 2001
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From: "Ivan T. Ivanov" <iivanov@suse.de>
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Date: Tue, 23 Jan 2024 10:07:57 +0200
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Subject: [PATCH] mmc: bcmstb: Add support for bcm2712 SD controller
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Make sure that core SDHCI accessors are used and add
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device specific card detection initialization, which
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is borrowed from vendor Linux driver code.
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Tested-by: Jens Maus <mail@jens-maus.de>
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Tested by: Darko Alavanja <darko.alavanja@konsulko.com>
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Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
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Signed-off-by: Matthias Brugger <mbrugger@suse.com>
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---
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drivers/mmc/bcmstb_sdhci.c | 64 +++++++++++++++++++++++++++++++++++---
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1 file changed, 60 insertions(+), 4 deletions(-)
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diff --git a/drivers/mmc/bcmstb_sdhci.c b/drivers/mmc/bcmstb_sdhci.c
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index dc96818cff4..49846adcf54 100644
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--- a/drivers/mmc/bcmstb_sdhci.c
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+++ b/drivers/mmc/bcmstb_sdhci.c
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@@ -38,15 +38,52 @@
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*/
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#define BCMSTB_SDHCI_MINIMUM_CLOCK_FREQUENCY 400000
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-/*
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- * This driver has only been tested with eMMC devices; SD devices may
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- * not work.
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- */
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+#define SDIO_CFG_CTRL 0x0
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+#define SDIO_CFG_CTRL_SDCD_N_TEST_EN BIT(31)
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+#define SDIO_CFG_CTRL_SDCD_N_TEST_LEV BIT(30)
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+
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+#define SDIO_CFG_SD_PIN_SEL 0x44
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+#define SDIO_CFG_SD_PIN_SEL_MASK 0x3
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+#define SDIO_CFG_SD_PIN_SEL_CARD BIT(1)
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+
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struct sdhci_bcmstb_plat {
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struct mmc_config cfg;
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struct mmc mmc;
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};
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+struct sdhci_brcmstb_dev_priv {
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+ int (*init)(struct udevice *dev);
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+};
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+
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+static int sdhci_brcmstb_init_2712(struct udevice *dev)
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+{
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+ struct sdhci_host *host = dev_get_priv(dev);
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+ void *cfg_regs;
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+ u32 reg;
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+
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+ /* Map in the non-standard CFG registers */
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+ cfg_regs = dev_remap_addr_name(dev, "cfg");
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+ if (!cfg_regs)
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+ return -ENOENT;
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+
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+ if ((host->mmc->host_caps & MMC_CAP_NONREMOVABLE) ||
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+ (host->mmc->host_caps & MMC_CAP_NEEDS_POLL)) {
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+ /* Force presence */
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+ reg = readl(cfg_regs + SDIO_CFG_CTRL);
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+ reg &= ~SDIO_CFG_CTRL_SDCD_N_TEST_LEV;
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+ reg |= SDIO_CFG_CTRL_SDCD_N_TEST_EN;
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+ writel(reg, cfg_regs + SDIO_CFG_CTRL);
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+ } else {
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+ /* Enable card detection line */
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+ reg = readl(cfg_regs + SDIO_CFG_SD_PIN_SEL);
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+ reg &= ~SDIO_CFG_SD_PIN_SEL_MASK;
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+ reg |= SDIO_CFG_SD_PIN_SEL_CARD;
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+ writel(reg, cfg_regs + SDIO_CFG_SD_PIN_SEL);
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+ }
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+
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+ return 0;
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+}
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+
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static int sdhci_bcmstb_bind(struct udevice *dev)
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{
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struct sdhci_bcmstb_plat *plat = dev_get_plat(dev);
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@@ -54,14 +91,20 @@ static int sdhci_bcmstb_bind(struct udevice *dev)
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return sdhci_bind(dev, &plat->mmc, &plat->cfg);
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}
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+/* No specific SDHCI operations are required */
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+static const struct sdhci_ops bcmstb_sdhci_ops = { 0 };
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+
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static int sdhci_bcmstb_probe(struct udevice *dev)
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{
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struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
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struct sdhci_bcmstb_plat *plat = dev_get_plat(dev);
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struct sdhci_host *host = dev_get_priv(dev);
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+ struct sdhci_brcmstb_dev_priv *dev_priv;
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fdt_addr_t base;
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int ret;
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+ dev_priv = (struct sdhci_brcmstb_dev_priv *)dev_get_driver_data(dev);
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+
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base = dev_read_addr(dev);
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if (base == FDT_ADDR_T_NONE)
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return -EINVAL;
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@@ -75,6 +118,8 @@ static int sdhci_bcmstb_probe(struct udevice *dev)
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host->mmc = &plat->mmc;
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host->mmc->dev = dev;
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+ host->ops = &bcmstb_sdhci_ops;
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+
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ret = sdhci_setup_cfg(&plat->cfg, host,
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BCMSTB_SDHCI_MAXIMUM_CLOCK_FREQUENCY,
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BCMSTB_SDHCI_MINIMUM_CLOCK_FREQUENCY);
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@@ -84,10 +129,21 @@ static int sdhci_bcmstb_probe(struct udevice *dev)
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upriv->mmc = &plat->mmc;
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host->mmc->priv = host;
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+ if (dev_priv && dev_priv->init) {
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+ ret = dev_priv->init(dev);
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+ if (ret)
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+ return ret;
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+ }
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+
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return sdhci_probe(dev);
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}
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+static const struct sdhci_brcmstb_dev_priv match_priv_2712 = {
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+ .init = sdhci_brcmstb_init_2712,
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+};
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+
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static const struct udevice_id sdhci_bcmstb_match[] = {
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+ { .compatible = "brcm,bcm2712-sdhci", .data = (ulong)&match_priv_2712 },
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{ .compatible = "brcm,bcm7425-sdhci" },
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{ .compatible = "brcm,sdhci-brcmstb" },
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{ }
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