Marcus Meissner
ac63b33d3e
- Updated Intel CPU Microcode to 20200609 (bsc#1172466) Fixes for: - CVE-2020-0543: Fixed a side channel attack against special registers which could have resulted in leaking of read values to cores other than the one which called it. This attack is known as Special Register Buffer Data Sampling (SRBDS) or "CrossTalk" (bsc#1154824). - CVE-2020-0548,CVE-2020-0549: Additional ucode updates were supplied to mitigate the Vector Register and L1D Eviction Sampling aka "CacheOutAttack" attacks. (bsc#1156353) == 20200602_DEMO Release == -- Updates upon 20200520 release -- Processor Identifier Version Products Model Stepping F-MO-S/PI Old->New ---- new platforms ---------------------------------------- ---- updated platforms ------------------------------------ HSW C0 6-3c-3/32 00000027->00000028 Core Gen4 BDW-U/Y E0/F0 6-3d-4/c0 0000002e->0000002f Core Gen5 HSW-U C0/D0 6-45-1/72 00000025->00000026 Core Gen4 HSW-H C0 6-46-1/32 0000001b->0000001c Core Gen4 BDW-H/E3 E0/G0 6-47-1/22 00000021->00000022 Core Gen5 SKL-U/Y D0 6-4e-3/c0 000000d6->000000dc Core Gen6 Mobile SKL-U23e K1 6-4e-3/c0 000000d6->000000dc Core Gen6 Mobile SKX-SP B1 6-55-3/97 01000151->01000157 Xeon Scalable SKX-SP H0/M0/U0 6-55-4/b7 02000065->02006906 Xeon Scalable SKX-D M1 6-55-4/b7 02000065->02006906 Xeon D-21xx CLX-SP B0 6-55-6/bf 0400002c->04002f01 Xeon Scalable Gen2 CLX-SP B1 6-55-7/bf 0500002c->04002f01 Xeon Scalable Gen2 SKL-H/S R0/N0 6-5e-3/36 000000d6->000000dc Core Gen6; Xeon E3 v5 AML-Y22 H0 6-8e-9/10 000000ca->000000d6 Core Gen8 Mobile KBL-U/Y H0 6-8e-9/c0 000000ca->000000d6 Core Gen7 Mobile OBS-URL: https://build.opensuse.org/request/show/813007 OBS-URL: https://build.opensuse.org/package/show/Base:System/ucode-intel?expand=0&rev=79
71 lines
2.2 KiB
RPMSpec
71 lines
2.2 KiB
RPMSpec
#
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# spec file for package ucode-intel
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#
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# Copyright (c) 2020 SUSE LLC
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#
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# All modifications and additions to the file contributed by third parties
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# remain the property of their copyright owners, unless otherwise agreed
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# upon. The license for this file, and modifications and additions to the
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# file, is the same license as for the pristine package itself (unless the
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# license for the pristine package is not an Open Source License, in which
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# case the license is the MIT License). An "Open Source License" is a
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# license that conforms to the Open Source Definition (Version 1.9)
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# published by the Open Source Initiative.
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# Please submit bugfixes or comments via https://bugs.opensuse.org/
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#
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Name: ucode-intel
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Version: 20200609
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Release: 0
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Summary: Microcode Updates for Intel x86/x86-64 CPUs
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License: SUSE-Firmware
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Group: Hardware/Other
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BuildRequires: suse-module-tools
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#License is: Intel Software License Agreement
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URL: https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files
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Source0: https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/archive/microcode-%version.tar.gz
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Source1: ucode-intel-rpmlintrc
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Supplements: modalias(x86cpu:vendor%3A0000%3Afamily%3A*%3Amodel%3A*%3Afeature%3A*)
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# new method ... note that only 1 : might be present, otherwise libzypp misinterprets it.
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Supplements: modalias(cpu:type%3Ax86*ven0000*)
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BuildRoot: %{_tmppath}/%{name}-%{version}-build
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Requires(post): coreutils
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Requires(postun): coreutils
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ExclusiveArch: %ix86 x86_64
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%description
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This package contains the microcode update blobs for Intel x86 and x86-64 CPUs.
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%prep
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%setup -q -n Intel-Linux-Processor-Microcode-Data-Files-microcode-%version/
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%build
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#it is closed source.. nothing to build.
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%install
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mkdir -p %{buildroot}/lib/firmware/intel-ucode
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cp intel-ucode/* %{buildroot}/lib/firmware/intel-ucode
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cd intel-ucode-with-caveats
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for microcode in *;do
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cp $microcode %{buildroot}/lib/firmware/intel-ucode/$microcode
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done
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%post
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%{?regenerate_initrd_post}
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%postun
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%{?regenerate_initrd_post}
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%posttrans
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%{?regenerate_initrd_posttrans}
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%files
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%defattr(-,root,root)
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%license license
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%doc releasenote
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/lib/firmware/intel-ucode/
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%changelog
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