From 865e063b74f6f89a5b44b8aba5db4bb3d1531d1dcb7ce96d05fd9bec2f116910 Mon Sep 17 00:00:00 2001 From: Dirk Mueller Date: Thu, 22 Nov 2018 09:38:33 +0000 Subject: [PATCH] - build against Toolchain module for SLE12 - add 0001-Bug-397187-s390x-Add-vector-register-support-for-vgd.patch 0001-Bug-400490-s390x-Fix-register-allocation-for-VRs-vs-.patch, 0001-Bug-400491-s390x-Sign-extend-immediate-operand-of-LO.patch, Implement-emulated-system-registers.-Fixes-392146.patch (FATE#326355) OBS-URL: https://build.opensuse.org/package/show/devel:tools/valgrind?expand=0&rev=174 --- ...-Add-vector-register-support-for-vgd.patch | 422 ++++++++++++++++++ ...-Fix-register-allocation-for-VRs-vs-.patch | 87 ++++ ...-Sign-extend-immediate-operand-of-LO.patch | 45 ++ ...lated-system-registers.-Fixes-392146.patch | 33 +- armv6-support.diff | 2 +- valgrind.changes | 9 + valgrind.spec | 15 + 7 files changed, 594 insertions(+), 19 deletions(-) create mode 100644 0001-Bug-397187-s390x-Add-vector-register-support-for-vgd.patch create mode 100644 0001-Bug-400490-s390x-Fix-register-allocation-for-VRs-vs-.patch create mode 100644 0001-Bug-400491-s390x-Sign-extend-immediate-operand-of-LO.patch diff --git a/0001-Bug-397187-s390x-Add-vector-register-support-for-vgd.patch b/0001-Bug-397187-s390x-Add-vector-register-support-for-vgd.patch new file mode 100644 index 0000000..31f4515 --- /dev/null +++ b/0001-Bug-397187-s390x-Add-vector-register-support-for-vgd.patch @@ -0,0 +1,422 @@ +From 50bd2282bce101012a5668b670cb185375600d2d Mon Sep 17 00:00:00 2001 +From: Andreas Arnez +Date: Thu, 18 Oct 2018 17:51:57 +0200 +Subject: [PATCH] Bug 397187 s390x: Add vector register support for vgdb + +On s390x machines with a vector facility, Valgrind's gdbserver didn't +represent the vector registers. This is fixed. +--- + NEWS | 1 + + coregrind/Makefile.am | 5 + + coregrind/m_gdbserver/s390-vx-valgrind-s1.xml | 43 ++++++++ + coregrind/m_gdbserver/s390-vx-valgrind-s2.xml | 43 ++++++++ + coregrind/m_gdbserver/s390-vx.xml | 59 +++++++++++ + .../m_gdbserver/s390x-vx-linux-valgrind.xml | 28 ++++++ + coregrind/m_gdbserver/s390x-vx-linux.xml | 18 ++++ + coregrind/m_gdbserver/valgrind-low-s390x.c | 97 +++++++++++++++++-- + 8 files changed, 288 insertions(+), 6 deletions(-) + create mode 100644 coregrind/m_gdbserver/s390-vx-valgrind-s1.xml + create mode 100644 coregrind/m_gdbserver/s390-vx-valgrind-s2.xml + create mode 100644 coregrind/m_gdbserver/s390-vx.xml + create mode 100644 coregrind/m_gdbserver/s390x-vx-linux-valgrind.xml + create mode 100644 coregrind/m_gdbserver/s390x-vx-linux.xml + +diff --git a/NEWS b/NEWS +index e0917e25f..2fa2c86a3 100644 +--- a/NEWS ++++ b/NEWS +@@ -49,6 +49,7 @@ where XXXXXX is the bug number as listed below. + 399322 Improve callgrind_annotate output + 400490 s390x: VRs allocated as if separate from FPRs + 400491 s390x: Operand of LOCH treated as unsigned integer ++397187 z13 vector register support for vgdb gdbserver + + Release 3.14.0 (9 October 2018) + ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +diff --git a/coregrind/Makefile.am b/coregrind/Makefile.am +index 8de19968f..94030fdb0 100644 +--- a/coregrind/Makefile.am ++++ b/coregrind/Makefile.am +@@ -685,6 +685,11 @@ GDBSERVER_XML_FILES = \ + m_gdbserver/s390x-linux64-valgrind-s1.xml \ + m_gdbserver/s390x-linux64-valgrind-s2.xml \ + m_gdbserver/s390x-linux64.xml \ ++ m_gdbserver/s390-vx-valgrind-s1.xml \ ++ m_gdbserver/s390-vx-valgrind-s2.xml \ ++ m_gdbserver/s390-vx.xml \ ++ m_gdbserver/s390x-vx-linux-valgrind.xml \ ++ m_gdbserver/s390x-vx-linux.xml \ + m_gdbserver/mips-cp0-valgrind-s1.xml \ + m_gdbserver/mips-cp0-valgrind-s2.xml \ + m_gdbserver/mips-cp0.xml \ +diff --git a/coregrind/m_gdbserver/s390-vx-valgrind-s1.xml b/coregrind/m_gdbserver/s390-vx-valgrind-s1.xml +new file mode 100644 +index 000000000..ca461b32a +--- /dev/null ++++ b/coregrind/m_gdbserver/s390-vx-valgrind-s1.xml +@@ -0,0 +1,43 @@ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ +diff --git a/coregrind/m_gdbserver/s390-vx-valgrind-s2.xml b/coregrind/m_gdbserver/s390-vx-valgrind-s2.xml +new file mode 100644 +index 000000000..eccbd8d5f +--- /dev/null ++++ b/coregrind/m_gdbserver/s390-vx-valgrind-s2.xml +@@ -0,0 +1,43 @@ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ +diff --git a/coregrind/m_gdbserver/s390-vx.xml b/coregrind/m_gdbserver/s390-vx.xml +new file mode 100644 +index 000000000..2a16873fe +--- /dev/null ++++ b/coregrind/m_gdbserver/s390-vx.xml +@@ -0,0 +1,59 @@ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ +diff --git a/coregrind/m_gdbserver/s390x-vx-linux-valgrind.xml b/coregrind/m_gdbserver/s390x-vx-linux-valgrind.xml +new file mode 100644 +index 000000000..02370022e +--- /dev/null ++++ b/coregrind/m_gdbserver/s390x-vx-linux-valgrind.xml +@@ -0,0 +1,28 @@ ++ ++ ++ ++ ++ ++ ++ ++ s390:64-bit ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ +diff --git a/coregrind/m_gdbserver/s390x-vx-linux.xml b/coregrind/m_gdbserver/s390x-vx-linux.xml +new file mode 100644 +index 000000000..e431c5b2a +--- /dev/null ++++ b/coregrind/m_gdbserver/s390x-vx-linux.xml +@@ -0,0 +1,18 @@ ++ ++ ++ ++ ++ ++ ++ ++ s390:64-bit ++ ++ ++ ++ ++ ++ +diff --git a/coregrind/m_gdbserver/valgrind-low-s390x.c b/coregrind/m_gdbserver/valgrind-low-s390x.c +index 7bbb2e372..a667f4b40 100644 +--- a/coregrind/m_gdbserver/valgrind-low-s390x.c ++++ b/coregrind/m_gdbserver/valgrind-low-s390x.c +@@ -88,9 +88,42 @@ static struct reg regs[] = { + { "f14", 2592, 64 }, + { "f15", 2656, 64 }, + { "orig_r2", 2720, 64 }, ++ { "v0l", 2784, 64 }, ++ { "v1l", 2848, 64 }, ++ { "v2l", 2912, 64 }, ++ { "v3l", 2976, 64 }, ++ { "v4l", 3040, 64 }, ++ { "v5l", 3104, 64 }, ++ { "v6l", 3168, 64 }, ++ { "v7l", 3232, 64 }, ++ { "v8l", 3296, 64 }, ++ { "v9l", 3360, 64 }, ++ { "v10l", 3424, 64 }, ++ { "v11l", 3488, 64 }, ++ { "v12l", 3552, 64 }, ++ { "v13l", 3616, 64 }, ++ { "v14l", 3680, 64 }, ++ { "v15l", 3744, 64 }, ++ { "v16", 3808, 128 }, ++ { "v17", 3936, 128 }, ++ { "v18", 4064, 128 }, ++ { "v19", 4192, 128 }, ++ { "v20", 4320, 128 }, ++ { "v21", 4448, 128 }, ++ { "v22", 4576, 128 }, ++ { "v23", 4704, 128 }, ++ { "v24", 4832, 128 }, ++ { "v25", 4960, 128 }, ++ { "v26", 5088, 128 }, ++ { "v27", 5216, 128 }, ++ { "v28", 5344, 128 }, ++ { "v29", 5472, 128 }, ++ { "v30", 5600, 128 }, ++ { "v31", 5728, 128 }, + }; + static const char *expedite_regs[] = { "r14", "r15", "pswa", 0 }; +-#define num_regs (sizeof (regs) / sizeof (regs[0])) ++#define num_regs_all (sizeof (regs) / sizeof (regs[0])) ++static int num_regs; + + static + CORE_ADDR get_pc (void) +@@ -165,7 +198,7 @@ void transfer_register (ThreadId tid, int abs_regno, void * buf, + case 32: VG_(transfer) (&s390x->guest_a14, buf, dir, size, mod); break; + case 33: VG_(transfer) (&s390x->guest_a15, buf, dir, size, mod); break; + case 34: VG_(transfer) (&s390x->guest_fpc, buf, dir, size, mod); break; +- case 35: VG_(transfer) (&s390x->guest_v0, buf, dir, size, mod); break; ++ case 35: VG_(transfer) (&s390x->guest_v0.w64[0], buf, dir, size, mod); break; + case 36: VG_(transfer) (&s390x->guest_v1.w64[0], buf, dir, size, mod); break; + case 37: VG_(transfer) (&s390x->guest_v2.w64[0], buf, dir, size, mod); break; + case 38: VG_(transfer) (&s390x->guest_v3.w64[0], buf, dir, size, mod); break; +@@ -182,18 +215,65 @@ void transfer_register (ThreadId tid, int abs_regno, void * buf, + case 49: VG_(transfer) (&s390x->guest_v14.w64[0], buf, dir, size, mod); break; + case 50: VG_(transfer) (&s390x->guest_v15.w64[0], buf, dir, size, mod); break; + case 51: *mod = False; break; //GDBTD??? { "orig_r2", 0, 64 }, ++ case 52: VG_(transfer) (&s390x->guest_v0.w64[1], buf, dir, size, mod); break; ++ case 53: VG_(transfer) (&s390x->guest_v1.w64[1], buf, dir, size, mod); break; ++ case 54: VG_(transfer) (&s390x->guest_v2.w64[1], buf, dir, size, mod); break; ++ case 55: VG_(transfer) (&s390x->guest_v3.w64[1], buf, dir, size, mod); break; ++ case 56: VG_(transfer) (&s390x->guest_v4.w64[1], buf, dir, size, mod); break; ++ case 57: VG_(transfer) (&s390x->guest_v5.w64[1], buf, dir, size, mod); break; ++ case 58: VG_(transfer) (&s390x->guest_v6.w64[1], buf, dir, size, mod); break; ++ case 59: VG_(transfer) (&s390x->guest_v7.w64[1], buf, dir, size, mod); break; ++ case 60: VG_(transfer) (&s390x->guest_v8.w64[1], buf, dir, size, mod); break; ++ case 61: VG_(transfer) (&s390x->guest_v9.w64[1], buf, dir, size, mod); break; ++ case 62: VG_(transfer) (&s390x->guest_v10.w64[1], buf, dir, size, mod); break; ++ case 63: VG_(transfer) (&s390x->guest_v11.w64[1], buf, dir, size, mod); break; ++ case 64: VG_(transfer) (&s390x->guest_v12.w64[1], buf, dir, size, mod); break; ++ case 65: VG_(transfer) (&s390x->guest_v13.w64[1], buf, dir, size, mod); break; ++ case 66: VG_(transfer) (&s390x->guest_v14.w64[1], buf, dir, size, mod); break; ++ case 67: VG_(transfer) (&s390x->guest_v15.w64[1], buf, dir, size, mod); break; ++ case 68: VG_(transfer) (&s390x->guest_v16, buf, dir, size, mod); break; ++ case 69: VG_(transfer) (&s390x->guest_v17, buf, dir, size, mod); break; ++ case 70: VG_(transfer) (&s390x->guest_v18, buf, dir, size, mod); break; ++ case 71: VG_(transfer) (&s390x->guest_v19, buf, dir, size, mod); break; ++ case 72: VG_(transfer) (&s390x->guest_v20, buf, dir, size, mod); break; ++ case 73: VG_(transfer) (&s390x->guest_v21, buf, dir, size, mod); break; ++ case 74: VG_(transfer) (&s390x->guest_v22, buf, dir, size, mod); break; ++ case 75: VG_(transfer) (&s390x->guest_v23, buf, dir, size, mod); break; ++ case 76: VG_(transfer) (&s390x->guest_v24, buf, dir, size, mod); break; ++ case 77: VG_(transfer) (&s390x->guest_v25, buf, dir, size, mod); break; ++ case 78: VG_(transfer) (&s390x->guest_v26, buf, dir, size, mod); break; ++ case 79: VG_(transfer) (&s390x->guest_v27, buf, dir, size, mod); break; ++ case 80: VG_(transfer) (&s390x->guest_v28, buf, dir, size, mod); break; ++ case 81: VG_(transfer) (&s390x->guest_v29, buf, dir, size, mod); break; ++ case 82: VG_(transfer) (&s390x->guest_v30, buf, dir, size, mod); break; ++ case 83: VG_(transfer) (&s390x->guest_v31, buf, dir, size, mod); break; + default: vg_assert(0); + } + } + ++static ++Bool have_vx (void) ++{ ++ VexArch va; ++ VexArchInfo vai; ++ VG_(machine_get_VexArchInfo) (&va, &vai); ++ return (vai.hwcaps & VEX_HWCAPS_S390X_VX) != 0; ++} ++ + static + const char* target_xml (Bool shadow_mode) + { + if (shadow_mode) { +- return "s390x-generic-valgrind.xml"; ++ if (have_vx()) ++ return "s390x-vx-linux-valgrind.xml"; ++ else ++ return "s390x-generic-valgrind.xml"; + } else { +- return "s390x-generic.xml"; +- } ++ if (have_vx()) ++ return "s390x-vx-linux.xml"; ++ else ++ return "s390x-generic.xml"; ++ } + } + + static CORE_ADDR** target_get_dtv (ThreadState *tst) +@@ -206,7 +286,7 @@ static CORE_ADDR** target_get_dtv (ThreadState *tst) + } + + static struct valgrind_target_ops low_target = { +- num_regs, ++ -1, // Override at init time. + regs, + 17, //sp = r15, which is register offset 17 in regs + transfer_register, +@@ -220,6 +300,11 @@ static struct valgrind_target_ops low_target = { + void s390x_init_architecture (struct valgrind_target_ops *target) + { + *target = low_target; ++ if (have_vx()) ++ num_regs = num_regs_all; ++ else ++ num_regs = num_regs_all - 32; // Remove all VX registers. ++ target->num_regs = num_regs; + set_register_cache (regs, num_regs); + gdbserver_expedite_regs = expedite_regs; + } +-- +2.19.1 + diff --git a/0001-Bug-400490-s390x-Fix-register-allocation-for-VRs-vs-.patch b/0001-Bug-400490-s390x-Fix-register-allocation-for-VRs-vs-.patch new file mode 100644 index 0000000..69fe371 --- /dev/null +++ b/0001-Bug-400490-s390x-Fix-register-allocation-for-VRs-vs-.patch @@ -0,0 +1,87 @@ +From 71002d8a5111d02ce8049c55017a8d948c820e35 Mon Sep 17 00:00:00 2001 +From: Andreas Arnez +Date: Thu, 25 Oct 2018 13:47:12 +0200 +Subject: [PATCH] Bug 400490 s390x: Fix register allocation for VRs vs FPRs + +On s390x, if vector registers are available, they are fed to the register +allocator as if they were separate from the floating-point registers. But +in fact the FPRs are embedded in the VRs. So for instance, if both f3 and +v3 are allocated and used at the same time, corruption will result. + +This is fixed by offering only the non-overlapping VRs, v16 to v31, to the +register allocator instead. +--- + NEWS | 1 + + VEX/priv/host_s390_defs.c | 17 +++++++---------- + 2 files changed, 8 insertions(+), 10 deletions(-) + +Index: valgrind-3.14.0/VEX/priv/host_s390_defs.c +=================================================================== +--- valgrind-3.14.0.orig/VEX/priv/host_s390_defs.c ++++ valgrind-3.14.0/VEX/priv/host_s390_defs.c +@@ -59,7 +59,6 @@ static UInt s390_tchain_load64_len(void) + + /* A mapping from register number to register index */ + static Int gpr_index[16]; // GPR regno -> register index +-static Int fpr_index[16]; // FPR regno -> register index + static Int vr_index[32]; // VR regno -> register index + + HReg +@@ -73,7 +72,7 @@ s390_hreg_gpr(UInt regno) + HReg + s390_hreg_fpr(UInt regno) + { +- Int ix = fpr_index[regno]; ++ Int ix = vr_index[regno]; + vassert(ix >= 0); + return mkHReg(/*virtual*/False, HRcFlt64, regno, ix); + } +@@ -463,11 +462,9 @@ getRRegUniverse_S390(void) + + RRegUniverse__init(ru); + +- /* Assign invalid values to the gpr/fpr/vr_index */ ++ /* Assign invalid values to the gpr/vr_index */ + for (UInt i = 0; i < sizeof gpr_index / sizeof gpr_index[0]; ++i) + gpr_index[i] = -1; +- for (UInt i = 0; i < sizeof fpr_index / sizeof fpr_index[0]; ++i) +- fpr_index[i] = -1; + for (UInt i = 0; i < sizeof vr_index / sizeof vr_index[0]; ++i) + vr_index[i] = -1; + +@@ -494,17 +491,17 @@ getRRegUniverse_S390(void) + + ru->allocable_start[HRcFlt64] = ru->size; + for (UInt regno = 8; regno <= 15; ++regno) { +- fpr_index[regno] = ru->size; ++ vr_index[regno] = ru->size; + ru->regs[ru->size++] = s390_hreg_fpr(regno); + } + for (UInt regno = 0; regno <= 7; ++regno) { +- fpr_index[regno] = ru->size; ++ vr_index[regno] = ru->size; + ru->regs[ru->size++] = s390_hreg_fpr(regno); + } + ru->allocable_end[HRcFlt64] = ru->size - 1; + + ru->allocable_start[HRcVec128] = ru->size; +- for (UInt regno = 0; regno <= 31; ++regno) { ++ for (UInt regno = 16; regno <= 31; ++regno) { + vr_index[regno] = ru->size; + ru->regs[ru->size++] = s390_hreg_vr(regno); + } +@@ -527,12 +524,12 @@ getRRegUniverse_S390(void) + /* Sanity checking */ + for (UInt i = 0; i < sizeof gpr_index / sizeof gpr_index[0]; ++i) + vassert(gpr_index[i] >= 0); +- for (UInt i = 0; i < sizeof fpr_index / sizeof fpr_index[0]; ++i) +- vassert(fpr_index[i] >= 0); + for (UInt i = 0; i < sizeof vr_index / sizeof vr_index[0]; ++i) + vassert(vr_index[i] >= 0); + + initialised = True; ++ ++ RRegUniverse__check_is_sane(ru); + return ru; + } + diff --git a/0001-Bug-400491-s390x-Sign-extend-immediate-operand-of-LO.patch b/0001-Bug-400491-s390x-Sign-extend-immediate-operand-of-LO.patch new file mode 100644 index 0000000..f21c938 --- /dev/null +++ b/0001-Bug-400491-s390x-Sign-extend-immediate-operand-of-LO.patch @@ -0,0 +1,45 @@ +From 9545e9f96beda6e9f2205bdb3c3e96edaf8d9e2b Mon Sep 17 00:00:00 2001 +From: Andreas Arnez +Date: Tue, 30 Oct 2018 17:06:38 +0100 +Subject: [PATCH] Bug 400491 s390x: Sign-extend immediate operand of LOCHI and + friends + +The VEX implementation of each of the z/Architecture instructions LOCHI, +LOCHHI, and LOCGHI treats the immediate 16-bit operand as an unsigned +integer instead of a signed integer. This is fixed. +--- + NEWS | 1 + + VEX/priv/guest_s390_toIR.c | 6 +++--- + 2 files changed, 4 insertions(+), 3 deletions(-) + +Index: valgrind-3.14.0/VEX/priv/guest_s390_toIR.c +=================================================================== +--- valgrind-3.14.0.orig/VEX/priv/guest_s390_toIR.c ++++ valgrind-3.14.0/VEX/priv/guest_s390_toIR.c +@@ -16307,7 +16307,7 @@ static const HChar * + s390_irgen_LOCHHI(UChar r1, UChar m3, UShort i2, UChar unused) + { + next_insn_if(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0))); +- put_gpr_w0(r1, mkU32(i2)); ++ put_gpr_w0(r1, mkU32((UInt)(Int)(Short)i2)); + + return "lochhi"; + } +@@ -16316,7 +16316,7 @@ static const HChar * + s390_irgen_LOCHI(UChar r1, UChar m3, UShort i2, UChar unused) + { + next_insn_if(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0))); +- put_gpr_w1(r1, mkU32(i2)); ++ put_gpr_w1(r1, mkU32((UInt)(Int)(Short)i2)); + + return "lochi"; + } +@@ -16325,7 +16325,7 @@ static const HChar * + s390_irgen_LOCGHI(UChar r1, UChar m3, UShort i2, UChar unused) + { + next_insn_if(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0))); +- put_gpr_dw0(r1, mkU64(i2)); ++ put_gpr_dw0(r1, mkU64((UInt)(Int)(Short)i2)); + + return "locghi"; + } diff --git a/Implement-emulated-system-registers.-Fixes-392146.patch b/Implement-emulated-system-registers.-Fixes-392146.patch index 9d9f076..bea257a 100644 --- a/Implement-emulated-system-registers.-Fixes-392146.patch +++ b/Implement-emulated-system-registers.-Fixes-392146.patch @@ -10,11 +10,11 @@ Signed-off-by: Matthias Brugger VEX/priv/guest_arm64_toIR.c | 222 +++++++++++++++++++++++++++++++++ 3 files changed, 331 insertions(+) -diff --git a/VEX/priv/guest_arm64_defs.h b/VEX/priv/guest_arm64_defs.h -index b28f326c2..ae01e6f3b 100644 ---- a/VEX/priv/guest_arm64_defs.h -+++ b/VEX/priv/guest_arm64_defs.h -@@ -126,6 +126,15 @@ extern ULong arm64g_dirtyhelper_MRS_CNTVCT_EL0 ( void ); +Index: valgrind-3.14.0/VEX/priv/guest_arm64_defs.h +=================================================================== +--- valgrind-3.14.0.orig/VEX/priv/guest_arm64_defs.h ++++ valgrind-3.14.0/VEX/priv/guest_arm64_defs.h +@@ -126,6 +126,15 @@ extern ULong arm64g_dirtyhelper_MRS_CNTV extern ULong arm64g_dirtyhelper_MRS_CNTFRQ_EL0 ( void ); @@ -30,11 +30,11 @@ index b28f326c2..ae01e6f3b 100644 extern void arm64g_dirtyhelper_PMULLQ ( /*OUT*/V128* res, ULong arg1, ULong arg2 ); -diff --git a/VEX/priv/guest_arm64_helpers.c b/VEX/priv/guest_arm64_helpers.c -index 10065d547..c579c9e1b 100644 ---- a/VEX/priv/guest_arm64_helpers.c -+++ b/VEX/priv/guest_arm64_helpers.c -@@ -788,6 +788,106 @@ ULong arm64g_dirtyhelper_MRS_CNTFRQ_EL0 ( void ) +Index: valgrind-3.14.0/VEX/priv/guest_arm64_helpers.c +=================================================================== +--- valgrind-3.14.0.orig/VEX/priv/guest_arm64_helpers.c ++++ valgrind-3.14.0/VEX/priv/guest_arm64_helpers.c +@@ -788,6 +788,106 @@ ULong arm64g_dirtyhelper_MRS_CNTFRQ_EL0 # endif } @@ -141,11 +141,11 @@ index 10065d547..c579c9e1b 100644 void arm64g_dirtyhelper_PMULLQ ( /*OUT*/V128* res, ULong arg1, ULong arg2 ) { -diff --git a/VEX/priv/guest_arm64_toIR.c b/VEX/priv/guest_arm64_toIR.c -index e5af388e1..ed6c1ffa5 100644 ---- a/VEX/priv/guest_arm64_toIR.c -+++ b/VEX/priv/guest_arm64_toIR.c -@@ -6872,6 +6872,228 @@ Bool dis_ARM64_branch_etc(/*MB_OUT*/DisResult* dres, UInt insn, +Index: valgrind-3.14.0/VEX/priv/guest_arm64_toIR.c +=================================================================== +--- valgrind-3.14.0.orig/VEX/priv/guest_arm64_toIR.c ++++ valgrind-3.14.0/VEX/priv/guest_arm64_toIR.c +@@ -6891,6 +6891,228 @@ Bool dis_ARM64_branch_etc(/*MB_OUT*/DisR } /* ------------------ M{SR,RS} ------------------ */ @@ -374,6 +374,3 @@ index e5af388e1..ed6c1ffa5 100644 /* ---- Cases for TPIDR_EL0 ---- 0xD51BD0 010 Rt MSR tpidr_el0, rT 0xD53BD0 010 Rt MRS rT, tpidr_el0 --- -2.17.0 - diff --git a/armv6-support.diff b/armv6-support.diff index 72ff70f..14afaa4 100644 --- a/armv6-support.diff +++ b/armv6-support.diff @@ -2,7 +2,7 @@ Index: configure.ac =================================================================== --- configure.ac.orig +++ configure.ac -@@ -234,7 +234,7 @@ case "${host_cpu}" in +@@ -252,7 +252,7 @@ case "${host_cpu}" in ARCH_MAX="s390x" ;; diff --git a/valgrind.changes b/valgrind.changes index bd5e958..043a9b8 100644 --- a/valgrind.changes +++ b/valgrind.changes @@ -1,3 +1,12 @@ +------------------------------------------------------------------- +Thu Nov 22 09:21:45 UTC 2018 - Dirk Mueller + +- build against Toolchain module for SLE12 +- add 0001-Bug-397187-s390x-Add-vector-register-support-for-vgd.patch + 0001-Bug-400490-s390x-Fix-register-allocation-for-VRs-vs-.patch, + 0001-Bug-400491-s390x-Sign-extend-immediate-operand-of-LO.patch, + Implement-emulated-system-registers.-Fixes-392146.patch (FATE#326355) + ------------------------------------------------------------------- Wed Nov 21 11:51:45 UTC 2018 - Dirk Mueller diff --git a/valgrind.spec b/valgrind.spec index e748519..183fcb0 100644 --- a/valgrind.spec +++ b/valgrind.spec @@ -35,10 +35,17 @@ Patch0: valgrind.xen.patch Patch1: jit-register-unregister.diff Patch2: armv6-support.diff Patch4: Implement-emulated-system-registers.-Fixes-392146.patch +Patch5: 0001-Bug-400490-s390x-Fix-register-allocation-for-VRs-vs-.patch +Patch6: 0001-Bug-400491-s390x-Sign-extend-immediate-operand-of-LO.patch +Patch7: 0001-Bug-397187-s390x-Add-vector-register-support-for-vgd.patch BuildRequires: automake BuildRequires: docbook-xsl-stylesheets BuildRequires: docbook_4 +%if 0%{?suse_version} < 1220 +BuildRequires: gcc8-c++ +%else BuildRequires: gcc-c++ +%endif BuildRequires: glibc-devel-32bit BuildRequires: libxslt BuildRequires: pkgconfig @@ -106,8 +113,16 @@ but it has been successfully used to optimize several KDE applications. ##%patch1 %patch2 %patch4 -p1 +%patch5 -p1 +%patch6 -p1 +%patch7 -p1 %build +%if 0%{?suse_version} < 1220 +export CC="%{_bindir}/gcc-8" +export CXX="%{_bindir}/g++-8" +%endif + export FLAGS="%{optflags}" %ifarch %arm # Valgrind doesn't support compiling for Thumb yet. Remove when it gets