diff --git a/glibc-2.14.diff b/glibc-2.14.diff deleted file mode 100644 index abc1fd3..0000000 --- a/glibc-2.14.diff +++ /dev/null @@ -1,33 +0,0 @@ ------------------------------------------------------------------------- -r11800 | tom | 2011-06-07 23:52:26 +0200 (Di, 07. Jun 2011) | 2 Zeilen - -Add glibc 2.14 support. Patch from Dmitry Djachenko . - ------------------------------------------------------------------------- -Index: configure.in -=================================================================== ---- configure.in (Revision 11799) -+++ configure.in (Revision 11800) -@@ -779,6 +779,13 @@ case "${GLIBC_VERSION}" in - DEFAULT_SUPP="glibc-2.34567-NPTL-helgrind.supp ${DEFAULT_SUPP}" - DEFAULT_SUPP="glibc-2.X-drd.supp ${DEFAULT_SUPP}" - ;; -+ 2.14) -+ AC_MSG_RESULT(2.14 family) -+ AC_DEFINE([GLIBC_2_14], 1, [Define to 1 if you're using glibc 2.14.x]) -+ DEFAULT_SUPP="glibc-2.X.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="glibc-2.34567-NPTL-helgrind.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="glibc-2.X-drd.supp ${DEFAULT_SUPP}" -+ ;; - aix5) - AC_MSG_RESULT(AIX 5.1 or 5.2 or 5.3) - AC_DEFINE([AIX5_LIBC], 1, [Define to 1 if you're using AIX 5.1 or 5.2 or 5.3]) -@@ -792,7 +799,7 @@ case "${GLIBC_VERSION}" in - - *) - AC_MSG_RESULT([unsupported version ${GLIBC_VERSION}]) -- AC_MSG_ERROR([Valgrind requires glibc version 2.2 - 2.13]) -+ AC_MSG_ERROR([Valgrind requires glibc version 2.2 - 2.14]) - AC_MSG_ERROR([or AIX 5.1 or 5.2 or 5.3 GLIBC_VERSION]) - AC_MSG_ERROR([or Darwin libc]) - ;; diff --git a/jit-register-unregister.diff b/jit-register-unregister.diff index b13cb53..a8193aa 100644 --- a/jit-register-unregister.diff +++ b/jit-register-unregister.diff @@ -1,46 +1,6 @@ -Index: include/valgrind.h -=================================================================== ---- include/valgrind.h.orig -+++ include/valgrind.h -@@ -4328,7 +4328,12 @@ typedef - VG_USERREQ__LOAD_PDB_DEBUGINFO = 0x1601, - - /* Querying of debug info. */ -- VG_USERREQ__MAP_IP_TO_SRCLOC = 0x1701 -+ VG_USERREQ__MAP_IP_TO_SRCLOC = 0x1701, -+ -+ /* JIT support */ -+ VG_USERREQ__JIT_REGISTER_MAP = 0x1702, -+ VG_USERREQ__JIT_UNREGISTER_MAP = 0x1703 -+ - } Vg_ClientRequest; - - #if !defined(__GNUC__) -@@ -4780,6 +4785,19 @@ VALGRIND_PRINTF_BACKTRACE(const char *fo - addr, buf64, 0, 0, 0); \ - } - -+#define VALGRIND_JIT_REGISTER_MAP(name, start, end) \ -+ {unsigned int _qzz_res; \ -+ VALGRIND_DO_CLIENT_REQUEST(_qzz_res, 0, \ -+ VG_USERREQ__JIT_REGISTER_MAP, \ -+ name, start, end, 0, 0); \ -+ } -+ -+#define VALGRIND_JIT_UNREGISTER_MAP(name, start) \ -+ {unsigned int _qzz_res; \ -+ VALGRIND_DO_CLIENT_REQUEST(_qzz_res, 0, \ -+ VG_USERREQ__JIT_REGISTER_MAP, \ -+ start, 0, 0, 0, 0); \ -+ } - - #undef PLAT_x86_linux - #undef PLAT_amd64_linux -Index: coregrind/m_debuginfo/debuginfo.c -=================================================================== ---- coregrind/m_debuginfo/debuginfo.c.orig +--- coregrind/m_debuginfo/debuginfo.c +++ coregrind/m_debuginfo/debuginfo.c -@@ -48,6 +48,7 @@ +@@ -49,6 +49,7 @@ #include "pub_core_oset.h" #include "pub_core_stacktrace.h" // VG_(get_StackTrace) XXX: circular dependency #include "pub_core_ume.h" @@ -48,8 +8,8 @@ Index: coregrind/m_debuginfo/debuginfo.c #include "priv_misc.h" /* dinfo_zalloc/free */ #include "priv_d3basics.h" /* ML_(pp_GX) */ -@@ -1201,6 +1202,132 @@ ULong VG_(di_aix5_notify_segchange)( - #endif /* defined(VGO_aix5) */ +@@ -1253,6 +1254,132 @@ + #endif /* defined(VGO_linux) || defined(VGO_darwin) */ +/* Storing and retrieving information caused by JITted code. TODO: @@ -181,7 +141,7 @@ Index: coregrind/m_debuginfo/debuginfo.c /*------------------------------------------------------------*/ /*--- ---*/ /*--- TOP LEVEL: QUERYING EXISTING DEBUG INFO ---*/ -@@ -1336,8 +1463,19 @@ Bool get_sym_name ( Bool do_cxx_demangli +@@ -1388,8 +1515,19 @@ PtrdiffT offset; search_all_symtabs ( a, &di, &sno, match_anywhere_in_sym, findText ); @@ -200,30 +160,11 @@ Index: coregrind/m_debuginfo/debuginfo.c return False; + } + vg_assert(di->symtab[sno].pri_name); VG_(demangle) ( do_cxx_demangling, do_z_demangling, - di->symtab[sno].name, buf, nbuf ); -Index: coregrind/pub_core_debuginfo.h -=================================================================== ---- coregrind/pub_core_debuginfo.h.orig -+++ coregrind/pub_core_debuginfo.h -@@ -106,6 +106,12 @@ Bool VG_(get_fnname_raw) ( Addr a, Char* - extern - Bool VG_(get_fnname_no_cxx_demangle) ( Addr a, Char* buf, Int nbuf ); - -+/* Register/deregister symbols created by JITs. */ -+extern -+void VG_(register_jited_code)( Char* name, Addr start, SizeT len ); -+ -+extern -+void VG_(unregister_jited_code)( Addr start ); - - /* Use DWARF2/3 CFA information to do one step of stack unwinding. - D3UnwindRegs holds the current register values, and is -Index: coregrind/m_scheduler/scheduler.c -=================================================================== ---- coregrind/m_scheduler/scheduler.c.orig +--- coregrind/m_scheduler/scheduler.c +++ coregrind/m_scheduler/scheduler.c -@@ -1585,6 +1585,16 @@ void do_client_request ( ThreadId tid ) +@@ -1669,6 +1669,16 @@ goto my_default; } @@ -240,3 +181,51 @@ Index: coregrind/m_scheduler/scheduler.c default: my_default: if (os_client_request(tid, arg)) { +--- coregrind/pub_core_debuginfo.h ++++ coregrind/pub_core_debuginfo.h +@@ -93,6 +93,12 @@ + extern + Bool VG_(get_fnname_no_cxx_demangle) ( Addr a, Char* buf, Int nbuf ); + ++/* Register/deregister symbols created by JITs. */ ++extern ++void VG_(register_jited_code)( Char* name, Addr start, SizeT len ); ++ ++extern ++void VG_(unregister_jited_code)( Addr start ); + + /* Use DWARF2/3 CFA information to do one step of stack unwinding. + D3UnwindRegs holds the current register values, and is +--- include/valgrind.h ++++ include/valgrind.h +@@ -3664,6 +3664,10 @@ + /* Querying of debug info. */ + VG_USERREQ__MAP_IP_TO_SRCLOC = 0x1701, + ++ /* JIT support */ ++ VG_USERREQ__JIT_REGISTER_MAP = 0x1702, ++ VG_USERREQ__JIT_UNREGISTER_MAP = 0x1703, ++ + /* Disable/enable error reporting level. Takes a single + Word arg which is the delta to this thread's error + disablement indicator. Hence 1 disables or further +@@ -3828,6 +3832,19 @@ + _qyy_arg1, _qyy_arg2, \ + _qyy_arg3, 0) + ++#define VALGRIND_JIT_REGISTER_MAP(name, start, end) \ ++ {unsigned int _qzz_res; \ ++ VALGRIND_DO_CLIENT_REQUEST(_qzz_res, 0, \ ++ VG_USERREQ__JIT_REGISTER_MAP, \ ++ name, start, end, 0, 0); \ ++ } ++ ++#define VALGRIND_JIT_UNREGISTER_MAP(name, start) \ ++ {unsigned int _qzz_res; \ ++ VALGRIND_DO_CLIENT_REQUEST(_qzz_res, 0, \ ++ VG_USERREQ__JIT_REGISTER_MAP, \ ++ start, 0, 0, 0, 0); \ ++ } + + /* Counts the number of errors that have been recorded by a tool. Nb: + the tool must record the errors with VG_(maybe_record_error)() or diff --git a/valgrind-3.6.0.svn11566-s390x-port.diff b/valgrind-3.6.0.svn11566-s390x-port.diff deleted file mode 100644 index 74a34fe..0000000 --- a/valgrind-3.6.0.svn11566-s390x-port.diff +++ /dev/null @@ -1,68256 +0,0 @@ ---- cachegrind/cg_branchpred.c -+++ cachegrind/cg_branchpred.c -@@ -48,6 +48,8 @@ - # define N_IADDR_LO_ZERO_BITS 2 - #elif defined(VGA_x86) || defined(VGA_amd64) - # define N_IADDR_LO_ZERO_BITS 0 -+#elif defined(VGA_s390x) -+# define N_IADDR_LO_ZERO_BITS 1 - #else - # error "Unsupported architecture" - #endif ---- cachegrind/cg-s390x.c -+++ cachegrind/cg-s390x.c -@@ -0,0 +1,73 @@ -+ -+/*--------------------------------------------------------------------*/ -+/*--- s390x-specific definitions. cg-s390x.c ---*/ -+/*--------------------------------------------------------------------*/ -+ -+/* -+ This file is part of Cachegrind, a Valgrind tool for cache -+ profiling programs. -+ -+ Copyright IBM Corp. 2010 -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA -+ 02111-1307, USA. -+ -+ The GNU General Public License is contained in the file COPYING. -+*/ -+ -+/* Contributed by Christian Borntraeger */ -+ -+#if defined(VGA_s390x) -+ -+#include "pub_tool_basics.h" -+#include "pub_tool_libcbase.h" -+#include "pub_tool_libcassert.h" -+#include "pub_tool_libcprint.h" -+ -+#include "cg_arch.h" -+ -+void VG_(configure_caches)(cache_t* I1c, cache_t* D1c, cache_t* L2c, -+ Bool all_caches_clo_defined) -+{ -+ // Set caches to z10 default. -+ // See IBM Journal of Research and Development -+ // Issue Date: Jan. 2009 -+ // Volume: 53 Issue:1 -+ // fixs390: have a table for all available models and check /proc/cpuinfo -+ *I1c = (cache_t) { 65536, 4, 256 }; -+ *D1c = (cache_t) { 131072, 8, 256 }; -+ *L2c = (cache_t) { 3145728, 12, 256 }; -+ -+ // Warn if config not completely specified from cmd line. Note that -+ // this message is slightly different from the one we give on x86/AMD64 -+ // when auto-detection fails; this lets us filter out this one (which is -+ // not important) in the regression test suite without filtering the -+ // x86/AMD64 one (which we want to see if it ever occurs in the -+ // regression test suite). -+ // -+ // If you change this message, please update -+ // cachegrind/tests/filter_stderr! -+ // -+ if (!all_caches_clo_defined) { -+ VG_(dmsg)("Warning: Cannot auto-detect cache config on s390x, using one " -+ "or more defaults \n"); -+ } -+} -+ -+#endif -+ -+/*--------------------------------------------------------------------*/ -+/*--- end cg-s390x.c ---*/ -+/*--------------------------------------------------------------------*/ ---- cachegrind/Makefile.am -+++ cachegrind/Makefile.am -@@ -44,7 +44,8 @@ - cg-x86-amd64.c \ - cg-ppc32.c \ - cg-ppc64.c \ -- cg-arm.c -+ cg-arm.c \ -+ cg-s390x.c - - cachegrind_@VGCONF_ARCH_PRI@_@VGCONF_OS@_SOURCES = \ - $(CACHEGRIND_SOURCES_COMMON) ---- cachegrind/tests/filter_stderr -+++ cachegrind/tests/filter_stderr -@@ -18,4 +18,6 @@ - sed "/Simulating a 16 KB I-cache with 32 B lines/d" | - sed "/warning: L3 cache found, using its data for the LL simulation./d" | - sed "/Warning: Cannot auto-detect cache config on PPC.., using one or more defaults/d" | --sed "/Warning: Cannot auto-detect cache config on ARM, using one or more defaults/d" -+sed "/Warning: Cannot auto-detect cache config on ARM, using one or more defaults/d" | -+sed "/Warning: Cannot auto-detect cache config on s390x, using one or more defaults/d" -+ ---- callgrind/Makefile.am -+++ callgrind/Makefile.am -@@ -49,7 +49,8 @@ - ../cachegrind/cg-x86-amd64.c \ - ../cachegrind/cg-ppc32.c \ - ../cachegrind/cg-ppc64.c \ -- ../cachegrind/cg-arm.c -+ ../cachegrind/cg-arm.c \ -+ ../cachegrind/cg-s390x.c - - CALLGRIND_CFLAGS_COMMON = -I$(top_srcdir)/cachegrind - ---- callgrind/tests/filter_stderr -+++ callgrind/tests/filter_stderr -@@ -27,4 +27,5 @@ - sed "/Simulating a 16 KB I-cache with 32 B lines/d" | - sed "/warning: L3 cache found, using its data for the LL simulation./d" | - sed "/Warning: Cannot auto-detect cache config on PPC.., using one or more defaults/d" | --sed "/Warning: Cannot auto-detect cache config on ARM, using one or more defaults/d" -+sed "/Warning: Cannot auto-detect cache config on ARM, using one or more defaults/d" | -+sed "/Warning: Cannot auto-detect cache config on s390x, using one or more defaults/d" ---- configure.in -+++ configure.in -@@ -158,6 +158,11 @@ - esac - ;; - -+ s390x) -+ AC_MSG_RESULT([ok (${host_cpu})]) -+ ARCH_MAX="s390x" -+ ;; -+ - armv7*) - AC_MSG_RESULT([ok (${host_cpu})]) - ARCH_MAX="arm" -@@ -519,6 +524,18 @@ - valt_load_address_sec_inner="0xUNSET" - AC_MSG_RESULT([ok (${host_cpu}-${host_os})]) - ;; -+ s390x-linux) -+ VGCONF_ARCH_PRI="s390x" -+ VGCONF_ARCH_SEC="" -+ VGCONF_PLATFORM_PRI_CAPS="S390X_LINUX" -+ VGCONF_PLATFORM_SEC_CAPS="" -+ # we want to have the generated code close to the dispatcher -+ valt_load_address_pri_norml="0x401000000" -+ valt_load_address_pri_inner="0x410000000" -+ valt_load_address_sec_norml="0xUNSET" -+ valt_load_address_sec_inner="0xUNSET" -+ AC_MSG_RESULT([ok (${ARCH_MAX}-${VGCONF_OS})]) -+ ;; - *) - VGCONF_ARCH_PRI="unknown" - VGCONF_ARCH_SEC="unknown" -@@ -555,6 +572,8 @@ - -o x$VGCONF_PLATFORM_PRI_CAPS = xPPC64_AIX5 ) - AM_CONDITIONAL(VGCONF_ARCHS_INCLUDE_ARM, - test x$VGCONF_PLATFORM_PRI_CAPS = xARM_LINUX ) -+AM_CONDITIONAL(VGCONF_ARCHS_INCLUDE_S390X, -+ test x$VGCONF_PLATFORM_PRI_CAPS = xS390X_LINUX ) - - # Set up VGCONF_PLATFORMS_INCLUDE_. Either one or two of these - # become defined. -@@ -570,6 +589,9 @@ - test x$VGCONF_PLATFORM_PRI_CAPS = xPPC64_LINUX) - AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_ARM_LINUX, - test x$VGCONF_PLATFORM_PRI_CAPS = xARM_LINUX) -+AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_S390X_LINUX, -+ test x$VGCONF_PLATFORM_PRI_CAPS = xS390X_LINUX \ -+ -o x$VGCONF_PLATFORM_SEC_CAPS = xS390X_LINUX) - - AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_PPC32_AIX5, - test x$VGCONF_PLATFORM_PRI_CAPS = xPPC32_AIX5 \ -@@ -592,7 +614,8 @@ - -o x$VGCONF_PLATFORM_PRI_CAPS = xAMD64_LINUX \ - -o x$VGCONF_PLATFORM_PRI_CAPS = xPPC32_LINUX \ - -o x$VGCONF_PLATFORM_PRI_CAPS = xPPC64_LINUX \ -- -o x$VGCONF_PLATFORM_PRI_CAPS = xARM_LINUX ) -+ -o x$VGCONF_PLATFORM_PRI_CAPS = xARM_LINUX \ -+ -o x$VGCONF_PLATFORM_PRI_CAPS = xS390X_LINUX) - AM_CONDITIONAL(VGCONF_OS_IS_AIX5, - test x$VGCONF_PLATFORM_PRI_CAPS = xPPC32_AIX5 \ - -o x$VGCONF_PLATFORM_PRI_CAPS = xPPC64_AIX5) -@@ -1374,6 +1397,36 @@ - fi - - -+# what facilities does the s390 assembler support? -+AC_MSG_CHECKING([if s390 as supports extended immediate]) -+CFLAGS=-march=z9-109 -+AC_TRY_COMPILE(, [ -+__asm__ __volatile__("flogr 1,2"); -+], -+[ -+ac_have_as_s390_ei=yes -+AC_MSG_RESULT([yes]) -+], [ -+ac_have_as_s390_ei=no -+AC_MSG_RESULT([no]) -+]) -+AM_CONDITIONAL(S390_BUILDS_EI, test x$ac_have_as_s390_ei = xyes) -+ -+AC_MSG_CHECKING([if s390 as supports general instruction extension]) -+CFLAGS=-march=z10 -+AC_TRY_COMPILE(, [ -+__asm__ __volatile__("chsi 1,0"); -+], -+[ -+ac_have_as_s390_ge=yes -+AC_MSG_RESULT([yes]) -+], [ -+ac_have_as_s390_ge=no -+AC_MSG_RESULT([no]) -+]) -+AM_CONDITIONAL(S390_BUILDS_GE, test x$ac_have_as_s390_ge = xyes) -+CFLAGS=$safe_CFLAGS -+ - # does the x86/amd64 assembler understand SSE3 instructions? - # Note, this doesn't generate a C-level symbol. It generates a - # automake-level symbol (BUILD_SSE3_TESTS), used in test Makefile.am's -@@ -1592,7 +1645,8 @@ - -o x$VGCONF_PLATFORM_PRI_CAPS = xPPC32_LINUX ; then - mflag_primary=$FLAG_M32 - elif test x$VGCONF_PLATFORM_PRI_CAPS = xAMD64_LINUX \ -- -o x$VGCONF_PLATFORM_PRI_CAPS = xPPC64_LINUX ; then -+ -o x$VGCONF_PLATFORM_PRI_CAPS = xPPC64_LINUX \ -+ -o x$VGCONF_PLATFORM_PRI_CAPS = xS390X_LINUX ; then - mflag_primary=$FLAG_M64 - elif test x$VGCONF_PLATFORM_PRI_CAPS = xPPC32_AIX5 ; then - mflag_primary=-q32 -@@ -1952,6 +2006,7 @@ - none/tests/ppc64/Makefile - none/tests/x86/Makefile - none/tests/arm/Makefile -+ none/tests/s390x/Makefile - none/tests/linux/Makefile - none/tests/darwin/Makefile - none/tests/x86-linux/Makefile ---- configure.in.orig -+++ configure.in.orig -@@ -0,0 +1,1991 @@ -+ -+##------------------------------------------------------------## -+# -+# The multiple-architecture stuff in this file is pretty -+# cryptic. Read docs/internals/multiple-architectures.txt -+# for at least a partial explanation of what is going on. -+# -+##------------------------------------------------------------## -+ -+# Process this file with autoconf to produce a configure script. -+AC_INIT(Valgrind, 3.6.1, valgrind-users@lists.sourceforge.net) -+AC_CONFIG_SRCDIR(coregrind/m_main.c) -+AM_CONFIG_HEADER(config.h) -+AM_INIT_AUTOMAKE([foreign]) -+ -+AM_MAINTAINER_MODE -+ -+#---------------------------------------------------------------------------- -+# Checks for various programs. -+#---------------------------------------------------------------------------- -+CFLAGS="-Wno-long-long $CFLAGS" -+ -+AC_PROG_LN_S -+AC_PROG_CC -+AM_PROG_CC_C_O -+AC_PROG_CPP -+AC_PROG_CXX -+# AC_PROG_OBJC apparently causes problems on older Linux distros (eg. with -+# autoconf 2.59). If we ever have any Objective-C code in the Valgrind code -+# base (eg. most likely as Darwin-specific tests) we'll need one of the -+# following: -+# - put AC_PROG_OBJC in a Darwin-specific part of this file -+# - Use AC_PROG_OBJC here and up the minimum autoconf version -+# - Use the following, which is apparently equivalent: -+# m4_ifdef([AC_PROG_OBJC], -+# [AC_PROG_OBJC], -+# [AC_CHECK_TOOL([OBJC], [gcc]) -+# AC_SUBST([OBJC]) -+# AC_SUBST([OBJCFLAGS]) -+# ]) -+AC_PROG_RANLIB -+# provide a very basic definition for AC_PROG_SED if it's not provided by -+# autoconf (as e.g. in autoconf 2.59). -+m4_ifndef([AC_PROG_SED], -+ [AC_DEFUN([AC_PROG_SED], -+ [AC_ARG_VAR([SED]) -+ AC_CHECK_PROGS([SED],[gsed sed])])]) -+AC_PROG_SED -+ -+# If no AR variable was specified, look up the name of the archiver. Otherwise -+# do not touch the AR variable. -+if test "x$AR" = "x"; then -+ AC_PATH_PROGS([AR], [`echo $LD | $SED 's/ld$/ar/'` "ar"], [ar]) -+fi -+AC_ARG_VAR([AR],[Archiver command]) -+ -+# Check for the compiler support -+if test "${GCC}" != "yes" ; then -+ AC_MSG_ERROR([Valgrind relies on GCC to be compiled]) -+fi -+ -+# figure out where perl lives -+AC_PATH_PROG(PERL, perl) -+ -+# figure out where gdb lives -+AC_PATH_PROG(GDB, gdb, "/no/gdb/was/found/at/configure/time") -+AC_DEFINE_UNQUOTED(GDB_PATH, "$GDB", [path to GDB]) -+ -+# some older automake's don't have it so try something on our own -+ifdef([AM_PROG_AS],[AM_PROG_AS], -+[ -+AS="${CC}" -+AC_SUBST(AS) -+ -+ASFLAGS="" -+AC_SUBST(ASFLAGS) -+]) -+ -+ -+# Check if 'diff' supports -u (universal diffs) and use it if possible. -+ -+AC_MSG_CHECKING([for diff -u]) -+AC_SUBST(DIFF) -+ -+# Comparing two identical files results in 0, unless -u isn't supported (as -+# it's not on AIX). -+tmpfile="tmp-xxx-yyy-zzz" -+touch $tmpfile; -+if diff -u $tmpfile $tmpfile ; then -+ AC_MSG_RESULT([yes]) -+ DIFF="diff -u" -+else -+ AC_MSG_RESULT([no]) -+ DIFF="diff" -+fi -+rm $tmpfile -+ -+ -+# We don't want gcc < 3.0 -+AC_MSG_CHECKING([for a supported version of gcc]) -+ -+[gcc_version=`${CC} --version | head -n 1 | $SED 's/^[^0-9]*\([0-9.]*\).*$/\1/'`] -+ -+case "${gcc_version}" in -+ 2.*) -+ AC_MSG_RESULT([no (${gcc_version})]) -+ AC_MSG_ERROR([please use a recent (>= gcc-3.0) version of gcc]) -+ ;; -+ *) -+ AC_MSG_RESULT([ok (${gcc_version})]) -+ ;; -+esac -+ -+#---------------------------------------------------------------------------- -+# Arch/OS/platform tests. -+#---------------------------------------------------------------------------- -+# We create a number of arch/OS/platform-related variables. We prefix them -+# all with "VGCONF_" which indicates that they are defined at -+# configure-time, and distinguishes them from the VGA_*/VGO_*/VGP_* -+# variables used when compiling C files. -+ -+AC_CANONICAL_HOST -+ -+AC_MSG_CHECKING([for a supported CPU]) -+ -+# ARCH_MAX reflects the most that this CPU can do: for example if it -+# is a 64-bit capable PowerPC, then it must be set to ppc64 and not ppc32. -+# Ditto for amd64. It is used for more configuration below, but is not used -+# outside this file. -+case "${host_cpu}" in -+ i?86) -+ AC_MSG_RESULT([ok (${host_cpu})]) -+ ARCH_MAX="x86" -+ ;; -+ -+ x86_64) -+ AC_MSG_RESULT([ok (${host_cpu})]) -+ ARCH_MAX="amd64" -+ ;; -+ -+ powerpc64) -+ # This value can only happen on Linux, not on AIX -+ AC_MSG_RESULT([ok (${host_cpu})]) -+ ARCH_MAX="ppc64" -+ ;; -+ -+ powerpc) -+ # Complexity. 'powerpc' on AIX implies a 64-bit capable CPU. -+ # Whereas in Linux that means only a 32-bit capable CPU. -+ AC_MSG_RESULT([ok (${host_cpu})]) -+ case "${host_os}" in -+ aix5.*) -+ ARCH_MAX="ppc64" -+ ;; -+ *) -+ ARCH_MAX="ppc32" -+ ;; -+ esac -+ ;; -+ -+ armv7*) -+ AC_MSG_RESULT([ok (${host_cpu})]) -+ ARCH_MAX="arm" -+ ;; -+ -+ *) -+ AC_MSG_RESULT([no (${host_cpu})]) -+ AC_MSG_ERROR([Unsupported host architecture. Sorry]) -+ ;; -+esac -+ -+#---------------------------------------------------------------------------- -+ -+# Sometimes it's convenient to subvert the bi-arch build system and -+# just have a single build even though the underlying platform is -+# capable of both. Hence handle --enable-only64bit and -+# --enable-only32bit. Complain if both are issued :-) -+# [Actually, if either of these options are used, I think both get built, -+# but only one gets installed. So if you use an in-place build, both can be -+# used. --njn] -+ -+# Check if a 64-bit only build has been requested -+AC_CACHE_CHECK([for a 64-bit only build], vg_cv_only64bit, -+ [AC_ARG_ENABLE(only64bit, -+ [ --enable-only64bit do a 64-bit only build], -+ [vg_cv_only64bit=$enableval], -+ [vg_cv_only64bit=no])]) -+ -+# Check if a 32-bit only build has been requested -+AC_CACHE_CHECK([for a 32-bit only build], vg_cv_only32bit, -+ [AC_ARG_ENABLE(only32bit, -+ [ --enable-only32bit do a 32-bit only build], -+ [vg_cv_only32bit=$enableval], -+ [vg_cv_only32bit=no])]) -+ -+# Stay sane -+if test x$vg_cv_only64bit = xyes -a x$vg_cv_only32bit = xyes; then -+ AC_MSG_ERROR( -+ [Nonsensical: both --enable-only64bit and --enable-only32bit.]) -+fi -+ -+#---------------------------------------------------------------------------- -+ -+# VGCONF_OS is the primary build OS, eg. "linux". It is passed in to -+# compilation of many C files via -VGO_$(VGCONF_OS) and -+# -VGP_$(VGCONF_ARCH_PRI)_$(VGCONF_OS). -+AC_MSG_CHECKING([for a supported OS]) -+AC_SUBST(VGCONF_OS) -+ -+DEFAULT_SUPP="" -+ -+case "${host_os}" in -+ *linux*) -+ AC_MSG_RESULT([ok (${host_os})]) -+ VGCONF_OS="linux" -+ -+ # Ok, this is linux. Check the kernel version -+ AC_MSG_CHECKING([for the kernel version]) -+ -+ kernel=`uname -r` -+ -+ case "${kernel}" in -+ 2.6.*) -+ AC_MSG_RESULT([2.6 family (${kernel})]) -+ AC_DEFINE([KERNEL_2_6], 1, [Define to 1 if you're using Linux 2.6.x]) -+ ;; -+ -+ 2.4.*) -+ AC_MSG_RESULT([2.4 family (${kernel})]) -+ AC_DEFINE([KERNEL_2_4], 1, [Define to 1 if you're using Linux 2.4.x]) -+ ;; -+ -+ *) -+ AC_MSG_RESULT([unsupported (${kernel})]) -+ AC_MSG_ERROR([Valgrind works on kernels 2.4, 2.6]) -+ ;; -+ esac -+ -+ ;; -+ -+ aix5.1.*) -+ AC_MSG_RESULT([ok (${host_os})]) -+ VGCONF_OS="aix5" -+ ;; -+ aix5.2.*) -+ AC_MSG_RESULT([ok (${host_os})]) -+ VGCONF_OS="aix5" -+ ;; -+ aix5.3.*) -+ AC_MSG_RESULT([ok (${host_os})]) -+ VGCONF_OS="aix5" -+ ;; -+ -+ *darwin*) -+ AC_MSG_RESULT([ok (${host_os})]) -+ VGCONF_OS="darwin" -+ AC_DEFINE([DARWIN_10_5], 100500, [DARWIN_VERS value for Mac OS X 10.5]) -+ AC_DEFINE([DARWIN_10_6], 100600, [DARWIN_VERS value for Mac OS X 10.6]) -+ AC_DEFINE([DARWIN_10_7], 100700, [DARWIN_VERS value for Mac OS X 10.7]) -+ -+ AC_MSG_CHECKING([for the kernel version]) -+ kernel=`uname -r` -+ -+ # Nb: for Darwin we set DEFAULT_SUPP here. That's because Darwin -+ # has only one relevant version, the OS version. The `uname` check -+ # is a good way to get that version (i.e. "Darwin 9.6.0" is Mac OS -+ # X 10.5.6, and "Darwin 10.x" is Mac OS X 10.6.x Snow Leopard), -+ # and we don't know of an macros similar to __GLIBC__ to get that info. -+ # -+ # XXX: `uname -r` won't do the right thing for cross-compiles, but -+ # that's not a problem yet. -+ case "${kernel}" in -+ 9.*) -+ AC_MSG_RESULT([Darwin 9.x (${kernel}) / Mac OS X 10.5 Leopard]) -+ AC_DEFINE([DARWIN_VERS], DARWIN_10_5, [Darwin / Mac OS X version]) -+ DEFAULT_SUPP="darwin9.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="darwin9-drd.supp ${DEFAULT_SUPP}" -+ ;; -+ 10.*) -+ AC_MSG_RESULT([Darwin 10.x (${kernel}) / Mac OS X 10.6 Snow Leopard]) -+ AC_DEFINE([DARWIN_VERS], DARWIN_10_6, [Darwin / Mac OS X version]) -+ DEFAULT_SUPP="darwin10.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="darwin10-drd.supp ${DEFAULT_SUPP}" -+ ;; -+ *) -+ AC_MSG_RESULT([unsupported (${kernel})]) -+ AC_MSG_ERROR([Valgrind works on Darwin 9.x and 10.x (Mac OS X 10.5 and 10.6)]) -+ ;; -+ esac -+ ;; -+ -+ *) -+ AC_MSG_RESULT([no (${host_os})]) -+ AC_MSG_ERROR([Valgrind is operating system specific. Sorry.]) -+ ;; -+esac -+ -+#---------------------------------------------------------------------------- -+ -+# If we are building on a 64 bit platform test to see if the system -+# supports building 32 bit programs and disable 32 bit support if it -+# does not support building 32 bit programs -+ -+case "$ARCH_MAX-$VGCONF_OS" in -+ amd64-linux|ppc64-linux) -+ AC_MSG_CHECKING([for 32 bit build support]) -+ safe_CFLAGS=$CFLAGS -+ CFLAGS="-m32" -+ AC_TRY_LINK(, [ -+ return 0; -+ ], -+ [ -+ AC_MSG_RESULT([yes]) -+ ], [ -+ vg_cv_only64bit="yes" -+ AC_MSG_RESULT([no]) -+ ]) -+ CFLAGS=$safe_CFLAGS;; -+esac -+ -+if test x$vg_cv_only64bit = xyes -a x$vg_cv_only32bit = xyes; then -+ AC_MSG_ERROR( -+ [--enable-only32bit was specified but system does not support 32 bit builds]) -+fi -+ -+#---------------------------------------------------------------------------- -+ -+# VGCONF_ARCH_PRI is the arch for the primary build target, eg. "amd64". By -+# default it's the same as ARCH_MAX. But if, say, we do a build on an amd64 -+# machine, but --enable-only32bit has been requested, then ARCH_MAX (see -+# above) will be "amd64" since that reflects the most that this cpu can do, -+# but VGCONF_ARCH_PRI will be downgraded to "x86", since that reflects the -+# arch corresponding to the primary build (VGCONF_PLATFORM_PRI_CAPS). It is -+# passed in to compilation of many C files via -VGA_$(VGCONF_ARCH_PRI) and -+# -VGP_$(VGCONF_ARCH_PRI)_$(VGCONF_OS). -+AC_SUBST(VGCONF_ARCH_PRI) -+ -+# VGCONF_ARCH_SEC is the arch for the secondary build target, eg. "x86". -+# It is passed in to compilation of many C files via -VGA_$(VGCONF_ARCH_SEC) -+# and -VGP_$(VGCONF_ARCH_SEC)_$(VGCONF_OS), if there is a secondary target. -+# It is empty if there is no secondary target. -+AC_SUBST(VGCONF_ARCH_SEC) -+ -+# VGCONF_PLATFORM_PRI_CAPS is the primary build target, eg. "AMD64_LINUX". -+# The entire system, including regression and performance tests, will be -+# built for this target. The "_CAPS" indicates that the name is in capital -+# letters, and it also uses '_' rather than '-' as a separator, because it's -+# used to create various Makefile variables, which are all in caps by -+# convention and cannot contain '-' characters. This is in contrast to -+# VGCONF_ARCH_PRI and VGCONF_OS which are not in caps. -+AC_SUBST(VGCONF_PLATFORM_PRI_CAPS) -+ -+# VGCONF_PLATFORM_SEC_CAPS is the secondary build target, if there is one. -+# Valgrind and tools will also be built for this target, but not the -+# regression or performance tests. -+# -+# By default, the primary arch is the same as the "max" arch, as commented -+# above (at the definition of ARCH_MAX). We may choose to downgrade it in -+# the big case statement just below here, in the case where we're building -+# on a 64 bit machine but have been requested only to do a 32 bit build. -+AC_SUBST(VGCONF_PLATFORM_SEC_CAPS) -+ -+AC_MSG_CHECKING([for a supported CPU/OS combination]) -+ -+# NB. The load address for a given platform may be specified in more -+# than one place, in some cases, depending on whether we're doing a biarch, -+# 32-bit only or 64-bit only build. eg see case for amd64-linux below. -+# Be careful to give consistent values in all subcases. Also, all four -+# valt_load_addres_{pri,sec}_{norml,inner} values must always be set, -+# even if it is to "0xUNSET". -+# -+case "$ARCH_MAX-$VGCONF_OS" in -+ x86-linux) -+ VGCONF_ARCH_PRI="x86" -+ VGCONF_ARCH_SEC="" -+ VGCONF_PLATFORM_PRI_CAPS="X86_LINUX" -+ VGCONF_PLATFORM_SEC_CAPS="" -+ valt_load_address_pri_norml="0x38000000" -+ valt_load_address_pri_inner="0x28000000" -+ valt_load_address_sec_norml="0xUNSET" -+ valt_load_address_sec_inner="0xUNSET" -+ AC_MSG_RESULT([ok (${ARCH_MAX}-${VGCONF_OS})]) -+ ;; -+ amd64-linux) -+ valt_load_address_sec_norml="0xUNSET" -+ valt_load_address_sec_inner="0xUNSET" -+ if test x$vg_cv_only64bit = xyes; then -+ VGCONF_ARCH_PRI="amd64" -+ VGCONF_ARCH_SEC="" -+ VGCONF_PLATFORM_PRI_CAPS="AMD64_LINUX" -+ VGCONF_PLATFORM_SEC_CAPS="" -+ valt_load_address_pri_norml="0x38000000" -+ valt_load_address_pri_inner="0x28000000" -+ elif test x$vg_cv_only32bit = xyes; then -+ VGCONF_ARCH_PRI="x86" -+ VGCONF_ARCH_SEC="" -+ VGCONF_PLATFORM_PRI_CAPS="X86_LINUX" -+ VGCONF_PLATFORM_SEC_CAPS="" -+ valt_load_address_pri_norml="0x38000000" -+ valt_load_address_pri_inner="0x28000000" -+ else -+ VGCONF_ARCH_PRI="amd64" -+ VGCONF_ARCH_SEC="x86" -+ VGCONF_PLATFORM_PRI_CAPS="AMD64_LINUX" -+ VGCONF_PLATFORM_SEC_CAPS="X86_LINUX" -+ valt_load_address_pri_norml="0x38000000" -+ valt_load_address_pri_inner="0x28000000" -+ valt_load_address_sec_norml="0x38000000" -+ valt_load_address_sec_inner="0x28000000" -+ fi -+ AC_MSG_RESULT([ok (${ARCH_MAX}-${VGCONF_OS})]) -+ ;; -+ ppc32-linux) -+ VGCONF_ARCH_PRI="ppc32" -+ VGCONF_ARCH_SEC="" -+ VGCONF_PLATFORM_PRI_CAPS="PPC32_LINUX" -+ VGCONF_PLATFORM_SEC_CAPS="" -+ valt_load_address_pri_norml="0x38000000" -+ valt_load_address_pri_inner="0x28000000" -+ valt_load_address_sec_norml="0xUNSET" -+ valt_load_address_sec_inner="0xUNSET" -+ AC_MSG_RESULT([ok (${ARCH_MAX}-${VGCONF_OS})]) -+ ;; -+ ppc64-aix5) -+ valt_load_address_pri_norml="0xUNSET" -+ valt_load_address_pri_inner="0xUNSET" -+ valt_load_address_sec_norml="0xUNSET" -+ valt_load_address_sec_inner="0xUNSET" -+ if test x$vg_cv_only64bit = xyes; then -+ VGCONF_ARCH_PRI="ppc64" -+ VGCONF_ARCH_SEC="" -+ VGCONF_PLATFORM_PRI_CAPS="PPC64_AIX5" -+ VGCONF_PLATFORM_SEC_CAPS="" -+ elif test x$vg_cv_only32bit = xyes; then -+ VGCONF_ARCH_PRI="ppc32" -+ VGCONF_ARCH_SEC="" -+ VGCONF_PLATFORM_PRI_CAPS="PPC32_AIX5" -+ VGCONF_PLATFORM_SEC_CAPS="" -+ else -+ VGCONF_ARCH_PRI="ppc64" -+ VGCONF_ARCH_SEC="ppc32" -+ VGCONF_PLATFORM_PRI_CAPS="PPC64_AIX5" -+ VGCONF_PLATFORM_SEC_CAPS="PPC32_AIX5" -+ fi -+ AC_MSG_RESULT([ok (${ARCH_MAX}-${VGCONF_OS})]) -+ ;; -+ ppc64-linux) -+ valt_load_address_sec_norml="0xUNSET" -+ valt_load_address_sec_inner="0xUNSET" -+ if test x$vg_cv_only64bit = xyes; then -+ VGCONF_ARCH_PRI="ppc64" -+ VGCONF_ARCH_SEC="" -+ VGCONF_PLATFORM_PRI_CAPS="PPC64_LINUX" -+ VGCONF_PLATFORM_SEC_CAPS="" -+ valt_load_address_pri_norml="0x38000000" -+ valt_load_address_pri_inner="0x28000000" -+ elif test x$vg_cv_only32bit = xyes; then -+ VGCONF_ARCH_PRI="ppc32" -+ VGCONF_ARCH_SEC="" -+ VGCONF_PLATFORM_PRI_CAPS="PPC32_LINUX" -+ VGCONF_PLATFORM_SEC_CAPS="" -+ valt_load_address_pri_norml="0x38000000" -+ valt_load_address_pri_inner="0x28000000" -+ else -+ VGCONF_ARCH_PRI="ppc64" -+ VGCONF_ARCH_SEC="ppc32" -+ VGCONF_PLATFORM_PRI_CAPS="PPC64_LINUX" -+ VGCONF_PLATFORM_SEC_CAPS="PPC32_LINUX" -+ valt_load_address_pri_norml="0x38000000" -+ valt_load_address_pri_inner="0x28000000" -+ valt_load_address_sec_norml="0x38000000" -+ valt_load_address_sec_inner="0x28000000" -+ fi -+ AC_MSG_RESULT([ok (${ARCH_MAX}-${VGCONF_OS})]) -+ ;; -+ # Darwin gets identified as 32-bit even when it supports 64-bit. -+ # (Not sure why, possibly because 'uname' returns "i386"?) Just about -+ # all Macs support both 32-bit and 64-bit, so we just build both. If -+ # someone has a really old 32-bit only machine they can (hopefully?) -+ # build with --enable-only32bit. See bug 243362. -+ x86-darwin|amd64-darwin) -+ ARCH_MAX="amd64" -+ valt_load_address_sec_norml="0xUNSET" -+ valt_load_address_sec_inner="0xUNSET" -+ if test x$vg_cv_only64bit = xyes; then -+ VGCONF_ARCH_PRI="amd64" -+ VGCONF_ARCH_SEC="" -+ VGCONF_PLATFORM_PRI_CAPS="AMD64_DARWIN" -+ VGCONF_PLATFORM_SEC_CAPS="" -+ valt_load_address_pri_norml="0x138000000" -+ valt_load_address_pri_inner="0x128000000" -+ elif test x$vg_cv_only32bit = xyes; then -+ VGCONF_ARCH_PRI="x86" -+ VGCONF_ARCH_SEC="" -+ VGCONF_PLATFORM_PRI_CAPS="X86_DARWIN" -+ VGCONF_PLATFORM_SEC_CAPS="" -+ VGCONF_ARCH_PRI_CAPS="x86" -+ valt_load_address_pri_norml="0x38000000" -+ valt_load_address_pri_inner="0x28000000" -+ else -+ VGCONF_ARCH_PRI="amd64" -+ VGCONF_ARCH_SEC="x86" -+ VGCONF_PLATFORM_PRI_CAPS="AMD64_DARWIN" -+ VGCONF_PLATFORM_SEC_CAPS="X86_DARWIN" -+ valt_load_address_pri_norml="0x138000000" -+ valt_load_address_pri_inner="0x128000000" -+ valt_load_address_sec_norml="0x38000000" -+ valt_load_address_sec_inner="0x28000000" -+ fi -+ AC_MSG_RESULT([ok (${ARCH_MAX}-${VGCONF_OS})]) -+ ;; -+ arm-linux) -+ VGCONF_ARCH_PRI="arm" -+ VGCONF_PLATFORM_PRI_CAPS="ARM_LINUX" -+ VGCONF_PLATFORM_SEC_CAPS="" -+ valt_load_address_pri_norml="0x38000000" -+ valt_load_address_pri_inner="0x28000000" -+ valt_load_address_sec_norml="0xUNSET" -+ valt_load_address_sec_inner="0xUNSET" -+ AC_MSG_RESULT([ok (${host_cpu}-${host_os})]) -+ ;; -+ *) -+ VGCONF_ARCH_PRI="unknown" -+ VGCONF_ARCH_SEC="unknown" -+ VGCONF_PLATFORM_PRI_CAPS="UNKNOWN" -+ VGCONF_PLATFORM_SEC_CAPS="UNKNOWN" -+ valt_load_address_pri_norml="0xUNSET" -+ valt_load_address_pri_inner="0xUNSET" -+ valt_load_address_sec_norml="0xUNSET" -+ valt_load_address_sec_inner="0xUNSET" -+ AC_MSG_RESULT([no (${ARCH_MAX}-${VGCONF_OS})]) -+ AC_MSG_ERROR([Valgrind is platform specific. Sorry. Please consider doing a port.]) -+ ;; -+esac -+ -+#---------------------------------------------------------------------------- -+ -+# Set up VGCONF_ARCHS_INCLUDE_. Either one or two of these become -+# defined. -+AM_CONDITIONAL(VGCONF_ARCHS_INCLUDE_X86, -+ test x$VGCONF_PLATFORM_PRI_CAPS = xX86_LINUX \ -+ -o x$VGCONF_PLATFORM_SEC_CAPS = xX86_LINUX \ -+ -o x$VGCONF_PLATFORM_PRI_CAPS = xX86_DARWIN \ -+ -o x$VGCONF_PLATFORM_SEC_CAPS = xX86_DARWIN ) -+AM_CONDITIONAL(VGCONF_ARCHS_INCLUDE_AMD64, -+ test x$VGCONF_PLATFORM_PRI_CAPS = xAMD64_LINUX \ -+ -o x$VGCONF_PLATFORM_PRI_CAPS = xAMD64_DARWIN ) -+AM_CONDITIONAL(VGCONF_ARCHS_INCLUDE_PPC32, -+ test x$VGCONF_PLATFORM_PRI_CAPS = xPPC32_LINUX \ -+ -o x$VGCONF_PLATFORM_SEC_CAPS = xPPC32_LINUX \ -+ -o x$VGCONF_PLATFORM_PRI_CAPS = xPPC32_AIX5 \ -+ -o x$VGCONF_PLATFORM_SEC_CAPS = xPPC32_AIX5 ) -+AM_CONDITIONAL(VGCONF_ARCHS_INCLUDE_PPC64, -+ test x$VGCONF_PLATFORM_PRI_CAPS = xPPC64_LINUX \ -+ -o x$VGCONF_PLATFORM_PRI_CAPS = xPPC64_AIX5 ) -+AM_CONDITIONAL(VGCONF_ARCHS_INCLUDE_ARM, -+ test x$VGCONF_PLATFORM_PRI_CAPS = xARM_LINUX ) -+ -+# Set up VGCONF_PLATFORMS_INCLUDE_. Either one or two of these -+# become defined. -+AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_X86_LINUX, -+ test x$VGCONF_PLATFORM_PRI_CAPS = xX86_LINUX \ -+ -o x$VGCONF_PLATFORM_SEC_CAPS = xX86_LINUX) -+AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_AMD64_LINUX, -+ test x$VGCONF_PLATFORM_PRI_CAPS = xAMD64_LINUX) -+AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_PPC32_LINUX, -+ test x$VGCONF_PLATFORM_PRI_CAPS = xPPC32_LINUX \ -+ -o x$VGCONF_PLATFORM_SEC_CAPS = xPPC32_LINUX) -+AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_PPC64_LINUX, -+ test x$VGCONF_PLATFORM_PRI_CAPS = xPPC64_LINUX) -+AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_ARM_LINUX, -+ test x$VGCONF_PLATFORM_PRI_CAPS = xARM_LINUX) -+ -+AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_PPC32_AIX5, -+ test x$VGCONF_PLATFORM_PRI_CAPS = xPPC32_AIX5 \ -+ -o x$VGCONF_PLATFORM_SEC_CAPS = xPPC32_AIX5) -+AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_PPC64_AIX5, -+ test x$VGCONF_PLATFORM_PRI_CAPS = xPPC64_AIX5) -+ -+AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_X86_DARWIN, -+ test x$VGCONF_PLATFORM_PRI_CAPS = xX86_DARWIN \ -+ -o x$VGCONF_PLATFORM_SEC_CAPS = xX86_DARWIN) -+AM_CONDITIONAL(VGCONF_PLATFORMS_INCLUDE_AMD64_DARWIN, -+ test x$VGCONF_PLATFORM_PRI_CAPS = xAMD64_DARWIN) -+ -+ -+# Similarly, set up VGCONF_OS_IS_. Exactly one of these becomes defined. -+# Relies on the assumption that the primary and secondary targets are -+# for the same OS, so therefore only necessary to test the primary. -+AM_CONDITIONAL(VGCONF_OS_IS_LINUX, -+ test x$VGCONF_PLATFORM_PRI_CAPS = xX86_LINUX \ -+ -o x$VGCONF_PLATFORM_PRI_CAPS = xAMD64_LINUX \ -+ -o x$VGCONF_PLATFORM_PRI_CAPS = xPPC32_LINUX \ -+ -o x$VGCONF_PLATFORM_PRI_CAPS = xPPC64_LINUX \ -+ -o x$VGCONF_PLATFORM_PRI_CAPS = xARM_LINUX ) -+AM_CONDITIONAL(VGCONF_OS_IS_AIX5, -+ test x$VGCONF_PLATFORM_PRI_CAPS = xPPC32_AIX5 \ -+ -o x$VGCONF_PLATFORM_PRI_CAPS = xPPC64_AIX5) -+AM_CONDITIONAL(VGCONF_OS_IS_DARWIN, -+ test x$VGCONF_PLATFORM_PRI_CAPS = xX86_DARWIN \ -+ -o x$VGCONF_PLATFORM_PRI_CAPS = xAMD64_DARWIN) -+ -+ -+# Sometimes, in the Makefile.am files, it's useful to know whether or not -+# there is a secondary target. -+AM_CONDITIONAL(VGCONF_HAVE_PLATFORM_SEC, -+ test x$VGCONF_PLATFORM_SEC_CAPS != x) -+ -+ -+#---------------------------------------------------------------------------- -+# Inner Valgrind? -+#---------------------------------------------------------------------------- -+ -+# Check if this should be built as an inner Valgrind, to be run within -+# another Valgrind. Choose the load address accordingly. -+AC_SUBST(VALT_LOAD_ADDRESS_PRI) -+AC_SUBST(VALT_LOAD_ADDRESS_SEC) -+AC_CACHE_CHECK([for use as an inner Valgrind], vg_cv_inner, -+ [AC_ARG_ENABLE(inner, -+ [ --enable-inner enables self-hosting], -+ [vg_cv_inner=$enableval], -+ [vg_cv_inner=no])]) -+if test "$vg_cv_inner" = yes; then -+ AC_DEFINE([ENABLE_INNER], 1, [configured to run as an inner Valgrind]) -+ VALT_LOAD_ADDRESS_PRI=$valt_load_address_pri_inner -+ VALT_LOAD_ADDRESS_SEC=$valt_load_address_sec_inner -+else -+ VALT_LOAD_ADDRESS_PRI=$valt_load_address_pri_norml -+ VALT_LOAD_ADDRESS_SEC=$valt_load_address_sec_norml -+fi -+ -+ -+#---------------------------------------------------------------------------- -+# Libc and suppressions -+#---------------------------------------------------------------------------- -+# This variable will collect the suppression files to be used. -+AC_SUBST(DEFAULT_SUPP) -+ -+AC_CHECK_HEADER([features.h]) -+ -+if test x$ac_cv_header_features_h = xyes; then -+ rm -f conftest.$ac_ext -+ cat <<_ACEOF >conftest.$ac_ext -+#include -+#if defined(__GNU_LIBRARY__) && defined(__GLIBC__) && defined(__GLIBC_MINOR__) -+glibc version is: __GLIBC__ __GLIBC_MINOR__ -+#endif -+_ACEOF -+ GLIBC_VERSION="`$CPP conftest.$ac_ext | $SED -n 's/^glibc version is: //p' | $SED 's/ /./g'`" -+fi -+ -+AC_EGREP_CPP([AIX5_LIBC], [ -+#include -+#if defined(_AIXVERSION_510) || defined(_AIXVERSION_520) || defined(_AIXVERSION_530) -+ AIX5_LIBC -+#endif -+], -+GLIBC_VERSION="aix5") -+ -+# not really a version check -+AC_EGREP_CPP([DARWIN_LIBC], [ -+#include -+#if defined(__DARWIN_VERS_1050) -+ DARWIN_LIBC -+#endif -+], -+GLIBC_VERSION="darwin") -+ -+AC_MSG_CHECKING([the GLIBC_VERSION version]) -+ -+case "${GLIBC_VERSION}" in -+ 2.2) -+ AC_MSG_RESULT(2.2 family) -+ AC_DEFINE([GLIBC_2_2], 1, [Define to 1 if you're using glibc 2.2.x]) -+ DEFAULT_SUPP="glibc-2.2.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="glibc-2.2-LinuxThreads-helgrind.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="glibc-2.X-drd.supp ${DEFAULT_SUPP}" -+ ;; -+ -+ 2.3) -+ AC_MSG_RESULT(2.3 family) -+ AC_DEFINE([GLIBC_2_3], 1, [Define to 1 if you're using glibc 2.3.x]) -+ DEFAULT_SUPP="glibc-2.3.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="glibc-2.34567-NPTL-helgrind.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="glibc-2.X-drd.supp ${DEFAULT_SUPP}" -+ ;; -+ -+ 2.4) -+ AC_MSG_RESULT(2.4 family) -+ AC_DEFINE([GLIBC_2_4], 1, [Define to 1 if you're using glibc 2.4.x]) -+ DEFAULT_SUPP="glibc-2.4.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="glibc-2.34567-NPTL-helgrind.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="glibc-2.X-drd.supp ${DEFAULT_SUPP}" -+ ;; -+ -+ 2.5) -+ AC_MSG_RESULT(2.5 family) -+ AC_DEFINE([GLIBC_2_5], 1, [Define to 1 if you're using glibc 2.5.x]) -+ DEFAULT_SUPP="glibc-2.5.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="glibc-2.34567-NPTL-helgrind.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="glibc-2.X-drd.supp ${DEFAULT_SUPP}" -+ ;; -+ 2.6) -+ AC_MSG_RESULT(2.6 family) -+ AC_DEFINE([GLIBC_2_6], 1, [Define to 1 if you're using glibc 2.6.x]) -+ DEFAULT_SUPP="glibc-2.6.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="glibc-2.34567-NPTL-helgrind.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="glibc-2.X-drd.supp ${DEFAULT_SUPP}" -+ ;; -+ 2.7) -+ AC_MSG_RESULT(2.7 family) -+ AC_DEFINE([GLIBC_2_7], 1, [Define to 1 if you're using glibc 2.7.x]) -+ DEFAULT_SUPP="glibc-2.X.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="glibc-2.34567-NPTL-helgrind.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="glibc-2.X-drd.supp ${DEFAULT_SUPP}" -+ ;; -+ 2.8) -+ AC_MSG_RESULT(2.8 family) -+ AC_DEFINE([GLIBC_2_8], 1, [Define to 1 if you're using glibc 2.8.x]) -+ DEFAULT_SUPP="glibc-2.X.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="glibc-2.34567-NPTL-helgrind.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="glibc-2.X-drd.supp ${DEFAULT_SUPP}" -+ ;; -+ 2.9) -+ AC_MSG_RESULT(2.9 family) -+ AC_DEFINE([GLIBC_2_9], 1, [Define to 1 if you're using glibc 2.9.x]) -+ DEFAULT_SUPP="glibc-2.X.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="glibc-2.34567-NPTL-helgrind.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="glibc-2.X-drd.supp ${DEFAULT_SUPP}" -+ ;; -+ 2.10) -+ AC_MSG_RESULT(2.10 family) -+ AC_DEFINE([GLIBC_2_10], 1, [Define to 1 if you're using glibc 2.10.x]) -+ DEFAULT_SUPP="glibc-2.X.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="glibc-2.34567-NPTL-helgrind.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="glibc-2.X-drd.supp ${DEFAULT_SUPP}" -+ ;; -+ 2.11) -+ AC_MSG_RESULT(2.11 family) -+ AC_DEFINE([GLIBC_2_11], 1, [Define to 1 if you're using glibc 2.11.x]) -+ DEFAULT_SUPP="glibc-2.X.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="glibc-2.34567-NPTL-helgrind.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="glibc-2.X-drd.supp ${DEFAULT_SUPP}" -+ ;; -+ 2.12) -+ AC_MSG_RESULT(2.12 family) -+ AC_DEFINE([GLIBC_2_12], 1, [Define to 1 if you're using glibc 2.12.x]) -+ DEFAULT_SUPP="glibc-2.X.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="glibc-2.34567-NPTL-helgrind.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="glibc-2.X-drd.supp ${DEFAULT_SUPP}" -+ ;; -+ 2.13) -+ AC_MSG_RESULT(2.13 family) -+ AC_DEFINE([GLIBC_2_13], 1, [Define to 1 if you're using glibc 2.13.x]) -+ DEFAULT_SUPP="glibc-2.X.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="glibc-2.34567-NPTL-helgrind.supp ${DEFAULT_SUPP}" -+ DEFAULT_SUPP="glibc-2.X-drd.supp ${DEFAULT_SUPP}" -+ ;; -+ aix5) -+ AC_MSG_RESULT(AIX 5.1 or 5.2 or 5.3) -+ AC_DEFINE([AIX5_LIBC], 1, [Define to 1 if you're using AIX 5.1 or 5.2 or 5.3]) -+ DEFAULT_SUPP="aix5libc.supp ${DEFAULT_SUPP}" -+ ;; -+ darwin) -+ AC_MSG_RESULT(Darwin) -+ AC_DEFINE([DARWIN_LIBC], 1, [Define to 1 if you're using Darwin]) -+ # DEFAULT_SUPP set by kernel version check above. -+ ;; -+ -+ *) -+ AC_MSG_RESULT([unsupported version ${GLIBC_VERSION}]) -+ AC_MSG_ERROR([Valgrind requires glibc version 2.2 - 2.13]) -+ AC_MSG_ERROR([or AIX 5.1 or 5.2 or 5.3 GLIBC_VERSION]) -+ AC_MSG_ERROR([or Darwin libc]) -+ ;; -+esac -+ -+AC_SUBST(GLIBC_VERSION) -+ -+ -+# Add default suppressions for the X client libraries. Make no -+# attempt to detect whether such libraries are installed on the -+# build machine (or even if any X facilities are present); just -+# add the suppressions antidisirregardless. -+DEFAULT_SUPP="xfree-4.supp ${DEFAULT_SUPP}" -+DEFAULT_SUPP="xfree-3.supp ${DEFAULT_SUPP}" -+ -+# Add glibc and X11 suppressions for exp-ptrcheck -+DEFAULT_SUPP="exp-ptrcheck.supp ${DEFAULT_SUPP}" -+ -+ -+#---------------------------------------------------------------------------- -+# Checking for various library functions and other definitions -+#---------------------------------------------------------------------------- -+ -+# Check for CLOCK_MONOTONIC -+ -+AC_MSG_CHECKING([for CLOCK_MONOTONIC]) -+ -+AC_TRY_COMPILE( -+[ -+#include -+], [ -+ struct timespec t; -+ clock_gettime(CLOCK_MONOTONIC, &t); -+ return 0; -+], -+[ -+AC_MSG_RESULT([yes]) -+AC_DEFINE([HAVE_CLOCK_MONOTONIC], 1, -+ [Define to 1 if you have the `CLOCK_MONOTONIC' constant.]) -+], [ -+AC_MSG_RESULT([no]) -+]) -+ -+ -+# Check for PTHREAD_MUTEX_ADAPTIVE_NP -+ -+AC_MSG_CHECKING([for PTHREAD_MUTEX_ADAPTIVE_NP]) -+ -+AC_TRY_COMPILE( -+[ -+#define _GNU_SOURCE -+#include -+], [ -+ return (PTHREAD_MUTEX_ADAPTIVE_NP); -+], -+[ -+AC_MSG_RESULT([yes]) -+AC_DEFINE([HAVE_PTHREAD_MUTEX_ADAPTIVE_NP], 1, -+ [Define to 1 if you have the `PTHREAD_MUTEX_ADAPTIVE_NP' constant.]) -+], [ -+AC_MSG_RESULT([no]) -+]) -+ -+ -+# Check for PTHREAD_MUTEX_ERRORCHECK_NP -+ -+AC_MSG_CHECKING([for PTHREAD_MUTEX_ERRORCHECK_NP]) -+ -+AC_TRY_COMPILE( -+[ -+#define _GNU_SOURCE -+#include -+], [ -+ return (PTHREAD_MUTEX_ERRORCHECK_NP); -+], -+[ -+AC_MSG_RESULT([yes]) -+AC_DEFINE([HAVE_PTHREAD_MUTEX_ERRORCHECK_NP], 1, -+ [Define to 1 if you have the `PTHREAD_MUTEX_ERRORCHECK_NP' constant.]) -+], [ -+AC_MSG_RESULT([no]) -+]) -+ -+ -+# Check for PTHREAD_MUTEX_RECURSIVE_NP -+ -+AC_MSG_CHECKING([for PTHREAD_MUTEX_RECURSIVE_NP]) -+ -+AC_TRY_COMPILE( -+[ -+#define _GNU_SOURCE -+#include -+], [ -+ return (PTHREAD_MUTEX_RECURSIVE_NP); -+], -+[ -+AC_MSG_RESULT([yes]) -+AC_DEFINE([HAVE_PTHREAD_MUTEX_RECURSIVE_NP], 1, -+ [Define to 1 if you have the `PTHREAD_MUTEX_RECURSIVE_NP' constant.]) -+], [ -+AC_MSG_RESULT([no]) -+]) -+ -+ -+# Check for PTHREAD_RECURSIVE_MUTEX_INITIALIZER_NP -+ -+AC_MSG_CHECKING([for PTHREAD_RECURSIVE_MUTEX_INITIALIZER_NP]) -+ -+AC_TRY_COMPILE( -+[ -+#define _GNU_SOURCE -+#include -+], [ -+ pthread_mutex_t m = PTHREAD_RECURSIVE_MUTEX_INITIALIZER_NP; -+ return 0; -+], -+[ -+AC_MSG_RESULT([yes]) -+AC_DEFINE([HAVE_PTHREAD_RECURSIVE_MUTEX_INITIALIZER_NP], 1, -+ [Define to 1 if you have the `PTHREAD_RECURSIVE_MUTEX_INITIALIZER_NP' constant.]) -+], [ -+AC_MSG_RESULT([no]) -+]) -+ -+ -+# Check whether pthread_mutex_t has a member called __m_kind. -+ -+AC_CHECK_MEMBER([pthread_mutex_t.__m_kind], -+ [AC_DEFINE([HAVE_PTHREAD_MUTEX_T__M_KIND], -+ 1, -+ [Define to 1 if pthread_mutex_t has a member called __m_kind.]) -+ ], -+ [], -+ [#include ]) -+ -+ -+# Check whether pthread_mutex_t has a member called __data.__kind. -+ -+AC_CHECK_MEMBER([pthread_mutex_t.__data.__kind], -+ [AC_DEFINE([HAVE_PTHREAD_MUTEX_T__DATA__KIND], -+ 1, -+ [Define to 1 if pthread_mutex_t has a member __data.__kind.]) -+ ], -+ [], -+ [#include ]) -+ -+ -+# does this compiler support -maltivec and does it have the include file -+# ? -+ -+AC_MSG_CHECKING([for Altivec]) -+ -+safe_CFLAGS=$CFLAGS -+CFLAGS="-maltivec" -+ -+AC_TRY_COMPILE( -+[ -+#include -+], [ -+ vector unsigned int v; -+], -+[ -+ac_have_altivec=yes -+AC_MSG_RESULT([yes]) -+AC_DEFINE([HAS_ALTIVEC], 1, -+ [Define to 1 if gcc/as can do Altivec.]) -+], [ -+ac_have_altivec=no -+AC_MSG_RESULT([no]) -+]) -+CFLAGS=$safe_CFLAGS -+ -+AM_CONDITIONAL([HAS_ALTIVEC], [test x$ac_have_altivec = xyes]) -+ -+ -+# Check for pthread_create@GLIBC2.0 -+AC_MSG_CHECKING([for pthread_create@GLIBC2.0()]) -+ -+safe_CFLAGS=$CFLAGS -+CFLAGS="-lpthread" -+AC_TRY_LINK( -+[ -+extern int pthread_create_glibc_2_0(void*, const void*, -+ void *(*)(void*), void*); -+__asm__(".symver pthread_create_glibc_2_0, pthread_create@GLIBC_2.0"); -+], [ -+#ifdef __powerpc__ -+/* -+ * Apparently on PowerPC linking this program succeeds and generates an -+ * executable with the undefined symbol pthread_create@GLIBC_2.0. -+ */ -+#error This test does not work properly on PowerPC. -+#else -+ pthread_create_glibc_2_0(0, 0, 0, 0); -+#endif -+ return 0; -+], -+[ -+ac_have_pthread_create_glibc_2_0=yes -+AC_MSG_RESULT([yes]) -+AC_DEFINE([HAVE_PTHREAD_CREATE_GLIBC_2_0], 1, -+ [Define to 1 if you have the `pthread_create@glibc2.0' function.]) -+], [ -+ac_have_pthread_create_glibc_2_0=no -+AC_MSG_RESULT([no]) -+]) -+CFLAGS=$safe_CFLAGS -+ -+AM_CONDITIONAL(HAVE_PTHREAD_CREATE_GLIBC_2_0, -+ test x$ac_have_pthread_create_glibc_2_0 = xyes) -+ -+ -+# Check for eventfd_t, eventfd() and eventfd_read() -+AC_MSG_CHECKING([for eventfd()]) -+ -+AC_TRY_LINK( -+[ -+#include -+], [ -+ eventfd_t ev; -+ int fd; -+ -+ fd = eventfd(5, 0); -+ eventfd_read(fd, &ev); -+ return 0; -+], -+[ -+AC_MSG_RESULT([yes]) -+AC_DEFINE([HAVE_EVENTFD], 1, -+ [Define to 1 if you have the `eventfd' function.]) -+AC_DEFINE([HAVE_EVENTFD_READ], 1, -+ [Define to 1 if you have the `eventfd_read' function.]) -+], [ -+AC_MSG_RESULT([no]) -+]) -+ -+ -+#---------------------------------------------------------------------------- -+# Checking for supported compiler flags. -+#---------------------------------------------------------------------------- -+ -+# does this compiler support -m32 ? -+AC_MSG_CHECKING([if gcc accepts -m32]) -+ -+safe_CFLAGS=$CFLAGS -+CFLAGS="-m32" -+ -+AC_TRY_COMPILE(, [ -+ return 0; -+], -+[ -+FLAG_M32="-m32" -+AC_MSG_RESULT([yes]) -+], [ -+FLAG_M32="" -+AC_MSG_RESULT([no]) -+]) -+CFLAGS=$safe_CFLAGS -+ -+AC_SUBST(FLAG_M32) -+ -+ -+# does this compiler support -maix32 ? -+AC_MSG_CHECKING([if gcc accepts -maix32]) -+ -+safe_CFLAGS=$CFLAGS -+CFLAGS="-maix32" -+ -+AC_TRY_COMPILE(, [ -+ return 0; -+], -+[ -+FLAG_MAIX32="-maix32" -+AC_MSG_RESULT([yes]) -+], [ -+FLAG_MAIX32="" -+AC_MSG_RESULT([no]) -+]) -+CFLAGS=$safe_CFLAGS -+ -+AC_SUBST(FLAG_MAIX32) -+ -+ -+# does this compiler support -m64 ? -+AC_MSG_CHECKING([if gcc accepts -m64]) -+ -+safe_CFLAGS=$CFLAGS -+CFLAGS="-m64" -+ -+AC_TRY_COMPILE(, [ -+ return 0; -+], -+[ -+FLAG_M64="-m64" -+AC_MSG_RESULT([yes]) -+], [ -+FLAG_M64="" -+AC_MSG_RESULT([no]) -+]) -+CFLAGS=$safe_CFLAGS -+ -+AC_SUBST(FLAG_M64) -+ -+ -+# does this compiler support -maix64 ? -+AC_MSG_CHECKING([if gcc accepts -maix64]) -+ -+safe_CFLAGS=$CFLAGS -+CFLAGS="-maix64" -+ -+AC_TRY_COMPILE(, [ -+ return 0; -+], -+[ -+FLAG_MAIX64="-maix64" -+AC_MSG_RESULT([yes]) -+], [ -+FLAG_MAIX64="" -+AC_MSG_RESULT([no]) -+]) -+CFLAGS=$safe_CFLAGS -+ -+AC_SUBST(FLAG_MAIX64) -+ -+ -+# does this compiler support -mmmx ? -+AC_MSG_CHECKING([if gcc accepts -mmmx]) -+ -+safe_CFLAGS=$CFLAGS -+CFLAGS="-mmmx" -+ -+AC_TRY_COMPILE(, [ -+ return 0; -+], -+[ -+FLAG_MMMX="-mmmx" -+AC_MSG_RESULT([yes]) -+], [ -+FLAG_MMMX="" -+AC_MSG_RESULT([no]) -+]) -+CFLAGS=$safe_CFLAGS -+ -+AC_SUBST(FLAG_MMMX) -+ -+ -+# does this compiler support -msse ? -+AC_MSG_CHECKING([if gcc accepts -msse]) -+ -+safe_CFLAGS=$CFLAGS -+CFLAGS="-msse" -+ -+AC_TRY_COMPILE(, [ -+ return 0; -+], -+[ -+FLAG_MSSE="-msse" -+AC_MSG_RESULT([yes]) -+], [ -+FLAG_MSSE="" -+AC_MSG_RESULT([no]) -+]) -+CFLAGS=$safe_CFLAGS -+ -+AC_SUBST(FLAG_MSSE) -+ -+ -+# does this compiler support -mpreferred-stack-boundary=2 ? -+AC_MSG_CHECKING([if gcc accepts -mpreferred-stack-boundary]) -+ -+safe_CFLAGS=$CFLAGS -+CFLAGS="-mpreferred-stack-boundary=2" -+ -+AC_TRY_COMPILE(, [ -+ return 0; -+], -+[ -+PREFERRED_STACK_BOUNDARY="-mpreferred-stack-boundary=2" -+AC_MSG_RESULT([yes]) -+], [ -+PREFERRED_STACK_BOUNDARY="" -+AC_MSG_RESULT([no]) -+]) -+CFLAGS=$safe_CFLAGS -+ -+AC_SUBST(PREFERRED_STACK_BOUNDARY) -+ -+ -+# does this compiler support -Wno-pointer-sign ? -+AC_MSG_CHECKING([if gcc accepts -Wno-pointer-sign]) -+ -+safe_CFLAGS=$CFLAGS -+CFLAGS="-Wno-pointer-sign" -+ -+AC_TRY_COMPILE(, [ -+ return 0; -+], -+[ -+no_pointer_sign=yes -+AC_MSG_RESULT([yes]) -+], [ -+no_pointer_sign=no -+AC_MSG_RESULT([no]) -+]) -+CFLAGS=$safe_CFLAGS -+ -+if test x$no_pointer_sign = xyes; then -+ CFLAGS="$CFLAGS -Wno-pointer-sign" -+fi -+ -+ -+# does this compiler support -Wno-empty-body ? -+ -+AC_MSG_CHECKING([if gcc accepts -Wno-empty-body]) -+ -+safe_CFLAGS=$CFLAGS -+CFLAGS="-Wno-empty-body" -+ -+AC_TRY_COMPILE( -+[ ], -+[ -+ return 0; -+], -+[ -+AC_SUBST([FLAG_W_NO_EMPTY_BODY], [-Wno-empty-body]) -+AC_MSG_RESULT([yes]) -+], -+[ -+AC_SUBST([FLAG_W_NO_EMPTY_BODY], []) -+AC_MSG_RESULT([no]) -+]) -+CFLAGS=$safe_CFLAGS -+ -+ -+# does this compiler support -Wno-format-zero-length ? -+ -+AC_MSG_CHECKING([if gcc accepts -Wno-format-zero-length]) -+ -+safe_CFLAGS=$CFLAGS -+CFLAGS="-Wno-format-zero-length" -+ -+AC_TRY_COMPILE( -+[ ], -+[ -+ return 0; -+], -+[ -+AC_SUBST([FLAG_W_NO_FORMAT_ZERO_LENGTH], [-Wno-format-zero-length]) -+AC_MSG_RESULT([yes]) -+], -+[ -+AC_SUBST([FLAG_W_NO_FORMAT_ZERO_LENGTH], []) -+AC_MSG_RESULT([no]) -+]) -+CFLAGS=$safe_CFLAGS -+ -+ -+# does this compiler support -Wno-uninitialized ? -+ -+AC_MSG_CHECKING([if gcc accepts -Wno-uninitialized]) -+ -+safe_CFLAGS=$CFLAGS -+CFLAGS="-Wno-uninitialized" -+ -+AC_TRY_COMPILE( -+[ ], -+[ -+ return 0; -+], -+[ -+AC_SUBST([FLAG_W_NO_UNINITIALIZED], [-Wno-uninitialized]) -+AC_MSG_RESULT([yes]) -+], -+[ -+AC_SUBST([FLAG_W_NO_UNINITIALIZED], []) -+AC_MSG_RESULT([no]) -+]) -+CFLAGS=$safe_CFLAGS -+ -+ -+# does this compiler support -Wextra or the older -W ? -+ -+AC_MSG_CHECKING([if gcc accepts -Wextra or -W]) -+ -+safe_CFLAGS=$CFLAGS -+CFLAGS="-Wextra" -+ -+AC_TRY_COMPILE( -+[ ], -+[ -+ return 0; -+], -+[ -+AC_SUBST([FLAG_W_EXTRA], [-Wextra]) -+AC_MSG_RESULT([-Wextra]) -+], [ -+ CFLAGS="-W" -+ AC_TRY_COMPILE( -+ [ ], -+ [ -+ return 0; -+ ], -+ [ -+ AC_SUBST([FLAG_W_EXTRA], [-W]) -+ AC_MSG_RESULT([-W]) -+ ], [ -+ AC_SUBST([FLAG_W_EXTRA], []) -+ AC_MSG_RESULT([not supported]) -+ ]) -+]) -+CFLAGS=$safe_CFLAGS -+ -+ -+# does this compiler support -fno-stack-protector ? -+AC_MSG_CHECKING([if gcc accepts -fno-stack-protector]) -+ -+safe_CFLAGS=$CFLAGS -+CFLAGS="-fno-stack-protector" -+ -+AC_TRY_COMPILE(, [ -+ return 0; -+], -+[ -+no_stack_protector=yes -+FLAG_FNO_STACK_PROTECTOR="-fno-stack-protector" -+AC_MSG_RESULT([yes]) -+], [ -+no_stack_protector=no -+FLAG_FNO_STACK_PROTECTOR="" -+AC_MSG_RESULT([no]) -+]) -+CFLAGS=$safe_CFLAGS -+ -+AC_SUBST(FLAG_FNO_STACK_PROTECTOR) -+ -+if test x$no_stack_protector = xyes; then -+ CFLAGS="$CFLAGS -fno-stack-protector" -+fi -+ -+ -+# does this compiler support --param inline-unit-growth=... ? -+ -+AC_MSG_CHECKING([if gcc accepts --param inline-unit-growth]) -+ -+safe_CFLAGS=$CFLAGS -+CFLAGS="--param inline-unit-growth=900" -+ -+AC_TRY_COMPILE( -+[ ], -+[ -+ return 0; -+], -+[ -+AC_SUBST([FLAG_UNLIMITED_INLINE_UNIT_GROWTH], -+ ["--param inline-unit-growth=900"]) -+AC_MSG_RESULT([yes]) -+], [ -+AC_SUBST([FLAG_UNLIMITED_INLINE_UNIT_GROWTH], [""]) -+AC_MSG_RESULT([no]) -+]) -+CFLAGS=$safe_CFLAGS -+ -+ -+# does the linker support -Wl,--build-id=none ? Note, it's -+# important that we test indirectly via whichever C compiler -+# is selected, rather than testing /usr/bin/ld or whatever -+# directly. -+ -+AC_MSG_CHECKING([if the linker accepts -Wl,--build-id=none]) -+ -+safe_CFLAGS=$CFLAGS -+CFLAGS="-Wl,--build-id=none" -+ -+AC_LINK_IFELSE( -+[AC_LANG_PROGRAM([ ], [return 0;])], -+[ -+ AC_SUBST([FLAG_NO_BUILD_ID], ["-Wl,--build-id=none"]) -+ AC_MSG_RESULT([yes]) -+], [ -+ AC_SUBST([FLAG_NO_BUILD_ID], [""]) -+ AC_MSG_RESULT([no]) -+]) -+CFLAGS=$safe_CFLAGS -+ -+ -+# does the ppc assembler support "mtocrf" et al? -+AC_MSG_CHECKING([if ppc32/64 as supports mtocrf/mfocrf]) -+ -+AC_TRY_COMPILE(, [ -+__asm__ __volatile__("mtocrf 4,0"); -+__asm__ __volatile__("mfocrf 0,4"); -+], -+[ -+ac_have_as_ppc_mftocrf=yes -+AC_MSG_RESULT([yes]) -+], [ -+ac_have_as_ppc_mftocrf=no -+AC_MSG_RESULT([no]) -+]) -+if test x$ac_have_as_ppc_mftocrf = xyes ; then -+ AC_DEFINE(HAVE_AS_PPC_MFTOCRF, 1, [Define to 1 if as supports mtocrf/mfocrf.]) -+fi -+ -+ -+# does the x86/amd64 assembler understand SSE3 instructions? -+# Note, this doesn't generate a C-level symbol. It generates a -+# automake-level symbol (BUILD_SSE3_TESTS), used in test Makefile.am's -+AC_MSG_CHECKING([if x86/amd64 assembler speaks SSE3]) -+ -+AC_TRY_COMPILE(, [ -+ do { long long int x; -+ __asm__ __volatile__("fisttpq (%0)" : :"r"(&x) ); } -+ while (0) -+], -+[ -+ac_have_as_sse3=yes -+AC_MSG_RESULT([yes]) -+], [ -+ac_have_as_sse3=no -+AC_MSG_RESULT([no]) -+]) -+ -+AM_CONDITIONAL(BUILD_SSE3_TESTS, test x$ac_have_as_sse3 = xyes) -+ -+ -+# Ditto for SSSE3 instructions (note extra S) -+# Note, this doesn't generate a C-level symbol. It generates a -+# automake-level symbol (BUILD_SSSE3_TESTS), used in test Makefile.am's -+AC_MSG_CHECKING([if x86/amd64 assembler speaks SSSE3]) -+ -+AC_TRY_COMPILE(, [ -+ do { long long int x; -+ __asm__ __volatile__( -+ "pabsb (%0),%%xmm7" : : "r"(&x) : "xmm7" ); } -+ while (0) -+], -+[ -+ac_have_as_ssse3=yes -+AC_MSG_RESULT([yes]) -+], [ -+ac_have_as_ssse3=no -+AC_MSG_RESULT([no]) -+]) -+ -+AM_CONDITIONAL(BUILD_SSSE3_TESTS, test x$ac_have_as_ssse3 = xyes) -+ -+ -+# Note: we're really checking the assembler-level support, not gcc's ; -+# C-level code might require the flag -mpclmul be passed to gcc (e.g. to -+# compile code which uses wmmintrin.h). Doesn't matter since tests also -+# use inline assembly directly -+AC_MSG_CHECKING([if x86/amd64 assembler supports 'pclmulqdq']) -+AC_TRY_COMPILE(, [ -+ do { -+ __asm__ __volatile__( -+ "pclmulqdq \$17,%%xmm6,%%xmm7" : : : "xmm6", "xmm7" ); } -+ while (0) -+], -+[ -+ac_have_as_pclmulqdq=yes -+AC_MSG_RESULT([yes]) -+], [ -+ac_have_as_pclmulqdq=no -+AC_MSG_RESULT([no]) -+]) -+ -+AM_CONDITIONAL(BUILD_PCLMULQDQ_TESTS, test x$ac_have_as_pclmulqdq = xyes) -+ -+ -+AC_MSG_CHECKING([if x86/amd64 assembler supports 'lzcnt']) -+ -+AC_TRY_COMPILE([], [ -+ do { -+ __asm__ __volatile__("lzcnt %rax,%rax"); -+ } while (0) -+], -+[ -+ ac_have_as_lzcnt=yes -+ AC_MSG_RESULT([yes]) -+], [ -+ ac_have_as_lzcnt=no -+ AC_MSG_RESULT([no]) -+]) -+ -+AM_CONDITIONAL([BUILD_LZCNT_TESTS], [test x$ac_have_as_lzcnt = xyes]) -+ -+# XXX JRS 2010 Oct 13: what is this for? For sure, we don't need this -+# when building the tool executables. I think we should get rid of it. -+# -+# Check for TLS support in the compiler and linker -+if test "x${cross_compiling}" = "xno"; then -+# Native compilation: check whether running a program using TLS succeeds. -+# Linking only is not sufficient -- e.g. on Red Hat 7.3 linking TLS programs -+# succeeds but running programs using TLS fails. -+AC_CACHE_CHECK([for TLS support], vg_cv_tls, -+ [AC_ARG_ENABLE(tls, [ --enable-tls platform supports TLS], -+ [vg_cv_tls=$enableval], -+ [AC_RUN_IFELSE([AC_LANG_PROGRAM([[static __thread int foo;]], -+ [[return foo;]])], -+ [vg_cv_tls=yes], -+ [vg_cv_tls=no])])]) -+else -+# Cross-compiling: check whether linking a program using TLS succeeds. -+AC_CACHE_CHECK([for TLS support], vg_cv_tls, -+ [AC_ARG_ENABLE(tls, [ --enable-tls platform supports TLS], -+ [vg_cv_tls=$enableval], -+ [AC_LINK_IFELSE([AC_LANG_PROGRAM([[static __thread int foo;]], -+ [[return foo;]])], -+ [vg_cv_tls=yes], -+ [vg_cv_tls=no])])]) -+fi -+ -+if test "$vg_cv_tls" = yes; then -+AC_DEFINE([HAVE_TLS], 1, [can use __thread to define thread-local variables]) -+fi -+ -+ -+#---------------------------------------------------------------------------- -+# Checks for C header files. -+#---------------------------------------------------------------------------- -+ -+AC_HEADER_STDC -+AC_CHECK_HEADERS([ \ -+ asm/unistd.h \ -+ endian.h \ -+ mqueue.h \ -+ sys/endian.h \ -+ sys/epoll.h \ -+ sys/eventfd.h \ -+ sys/klog.h \ -+ sys/poll.h \ -+ sys/signal.h \ -+ sys/signalfd.h \ -+ sys/syscall.h \ -+ sys/time.h \ -+ sys/types.h \ -+ ]) -+ -+#---------------------------------------------------------------------------- -+# Checks for typedefs, structures, and compiler characteristics. -+#---------------------------------------------------------------------------- -+AC_TYPE_UID_T -+AC_TYPE_OFF_T -+AC_TYPE_SIZE_T -+AC_HEADER_TIME -+ -+ -+#---------------------------------------------------------------------------- -+# Checks for library functions. -+#---------------------------------------------------------------------------- -+AC_FUNC_MEMCMP -+AC_FUNC_MMAP -+AC_TYPE_SIGNAL -+ -+AC_CHECK_LIB([rt], [clock_gettime]) -+ -+AC_CHECK_FUNCS([ \ -+ clock_gettime\ -+ epoll_create \ -+ epoll_pwait \ -+ floor \ -+ klogctl \ -+ mallinfo \ -+ memchr \ -+ memset \ -+ mkdir \ -+ mremap \ -+ ppoll \ -+ pthread_barrier_init \ -+ pthread_condattr_setclock \ -+ pthread_mutex_timedlock \ -+ pthread_rwlock_timedrdlock \ -+ pthread_rwlock_timedwrlock \ -+ pthread_spin_lock \ -+ pthread_yield \ -+ readlinkat \ -+ semtimedop \ -+ signalfd \ -+ sigwaitinfo \ -+ strchr \ -+ strdup \ -+ strpbrk \ -+ strrchr \ -+ strstr \ -+ syscall \ -+ timerfd \ -+ utimensat \ -+ ]) -+ -+# AC_CHECK_LIB adds any library found to the variable LIBS, and links these -+# libraries with any shared object and/or executable. This is NOT what we -+# want for e.g. vgpreload_core-x86-linux.so -+LIBS="" -+ -+AM_CONDITIONAL([HAVE_PTHREAD_BARRIER], -+ [test x$ac_cv_func_pthread_barrier_init = xyes]) -+AM_CONDITIONAL([HAVE_PTHREAD_MUTEX_TIMEDLOCK], -+ [test x$ac_cv_func_pthread_mutex_timedlock = xyes]) -+AM_CONDITIONAL([HAVE_PTHREAD_SPINLOCK], -+ [test x$ac_cv_func_pthread_spin_lock = xyes]) -+ -+ -+#---------------------------------------------------------------------------- -+# MPI checks -+#---------------------------------------------------------------------------- -+# Do we have a useable MPI setup on the primary and/or secondary targets? -+# On Linux, by default, assumes mpicc and -m32/-m64 -+# On AIX, by default, assumes mpxlc and -q32/-q64 -+# Note: this is a kludge in that it assumes the specified mpicc -+# understands -m32/-m64/-q32/-q64 regardless of what is specified using -+# --with-mpicc=. -+MPI_CC="mpicc" -+if test x$VGCONF_PLATFORM_PRI_CAPS = xPPC32_AIX5 \ -+ -o x$VGCONF_PLATFORM_PRI_CAPS = xPPC64_AIX5 ; then -+ MPI_CC="mpxlc" -+fi -+ -+mflag_primary= -+if test x$VGCONF_PLATFORM_PRI_CAPS = xX86_LINUX \ -+ -o x$VGCONF_PLATFORM_PRI_CAPS = xPPC32_LINUX ; then -+ mflag_primary=$FLAG_M32 -+elif test x$VGCONF_PLATFORM_PRI_CAPS = xAMD64_LINUX \ -+ -o x$VGCONF_PLATFORM_PRI_CAPS = xPPC64_LINUX ; then -+ mflag_primary=$FLAG_M64 -+elif test x$VGCONF_PLATFORM_PRI_CAPS = xPPC32_AIX5 ; then -+ mflag_primary=-q32 -+elif test x$VGCONF_PLATFORM_PRI_CAPS = xPPC64_AIX5 ; then -+ mflag_primary=-q64 -+fi -+ -+mflag_secondary= -+if test x$VGCONF_PLATFORM_SEC_CAPS = xX86_LINUX \ -+ -o x$VGCONF_PLATFORM_SEC_CAPS = xPPC32_LINUX ; then -+ mflag_secondary=$FLAG_M32 -+elif test x$VGCONF_PLATFORM_SEC_CAPS = xPPC32_AIX5 ; then -+ mflag_secondary=-q32 -+fi -+ -+ -+AC_ARG_WITH(mpicc, -+ [ --with-mpicc= Specify name of MPI2-ised C compiler], -+ MPI_CC=$withval -+) -+AC_SUBST(MPI_CC) -+ -+## See if MPI_CC works for the primary target -+## -+AC_MSG_CHECKING([primary target for usable MPI2-compliant C compiler and mpi.h]) -+saved_CC=$CC -+saved_CFLAGS=$CFLAGS -+CC=$MPI_CC -+CFLAGS=$mflag_primary -+AC_TRY_LINK([ -+#include -+#include -+],[ -+ int r = MPI_Init(NULL,NULL); -+ r |= MPI_Type_get_contents( MPI_INT, 0,0,0, NULL,NULL,NULL ); -+ return r; -+], [ -+ac_have_mpi2_pri=yes -+AC_MSG_RESULT([yes, $MPI_CC]) -+], [ -+ac_have_mpi2_pri=no -+AC_MSG_RESULT([no]) -+]) -+CC=$saved_CC -+CFLAGS=$saved_CFLAGS -+AM_CONDITIONAL(BUILD_MPIWRAP_PRI, test x$ac_have_mpi2_pri = xyes) -+ -+## See if MPI_CC works for the secondary target. Complication: what if -+## there is no secondary target? We need this to then fail. -+## Kludge this by making MPI_CC something which will surely fail in -+## such a case. -+## -+AC_MSG_CHECKING([secondary target for usable MPI2-compliant C compiler and mpi.h]) -+saved_CC=$CC -+saved_CFLAGS=$CFLAGS -+if test x$VGCONF_PLATFORM_SEC_CAPS = x ; then -+ CC="$MPI_CC this will surely fail" -+else -+ CC=$MPI_CC -+fi -+CFLAGS=$mflag_secondary -+AC_TRY_LINK([ -+#include -+#include -+],[ -+ int r = MPI_Init(NULL,NULL); -+ r |= MPI_Type_get_contents( MPI_INT, 0,0,0, NULL,NULL,NULL ); -+ return r; -+], [ -+ac_have_mpi2_sec=yes -+AC_MSG_RESULT([yes, $MPI_CC]) -+], [ -+ac_have_mpi2_sec=no -+AC_MSG_RESULT([no]) -+]) -+CC=$saved_CC -+CFLAGS=$saved_CFLAGS -+AM_CONDITIONAL(BUILD_MPIWRAP_SEC, test x$ac_have_mpi2_sec = xyes) -+ -+ -+#---------------------------------------------------------------------------- -+# Other library checks -+#---------------------------------------------------------------------------- -+# There now follow some tests for QtCore, Boost, and OpenMP. These -+# tests are present because Drd has some regression tests that use -+# these packages. All regression test programs all compiled only -+# for the primary target. And so it is important that the configure -+# checks that follow, use the correct -m32 or -m64 flag for the -+# primary target (called $mflag_primary). Otherwise, we can end up -+# in a situation (eg) where, on amd64-linux, the test for Boost checks -+# for usable 64-bit Boost facilities, but because we are doing a 32-bit -+# only build (meaning, the primary target is x86-linux), the build -+# of the regtest programs that use Boost fails, because they are -+# build as 32-bit (IN THIS EXAMPLE). -+# -+# Hence: ALWAYS USE $mflag_primary FOR CONFIGURE TESTS FOR FACILITIES -+# NEEDED BY THE REGRESSION TEST PROGRAMS. -+ -+ -+# The test below verifies whether the QtCore package been installed. -+# This test works as follows: -+# - If pkg-config was not installed at the time autogen.sh was run, -+# the definition of the PKG_CHECK_EXISTS() macro will not be found by -+# autogen.sh. Augogen.sh will generate a configure script that prints -+# a warning about pkg-config and proceeds as if Qt4 has not been installed. -+# - If pkg-config was installed at the time autogen.sh was run, -+# the generated configure script will try to detect the presence of the -+# Qt4 QtCore library by looking up compile and linker flags in the file -+# called QtCore.pc. -+# - pkg-config settings can be overridden via the configure variables -+# QTCORE_CFLAGS and QTCORE_LIBS (added by the pkg-config m4 macro's to the -+# configure script -- see also ./configure --help). -+# - The QTCORE_CFLAGS and QTCORE_LIBS configure variables can be used even if -+# the pkg-config executable is not present on the system on which the -+# configure script is run. -+ -+ifdef( -+ [PKG_CHECK_EXISTS], -+ [PKG_CHECK_EXISTS( -+ [QtCore], -+ [ -+ PKG_CHECK_MODULES([QTCORE], [QtCore]) -+ # Paranoia: don't trust the result reported by pkg-config, but when -+ # pkg-config reports that QtCore has been found, verify whether linking -+ # programs with QtCore succeeds. -+ AC_LANG(C++) -+ safe_CXXFLAGS="${CXXFLAGS}" -+ CXXFLAGS="${QTCORE_CFLAGS} ${QTCORE_LIBS} $mflag_primary" -+ AC_TRY_LINK( -+ [#include ], -+ [QMutex Mutex;], -+ [ac_have_qtcore=yes], -+ [ -+ AC_MSG_WARN([Although pkg-config detected Qt4, linking Qt4 programs fails. Skipping Qt4.]) -+ ac_have_qtcore=no -+ ] -+ ) -+ CXXFLAGS="${safe_CXXFLAGS}" -+ ], -+ [ -+ ac_have_qtcore=no -+ ] -+ ) -+ ], -+ AC_MSG_WARN([pkg-config has not been installed or is too old.]) -+ AC_MSG_WARN([Detection of Qt4 will be skipped.]) -+ [ac_have_qtcore=no] -+) -+ -+AM_CONDITIONAL([HAVE_QTCORE], [test x$ac_have_qtcore = xyes]) -+ -+ -+# Test for QMutex::tryLock(int), which has been introduced in Qt 4.3. -+# See also http://doc.trolltech.com/4.3/qmutex.html. -+if test x$ac_have_qtcore = xyes; then -+ AC_MSG_CHECKING([for Qt4 QMutex::tryLock(int)]) -+ AC_LANG(C++) -+ safe_CXXFLAGS="${CXXFLAGS}" -+ CXXFLAGS="${QTCORE_CFLAGS} $mflag_primary" -+ AC_TRY_COMPILE([ -+ #include -+ ], -+ [ -+ QMutex M; -+ M.tryLock(1); -+ M.unlock(); -+ return 0; -+ ], -+ [ -+ AC_MSG_RESULT([yes]) -+ AC_DEFINE([HAVE_QTCORE_QMUTEX_TRYLOCK_INT], [1], [Define to 1 if the installed version of Qt4 provides QMutex::tryLock(int).]) -+ ], -+ [ -+ AC_MSG_RESULT([no]) -+ ]) -+ CXXFLAGS="${safe_CXXFLAGS}" -+ AC_LANG(C) -+fi -+ -+ -+# Test for QAtomicInt, which has been introduced in Qt 4.4. -+# See also http://doc.trolltech.com/4.4/qatomicint.html. -+if test x$ac_have_qtcore = xyes; then -+ AC_MSG_CHECKING([for Qt4 QAtomicInt]) -+ AC_LANG(C++) -+ safe_CXXFLAGS="${CXXFLAGS}" -+ CXXFLAGS="${QTCORE_CFLAGS} $mflag_primary" -+ AC_TRY_COMPILE([ -+ #include -+ ], -+ [ -+ QAtomicInt I; -+ I.testAndSetOrdered(0, 1); -+ return 0; -+ ], -+ [ -+ ac_have_qtcore_qatomicint=yes -+ AC_MSG_RESULT([yes]) -+ AC_DEFINE([HAVE_QTCORE_QATOMICINT], [1], [Define to 1 if the installed version of Qt4 provides QAtomicInt.]) -+ ], -+ [ -+ ac_have_qtcore_qatomicint=no -+ AC_MSG_RESULT([no]) -+ ]) -+ CXXFLAGS="${safe_CXXFLAGS}" -+ AC_LANG(C) -+fi -+ -+AM_CONDITIONAL([HAVE_QTCORE_QATOMICINT], [test x$ac_have_qtcore_qatomicint = xyes]) -+ -+ -+ -+# Check whether the boost library 1.35 or later has been installed. -+# The Boost.Threads library has undergone a major rewrite in version 1.35.0. -+ -+AC_MSG_CHECKING([for boost]) -+ -+AC_LANG(C++) -+safe_CXXFLAGS=$CXXFLAGS -+CXXFLAGS="-lboost_thread-mt $mflag_primary" -+ -+AC_LINK_IFELSE( -+[ -+#include -+static void thread_func(void) -+{ } -+int main(int argc, char** argv) -+{ -+ boost::thread t(thread_func); -+ return 0; -+} -+], -+[ -+ac_have_boost_1_35=yes -+AC_SUBST([BOOST_CFLAGS], []) -+AC_SUBST([BOOST_LIBS], ["${CXXFLAGS}"]) -+AC_MSG_RESULT([yes]) -+], [ -+ac_have_boost_1_35=no -+AC_MSG_RESULT([no]) -+]) -+ -+CXXFLAGS=$safe_CXXFLAGS -+AC_LANG(C) -+ -+AM_CONDITIONAL([HAVE_BOOST_1_35], [test x$ac_have_boost_1_35 = xyes]) -+ -+ -+# does this compiler support -fopenmp, does it have the include file -+# and does it have libgomp ? -+ -+AC_MSG_CHECKING([for OpenMP]) -+ -+safe_CFLAGS=$CFLAGS -+CFLAGS="-fopenmp $mflag_primary" -+ -+AC_LINK_IFELSE( -+[ -+#include -+int main(int argc, char** argv) -+{ -+ omp_set_dynamic(0); -+ return 0; -+} -+], -+[ -+ac_have_openmp=yes -+AC_MSG_RESULT([yes]) -+], [ -+ac_have_openmp=no -+AC_MSG_RESULT([no]) -+]) -+CFLAGS=$safe_CFLAGS -+ -+AM_CONDITIONAL([HAVE_OPENMP], [test x$ac_have_openmp = xyes]) -+ -+ -+# does this compiler have built-in functions for atomic memory access ? -+AC_MSG_CHECKING([if gcc supports __sync_bool_compare_and_swap]) -+ -+safe_CFLAGS=$CFLAGS -+CFLAGS="$mflag_primary" -+ -+AC_TRY_LINK(, -+[ -+ int variable = 1; -+ return (__sync_bool_compare_and_swap(&variable, 1, 2) -+ && __sync_add_and_fetch(&variable, 1) ? 1 : 0) -+], -+[ -+ ac_have_builtin_atomic=yes -+ AC_MSG_RESULT([yes]) -+ AC_DEFINE(HAVE_BUILTIN_ATOMIC, 1, [Define to 1 if gcc supports __sync_bool_compare_and_swap() a.o.]) -+], -+[ -+ ac_have_builtin_atomic=no -+ AC_MSG_RESULT([no]) -+]) -+ -+CFLAGS=$safe_CFLAGS -+ -+AM_CONDITIONAL([HAVE_BUILTIN_ATOMIC], [test x$ac_have_builtin_atomic = xyes]) -+ -+ -+#---------------------------------------------------------------------------- -+# Ok. We're done checking. -+#---------------------------------------------------------------------------- -+ -+# Nb: VEX/Makefile is generated from Makefile.vex.in. -+AC_CONFIG_FILES([ -+ Makefile -+ VEX/Makefile:Makefile.vex.in -+ valgrind.spec -+ valgrind.pc -+ glibc-2.X.supp -+ docs/Makefile -+ tests/Makefile -+ tests/vg_regtest -+ perf/Makefile -+ perf/vg_perf -+ include/Makefile -+ auxprogs/Makefile -+ mpi/Makefile -+ coregrind/Makefile -+ memcheck/Makefile -+ memcheck/tests/Makefile -+ memcheck/tests/amd64/Makefile -+ memcheck/tests/x86/Makefile -+ memcheck/tests/linux/Makefile -+ memcheck/tests/darwin/Makefile -+ memcheck/tests/amd64-linux/Makefile -+ memcheck/tests/x86-linux/Makefile -+ memcheck/tests/ppc32/Makefile -+ memcheck/tests/ppc64/Makefile -+ memcheck/perf/Makefile -+ cachegrind/Makefile -+ cachegrind/tests/Makefile -+ cachegrind/tests/x86/Makefile -+ cachegrind/cg_annotate -+ cachegrind/cg_diff -+ callgrind/Makefile -+ callgrind/callgrind_annotate -+ callgrind/callgrind_control -+ callgrind/tests/Makefile -+ helgrind/Makefile -+ helgrind/tests/Makefile -+ massif/Makefile -+ massif/tests/Makefile -+ massif/perf/Makefile -+ massif/ms_print -+ lackey/Makefile -+ lackey/tests/Makefile -+ none/Makefile -+ none/tests/Makefile -+ none/tests/amd64/Makefile -+ none/tests/ppc32/Makefile -+ none/tests/ppc64/Makefile -+ none/tests/x86/Makefile -+ none/tests/arm/Makefile -+ none/tests/linux/Makefile -+ none/tests/darwin/Makefile -+ none/tests/x86-linux/Makefile -+ exp-ptrcheck/Makefile -+ exp-ptrcheck/tests/Makefile -+ drd/Makefile -+ drd/scripts/download-and-build-splash2 -+ drd/tests/Makefile -+ exp-bbv/Makefile -+ exp-bbv/tests/Makefile -+ exp-bbv/tests/x86/Makefile -+ exp-bbv/tests/x86-linux/Makefile -+ exp-bbv/tests/amd64-linux/Makefile -+ exp-bbv/tests/ppc32-linux/Makefile -+ exp-bbv/tests/arm-linux/Makefile -+ exp-dhat/Makefile -+ exp-dhat/tests/Makefile -+]) -+AC_CONFIG_FILES([coregrind/link_tool_exe_linux], -+ [chmod +x coregrind/link_tool_exe_linux]) -+AC_CONFIG_FILES([coregrind/link_tool_exe_darwin], -+ [chmod +x coregrind/link_tool_exe_darwin]) -+AC_CONFIG_FILES([coregrind/link_tool_exe_aix5], -+ [chmod +x coregrind/link_tool_exe_aix5]) -+AC_OUTPUT -+ -+cat<e_ident[EI_OSABI] == ELFOSABI_SYSV || - ehdr->e_ident[EI_OSABI] == ELFOSABI_LINUX)) { - platform = "ppc64-linux"; -+ } else if (ehdr->e_machine == EM_S390 && -+ (ehdr->e_ident[EI_OSABI] == ELFOSABI_SYSV || -+ ehdr->e_ident[EI_OSABI] == ELFOSABI_LINUX)) { -+ platform = "s390x-linux"; - } - } - } -@@ -278,7 +282,8 @@ - (0==strcmp(VG_PLATFORM,"amd64-linux")) || - (0==strcmp(VG_PLATFORM,"ppc32-linux")) || - (0==strcmp(VG_PLATFORM,"ppc64-linux")) || -- (0==strcmp(VG_PLATFORM,"arm-linux"))) -+ (0==strcmp(VG_PLATFORM,"arm-linux")) || -+ (0==strcmp(VG_PLATFORM,"s390x-linux"))) - default_platform = VG_PLATFORM; - else - barf("Unknown VG_PLATFORM '%s'", VG_PLATFORM); ---- coregrind/Makefile.am -+++ coregrind/Makefile.am -@@ -289,7 +289,8 @@ - m_dispatch/dispatch-amd64-linux.S \ - m_dispatch/dispatch-ppc32-linux.S \ - m_dispatch/dispatch-ppc64-linux.S \ -- m_dispatch/dispatch-arm-linux.S \ -+ m_dispatch/dispatch-arm-linux.S \ -+ m_dispatch/dispatch-s390x-linux.S \ - m_dispatch/dispatch-ppc32-aix5.S \ - m_dispatch/dispatch-ppc64-aix5.S \ - m_dispatch/dispatch-x86-darwin.S \ -@@ -309,7 +310,8 @@ - m_sigframe/sigframe-amd64-linux.c \ - m_sigframe/sigframe-ppc32-linux.c \ - m_sigframe/sigframe-ppc64-linux.c \ -- m_sigframe/sigframe-arm-linux.c \ -+ m_sigframe/sigframe-arm-linux.c \ -+ m_sigframe/sigframe-s390x-linux.c \ - m_sigframe/sigframe-ppc32-aix5.c \ - m_sigframe/sigframe-ppc64-aix5.c \ - m_sigframe/sigframe-x86-darwin.c \ -@@ -318,7 +320,8 @@ - m_syswrap/syscall-amd64-linux.S \ - m_syswrap/syscall-ppc32-linux.S \ - m_syswrap/syscall-ppc64-linux.S \ -- m_syswrap/syscall-arm-linux.S \ -+ m_syswrap/syscall-arm-linux.S \ -+ m_syswrap/syscall-s390x-linux.S \ - m_syswrap/syscall-ppc32-aix5.S \ - m_syswrap/syscall-ppc64-aix5.S \ - m_syswrap/syscall-x86-darwin.S \ -@@ -333,7 +336,8 @@ - m_syswrap/syswrap-amd64-linux.c \ - m_syswrap/syswrap-ppc32-linux.c \ - m_syswrap/syswrap-ppc64-linux.c \ -- m_syswrap/syswrap-arm-linux.c \ -+ m_syswrap/syswrap-arm-linux.c \ -+ m_syswrap/syswrap-s390x-linux.c \ - m_syswrap/syswrap-ppc32-aix5.c \ - m_syswrap/syswrap-ppc64-aix5.c \ - m_syswrap/syswrap-x86-darwin.c \ ---- coregrind/m_aspacemgr/aspacemgr-common.c -+++ coregrind/m_aspacemgr/aspacemgr-common.c -@@ -159,7 +159,8 @@ - res = VG_(do_syscall6)(__NR_mmap2, (UWord)start, length, - prot, flags, fd, offset / 4096); - # elif defined(VGP_amd64_linux) || defined(VGP_ppc64_linux) \ -- || defined(VGP_ppc32_aix5) || defined(VGP_ppc64_aix5) -+ || defined(VGP_ppc32_aix5) || defined(VGP_ppc64_aix5) \ -+ || defined(VGP_s390x_linux) - res = VG_(do_syscall6)(__NR_mmap, (UWord)start, length, - prot, flags, fd, offset); - # elif defined(VGP_x86_darwin) ---- coregrind/m_aspacemgr/aspacemgr-linux.c -+++ coregrind/m_aspacemgr/aspacemgr-linux.c -@@ -900,10 +900,10 @@ - These kernels report which mappings are really executable in - the /proc/self/maps output rather than mirroring what was asked - for when each mapping was created. In order to cope with this we -- have a sloppyXcheck mode which we enable on x86 - in this mode we -- allow the kernel to report execute permission when we weren't -+ have a sloppyXcheck mode which we enable on x86 and s390 - in this -+ mode we allow the kernel to report execute permission when we weren't - expecting it but not vice versa. */ --# if defined(VGA_x86) -+# if defined(VGA_x86) || defined (VGA_s390x) - sloppyXcheck = True; - # else - sloppyXcheck = False; ---- coregrind/m_coredump/coredump-elf.c -+++ coregrind/m_coredump/coredump-elf.c -@@ -233,9 +233,14 @@ - prs->pr_pgrp = VG_(getpgrp)(); - prs->pr_sid = VG_(getpgrp)(); - -+#ifdef VGP_s390x_linux -+ /* prs->pr_reg has struct type. Need to take address. */ -+ regs = (struct vki_user_regs_struct *)&(prs->pr_reg); -+#else - regs = (struct vki_user_regs_struct *)prs->pr_reg; - - vg_assert(sizeof(*regs) == sizeof(prs->pr_reg)); -+#endif - - #if defined(VGP_x86_linux) - regs->eflags = LibVEX_GuestX86_get_eflags( &arch->vex ); -@@ -343,6 +348,16 @@ - regs->ARM_pc = arch->vex.guest_R15T; - regs->ARM_cpsr = LibVEX_GuestARM_get_cpsr( &((ThreadArchState*)arch)->vex ); - -+#elif defined(VGP_s390x_linux) -+# define DO(n) regs->gprs[n] = arch->vex.guest_r##n -+ DO(0); DO(1); DO(2); DO(3); DO(4); DO(5); DO(6); DO(7); -+ DO(8); DO(9); DO(10); DO(11); DO(12); DO(13); DO(14); DO(15); -+# undef DO -+# define DO(n) regs->acrs[n] = arch->vex.guest_a##n -+ DO(0); DO(1); DO(2); DO(3); DO(4); DO(5); DO(6); DO(7); -+ DO(8); DO(9); DO(10); DO(11); DO(12); DO(13); DO(14); DO(15); -+# undef DO -+ regs->orig_gpr2 = arch->vex.guest_r2; - #else - # error Unknown ELF platform - #endif -@@ -415,6 +430,11 @@ - #elif defined(VGP_arm_linux) - // umm ... - -+#elif defined(VGP_s390x_linux) -+# define DO(n) fpu->fprs[n].ui = arch->vex.guest_f##n -+ DO(0); DO(1); DO(2); DO(3); DO(4); DO(5); DO(6); DO(7); -+ DO(8); DO(9); DO(10); DO(11); DO(12); DO(13); DO(14); DO(15); -+# undef DO - #else - # error Unknown ELF platform - #endif ---- coregrind/m_debugger.c -+++ coregrind/m_debugger.c -@@ -242,6 +242,76 @@ - #elif defined(VGP_amd64_darwin) - I_die_here; - -+#elif defined(VGP_s390x_linux) -+ struct vki_user_regs_struct regs; -+ vki_ptrace_area pa; -+ -+ /* We don't set the psw mask and start at offset 8 */ -+ pa.vki_len = (unsigned long) ®s.per_info - (unsigned long) ®s.psw.addr; -+ pa.vki_process_addr = (unsigned long) ®s.psw.addr; -+ pa.vki_kernel_addr = 8; -+ -+ VG_(memset)(®s, 0, sizeof(regs)); -+ regs.psw.addr = vex->guest_IA; -+ -+ /* We don't set the mask */ -+ regs.gprs[0] = vex->guest_r0; -+ regs.gprs[1] = vex->guest_r1; -+ regs.gprs[2] = vex->guest_r2; -+ regs.gprs[3] = vex->guest_r3; -+ regs.gprs[4] = vex->guest_r4; -+ regs.gprs[5] = vex->guest_r5; -+ regs.gprs[6] = vex->guest_r6; -+ regs.gprs[7] = vex->guest_r7; -+ regs.gprs[8] = vex->guest_r8; -+ regs.gprs[9] = vex->guest_r9; -+ regs.gprs[10] = vex->guest_r10; -+ regs.gprs[11] = vex->guest_r11; -+ regs.gprs[12] = vex->guest_r12; -+ regs.gprs[13] = vex->guest_r13; -+ regs.gprs[14] = vex->guest_r14; -+ regs.gprs[15] = vex->guest_r15; -+ -+ regs.acrs[0] = vex->guest_a0; -+ regs.acrs[1] = vex->guest_a1; -+ regs.acrs[2] = vex->guest_a2; -+ regs.acrs[3] = vex->guest_a3; -+ regs.acrs[4] = vex->guest_a4; -+ regs.acrs[5] = vex->guest_a5; -+ regs.acrs[6] = vex->guest_a6; -+ regs.acrs[7] = vex->guest_a7; -+ regs.acrs[8] = vex->guest_a8; -+ regs.acrs[9] = vex->guest_a9; -+ regs.acrs[10] = vex->guest_a10; -+ regs.acrs[11] = vex->guest_a11; -+ regs.acrs[12] = vex->guest_a12; -+ regs.acrs[13] = vex->guest_a13; -+ regs.acrs[14] = vex->guest_a14; -+ regs.acrs[15] = vex->guest_a15; -+ -+ /* only used for system call restart and friends, just use r2 */ -+ regs.orig_gpr2 = vex->guest_r2; -+ -+ regs.fp_regs.fprs[0].ui = vex->guest_f0; -+ regs.fp_regs.fprs[1].ui = vex->guest_f1; -+ regs.fp_regs.fprs[2].ui = vex->guest_f2; -+ regs.fp_regs.fprs[3].ui = vex->guest_f3; -+ regs.fp_regs.fprs[4].ui = vex->guest_f4; -+ regs.fp_regs.fprs[5].ui = vex->guest_f5; -+ regs.fp_regs.fprs[6].ui = vex->guest_f6; -+ regs.fp_regs.fprs[7].ui = vex->guest_f7; -+ regs.fp_regs.fprs[8].ui = vex->guest_f8; -+ regs.fp_regs.fprs[9].ui = vex->guest_f9; -+ regs.fp_regs.fprs[10].ui = vex->guest_f10; -+ regs.fp_regs.fprs[11].ui = vex->guest_f11; -+ regs.fp_regs.fprs[12].ui = vex->guest_f12; -+ regs.fp_regs.fprs[13].ui = vex->guest_f13; -+ regs.fp_regs.fprs[14].ui = vex->guest_f14; -+ regs.fp_regs.fprs[15].ui = vex->guest_f15; -+ regs.fp_regs.fpc = vex->guest_fpc; -+ -+ return VG_(ptrace)(VKI_PTRACE_POKEUSR_AREA, pid, &pa, NULL); -+ - #else - # error Unknown arch - #endif ---- coregrind/m_debuginfo/d3basics.c -+++ coregrind/m_debuginfo/d3basics.c -@@ -409,6 +409,9 @@ - if (regno == 11) { *a = regs->fp; return True; } - # elif defined(VGP_ppc32_aix5) || defined(VGP_ppc64_aix5) - vg_assert(0); /* this function should never be called */ -+# elif defined(VGP_s390x_linux) -+ if (regno == 15) { *a = regs->sp; return True; } -+ if (regno == 11) { *a = regs->fp; return True; } - # else - # error "Unknown platform" - # endif ---- coregrind/m_debuginfo/debuginfo.c -+++ coregrind/m_debuginfo/debuginfo.c -@@ -703,6 +703,15 @@ - - 2009 Aug 16: apply similar kludge to ppc32-linux. - See http://bugs.kde.org/show_bug.cgi?id=190820 -+ -+ There are two modes on s390x: with and without the noexec kernel -+ parameter. Together with some older kernels, this leads to several -+ variants: -+ executable: r and x -+ data: r and w and x -+ or -+ executable: r and x -+ data: r and w - */ - is_rx_map = False; - is_rw_map = False; -@@ -712,6 +721,9 @@ - # elif defined(VGA_amd64) || defined(VGA_ppc64) || defined(VGA_arm) - is_rx_map = seg->hasR && seg->hasX && !seg->hasW; - is_rw_map = seg->hasR && seg->hasW && !seg->hasX; -+# elif defined(VGP_s390x_linux) -+ is_rx_map = seg->hasR && seg->hasX && !seg->hasW; -+ is_rw_map = seg->hasR && seg->hasW; - # else - # error "Unknown platform" - # endif -@@ -1972,6 +1984,11 @@ - case Creg_ARM_R14: return eec->uregs->r14; - case Creg_ARM_R13: return eec->uregs->r13; - case Creg_ARM_R12: return eec->uregs->r12; -+# elif defined(VGA_s390x) -+ case Creg_IA_IP: return eec->uregs->ia; -+ case Creg_IA_SP: return eec->uregs->sp; -+ case Creg_IA_BP: return eec->uregs->fp; -+ case Creg_S390_R14: return eec->uregs->lr; - # elif defined(VGA_ppc32) || defined(VGA_ppc64) - # else - # error "Unsupported arch" -@@ -2182,6 +2199,24 @@ - case CFIC_ARM_R7REL: - cfa = cfsi->cfa_off + uregs->r7; - break; -+# elif defined(VGA_s390x) -+ case CFIC_IA_SPREL: -+ cfa = cfsi->cfa_off + uregs->sp; -+ break; -+ case CFIR_MEMCFAREL: -+ { -+ Addr a = uregs->sp + cfsi->cfa_off; -+ if (a < min_accessible || a > max_accessible-sizeof(Addr)) -+ break; -+ cfa = *(Addr*)a; -+ break; -+ } -+ case CFIR_SAME: -+ cfa = uregs->fp; -+ break; -+ case CFIC_IA_BPREL: -+ cfa = cfsi->cfa_off + uregs->fp; -+ break; - # elif defined(VGA_ppc32) || defined(VGA_ppc64) - # else - # error "Unsupported arch" -@@ -2234,6 +2269,15 @@ - return compute_cfa(&uregs, - min_accessible, max_accessible, di, cfsi); - } -+#elif defined(VGA_s390x) -+ { D3UnwindRegs uregs; -+ uregs.ia = ip; -+ uregs.sp = sp; -+ uregs.fp = fp; -+ return compute_cfa(&uregs, -+ min_accessible, max_accessible, di, cfsi); -+ } -+ - # else - return 0; /* indicates failure */ - # endif -@@ -2266,6 +2310,8 @@ - ipHere = uregsHere->xip; - # elif defined(VGA_arm) - ipHere = uregsHere->r15; -+# elif defined(VGA_s390x) -+ ipHere = uregsHere->ia; - # elif defined(VGA_ppc32) || defined(VGA_ppc64) - # else - # error "Unknown arch" -@@ -2338,6 +2384,10 @@ - COMPUTE(uregsPrev.r12, uregsHere->r12, cfsi->r12_how, cfsi->r12_off); - COMPUTE(uregsPrev.r11, uregsHere->r11, cfsi->r11_how, cfsi->r11_off); - COMPUTE(uregsPrev.r7, uregsHere->r7, cfsi->r7_how, cfsi->r7_off); -+# elif defined(VGA_s390x) -+ COMPUTE(uregsPrev.ia, uregsHere->ia, cfsi->ra_how, cfsi->ra_off); -+ COMPUTE(uregsPrev.sp, uregsHere->sp, cfsi->sp_how, cfsi->sp_off); -+ COMPUTE(uregsPrev.fp, uregsHere->fp, cfsi->fp_how, cfsi->fp_off); - # elif defined(VGA_ppc32) || defined(VGA_ppc64) - # else - # error "Unknown arch" ---- coregrind/m_debuginfo/debuginfo.c.orig -+++ coregrind/m_debuginfo/debuginfo.c.orig -@@ -0,0 +1,3794 @@ -+ -+/*--------------------------------------------------------------------*/ -+/*--- Top level management of symbols and debugging information. ---*/ -+/*--- debuginfo.c ---*/ -+/*--------------------------------------------------------------------*/ -+ -+/* -+ This file is part of Valgrind, a dynamic binary instrumentation -+ framework. -+ -+ Copyright (C) 2000-2010 Julian Seward -+ jseward@acm.org -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA -+ 02111-1307, USA. -+ -+ The GNU General Public License is contained in the file COPYING. -+*/ -+ -+#include "pub_core_basics.h" -+#include "pub_core_vki.h" -+#include "pub_core_threadstate.h" -+#include "pub_core_debuginfo.h" /* self */ -+#include "pub_core_demangle.h" -+#include "pub_core_libcbase.h" -+#include "pub_core_libcassert.h" -+#include "pub_core_libcprint.h" -+#include "pub_core_libcfile.h" -+#include "pub_core_libcproc.h" // VG_(getenv) -+#include "pub_core_seqmatch.h" -+#include "pub_core_options.h" -+#include "pub_core_redir.h" // VG_(redir_notify_{new,delete}_SegInfo) -+#include "pub_core_aspacemgr.h" -+#include "pub_core_machine.h" // VG_PLAT_USES_PPCTOC -+#include "pub_core_xarray.h" -+#include "pub_core_oset.h" -+#include "pub_core_stacktrace.h" // VG_(get_StackTrace) XXX: circular dependency -+#include "pub_core_ume.h" -+ -+#include "priv_misc.h" /* dinfo_zalloc/free */ -+#include "priv_d3basics.h" /* ML_(pp_GX) */ -+#include "priv_tytypes.h" -+#include "priv_storage.h" -+#include "priv_readdwarf.h" -+#include "priv_readstabs.h" -+#if defined(VGO_linux) -+# include "priv_readelf.h" -+# include "priv_readdwarf3.h" -+# include "priv_readpdb.h" -+#elif defined(VGO_aix5) -+# include "pub_core_debuglog.h" -+# include "pub_core_libcproc.h" -+# include "pub_core_libcfile.h" -+# include "priv_readxcoff.h" -+#elif defined(VGO_darwin) -+# include "priv_readmacho.h" -+# include "priv_readpdb.h" -+#endif -+ -+ -+/*------------------------------------------------------------*/ -+/*--- The _svma / _avma / _image / _bias naming scheme ---*/ -+/*------------------------------------------------------------*/ -+ -+/* JRS 11 Jan 07: I find the different kinds of addresses involved in -+ debuginfo reading confusing. Recently I arrived at some -+ terminology which makes it clearer (to me, at least). There are 3 -+ kinds of address used in the debuginfo reading process: -+ -+ stated VMAs - the address where (eg) a .so says a symbol is, that -+ is, what it tells you if you consider the .so in -+ isolation -+ -+ actual VMAs - the address where (eg) said symbol really wound up -+ after the .so was mapped into memory -+ -+ image addresses - pointers into the copy of the .so (etc) -+ transiently mmaped aboard whilst we read its info -+ -+ Additionally I use the term 'bias' to denote the difference -+ between stated and actual VMAs for a given entity. -+ -+ This terminology is not used consistently, but a start has been -+ made. readelf.c and the call-frame info reader in readdwarf.c now -+ use it. Specifically, various variables and structure fields have -+ been annotated with _avma / _svma / _image / _bias. In places _img -+ is used instead of _image for the sake of brevity. -+*/ -+ -+ -+/*------------------------------------------------------------*/ -+/*--- fwdses ---*/ -+/*------------------------------------------------------------*/ -+ -+static void cfsi_cache__invalidate ( void ); -+ -+ -+/*------------------------------------------------------------*/ -+/*--- Root structure ---*/ -+/*------------------------------------------------------------*/ -+ -+/* The root structure for the entire debug info system. It is a -+ linked list of DebugInfos. */ -+static DebugInfo* debugInfo_list = NULL; -+ -+ -+/* Find 'di' in the debugInfo_list and move it one step closer the the -+ front of the list, so as to make subsequent searches for it -+ cheaper. When used in a controlled way, makes a major improvement -+ in some DebugInfo-search-intensive situations, most notably stack -+ unwinding on amd64-linux. */ -+static void move_DebugInfo_one_step_forward ( DebugInfo* di ) -+{ -+ DebugInfo *di0, *di1, *di2; -+ if (di == debugInfo_list) -+ return; /* already at head of list */ -+ vg_assert(di != NULL); -+ di0 = debugInfo_list; -+ di1 = NULL; -+ di2 = NULL; -+ while (True) { -+ if (di0 == NULL || di0 == di) break; -+ di2 = di1; -+ di1 = di0; -+ di0 = di0->next; -+ } -+ vg_assert(di0 == di); -+ if (di0 != NULL && di1 != NULL && di2 != NULL) { -+ DebugInfo* tmp; -+ /* di0 points to di, di1 to its predecessor, and di2 to di1's -+ predecessor. Swap di0 and di1, that is, move di0 one step -+ closer to the start of the list. */ -+ vg_assert(di2->next == di1); -+ vg_assert(di1->next == di0); -+ tmp = di0->next; -+ di2->next = di0; -+ di0->next = di1; -+ di1->next = tmp; -+ } -+ else -+ if (di0 != NULL && di1 != NULL && di2 == NULL) { -+ /* it's second in the list. */ -+ vg_assert(debugInfo_list == di1); -+ vg_assert(di1->next == di0); -+ di1->next = di0->next; -+ di0->next = di1; -+ debugInfo_list = di0; -+ } -+} -+ -+ -+/*------------------------------------------------------------*/ -+/*--- Notification (acquire/discard) helpers ---*/ -+/*------------------------------------------------------------*/ -+ -+/* Gives out unique abstract handles for allocated DebugInfos. See -+ comment in priv_storage.h, declaration of struct _DebugInfo, for -+ details. */ -+static ULong handle_counter = 1; -+ -+/* Allocate and zero out a new DebugInfo record. */ -+static -+DebugInfo* alloc_DebugInfo( const UChar* filename, -+ const UChar* memname ) -+{ -+ Bool traceme; -+ DebugInfo* di; -+ -+ vg_assert(filename); -+ -+ di = ML_(dinfo_zalloc)("di.debuginfo.aDI.1", sizeof(DebugInfo)); -+ di->handle = handle_counter++; -+ di->filename = ML_(dinfo_strdup)("di.debuginfo.aDI.2", filename); -+ di->memname = memname ? ML_(dinfo_strdup)("di.debuginfo.aDI.3", memname) -+ : NULL; -+ -+ /* Everything else -- pointers, sizes, arrays -- is zeroed by calloc. -+ Now set up the debugging-output flags. */ -+ traceme -+ = VG_(string_match)( VG_(clo_trace_symtab_patt), filename ) -+ || (memname && VG_(string_match)( VG_(clo_trace_symtab_patt), -+ memname )); -+ if (traceme) { -+ di->trace_symtab = VG_(clo_trace_symtab); -+ di->trace_cfi = VG_(clo_trace_cfi); -+ di->ddump_syms = VG_(clo_debug_dump_syms); -+ di->ddump_line = VG_(clo_debug_dump_line); -+ di->ddump_frames = VG_(clo_debug_dump_frames); -+ } -+ -+ return di; -+} -+ -+ -+/* Free a DebugInfo, and also all the stuff hanging off it. */ -+static void free_DebugInfo ( DebugInfo* di ) -+{ -+ Word i, j, n; -+ struct strchunk *chunk, *next; -+ TyEnt* ent; -+ GExpr* gexpr; -+ -+ vg_assert(di != NULL); -+ if (di->filename) ML_(dinfo_free)(di->filename); -+ if (di->symtab) ML_(dinfo_free)(di->symtab); -+ if (di->loctab) ML_(dinfo_free)(di->loctab); -+ if (di->cfsi) ML_(dinfo_free)(di->cfsi); -+ if (di->cfsi_exprs) VG_(deleteXA)(di->cfsi_exprs); -+ if (di->fpo) ML_(dinfo_free)(di->fpo); -+ -+ for (chunk = di->strchunks; chunk != NULL; chunk = next) { -+ next = chunk->next; -+ ML_(dinfo_free)(chunk); -+ } -+ -+ /* Delete the two admin arrays. These lists exist primarily so -+ that we can visit each object exactly once when we need to -+ delete them. */ -+ if (di->admin_tyents) { -+ n = VG_(sizeXA)(di->admin_tyents); -+ for (i = 0; i < n; i++) { -+ ent = (TyEnt*)VG_(indexXA)(di->admin_tyents, i); -+ /* Dump anything hanging off this ent */ -+ ML_(TyEnt__make_EMPTY)(ent); -+ } -+ VG_(deleteXA)(di->admin_tyents); -+ di->admin_tyents = NULL; -+ } -+ -+ if (di->admin_gexprs) { -+ n = VG_(sizeXA)(di->admin_gexprs); -+ for (i = 0; i < n; i++) { -+ gexpr = *(GExpr**)VG_(indexXA)(di->admin_gexprs, i); -+ ML_(dinfo_free)(gexpr); -+ } -+ VG_(deleteXA)(di->admin_gexprs); -+ di->admin_gexprs = NULL; -+ } -+ -+ /* Dump the variable info. This is kinda complex: we must take -+ care not to free items which reside in either the admin lists -+ (as we have just freed them) or which reside in the DebugInfo's -+ string table. */ -+ if (di->varinfo) { -+ for (i = 0; i < VG_(sizeXA)(di->varinfo); i++) { -+ OSet* scope = *(OSet**)VG_(indexXA)(di->varinfo, i); -+ if (!scope) continue; -+ /* iterate over all entries in 'scope' */ -+ VG_(OSetGen_ResetIter)(scope); -+ while (True) { -+ DiAddrRange* arange = VG_(OSetGen_Next)(scope); -+ if (!arange) break; -+ /* for each var in 'arange' */ -+ vg_assert(arange->vars); -+ for (j = 0; j < VG_(sizeXA)( arange->vars ); j++) { -+ DiVariable* var = (DiVariable*)VG_(indexXA)(arange->vars,j); -+ vg_assert(var); -+ /* Nothing to free in var: all the pointer fields refer -+ to stuff either on an admin list, or in -+ .strchunks */ -+ } -+ VG_(deleteXA)(arange->vars); -+ /* Don't free arange itself, as OSetGen_Destroy does -+ that */ -+ } -+ VG_(OSetGen_Destroy)(scope); -+ } -+ VG_(deleteXA)(di->varinfo); -+ } -+ -+ ML_(dinfo_free)(di); -+} -+ -+ -+/* 'si' is a member of debugInfo_list. Find it, remove it from the -+ list, notify m_redir that this has happened, and free all storage -+ reachable from it. -+*/ -+static void discard_DebugInfo ( DebugInfo* di ) -+{ -+# if defined(VGP_ppc32_aix5) -+ HChar* reason = "__unload"; -+# elif defined(VGP_ppc64_aix5) -+ HChar* reason = "kunload64"; -+# else -+ HChar* reason = "munmap"; -+# endif -+ -+ DebugInfo** prev_next_ptr = &debugInfo_list; -+ DebugInfo* curr = debugInfo_list; -+ -+ while (curr) { -+ if (curr == di) { -+ /* Found it; remove from list and free it. */ -+ if (curr->have_dinfo -+ && (VG_(clo_verbosity) > 1 || VG_(clo_trace_redir))) -+ VG_(message)(Vg_DebugMsg, -+ "Discarding syms at %#lx-%#lx in %s due to %s()\n", -+ di->text_avma, -+ di->text_avma + di->text_size, -+ curr->filename ? curr->filename : (UChar*)"???", -+ reason); -+ vg_assert(*prev_next_ptr == curr); -+ *prev_next_ptr = curr->next; -+ if (curr->have_dinfo) -+ VG_(redir_notify_delete_DebugInfo)( curr ); -+ free_DebugInfo(curr); -+ return; -+ } -+ prev_next_ptr = &curr->next; -+ curr = curr->next; -+ } -+ -+ /* Not found. */ -+} -+ -+ -+/* Repeatedly scan debugInfo_list, looking for DebugInfos with text -+ AVMAs intersecting [start,start+length), and call discard_DebugInfo -+ to get rid of them. This modifies the list, hence the multiple -+ iterations. Returns True iff any such DebugInfos were found. -+*/ -+static Bool discard_syms_in_range ( Addr start, SizeT length ) -+{ -+ Bool anyFound = False; -+ Bool found; -+ DebugInfo* curr; -+ -+ while (True) { -+ found = False; -+ -+ curr = debugInfo_list; -+ while (True) { -+ if (curr == NULL) -+ break; -+ if (curr->text_present -+ && curr->text_size > 0 -+ && (start+length - 1 < curr->text_avma -+ || curr->text_avma + curr->text_size - 1 < start)) { -+ /* no overlap */ -+ } else { -+ found = True; -+ break; -+ } -+ curr = curr->next; -+ } -+ -+ if (!found) break; -+ anyFound = True; -+ discard_DebugInfo( curr ); -+ } -+ -+ return anyFound; -+} -+ -+ -+/* Does [s1,+len1) overlap [s2,+len2) ? Note: does not handle -+ wraparound at the end of the address space -- just asserts in that -+ case. */ -+static Bool ranges_overlap (Addr s1, SizeT len1, Addr s2, SizeT len2 ) -+{ -+ Addr e1, e2; -+ if (len1 == 0 || len2 == 0) -+ return False; -+ e1 = s1 + len1 - 1; -+ e2 = s2 + len2 - 1; -+ /* Assert that we don't have wraparound. If we do it would imply -+ that file sections are getting mapped around the end of the -+ address space, which sounds unlikely. */ -+ vg_assert(s1 <= e1); -+ vg_assert(s2 <= e2); -+ if (e1 < s2 || e2 < s1) return False; -+ return True; -+} -+ -+ -+/* Do the basic rx_ and rw_ mappings of the two DebugInfos overlap in -+ any way? */ -+static Bool do_DebugInfos_overlap ( DebugInfo* di1, DebugInfo* di2 ) -+{ -+ vg_assert(di1); -+ vg_assert(di2); -+ -+ if (di1->have_rx_map && di2->have_rx_map -+ && ranges_overlap(di1->rx_map_avma, di1->rx_map_size, -+ di2->rx_map_avma, di2->rx_map_size)) -+ return True; -+ -+ if (di1->have_rx_map && di2->have_rw_map -+ && ranges_overlap(di1->rx_map_avma, di1->rx_map_size, -+ di2->rw_map_avma, di2->rw_map_size)) -+ return True; -+ -+ if (di1->have_rw_map && di2->have_rx_map -+ && ranges_overlap(di1->rw_map_avma, di1->rw_map_size, -+ di2->rx_map_avma, di2->rx_map_size)) -+ return True; -+ -+ if (di1->have_rw_map && di2->have_rw_map -+ && ranges_overlap(di1->rw_map_avma, di1->rw_map_size, -+ di2->rw_map_avma, di2->rw_map_size)) -+ return True; -+ -+ return False; -+} -+ -+ -+/* Discard all elements of debugInfo_list whose .mark bit is set. -+*/ -+static void discard_marked_DebugInfos ( void ) -+{ -+ DebugInfo* curr; -+ -+ while (True) { -+ -+ curr = debugInfo_list; -+ while (True) { -+ if (!curr) -+ break; -+ if (curr->mark) -+ break; -+ curr = curr->next; -+ } -+ -+ if (!curr) break; -+ discard_DebugInfo( curr ); -+ -+ } -+} -+ -+ -+/* Discard any elements of debugInfo_list which overlap with diRef. -+ Clearly diRef must have its rx_ and rw_ mapping information set to -+ something sane. */ -+#if defined(VGO_aix5) -+__attribute__((unused)) -+#endif -+static void discard_DebugInfos_which_overlap_with ( DebugInfo* diRef ) -+{ -+ DebugInfo* di; -+ /* Mark all the DebugInfos in debugInfo_list that need to be -+ deleted. First, clear all the mark bits; then set them if they -+ overlap with siRef. Since siRef itself is in this list we at -+ least expect its own mark bit to be set. */ -+ for (di = debugInfo_list; di; di = di->next) { -+ di->mark = do_DebugInfos_overlap( di, diRef ); -+ if (di == diRef) { -+ vg_assert(di->mark); -+ di->mark = False; -+ } -+ } -+ discard_marked_DebugInfos(); -+} -+ -+ -+/* Find the existing DebugInfo for (memname,filename) or if not found, -+ create one. In the latter case memname and filename are strdup'd -+ into VG_AR_DINFO, and the new DebugInfo is added to -+ debugInfo_list. */ -+static -+DebugInfo* find_or_create_DebugInfo_for ( UChar* filename, UChar* memname ) -+{ -+ DebugInfo* di; -+ vg_assert(filename); -+ for (di = debugInfo_list; di; di = di->next) { -+ vg_assert(di->filename); -+ if (0==VG_(strcmp)(di->filename, filename) -+ && ( (memname && di->memname) -+ ? 0==VG_(strcmp)(memname, di->memname) -+ : True )) -+ break; -+ } -+ if (!di) { -+ di = alloc_DebugInfo(filename, memname); -+ vg_assert(di); -+ di->next = debugInfo_list; -+ debugInfo_list = di; -+ } -+ return di; -+} -+ -+ -+/* Debuginfo reading for 'di' has just been successfully completed. -+ Check that the invariants stated in -+ "Comment_on_IMPORTANT_CFSI_REPRESENTATIONAL_INVARIANTS" in -+ priv_storage.h are observed. */ -+static void check_CFSI_related_invariants ( DebugInfo* di ) -+{ -+ DebugInfo* di2 = NULL; -+ vg_assert(di); -+ /* This fn isn't called until after debuginfo for this object has -+ been successfully read. And that shouldn't happen until we have -+ both a r-x and rw- mapping for the object. Hence: */ -+ vg_assert(di->have_rx_map); -+ vg_assert(di->have_rw_map); -+ /* degenerate case: r-x section is empty */ -+ if (di->rx_map_size == 0) { -+ vg_assert(di->cfsi == NULL); -+ return; -+ } -+ /* normal case: r-x section is nonempty */ -+ /* invariant (0) */ -+ vg_assert(di->rx_map_size > 0); -+ /* invariant (1) */ -+ for (di2 = debugInfo_list; di2; di2 = di2->next) { -+ if (di2 == di) -+ continue; -+ if (di2->rx_map_size == 0) -+ continue; -+ vg_assert(di->rx_map_avma + di->rx_map_size <= di2->rx_map_avma -+ || di2->rx_map_avma + di2->rx_map_size <= di->rx_map_avma); -+ } -+ di2 = NULL; -+ /* invariant (2) */ -+ if (di->cfsi) { -+ vg_assert(di->cfsi_minavma <= di->cfsi_maxavma); /* duh! */ -+ vg_assert(di->cfsi_minavma >= di->rx_map_avma); -+ vg_assert(di->cfsi_maxavma < di->rx_map_avma + di->rx_map_size); -+ } -+ /* invariants (3) and (4) */ -+ if (di->cfsi) { -+ Word i; -+ vg_assert(di->cfsi_used > 0); -+ vg_assert(di->cfsi_size > 0); -+ for (i = 0; i < di->cfsi_used; i++) { -+ DiCfSI* cfsi = &di->cfsi[i]; -+ vg_assert(cfsi->len > 0); -+ vg_assert(cfsi->base >= di->cfsi_minavma); -+ vg_assert(cfsi->base + cfsi->len - 1 <= di->cfsi_maxavma); -+ if (i > 0) { -+ DiCfSI* cfsip = &di->cfsi[i-1]; -+ vg_assert(cfsip->base + cfsip->len <= cfsi->base); -+ } -+ } -+ } else { -+ vg_assert(di->cfsi_used == 0); -+ vg_assert(di->cfsi_size == 0); -+ } -+} -+ -+ -+/*--------------------------------------------------------------*/ -+/*--- ---*/ -+/*--- TOP LEVEL: INITIALISE THE DEBUGINFO SYSTEM ---*/ -+/*--- ---*/ -+/*--------------------------------------------------------------*/ -+ -+void VG_(di_initialise) ( void ) -+{ -+ /* There's actually very little to do here, since everything -+ centers around the DebugInfos in debugInfo_list, they are -+ created and destroyed on demand, and each one is treated more or -+ less independently. */ -+ vg_assert(debugInfo_list == NULL); -+ -+ /* flush the CFI fast query cache. */ -+ cfsi_cache__invalidate(); -+} -+ -+ -+/*--------------------------------------------------------------*/ -+/*--- ---*/ -+/*--- TOP LEVEL: NOTIFICATION (ACQUIRE/DISCARD INFO) (LINUX) ---*/ -+/*--- ---*/ -+/*--------------------------------------------------------------*/ -+ -+#if defined(VGO_linux) || defined(VGO_darwin) -+ -+/* The debug info system is driven by notifications that a text -+ segment has been mapped in, or unmapped. When that happens it -+ tries to acquire/discard whatever info is available for the -+ corresponding object. This section contains the notification -+ handlers. */ -+ -+/* Notify the debuginfo system about a new mapping. This is the way -+ new debug information gets loaded. If allow_SkFileV is True, it -+ will try load debug info if the mapping at 'a' belongs to Valgrind; -+ whereas normally (False) it will not do that. This allows us to -+ carefully control when the thing will read symbols from the -+ Valgrind executable itself. -+ -+ If a call to VG_(di_notify_mmap) causes debug info to be read, then -+ the returned ULong is an abstract handle which can later be used to -+ refer to the debuginfo read as a result of this specific mapping, -+ in later queries to m_debuginfo. In this case the handle value -+ will be one or above. If the returned value is zero, no debug info -+ was read. */ -+ -+ULong VG_(di_notify_mmap)( Addr a, Bool allow_SkFileV ) -+{ -+ NSegment const * seg; -+ HChar* filename; -+ Bool ok, is_rx_map, is_rw_map; -+ DebugInfo* di; -+ ULong di_handle; -+ SysRes fd; -+ Int nread, oflags; -+ HChar buf1k[1024]; -+ Bool debug = False; -+ SysRes statres; -+ struct vg_stat statbuf; -+ -+ /* In short, figure out if this mapping is of interest to us, and -+ if so, try to guess what ld.so is doing and when/if we should -+ read debug info. */ -+ seg = VG_(am_find_nsegment)(a); -+ vg_assert(seg); -+ -+ if (debug) -+ VG_(printf)("di_notify_mmap-1: %#lx-%#lx %c%c%c\n", -+ seg->start, seg->end, -+ seg->hasR ? 'r' : '-', -+ seg->hasW ? 'w' : '-',seg->hasX ? 'x' : '-' ); -+ -+ /* guaranteed by aspacemgr-linux.c, sane_NSegment() */ -+ vg_assert(seg->end > seg->start); -+ -+ /* Ignore non-file mappings */ -+ if ( ! (seg->kind == SkFileC -+ || (seg->kind == SkFileV && allow_SkFileV)) ) -+ return 0; -+ -+ /* If the file doesn't have a name, we're hosed. Give up. */ -+ filename = VG_(am_get_filename)( (NSegment*)seg ); -+ if (!filename) -+ return 0; -+ -+ if (debug) -+ VG_(printf)("di_notify_mmap-2: %s\n", filename); -+ -+ /* Only try to read debug information from regular files. */ -+ statres = VG_(stat)(filename, &statbuf); -+ -+ /* stat dereferences symlinks, so we don't expect it to succeed and -+ yet produce something that is a symlink. */ -+ vg_assert(sr_isError(statres) || ! VKI_S_ISLNK(statbuf.mode)); -+ -+ /* Don't let the stat call fail silently. Filter out some known -+ sources of noise before complaining, though. */ -+ if (sr_isError(statres)) { -+ DebugInfo fake_di; -+ Bool quiet = VG_(strstr)(filename, "/var/run/nscd/") != NULL; -+ if (!quiet && VG_(clo_verbosity) > 1) { -+ VG_(memset)(&fake_di, 0, sizeof(fake_di)); -+ fake_di.filename = filename; -+ ML_(symerr)(&fake_di, True, "failed to stat64/stat this file"); -+ } -+ return 0; -+ } -+ -+ /* Finally, the point of all this stattery: if it's not a regular file, -+ don't try to read debug info from it. */ -+ if (! VKI_S_ISREG(statbuf.mode)) -+ return 0; -+ -+ /* no uses of statbuf below here. */ -+ -+ /* Now we have to guess if this is a text-like mapping, a data-like -+ mapping, neither or both. The rules are: -+ -+ text if: x86-linux r and x -+ other-linux r and x and not w -+ -+ data if: x86-linux r and w -+ other-linux r and w and not x -+ -+ Background: On x86-linux, objects are typically mapped twice: -+ -+ 1b8fb000-1b8ff000 r-xp 00000000 08:02 4471477 vgpreload_memcheck.so -+ 1b8ff000-1b900000 rw-p 00004000 08:02 4471477 vgpreload_memcheck.so -+ -+ whereas ppc32-linux mysteriously does this: -+ -+ 118a6000-118ad000 r-xp 00000000 08:05 14209428 vgpreload_memcheck.so -+ 118ad000-118b6000 ---p 00007000 08:05 14209428 vgpreload_memcheck.so -+ 118b6000-118bd000 rwxp 00000000 08:05 14209428 vgpreload_memcheck.so -+ -+ The third mapping should not be considered to have executable -+ code in. Therefore a test which works for both is: r and x and -+ NOT w. Reading symbols from the rwx segment -- which overlaps -+ the r-x segment in the file -- causes the redirection mechanism -+ to redirect to addresses in that third segment, which is wrong -+ and causes crashes. -+ -+ JRS 28 Dec 05: unfortunately icc 8.1 on x86 has been seen to -+ produce executables with a single rwx segment rather than a -+ (r-x,rw-) pair. That means the rules have to be modified thusly: -+ -+ x86-linux: consider if r and x -+ all others: consider if r and x and not w -+ -+ 2009 Aug 16: apply similar kludge to ppc32-linux. -+ See http://bugs.kde.org/show_bug.cgi?id=190820 -+ */ -+ is_rx_map = False; -+ is_rw_map = False; -+# if defined(VGA_x86) || defined(VGA_ppc32) -+ is_rx_map = seg->hasR && seg->hasX; -+ is_rw_map = seg->hasR && seg->hasW; -+# elif defined(VGA_amd64) || defined(VGA_ppc64) || defined(VGA_arm) -+ is_rx_map = seg->hasR && seg->hasX && !seg->hasW; -+ is_rw_map = seg->hasR && seg->hasW && !seg->hasX; -+# else -+# error "Unknown platform" -+# endif -+ -+ if (debug) -+ VG_(printf)("di_notify_mmap-3: is_rx_map %d, is_rw_map %d\n", -+ (Int)is_rx_map, (Int)is_rw_map); -+ -+ /* If it is neither text-ish nor data-ish, we're not interested. */ -+ if (!(is_rx_map || is_rw_map)) -+ return 0; -+ -+ /* Peer at the first few bytes of the file, to see if it is an ELF */ -+ /* object file. Ignore the file if we do not have read permission. */ -+ VG_(memset)(buf1k, 0, sizeof(buf1k)); -+ oflags = VKI_O_RDONLY; -+# if defined(VKI_O_LARGEFILE) -+ oflags |= VKI_O_LARGEFILE; -+# endif -+ fd = VG_(open)( filename, oflags, 0 ); -+ if (sr_isError(fd)) { -+ if (sr_Err(fd) != VKI_EACCES) { -+ DebugInfo fake_di; -+ VG_(memset)(&fake_di, 0, sizeof(fake_di)); -+ fake_di.filename = filename; -+ ML_(symerr)(&fake_di, True, "can't open file to inspect ELF header"); -+ } -+ return 0; -+ } -+ nread = VG_(read)( sr_Res(fd), buf1k, sizeof(buf1k) ); -+ VG_(close)( sr_Res(fd) ); -+ -+ if (nread == 0) -+ return 0; -+ if (nread < 0) { -+ DebugInfo fake_di; -+ VG_(memset)(&fake_di, 0, sizeof(fake_di)); -+ fake_di.filename = filename; -+ ML_(symerr)(&fake_di, True, "can't read file to inspect ELF header"); -+ return 0; -+ } -+ vg_assert(nread > 0 && nread <= sizeof(buf1k) ); -+ -+ /* We're only interested in mappings of object files. */ -+ // Nb: AIX5 doesn't use this file and so isn't represented here. -+#if defined(VGO_linux) -+ if (!ML_(is_elf_object_file)( buf1k, (SizeT)nread )) -+ return 0; -+#elif defined(VGO_darwin) -+ if (!ML_(is_macho_object_file)( buf1k, (SizeT)nread )) -+ return 0; -+#else -+# error "unknown OS" -+#endif -+ -+ /* See if we have a DebugInfo for this filename. If not, -+ create one. */ -+ di = find_or_create_DebugInfo_for( filename, NULL/*membername*/ ); -+ vg_assert(di); -+ -+ if (is_rx_map) { -+ /* We have a text-like mapping. Note the details. */ -+ if (!di->have_rx_map) { -+ di->have_rx_map = True; -+ di->rx_map_avma = a; -+ di->rx_map_size = seg->end + 1 - seg->start; -+ di->rx_map_foff = seg->offset; -+ } else { -+ /* FIXME: complain about a second text-like mapping */ -+ } -+ } -+ -+ if (is_rw_map) { -+ /* We have a data-like mapping. Note the details. */ -+ if (!di->have_rw_map) { -+ di->have_rw_map = True; -+ di->rw_map_avma = a; -+ di->rw_map_size = seg->end + 1 - seg->start; -+ di->rw_map_foff = seg->offset; -+ } else { -+ /* FIXME: complain about a second data-like mapping */ -+ } -+ } -+ -+ /* If we don't have an rx and rw mapping, or if we already have -+ debuginfo for this mapping for whatever reason, go no -+ further. */ -+ if ( ! (di->have_rx_map && di->have_rw_map && !di->have_dinfo) ) -+ return 0; -+ -+ /* Ok, so, finally, let's try to read the debuginfo. */ -+ vg_assert(di->filename); -+ TRACE_SYMTAB("\n"); -+ TRACE_SYMTAB("------ start ELF OBJECT " -+ "------------------------------\n"); -+ TRACE_SYMTAB("------ name = %s\n", di->filename); -+ TRACE_SYMTAB("\n"); -+ -+ /* We're going to read symbols and debug info for the avma -+ ranges [rx_map_avma, +rx_map_size) and [rw_map_avma, -+ +rw_map_size). First get rid of any other DebugInfos which -+ overlap either of those ranges (to avoid total confusion). */ -+ discard_DebugInfos_which_overlap_with( di ); -+ -+ /* .. and acquire new info. */ -+ // Nb: AIX5 doesn't use this file and so isn't represented here. -+#if defined(VGO_linux) -+ ok = ML_(read_elf_debug_info)( di ); -+#elif defined(VGO_darwin) -+ ok = ML_(read_macho_debug_info)( di ); -+#else -+# error "unknown OS" -+#endif -+ -+ if (ok) { -+ -+ TRACE_SYMTAB("\n------ Canonicalising the " -+ "acquired info ------\n"); -+ /* invalidate the CFI unwind cache. */ -+ cfsi_cache__invalidate(); -+ /* prepare read data for use */ -+ ML_(canonicaliseTables)( di ); -+ /* notify m_redir about it */ -+ TRACE_SYMTAB("\n------ Notifying m_redir ------\n"); -+ VG_(redir_notify_new_DebugInfo)( di ); -+ /* Note that we succeeded */ -+ di->have_dinfo = True; -+ tl_assert(di->handle > 0); -+ di_handle = di->handle; -+ /* Check invariants listed in -+ Comment_on_IMPORTANT_REPRESENTATIONAL_INVARIANTS in -+ priv_storage.h. */ -+ check_CFSI_related_invariants(di); -+ -+ } else { -+ TRACE_SYMTAB("\n------ ELF reading failed ------\n"); -+ /* Something went wrong (eg. bad ELF file). Should we delete -+ this DebugInfo? No - it contains info on the rw/rx -+ mappings, at least. */ -+ di_handle = 0; -+ vg_assert(di->have_dinfo == False); -+ } -+ -+ TRACE_SYMTAB("\n"); -+ TRACE_SYMTAB("------ name = %s\n", di->filename); -+ TRACE_SYMTAB("------ end ELF OBJECT " -+ "------------------------------\n"); -+ TRACE_SYMTAB("\n"); -+ -+ return di_handle; -+} -+ -+ -+/* Unmap is simpler - throw away any SegInfos intersecting -+ [a, a+len). */ -+void VG_(di_notify_munmap)( Addr a, SizeT len ) -+{ -+ Bool anyFound; -+ if (0) VG_(printf)("DISCARD %#lx %#lx\n", a, a+len); -+ anyFound = discard_syms_in_range(a, len); -+ if (anyFound) -+ cfsi_cache__invalidate(); -+} -+ -+ -+/* Uh, this doesn't do anything at all. IIRC glibc (or ld.so, I don't -+ remember) does a bunch of mprotects on itself, and if we follow -+ through here, it causes the debug info for that object to get -+ discarded. */ -+void VG_(di_notify_mprotect)( Addr a, SizeT len, UInt prot ) -+{ -+ Bool exe_ok = toBool(prot & VKI_PROT_EXEC); -+# if defined(VGA_x86) -+ exe_ok = exe_ok || toBool(prot & VKI_PROT_READ); -+# endif -+ if (0 && !exe_ok) { -+ Bool anyFound = discard_syms_in_range(a, len); -+ if (anyFound) -+ cfsi_cache__invalidate(); -+ } -+} -+ -+/*--------- PDB (windows debug info) reading --------- */ -+ -+/* this should really return ULong, as per VG_(di_notify_mmap). */ -+void VG_(di_notify_pdb_debuginfo)( Int fd_obj, Addr avma_obj, -+ SizeT total_size, -+ PtrdiffT unknown_purpose__reloc ) -+{ -+ Int i, r, sz_exename; -+ ULong obj_mtime, pdb_mtime; -+ Char exename[VKI_PATH_MAX]; -+ Char* pdbname = NULL; -+ Char* dot; -+ SysRes sres; -+ Int fd_pdbimage; -+ SizeT n_pdbimage; -+ struct vg_stat stat_buf; -+ -+ if (VG_(clo_verbosity) > 0) { -+ VG_(message)(Vg_UserMsg, "\n"); -+ VG_(message)(Vg_UserMsg, -+ "LOAD_PDB_DEBUGINFO(fd=%d, avma=%#lx, total_size=%lu, " -+ "uu_reloc=%#lx)\n", -+ fd_obj, avma_obj, total_size, unknown_purpose__reloc -+ ); -+ } -+ -+ /* 'fd' refers to the .exe/.dll we're dealing with. Get its modification -+ time into obj_mtime. */ -+ r = VG_(fstat)(fd_obj, &stat_buf); -+ if (r == -1) -+ goto out; /* stat failed ?! */ -+ vg_assert(r == 0); -+ obj_mtime = stat_buf.mtime; -+ -+ /* and get its name into exename[]. */ -+ vg_assert(VKI_PATH_MAX > 100); /* to ensure /proc/self/fd/%d is safe */ -+ VG_(memset)(exename, 0, sizeof(exename)); -+ VG_(sprintf)(exename, "/proc/self/fd/%d", fd_obj); -+ /* convert exename from a symlink to real name .. overwrites the -+ old contents of the buffer. Ick. */ -+ sz_exename = VG_(readlink)(exename, exename, sizeof(exename)-2 ); -+ if (sz_exename == -1) -+ goto out; /* readlink failed ?! */ -+ vg_assert(sz_exename >= 0 && sz_exename < sizeof(exename)); -+ vg_assert(exename[sizeof(exename)-1] == 0); -+ -+ if (VG_(clo_verbosity) > 0) { -+ VG_(message)(Vg_UserMsg, "LOAD_PDB_DEBUGINFO: objname: %s\n", exename); -+ } -+ -+ /* Try to get the PDB file name from the executable. */ -+ pdbname = ML_(find_name_of_pdb_file)(exename); -+ if (pdbname) { -+ vg_assert(VG_(strlen)(pdbname) >= 5); /* 5 = strlen("X.pdb") */ -+ /* So we successfully extracted a name from the PE file. But it's -+ likely to be of the form -+ e:\foo\bar\xyzzy\wibble.pdb -+ and we need to change it into something we can actually open -+ in Wine-world, which basically means turning it into -+ $HOME/.wine/drive_e/foo/bar/xyzzy/wibble.pdb -+ We also take into account $WINEPREFIX, if it is set. -+ For the moment, if the name isn't fully qualified, just forget it -+ (we'd have to root around to find where the pdb actually is) -+ */ -+ /* Change all the backslashes to forward slashes */ -+ for (i = 0; pdbname[i]; i++) { -+ if (pdbname[i] == '\\') -+ pdbname[i] = '/'; -+ } -+ Bool is_quald -+ = ('a' <= VG_(tolower)(pdbname[0]) && VG_(tolower)(pdbname[0]) <= 'z') -+ && pdbname[1] == ':' -+ && pdbname[2] == '/'; -+ HChar* home = VG_(getenv)("HOME"); -+ HChar* wpfx = VG_(getenv)("WINEPREFIX"); -+ if (is_quald && wpfx) { -+ /* Change e:/foo/bar/xyzzy/wibble.pdb -+ to $WINEPREFIX/drive_e/foo/bar/xyzzy/wibble.pdb -+ */ -+ Int mashedSzB = VG_(strlen)(pdbname) + VG_(strlen)(wpfx) + 50/*misc*/; -+ HChar* mashed = ML_(dinfo_zalloc)("di.debuginfo.dnpdi.1", mashedSzB); -+ VG_(sprintf)(mashed, "%s/drive_%c%s", -+ wpfx, pdbname[0], &pdbname[2]); -+ vg_assert(mashed[mashedSzB-1] == 0); -+ ML_(dinfo_free)(pdbname); -+ pdbname = mashed; -+ } -+ else if (is_quald && home && !wpfx) { -+ /* Change e:/foo/bar/xyzzy/wibble.pdb -+ to $HOME/.wine/drive_e/foo/bar/xyzzy/wibble.pdb -+ */ -+ Int mashedSzB = VG_(strlen)(pdbname) + VG_(strlen)(home) + 50/*misc*/; -+ HChar* mashed = ML_(dinfo_zalloc)("di.debuginfo.dnpdi.2", mashedSzB); -+ VG_(sprintf)(mashed, "%s/.wine/drive_%c%s", -+ home, pdbname[0], &pdbname[2]); -+ vg_assert(mashed[mashedSzB-1] == 0); -+ ML_(dinfo_free)(pdbname); -+ pdbname = mashed; -+ } else { -+ /* It's not a fully qualified path, or neither $HOME nor $WINE -+ are set (strange). Give up. */ -+ ML_(dinfo_free)(pdbname); -+ pdbname = NULL; -+ } -+ } -+ -+ /* Try s/exe/pdb/ if we don't have a valid pdbname. */ -+ if (!pdbname) { -+ /* Try to find a matching PDB file from which to read debuginfo. -+ Windows PE files have symbol tables and line number information, -+ but MSVC doesn't seem to use them. */ -+ /* Why +5 ? Because in the worst case, we could find a dot as the -+ last character of pdbname, and we'd then put "pdb" right after -+ it, hence extending it a bit. */ -+ pdbname = ML_(dinfo_zalloc)("di.debuginfo.lpd1", sz_exename+5); -+ VG_(strcpy)(pdbname, exename); -+ vg_assert(pdbname[sz_exename+5-1] == 0); -+ dot = VG_(strrchr)(pdbname, '.'); -+ if (!dot) -+ goto out; /* there's no dot in the exe's name ?! */ -+ if (dot[1] == 0) -+ goto out; /* hmm, path ends in "." */ -+ -+ if ('A' <= dot[1] && dot[1] <= 'Z') -+ VG_(strcpy)(dot, ".PDB"); -+ else -+ VG_(strcpy)(dot, ".pdb"); -+ -+ vg_assert(pdbname[sz_exename+5-1] == 0); -+ } -+ -+ /* See if we can find it, and check it's in-dateness. */ -+ sres = VG_(stat)(pdbname, &stat_buf); -+ if (sr_isError(sres)) { -+ VG_(message)(Vg_UserMsg, "Warning: Missing or un-stat-able %s\n", -+ pdbname); -+ if (VG_(clo_verbosity) > 0) -+ VG_(message)(Vg_UserMsg, "LOAD_PDB_DEBUGINFO: missing: %s\n", pdbname); -+ goto out; -+ } -+ pdb_mtime = stat_buf.mtime; -+ -+ if (obj_mtime > pdb_mtime + 60ULL) { -+ /* PDB file is older than PE file. Really, the PDB should be -+ newer than the PE, but that doesn't always seem to be the -+ case. Allow the PDB to be up to one minute older. -+ Otherwise, it's probably out of date, in which case ignore it -+ or we will either (a) print wrong stack traces or more likely -+ (b) crash. -+ */ -+ VG_(message)(Vg_UserMsg, -+ "Warning: %s (mtime = %llu)\n" -+ " is older than %s (mtime = %llu)\n", -+ pdbname, pdb_mtime, exename, obj_mtime); -+ } -+ -+ sres = VG_(open)(pdbname, VKI_O_RDONLY, 0); -+ if (sr_isError(sres)) { -+ VG_(message)(Vg_UserMsg, "Warning: Can't open %s\n", pdbname); -+ goto out; -+ } -+ -+ /* Looks promising; go on to try and read stuff from it. */ -+ fd_pdbimage = sr_Res(sres); -+ n_pdbimage = stat_buf.size; -+ sres = VG_(am_mmap_file_float_valgrind)( n_pdbimage, VKI_PROT_READ, -+ fd_pdbimage, 0 ); -+ if (sr_isError(sres)) { -+ VG_(close)(fd_pdbimage); -+ goto out; -+ } -+ -+ if (VG_(clo_verbosity) > 0) -+ VG_(message)(Vg_UserMsg, "LOAD_PDB_DEBUGINFO: pdbname: %s\n", pdbname); -+ -+ /* play safe; always invalidate the CFI cache. I don't know if -+ this is necessary, but anyway .. */ -+ cfsi_cache__invalidate(); -+ /* dump old info for this range, if any */ -+ discard_syms_in_range( avma_obj, total_size ); -+ -+ { void* pdbimage = (void*)sr_Res(sres); -+ DebugInfo* di = find_or_create_DebugInfo_for(exename, NULL/*membername*/ ); -+ -+ /* this di must be new, since we just nuked any old stuff in the range */ -+ vg_assert(di && !di->have_rx_map && !di->have_rw_map); -+ vg_assert(!di->have_dinfo); -+ -+ /* don't set up any of the di-> fields; let -+ ML_(read_pdb_debug_info) do it. */ -+ ML_(read_pdb_debug_info)( di, avma_obj, unknown_purpose__reloc, -+ pdbimage, n_pdbimage, pdbname, pdb_mtime ); -+ // JRS fixme: take notice of return value from read_pdb_debug_info, -+ // and handle failure -+ vg_assert(di->have_dinfo); // fails if PDB read failed -+ VG_(am_munmap_valgrind)( (Addr)pdbimage, n_pdbimage ); -+ VG_(close)(fd_pdbimage); -+ } -+ -+ out: -+ if (pdbname) ML_(dinfo_free)(pdbname); -+} -+ -+#endif /* defined(VGO_linux) || defined(VGO_darwin) */ -+ -+ -+/*-------------------------------------------------------------*/ -+/*--- ---*/ -+/*--- TOP LEVEL: NOTIFICATION (ACQUIRE/DISCARD INFO) (AIX5) ---*/ -+/*--- ---*/ -+/*-------------------------------------------------------------*/ -+ -+#if defined(VGO_aix5) -+ -+/* The supplied parameters describe a code segment and its associated -+ data segment, that have recently been mapped in -- so we need to -+ read debug info for it -- or conversely, have recently been dumped, -+ in which case the relevant debug info has to be unloaded. */ -+ -+ULong VG_(di_aix5_notify_segchange)( -+ Addr code_start, -+ Word code_len, -+ Addr data_start, -+ Word data_len, -+ UChar* file_name, -+ UChar* mem_name, -+ Bool is_mainexe, -+ Bool acquire ) -+{ -+ ULong hdl = 0; -+ -+ /* play safe; always invalidate the CFI cache. Not -+ that it should be used on AIX, but still .. */ -+ cfsi_cache__invalidate(); -+ -+ if (acquire) { -+ -+ Bool ok; -+ DebugInfo* di; -+ di = find_or_create_DebugInfo_for( file_name, mem_name ); -+ vg_assert(di); -+ -+ if (code_len > 0) { -+ di->text_present = True; -+ di->text_svma = 0; /* don't know yet */ -+ di->text_bias = 0; /* don't know yet */ -+ di->text_avma = code_start; -+ di->text_size = code_len; -+ } -+ if (data_len > 0) { -+ di->data_present = True; -+ di->data_svma = 0; /* don't know yet */ -+ di->data_bias = 0; /* don't know yet */ -+ di->data_avma = data_start; -+ di->data_size = data_len; -+ } -+ -+ /* These need to be filled in in order to keep various -+ assertions in storage.c happy. In particular see -+ "Comment_Regarding_Text_Range_Checks" in that file. */ -+ di->have_rx_map = True; -+ di->rx_map_avma = code_start; -+ di->rx_map_size = code_len; -+ di->have_rw_map = True; -+ di->rw_map_avma = data_start; -+ di->rw_map_size = data_len; -+ -+ ok = ML_(read_xcoff_debug_info) ( di, is_mainexe ); -+ -+ if (ok) { -+ /* prepare read data for use */ -+ ML_(canonicaliseTables)( di ); -+ /* notify m_redir about it */ -+ VG_(redir_notify_new_DebugInfo)( di ); -+ /* Note that we succeeded */ -+ di->have_dinfo = True; -+ hdl = di->handle; -+ vg_assert(hdl > 0); -+ /* Check invariants listed in -+ Comment_on_IMPORTANT_REPRESENTATIONAL_INVARIANTS in -+ priv_storage.h. */ -+ check_CFSI_related_invariants(di); -+ } else { -+ /* Something went wrong (eg. bad XCOFF file). */ -+ discard_DebugInfo( di ); -+ di = NULL; -+ } -+ -+ } else { -+ -+ /* Dump all the debugInfos whose text segments intersect -+ code_start/code_len. */ -+ /* CFI cache is always invalidated at start of this routine. -+ Hence it's safe to ignore the return value of -+ discard_syms_in_range. */ -+ if (code_len > 0) -+ (void)discard_syms_in_range( code_start, code_len ); -+ -+ } -+ -+ return hdl; -+} -+ -+ -+#endif /* defined(VGO_aix5) */ -+ -+ -+/*------------------------------------------------------------*/ -+/*--- ---*/ -+/*--- TOP LEVEL: QUERYING EXISTING DEBUG INFO ---*/ -+/*--- ---*/ -+/*------------------------------------------------------------*/ -+ -+void VG_(di_discard_ALL_debuginfo)( void ) -+{ -+ DebugInfo *di, *di2; -+ di = debugInfo_list; -+ while (di) { -+ di2 = di->next; -+ VG_(printf)("XXX rm %p\n", di); -+ free_DebugInfo( di ); -+ di = di2; -+ } -+} -+ -+ -+/*------------------------------------------------------------*/ -+/*--- Use of symbol table & location info to create ---*/ -+/*--- plausible-looking stack dumps. ---*/ -+/*------------------------------------------------------------*/ -+ -+/* Search all symtabs that we know about to locate ptr. If found, set -+ *pdi to the relevant DebugInfo, and *symno to the symtab entry -+ *number within that. If not found, *psi is set to NULL. -+ If findText==True, only text symbols are searched for. -+ If findText==False, only data symbols are searched for. -+*/ -+static void search_all_symtabs ( Addr ptr, /*OUT*/DebugInfo** pdi, -+ /*OUT*/Word* symno, -+ Bool match_anywhere_in_sym, -+ Bool findText ) -+{ -+ Word sno; -+ DebugInfo* di; -+ Bool inRange; -+ -+ for (di = debugInfo_list; di != NULL; di = di->next) { -+ -+ if (findText) { -+ /* Consider any symbol in the r-x mapped area to be text. -+ See Comment_Regarding_Text_Range_Checks in storage.c for -+ details. */ -+ inRange = di->have_rx_map -+ && di->rx_map_size > 0 -+ && di->rx_map_avma <= ptr -+ && ptr < di->rx_map_avma + di->rx_map_size; -+ } else { -+ inRange = (di->data_present -+ && di->data_size > 0 -+ && di->data_avma <= ptr -+ && ptr < di->data_avma + di->data_size) -+ || -+ (di->sdata_present -+ && di->sdata_size > 0 -+ && di->sdata_avma <= ptr -+ && ptr < di->sdata_avma + di->sdata_size) -+ || -+ (di->bss_present -+ && di->bss_size > 0 -+ && di->bss_avma <= ptr -+ && ptr < di->bss_avma + di->bss_size) -+ || -+ (di->sbss_present -+ && di->sbss_size > 0 -+ && di->sbss_avma <= ptr -+ && ptr < di->sbss_avma + di->sbss_size) -+ || -+ (di->rodata_present -+ && di->rodata_size > 0 -+ && di->rodata_avma <= ptr -+ && ptr < di->rodata_avma + di->rodata_size); -+ } -+ -+ if (!inRange) continue; -+ -+ sno = ML_(search_one_symtab) ( -+ di, ptr, match_anywhere_in_sym, findText ); -+ if (sno == -1) goto not_found; -+ *symno = sno; -+ *pdi = di; -+ return; -+ -+ } -+ not_found: -+ *pdi = NULL; -+} -+ -+ -+/* Search all loctabs that we know about to locate ptr. If found, set -+ *pdi to the relevant DebugInfo, and *locno to the loctab entry -+ *number within that. If not found, *pdi is set to NULL. */ -+static void search_all_loctabs ( Addr ptr, /*OUT*/DebugInfo** pdi, -+ /*OUT*/Word* locno ) -+{ -+ Word lno; -+ DebugInfo* di; -+ for (di = debugInfo_list; di != NULL; di = di->next) { -+ if (di->text_present -+ && di->text_size > 0 -+ && di->text_avma <= ptr -+ && ptr < di->text_avma + di->text_size) { -+ lno = ML_(search_one_loctab) ( di, ptr ); -+ if (lno == -1) goto not_found; -+ *locno = lno; -+ *pdi = di; -+ return; -+ } -+ } -+ not_found: -+ *pdi = NULL; -+} -+ -+ -+/* The whole point of this whole big deal: map a code address to a -+ plausible symbol name. Returns False if no idea; otherwise True. -+ Caller supplies buf and nbuf. If do_cxx_demangling is False, don't do -+ C++ demangling, regardless of VG_(clo_demangle) -- probably because the -+ call has come from VG_(get_fnname_raw)(). findText -+ indicates whether we're looking for a text symbol or a data symbol -+ -- caller must choose one kind or the other. */ -+static -+Bool get_sym_name ( Bool do_cxx_demangling, Bool do_z_demangling, -+ Bool do_below_main_renaming, -+ Addr a, Char* buf, Int nbuf, -+ Bool match_anywhere_in_sym, Bool show_offset, -+ Bool findText, /*OUT*/PtrdiffT* offsetP ) -+{ -+ DebugInfo* di; -+ Word sno; -+ PtrdiffT offset; -+ -+ search_all_symtabs ( a, &di, &sno, match_anywhere_in_sym, findText ); -+ if (di == NULL) -+ return False; -+ -+ VG_(demangle) ( do_cxx_demangling, do_z_demangling, -+ di->symtab[sno].name, buf, nbuf ); -+ -+ /* Do the below-main hack */ -+ // To reduce the endless nuisance of multiple different names -+ // for "the frame below main()" screwing up the testsuite, change all -+ // known incarnations of said into a single name, "(below main)", if -+ // --show-below-main=yes. -+ if ( do_below_main_renaming && ! VG_(clo_show_below_main) && -+ Vg_FnNameBelowMain == VG_(get_fnname_kind)(buf) ) -+ { -+ VG_(strncpy_safely)(buf, "(below main)", nbuf); -+ } -+ offset = a - di->symtab[sno].addr; -+ if (offsetP) *offsetP = offset; -+ -+ if (show_offset && offset != 0) { -+ Char buf2[12]; -+ Char* symend = buf + VG_(strlen)(buf); -+ Char* end = buf + nbuf; -+ Int len; -+ -+ len = VG_(sprintf)(buf2, "%c%ld", -+ offset < 0 ? '-' : '+', -+ offset < 0 ? -offset : offset); -+ vg_assert(len < (Int)sizeof(buf2)); -+ -+ if (len < (end - symend)) { -+ Char *cp = buf2; -+ VG_(memcpy)(symend, cp, len+1); -+ } -+ } -+ -+ buf[nbuf-1] = 0; /* paranoia */ -+ -+ return True; -+} -+ -+/* ppc64-linux only: find the TOC pointer (R2 value) that should be in -+ force at the entry point address of the function containing -+ guest_code_addr. Returns 0 if not known. */ -+Addr VG_(get_tocptr) ( Addr guest_code_addr ) -+{ -+ DebugInfo* si; -+ Word sno; -+ search_all_symtabs ( guest_code_addr, -+ &si, &sno, -+ True/*match_anywhere_in_fun*/, -+ True/*consider text symbols only*/ ); -+ if (si == NULL) -+ return 0; -+ else -+ return si->symtab[sno].tocptr; -+} -+ -+/* This is available to tools... always demangle C++ names, -+ match anywhere in function, but don't show offsets. */ -+Bool VG_(get_fnname) ( Addr a, Char* buf, Int nbuf ) -+{ -+ return get_sym_name ( /*C++-demangle*/True, /*Z-demangle*/True, -+ /*below-main-renaming*/True, -+ a, buf, nbuf, -+ /*match_anywhere_in_fun*/True, -+ /*show offset?*/False, -+ /*text syms only*/True, -+ /*offsetP*/NULL ); -+} -+ -+/* This is available to tools... always demangle C++ names, -+ match anywhere in function, and show offset if nonzero. */ -+Bool VG_(get_fnname_w_offset) ( Addr a, Char* buf, Int nbuf ) -+{ -+ return get_sym_name ( /*C++-demangle*/True, /*Z-demangle*/True, -+ /*below-main-renaming*/True, -+ a, buf, nbuf, -+ /*match_anywhere_in_fun*/True, -+ /*show offset?*/True, -+ /*text syms only*/True, -+ /*offsetP*/NULL ); -+} -+ -+/* This is available to tools... always demangle C++ names, -+ only succeed if 'a' matches first instruction of function, -+ and don't show offsets. */ -+Bool VG_(get_fnname_if_entry) ( Addr a, Char* buf, Int nbuf ) -+{ -+ return get_sym_name ( /*C++-demangle*/True, /*Z-demangle*/True, -+ /*below-main-renaming*/True, -+ a, buf, nbuf, -+ /*match_anywhere_in_fun*/False, -+ /*show offset?*/False, -+ /*text syms only*/True, -+ /*offsetP*/NULL ); -+} -+ -+/* This is only available to core... don't C++-demangle, don't Z-demangle, -+ don't rename below-main, match anywhere in function, and don't show -+ offsets. */ -+Bool VG_(get_fnname_raw) ( Addr a, Char* buf, Int nbuf ) -+{ -+ return get_sym_name ( /*C++-demangle*/False, /*Z-demangle*/False, -+ /*below-main-renaming*/False, -+ a, buf, nbuf, -+ /*match_anywhere_in_fun*/True, -+ /*show offset?*/False, -+ /*text syms only*/True, -+ /*offsetP*/NULL ); -+} -+ -+/* This is only available to core... don't demangle C++ names, but do -+ do Z-demangling and below-main-renaming, match anywhere in function, and -+ don't show offsets. */ -+Bool VG_(get_fnname_no_cxx_demangle) ( Addr a, Char* buf, Int nbuf ) -+{ -+ return get_sym_name ( /*C++-demangle*/False, /*Z-demangle*/True, -+ /*below-main-renaming*/True, -+ a, buf, nbuf, -+ /*match_anywhere_in_fun*/True, -+ /*show offset?*/False, -+ /*text syms only*/True, -+ /*offsetP*/NULL ); -+} -+ -+Vg_FnNameKind VG_(get_fnname_kind) ( Char* name ) -+{ -+ if (VG_STREQ("main", name)) { -+ return Vg_FnNameMain; -+ -+ } else if ( -+# if defined(VGO_linux) -+ VG_STREQ("__libc_start_main", name) || // glibc glibness -+ VG_STREQ("generic_start_main", name) || // Yellow Dog doggedness -+# elif defined(VGO_aix5) -+ VG_STREQ("__start", name) || // AIX aches -+# elif defined(VGO_darwin) -+ // See readmacho.c for an explanation of this. -+ VG_STREQ("start_according_to_valgrind", name) || // Darwin, darling -+# else -+# error "Unknown OS" -+# endif -+ 0) { -+ return Vg_FnNameBelowMain; -+ -+ } else { -+ return Vg_FnNameNormal; -+ } -+} -+ -+Vg_FnNameKind VG_(get_fnname_kind_from_IP) ( Addr ip ) -+{ -+ // We don't need a big buffer; all the special names are small. -+ #define BUFLEN 50 -+ Char buf[50]; -+ -+ // We don't demangle, because it's faster not to, and the special names -+ // we're looking for won't be demangled. -+ if (VG_(get_fnname_raw) ( ip, buf, BUFLEN )) { -+ buf[BUFLEN-1] = '\0'; // paranoia -+ return VG_(get_fnname_kind)(buf); -+ } else { -+ return Vg_FnNameNormal; // Don't know the name, treat it as normal. -+ } -+} -+ -+/* Looks up data_addr in the collection of data symbols, and if found -+ puts its name (or as much as will fit) into dname[0 .. n_dname-1], -+ which is guaranteed to be zero terminated. Also data_addr's offset -+ from the symbol start is put into *offset. */ -+Bool VG_(get_datasym_and_offset)( Addr data_addr, -+ /*OUT*/Char* dname, Int n_dname, -+ /*OUT*/PtrdiffT* offset ) -+{ -+ Bool ok; -+ vg_assert(n_dname > 1); -+ ok = get_sym_name ( /*C++-demangle*/False, /*Z-demangle*/False, -+ /*below-main-renaming*/False, -+ data_addr, dname, n_dname, -+ /*match_anywhere_in_sym*/True, -+ /*show offset?*/False, -+ /*data syms only please*/False, -+ offset ); -+ if (!ok) -+ return False; -+ dname[n_dname-1] = 0; -+ return True; -+} -+ -+/* Map a code address to the name of a shared object file or the -+ executable. Returns False if no idea; otherwise True. Doesn't -+ require debug info. Caller supplies buf and nbuf. */ -+Bool VG_(get_objname) ( Addr a, Char* buf, Int nbuf ) -+{ -+ Int used; -+ DebugInfo* di; -+ const NSegment *seg; -+ HChar* filename; -+ vg_assert(nbuf > 0); -+ /* Look in the debugInfo_list to find the name. In most cases we -+ expect this to produce a result. */ -+ for (di = debugInfo_list; di != NULL; di = di->next) { -+ if (di->text_present -+ && di->text_size > 0 -+ && di->text_avma <= a -+ && a < di->text_avma + di->text_size) { -+ VG_(strncpy_safely)(buf, di->filename, nbuf); -+ if (di->memname) { -+ used = VG_(strlen)(buf); -+ if (used < nbuf) -+ VG_(strncpy_safely)(&buf[used], "(", nbuf-used); -+ used = VG_(strlen)(buf); -+ if (used < nbuf) -+ VG_(strncpy_safely)(&buf[used], di->memname, nbuf-used); -+ used = VG_(strlen)(buf); -+ if (used < nbuf) -+ VG_(strncpy_safely)(&buf[used], ")", nbuf-used); -+ } -+ buf[nbuf-1] = 0; -+ return True; -+ } -+ } -+ /* Last-ditch fallback position: if we don't find the address in -+ the debugInfo_list, ask the address space manager whether it -+ knows the name of the file associated with this mapping. This -+ allows us to print the names of exe/dll files in the stack trace -+ when running programs under wine. */ -+ if ( (seg = VG_(am_find_nsegment(a))) != NULL -+ && (filename = VG_(am_get_filename)(seg)) != NULL ) { -+ VG_(strncpy_safely)(buf, filename, nbuf); -+ return True; -+ } -+ return False; -+} -+ -+/* Map a code address to its DebugInfo. Returns NULL if not found. Doesn't -+ require debug info. */ -+DebugInfo* VG_(find_DebugInfo) ( Addr a ) -+{ -+ static UWord n_search = 0; -+ DebugInfo* di; -+ n_search++; -+ for (di = debugInfo_list; di != NULL; di = di->next) { -+ if (di->text_present -+ && di->text_size > 0 -+ && di->text_avma <= a -+ && a < di->text_avma + di->text_size) { -+ if (0 == (n_search & 0xF)) -+ move_DebugInfo_one_step_forward( di ); -+ return di; -+ } -+ } -+ return NULL; -+} -+ -+/* Map a code address to a filename. Returns True if successful. */ -+Bool VG_(get_filename)( Addr a, Char* filename, Int n_filename ) -+{ -+ DebugInfo* si; -+ Word locno; -+ search_all_loctabs ( a, &si, &locno ); -+ if (si == NULL) -+ return False; -+ VG_(strncpy_safely)(filename, si->loctab[locno].filename, n_filename); -+ return True; -+} -+ -+/* Map a code address to a line number. Returns True if successful. */ -+Bool VG_(get_linenum)( Addr a, UInt* lineno ) -+{ -+ DebugInfo* si; -+ Word locno; -+ search_all_loctabs ( a, &si, &locno ); -+ if (si == NULL) -+ return False; -+ *lineno = si->loctab[locno].lineno; -+ -+ return True; -+} -+ -+/* Map a code address to a filename/line number/dir name info. -+ See prototype for detailed description of behaviour. -+*/ -+Bool VG_(get_filename_linenum) ( Addr a, -+ /*OUT*/Char* filename, Int n_filename, -+ /*OUT*/Char* dirname, Int n_dirname, -+ /*OUT*/Bool* dirname_available, -+ /*OUT*/UInt* lineno ) -+{ -+ DebugInfo* si; -+ Word locno; -+ -+ vg_assert( (dirname == NULL && dirname_available == NULL) -+ || -+ (dirname != NULL && dirname_available != NULL) ); -+ -+ search_all_loctabs ( a, &si, &locno ); -+ if (si == NULL) { -+ if (dirname_available) { -+ *dirname_available = False; -+ *dirname = 0; -+ } -+ return False; -+ } -+ -+ VG_(strncpy_safely)(filename, si->loctab[locno].filename, n_filename); -+ *lineno = si->loctab[locno].lineno; -+ -+ if (dirname) { -+ /* caller wants directory info too .. */ -+ vg_assert(n_dirname > 0); -+ if (si->loctab[locno].dirname) { -+ /* .. and we have some */ -+ *dirname_available = True; -+ VG_(strncpy_safely)(dirname, si->loctab[locno].dirname, -+ n_dirname); -+ } else { -+ /* .. but we don't have any */ -+ *dirname_available = False; -+ *dirname = 0; -+ } -+ } -+ -+ return True; -+} -+ -+ -+/* Map a function name to its entry point and toc pointer. Is done by -+ sequential search of all symbol tables, so is very slow. To -+ mitigate the worst performance effects, you may specify a soname -+ pattern, and only objects matching that pattern are searched. -+ Therefore specify "*" to search all the objects. On TOC-afflicted -+ platforms, a symbol is deemed to be found only if it has a nonzero -+ TOC pointer. */ -+Bool VG_(lookup_symbol_SLOW)(UChar* sopatt, UChar* name, -+ Addr* pEnt, Addr* pToc) -+{ -+ Bool require_pToc = False; -+ Int i; -+ DebugInfo* si; -+ Bool debug = False; -+# if defined(VG_PLAT_USES_PPCTOC) -+ require_pToc = True; -+# endif -+ for (si = debugInfo_list; si; si = si->next) { -+ if (debug) -+ VG_(printf)("lookup_symbol_SLOW: considering %s\n", si->soname); -+ if (!VG_(string_match)(sopatt, si->soname)) { -+ if (debug) -+ VG_(printf)(" ... skip\n"); -+ continue; -+ } -+ for (i = 0; i < si->symtab_used; i++) { -+ if (0==VG_(strcmp)(name, si->symtab[i].name) -+ && (require_pToc ? si->symtab[i].tocptr : True)) { -+ *pEnt = si->symtab[i].addr; -+ *pToc = si->symtab[i].tocptr; -+ return True; -+ } -+ } -+ } -+ return False; -+} -+ -+ -+/* VG_(describe_IP): print into buf info on code address, function -+ name and filename. */ -+ -+/* Copy str into buf starting at n, but not going past buf[n_buf-1] -+ and always ensuring that buf is zero-terminated. */ -+ -+static Int putStr ( Int n, Int n_buf, Char* buf, Char* str ) -+{ -+ vg_assert(n_buf > 0); -+ vg_assert(n >= 0 && n < n_buf); -+ for (; n < n_buf-1 && *str != 0; n++,str++) -+ buf[n] = *str; -+ vg_assert(n >= 0 && n < n_buf); -+ buf[n] = '\0'; -+ return n; -+} -+ -+/* Same as putStr, but escaping chars for XML output, and -+ also not adding more than count chars to n_buf. */ -+ -+static Int putStrEsc ( Int n, Int n_buf, Int count, Char* buf, Char* str ) -+{ -+ Char alt[2]; -+ vg_assert(n_buf > 0); -+ vg_assert(count >= 0 && count < n_buf); -+ vg_assert(n >= 0 && n < n_buf); -+ for (; *str != 0; str++) { -+ vg_assert(count >= 0); -+ if (count <= 0) -+ goto done; -+ switch (*str) { -+ case '&': -+ if (count < 5) goto done; -+ n = putStr( n, n_buf, buf, "&"); -+ count -= 5; -+ break; -+ case '<': -+ if (count < 4) goto done; -+ n = putStr( n, n_buf, buf, "<"); -+ count -= 4; -+ break; -+ case '>': -+ if (count < 4) goto done; -+ n = putStr( n, n_buf, buf, ">"); -+ count -= 4; -+ break; -+ default: -+ if (count < 1) goto done; -+ alt[0] = *str; -+ alt[1] = 0; -+ n = putStr( n, n_buf, buf, alt ); -+ count -= 1; -+ break; -+ } -+ } -+ done: -+ vg_assert(count >= 0); /* should not go -ve in loop */ -+ vg_assert(n >= 0 && n < n_buf); -+ return n; -+} -+ -+Char* VG_(describe_IP)(Addr eip, Char* buf, Int n_buf) -+{ -+# define APPEND(_str) \ -+ n = putStr(n, n_buf, buf, _str) -+# define APPEND_ESC(_count,_str) \ -+ n = putStrEsc(n, n_buf, (_count), buf, (_str)) -+# define BUF_LEN 4096 -+ -+ UInt lineno; -+ UChar ibuf[50]; -+ Int n = 0; -+ -+ static UChar buf_fn[BUF_LEN]; -+ static UChar buf_obj[BUF_LEN]; -+ static UChar buf_srcloc[BUF_LEN]; -+ static UChar buf_dirname[BUF_LEN]; -+ buf_fn[0] = buf_obj[0] = buf_srcloc[0] = buf_dirname[0] = 0; -+ -+ Bool know_dirinfo = False; -+ Bool know_fnname = VG_(clo_sym_offsets) -+ ? VG_(get_fnname_w_offset) (eip, buf_fn, BUF_LEN) -+ : VG_(get_fnname) (eip, buf_fn, BUF_LEN); -+ Bool know_objname = VG_(get_objname)(eip, buf_obj, BUF_LEN); -+ Bool know_srcloc = VG_(get_filename_linenum)( -+ eip, -+ buf_srcloc, BUF_LEN, -+ buf_dirname, BUF_LEN, &know_dirinfo, -+ &lineno -+ ); -+ buf_fn [ sizeof(buf_fn)-1 ] = 0; -+ buf_obj [ sizeof(buf_obj)-1 ] = 0; -+ buf_srcloc [ sizeof(buf_srcloc)-1 ] = 0; -+ buf_dirname[ sizeof(buf_dirname)-1 ] = 0; -+ -+ if (VG_(clo_xml)) { -+ -+ Bool human_readable = True; -+ HChar* maybe_newline = human_readable ? "\n " : ""; -+ HChar* maybe_newline2 = human_readable ? "\n " : ""; -+ -+ /* Print in XML format, dumping in as much info as we know. -+ Ensure all tags are balanced even if the individual strings -+ are too long. Allocate 1/10 of BUF_LEN to the object name, -+ 6/10s to the function name, 1/10 to the directory name and -+ 1/10 to the file name, leaving 1/10 for all the fixed-length -+ stuff. */ -+ APPEND(""); -+ VG_(sprintf)(ibuf,"0x%llX", (ULong)eip); -+ APPEND(maybe_newline); -+ APPEND(ibuf); -+ if (know_objname) { -+ APPEND(maybe_newline); -+ APPEND(""); -+ APPEND_ESC(1*BUF_LEN/10, buf_obj); -+ APPEND(""); -+ } -+ if (know_fnname) { -+ APPEND(maybe_newline); -+ APPEND(""); -+ APPEND_ESC(6*BUF_LEN/10, buf_fn); -+ APPEND(""); -+ } -+ if (know_srcloc) { -+ if (know_dirinfo) { -+ APPEND(maybe_newline); -+ APPEND(""); -+ APPEND_ESC(1*BUF_LEN/10, buf_dirname); -+ APPEND(""); -+ } -+ APPEND(maybe_newline); -+ APPEND(""); -+ APPEND_ESC(1*BUF_LEN/10, buf_srcloc); -+ APPEND(""); -+ APPEND(maybe_newline); -+ APPEND(""); -+ VG_(sprintf)(ibuf,"%d",lineno); -+ APPEND(ibuf); -+ APPEND(""); -+ } -+ APPEND(maybe_newline2); -+ APPEND(""); -+ -+ } else { -+ -+ /* Print for humans to read */ -+ // -+ // Possible forms: -+ // -+ // 0x80483BF: really (a.c:20) -+ // 0x80483BF: really (in /foo/a.out) -+ // 0x80483BF: really (in ???) -+ // 0x80483BF: ??? (in /foo/a.out) -+ // 0x80483BF: ??? (a.c:20) -+ // 0x80483BF: ??? -+ // -+ VG_(sprintf)(ibuf,"0x%llX: ", (ULong)eip); -+ APPEND(ibuf); -+ if (know_fnname) { -+ APPEND(buf_fn); -+ } else { -+ APPEND("???"); -+ } -+ if (know_srcloc) { -+ APPEND(" ("); -+ // Get the directory name, if any, possibly pruned, into dirname. -+ UChar* dirname = NULL; -+ if (VG_(clo_n_fullpath_after) > 0) { -+ Int i; -+ dirname = buf_dirname; -+ // Remove leading prefixes from the dirname. -+ // If user supplied --fullpath-after=foo, this will remove -+ // a leading string which matches '.*foo' (not greedy). -+ for (i = 0; i < VG_(clo_n_fullpath_after); i++) { -+ UChar* prefix = VG_(clo_fullpath_after)[i]; -+ UChar* str = VG_(strstr)(dirname, prefix); -+ if (str) { -+ dirname = str + VG_(strlen)(prefix); -+ break; -+ } -+ } -+ /* remove leading "./" */ -+ if (dirname[0] == '.' && dirname[1] == '/') -+ dirname += 2; -+ } -+ // do we have any interesting directory name to show? If so -+ // add it in. -+ if (dirname && dirname[0] != 0) { -+ APPEND(dirname); -+ APPEND("/"); -+ } -+ APPEND(buf_srcloc); -+ APPEND(":"); -+ VG_(sprintf)(ibuf,"%d",lineno); -+ APPEND(ibuf); -+ APPEND(")"); -+ } else if (know_objname) { -+ APPEND(" (in "); -+ APPEND(buf_obj); -+ APPEND(")"); -+ } else if (know_fnname) { -+ // Nb: do this in two steps because "??)" is a trigraph! -+ APPEND(" (in ???"); -+ APPEND(")"); -+ } -+ -+ } -+ return buf; -+ -+# undef APPEND -+# undef APPEND_ESC -+# undef BUF_LEN -+} -+ -+ -+/*--------------------------------------------------------------*/ -+/*--- ---*/ -+/*--- TOP LEVEL: FOR UNWINDING THE STACK USING ---*/ -+/*--- DWARF3 .eh_frame INFO ---*/ -+/*--- ---*/ -+/*--------------------------------------------------------------*/ -+ -+/* Gather up all the constant pieces of info needed to evaluate -+ a CfiExpr into one convenient struct. */ -+typedef -+ struct { -+ D3UnwindRegs* uregs; -+ Addr min_accessible; -+ Addr max_accessible; -+ } -+ CfiExprEvalContext; -+ -+/* Evaluate the CfiExpr rooted at ix in exprs given the context eec. -+ *ok is set to False on failure, but not to True on success. The -+ caller must set it to True before calling. */ -+__attribute__((noinline)) -+static -+UWord evalCfiExpr ( XArray* exprs, Int ix, -+ CfiExprEvalContext* eec, Bool* ok ) -+{ -+ UWord wL, wR; -+ Addr a; -+ CfiExpr* e; -+ vg_assert(sizeof(Addr) == sizeof(UWord)); -+ e = VG_(indexXA)( exprs, ix ); -+ switch (e->tag) { -+ case Cex_Binop: -+ wL = evalCfiExpr( exprs, e->Cex.Binop.ixL, eec, ok ); -+ if (!(*ok)) return 0; -+ wR = evalCfiExpr( exprs, e->Cex.Binop.ixR, eec, ok ); -+ if (!(*ok)) return 0; -+ switch (e->Cex.Binop.op) { -+ case Cop_Add: return wL + wR; -+ case Cop_Sub: return wL - wR; -+ case Cop_And: return wL & wR; -+ case Cop_Mul: return wL * wR; -+ default: goto unhandled; -+ } -+ /*NOTREACHED*/ -+ case Cex_CfiReg: -+ switch (e->Cex.CfiReg.reg) { -+# if defined(VGA_x86) || defined(VGA_amd64) -+ case Creg_IA_IP: return eec->uregs->xip; -+ case Creg_IA_SP: return eec->uregs->xsp; -+ case Creg_IA_BP: return eec->uregs->xbp; -+# elif defined(VGA_arm) -+ case Creg_ARM_R15: return eec->uregs->r15; -+ case Creg_ARM_R14: return eec->uregs->r14; -+ case Creg_ARM_R13: return eec->uregs->r13; -+ case Creg_ARM_R12: return eec->uregs->r12; -+# elif defined(VGA_ppc32) || defined(VGA_ppc64) -+# else -+# error "Unsupported arch" -+# endif -+ default: goto unhandled; -+ } -+ /*NOTREACHED*/ -+ case Cex_Const: -+ return e->Cex.Const.con; -+ case Cex_Deref: -+ a = evalCfiExpr( exprs, e->Cex.Deref.ixAddr, eec, ok ); -+ if (!(*ok)) return 0; -+ if (a < eec->min_accessible -+ || (a + sizeof(UWord) - 1) > eec->max_accessible) { -+ *ok = False; -+ return 0; -+ } -+ /* let's hope it doesn't trap! */ -+ return * ((UWord*)a); -+ default: -+ goto unhandled; -+ } -+ /*NOTREACHED*/ -+ unhandled: -+ VG_(printf)("\n\nevalCfiExpr: unhandled\n"); -+ ML_(ppCfiExpr)( exprs, ix ); -+ VG_(printf)("\n"); -+ vg_assert(0); -+ /*NOTREACHED*/ -+ return 0; -+} -+ -+ -+/* Search all the DebugInfos in the entire system, to find the DiCfSI -+ that pertains to 'ip'. -+ -+ If found, set *diP to the DebugInfo in which it resides, and -+ *ixP to the index in that DebugInfo's cfsi array. -+ -+ If not found, set *diP to (DebugInfo*)1 and *ixP to zero. -+*/ -+__attribute__((noinline)) -+static void find_DiCfSI ( /*OUT*/DebugInfo** diP, -+ /*OUT*/Word* ixP, -+ Addr ip ) -+{ -+ DebugInfo* di; -+ Word i = -1; -+ -+ static UWord n_search = 0; -+ static UWord n_steps = 0; -+ n_search++; -+ -+ if (0) VG_(printf)("search for %#lx\n", ip); -+ -+ for (di = debugInfo_list; di != NULL; di = di->next) { -+ Word j; -+ n_steps++; -+ -+ /* Use the per-DebugInfo summary address ranges to skip -+ inapplicable DebugInfos quickly. */ -+ if (di->cfsi_used == 0) -+ continue; -+ if (ip < di->cfsi_minavma || ip > di->cfsi_maxavma) -+ continue; -+ -+ /* It might be in this DebugInfo. Search it. */ -+ j = ML_(search_one_cfitab)( di, ip ); -+ vg_assert(j >= -1 && j < (Word)di->cfsi_used); -+ -+ if (j != -1) { -+ i = j; -+ break; /* found it */ -+ } -+ } -+ -+ if (i == -1) { -+ -+ /* we didn't find it. */ -+ *diP = (DebugInfo*)1; -+ *ixP = 0; -+ -+ } else { -+ -+ /* found it. */ -+ /* ensure that di is 4-aligned (at least), so it can't possibly -+ be equal to (DebugInfo*)1. */ -+ vg_assert(di && VG_IS_4_ALIGNED(di)); -+ vg_assert(i >= 0 && i < di->cfsi_used); -+ *diP = di; -+ *ixP = i; -+ -+ /* Start of performance-enhancing hack: once every 64 (chosen -+ hackily after profiling) successful searches, move the found -+ DebugInfo one step closer to the start of the list. This -+ makes future searches cheaper. For starting konqueror on -+ amd64, this in fact reduces the total amount of searching -+ done by the above find-the-right-DebugInfo loop by more than -+ a factor of 20. */ -+ if ((n_search & 0xF) == 0) { -+ /* Move di one step closer to the start of the list. */ -+ move_DebugInfo_one_step_forward( di ); -+ } -+ /* End of performance-enhancing hack. */ -+ -+ if (0 && ((n_search & 0x7FFFF) == 0)) -+ VG_(printf)("find_DiCfSI: %lu searches, " -+ "%lu DebugInfos looked at\n", -+ n_search, n_steps); -+ -+ } -+ -+} -+ -+ -+/* Now follows a mechanism for caching queries to find_DiCfSI, since -+ they are extremely frequent on amd64-linux, during stack unwinding. -+ -+ Each cache entry binds an ip value to a (di, ix) pair. Possible -+ values: -+ -+ di is non-null, ix >= 0 ==> cache slot in use, "di->cfsi[ix]" -+ di is (DebugInfo*)1 ==> cache slot in use, no associated di -+ di is NULL ==> cache slot not in use -+ -+ Hence simply zeroing out the entire cache invalidates all -+ entries. -+ -+ Why not map ip values directly to DiCfSI*'s? Because this would -+ cause problems if/when the cfsi array is moved due to resizing. -+ Instead we cache .cfsi array index value, which should be invariant -+ across resizing. (That said, I don't think the current -+ implementation will resize whilst during queries, since the DiCfSI -+ records are added all at once, when the debuginfo for an object is -+ read, and is not changed ever thereafter. */ -+ -+#define N_CFSI_CACHE 511 -+ -+typedef -+ struct { Addr ip; DebugInfo* di; Word ix; } -+ CFSICacheEnt; -+ -+static CFSICacheEnt cfsi_cache[N_CFSI_CACHE]; -+ -+static void cfsi_cache__invalidate ( void ) { -+ VG_(memset)(&cfsi_cache, 0, sizeof(cfsi_cache)); -+} -+ -+ -+static inline CFSICacheEnt* cfsi_cache__find ( Addr ip ) -+{ -+ UWord hash = ip % N_CFSI_CACHE; -+ CFSICacheEnt* ce = &cfsi_cache[hash]; -+ static UWord n_q = 0, n_m = 0; -+ -+ n_q++; -+ if (0 && 0 == (n_q & 0x1FFFFF)) -+ VG_(printf)("QQQ %lu %lu\n", n_q, n_m); -+ -+ if (LIKELY(ce->ip == ip) && LIKELY(ce->di != NULL)) { -+ /* found an entry in the cache .. */ -+ } else { -+ /* not found in cache. Search and update. */ -+ n_m++; -+ ce->ip = ip; -+ find_DiCfSI( &ce->di, &ce->ix, ip ); -+ } -+ -+ if (UNLIKELY(ce->di == (DebugInfo*)1)) { -+ /* no DiCfSI for this address */ -+ return NULL; -+ } else { -+ /* found a DiCfSI for this address */ -+ return ce; -+ } -+} -+ -+ -+inline -+static Addr compute_cfa ( D3UnwindRegs* uregs, -+ Addr min_accessible, Addr max_accessible, -+ DebugInfo* di, DiCfSI* cfsi ) -+{ -+ CfiExprEvalContext eec; -+ Addr cfa; -+ Bool ok; -+ -+ /* Compute the CFA. */ -+ cfa = 0; -+ switch (cfsi->cfa_how) { -+# if defined(VGA_x86) || defined(VGA_amd64) -+ case CFIC_IA_SPREL: -+ cfa = cfsi->cfa_off + uregs->xsp; -+ break; -+ case CFIC_IA_BPREL: -+ cfa = cfsi->cfa_off + uregs->xbp; -+ break; -+# elif defined(VGA_arm) -+ case CFIC_ARM_R13REL: -+ cfa = cfsi->cfa_off + uregs->r13; -+ break; -+ case CFIC_ARM_R12REL: -+ cfa = cfsi->cfa_off + uregs->r12; -+ break; -+ case CFIC_ARM_R11REL: -+ cfa = cfsi->cfa_off + uregs->r11; -+ break; -+ case CFIC_ARM_R7REL: -+ cfa = cfsi->cfa_off + uregs->r7; -+ break; -+# elif defined(VGA_ppc32) || defined(VGA_ppc64) -+# else -+# error "Unsupported arch" -+# endif -+ case CFIC_EXPR: /* available on all archs */ -+ if (0) { -+ VG_(printf)("CFIC_EXPR: "); -+ ML_(ppCfiExpr)(di->cfsi_exprs, cfsi->cfa_off); -+ VG_(printf)("\n"); -+ } -+ eec.uregs = uregs; -+ eec.min_accessible = min_accessible; -+ eec.max_accessible = max_accessible; -+ ok = True; -+ cfa = evalCfiExpr(di->cfsi_exprs, cfsi->cfa_off, &eec, &ok ); -+ if (!ok) return 0; -+ break; -+ default: -+ vg_assert(0); -+ } -+ return cfa; -+} -+ -+ -+/* Get the call frame address (CFA) given an IP/SP/FP triple. */ -+/* NOTE: This function may rearrange the order of entries in the -+ DebugInfo list. */ -+Addr ML_(get_CFA) ( Addr ip, Addr sp, Addr fp, -+ Addr min_accessible, Addr max_accessible ) -+{ -+ CFSICacheEnt* ce; -+ DebugInfo* di; -+ DiCfSI* cfsi; -+ -+ ce = cfsi_cache__find(ip); -+ -+ if (UNLIKELY(ce == NULL)) -+ return 0; /* no info. Nothing we can do. */ -+ -+ di = ce->di; -+ cfsi = &di->cfsi[ ce->ix ]; -+ -+ /* Temporary impedance-matching kludge so that this keeps working -+ on x86-linux and amd64-linux. */ -+# if defined(VGA_x86) || defined(VGA_amd64) -+ { D3UnwindRegs uregs; -+ uregs.xip = ip; -+ uregs.xsp = sp; -+ uregs.xbp = fp; -+ return compute_cfa(&uregs, -+ min_accessible, max_accessible, di, cfsi); -+ } -+# else -+ return 0; /* indicates failure */ -+# endif -+} -+ -+ -+/* The main function for DWARF2/3 CFI-based stack unwinding. Given a -+ set of registers in UREGS, modify it to hold the register values -+ for the previous frame, if possible. Returns True if successful. -+ If not successful, *UREGS is not changed. -+ -+ For x86 and amd64, the unwound registers are: {E,R}IP, -+ {E,R}SP, {E,R}BP. -+ -+ For arm, the unwound registers are: R7 R11 R12 R13 R14 R15. -+*/ -+Bool VG_(use_CF_info) ( /*MOD*/D3UnwindRegs* uregsHere, -+ Addr min_accessible, -+ Addr max_accessible ) -+{ -+ Bool ok; -+ DebugInfo* di; -+ DiCfSI* cfsi = NULL; -+ Addr cfa, ipHere = 0; -+ CFSICacheEnt* ce; -+ CfiExprEvalContext eec; -+ D3UnwindRegs uregsPrev; -+ -+# if defined(VGA_x86) || defined(VGA_amd64) -+ ipHere = uregsHere->xip; -+# elif defined(VGA_arm) -+ ipHere = uregsHere->r15; -+# elif defined(VGA_ppc32) || defined(VGA_ppc64) -+# else -+# error "Unknown arch" -+# endif -+ ce = cfsi_cache__find(ipHere); -+ -+ if (UNLIKELY(ce == NULL)) -+ return False; /* no info. Nothing we can do. */ -+ -+ di = ce->di; -+ cfsi = &di->cfsi[ ce->ix ]; -+ -+ if (0) { -+ VG_(printf)("found cfisi: "); -+ ML_(ppDiCfSI)(di->cfsi_exprs, cfsi); -+ } -+ -+ VG_(bzero_inline)(&uregsPrev, sizeof(uregsPrev)); -+ -+ /* First compute the CFA. */ -+ cfa = compute_cfa(uregsHere, -+ min_accessible, max_accessible, di, cfsi); -+ if (UNLIKELY(cfa == 0)) -+ return False; -+ -+ /* Now we know the CFA, use it to roll back the registers we're -+ interested in. */ -+ -+# define COMPUTE(_prev, _here, _how, _off) \ -+ do { \ -+ switch (_how) { \ -+ case CFIR_UNKNOWN: \ -+ return False; \ -+ case CFIR_SAME: \ -+ _prev = _here; break; \ -+ case CFIR_MEMCFAREL: { \ -+ Addr a = cfa + (Word)_off; \ -+ if (a < min_accessible \ -+ || a > max_accessible-sizeof(Addr)) \ -+ return False; \ -+ _prev = *(Addr*)a; \ -+ break; \ -+ } \ -+ case CFIR_CFAREL: \ -+ _prev = cfa + (Word)_off; \ -+ break; \ -+ case CFIR_EXPR: \ -+ if (0) \ -+ ML_(ppCfiExpr)(di->cfsi_exprs,_off); \ -+ eec.uregs = uregsHere; \ -+ eec.min_accessible = min_accessible; \ -+ eec.max_accessible = max_accessible; \ -+ ok = True; \ -+ _prev = evalCfiExpr(di->cfsi_exprs, _off, &eec, &ok ); \ -+ if (!ok) return False; \ -+ break; \ -+ default: \ -+ vg_assert(0); \ -+ } \ -+ } while (0) -+ -+# if defined(VGA_x86) || defined(VGA_amd64) -+ COMPUTE(uregsPrev.xip, uregsHere->xip, cfsi->ra_how, cfsi->ra_off); -+ COMPUTE(uregsPrev.xsp, uregsHere->xsp, cfsi->sp_how, cfsi->sp_off); -+ COMPUTE(uregsPrev.xbp, uregsHere->xbp, cfsi->bp_how, cfsi->bp_off); -+# elif defined(VGA_arm) -+ COMPUTE(uregsPrev.r15, uregsHere->r15, cfsi->ra_how, cfsi->ra_off); -+ COMPUTE(uregsPrev.r14, uregsHere->r14, cfsi->r14_how, cfsi->r14_off); -+ COMPUTE(uregsPrev.r13, uregsHere->r13, cfsi->r13_how, cfsi->r13_off); -+ COMPUTE(uregsPrev.r12, uregsHere->r12, cfsi->r12_how, cfsi->r12_off); -+ COMPUTE(uregsPrev.r11, uregsHere->r11, cfsi->r11_how, cfsi->r11_off); -+ COMPUTE(uregsPrev.r7, uregsHere->r7, cfsi->r7_how, cfsi->r7_off); -+# elif defined(VGA_ppc32) || defined(VGA_ppc64) -+# else -+# error "Unknown arch" -+# endif -+ -+# undef COMPUTE -+ -+ *uregsHere = uregsPrev; -+ return True; -+} -+ -+ -+/*--------------------------------------------------------------*/ -+/*--- ---*/ -+/*--- TOP LEVEL: FOR UNWINDING THE STACK USING ---*/ -+/*--- MSVC FPO INFO ---*/ -+/*--- ---*/ -+/*--------------------------------------------------------------*/ -+ -+Bool VG_(use_FPO_info) ( /*MOD*/Addr* ipP, -+ /*MOD*/Addr* spP, -+ /*MOD*/Addr* fpP, -+ Addr min_accessible, -+ Addr max_accessible ) -+{ -+ Word i; -+ DebugInfo* di; -+ FPO_DATA* fpo = NULL; -+ Addr spHere; -+ -+ static UWord n_search = 0; -+ static UWord n_steps = 0; -+ n_search++; -+ -+ if (0) VG_(printf)("search FPO for %#lx\n", *ipP); -+ -+ for (di = debugInfo_list; di != NULL; di = di->next) { -+ n_steps++; -+ -+ /* Use the per-DebugInfo summary address ranges to skip -+ inapplicable DebugInfos quickly. */ -+ if (di->fpo == NULL) -+ continue; -+ if (*ipP < di->fpo_minavma || *ipP > di->fpo_maxavma) -+ continue; -+ -+ i = ML_(search_one_fpotab)( di, *ipP ); -+ if (i != -1) { -+ Word j; -+ if (0) { -+ /* debug printing only */ -+ VG_(printf)("look for %#lx size %ld i %ld\n", -+ *ipP, di->fpo_size, i); -+ for (j = 0; j < di->fpo_size; j++) -+ VG_(printf)("[%02ld] %#x %d\n", -+ j, di->fpo[j].ulOffStart, di->fpo[j].cbProcSize); -+ } -+ vg_assert(i >= 0 && i < di->fpo_size); -+ fpo = &di->fpo[i]; -+ break; -+ } -+ } -+ -+ if (fpo == NULL) -+ return False; -+ -+ if (0 && ((n_search & 0x7FFFF) == 0)) -+ VG_(printf)("VG_(use_FPO_info): %lu searches, " -+ "%lu DebugInfos looked at\n", -+ n_search, n_steps); -+ -+ -+ /* Start of performance-enhancing hack: once every 64 (chosen -+ hackily after profiling) successful searches, move the found -+ DebugInfo one step closer to the start of the list. This makes -+ future searches cheaper. For starting konqueror on amd64, this -+ in fact reduces the total amount of searching done by the above -+ find-the-right-DebugInfo loop by more than a factor of 20. */ -+ if ((n_search & 0x3F) == 0) { -+ /* Move si one step closer to the start of the list. */ -+ //move_DebugInfo_one_step_forward( di ); -+ } -+ /* End of performance-enhancing hack. */ -+ -+ if (0) { -+ VG_(printf)("found fpo: "); -+ //ML_(ppFPO)(fpo); -+ } -+ -+ /* -+ Stack layout is: -+ %esp-> -+ 4*.cbRegs {%edi, %esi, %ebp, %ebx} -+ 4*.cdwLocals -+ return_pc -+ 4*.cdwParams -+ prior_%esp-> -+ -+ Typical code looks like: -+ sub $4*.cdwLocals,%esp -+ Alternative to above for >=4KB (and sometimes for smaller): -+ mov $size,%eax -+ call __chkstk # WinNT performs page-by-page probe! -+ __chkstk is much like alloc(), except that on return -+ %eax= 5+ &CALL. Thus it could be used as part of -+ Position Independent Code to locate the Global Offset Table. -+ push %ebx -+ push %ebp -+ push %esi -+ Other once-only instructions often scheduled >here<. -+ push %edi -+ -+ If the pc is within the first .cbProlog bytes of the function, -+ then you must disassemble to see how many registers have been pushed, -+ because instructions in the prolog may be scheduled for performance. -+ The order of PUSH is always %ebx, %ebp, %esi, %edi, with trailing -+ registers not pushed when .cbRegs < 4. This seems somewhat strange -+ because %ebp is the register whose usage you want to minimize, -+ yet it is in the first half of the PUSH list. -+ -+ I don't know what happens when the compiler constructs an outgoing CALL. -+ %esp could move if outgoing parameters are PUSHed, and this affects -+ traceback for errors during the PUSHes. */ -+ -+ spHere = *spP; -+ -+ *ipP = *(Addr *)(spHere + 4*(fpo->cbRegs + fpo->cdwLocals)); -+ *spP = spHere + 4*(fpo->cbRegs + fpo->cdwLocals + 1 -+ + fpo->cdwParams); -+ *fpP = *(Addr *)(spHere + 4*2); -+ return True; -+} -+ -+ -+/*--------------------------------------------------------------*/ -+/*--- ---*/ -+/*--- TOP LEVEL: GENERATE DESCRIPTION OF DATA ADDRESSES ---*/ -+/*--- FROM DWARF3 DEBUG INFO ---*/ -+/*--- ---*/ -+/*--------------------------------------------------------------*/ -+ -+/* Try to make p2XA(dst, fmt, args..) turn into -+ VG_(xaprintf_no_f_c)(dst, fmt, args) without having to resort to -+ vararg macros. As usual with everything to do with varargs, it's -+ an ugly hack. -+ -+ //#define p2XA(dstxa, format, args...) -+ // VG_(xaprintf_no_f_c)(dstxa, format, ##args) -+*/ -+#define p2XA VG_(xaprintf_no_f_c) -+ -+/* Add a zero-terminating byte to DST, which must be an XArray* of -+ HChar. */ -+static void zterm_XA ( XArray* dst ) -+{ -+ HChar zero = 0; -+ (void) VG_(addBytesToXA)( dst, &zero, 1 ); -+} -+ -+ -+/* Evaluate the location expression/list for var, to see whether or -+ not data_addr falls within the variable. If so also return the -+ offset of data_addr from the start of the variable. Note that -+ regs, which supplies ip,sp,fp values, will be NULL for global -+ variables, and non-NULL for local variables. */ -+static Bool data_address_is_in_var ( /*OUT*/PtrdiffT* offset, -+ XArray* /* TyEnt */ tyents, -+ DiVariable* var, -+ RegSummary* regs, -+ Addr data_addr, -+ const DebugInfo* di ) -+{ -+ MaybeULong mul; -+ SizeT var_szB; -+ GXResult res; -+ Bool show = False; -+ -+ vg_assert(var->name); -+ vg_assert(var->gexpr); -+ -+ /* Figure out how big the variable is. */ -+ mul = ML_(sizeOfType)(tyents, var->typeR); -+ /* If this var has a type whose size is unknown, zero, or -+ impossibly large, it should never have been added. ML_(addVar) -+ should have rejected it. */ -+ vg_assert(mul.b == True); -+ vg_assert(mul.ul > 0); -+ if (sizeof(void*) == 4) vg_assert(mul.ul < (1ULL << 32)); -+ /* After this point, we assume we can truncate mul.ul to a host word -+ safely (without loss of info). */ -+ -+ var_szB = (SizeT)mul.ul; /* NB: truncate to host word */ -+ -+ if (show) { -+ VG_(printf)("VVVV: data_address_%#lx_is_in_var: %s :: ", -+ data_addr, var->name ); -+ ML_(pp_TyEnt_C_ishly)( tyents, var->typeR ); -+ VG_(printf)("\n"); -+ } -+ -+ /* ignore zero-sized vars; they can never match anything. */ -+ if (var_szB == 0) { -+ if (show) -+ VG_(printf)("VVVV: -> Fail (variable is zero sized)\n"); -+ return False; -+ } -+ -+ res = ML_(evaluate_GX)( var->gexpr, var->fbGX, regs, di ); -+ -+ if (show) { -+ VG_(printf)("VVVV: -> "); -+ ML_(pp_GXResult)( res ); -+ VG_(printf)("\n"); -+ } -+ -+ if (res.kind == GXR_Addr -+ && res.word <= data_addr -+ && data_addr < res.word + var_szB) { -+ *offset = data_addr - res.word; -+ return True; -+ } else { -+ return False; -+ } -+} -+ -+ -+/* Format the acquired information into DN(AME)1 and DN(AME)2, which -+ are XArray*s of HChar, that have been initialised by the caller. -+ Resulting strings will be zero terminated. Information is -+ formatted in an understandable way. Not so easy. If frameNo is -+ -1, this is assumed to be a global variable; else a local -+ variable. */ -+static void format_message ( /*MOD*/XArray* /* of HChar */ dn1, -+ /*MOD*/XArray* /* of HChar */ dn2, -+ Addr data_addr, -+ DiVariable* var, -+ PtrdiffT var_offset, -+ PtrdiffT residual_offset, -+ XArray* /*UChar*/ described, -+ Int frameNo, -+ ThreadId tid ) -+{ -+ Bool have_descr, have_srcloc; -+ Bool xml = VG_(clo_xml); -+ UChar* vo_plural = var_offset == 1 ? "" : "s"; -+ UChar* ro_plural = residual_offset == 1 ? "" : "s"; -+ UChar* basetag = "auxwhat"; /* a constant */ -+ UChar tagL[32], tagR[32], xagL[32], xagR[32]; -+ -+ vg_assert(frameNo >= -1); -+ vg_assert(dn1 && dn2); -+ vg_assert(described); -+ vg_assert(var && var->name); -+ have_descr = VG_(sizeXA)(described) > 0 -+ && *(UChar*)VG_(indexXA)(described,0) != '\0'; -+ have_srcloc = var->fileName && var->lineNo > 0; -+ -+ tagL[0] = tagR[0] = xagL[0] = xagR[0] = 0; -+ if (xml) { -+ VG_(sprintf)(tagL, "<%s>", basetag); // -+ VG_(sprintf)(tagR, "", basetag); // -+ VG_(sprintf)(xagL, "", basetag); // -+ VG_(sprintf)(xagR, "", basetag); // -+ } -+ -+# define TAGL(_xa) p2XA(_xa, "%s", tagL) -+# define TAGR(_xa) p2XA(_xa, "%s", tagR) -+# define XAGL(_xa) p2XA(_xa, "%s", xagL) -+# define XAGR(_xa) p2XA(_xa, "%s", xagR) -+# define TXTL(_xa) p2XA(_xa, "%s", "") -+# define TXTR(_xa) p2XA(_xa, "%s", "") -+ -+ /* ------ local cases ------ */ -+ -+ if ( frameNo >= 0 && (!have_srcloc) && (!have_descr) ) { -+ /* no srcloc, no description: -+ Location 0x7fefff6cf is 543 bytes inside local var "a", -+ in frame #1 of thread 1 -+ */ -+ if (xml) { -+ TAGL( dn1 ); -+ p2XA( dn1, -+ "Location 0x%lx is %lu byte%s inside local var \"%t\",", -+ data_addr, var_offset, vo_plural, var->name ); -+ TAGR( dn1 ); -+ TAGL( dn2 ); -+ p2XA( dn2, -+ "in frame #%d of thread %d", frameNo, (Int)tid ); -+ TAGR( dn2 ); -+ } else { -+ p2XA( dn1, -+ "Location 0x%lx is %lu byte%s inside local var \"%s\",", -+ data_addr, var_offset, vo_plural, var->name ); -+ p2XA( dn2, -+ "in frame #%d of thread %d", frameNo, (Int)tid ); -+ } -+ } -+ else -+ if ( frameNo >= 0 && have_srcloc && (!have_descr) ) { -+ /* no description: -+ Location 0x7fefff6cf is 543 bytes inside local var "a" -+ declared at dsyms7.c:17, in frame #1 of thread 1 -+ */ -+ if (xml) { -+ TAGL( dn1 ); -+ p2XA( dn1, -+ "Location 0x%lx is %lu byte%s inside local var \"%t\"", -+ data_addr, var_offset, vo_plural, var->name ); -+ TAGR( dn1 ); -+ XAGL( dn2 ); -+ TXTL( dn2 ); -+ p2XA( dn2, -+ "declared at %t:%d, in frame #%d of thread %d", -+ var->fileName, var->lineNo, frameNo, (Int)tid ); -+ TXTR( dn2 ); -+ // FIXME: also do -+ p2XA( dn2, -+ " %t %d ", -+ var->fileName, var->lineNo ); -+ XAGR( dn2 ); -+ } else { -+ p2XA( dn1, -+ "Location 0x%lx is %lu byte%s inside local var \"%s\"", -+ data_addr, var_offset, vo_plural, var->name ); -+ p2XA( dn2, -+ "declared at %s:%d, in frame #%d of thread %d", -+ var->fileName, var->lineNo, frameNo, (Int)tid ); -+ } -+ } -+ else -+ if ( frameNo >= 0 && (!have_srcloc) && have_descr ) { -+ /* no srcloc: -+ Location 0x7fefff6cf is 2 bytes inside a[3].xyzzy[21].c2 -+ in frame #1 of thread 1 -+ */ -+ if (xml) { -+ TAGL( dn1 ); -+ p2XA( dn1, -+ "Location 0x%lx is %lu byte%s inside %t%t", -+ data_addr, residual_offset, ro_plural, var->name, -+ (HChar*)(VG_(indexXA)(described,0)) ); -+ TAGR( dn1 ); -+ TAGL( dn2 ); -+ p2XA( dn2, -+ "in frame #%d of thread %d", frameNo, (Int)tid ); -+ TAGR( dn2 ); -+ } else { -+ p2XA( dn1, -+ "Location 0x%lx is %lu byte%s inside %s%s", -+ data_addr, residual_offset, ro_plural, var->name, -+ (HChar*)(VG_(indexXA)(described,0)) ); -+ p2XA( dn2, -+ "in frame #%d of thread %d", frameNo, (Int)tid ); -+ } -+ } -+ else -+ if ( frameNo >= 0 && have_srcloc && have_descr ) { -+ /* Location 0x7fefff6cf is 2 bytes inside a[3].xyzzy[21].c2, -+ declared at dsyms7.c:17, in frame #1 of thread 1 */ -+ if (xml) { -+ TAGL( dn1 ); -+ p2XA( dn1, -+ "Location 0x%lx is %lu byte%s inside %t%t,", -+ data_addr, residual_offset, ro_plural, var->name, -+ (HChar*)(VG_(indexXA)(described,0)) ); -+ TAGR( dn1 ); -+ XAGL( dn2 ); -+ TXTL( dn2 ); -+ p2XA( dn2, -+ "declared at %t:%d, in frame #%d of thread %d", -+ var->fileName, var->lineNo, frameNo, (Int)tid ); -+ TXTR( dn2 ); -+ // FIXME: also do -+ p2XA( dn2, -+ " %t %d ", -+ var->fileName, var->lineNo ); -+ XAGR( dn2 ); -+ } else { -+ p2XA( dn1, -+ "Location 0x%lx is %lu byte%s inside %s%s,", -+ data_addr, residual_offset, ro_plural, var->name, -+ (HChar*)(VG_(indexXA)(described,0)) ); -+ p2XA( dn2, -+ "declared at %s:%d, in frame #%d of thread %d", -+ var->fileName, var->lineNo, frameNo, (Int)tid ); -+ } -+ } -+ else -+ /* ------ global cases ------ */ -+ if ( frameNo >= -1 && (!have_srcloc) && (!have_descr) ) { -+ /* no srcloc, no description: -+ Location 0x7fefff6cf is 543 bytes inside global var "a" -+ */ -+ if (xml) { -+ TAGL( dn1 ); -+ p2XA( dn1, -+ "Location 0x%lx is %lu byte%s inside global var \"%t\"", -+ data_addr, var_offset, vo_plural, var->name ); -+ TAGR( dn1 ); -+ } else { -+ p2XA( dn1, -+ "Location 0x%lx is %lu byte%s inside global var \"%s\"", -+ data_addr, var_offset, vo_plural, var->name ); -+ } -+ } -+ else -+ if ( frameNo >= -1 && have_srcloc && (!have_descr) ) { -+ /* no description: -+ Location 0x7fefff6cf is 543 bytes inside global var "a" -+ declared at dsyms7.c:17 -+ */ -+ if (xml) { -+ TAGL( dn1 ); -+ p2XA( dn1, -+ "Location 0x%lx is %lu byte%s inside global var \"%t\"", -+ data_addr, var_offset, vo_plural, var->name ); -+ TAGR( dn1 ); -+ XAGL( dn2 ); -+ TXTL( dn2 ); -+ p2XA( dn2, -+ "declared at %t:%d", -+ var->fileName, var->lineNo); -+ TXTR( dn2 ); -+ // FIXME: also do -+ p2XA( dn2, -+ " %t %d ", -+ var->fileName, var->lineNo ); -+ XAGR( dn2 ); -+ } else { -+ p2XA( dn1, -+ "Location 0x%lx is %lu byte%s inside global var \"%s\"", -+ data_addr, var_offset, vo_plural, var->name ); -+ p2XA( dn2, -+ "declared at %s:%d", -+ var->fileName, var->lineNo); -+ } -+ } -+ else -+ if ( frameNo >= -1 && (!have_srcloc) && have_descr ) { -+ /* no srcloc: -+ Location 0x7fefff6cf is 2 bytes inside a[3].xyzzy[21].c2, -+ a global variable -+ */ -+ if (xml) { -+ TAGL( dn1 ); -+ p2XA( dn1, -+ "Location 0x%lx is %lu byte%s inside %t%t,", -+ data_addr, residual_offset, ro_plural, var->name, -+ (HChar*)(VG_(indexXA)(described,0)) ); -+ TAGR( dn1 ); -+ TAGL( dn2 ); -+ p2XA( dn2, -+ "a global variable"); -+ TAGR( dn2 ); -+ } else { -+ p2XA( dn1, -+ "Location 0x%lx is %lu byte%s inside %s%s,", -+ data_addr, residual_offset, ro_plural, var->name, -+ (char*)(VG_(indexXA)(described,0)) ); -+ p2XA( dn2, -+ "a global variable"); -+ } -+ } -+ else -+ if ( frameNo >= -1 && have_srcloc && have_descr ) { -+ /* Location 0x7fefff6cf is 2 bytes inside a[3].xyzzy[21].c2, -+ a global variable declared at dsyms7.c:17 */ -+ if (xml) { -+ TAGL( dn1 ); -+ p2XA( dn1, -+ "Location 0x%lx is %lu byte%s inside %t%t,", -+ data_addr, residual_offset, ro_plural, var->name, -+ (HChar*)(VG_(indexXA)(described,0)) ); -+ TAGR( dn1 ); -+ XAGL( dn2 ); -+ TXTL( dn2 ); -+ p2XA( dn2, -+ "a global variable declared at %t:%d", -+ var->fileName, var->lineNo); -+ TXTR( dn2 ); -+ // FIXME: also do -+ p2XA( dn2, -+ " %t %d ", -+ var->fileName, var->lineNo ); -+ XAGR( dn2 ); -+ } else { -+ p2XA( dn1, -+ "Location 0x%lx is %lu byte%s inside %s%s,", -+ data_addr, residual_offset, ro_plural, var->name, -+ (HChar*)(VG_(indexXA)(described,0)) ); -+ p2XA( dn2, -+ "a global variable declared at %s:%d", -+ var->fileName, var->lineNo); -+ } -+ } -+ else -+ vg_assert(0); -+ -+ /* Zero terminate both strings */ -+ zterm_XA( dn1 ); -+ zterm_XA( dn2 ); -+ -+# undef TAGL -+# undef TAGR -+# undef XAGL -+# undef XAGR -+# undef TXTL -+# undef TXTR -+} -+ -+ -+/* Determine if data_addr is a local variable in the frame -+ characterised by (ip,sp,fp), and if so write its description at the -+ ends of DNAME{1,2}, which are XArray*s of HChar, that have been -+ initialised by the caller, zero terminate both, and return True. -+ If it's not a local variable in said frame, return False. */ -+static -+Bool consider_vars_in_frame ( /*MOD*/XArray* /* of HChar */ dname1, -+ /*MOD*/XArray* /* of HChar */ dname2, -+ Addr data_addr, -+ Addr ip, Addr sp, Addr fp, -+ /* shown to user: */ -+ ThreadId tid, Int frameNo ) -+{ -+ Word i; -+ DebugInfo* di; -+ RegSummary regs; -+ Bool debug = False; -+ -+ static UInt n_search = 0; -+ static UInt n_steps = 0; -+ n_search++; -+ if (debug) -+ VG_(printf)("QQQQ: cvif: ip,sp,fp %#lx,%#lx,%#lx\n", ip,sp,fp); -+ /* first, find the DebugInfo that pertains to 'ip'. */ -+ for (di = debugInfo_list; di; di = di->next) { -+ n_steps++; -+ /* text segment missing? unlikely, but handle it .. */ -+ if (!di->text_present || di->text_size == 0) -+ continue; -+ /* Ok. So does this text mapping bracket the ip? */ -+ if (di->text_avma <= ip && ip < di->text_avma + di->text_size) -+ break; -+ } -+ -+ /* Didn't find it. Strange -- means ip is a code address outside -+ of any mapped text segment. Unlikely but not impossible -- app -+ could be generating code to run. */ -+ if (!di) -+ return False; -+ -+ if (0 && ((n_search & 0x1) == 0)) -+ VG_(printf)("consider_vars_in_frame: %u searches, " -+ "%u DebugInfos looked at\n", -+ n_search, n_steps); -+ /* Start of performance-enhancing hack: once every ??? (chosen -+ hackily after profiling) successful searches, move the found -+ DebugInfo one step closer to the start of the list. This makes -+ future searches cheaper. */ -+ if ((n_search & 0xFFFF) == 0) { -+ /* Move si one step closer to the start of the list. */ -+ move_DebugInfo_one_step_forward( di ); -+ } -+ /* End of performance-enhancing hack. */ -+ -+ /* any var info at all? */ -+ if (!di->varinfo) -+ return False; -+ -+ /* Work through the scopes from most deeply nested outwards, -+ looking for code address ranges that bracket 'ip'. The -+ variables on each such address range found are in scope right -+ now. Don't descend to level zero as that is the global -+ scope. */ -+ regs.ip = ip; -+ regs.sp = sp; -+ regs.fp = fp; -+ -+ /* "for each scope, working outwards ..." */ -+ for (i = VG_(sizeXA)(di->varinfo) - 1; i >= 1; i--) { -+ XArray* vars; -+ Word j; -+ DiAddrRange* arange; -+ OSet* this_scope -+ = *(OSet**)VG_(indexXA)( di->varinfo, i ); -+ if (debug) -+ VG_(printf)("QQQQ: considering scope %ld\n", (Word)i); -+ if (!this_scope) -+ continue; -+ /* Find the set of variables in this scope that -+ bracket the program counter. */ -+ arange = VG_(OSetGen_LookupWithCmp)( -+ this_scope, &ip, -+ ML_(cmp_for_DiAddrRange_range) -+ ); -+ if (!arange) -+ continue; -+ /* stay sane */ -+ vg_assert(arange->aMin <= arange->aMax); -+ /* It must bracket the ip we asked for, else -+ ML_(cmp_for_DiAddrRange_range) is somehow broken. */ -+ vg_assert(arange->aMin <= ip && ip <= arange->aMax); -+ /* It must have an attached XArray of DiVariables. */ -+ vars = arange->vars; -+ vg_assert(vars); -+ /* But it mustn't cover the entire address range. We only -+ expect that to happen for the global scope (level 0), which -+ we're not looking at here. Except, it may cover the entire -+ address range, but in that case the vars array must be -+ empty. */ -+ vg_assert(! (arange->aMin == (Addr)0 -+ && arange->aMax == ~(Addr)0 -+ && VG_(sizeXA)(vars) > 0) ); -+ for (j = 0; j < VG_(sizeXA)( vars ); j++) { -+ DiVariable* var = (DiVariable*)VG_(indexXA)( vars, j ); -+ PtrdiffT offset; -+ if (debug) -+ VG_(printf)("QQQQ: var:name=%s %#lx-%#lx %#lx\n", -+ var->name,arange->aMin,arange->aMax,ip); -+ if (data_address_is_in_var( &offset, di->admin_tyents, -+ var, ®s, -+ data_addr, di )) { -+ PtrdiffT residual_offset = 0; -+ XArray* described = ML_(describe_type)( &residual_offset, -+ di->admin_tyents, -+ var->typeR, offset ); -+ format_message( dname1, dname2, -+ data_addr, var, offset, residual_offset, -+ described, frameNo, tid ); -+ VG_(deleteXA)( described ); -+ return True; -+ } -+ } -+ } -+ -+ return False; -+} -+ -+/* Try to form some description of DATA_ADDR by looking at the DWARF3 -+ debug info we have. This considers all global variables, and all -+ frames in the stacks of all threads. Result is written at the ends -+ of DNAME{1,2}V, which are XArray*s of HChar, that have been -+ initialised by the caller, and True is returned. If no description -+ is created, False is returned. Regardless of the return value, -+ DNAME{1,2}V are guaranteed to be zero terminated after the call. -+ -+ Note that after the call, DNAME{1,2} may have more than one -+ trailing zero, so callers should establish the useful text length -+ using VG_(strlen) on the contents, rather than VG_(sizeXA) on the -+ XArray itself. -+*/ -+Bool VG_(get_data_description)( -+ /*MOD*/ void* /* really, XArray* of HChar */ dname1v, -+ /*MOD*/ void* /* really, XArray* of HChar */ dname2v, -+ Addr data_addr -+ ) -+{ -+# define N_FRAMES 8 -+ Addr ips[N_FRAMES], sps[N_FRAMES], fps[N_FRAMES]; -+ UInt n_frames; -+ -+ Addr stack_min, stack_max; -+ ThreadId tid; -+ Bool found; -+ DebugInfo* di; -+ Word j; -+ -+ XArray* dname1 = (XArray*)dname1v; -+ XArray* dname2 = (XArray*)dname2v; -+ -+ if (0) VG_(printf)("get_data_description: dataaddr %#lx\n", data_addr); -+ /* First, see if data_addr is (or is part of) a global variable. -+ Loop over the DebugInfos we have. Check data_addr against the -+ outermost scope of all of them, as that should be a global -+ scope. */ -+ for (di = debugInfo_list; di != NULL; di = di->next) { -+ OSet* global_scope; -+ Word gs_size; -+ Addr zero; -+ DiAddrRange* global_arange; -+ Word i; -+ XArray* vars; -+ -+ /* text segment missing? unlikely, but handle it .. */ -+ if (!di->text_present || di->text_size == 0) -+ continue; -+ /* any var info at all? */ -+ if (!di->varinfo) -+ continue; -+ /* perhaps this object didn't contribute any vars at all? */ -+ if (VG_(sizeXA)( di->varinfo ) == 0) -+ continue; -+ global_scope = *(OSet**)VG_(indexXA)( di->varinfo, 0 ); -+ vg_assert(global_scope); -+ gs_size = VG_(OSetGen_Size)( global_scope ); -+ /* The global scope might be completely empty if this -+ compilation unit declared locals but nothing global. */ -+ if (gs_size == 0) -+ continue; -+ /* But if it isn't empty, then it must contain exactly one -+ element, which covers the entire address range. */ -+ vg_assert(gs_size == 1); -+ /* Fish out the global scope and check it is as expected. */ -+ zero = 0; -+ global_arange -+ = VG_(OSetGen_Lookup)( global_scope, &zero ); -+ /* The global range from (Addr)0 to ~(Addr)0 must exist */ -+ vg_assert(global_arange); -+ vg_assert(global_arange->aMin == (Addr)0 -+ && global_arange->aMax == ~(Addr)0); -+ /* Any vars in this range? */ -+ if (!global_arange->vars) -+ continue; -+ /* Ok, there are some vars in the global scope of this -+ DebugInfo. Wade through them and see if the data addresses -+ of any of them bracket data_addr. */ -+ vars = global_arange->vars; -+ for (i = 0; i < VG_(sizeXA)( vars ); i++) { -+ PtrdiffT offset; -+ DiVariable* var = (DiVariable*)VG_(indexXA)( vars, i ); -+ vg_assert(var->name); -+ /* Note we use a NULL RegSummary* here. It can't make any -+ sense for a global variable to have a location expression -+ which depends on a SP/FP/IP value. So don't supply any. -+ This means, if the evaluation of the location -+ expression/list requires a register, we have to let it -+ fail. */ -+ if (data_address_is_in_var( &offset, di->admin_tyents, var, -+ NULL/* RegSummary* */, -+ data_addr, di )) { -+ PtrdiffT residual_offset = 0; -+ XArray* described = ML_(describe_type)( &residual_offset, -+ di->admin_tyents, -+ var->typeR, offset ); -+ format_message( dname1, dname2, -+ data_addr, var, offset, residual_offset, -+ described, -1/*frameNo*/, tid ); -+ VG_(deleteXA)( described ); -+ zterm_XA( dname1 ); -+ zterm_XA( dname2 ); -+ return True; -+ } -+ } -+ } -+ -+ /* Ok, well it's not a global variable. So now let's snoop around -+ in the stacks of all the threads. First try to figure out which -+ thread's stack data_addr is in. */ -+ -+ /* --- KLUDGE --- Try examining the top frame of all thread stacks. -+ This finds variables which are not stack allocated but are not -+ globally visible either; specifically it appears to pick up -+ variables which are visible only within a compilation unit. -+ These will have the address range of the compilation unit and -+ tend to live at Scope level 1. */ -+ VG_(thread_stack_reset_iter)(&tid); -+ while ( VG_(thread_stack_next)(&tid, &stack_min, &stack_max) ) { -+ if (stack_min >= stack_max) -+ continue; /* ignore obviously stupid cases */ -+ if (consider_vars_in_frame( dname1, dname2, -+ data_addr, -+ VG_(get_IP)(tid), -+ VG_(get_SP)(tid), -+ VG_(get_FP)(tid), tid, 0 )) { -+ zterm_XA( dname1 ); -+ zterm_XA( dname2 ); -+ return True; -+ } -+ } -+ /* --- end KLUDGE --- */ -+ -+ /* Perhaps it's on a thread's stack? */ -+ found = False; -+ VG_(thread_stack_reset_iter)(&tid); -+ while ( VG_(thread_stack_next)(&tid, &stack_min, &stack_max) ) { -+ if (stack_min >= stack_max) -+ continue; /* ignore obviously stupid cases */ -+ if (stack_min - VG_STACK_REDZONE_SZB <= data_addr -+ && data_addr <= stack_max) { -+ found = True; -+ break; -+ } -+ } -+ if (!found) { -+ zterm_XA( dname1 ); -+ zterm_XA( dname2 ); -+ return False; -+ } -+ -+ /* We conclude data_addr is in thread tid's stack. Unwind the -+ stack to get a bunch of (ip,sp,fp) triples describing the -+ frames, and for each frame, consider the local variables. */ -+ n_frames = VG_(get_StackTrace)( tid, ips, N_FRAMES, -+ sps, fps, 0/*first_ip_delta*/ ); -+ -+ /* As a result of KLUDGE above, starting the loop at j = 0 -+ duplicates examination of the top frame and so isn't necessary. -+ Oh well. */ -+ vg_assert(n_frames >= 0 && n_frames <= N_FRAMES); -+ for (j = 0; j < n_frames; j++) { -+ if (consider_vars_in_frame( dname1, dname2, -+ data_addr, -+ ips[j], -+ sps[j], fps[j], tid, j )) { -+ zterm_XA( dname1 ); -+ zterm_XA( dname2 ); -+ return True; -+ } -+ /* Now, it appears that gcc sometimes appears to produce -+ location lists whose ranges don't actually cover the call -+ instruction, even though the address of the variable in -+ question is passed as a parameter in the call. AFAICS this -+ is simply a bug in gcc - how can the variable be claimed not -+ exist in memory (on the stack) for the duration of a call in -+ which its address is passed? But anyway, in the particular -+ case I investigated (memcheck/tests/varinfo6.c, call to croak -+ on line 2999, local var budget declared at line 3115 -+ appearing not to exist across the call to mainSort on line -+ 3143, "gcc.orig (GCC) 3.4.4 20050721 (Red Hat 3.4.4-2)" on -+ amd64), the variable's location list does claim it exists -+ starting at the first byte of the first instruction after the -+ call instruction. So, call consider_vars_in_frame a second -+ time, but this time add 1 to the IP. GDB handles this -+ example with no difficulty, which leads me to believe that -+ either (1) I misunderstood something, or (2) GDB has an -+ equivalent kludge. */ -+ if (j > 0 /* this is a non-innermost frame */ -+ && consider_vars_in_frame( dname1, dname2, -+ data_addr, -+ ips[j] + 1, -+ sps[j], fps[j], tid, j )) { -+ zterm_XA( dname1 ); -+ zterm_XA( dname2 ); -+ return True; -+ } -+ } -+ -+ /* We didn't find anything useful. */ -+ zterm_XA( dname1 ); -+ zterm_XA( dname2 ); -+ return False; -+# undef N_FRAMES -+} -+ -+ -+////////////////////////////////////////////////////////////////// -+// // -+// Support for other kinds of queries to the Dwarf3 var info // -+// // -+////////////////////////////////////////////////////////////////// -+ -+/* Figure out if the variable 'var' has a location that is linearly -+ dependent on a stack pointer value, or a frame pointer value, and -+ if it is, add a description of it to 'blocks'. Otherwise ignore -+ it. If 'arrays_only' is True, also ignore it unless it has an -+ array type. */ -+ -+static -+void analyse_deps ( /*MOD*/XArray* /* of FrameBlock */ blocks, -+ XArray* /* TyEnt */ tyents, -+ Addr ip, const DebugInfo* di, DiVariable* var, -+ Bool arrays_only ) -+{ -+ GXResult res_sp_6k, res_sp_7k, res_fp_6k, res_fp_7k; -+ RegSummary regs; -+ MaybeULong mul; -+ Bool isVec; -+ TyEnt* ty; -+ -+ Bool debug = False; -+ if (0&&debug) -+ VG_(printf)("adeps: var %s\n", var->name ); -+ -+ /* Figure out how big the variable is. */ -+ mul = ML_(sizeOfType)(tyents, var->typeR); -+ /* If this var has a type whose size is unknown, zero, or -+ impossibly large, it should never have been added. ML_(addVar) -+ should have rejected it. */ -+ vg_assert(mul.b == True); -+ vg_assert(mul.ul > 0); -+ if (sizeof(void*) == 4) vg_assert(mul.ul < (1ULL << 32)); -+ /* After this point, we assume we can truncate mul.ul to a host word -+ safely (without loss of info). */ -+ -+ /* skip if non-array and we're only interested in arrays */ -+ ty = ML_(TyEnts__index_by_cuOff)( tyents, NULL, var->typeR ); -+ vg_assert(ty); -+ vg_assert(ty->tag == Te_UNKNOWN || ML_(TyEnt__is_type)(ty)); -+ if (ty->tag == Te_UNKNOWN) -+ return; /* perhaps we should complain in this case? */ -+ isVec = ty->tag == Te_TyArray; -+ if (arrays_only && !isVec) -+ return; -+ -+ if (0) {ML_(pp_TyEnt_C_ishly)(tyents, var->typeR); -+ VG_(printf)(" %s\n", var->name);} -+ -+ /* Do some test evaluations of the variable's location expression, -+ in order to guess whether it is sp-relative, fp-relative, or -+ none. A crude hack, which can be interpreted roughly as finding -+ the first derivative of the location expression w.r.t. the -+ supplied frame and stack pointer values. */ -+ regs.fp = 0; -+ regs.ip = ip; -+ regs.sp = 6 * 1024; -+ res_sp_6k = ML_(evaluate_GX)( var->gexpr, var->fbGX, ®s, di ); -+ -+ regs.fp = 0; -+ regs.ip = ip; -+ regs.sp = 7 * 1024; -+ res_sp_7k = ML_(evaluate_GX)( var->gexpr, var->fbGX, ®s, di ); -+ -+ regs.fp = 6 * 1024; -+ regs.ip = ip; -+ regs.sp = 0; -+ res_fp_6k = ML_(evaluate_GX)( var->gexpr, var->fbGX, ®s, di ); -+ -+ regs.fp = 7 * 1024; -+ regs.ip = ip; -+ regs.sp = 0; -+ res_fp_7k = ML_(evaluate_GX)( var->gexpr, var->fbGX, ®s, di ); -+ -+ vg_assert(res_sp_6k.kind == res_sp_7k.kind); -+ vg_assert(res_sp_6k.kind == res_fp_6k.kind); -+ vg_assert(res_sp_6k.kind == res_fp_7k.kind); -+ -+ if (res_sp_6k.kind == GXR_Addr) { -+ StackBlock block; -+ GXResult res; -+ UWord sp_delta = res_sp_7k.word - res_sp_6k.word; -+ UWord fp_delta = res_fp_7k.word - res_fp_6k.word; -+ tl_assert(sp_delta == 0 || sp_delta == 1024); -+ tl_assert(fp_delta == 0 || fp_delta == 1024); -+ -+ if (sp_delta == 0 && fp_delta == 0) { -+ /* depends neither on sp nor fp, so it can't be a stack -+ local. Ignore it. */ -+ } -+ else -+ if (sp_delta == 1024 && fp_delta == 0) { -+ regs.sp = regs.fp = 0; -+ regs.ip = ip; -+ res = ML_(evaluate_GX)( var->gexpr, var->fbGX, ®s, di ); -+ tl_assert(res.kind == GXR_Addr); -+ if (debug) -+ VG_(printf)(" %5ld .. %5ld (sp) %s\n", -+ res.word, res.word + ((UWord)mul.ul) - 1, var->name); -+ block.base = res.word; -+ block.szB = (SizeT)mul.ul; -+ block.spRel = True; -+ block.isVec = isVec; -+ VG_(memset)( &block.name[0], 0, sizeof(block.name) ); -+ if (var->name) -+ VG_(strncpy)( &block.name[0], var->name, sizeof(block.name)-1 ); -+ block.name[ sizeof(block.name)-1 ] = 0; -+ VG_(addToXA)( blocks, &block ); -+ } -+ else -+ if (sp_delta == 0 && fp_delta == 1024) { -+ regs.sp = regs.fp = 0; -+ regs.ip = ip; -+ res = ML_(evaluate_GX)( var->gexpr, var->fbGX, ®s, di ); -+ tl_assert(res.kind == GXR_Addr); -+ if (debug) -+ VG_(printf)(" %5ld .. %5ld (FP) %s\n", -+ res.word, res.word + ((UWord)mul.ul) - 1, var->name); -+ block.base = res.word; -+ block.szB = (SizeT)mul.ul; -+ block.spRel = False; -+ block.isVec = isVec; -+ VG_(memset)( &block.name[0], 0, sizeof(block.name) ); -+ if (var->name) -+ VG_(strncpy)( &block.name[0], var->name, sizeof(block.name)-1 ); -+ block.name[ sizeof(block.name)-1 ] = 0; -+ VG_(addToXA)( blocks, &block ); -+ } -+ else { -+ vg_assert(0); -+ } -+ } -+} -+ -+ -+/* Get an XArray of StackBlock which describe the stack (auto) blocks -+ for this ip. The caller is expected to free the XArray at some -+ point. If 'arrays_only' is True, only array-typed blocks are -+ returned; otherwise blocks of all types are returned. */ -+ -+void* /* really, XArray* of StackBlock */ -+ VG_(di_get_stack_blocks_at_ip)( Addr ip, Bool arrays_only ) -+{ -+ /* This is a derivation of consider_vars_in_frame() above. */ -+ Word i; -+ DebugInfo* di; -+ RegSummary regs; -+ Bool debug = False; -+ -+ XArray* res = VG_(newXA)( ML_(dinfo_zalloc), "di.debuginfo.dgsbai.1", -+ ML_(dinfo_free), -+ sizeof(StackBlock) ); -+ -+ static UInt n_search = 0; -+ static UInt n_steps = 0; -+ n_search++; -+ if (debug) -+ VG_(printf)("QQQQ: dgsbai: ip %#lx\n", ip); -+ /* first, find the DebugInfo that pertains to 'ip'. */ -+ for (di = debugInfo_list; di; di = di->next) { -+ n_steps++; -+ /* text segment missing? unlikely, but handle it .. */ -+ if (!di->text_present || di->text_size == 0) -+ continue; -+ /* Ok. So does this text mapping bracket the ip? */ -+ if (di->text_avma <= ip && ip < di->text_avma + di->text_size) -+ break; -+ } -+ -+ /* Didn't find it. Strange -- means ip is a code address outside -+ of any mapped text segment. Unlikely but not impossible -- app -+ could be generating code to run. */ -+ if (!di) -+ return res; /* currently empty */ -+ -+ if (0 && ((n_search & 0x1) == 0)) -+ VG_(printf)("VG_(di_get_stack_blocks_at_ip): %u searches, " -+ "%u DebugInfos looked at\n", -+ n_search, n_steps); -+ /* Start of performance-enhancing hack: once every ??? (chosen -+ hackily after profiling) successful searches, move the found -+ DebugInfo one step closer to the start of the list. This makes -+ future searches cheaper. */ -+ if ((n_search & 0xFFFF) == 0) { -+ /* Move si one step closer to the start of the list. */ -+ move_DebugInfo_one_step_forward( di ); -+ } -+ /* End of performance-enhancing hack. */ -+ -+ /* any var info at all? */ -+ if (!di->varinfo) -+ return res; /* currently empty */ -+ -+ /* Work through the scopes from most deeply nested outwards, -+ looking for code address ranges that bracket 'ip'. The -+ variables on each such address range found are in scope right -+ now. Don't descend to level zero as that is the global -+ scope. */ -+ regs.ip = ip; -+ regs.sp = 0; -+ regs.fp = 0; -+ -+ /* "for each scope, working outwards ..." */ -+ for (i = VG_(sizeXA)(di->varinfo) - 1; i >= 1; i--) { -+ XArray* vars; -+ Word j; -+ DiAddrRange* arange; -+ OSet* this_scope -+ = *(OSet**)VG_(indexXA)( di->varinfo, i ); -+ if (debug) -+ VG_(printf)("QQQQ: considering scope %ld\n", (Word)i); -+ if (!this_scope) -+ continue; -+ /* Find the set of variables in this scope that -+ bracket the program counter. */ -+ arange = VG_(OSetGen_LookupWithCmp)( -+ this_scope, &ip, -+ ML_(cmp_for_DiAddrRange_range) -+ ); -+ if (!arange) -+ continue; -+ /* stay sane */ -+ vg_assert(arange->aMin <= arange->aMax); -+ /* It must bracket the ip we asked for, else -+ ML_(cmp_for_DiAddrRange_range) is somehow broken. */ -+ vg_assert(arange->aMin <= ip && ip <= arange->aMax); -+ /* It must have an attached XArray of DiVariables. */ -+ vars = arange->vars; -+ vg_assert(vars); -+ /* But it mustn't cover the entire address range. We only -+ expect that to happen for the global scope (level 0), which -+ we're not looking at here. Except, it may cover the entire -+ address range, but in that case the vars array must be -+ empty. */ -+ vg_assert(! (arange->aMin == (Addr)0 -+ && arange->aMax == ~(Addr)0 -+ && VG_(sizeXA)(vars) > 0) ); -+ for (j = 0; j < VG_(sizeXA)( vars ); j++) { -+ DiVariable* var = (DiVariable*)VG_(indexXA)( vars, j ); -+ if (debug) -+ VG_(printf)("QQQQ: var:name=%s %#lx-%#lx %#lx\n", -+ var->name,arange->aMin,arange->aMax,ip); -+ analyse_deps( res, di->admin_tyents, ip, -+ di, var, arrays_only ); -+ } -+ } -+ -+ return res; -+} -+ -+ -+/* Get an array of GlobalBlock which describe the global blocks owned -+ by the shared object characterised by the given di_handle. Asserts -+ if the handle is invalid. The caller is responsible for freeing -+ the array at some point. If 'arrays_only' is True, only -+ array-typed blocks are returned; otherwise blocks of all types are -+ returned. */ -+ -+void* /* really, XArray* of GlobalBlock */ -+ VG_(di_get_global_blocks_from_dihandle) ( ULong di_handle, -+ Bool arrays_only ) -+{ -+ /* This is a derivation of consider_vars_in_frame() above. */ -+ -+ DebugInfo* di; -+ XArray* gvars; /* XArray* of GlobalBlock */ -+ Word nScopes, scopeIx; -+ -+ /* The first thing to do is find the DebugInfo that -+ pertains to 'di_handle'. */ -+ tl_assert(di_handle > 0); -+ for (di = debugInfo_list; di; di = di->next) { -+ if (di->handle == di_handle) -+ break; -+ } -+ -+ /* If this fails, we were unable to find any DebugInfo with the -+ given handle. This is considered an error on the part of the -+ caller. */ -+ tl_assert(di != NULL); -+ -+ /* we'll put the collected variables in here. */ -+ gvars = VG_(newXA)( ML_(dinfo_zalloc), "di.debuginfo.dggbfd.1", -+ ML_(dinfo_free), sizeof(GlobalBlock) ); -+ tl_assert(gvars); -+ -+ /* any var info at all? */ -+ if (!di->varinfo) -+ return gvars; -+ -+ /* we'll iterate over all the variables we can find, even if -+ it seems senseless to visit stack-allocated variables */ -+ /* Iterate over all scopes */ -+ nScopes = VG_(sizeXA)( di->varinfo ); -+ for (scopeIx = 0; scopeIx < nScopes; scopeIx++) { -+ -+ /* Iterate over each (code) address range at the current scope */ -+ DiAddrRange* range; -+ OSet* /* of DiAddrInfo */ scope -+ = *(OSet**)VG_(indexXA)( di->varinfo, scopeIx ); -+ tl_assert(scope); -+ VG_(OSetGen_ResetIter)(scope); -+ while ( (range = VG_(OSetGen_Next)(scope)) ) { -+ -+ /* Iterate over each variable in the current address range */ -+ Word nVars, varIx; -+ tl_assert(range->vars); -+ nVars = VG_(sizeXA)( range->vars ); -+ for (varIx = 0; varIx < nVars; varIx++) { -+ -+ Bool isVec; -+ GXResult res; -+ MaybeULong mul; -+ GlobalBlock gb; -+ TyEnt* ty; -+ DiVariable* var = VG_(indexXA)( range->vars, varIx ); -+ tl_assert(var->name); -+ if (0) VG_(printf)("at depth %ld var %s ", scopeIx, var->name ); -+ -+ /* Now figure out if this variable has a constant address -+ (that is, independent of FP, SP, phase of moon, etc), -+ and if so, what the address is. Any variable with a -+ constant address is deemed to be a global so we collect -+ it. */ -+ if (0) { VG_(printf)("EVAL: "); ML_(pp_GX)(var->gexpr); -+ VG_(printf)("\n"); } -+ res = ML_(evaluate_trivial_GX)( var->gexpr, di ); -+ -+ /* Not a constant address => not interesting */ -+ if (res.kind != GXR_Addr) { -+ if (0) VG_(printf)("FAIL\n"); -+ continue; -+ } -+ -+ /* Ok, it's a constant address. See if we want to collect -+ it. */ -+ if (0) VG_(printf)("%#lx\n", res.word); -+ -+ /* Figure out how big the variable is. */ -+ mul = ML_(sizeOfType)(di->admin_tyents, var->typeR); -+ -+ /* If this var has a type whose size is unknown, zero, or -+ impossibly large, it should never have been added. -+ ML_(addVar) should have rejected it. */ -+ vg_assert(mul.b == True); -+ vg_assert(mul.ul > 0); -+ if (sizeof(void*) == 4) vg_assert(mul.ul < (1ULL << 32)); -+ /* After this point, we assume we can truncate mul.ul to a -+ host word safely (without loss of info). */ -+ -+ /* skip if non-array and we're only interested in -+ arrays */ -+ ty = ML_(TyEnts__index_by_cuOff)( di->admin_tyents, NULL, -+ var->typeR ); -+ vg_assert(ty); -+ vg_assert(ty->tag == Te_UNKNOWN || ML_(TyEnt__is_type)(ty)); -+ if (ty->tag == Te_UNKNOWN) -+ continue; /* perhaps we should complain in this case? */ -+ -+ isVec = ty->tag == Te_TyArray; -+ if (arrays_only && !isVec) continue; -+ -+ /* Ok, so collect it! */ -+ tl_assert(var->name); -+ tl_assert(di->soname); -+ if (0) VG_(printf)("XXXX %s %s %d\n", var->name, -+ var->fileName?(HChar*)var->fileName -+ :"??",var->lineNo); -+ VG_(memset)(&gb, 0, sizeof(gb)); -+ gb.addr = res.word; -+ gb.szB = (SizeT)mul.ul; -+ gb.isVec = isVec; -+ VG_(strncpy)(&gb.name[0], var->name, sizeof(gb.name)-1); -+ VG_(strncpy)(&gb.soname[0], di->soname, sizeof(gb.soname)-1); -+ tl_assert(gb.name[ sizeof(gb.name)-1 ] == 0); -+ tl_assert(gb.soname[ sizeof(gb.soname)-1 ] == 0); -+ -+ VG_(addToXA)( gvars, &gb ); -+ -+ } /* for (varIx = 0; varIx < nVars; varIx++) */ -+ -+ } /* while ( (range = VG_(OSetGen_Next)(scope)) ) */ -+ -+ } /* for (scopeIx = 0; scopeIx < nScopes; scopeIx++) */ -+ -+ return gvars; -+} -+ -+ -+/*------------------------------------------------------------*/ -+/*--- DebugInfo accessor functions ---*/ -+/*------------------------------------------------------------*/ -+ -+const DebugInfo* VG_(next_DebugInfo)(const DebugInfo* di) -+{ -+ if (di == NULL) -+ return debugInfo_list; -+ return di->next; -+} -+ -+Addr VG_(DebugInfo_get_text_avma)(const DebugInfo* di) -+{ -+ return di->text_present ? di->text_avma : 0; -+} -+ -+SizeT VG_(DebugInfo_get_text_size)(const DebugInfo* di) -+{ -+ return di->text_present ? di->text_size : 0; -+} -+ -+Addr VG_(DebugInfo_get_plt_avma)(const DebugInfo* di) -+{ -+ return di->plt_present ? di->plt_avma : 0; -+} -+ -+SizeT VG_(DebugInfo_get_plt_size)(const DebugInfo* di) -+{ -+ return di->plt_present ? di->plt_size : 0; -+} -+ -+Addr VG_(DebugInfo_get_gotplt_avma)(const DebugInfo* di) -+{ -+ return di->gotplt_present ? di->gotplt_avma : 0; -+} -+ -+SizeT VG_(DebugInfo_get_gotplt_size)(const DebugInfo* di) -+{ -+ return di->gotplt_present ? di->gotplt_size : 0; -+} -+ -+const UChar* VG_(DebugInfo_get_soname)(const DebugInfo* di) -+{ -+ return di->soname; -+} -+ -+const UChar* VG_(DebugInfo_get_filename)(const DebugInfo* di) -+{ -+ return di->filename; -+} -+ -+PtrdiffT VG_(DebugInfo_get_text_bias)(const DebugInfo* di) -+{ -+ return di->text_present ? di->text_bias : 0; -+} -+ -+Int VG_(DebugInfo_syms_howmany) ( const DebugInfo *si ) -+{ -+ return si->symtab_used; -+} -+ -+void VG_(DebugInfo_syms_getidx) ( const DebugInfo *si, -+ Int idx, -+ /*OUT*/Addr* avma, -+ /*OUT*/Addr* tocptr, -+ /*OUT*/UInt* size, -+ /*OUT*/HChar** name, -+ /*OUT*/Bool* isText, -+ /*OUT*/Bool* isIFunc ) -+{ -+ vg_assert(idx >= 0 && idx < si->symtab_used); -+ if (avma) *avma = si->symtab[idx].addr; -+ if (tocptr) *tocptr = si->symtab[idx].tocptr; -+ if (size) *size = si->symtab[idx].size; -+ if (name) *name = (HChar*)si->symtab[idx].name; -+ if (isText) *isText = si->symtab[idx].isText; -+ if (isIFunc) *isIFunc = si->symtab[idx].isIFunc; -+} -+ -+ -+/*------------------------------------------------------------*/ -+/*--- SectKind query functions ---*/ -+/*------------------------------------------------------------*/ -+ -+/* Convert a VgSectKind to a string, which must be copied if you want -+ to change it. */ -+const HChar* VG_(pp_SectKind)( VgSectKind kind ) -+{ -+ switch (kind) { -+ case Vg_SectUnknown: return "Unknown"; -+ case Vg_SectText: return "Text"; -+ case Vg_SectData: return "Data"; -+ case Vg_SectBSS: return "BSS"; -+ case Vg_SectGOT: return "GOT"; -+ case Vg_SectPLT: return "PLT"; -+ case Vg_SectOPD: return "OPD"; -+ case Vg_SectGOTPLT: return "GOTPLT"; -+ default: vg_assert(0); -+ } -+} -+ -+/* Given an address 'a', make a guess of which section of which object -+ it comes from. If name is non-NULL, then the last n_name-1 -+ characters of the object's name is put in name[0 .. n_name-2], and -+ name[n_name-1] is set to zero (guaranteed zero terminated). */ -+ -+VgSectKind VG_(DebugInfo_sect_kind)( /*OUT*/UChar* name, SizeT n_name, -+ Addr a) -+{ -+ DebugInfo* di; -+ VgSectKind res = Vg_SectUnknown; -+ -+ for (di = debugInfo_list; di != NULL; di = di->next) { -+ -+ if (0) -+ VG_(printf)( -+ "addr=%#lx di=%p %s got=%#lx,%ld plt=%#lx,%ld " -+ "data=%#lx,%ld bss=%#lx,%ld\n", -+ a, di, di->filename, -+ di->got_avma, di->got_size, -+ di->plt_avma, di->plt_size, -+ di->data_avma, di->data_size, -+ di->bss_avma, di->bss_size); -+ -+ if (di->text_present -+ && di->text_size > 0 -+ && a >= di->text_avma && a < di->text_avma + di->text_size) { -+ res = Vg_SectText; -+ break; -+ } -+ if (di->data_present -+ && di->data_size > 0 -+ && a >= di->data_avma && a < di->data_avma + di->data_size) { -+ res = Vg_SectData; -+ break; -+ } -+ if (di->sdata_present -+ && di->sdata_size > 0 -+ && a >= di->sdata_avma && a < di->sdata_avma + di->sdata_size) { -+ res = Vg_SectData; -+ break; -+ } -+ if (di->bss_present -+ && di->bss_size > 0 -+ && a >= di->bss_avma && a < di->bss_avma + di->bss_size) { -+ res = Vg_SectBSS; -+ break; -+ } -+ if (di->sbss_present -+ && di->sbss_size > 0 -+ && a >= di->sbss_avma && a < di->sbss_avma + di->sbss_size) { -+ res = Vg_SectBSS; -+ break; -+ } -+ if (di->plt_present -+ && di->plt_size > 0 -+ && a >= di->plt_avma && a < di->plt_avma + di->plt_size) { -+ res = Vg_SectPLT; -+ break; -+ } -+ if (di->got_present -+ && di->got_size > 0 -+ && a >= di->got_avma && a < di->got_avma + di->got_size) { -+ res = Vg_SectGOT; -+ break; -+ } -+ if (di->gotplt_present -+ && di->gotplt_size > 0 -+ && a >= di->gotplt_avma && a < di->gotplt_avma + di->gotplt_size) { -+ res = Vg_SectGOTPLT; -+ break; -+ } -+ if (di->opd_present -+ && di->opd_size > 0 -+ && a >= di->opd_avma && a < di->opd_avma + di->opd_size) { -+ res = Vg_SectOPD; -+ break; -+ } -+ /* we could also check for .eh_frame, if anyone really cares */ -+ } -+ -+ vg_assert( (di == NULL && res == Vg_SectUnknown) -+ || (di != NULL && res != Vg_SectUnknown) ); -+ -+ if (name) { -+ -+ vg_assert(n_name >= 8); -+ -+ if (di && di->filename) { -+ Int i, j; -+ Int fnlen = VG_(strlen)(di->filename); -+ Int start_at = 1 + fnlen - n_name; -+ if (start_at < 0) start_at = 0; -+ vg_assert(start_at < fnlen); -+ i = start_at; j = 0; -+ while (True) { -+ vg_assert(j >= 0 && j < n_name); -+ vg_assert(i >= 0 && i <= fnlen); -+ name[j] = di->filename[i]; -+ if (di->filename[i] == 0) break; -+ i++; j++; -+ } -+ vg_assert(i == fnlen); -+ } else { -+ VG_(snprintf)(name, n_name, "%s", "???"); -+ } -+ -+ name[n_name-1] = 0; -+ } -+ -+ return res; -+ -+} -+ -+/*--------------------------------------------------------------------*/ -+/*--- end ---*/ -+/*--------------------------------------------------------------------*/ ---- coregrind/m_debuginfo/priv_storage.h -+++ coregrind/m_debuginfo/priv_storage.h -@@ -140,6 +140,22 @@ - CFIR_CFAREL -> cfa + r14/r13/r12/r11/r7/ra_off - CFIR_MEMCFAREL -> *( cfa + r14/r13/r12/r11/r7/ra_off ) - CFIR_EXPR -> expr whose index is in r14/r13/r12/r11/r7/ra_off -+ -+ On s390x we have a similar logic as x86 or amd64. We need the stack pointer -+ (r15), the frame pointer r11 (like BP) and together with the instruction -+ address in the PSW we can calculate the previous values: -+ cfa = case cfa_how of -+ CFIC_IA_SPREL -> r15 + cfa_off -+ CFIC_IA_BPREL -> r11 + cfa_off -+ CFIR_IA_EXPR -> expr whose index is in cfa_off -+ -+ old_sp/fp/ra -+ = case sp/fp/ra_how of -+ CFIR_UNKNOWN -> we don't know, sorry -+ CFIR_SAME -> same as it was before (sp/fp only) -+ CFIR_CFAREL -> cfa + sp/fp/ra_off -+ CFIR_MEMCFAREL -> *( cfa + sp/fp/ra_off ) -+ CFIR_EXPR -> expr whose index is in sp/fp/ra_off - */ - - #define CFIC_IA_SPREL ((UChar)1) -@@ -208,6 +224,21 @@ - Int ra_off; - } - DiCfSI; -+#elif defined(VGA_s390x) -+typedef -+ struct { -+ Addr base; -+ UInt len; -+ UChar cfa_how; /* a CFIC_ value */ -+ UChar sp_how; /* a CFIR_ value */ -+ UChar ra_how; /* a CFIR_ value */ -+ UChar fp_how; /* a CFIR_ value */ -+ Int cfa_off; -+ Int sp_off; -+ Int ra_off; -+ Int fp_off; -+ } -+ DiCfSI; - #else - # error "Unknown arch" - #endif -@@ -230,7 +261,8 @@ - Creg_ARM_R13, - Creg_ARM_R12, - Creg_ARM_R15, -- Creg_ARM_R14 -+ Creg_ARM_R14, -+ Creg_S390_R14 - } - CfiReg; - ---- coregrind/m_debuginfo/readdwarf.c -+++ coregrind/m_debuginfo/readdwarf.c -@@ -1832,6 +1832,10 @@ - # define FP_REG 6 - # define SP_REG 7 - # define RA_REG_DEFAULT 16 -+#elif defined(VGP_s390x_linux) -+# define FP_REG 11 // sometimes s390 has a frame pointer in r11 -+# define SP_REG 15 // stack is always r15 -+# define RA_REG_DEFAULT 14 // the return address is in r14 - #else - # error "Unknown platform" - #endif -@@ -2139,7 +2143,7 @@ - else - if (ctxs->cfa_is_regoff && ctxs->cfa_reg == SP_REG) { - si->cfa_off = ctxs->cfa_off; --# if defined(VGA_x86) || defined(VGA_amd64) -+# if defined(VGA_x86) || defined(VGA_amd64) || defined(VGA_s390x) - si->cfa_how = CFIC_IA_SPREL; - # elif defined(VGA_arm) - si->cfa_how = CFIC_ARM_R13REL; -@@ -2150,7 +2154,7 @@ - else - if (ctxs->cfa_is_regoff && ctxs->cfa_reg == FP_REG) { - si->cfa_off = ctxs->cfa_off; --# if defined(VGA_x86) || defined(VGA_amd64) -+# if defined(VGA_x86) || defined(VGA_amd64) || defined(VGA_s390x) - si->cfa_how = CFIC_IA_BPREL; - # elif defined(VGA_arm) - si->cfa_how = CFIC_ARM_R12REL; -@@ -2303,6 +2307,55 @@ - return True; - - -+# elif defined(VGA_s390x) -+ -+ SUMMARISE_HOW(si->ra_how, si->ra_off, -+ ctxs->reg[ctx->ra_reg] ); -+ SUMMARISE_HOW(si->fp_how, si->fp_off, -+ ctxs->reg[FP_REG] ); -+ SUMMARISE_HOW(si->sp_how, si->sp_off, -+ ctxs->reg[SP_REG] ); -+ -+ /* change some defaults to consumable values */ -+ if (si->sp_how == CFIR_UNKNOWN) -+ si->sp_how = CFIR_SAME; -+ -+ if (si->fp_how == CFIR_UNKNOWN) -+ si->fp_how = CFIR_SAME; -+ -+ if (si->cfa_how == CFIR_UNKNOWN) { -+ si->cfa_how = CFIC_IA_SPREL; -+ si->cfa_off = 160; -+ } -+ if (si->ra_how == CFIR_UNKNOWN) { -+ if (!debuginfo->cfsi_exprs) -+ debuginfo->cfsi_exprs = VG_(newXA)( ML_(dinfo_zalloc), -+ "di.ccCt.2a", -+ ML_(dinfo_free), -+ sizeof(CfiExpr) ); -+ si->ra_how = CFIR_EXPR; -+ si->ra_off = ML_(CfiExpr_CfiReg)( debuginfo->cfsi_exprs, -+ Creg_S390_R14); -+ } -+ -+ /* knock out some obviously stupid cases */ -+ if (si->ra_how == CFIR_SAME) -+ { why = 3; goto failed; } -+ -+ /* bogus looking range? Note, we require that the difference is -+ representable in 32 bits. */ -+ if (loc_start >= ctx->loc) -+ { why = 4; goto failed; } -+ if (ctx->loc - loc_start > 10000000 /* let's say */) -+ { why = 5; goto failed; } -+ -+ si->base = loc_start + ctx->initloc; -+ si->len = (UInt)(ctx->loc - loc_start); -+ -+ return True; -+ -+ -+ - # elif defined(VGA_ppc32) || defined(VGA_ppc64) - # else - # error "Unknown arch" -@@ -2376,6 +2429,13 @@ - return ML_(CfiExpr_CfiReg)( dstxa, Creg_ARM_R12 ); - if (dwreg == srcuc->ra_reg) - return ML_(CfiExpr_CfiReg)( dstxa, Creg_ARM_R15 ); /* correct? */ -+# elif defined(VGA_s390x) -+ if (dwreg == SP_REG) -+ return ML_(CfiExpr_CfiReg)( dstxa, Creg_IA_SP ); -+ if (dwreg == FP_REG) -+ return ML_(CfiExpr_CfiReg)( dstxa, Creg_IA_BP ); -+ if (dwreg == srcuc->ra_reg) -+ return ML_(CfiExpr_CfiReg)( dstxa, Creg_IA_IP ); /* correct? */ - # elif defined(VGA_ppc32) || defined(VGA_ppc64) - # else - # error "Unknown arch" ---- coregrind/m_debuginfo/readelf.c -+++ coregrind/m_debuginfo/readelf.c -@@ -1739,7 +1739,7 @@ - - /* PLT is different on different platforms, it seems. */ - # if defined(VGP_x86_linux) || defined(VGP_amd64_linux) \ -- || defined(VGP_arm_linux) -+ || defined(VGP_arm_linux) || defined (VGP_s390x_linux) - /* Accept .plt where mapped as rx (code) */ - if (0 == VG_(strcmp)(name, ".plt")) { - if (inrx && size > 0 && !di->plt_present) { -@@ -2187,8 +2187,9 @@ - - /* Read the stabs and/or dwarf2 debug information, if any. It - appears reading stabs stuff on amd64-linux doesn't work, so -- we ignore it. */ --# if !defined(VGP_amd64_linux) -+ we ignore it. On s390x stabs also doesnt work and we always -+ have the dwarf info in the eh_frame. */ -+# if !defined(VGP_amd64_linux) && !defined(VGP_s390x_linux) - if (stab_img && stabstr_img) { - ML_(read_debuginfo_stabs) ( di, stab_img, stab_sz, - stabstr_img, stabstr_sz ); ---- coregrind/m_debuginfo/storage.c -+++ coregrind/m_debuginfo/storage.c -@@ -141,6 +141,9 @@ - case CFIC_ARM_R11REL: - VG_(printf)("let cfa=oldR11+%d", si->cfa_off); - break; -+ case CFIR_SAME: -+ VG_(printf)("let cfa=Same"); -+ break; - case CFIC_ARM_R7REL: - VG_(printf)("let cfa=oldR7+%d", si->cfa_off); - break; -@@ -172,6 +175,11 @@ - VG_(printf)(" R7="); - SHOW_HOW(si->r7_how, si->r7_off); - # elif defined(VGA_ppc32) || defined(VGA_ppc64) -+# elif defined(VGA_s390x) -+ VG_(printf)(" SP="); -+ SHOW_HOW(si->sp_how, si->sp_off); -+ VG_(printf)(" FP="); -+ SHOW_HOW(si->fp_how, si->fp_off); - # else - # error "Unknown arch" - # endif ---- coregrind/m_debuglog.c -+++ coregrind/m_debuglog.c -@@ -516,6 +516,48 @@ - return __res; - } - -+#elif defined(VGP_s390x_linux) -+static UInt local_sys_write_stderr ( HChar* buf, Int n ) -+{ -+ register Int r2 asm("2") = 2; /* file descriptor STDERR */ -+ register HChar* r3 asm("3") = buf; -+ register ULong r4 asm("4") = n; -+ register ULong r2_res asm("2"); -+ ULong __res; -+ -+ __asm__ __volatile__ ( -+ "svc %b1\n" -+ : "=d" (r2_res) -+ : "i" (__NR_write), -+ "0" (r2), -+ "d" (r3), -+ "d" (r4) -+ : "cc", "memory"); -+ __res = r2_res; -+ -+ if (__res >= (ULong)(-125)) -+ __res = -1; -+ return (UInt)(__res); -+} -+ -+static UInt local_sys_getpid ( void ) -+{ -+ register ULong r2 asm("2"); -+ ULong __res; -+ -+ __asm__ __volatile__ ( -+ "svc %b1\n" -+ : "=d" (r2) -+ : "i" (__NR_getpid) -+ : "cc", "memory"); -+ __res = r2; -+ -+ if (__res >= (ULong)(-125)) -+ __res = -1; -+ return (UInt)(__res); -+} -+ -+ - #else - # error Unknown platform - #endif ---- coregrind/m_dispatch/dispatch-s390x-linux.S -+++ coregrind/m_dispatch/dispatch-s390x-linux.S -@@ -0,0 +1,397 @@ -+ -+/*--------------------------------------------------------------------*/ -+/*--- The core dispatch loop, for jumping to a code address. ---*/ -+/*--- dispatch-s390x-linux.S ---*/ -+/*--------------------------------------------------------------------*/ -+ -+/* -+ This file is part of Valgrind, a dynamic binary instrumentation -+ framework. -+ -+ Copyright IBM Corp. 2010 -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA -+ 02111-1307, USA. -+ -+ The GNU General Public License is contained in the file COPYING. -+*/ -+ -+/* Contributed by Florian Krohm and Christian Borntraeger */ -+ -+#include "pub_core_basics_asm.h" -+#include "pub_core_dispatch_asm.h" -+#include "pub_core_transtab_asm.h" -+#include "libvex_guest_offsets.h" -+#include "libvex_s390x.h" -+ -+#if defined(VGA_s390x) -+ -+/*------------------------------------------------------------*/ -+/*--- ---*/ -+/*--- The dispatch loop. VG_(run_innerloop) is used to ---*/ -+/*--- run all translations except no-redir ones. ---*/ -+/*--- ---*/ -+/*------------------------------------------------------------*/ -+ -+/* Convenience definitions for readability */ -+#undef SP -+#define SP S390_REGNO_STACK_POINTER -+ -+#undef LR -+#define LR S390_REGNO_LINK_REGISTER -+ -+/* Location of valgrind's saved FPC register */ -+#define S390_LOC_SAVED_FPC_V S390_OFFSET_SAVED_FPC_V(SP) -+ -+/* Location of saved guest state pointer */ -+#define S390_LOC_SAVED_GSP S390_OFFSET_SAVED_GSP(SP) -+ -+/*----------------------------------------------------*/ -+/*--- Preamble (set everything up) ---*/ -+/*----------------------------------------------------*/ -+ -+/* signature: -+UWord VG_(run_innerloop) ( void* guest_state, UWord do_profiling ); -+*/ -+ -+.text -+.align 4 -+.globl VG_(run_innerloop) -+VG_(run_innerloop): -+ /* r2 holds address of guest_state */ -+ /* r3 holds do_profiling (a flag) */ -+ -+ /* Save gprs ABI: r6...r13 and r15 */ -+ stmg %r6,%r15,48(SP) -+ -+ /* New stack frame */ -+ aghi SP,-S390_INNERLOOP_FRAME_SIZE -+ -+ /* Save fprs: ABI: f8...f15 */ -+ std %f8,160+0(SP) -+ std %f9,160+8(SP) -+ std %f10,160+16(SP) -+ std %f11,160+24(SP) -+ std %f12,160+32(SP) -+ std %f13,160+40(SP) -+ std %f14,160+48(SP) -+ std %f15,160+56(SP) -+ -+ /* Load address of guest state into guest state register (r13) */ -+ lgr %r13,%r2 -+ -+ /* Store address of guest state pointer on stack. -+ It will be needed later because upon return from a VEX translation -+ r13 may contain a special value. So the old value will be used to -+ determine whether r13 contains a special value. */ -+ stg %r13,S390_LOC_SAVED_GSP -+ -+ /* Save valgrind's FPC on stack so run_innerloop_exit can restore -+ it later . */ -+ stfpc S390_LOC_SAVED_FPC_V -+ -+ /* Load the FPC the way the client code wants it. I.e. pull the -+ value from the guest state. -+ lfpc OFFSET_s390x_fpc(%r13) -+ -+ /* Get the IA from the guest state */ -+ lg %r2,OFFSET_s390x_IA(%r13) -+ -+ /* Get VG_(dispatch_ctr) -- a 32-bit value -- and store it in a reg */ -+ larl %r6,VG_(dispatch_ctr) -+ l S390_REGNO_DISPATCH_CTR,0(%r6) -+ -+ /* Fall into main loop (the right one) */ -+ -+ /* r3 = 1 --> do_profiling. We may trash r3 later on. That's OK, -+ because it's a volatile register (does not need to be preserved). */ -+ ltgr %r3,%r3 -+ je run_innerloop__dispatch_unprofiled -+ j run_innerloop__dispatch_profiled -+ -+/*----------------------------------------------------*/ -+/*--- NO-PROFILING (standard) dispatcher ---*/ -+/*----------------------------------------------------*/ -+ -+run_innerloop__dispatch_unprofiled: -+ /* This is the story: -+ -+ r2 = IA = next guest address -+ r12 = VG_(dispatch_ctr) -+ r13 = guest state pointer or (upon return from guest code) some -+ special value -+ r15 = stack pointer (as usual) -+ */ -+ -+ /* Has the guest state pointer been messed with? If yes, exit. */ -+ cg %r13,S390_LOC_SAVED_GSP /* r13 = actual guest state pointer */ -+ larl %r8, VG_(tt_fast) -+ jne gsp_changed -+ -+ /* Save the jump address in the guest state */ -+ stg %r2,OFFSET_s390x_IA(%r13) -+ -+ -+ /* Try a fast lookup in the translation cache: -+ Compute offset (not index) into VT_(tt_fast): -+ -+ offset = VG_TT_FAST_HASH(addr) * sizeof(FastCacheEntry) -+ -+ with VG_TT_FAST_HASH(addr) == (addr >> 1) & VG_TT_FAST_MASK -+ and sizeof(FastCacheEntry) == 16 -+ -+ offset = ((addr >> 1) & VG_TT_FAST_MASK) << 4 -+ */ -+ lghi %r5,VG_TT_FAST_MASK -+ srlg %r7, %r2,1 /* next guest addr >> 1*/ -+ ngr %r7,%r5 -+ sllg %r7,%r7,4 -+ -+ /* Set the return address to the beginning of the loop here to -+ have some instruction between setting r7 and using it as an -+ address */ -+ larl LR,run_innerloop__dispatch_unprofiled -+ -+ /* Are we out of timeslice? If yes, defer to scheduler. */ -+ ahi S390_REGNO_DISPATCH_CTR,-1 -+ jz counter_is_zero -+ -+ -+ lg %r10, 0(%r8,%r7) /* .guest */ -+ lg %r11, 8(%r8,%r7) /* .host */ -+ cgr %r2, %r10 -+ jne fast_lookup_failed -+ -+ /* Found a match. Call .host. -+ r11 is an address. There we will find the instrumented client code. -+ That code may modify the guest state register r13. The client code -+ will return to the beginning of this loop start by issuing br LR. -+ We can simply branch to the host code */ -+ br %r11 -+ -+ -+/*----------------------------------------------------*/ -+/*--- PROFILING dispatcher (can be much slower) ---*/ -+/*----------------------------------------------------*/ -+ -+run_innerloop__dispatch_profiled: -+ -+ /* Has the guest state pointer been messed with? If yes, exit. */ -+ cg %r13,S390_LOC_SAVED_GSP /* r13 = actual guest state pointer */ -+ larl %r8, VG_(tt_fast) -+ jne gsp_changed -+ -+ /* Save the jump address in the guest state */ -+ stg %r2,OFFSET_s390x_IA(%r13) -+ -+ /* Try a fast lookup in the translation cache: -+ Compute offset (not index) into VT_(tt_fast): -+ -+ offset = VG_TT_FAST_HASH(addr) * sizeof(FastCacheEntry) -+ -+ with VG_TT_FAST_HASH(addr) == (addr >> 1) & VG_TT_FAST_MASK -+ and sizeof(FastCacheEntry) == 16 -+ -+ offset = ((addr >> 1) & VG_TT_FAST_MASK) << 4 -+ */ -+ lghi %r5,VG_TT_FAST_MASK -+ srlg %r7,%r2,1 /* next guest addr >> 1*/ -+ ngr %r7,%r5 -+ sllg %r7,%r7,4 -+ -+ /* Set the return address to the beginning of the loop here to -+ have some instruction between setting r7 and using it as an -+ address */ -+ larl LR,run_innerloop__dispatch_profiled -+ -+ /* Are we out of timeslice? If yes, defer to scheduler. */ -+ ahi S390_REGNO_DISPATCH_CTR,-1 -+ jz counter_is_zero -+ -+ lg %r10, 0(%r8,%r7) /* .guest */ -+ lg %r11, 8(%r8,%r7) /* .host */ -+ cgr %r2, %r10 -+ jne fast_lookup_failed -+ -+ /* sizeof(FastCacheEntry) == 16, sizeof(*UInt)==8 */ -+ srlg %r7,%r7,1 -+ -+ /* we got a hit: VG_(tt_fastN) is guaranteed to point to count */ -+ larl %r8, VG_(tt_fastN) -+ -+ /* increment bb profile counter */ -+ lg %r9,0(%r8,%r7) -+ l %r10,0(%r9) -+ ahi %r10,1 -+ st %r10,0(%r9) -+ -+ /* Found a match. Call .host. -+ r11 is an address. There we will find the instrumented client code. -+ That code may modify the guest state register r13. The client code -+ will return to the beginning of this loop start by issuing br LR. -+ We can simply branch to the host code */ -+ br %r11 -+ -+/*----------------------------------------------------*/ -+/*--- exit points ---*/ -+/*----------------------------------------------------*/ -+ -+gsp_changed: -+ /* Someone messed with the gsp (in r13). Have to -+ defer to scheduler to resolve this. The register -+ holding VG_(dispatch_ctr) is not yet decremented, -+ so no need to increment. */ -+ -+ /* Update the IA in the guest state */ -+ lg %r6,S390_LOC_SAVED_GSP /* r6 = original guest state pointer */ -+ stg %r2,OFFSET_s390x_IA(%r6) -+ -+ /* Return the special guest state pointer value */ -+ lgr %r2, %r13 -+ j run_innerloop_exit -+ -+ -+counter_is_zero: -+ /* IA is up to date */ -+ -+ /* Back out decrement of the dispatch counter */ -+ ahi S390_REGNO_DISPATCH_CTR,1 -+ -+ /* Set return value for the scheduler */ -+ lghi %r2,VG_TRC_INNER_COUNTERZERO -+ j run_innerloop_exit -+ -+ -+fast_lookup_failed: -+ /* IA is up to date */ -+ -+ /* Back out decrement of the dispatch counter */ -+ ahi S390_REGNO_DISPATCH_CTR,1 -+ -+ /* Set return value for the scheduler */ -+ lghi %r2,VG_TRC_INNER_FASTMISS -+ j run_innerloop_exit -+ -+ -+ /* All exits from the dispatcher go through here. -+ When we come here r2 holds the return value. */ -+run_innerloop_exit: -+ -+ /* Restore valgrind's FPC, as client code may have changed it. */ -+ lfpc S390_LOC_SAVED_FPC_V -+ -+ /* Write ctr to VG_(dispatch_ctr) (=32bit value) */ -+ larl %r6,VG_(dispatch_ctr) -+ st S390_REGNO_DISPATCH_CTR,0(%r6) -+ -+ /* Restore callee-saved registers... */ -+ -+ /* Floating-point regs */ -+ ld %f8,160+0(SP) -+ ld %f9,160+8(SP) -+ ld %f10,160+16(SP) -+ ld %f11,160+24(SP) -+ ld %f12,160+32(SP) -+ ld %f13,160+40(SP) -+ ld %f14,160+48(SP) -+ ld %f15,160+56(SP) -+ -+ /* Remove atack frame */ -+ aghi SP,S390_INNERLOOP_FRAME_SIZE -+ -+ /* General-purpose regs. This also restores the original link -+ register (r14) and stack pointer (r15). */ -+ lmg %r6,%r15,48(SP) -+ -+ /* Return */ -+ br LR -+ -+/*------------------------------------------------------------*/ -+/*--- ---*/ -+/*--- A special dispatcher, for running no-redir ---*/ -+/*--- translations. Just runs the given translation once. ---*/ -+/*--- ---*/ -+/*------------------------------------------------------------*/ -+ -+/* signature: -+void VG_(run_a_noredir_translation) ( UWord* argblock ); -+*/ -+ -+/* Run a no-redir translation. argblock points to 4 UWords, 2 to carry args -+ and 2 to carry results: -+ 0: input: ptr to translation -+ 1: input: ptr to guest state -+ 2: output: next guest PC -+ 3: output: guest state pointer afterwards (== thread return code) -+*/ -+.text -+.align 4 -+.globl VG_(run_a_noredir_translation) -+VG_(run_a_noredir_translation): -+ stmg %r6,%r15,48(SP) -+ aghi SP,-S390_INNERLOOP_FRAME_SIZE -+ std %f8,160+0(SP) -+ std %f9,160+8(SP) -+ std %f10,160+16(SP) -+ std %f11,160+24(SP) -+ std %f12,160+32(SP) -+ std %f13,160+40(SP) -+ std %f14,160+48(SP) -+ std %f15,160+56(SP) -+ -+ /* Load address of guest state into guest state register (r13) */ -+ lg %r13,8(%r2) -+ -+ /* Get the IA */ -+ lg %r11,0(%r2) -+ -+ /* save r2 (argblock) as it is clobbered */ -+ stg %r2,160+64(SP) -+ -+ /* the call itself */ -+ basr LR,%r11 -+ -+ /* restore argblock */ -+ lg %r1,160+64(SP) -+ /* save the next guest PC */ -+ stg %r2,16(%r1) -+ -+ /* save the guest state */ -+ stg %r13,24(%r1) -+ -+ /* Restore Floating-point regs */ -+ ld %f8,160+0(SP) -+ ld %f9,160+8(SP) -+ ld %f10,160+16(SP) -+ ld %f11,160+24(SP) -+ ld %f12,160+32(SP) -+ ld %f13,160+40(SP) -+ ld %f14,160+48(SP) -+ ld %f15,160+56(SP) -+ -+ aghi SP,S390_INNERLOOP_FRAME_SIZE -+ -+ lmg %r6,%r15,48(SP) -+ br %r14 -+ -+ -+/* Let the linker know we don't need an executable stack */ -+.section .note.GNU-stack,"",@progbits -+ -+#endif /* VGA_s390x */ -+ -+/*--------------------------------------------------------------------*/ -+/*--- end dispatch-s390x-linux.S ---*/ -+/*--------------------------------------------------------------------*/ ---- coregrind/m_initimg/initimg-linux.c -+++ coregrind/m_initimg/initimg-linux.c -@@ -1040,6 +1040,21 @@ - // FIXME jrs: what's this for? - arch->vex.guest_R1 = iifii.initial_client_SP; - -+# elif defined(VGP_s390x_linux) -+ vg_assert(0 == sizeof(VexGuestS390XState) % 16); -+ -+ /* Zero out the initial state. This also sets the guest_fpc to 0, which -+ is also done by the kernel for the fpc during execve. */ -+ LibVEX_GuestS390X_initialise(&arch->vex); -+ -+ /* Zero out the shadow area. */ -+ VG_(memset)(&arch->vex_shadow1, 0, sizeof(VexGuestS390XState)); -+ VG_(memset)(&arch->vex_shadow2, 0, sizeof(VexGuestS390XState)); -+ -+ /* Put essential stuff into the new state. */ -+ arch->vex.guest_SP = iifii.initial_client_SP; -+ arch->vex.guest_IA = iifii.initial_client_IP; -+ - # else - # error Unknown platform - # endif ---- coregrind/m_libcassert.c -+++ coregrind/m_libcassert.c -@@ -135,6 +135,22 @@ - (srP)->misc.ARM.r11 = block[4]; \ - (srP)->misc.ARM.r7 = block[5]; \ - } -+#elif defined(VGP_s390x_linux) -+# define GET_STARTREGS(srP) \ -+ { ULong ia, sp, fp, lr; \ -+ __asm__ __volatile__( \ -+ "bras %0,0f;" \ -+ "0: lgr %1,15;" \ -+ "lgr %2,11;" \ -+ "lgr %3,14;" \ -+ : "=r" (ia), "=r" (sp),"=r" (fp),"=r" (lr) \ -+ /* no read & clobber */ \ -+ ); \ -+ (srP)->r_pc = ia; \ -+ (srP)->r_sp = sp; \ -+ (srP)->misc.S390X.r_fp = fp; \ -+ (srP)->misc.S390X.r_lr = lr; \ -+ } - #else - # error Unknown platform - #endif ---- coregrind/m_libcfile.c -+++ coregrind/m_libcfile.c -@@ -795,7 +795,7 @@ - Int VG_(socket) ( Int domain, Int type, Int protocol ) - { - # if defined(VGP_x86_linux) || defined(VGP_ppc32_linux) \ -- || defined(VGP_ppc64_linux) -+ || defined(VGP_ppc64_linux) || defined(VGP_s390x_linux) - SysRes res; - UWord args[3]; - args[0] = domain; -@@ -836,7 +836,7 @@ - Int my_connect ( Int sockfd, struct vki_sockaddr_in* serv_addr, Int addrlen ) - { - # if defined(VGP_x86_linux) || defined(VGP_ppc32_linux) \ -- || defined(VGP_ppc64_linux) -+ || defined(VGP_ppc64_linux) || defined(VGP_s390x_linux) - SysRes res; - UWord args[3]; - args[0] = sockfd; -@@ -876,7 +876,7 @@ - SIGPIPE */ - - # if defined(VGP_x86_linux) || defined(VGP_ppc32_linux) \ -- || defined(VGP_ppc64_linux) -+ || defined(VGP_ppc64_linux) || defined(VGP_s390x_linux) - SysRes res; - UWord args[4]; - args[0] = sd; -@@ -908,7 +908,7 @@ - Int VG_(getsockname) ( Int sd, struct vki_sockaddr *name, Int *namelen) - { - # if defined(VGP_x86_linux) || defined(VGP_ppc32_linux) \ -- || defined(VGP_ppc64_linux) -+ || defined(VGP_ppc64_linux) || defined(VGP_s390x_linux) - SysRes res; - UWord args[3]; - args[0] = sd; -@@ -940,7 +940,7 @@ - Int VG_(getpeername) ( Int sd, struct vki_sockaddr *name, Int *namelen) - { - # if defined(VGP_x86_linux) || defined(VGP_ppc32_linux) \ -- || defined(VGP_ppc64_linux) -+ || defined(VGP_ppc64_linux) || defined(VGP_s390x_linux) - SysRes res; - UWord args[3]; - args[0] = sd; -@@ -973,7 +973,7 @@ - Int *optlen) - { - # if defined(VGP_x86_linux) || defined(VGP_ppc32_linux) \ -- || defined(VGP_ppc64_linux) -+ || defined(VGP_ppc64_linux) || defined(VGP_s390x_linux) - SysRes res; - UWord args[5]; - args[0] = sd; ---- coregrind/m_libcproc.c -+++ coregrind/m_libcproc.c -@@ -545,7 +545,7 @@ - # elif defined(VGP_amd64_linux) || defined(VGP_ppc64_linux) \ - || defined(VGP_arm_linux) \ - || defined(VGP_ppc32_aix5) || defined(VGP_ppc64_aix5) \ -- || defined(VGO_darwin) -+ || defined(VGO_darwin) || defined(VGP_s390x_linux) - SysRes sres; - sres = VG_(do_syscall2)(__NR_getgroups, size, (Addr)list); - if (sr_isError(sres)) ---- coregrind/m_machine.c -+++ coregrind/m_machine.c -@@ -94,6 +94,13 @@ - = VG_(threads)[tid].arch.vex.guest_R11; - regs->misc.ARM.r7 - = VG_(threads)[tid].arch.vex.guest_R7; -+# elif defined(VGA_s390x) -+ regs->r_pc = (ULong)VG_(threads)[tid].arch.vex.guest_IA; -+ regs->r_sp = (ULong)VG_(threads)[tid].arch.vex.guest_SP; -+ regs->misc.S390X.r_fp -+ = VG_(threads)[tid].arch.vex.guest_r11; -+ regs->misc.S390X.r_lr -+ = VG_(threads)[tid].arch.vex.guest_r14; - # else - # error "Unknown arch" - # endif -@@ -125,6 +132,9 @@ - VG_(threads)[tid].arch.vex_shadow2.guest_GPR4 = s2err; - # elif defined(VGO_darwin) - // GrP fixme darwin syscalls may return more values (2 registers plus error) -+# elif defined(VGP_s390x_linux) -+ VG_(threads)[tid].arch.vex_shadow1.guest_r2 = s1res; -+ VG_(threads)[tid].arch.vex_shadow2.guest_r2 = s2res; - # else - # error "Unknown plat" - # endif -@@ -257,6 +267,23 @@ - (*f)(vex->guest_R12); - (*f)(vex->guest_R13); - (*f)(vex->guest_R14); -+#elif defined(VGA_s390x) -+ (*f)(vex->guest_r0); -+ (*f)(vex->guest_r1); -+ (*f)(vex->guest_r2); -+ (*f)(vex->guest_r3); -+ (*f)(vex->guest_r4); -+ (*f)(vex->guest_r5); -+ (*f)(vex->guest_r6); -+ (*f)(vex->guest_r7); -+ (*f)(vex->guest_r8); -+ (*f)(vex->guest_r9); -+ (*f)(vex->guest_r10); -+ (*f)(vex->guest_r11); -+ (*f)(vex->guest_r12); -+ (*f)(vex->guest_r13); -+ (*f)(vex->guest_r14); -+ (*f)(vex->guest_r15); - #else - # error Unknown arch - #endif -@@ -357,6 +384,11 @@ - then safe to use VG_(machine_get_VexArchInfo) - and VG_(machine_ppc64_has_VMX) - -+ ------------- -+ s390x: initially: call VG_(machine_get_hwcaps) -+ -+ then safe to use VG_(machine_get_VexArchInfo) -+ - VG_(machine_get_hwcaps) may use signals (although it attempts to - leave signal state unchanged) and therefore should only be - called before m_main sets up the client's signal state. -@@ -383,10 +415,11 @@ - Int VG_(machine_arm_archlevel) = 4; - #endif - -+/* fixs390: anything for s390x here ? */ - - /* For hwcaps detection on ppc32/64 and arm we'll need to do SIGILL - testing, so we need a jmp_buf. */ --#if defined(VGA_ppc32) || defined(VGA_ppc64) || defined(VGA_arm) -+#if defined(VGA_ppc32) || defined(VGA_ppc64) || defined(VGA_arm) || defined(VGA_s390x) - #include // For jmp_buf - static jmp_buf env_unsup_insn; - static void handler_unsup_insn ( Int x ) { __builtin_longjmp(env_unsup_insn,1); } -@@ -835,6 +868,96 @@ - return True; - } - -+#elif defined(VGA_s390x) -+ { -+ /* Instruction set detection code borrowed from ppc above. */ -+ vki_sigset_t saved_set, tmp_set; -+ vki_sigaction_fromK_t saved_sigill_act; -+ vki_sigaction_toK_t tmp_sigill_act; -+ -+ volatile Bool have_LDISP, have_EIMM, have_GIE, have_DFP; -+ Int r; -+ -+ /* Unblock SIGILL and stash away the old action for that signal */ -+ VG_(sigemptyset)(&tmp_set); -+ VG_(sigaddset)(&tmp_set, VKI_SIGILL); -+ -+ r = VG_(sigprocmask)(VKI_SIG_UNBLOCK, &tmp_set, &saved_set); -+ vg_assert(r == 0); -+ -+ r = VG_(sigaction)(VKI_SIGILL, NULL, &saved_sigill_act); -+ vg_assert(r == 0); -+ tmp_sigill_act = saved_sigill_act; -+ -+ /* NODEFER: signal handler does not return (from the kernel's point of -+ view), hence if it is to successfully catch a signal more than once, -+ we need the NODEFER flag. */ -+ tmp_sigill_act.sa_flags &= ~VKI_SA_RESETHAND; -+ tmp_sigill_act.sa_flags &= ~VKI_SA_SIGINFO; -+ tmp_sigill_act.sa_flags |= VKI_SA_NODEFER; -+ tmp_sigill_act.ksa_handler = handler_unsup_insn; -+ VG_(sigaction)(VKI_SIGILL, &tmp_sigill_act, NULL); -+ -+ /* Determine hwcaps. Note, we cannot use the stfle insn because it -+ is not supported on z900. */ -+ -+ have_LDISP = True; -+ if (__builtin_setjmp(env_unsup_insn)) { -+ have_LDISP = False; -+ } else { -+ /* BASR loads the address of the next insn into r1. Needed to avoid -+ a segfault in XY. */ -+ __asm__ __volatile__("basr %%r1,%%r0\n\t" -+ ".long 0xe3001000\n\t" /* XY 0,0(%r1) */ -+ ".short 0x0057" : : : "r0", "r1", "cc", "memory"); -+ } -+ -+ have_EIMM = True; -+ if (__builtin_setjmp(env_unsup_insn)) { -+ have_EIMM = False; -+ } else { -+ __asm__ __volatile__(".long 0xc0090000\n\t" /* iilf r0,0 */ -+ ".short 0x0000" : : : "r0", "memory"); -+ } -+ -+ have_GIE = True; -+ if (__builtin_setjmp(env_unsup_insn)) { -+ have_GIE = False; -+ } else { -+ __asm__ __volatile__(".long 0xc2010000\n\t" /* msfi r0,0 */ -+ ".short 0x0000" : : : "r0", "memory"); -+ } -+ -+ have_DFP = True; -+ if (__builtin_setjmp(env_unsup_insn)) { -+ have_DFP = False; -+ } else { -+ __asm__ __volatile__(".long 0xb3d20000" -+ : : : "r0", "cc", "memory"); /* adtr r0,r0,r0 */ -+ } -+ -+ /* Restore signals */ -+ r = VG_(sigaction)(VKI_SIGILL, &saved_sigill_act, NULL); -+ vg_assert(r == 0); -+ r = VG_(sigprocmask)(VKI_SIG_SETMASK, &saved_set, NULL); -+ vg_assert(r == 0); -+ VG_(debugLog)(1, "machine", "LDISP %d EIMM %d GIE %d DFP %d\n", -+ have_LDISP, have_EIMM, have_GIE, have_DFP); -+ -+ /* Check for long displacement facility which is required */ -+ if (! have_LDISP) return False; -+ -+ va = VexArchS390X; -+ -+ vai.hwcaps = 0; -+ if (have_LDISP) vai.hwcaps |= VEX_HWCAPS_S390X_LDISP; -+ if (have_EIMM) vai.hwcaps |= VEX_HWCAPS_S390X_EIMM; -+ if (have_GIE) vai.hwcaps |= VEX_HWCAPS_S390X_GIE; -+ if (have_DFP) vai.hwcaps |= VEX_HWCAPS_S390X_DFP; -+ -+ return True; -+ } -+ - #elif defined(VGA_arm) - { - /* Same instruction set detection algorithm as for ppc32. */ -@@ -1017,7 +1140,8 @@ - { - #if defined(VGP_x86_linux) || defined(VGP_amd64_linux) \ - || defined(VGP_arm_linux) \ -- || defined(VGP_ppc32_linux) || defined(VGO_darwin) -+ || defined(VGP_ppc32_linux) || defined(VGO_darwin) \ -+ || defined(VGP_s390x_linux) - return f; - #elif defined(VGP_ppc64_linux) || defined(VGP_ppc32_aix5) \ - || defined(VGP_ppc64_aix5) ---- coregrind/m_main.c -+++ coregrind/m_main.c -@@ -1620,6 +1620,7 @@ - "AMD Athlon or above)\n"); - VG_(printf)(" * AMD Athlon64/Opteron\n"); - VG_(printf)(" * PowerPC (most; ppc405 and above)\n"); -+ VG_(printf)(" * System z (64bit only - s390x; z900 and above)\n"); - VG_(printf)("\n"); - VG_(exit)(1); - } -@@ -1931,6 +1932,8 @@ - iters = 5; - # elif defined(VGP_arm_linux) - iters = 1; -+# elif defined(VGP_s390x_linux) -+ iters = 10; - # elif defined(VGP_ppc32_aix5) || defined(VGP_ppc64_aix5) - iters = 4; - # elif defined(VGO_darwin) -@@ -2771,6 +2774,47 @@ - "\tnop\n" - "\ttrap\n" - ); -+#elif defined(VGP_s390x_linux) -+/* -+ This is the canonical entry point, usually the first thing in the text -+ segment. Most registers' values are unspecified, except for: -+ -+ %r14 Contains a function pointer to be registered with `atexit'. -+ This is how the dynamic linker arranges to have DT_FINI -+ functions called for shared libraries that have been loaded -+ before this code runs. -+ -+ %r15 The stack contains the arguments and environment: -+ 0(%r15) argc -+ 8(%r15) argv[0] -+ ... -+ (8*argc)(%r15) NULL -+ (8*(argc+1))(%r15) envp[0] -+ ... -+ NULL -+*/ -+asm("\n\t" -+ ".text\n\t" -+ ".globl _start\n\t" -+ ".type _start,@function\n\t" -+ "_start:\n\t" -+ /* set up the new stack in %r1 */ -+ "larl %r1, vgPlain_interim_stack\n\t" -+ "larl %r5, 1f\n\t" -+ "ag %r1, 0(%r5)\n\t" -+ "ag %r1, 2f-1f(%r5)\n\t" -+ "nill %r1, 0xFFF0\n\t" -+ /* install it, and collect the original one */ -+ "lgr %r2, %r15\n\t" -+ "lgr %r15, %r1\n\t" -+ /* call _start_in_C_linux, passing it the startup %r15 */ -+ "brasl %r14, _start_in_C_linux\n\t" -+ /* trigger execution of an invalid opcode -> halt machine */ -+ "j .+2\n\t" -+ "1: .quad "VG_STRINGIFY(VG_STACK_GUARD_SZB)"\n\t" -+ "2: .quad "VG_STRINGIFY(VG_STACK_ACTIVE_SZB)"\n\t" -+ ".previous\n" -+); - #elif defined(VGP_arm_linux) - asm("\n" - "\t.align 2\n" ---- coregrind/m_main.c.orig -+++ coregrind/m_main.c.orig -@@ -0,0 +1,3405 @@ -+ -+/*--------------------------------------------------------------------*/ -+/*--- Startup: the real stuff m_main.c ---*/ -+/*--------------------------------------------------------------------*/ -+ -+/* -+ This file is part of Valgrind, a dynamic binary instrumentation -+ framework. -+ -+ Copyright (C) 2000-2010 Julian Seward -+ jseward@acm.org -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA -+ 02111-1307, USA. -+ -+ The GNU General Public License is contained in the file COPYING. -+*/ -+ -+#include "pub_core_basics.h" -+#include "pub_core_vki.h" -+#include "pub_core_vkiscnums.h" -+#include "pub_core_threadstate.h" -+#include "pub_core_xarray.h" -+#include "pub_core_clientstate.h" -+#include "pub_core_aspacemgr.h" -+#include "pub_core_aspacehl.h" -+#include "pub_core_commandline.h" -+#include "pub_core_debuglog.h" -+#include "pub_core_errormgr.h" -+#include "pub_core_execontext.h" -+#include "pub_core_initimg.h" -+#include "pub_core_libcbase.h" -+#include "pub_core_libcassert.h" -+#include "pub_core_libcfile.h" -+#include "pub_core_libcprint.h" -+#include "pub_core_libcproc.h" -+#include "pub_core_libcsignal.h" -+#include "pub_core_syscall.h" // VG_(strerror) -+#include "pub_core_mach.h" -+#include "pub_core_machine.h" -+#include "pub_core_mallocfree.h" -+#include "pub_core_options.h" -+#include "pub_core_debuginfo.h" -+#include "pub_core_redir.h" -+#include "pub_core_scheduler.h" -+#include "pub_core_seqmatch.h" // For VG_(string_match) -+#include "pub_core_signals.h" -+#include "pub_core_stacks.h" // For VG_(register_stack) -+#include "pub_core_syswrap.h" -+#include "pub_core_tooliface.h" -+#include "pub_core_translate.h" // For VG_(translate) -+#include "pub_core_trampoline.h" -+#include "pub_core_transtab.h" -+ -+/* Stuff for reading AIX5 /proc//sysent files */ -+#if defined(VGO_aix5) -+ /* --- !!! --- EXTERNAL HEADERS start --- !!! --- */ -+# include /* prsysent_t */ -+ /* --- !!! --- EXTERNAL HEADERS end --- !!! --- */ -+# define VG_AIX5_SYSENT_SIZE 100000 -+ static UChar aix5_sysent_buf[VG_AIX5_SYSENT_SIZE]; -+#endif -+ -+ -+/*====================================================================*/ -+/*=== Counters, for profiling purposes only ===*/ -+/*====================================================================*/ -+ -+static void print_all_stats ( void ) -+{ -+ VG_(print_translation_stats)(); -+ VG_(print_tt_tc_stats)(); -+ VG_(print_scheduler_stats)(); -+ VG_(print_ExeContext_stats)(); -+ VG_(print_errormgr_stats)(); -+ -+ // Memory stats -+ if (VG_(clo_verbosity) > 2) { -+ VG_(message)(Vg_DebugMsg, "\n"); -+ VG_(message)(Vg_DebugMsg, -+ "------ Valgrind's internal memory use stats follow ------\n" ); -+ VG_(sanity_check_malloc_all)(); -+ VG_(message)(Vg_DebugMsg, "------\n" ); -+ VG_(print_all_arena_stats)(); -+ VG_(message)(Vg_DebugMsg, "\n"); -+ } -+} -+ -+ -+/*====================================================================*/ -+/*=== Command-line: variables, processing, etc ===*/ -+/*====================================================================*/ -+ -+// See pub_{core,tool}_options.h for explanations of all these. -+ -+static void usage_NORETURN ( Bool debug_help ) -+{ -+ /* 'usage1' contains a %s for the name of the GDB executable, which -+ must be supplied when it is VG_(printf)'d. */ -+ Char* usage1 = -+"usage: valgrind [options] prog-and-args\n" -+"\n" -+" tool-selection option, with default in [ ]:\n" -+" --tool= use the Valgrind tool named [memcheck]\n" -+"\n" -+" basic user options for all Valgrind tools, with defaults in [ ]:\n" -+" -h --help show this message\n" -+" --help-debug show this message, plus debugging options\n" -+" --version show version\n" -+" -q --quiet run silently; only print error msgs\n" -+" -v --verbose be more verbose -- show misc extra info\n" -+" --trace-children=no|yes Valgrind-ise child processes (follow execve)? [no]\n" -+" --trace-children-skip=patt1,patt2,... specifies a list of executables\n" -+" that --trace-children=yes should not trace into\n" -+" --child-silent-after-fork=no|yes omit child output between fork & exec? [no]\n" -+" --track-fds=no|yes track open file descriptors? [no]\n" -+" --time-stamp=no|yes add timestamps to log messages? [no]\n" -+" --log-fd= log messages to file descriptor [2=stderr]\n" -+" --log-file= log messages to \n" -+" --log-socket=ipaddr:port log messages to socket ipaddr:port\n" -+"\n" -+" user options for Valgrind tools that report errors:\n" -+" --xml=yes emit error output in XML (some tools only)\n" -+" --xml-fd= XML output to file descriptor\n" -+" --xml-file= XML output to \n" -+" --xml-socket=ipaddr:port XML output to socket ipaddr:port\n" -+" --xml-user-comment=STR copy STR verbatim into XML output\n" -+" --demangle=no|yes automatically demangle C++ names? [yes]\n" -+" --num-callers= show callers in stack traces [12]\n" -+" --error-limit=no|yes stop showing new errors if too many? [yes]\n" -+" --error-exitcode= exit code to return if errors found [0=disable]\n" -+" --show-below-main=no|yes continue stack traces below main() [no]\n" -+" --suppressions= suppress errors described in \n" -+" --gen-suppressions=no|yes|all print suppressions for errors? [no]\n" -+" --db-attach=no|yes start debugger when errors detected? [no]\n" -+" --db-command= command to start debugger [%s -nw %%f %%p]\n" -+" --input-fd= file descriptor for input [0=stdin]\n" -+" --dsymutil=no|yes run dsymutil on Mac OS X when helpful? [no]\n" -+" --max-stackframe= assume stack switch for SP changes larger\n" -+" than bytes [2000000]\n" -+" --main-stacksize= set size of main thread's stack (in bytes)\n" -+" [use current 'ulimit' value]\n" -+"\n" -+" user options for Valgrind tools that replace malloc:\n" -+" --alignment= set minimum alignment of heap allocations [%ld]\n" -+"\n" -+" uncommon user options for all Valgrind tools:\n" -+" --fullpath-after= (with nothing after the '=')\n" -+" show full source paths in call stacks\n" -+" --fullpath-after=string like --fullpath-after=, but only show the\n" -+" part of the path after 'string'. Allows removal\n" -+" of path prefixes. Use this flag multiple times\n" -+" to specify a set of prefixes to remove.\n" -+" --smc-check=none|stack|all checks for self-modifying code: none,\n" -+" only for code found in stacks, or all [stack]\n" -+" --read-var-info=yes|no read debug info on stack and global variables\n" -+" and use it to print better error messages in\n" -+" tools that make use of it (Memcheck, Helgrind,\n" -+" DRD) [no]\n" -+" --run-libc-freeres=no|yes free up glibc memory at exit on Linux? [yes]\n" -+" --sim-hints=hint1,hint2,... known hints:\n" -+" lax-ioctls, enable-outer [none]\n" -+" --kernel-variant=variant1,variant2,... known variants: bproc [none]\n" -+" handle non-standard kernel variants\n" -+" --show-emwarns=no|yes show warnings about emulation limits? [no]\n" -+" --require-text-symbol=:sonamepattern:symbolpattern abort run if the\n" -+" stated shared object doesn't have the stated\n" -+" text symbol. Patterns can contain ? and *.\n" -+"\n"; -+ -+ Char* usage2 = -+"\n" -+" debugging options for all Valgrind tools:\n" -+" -d show verbose debugging output\n" -+" --stats=no|yes show tool and core statistics [no]\n" -+" --sanity-level= level of sanity checking to do [1]\n" -+" --trace-flags= show generated code? (X = 0|1) [00000000]\n" -+" --profile-flags= ditto, but for profiling (X = 0|1) [00000000]\n" -+" --trace-notbelow= only show BBs above [999999999]\n" -+" --trace-syscalls=no|yes show all system calls? [no]\n" -+" --trace-signals=no|yes show signal handling details? [no]\n" -+" --trace-symtab=no|yes show symbol table details? [no]\n" -+" --trace-symtab-patt= limit debuginfo tracing to obj name \n" -+" --trace-cfi=no|yes show call-frame-info details? [no]\n" -+" --debug-dump=syms mimic /usr/bin/readelf --syms\n" -+" --debug-dump=line mimic /usr/bin/readelf --debug-dump=line\n" -+" --debug-dump=frames mimic /usr/bin/readelf --debug-dump=frames\n" -+" --trace-redir=no|yes show redirection details? [no]\n" -+" --trace-sched=no|yes show thread scheduler details? [no]\n" -+" --profile-heap=no|yes profile Valgrind's own space use\n" -+" --wait-for-gdb=yes|no pause on startup to wait for gdb attach\n" -+" --sym-offsets=yes|no show syms in form 'name+offset' ? [no]\n" -+" --command-line-only=no|yes only use command line options [no]\n" -+"\n" -+" Vex options for all Valgrind tools:\n" -+" --vex-iropt-verbosity=<0..9> [0]\n" -+" --vex-iropt-level=<0..2> [2]\n" -+" --vex-iropt-precise-memory-exns=no|yes [no]\n" -+" --vex-iropt-unroll-thresh=<0..400> [120]\n" -+" --vex-guest-max-insns=<1..100> [50]\n" -+" --vex-guest-chase-thresh=<0..99> [10]\n" -+" --vex-guest-chase-cond=no|yes [no]\n" -+" --trace-flags and --profile-flags values (omit the middle space):\n" -+" 1000 0000 show conversion into IR\n" -+" 0100 0000 show after initial opt\n" -+" 0010 0000 show after instrumentation\n" -+" 0001 0000 show after second opt\n" -+" 0000 1000 show after tree building\n" -+" 0000 0100 show selecting insns\n" -+" 0000 0010 show after reg-alloc\n" -+" 0000 0001 show final assembly\n" -+" (Nb: you need --trace-notbelow with --trace-flags for full details)\n" -+"\n" -+" debugging options for Valgrind tools that report errors\n" -+" --dump-error= show translation for basic block associated\n" -+" with 'th error context [0=show none]\n" -+"\n" -+" debugging options for Valgrind tools that replace malloc:\n" -+" --trace-malloc=no|yes show client malloc details? [no]\n" -+"\n"; -+ -+ Char* usage3 = -+"\n" -+" Extra options read from ~/.valgrindrc, $VALGRIND_OPTS, ./.valgrindrc\n" -+"\n" -+" %s is %s\n" -+" Valgrind is Copyright (C) 2000-2010, and GNU GPL'd, by Julian Seward et al.\n" -+" LibVEX is Copyright (C) 2004-2010, and GNU GPL'd, by OpenWorks LLP et al.\n" -+"\n" -+" Bug reports, feedback, admiration, abuse, etc, to: %s.\n" -+"\n"; -+ -+ Char* gdb_path = GDB_PATH; -+ -+ // Ensure the message goes to stdout -+ VG_(log_output_sink).fd = 1; -+ VG_(log_output_sink).is_socket = False; -+ -+ /* 'usage1' expects one char* argument and one SizeT argument. */ -+ VG_(printf)(usage1, gdb_path, VG_MIN_MALLOC_SZB); -+ if (VG_(details).name) { -+ VG_(printf)(" user options for %s:\n", VG_(details).name); -+ if (VG_(needs).command_line_options) -+ VG_TDICT_CALL(tool_print_usage); -+ else -+ VG_(printf)(" (none)\n"); -+ } -+ if (debug_help) { -+ VG_(printf)("%s", usage2); -+ -+ if (VG_(details).name) { -+ VG_(printf)(" debugging options for %s:\n", VG_(details).name); -+ -+ if (VG_(needs).command_line_options) -+ VG_TDICT_CALL(tool_print_debug_usage); -+ else -+ VG_(printf)(" (none)\n"); -+ } -+ } -+ VG_(printf)(usage3, VG_(details).name, VG_(details).copyright_author, -+ VG_BUGS_TO); -+ VG_(exit)(0); -+} -+ -+ -+/* Peer at previously set up VG_(args_for_valgrind) and do some -+ minimal command line processing that must happen early on: -+ -+ - show the version string, if requested (-v) -+ - extract any request for help (--help, -h, --help-debug) -+ - get the toolname (--tool=) -+ - set VG_(clo_max_stackframe) (--max-stackframe=) -+ - set VG_(clo_main_stacksize) (--main-stacksize=) -+ -+ That's all it does. The main command line processing is done below -+ by main_process_cmd_line_options. Note that -+ main_process_cmd_line_options has to handle but ignore the ones we -+ have handled here. -+*/ -+static void early_process_cmd_line_options ( /*OUT*/Int* need_help, -+ /*OUT*/HChar** tool ) -+{ -+ UInt i; -+ HChar* str; -+ -+ vg_assert( VG_(args_for_valgrind) ); -+ -+ /* parse the options we have (only the options we care about now) */ -+ for (i = 0; i < VG_(sizeXA)( VG_(args_for_valgrind) ); i++) { -+ -+ str = * (HChar**) VG_(indexXA)( VG_(args_for_valgrind), i ); -+ vg_assert(str); -+ -+ // Nb: the version string goes to stdout. -+ if VG_XACT_CLO(str, "--version", VG_(log_output_sink).fd, 1) { -+ VG_(log_output_sink).is_socket = False; -+ VG_(printf)("valgrind-" VERSION "\n"); -+ VG_(exit)(0); -+ } -+ else if VG_XACT_CLO(str, "--help", *need_help, *need_help+1) {} -+ else if VG_XACT_CLO(str, "-h", *need_help, *need_help+1) {} -+ -+ else if VG_XACT_CLO(str, "--help-debug", *need_help, *need_help+2) {} -+ -+ // The tool has already been determined, but we need to know the name -+ // here. -+ else if VG_STR_CLO(str, "--tool", *tool) {} -+ -+ // Set up VG_(clo_max_stackframe) and VG_(clo_main_stacksize). -+ // These are needed by VG_(ii_create_image), which happens -+ // before main_process_cmd_line_options(). -+ else if VG_INT_CLO(str, "--max-stackframe", VG_(clo_max_stackframe)) {} -+ else if VG_INT_CLO(str, "--main-stacksize", VG_(clo_main_stacksize)) {} -+ } -+} -+ -+/* The main processing for command line options. See comments above -+ on early_process_cmd_line_options. -+ -+ Comments on how the logging options are handled: -+ -+ User can specify: -+ --log-fd= for a fd to write to (default setting, fd = 2) -+ --log-file= for a file name to write to -+ --log-socket= for a socket to write to -+ -+ As a result of examining these and doing relevant socket/file -+ opening, a final fd is established. This is stored in -+ VG_(log_output_sink) in m_libcprint. Also, if --log-file=STR was -+ specified, then STR, after expansion of %p and %q templates within -+ it, is stored in VG_(clo_log_fname_expanded), in m_options, just in -+ case anybody wants to know what it is. -+ -+ When printing, VG_(log_output_sink) is consulted to find the -+ fd to send output to. -+ -+ Exactly analogous actions are undertaken for the XML output -+ channel, with the one difference that the default fd is -1, meaning -+ the channel is disabled by default. -+*/ -+static -+void main_process_cmd_line_options ( /*OUT*/Bool* logging_to_fd, -+ /*OUT*/Char** xml_fname_unexpanded, -+ const HChar* toolname ) -+{ -+ // VG_(clo_log_fd) is used by all the messaging. It starts as 2 (stderr) -+ // and we cannot change it until we know what we are changing it to is -+ // ok. So we have tmp_log_fd to hold the tmp fd prior to that point. -+ SysRes sres; -+ Int i, tmp_log_fd, tmp_xml_fd; -+ Int toolname_len = VG_(strlen)(toolname); -+ Char* tmp_str; // Used in a couple of places. -+ enum { -+ VgLogTo_Fd, -+ VgLogTo_File, -+ VgLogTo_Socket -+ } log_to = VgLogTo_Fd, // Where is logging output to be sent? -+ xml_to = VgLogTo_Fd; // Where is XML output to be sent? -+ -+ /* Temporarily holds the string STR specified with -+ --{log,xml}-{name,socket}=STR. 'fs' stands for -+ file-or-socket. */ -+ Char* log_fsname_unexpanded = NULL; -+ Char* xml_fsname_unexpanded = NULL; -+ -+ /* Log to stderr by default, but usage message goes to stdout. XML -+ output is initially disabled. */ -+ tmp_log_fd = 2; -+ tmp_xml_fd = -1; -+ -+ /* Check for sane path in ./configure --prefix=... */ -+ if (VG_LIBDIR[0] != '/') -+ VG_(err_config_error)("Please use absolute paths in " -+ "./configure --prefix=... or --libdir=..."); -+ -+ vg_assert( VG_(args_for_valgrind) ); -+ -+ /* BEGIN command-line processing loop */ -+ -+ for (i = 0; i < VG_(sizeXA)( VG_(args_for_valgrind) ); i++) { -+ -+ HChar* arg = * (HChar**) VG_(indexXA)( VG_(args_for_valgrind), i ); -+ HChar* colon = arg; -+ -+ // Look for a colon in the option name. -+ while (*colon && *colon != ':' && *colon != '=') -+ colon++; -+ -+ // Does it have the form "--toolname:foo"? We have to do it at the start -+ // in case someone has combined a prefix with a core-specific option, -+ // eg. "--memcheck:verbose". -+ if (*colon == ':') { -+ if (VG_STREQN(2, arg, "--") && -+ VG_STREQN(toolname_len, arg+2, toolname) && -+ VG_STREQN(1, arg+2+toolname_len, ":")) -+ { -+ // Prefix matches, convert "--toolname:foo" to "--foo". -+ // Two things to note: -+ // - We cannot modify the option in-place. If we did, and then -+ // a child was spawned with --trace-children=yes, the -+ // now-non-prefixed option would be passed and could screw up -+ // the child. -+ // - We create copies, and never free them. Why? Non-prefixed -+ // options hang around forever, so tools need not make copies -+ // of strings within them. We need to have the same behaviour -+ // for prefixed options. The pointer to the copy will be lost -+ // once we leave this function (although a tool may keep a -+ // pointer into it), but the space wasted is insignificant. -+ // (In bug #142197, the copies were being freed, which caused -+ // problems for tools that reasonably assumed that arguments -+ // wouldn't disappear on them.) -+ if (0) -+ VG_(printf)("tool-specific arg: %s\n", arg); -+ arg = VG_(strdup)("main.mpclo.1", arg + toolname_len + 1); -+ arg[0] = '-'; -+ arg[1] = '-'; -+ -+ } else { -+ // prefix doesn't match, skip to next arg -+ continue; -+ } -+ } -+ -+ /* Ignore these options - they've already been handled */ -+ if VG_STREQN( 7, arg, "--tool=") {} -+ else if VG_STREQN(20, arg, "--command-line-only=") {} -+ else if VG_STREQ( arg, "--") {} -+ else if VG_STREQ( arg, "-d") {} -+ else if VG_STREQN(16, arg, "--max-stackframe") {} -+ else if VG_STREQN(16, arg, "--main-stacksize") {} -+ else if VG_STREQN(14, arg, "--profile-heap") {} -+ -+ // These options are new. -+ else if (VG_STREQ(arg, "-v") || -+ VG_STREQ(arg, "--verbose")) -+ VG_(clo_verbosity)++; -+ -+ else if (VG_STREQ(arg, "-q") || -+ VG_STREQ(arg, "--quiet")) -+ VG_(clo_verbosity)--; -+ -+ else if VG_BOOL_CLO(arg, "--stats", VG_(clo_stats)) {} -+ else if VG_BOOL_CLO(arg, "--xml", VG_(clo_xml)) {} -+ else if VG_BOOL_CLO(arg, "--db-attach", VG_(clo_db_attach)) {} -+ else if VG_BOOL_CLO(arg, "--demangle", VG_(clo_demangle)) {} -+ else if VG_BOOL_CLO(arg, "--error-limit", VG_(clo_error_limit)) {} -+ else if VG_INT_CLO (arg, "--error-exitcode", VG_(clo_error_exitcode)) {} -+ else if VG_BOOL_CLO(arg, "--show-emwarns", VG_(clo_show_emwarns)) {} -+ -+ else if VG_BOOL_CLO(arg, "--run-libc-freeres", VG_(clo_run_libc_freeres)) {} -+ else if VG_BOOL_CLO(arg, "--show-below-main", VG_(clo_show_below_main)) {} -+ else if VG_BOOL_CLO(arg, "--time-stamp", VG_(clo_time_stamp)) {} -+ else if VG_BOOL_CLO(arg, "--track-fds", VG_(clo_track_fds)) {} -+ else if VG_BOOL_CLO(arg, "--trace-children", VG_(clo_trace_children)) {} -+ else if VG_BOOL_CLO(arg, "--child-silent-after-fork", -+ VG_(clo_child_silent_after_fork)) {} -+ else if VG_BOOL_CLO(arg, "--trace-sched", VG_(clo_trace_sched)) {} -+ else if VG_BOOL_CLO(arg, "--trace-signals", VG_(clo_trace_signals)) {} -+ else if VG_BOOL_CLO(arg, "--trace-symtab", VG_(clo_trace_symtab)) {} -+ else if VG_STR_CLO (arg, "--trace-symtab-patt", VG_(clo_trace_symtab_patt)) {} -+ else if VG_BOOL_CLO(arg, "--trace-cfi", VG_(clo_trace_cfi)) {} -+ else if VG_XACT_CLO(arg, "--debug-dump=syms", VG_(clo_debug_dump_syms), -+ True) {} -+ else if VG_XACT_CLO(arg, "--debug-dump=line", VG_(clo_debug_dump_line), -+ True) {} -+ else if VG_XACT_CLO(arg, "--debug-dump=frames", -+ VG_(clo_debug_dump_frames), True) {} -+ else if VG_BOOL_CLO(arg, "--trace-redir", VG_(clo_trace_redir)) {} -+ -+ else if VG_BOOL_CLO(arg, "--trace-syscalls", VG_(clo_trace_syscalls)) {} -+ else if VG_BOOL_CLO(arg, "--wait-for-gdb", VG_(clo_wait_for_gdb)) {} -+ else if VG_STR_CLO (arg, "--db-command", VG_(clo_db_command)) {} -+ else if VG_STR_CLO (arg, "--sim-hints", VG_(clo_sim_hints)) {} -+ else if VG_BOOL_CLO(arg, "--sym-offsets", VG_(clo_sym_offsets)) {} -+ else if VG_BOOL_CLO(arg, "--read-var-info", VG_(clo_read_var_info)) {} -+ -+ else if VG_INT_CLO (arg, "--dump-error", VG_(clo_dump_error)) {} -+ else if VG_INT_CLO (arg, "--input-fd", VG_(clo_input_fd)) {} -+ else if VG_INT_CLO (arg, "--sanity-level", VG_(clo_sanity_level)) {} -+ else if VG_BINT_CLO(arg, "--num-callers", VG_(clo_backtrace_size), 1, -+ VG_DEEPEST_BACKTRACE) {} -+ -+ else if VG_XACT_CLO(arg, "--smc-check=none", VG_(clo_smc_check), -+ Vg_SmcNone); -+ else if VG_XACT_CLO(arg, "--smc-check=stack", VG_(clo_smc_check), -+ Vg_SmcStack); -+ else if VG_XACT_CLO(arg, "--smc-check=all", VG_(clo_smc_check), -+ Vg_SmcAll); -+ -+ else if VG_STR_CLO (arg, "--kernel-variant", VG_(clo_kernel_variant)) {} -+ -+ else if VG_BOOL_CLO(arg, "--dsymutil", VG_(clo_dsymutil)) {} -+ -+ else if VG_STR_CLO (arg, "--trace-children-skip", VG_(clo_trace_children_skip)) {} -+ -+ else if VG_BINT_CLO(arg, "--vex-iropt-verbosity", -+ VG_(clo_vex_control).iropt_verbosity, 0, 10) {} -+ else if VG_BINT_CLO(arg, "--vex-iropt-level", -+ VG_(clo_vex_control).iropt_level, 0, 2) {} -+ else if VG_BOOL_CLO(arg, "--vex-iropt-precise-memory-exns", -+ VG_(clo_vex_control).iropt_precise_memory_exns) {} -+ else if VG_BINT_CLO(arg, "--vex-iropt-unroll-thresh", -+ VG_(clo_vex_control).iropt_unroll_thresh, 0, 400) {} -+ else if VG_BINT_CLO(arg, "--vex-guest-max-insns", -+ VG_(clo_vex_control).guest_max_insns, 1, 100) {} -+ else if VG_BINT_CLO(arg, "--vex-guest-chase-thresh", -+ VG_(clo_vex_control).guest_chase_thresh, 0, 99) {} -+ else if VG_BOOL_CLO(arg, "--vex-guest-chase-cond", -+ VG_(clo_vex_control).guest_chase_cond) {} -+ -+ else if VG_INT_CLO(arg, "--log-fd", tmp_log_fd) { -+ log_to = VgLogTo_Fd; -+ log_fsname_unexpanded = NULL; -+ } -+ else if VG_INT_CLO(arg, "--xml-fd", tmp_xml_fd) { -+ xml_to = VgLogTo_Fd; -+ xml_fsname_unexpanded = NULL; -+ } -+ -+ else if VG_STR_CLO(arg, "--log-file", log_fsname_unexpanded) { -+ log_to = VgLogTo_File; -+ } -+ else if VG_STR_CLO(arg, "--xml-file", xml_fsname_unexpanded) { -+ xml_to = VgLogTo_File; -+ } -+ -+ else if VG_STR_CLO(arg, "--log-socket", log_fsname_unexpanded) { -+ log_to = VgLogTo_Socket; -+ } -+ else if VG_STR_CLO(arg, "--xml-socket", xml_fsname_unexpanded) { -+ xml_to = VgLogTo_Socket; -+ } -+ -+ else if VG_STR_CLO(arg, "--xml-user-comment", -+ VG_(clo_xml_user_comment)) {} -+ -+ else if VG_STR_CLO(arg, "--suppressions", tmp_str) { -+ if (VG_(clo_n_suppressions) >= VG_CLO_MAX_SFILES) { -+ VG_(fmsg_bad_option)(arg, -+ "Too many suppression files specified.\n" -+ "Increase VG_CLO_MAX_SFILES and recompile.\n"); -+ } -+ VG_(clo_suppressions)[VG_(clo_n_suppressions)] = tmp_str; -+ VG_(clo_n_suppressions)++; -+ } -+ -+ else if VG_STR_CLO (arg, "--fullpath-after", tmp_str) { -+ if (VG_(clo_n_fullpath_after) >= VG_CLO_MAX_FULLPATH_AFTER) { -+ VG_(fmsg_bad_option)(arg, -+ "Too many --fullpath-after= specifications.\n" -+ "Increase VG_CLO_MAX_FULLPATH_AFTER and recompile.\n"); -+ } -+ VG_(clo_fullpath_after)[VG_(clo_n_fullpath_after)] = tmp_str; -+ VG_(clo_n_fullpath_after)++; -+ } -+ -+ else if VG_STR_CLO(arg, "--require-text-symbol", tmp_str) { -+ if (VG_(clo_n_req_tsyms) >= VG_CLO_MAX_REQ_TSYMS) { -+ VG_(fmsg_bad_option)(arg, -+ "Too many --require-text-symbol= specifications.\n" -+ "Increase VG_CLO_MAX_REQ_TSYMS and recompile.\n"); -+ } -+ /* String needs to be of the form C?*C?*, where C is any -+ character, but is the same both times. Having it in this -+ form facilitates finding the boundary between the sopatt -+ and the fnpatt just by looking for the second occurrence -+ of C, without hardwiring any assumption about what C -+ is. */ -+ Char patt[7]; -+ Bool ok = True; -+ ok = tmp_str && VG_(strlen)(tmp_str) > 0; -+ if (ok) { -+ patt[0] = patt[3] = tmp_str[0]; -+ patt[1] = patt[4] = '?'; -+ patt[2] = patt[5] = '*'; -+ patt[6] = 0; -+ ok = VG_(string_match)(patt, tmp_str); -+ } -+ if (!ok) { -+ VG_(fmsg_bad_option)(arg, -+ "Invalid --require-text-symbol= specification.\n"); -+ } -+ VG_(clo_req_tsyms)[VG_(clo_n_req_tsyms)] = tmp_str; -+ VG_(clo_n_req_tsyms)++; -+ } -+ -+ /* "stuvwxyz" --> stuvwxyz (binary) */ -+ else if VG_STR_CLO(arg, "--trace-flags", tmp_str) { -+ Int j; -+ -+ if (8 != VG_(strlen)(tmp_str)) { -+ VG_(fmsg_bad_option)(arg, -+ "--trace-flags argument must have 8 digits\n"); -+ } -+ for (j = 0; j < 8; j++) { -+ if ('0' == tmp_str[j]) { /* do nothing */ } -+ else if ('1' == tmp_str[j]) VG_(clo_trace_flags) |= (1 << (7-j)); -+ else { -+ VG_(fmsg_bad_option)(arg, -+ "--trace-flags argument can only contain 0s and 1s\n"); -+ } -+ } -+ } -+ -+ /* "stuvwxyz" --> stuvwxyz (binary) */ -+ else if VG_STR_CLO(arg, "--profile-flags", tmp_str) { -+ Int j; -+ -+ if (8 != VG_(strlen)(tmp_str)) { -+ VG_(fmsg_bad_option)(arg, -+ "--profile-flags argument must have 8 digits\n"); -+ } -+ for (j = 0; j < 8; j++) { -+ if ('0' == tmp_str[j]) { /* do nothing */ } -+ else if ('1' == tmp_str[j]) VG_(clo_profile_flags) |= (1 << (7-j)); -+ else { -+ VG_(fmsg_bad_option)(arg, -+ "--profile-flags argument can only contain 0s and 1s\n"); -+ } -+ } -+ } -+ -+ else if VG_INT_CLO (arg, "--trace-notbelow", VG_(clo_trace_notbelow)) {} -+ -+ else if VG_XACT_CLO(arg, "--gen-suppressions=no", -+ VG_(clo_gen_suppressions), 0) {} -+ else if VG_XACT_CLO(arg, "--gen-suppressions=yes", -+ VG_(clo_gen_suppressions), 1) {} -+ else if VG_XACT_CLO(arg, "--gen-suppressions=all", -+ VG_(clo_gen_suppressions), 2) {} -+ -+ else if ( ! VG_(needs).command_line_options -+ || ! VG_TDICT_CALL(tool_process_cmd_line_option, arg) ) { -+ VG_(fmsg_bad_option)(arg, ""); -+ } -+ } -+ -+ /* END command-line processing loop */ -+ -+ /* Make VEX control parameters sane */ -+ -+ if (VG_(clo_vex_control).guest_chase_thresh -+ >= VG_(clo_vex_control).guest_max_insns) -+ VG_(clo_vex_control).guest_chase_thresh -+ = VG_(clo_vex_control).guest_max_insns - 1; -+ -+ if (VG_(clo_vex_control).guest_chase_thresh < 0) -+ VG_(clo_vex_control).guest_chase_thresh = 0; -+ -+ /* Check various option values */ -+ -+ if (VG_(clo_verbosity) < 0) -+ VG_(clo_verbosity) = 0; -+ -+ if (VG_(clo_gen_suppressions) > 0 && -+ !VG_(needs).core_errors && !VG_(needs).tool_errors) { -+ VG_(fmsg_bad_option)("--gen-suppressions=yes", -+ "Can't use --gen-suppressions= with %s\n" -+ "because it doesn't generate errors.\n", VG_(details).name); -+ } -+ -+ /* If XML output is requested, check that the tool actually -+ supports it. */ -+ if (VG_(clo_xml) && !VG_(needs).xml_output) { -+ VG_(clo_xml) = False; -+ VG_(fmsg_bad_option)("--xml=yes", -+ "%s does not support XML output.\n", VG_(details).name); -+ /*NOTREACHED*/ -+ } -+ -+ vg_assert( VG_(clo_gen_suppressions) >= 0 ); -+ vg_assert( VG_(clo_gen_suppressions) <= 2 ); -+ -+ /* If we've been asked to emit XML, mash around various other -+ options so as to constrain the output somewhat, and to remove -+ any need for user input during the run. -+ */ -+ if (VG_(clo_xml)) { -+ -+ /* We can't allow --gen-suppressions=yes, since that requires us -+ to print the error and then ask the user if she wants a -+ suppression for it, but in XML mode we won't print it until -+ we know whether we also need to print a suppression. Hence a -+ circular dependency. So disallow this. -+ (--gen-suppressions=all is still OK since we don't need any -+ user interaction in this case.) */ -+ if (VG_(clo_gen_suppressions) == 1) { -+ VG_(fmsg_bad_option)( -+ "--xml=yes together with --gen-suppressions=yes", -+ "When --xml=yes is specified, --gen-suppressions=no\n" -+ "or --gen-suppressions=all is allowed, but not " -+ "--gen-suppressions=yes.\n"); -+ } -+ -+ /* We can't allow DB attaching (or we maybe could, but results -+ could be chaotic ..) since it requires user input. Hence -+ disallow. */ -+ if (VG_(clo_db_attach)) { -+ VG_(fmsg_bad_option)( -+ "--xml=yes together with --db-attach=yes", -+ "--db-attach=yes is not allowed with --xml=yes\n" -+ "because it would require user input.\n"); -+ } -+ -+ /* Disallow dump_error in XML mode; sounds like a recipe for -+ chaos. No big deal; dump_error is a flag for debugging V -+ itself. */ -+ if (VG_(clo_dump_error) > 0) { -+ VG_(fmsg_bad_option)("--xml=yes together with --dump-error", ""); -+ } -+ -+ /* Disable error limits (this might be a bad idea!) */ -+ VG_(clo_error_limit) = False; -+ /* Disable emulation warnings */ -+ -+ /* Also, we want to set options for the leak checker, but that -+ will have to be done in Memcheck's flag-handling code, not -+ here. */ -+ } -+ -+ /* All non-logging-related options have been checked. If the logging -+ option specified is ok, we can switch to it, as we know we won't -+ have to generate any other command-line-related error messages. -+ (So far we should be still attached to stderr, so we can show on -+ the terminal any problems to do with processing command line -+ opts.) -+ -+ So set up logging now. After this is done, VG_(log_output_sink) -+ and (if relevant) VG_(xml_output_sink) should be connected to -+ whatever sink has been selected, and we indiscriminately chuck -+ stuff into it without worrying what the nature of it is. Oh the -+ wonder of Unix streams. */ -+ -+ vg_assert(VG_(log_output_sink).fd == 2 /* stderr */); -+ vg_assert(VG_(log_output_sink).is_socket == False); -+ vg_assert(VG_(clo_log_fname_expanded) == NULL); -+ -+ vg_assert(VG_(xml_output_sink).fd == -1 /* disabled */); -+ vg_assert(VG_(xml_output_sink).is_socket == False); -+ vg_assert(VG_(clo_xml_fname_expanded) == NULL); -+ -+ /* --- set up the normal text output channel --- */ -+ -+ switch (log_to) { -+ -+ case VgLogTo_Fd: -+ vg_assert(log_fsname_unexpanded == NULL); -+ break; -+ -+ case VgLogTo_File: { -+ Char* logfilename; -+ -+ vg_assert(log_fsname_unexpanded != NULL); -+ vg_assert(VG_(strlen)(log_fsname_unexpanded) <= 900); /* paranoia */ -+ -+ // Nb: we overwrite an existing file of this name without asking -+ // any questions. -+ logfilename = VG_(expand_file_name)("--log-file", -+ log_fsname_unexpanded); -+ sres = VG_(open)(logfilename, -+ VKI_O_CREAT|VKI_O_WRONLY|VKI_O_TRUNC, -+ VKI_S_IRUSR|VKI_S_IWUSR); -+ if (!sr_isError(sres)) { -+ tmp_log_fd = sr_Res(sres); -+ VG_(clo_log_fname_expanded) = logfilename; -+ } else { -+ VG_(fmsg)("can't create log file '%s': %s\n", -+ logfilename, VG_(strerror)(sr_Err(sres))); -+ VG_(exit)(1); -+ /*NOTREACHED*/ -+ } -+ break; -+ } -+ -+ case VgLogTo_Socket: { -+ vg_assert(log_fsname_unexpanded != NULL); -+ vg_assert(VG_(strlen)(log_fsname_unexpanded) <= 900); /* paranoia */ -+ tmp_log_fd = VG_(connect_via_socket)( log_fsname_unexpanded ); -+ if (tmp_log_fd == -1) { -+ VG_(fmsg)("Invalid --log-socket spec of '%s'\n", -+ log_fsname_unexpanded); -+ VG_(exit)(1); -+ /*NOTREACHED*/ -+ } -+ if (tmp_log_fd == -2) { -+ VG_(umsg)("failed to connect to logging server '%s'.\n" -+ "Log messages will sent to stderr instead.\n", -+ log_fsname_unexpanded ); -+ -+ /* We don't change anything here. */ -+ vg_assert(VG_(log_output_sink).fd == 2); -+ tmp_log_fd = 2; -+ } else { -+ vg_assert(tmp_log_fd > 0); -+ VG_(log_output_sink).is_socket = True; -+ } -+ break; -+ } -+ } -+ -+ /* --- set up the XML output channel --- */ -+ -+ switch (xml_to) { -+ -+ case VgLogTo_Fd: -+ vg_assert(xml_fsname_unexpanded == NULL); -+ break; -+ -+ case VgLogTo_File: { -+ Char* xmlfilename; -+ -+ vg_assert(xml_fsname_unexpanded != NULL); -+ vg_assert(VG_(strlen)(xml_fsname_unexpanded) <= 900); /* paranoia */ -+ -+ // Nb: we overwrite an existing file of this name without asking -+ // any questions. -+ xmlfilename = VG_(expand_file_name)("--xml-file", -+ xml_fsname_unexpanded); -+ sres = VG_(open)(xmlfilename, -+ VKI_O_CREAT|VKI_O_WRONLY|VKI_O_TRUNC, -+ VKI_S_IRUSR|VKI_S_IWUSR); -+ if (!sr_isError(sres)) { -+ tmp_xml_fd = sr_Res(sres); -+ VG_(clo_xml_fname_expanded) = xmlfilename; -+ /* strdup here is probably paranoid overkill, but ... */ -+ *xml_fname_unexpanded = VG_(strdup)( "main.mpclo.2", -+ xml_fsname_unexpanded ); -+ } else { -+ VG_(fmsg)("can't create XML file '%s': %s\n", -+ xmlfilename, VG_(strerror)(sr_Err(sres))); -+ VG_(exit)(1); -+ /*NOTREACHED*/ -+ } -+ break; -+ } -+ -+ case VgLogTo_Socket: { -+ vg_assert(xml_fsname_unexpanded != NULL); -+ vg_assert(VG_(strlen)(xml_fsname_unexpanded) <= 900); /* paranoia */ -+ tmp_xml_fd = VG_(connect_via_socket)( xml_fsname_unexpanded ); -+ if (tmp_xml_fd == -1) { -+ VG_(fmsg)("Invalid --xml-socket spec of '%s'\n", -+ xml_fsname_unexpanded ); -+ VG_(exit)(1); -+ /*NOTREACHED*/ -+ } -+ if (tmp_xml_fd == -2) { -+ VG_(umsg)("failed to connect to XML logging server '%s'.\n" -+ "XML output will sent to stderr instead.\n", -+ xml_fsname_unexpanded); -+ /* We don't change anything here. */ -+ vg_assert(VG_(xml_output_sink).fd == 2); -+ tmp_xml_fd = 2; -+ } else { -+ vg_assert(tmp_xml_fd > 0); -+ VG_(xml_output_sink).is_socket = True; -+ } -+ break; -+ } -+ } -+ -+ /* If we've got this far, and XML mode was requested, but no XML -+ output channel appears to have been specified, just stop. We -+ could continue, and XML output will simply vanish into nowhere, -+ but that is likely to confuse the hell out of users, which is -+ distinctly Ungood. */ -+ if (VG_(clo_xml) && tmp_xml_fd == -1) { -+ VG_(fmsg_bad_option)( -+ "--xml=yes, but no XML destination specified", -+ "--xml=yes has been specified, but there is no XML output\n" -+ "destination. You must specify an XML output destination\n" -+ "using --xml-fd, --xml-file or --xml-socket.\n" -+ ); -+ } -+ -+ // Finalise the output fds: the log fd .. -+ -+ if (tmp_log_fd >= 0) { -+ // Move log_fd into the safe range, so it doesn't conflict with -+ // any app fds. -+ tmp_log_fd = VG_(fcntl)(tmp_log_fd, VKI_F_DUPFD, VG_(fd_hard_limit)); -+ if (tmp_log_fd < 0) { -+ VG_(message)(Vg_UserMsg, "valgrind: failed to move logfile fd " -+ "into safe range, using stderr\n"); -+ VG_(log_output_sink).fd = 2; // stderr -+ VG_(log_output_sink).is_socket = False; -+ } else { -+ VG_(log_output_sink).fd = tmp_log_fd; -+ VG_(fcntl)(VG_(log_output_sink).fd, VKI_F_SETFD, VKI_FD_CLOEXEC); -+ } -+ } else { -+ // If they said --log-fd=-1, don't print anything. Plausible for use in -+ // regression testing suites that use client requests to count errors. -+ VG_(log_output_sink).fd = -1; -+ VG_(log_output_sink).is_socket = False; -+ } -+ -+ // Finalise the output fds: and the XML fd .. -+ -+ if (tmp_xml_fd >= 0) { -+ // Move xml_fd into the safe range, so it doesn't conflict with -+ // any app fds. -+ tmp_xml_fd = VG_(fcntl)(tmp_xml_fd, VKI_F_DUPFD, VG_(fd_hard_limit)); -+ if (tmp_xml_fd < 0) { -+ VG_(message)(Vg_UserMsg, "valgrind: failed to move XML file fd " -+ "into safe range, using stderr\n"); -+ VG_(xml_output_sink).fd = 2; // stderr -+ VG_(xml_output_sink).is_socket = False; -+ } else { -+ VG_(xml_output_sink).fd = tmp_xml_fd; -+ VG_(fcntl)(VG_(xml_output_sink).fd, VKI_F_SETFD, VKI_FD_CLOEXEC); -+ } -+ } else { -+ // If they said --xml-fd=-1, don't print anything. Plausible for use in -+ // regression testing suites that use client requests to count errors. -+ VG_(xml_output_sink).fd = -1; -+ VG_(xml_output_sink).is_socket = False; -+ } -+ -+ // Suppressions related stuff -+ -+ if (VG_(clo_n_suppressions) < VG_CLO_MAX_SFILES-1 && -+ (VG_(needs).core_errors || VG_(needs).tool_errors)) { -+ /* If we haven't reached the max number of suppressions, load -+ the default one. */ -+ static const Char default_supp[] = "default.supp"; -+ Int len = VG_(strlen)(VG_(libdir)) + 1 + sizeof(default_supp); -+ Char *buf = VG_(arena_malloc)(VG_AR_CORE, "main.mpclo.3", len); -+ VG_(sprintf)(buf, "%s/%s", VG_(libdir), default_supp); -+ VG_(clo_suppressions)[VG_(clo_n_suppressions)] = buf; -+ VG_(clo_n_suppressions)++; -+ } -+ -+ *logging_to_fd = log_to == VgLogTo_Fd || log_to == VgLogTo_Socket; -+} -+ -+// Write the name and value of log file qualifiers to the xml file. -+static void print_file_vars(Char* format) -+{ -+ Int i = 0; -+ -+ while (format[i]) { -+ if (format[i] == '%') { -+ // We saw a '%'. What's next... -+ i++; -+ if ('q' == format[i]) { -+ i++; -+ if ('{' == format[i]) { -+ // Get the env var name, print its contents. -+ Char* qualname; -+ Char* qual; -+ i++; -+ qualname = &format[i]; -+ while (True) { -+ if ('}' == format[i]) { -+ // Temporarily replace the '}' with NUL to extract var -+ // name. -+ format[i] = 0; -+ qual = VG_(getenv)(qualname); -+ break; -+ } -+ i++; -+ } -+ -+ VG_(printf_xml_no_f_c)( -+ " %t " -+ "%t \n", -+ qualname,qual -+ ); -+ format[i] = '}'; -+ i++; -+ } -+ } -+ } else { -+ i++; -+ } -+ } -+} -+ -+ -+/*====================================================================*/ -+/*=== Printing the preamble ===*/ -+/*====================================================================*/ -+ -+// Print the command, escaping any chars that require it. -+static void umsg_or_xml_arg(const Char* arg, -+ UInt (*umsg_or_xml)( const HChar*, ... ) ) -+{ -+ SizeT len = VG_(strlen)(arg); -+ Char* special = " \\<>"; -+ Int i; -+ for (i = 0; i < len; i++) { -+ if (VG_(strchr)(special, arg[i])) { -+ umsg_or_xml("\\"); // escape with a backslash if necessary -+ } -+ umsg_or_xml("%c", arg[i]); -+ } -+} -+ -+/* Ok, the logging sink is running now. Print a suitable preamble. -+ If logging to file or a socket, write details of parent PID and -+ command line args, to help people trying to interpret the -+ results of a run which encompasses multiple processes. */ -+static void print_preamble ( Bool logging_to_fd, -+ Char* xml_fname_unexpanded, -+ const HChar* toolname ) -+{ -+ Int i; -+ HChar* xpre = VG_(clo_xml) ? " " : ""; -+ HChar* xpost = VG_(clo_xml) ? "" : ""; -+ UInt (*umsg_or_xml)( const HChar*, ... ) -+ = VG_(clo_xml) ? VG_(printf_xml) : VG_(umsg); -+ -+ vg_assert( VG_(args_for_client) ); -+ vg_assert( VG_(args_for_valgrind) ); -+ vg_assert( toolname ); -+ -+ if (VG_(clo_xml)) { -+ VG_(printf_xml)("\n"); -+ VG_(printf_xml)("\n"); -+ VG_(printf_xml)("\n"); -+ VG_(printf_xml)("\n"); -+ VG_(printf_xml)("4\n"); -+ VG_(printf_xml)("%s\n", toolname); -+ VG_(printf_xml)("\n"); -+ } -+ -+ if (VG_(clo_xml) || VG_(clo_verbosity > 0)) { -+ -+ if (VG_(clo_xml)) -+ VG_(printf_xml)("\n"); -+ -+ /* Tool details */ -+ umsg_or_xml( VG_(clo_xml) ? "%s%t%t%t, %t%s\n" : "%s%s%s%s, %s%s\n", -+ xpre, -+ VG_(details).name, -+ NULL == VG_(details).version ? "" : "-", -+ NULL == VG_(details).version -+ ? (Char*)"" : VG_(details).version, -+ VG_(details).description, -+ xpost ); -+ -+ if (VG_(strlen)(toolname) >= 4 && VG_STREQN(4, toolname, "exp-")) { -+ umsg_or_xml( -+ "%sNOTE: This is an Experimental-Class Valgrind Tool%s\n", -+ xpre, xpost -+ ); -+ } -+ -+ umsg_or_xml( VG_(clo_xml) ? "%s%t%s\n" : "%s%s%s\n", -+ xpre, VG_(details).copyright_author, xpost ); -+ -+ /* Core details */ -+ umsg_or_xml( -+ "%sUsing Valgrind-%s and LibVEX; rerun with -h for copyright info%s\n", -+ xpre, VERSION, xpost -+ ); -+ -+ // Print the command line. At one point we wrapped at 80 chars and -+ // printed a '\' as a line joiner, but that makes it hard to cut and -+ // paste the command line (because of the "==pid==" prefixes), so we now -+ // favour utility and simplicity over aesthetics. -+ umsg_or_xml("%sCommand: ", xpre); -+ if (VG_(args_the_exename)) -+ umsg_or_xml_arg(VG_(args_the_exename), umsg_or_xml); -+ for (i = 0; i < VG_(sizeXA)( VG_(args_for_client) ); i++) { -+ HChar* s = *(HChar**)VG_(indexXA)( VG_(args_for_client), i ); -+ umsg_or_xml(" "); -+ umsg_or_xml_arg(s, umsg_or_xml); -+ } -+ umsg_or_xml("%s\n", xpost); -+ -+ if (VG_(clo_xml)) -+ VG_(printf_xml)("\n"); -+ } -+ -+ // Print the parent PID, and other stuff, if necessary. -+ if (!VG_(clo_xml) && VG_(clo_verbosity) > 0 && !logging_to_fd) { -+ VG_(umsg)("Parent PID: %d\n", VG_(getppid)()); -+ } -+ else -+ if (VG_(clo_xml)) { -+ VG_(printf_xml)("\n"); -+ VG_(printf_xml)("%d\n", VG_(getpid)()); -+ VG_(printf_xml)("%d\n", VG_(getppid)()); -+ VG_(printf_xml_no_f_c)("%t\n", toolname); -+ if (xml_fname_unexpanded) -+ print_file_vars(xml_fname_unexpanded); -+ if (VG_(clo_xml_user_comment)) { -+ /* Note: the user comment itself is XML and is therefore to -+ be passed through verbatim (%s) rather than escaped -+ (%t). */ -+ VG_(printf_xml)("%s\n", -+ VG_(clo_xml_user_comment)); -+ } -+ VG_(printf_xml)("\n"); -+ VG_(printf_xml)("\n"); -+ -+ VG_(printf_xml)(" \n"); -+ if (VG_(name_of_launcher)) -+ VG_(printf_xml_no_f_c)(" %t\n", -+ VG_(name_of_launcher)); -+ else -+ VG_(printf_xml_no_f_c)(" %t\n", -+ "(launcher name unknown)"); -+ for (i = 0; i < VG_(sizeXA)( VG_(args_for_valgrind) ); i++) { -+ VG_(printf_xml_no_f_c)( -+ " %t\n", -+ * (HChar**) VG_(indexXA)( VG_(args_for_valgrind), i ) -+ ); -+ } -+ VG_(printf_xml)(" \n"); -+ -+ VG_(printf_xml)(" \n"); -+ if (VG_(args_the_exename)) -+ VG_(printf_xml_no_f_c)(" %t\n", -+ VG_(args_the_exename)); -+ for (i = 0; i < VG_(sizeXA)( VG_(args_for_client) ); i++) { -+ VG_(printf_xml_no_f_c)( -+ " %t\n", -+ * (HChar**) VG_(indexXA)( VG_(args_for_client), i ) -+ ); -+ } -+ VG_(printf_xml)(" \n"); -+ -+ VG_(printf_xml)("\n"); -+ } -+ -+ // Last thing in the preamble is a blank line. -+ if (VG_(clo_xml)) -+ VG_(printf_xml)("\n"); -+ else if (VG_(clo_verbosity) > 0) -+ VG_(umsg)("\n"); -+ -+ if (VG_(clo_verbosity) > 1) { -+ SysRes fd; -+ VexArch vex_arch; -+ VexArchInfo vex_archinfo; -+ if (!logging_to_fd) -+ VG_(message)(Vg_DebugMsg, "\n"); -+ VG_(message)(Vg_DebugMsg, "Valgrind options:\n"); -+ for (i = 0; i < VG_(sizeXA)( VG_(args_for_valgrind) ); i++) { -+ VG_(message)(Vg_DebugMsg, -+ " %s\n", -+ * (HChar**) VG_(indexXA)( VG_(args_for_valgrind), i )); -+ } -+ -+ VG_(message)(Vg_DebugMsg, "Contents of /proc/version:\n"); -+ fd = VG_(open) ( "/proc/version", VKI_O_RDONLY, 0 ); -+ if (sr_isError(fd)) { -+ VG_(message)(Vg_DebugMsg, " can't open /proc/version\n"); -+ } else { -+# define BUF_LEN 256 -+ Char version_buf[BUF_LEN]; -+ Int n = VG_(read) ( sr_Res(fd), version_buf, BUF_LEN ); -+ vg_assert(n <= BUF_LEN); -+ if (n > 0) { -+ version_buf[n-1] = '\0'; -+ VG_(message)(Vg_DebugMsg, " %s\n", version_buf); -+ } else { -+ VG_(message)(Vg_DebugMsg, " (empty?)\n"); -+ } -+ VG_(close)(sr_Res(fd)); -+# undef BUF_LEN -+ } -+ -+ VG_(machine_get_VexArchInfo)( &vex_arch, &vex_archinfo ); -+ VG_(message)( -+ Vg_DebugMsg, -+ "Arch and hwcaps: %s, %s\n", -+ LibVEX_ppVexArch ( vex_arch ), -+ LibVEX_ppVexHwCaps ( vex_arch, vex_archinfo.hwcaps ) -+ ); -+ VG_(message)( -+ Vg_DebugMsg, -+ "Page sizes: currently %d, max supported %d\n", -+ (Int)VKI_PAGE_SIZE, (Int)VKI_MAX_PAGE_SIZE -+ ); -+ VG_(message)(Vg_DebugMsg, -+ "Valgrind library directory: %s\n", VG_(libdir)); -+ } -+} -+ -+ -+/*====================================================================*/ -+/*=== File descriptor setup ===*/ -+/*====================================================================*/ -+ -+/* Number of file descriptors that Valgrind tries to reserve for -+ it's own use - just a small constant. */ -+#define N_RESERVED_FDS (10) -+ -+static void setup_file_descriptors(void) -+{ -+ struct vki_rlimit rl; -+ Bool show = False; -+ -+ /* Get the current file descriptor limits. */ -+ if (VG_(getrlimit)(VKI_RLIMIT_NOFILE, &rl) < 0) { -+ rl.rlim_cur = 1024; -+ rl.rlim_max = 1024; -+ } -+ -+# if defined(VGO_darwin) -+ /* Darwin lies. It reports file max as RLIM_INFINITY but -+ silently disallows anything bigger than 10240. */ -+ if (rl.rlim_cur >= 10240 && rl.rlim_max == 0x7fffffffffffffffULL) { -+ rl.rlim_max = 10240; -+ } -+# endif -+ -+ if (show) -+ VG_(printf)("fd limits: host, before: cur %lu max %lu\n", -+ (UWord)rl.rlim_cur, (UWord)rl.rlim_max); -+ -+# if defined(VGP_ppc32_aix5) || defined(VGP_ppc64_aix5) -+ /* I don't know why this kludge is needed; however if rl.rlim_cur -+ is RLIM_INFINITY, then VG_(safe_fd)'s attempts using VG_(fcntl) -+ to lift V's file descriptors above the threshold RLIM_INFINITY - -+ N_RESERVED_FDS fail. So just use a relatively conservative -+ value in this case. */ -+ if (rl.rlim_cur > 1024) -+ rl.rlim_cur = 1024; -+# endif -+ -+ /* Work out where to move the soft limit to. */ -+ if (rl.rlim_cur + N_RESERVED_FDS <= rl.rlim_max) { -+ rl.rlim_cur = rl.rlim_cur + N_RESERVED_FDS; -+ } else { -+ rl.rlim_cur = rl.rlim_max; -+ } -+ -+ /* Reserve some file descriptors for our use. */ -+ VG_(fd_soft_limit) = rl.rlim_cur - N_RESERVED_FDS; -+ VG_(fd_hard_limit) = rl.rlim_cur - N_RESERVED_FDS; -+ -+ /* Update the soft limit. */ -+ VG_(setrlimit)(VKI_RLIMIT_NOFILE, &rl); -+ -+ if (show) { -+ VG_(printf)("fd limits: host, after: cur %lu max %lu\n", -+ (UWord)rl.rlim_cur, (UWord)rl.rlim_max); -+ VG_(printf)("fd limits: guest : cur %u max %u\n", -+ VG_(fd_soft_limit), VG_(fd_hard_limit)); -+ } -+ -+ if (VG_(cl_exec_fd) != -1) -+ VG_(cl_exec_fd) = VG_(safe_fd)( VG_(cl_exec_fd) ); -+} -+ -+ -+/*====================================================================*/ -+/*=== BB profiling ===*/ -+/*====================================================================*/ -+ -+static -+void show_BB_profile ( BBProfEntry tops[], UInt n_tops, ULong score_total ) -+{ -+ ULong score_cumul, score_here; -+ Char buf_cumul[10], buf_here[10]; -+ Char name[64]; -+ Int r; -+ -+ VG_(printf)("\n"); -+ VG_(printf)("-----------------------------------------------------------\n"); -+ VG_(printf)("--- BEGIN BB Profile (summary of scores) ---\n"); -+ VG_(printf)("-----------------------------------------------------------\n"); -+ VG_(printf)("\n"); -+ -+ VG_(printf)("Total score = %lld\n\n", score_total); -+ -+ score_cumul = 0; -+ for (r = 0; r < n_tops; r++) { -+ if (tops[r].addr == 0) -+ continue; -+ name[0] = 0; -+ VG_(get_fnname_w_offset)(tops[r].addr, name, 64); -+ name[63] = 0; -+ score_here = tops[r].score; -+ score_cumul += score_here; -+ VG_(percentify)(score_cumul, score_total, 2, 6, buf_cumul); -+ VG_(percentify)(score_here, score_total, 2, 6, buf_here); -+ VG_(printf)("%3d: (%9lld %s) %9lld %s 0x%llx %s\n", -+ r, -+ score_cumul, buf_cumul, -+ score_here, buf_here, tops[r].addr, name ); -+ } -+ -+ VG_(printf)("\n"); -+ VG_(printf)("-----------------------------------------------------------\n"); -+ VG_(printf)("--- BB Profile (BB details) ---\n"); -+ VG_(printf)("-----------------------------------------------------------\n"); -+ VG_(printf)("\n"); -+ -+ score_cumul = 0; -+ for (r = 0; r < n_tops; r++) { -+ if (tops[r].addr == 0) -+ continue; -+ name[0] = 0; -+ VG_(get_fnname_w_offset)(tops[r].addr, name, 64); -+ name[63] = 0; -+ score_here = tops[r].score; -+ score_cumul += score_here; -+ VG_(percentify)(score_cumul, score_total, 2, 6, buf_cumul); -+ VG_(percentify)(score_here, score_total, 2, 6, buf_here); -+ VG_(printf)("\n"); -+ VG_(printf)("=-=-=-=-=-=-=-=-=-=-=-=-=-= begin BB rank %d " -+ "=-=-=-=-=-=-=-=-=-=-=-=-=-=\n\n", r); -+ VG_(printf)("%3d: (%9lld %s) %9lld %s 0x%llx %s\n", -+ r, -+ score_cumul, buf_cumul, -+ score_here, buf_here, tops[r].addr, name ); -+ VG_(printf)("\n"); -+ VG_(discard_translations)(tops[r].addr, 1, "bb profile"); -+ VG_(translate)(0, tops[r].addr, True, VG_(clo_profile_flags), 0, True); -+ VG_(printf)("=-=-=-=-=-=-=-=-=-=-=-=-=-= end BB rank %d " -+ "=-=-=-=-=-=-=-=-=-=-=-=-=-=\n\n", r); -+ } -+ -+ VG_(printf)("\n"); -+ VG_(printf)("-----------------------------------------------------------\n"); -+ VG_(printf)("--- END BB Profile ---\n"); -+ VG_(printf)("-----------------------------------------------------------\n"); -+ VG_(printf)("\n"); -+} -+ -+ -+/*====================================================================*/ -+/*=== main() ===*/ -+/*====================================================================*/ -+ -+/* When main() is entered, we should be on the following stack, not -+ the one the kernel gave us. We will run on this stack until -+ simulation of the root thread is started, at which point a transfer -+ is made to a dynamically allocated stack. This is for the sake of -+ uniform overflow detection for all Valgrind threads. This is -+ marked global even though it isn't, because assembly code below -+ needs to reference the name. */ -+ -+/*static*/ VgStack VG_(interim_stack); -+ -+/* These are the structures used to hold info for creating the initial -+ client image. -+ -+ 'iicii' mostly holds important register state present at system -+ startup (_start_valgrind). valgrind_main() then fills in the rest -+ of it and passes it to VG_(ii_create_image)(). That produces -+ 'iifii', which is later handed to VG_(ii_finalise_image). */ -+ -+/* In all OS-instantiations, the_iicii has a field .sp_at_startup. -+ This should get some address inside the stack on which we gained -+ control (eg, it could be the SP at startup). It doesn't matter -+ exactly where in the stack it is. This value is passed to the -+ address space manager at startup. On Linux, aspacem then uses it -+ to identify the initial stack segment and hence the upper end of -+ the usable address space. */ -+ -+static IICreateImageInfo the_iicii; -+static IIFinaliseImageInfo the_iifii; -+ -+ -+/* A simple pair structure, used for conveying debuginfo handles to -+ calls to VG_TRACK(new_mem_startup, ...). */ -+typedef struct { Addr a; ULong ull; } Addr_n_ULong; -+ -+ -+/* --- Forwards decls to do with shutdown --- */ -+ -+static void final_tidyup(ThreadId tid); -+ -+/* Do everything which needs doing when the last thread exits */ -+static -+void shutdown_actions_NORETURN( ThreadId tid, -+ VgSchedReturnCode tids_schedretcode ); -+ -+/* --- end of Forwards decls to do with shutdown --- */ -+ -+ -+/* By the time we get to valgrind_main, the_iicii should already have -+ been filled in with any important details as required by whatever -+ OS we have been built for. -+*/ -+static -+Int valgrind_main ( Int argc, HChar **argv, HChar **envp ) -+{ -+ HChar* toolname = "memcheck"; // default to Memcheck -+ Int need_help = 0; // 0 = no, 1 = --help, 2 = --help-debug -+ ThreadId tid_main = VG_INVALID_THREADID; -+ Bool logging_to_fd = False; -+ Char* xml_fname_unexpanded = NULL; -+ Int loglevel, i; -+ struct vki_rlimit zero = { 0, 0 }; -+ XArray* addr2dihandle = NULL; -+ -+ //============================================================ -+ // -+ // Nb: startup is complex. Prerequisites are shown at every step. -+ // *** Be very careful when messing with the order *** -+ // -+ // The first order of business is to get debug logging, the address -+ // space manager and the dynamic memory manager up and running. -+ // Once that's done, we can relax a bit. -+ // -+ //============================================================ -+ -+ /* This is needed to make VG_(getenv) usable early. */ -+ VG_(client_envp) = (Char**)envp; -+ -+ //-------------------------------------------------------------- -+ // Start up Mach kernel interface, if any -+ // p: none -+ //-------------------------------------------------------------- -+# if defined(VGO_darwin) -+ VG_(mach_init)(); -+# endif -+ -+ //-------------------------------------------------------------- -+ // Start up the logging mechanism -+ // p: none -+ //-------------------------------------------------------------- -+ /* Start the debugging-log system ASAP. First find out how many -+ "-d"s were specified. This is a pre-scan of the command line. Also -+ get --profile-heap=yes which is needed by the time we start up dynamic -+ memory management. */ -+ loglevel = 0; -+ for (i = 1; i < argc; i++) { -+ if (argv[i][0] != '-') break; -+ if VG_STREQ(argv[i], "--") break; -+ if VG_STREQ(argv[i], "-d") loglevel++; -+ if VG_BOOL_CLO(argv[i], "--profile-heap", VG_(clo_profile_heap)) {} -+ } -+ -+ /* ... and start the debug logger. Now we can safely emit logging -+ messages all through startup. */ -+ VG_(debugLog_startup)(loglevel, "Stage 2 (main)"); -+ VG_(debugLog)(1, "main", "Welcome to Valgrind version " -+ VERSION " debug logging\n"); -+ -+ //-------------------------------------------------------------- -+ // AIX5 only: register the system call numbers -+ // p: logging -+ // p: that the initial few syscall numbers stated in the -+ // bootblock have been installed (else we can't -+ // open/read/close). -+ //-------------------------------------------------------------- -+# if defined(VGO_aix5) -+ VG_(debugLog)(1, "main", "aix5: registering syscalls ..\n"); -+ { UChar sysent_name[50]; -+ SysRes fd; -+ Bool ok; -+ Int n_unregd, sysent_used = 0; -+ prsysent_t* sysent_hdr; -+ -+ VG_(sprintf)(sysent_name, "/proc/%d/sysent", VG_(getpid)()); -+ fd = VG_(open)(sysent_name, VKI_O_RDONLY, 0); -+ if (fd.isError) -+ VG_(err_config_error)("aix5: can't open /proc//sysent"); -+ -+ sysent_used = VG_(read)(fd.res, aix5_sysent_buf, VG_AIX5_SYSENT_SIZE); -+ if (sysent_used < 0) -+ VG_(err_config_error)("aix5: error reading /proc//sysent"); -+ if (sysent_used >= VG_AIX5_SYSENT_SIZE) -+ VG_(err_config_error)("aix5: VG_AIX5_SYSENT_SIZE is too low; " -+ "increase and recompile"); -+ VG_(close)(fd.res); -+ -+ vg_assert(sysent_used > 0 && sysent_used < VG_AIX5_SYSENT_SIZE); -+ -+ sysent_hdr = (prsysent_t*)&aix5_sysent_buf[0]; -+ -+ n_unregd = 0; -+ for (i = 0; i < sysent_hdr->pr_nsyscalls; i++) { -+ UChar* name = &aix5_sysent_buf[ sysent_hdr -+ ->pr_syscall[i].pr_nameoff ]; -+ UInt nmbr = sysent_hdr->pr_syscall[i].pr_number; -+ VG_(debugLog)(3, "main", "aix5: bind syscall %d to \"%s\"\n", -+ nmbr, name); -+ ok = VG_(aix5_register_syscall)(nmbr, name); -+ if (!ok) -+ n_unregd++; -+ if (!ok) -+ VG_(debugLog)(3, "main", -+ "aix5: bind FAILED: %d to \"%s\"\n", -+ nmbr, name); -+ } -+ VG_(debugLog)(1, "main", "aix5: .. %d syscalls known, %d unknown\n", -+ sysent_hdr->pr_nsyscalls - n_unregd, n_unregd ); -+ VG_(debugLog)(1, "main", "aix5: __NR_AIX5_FAKE_SIGRETURN = %d\n", -+ __NR_AIX5_FAKE_SIGRETURN ); -+ } -+# endif -+ -+ //-------------------------------------------------------------- -+ // Ensure we're on a plausible stack. -+ // p: logging -+ //-------------------------------------------------------------- -+ VG_(debugLog)(1, "main", "Checking current stack is plausible\n"); -+ { HChar* limLo = (HChar*)(&VG_(interim_stack).bytes[0]); -+ HChar* limHi = limLo + sizeof(VG_(interim_stack)); -+ HChar* aLocal = (HChar*)&zero; /* any auto local will do */ -+ if (aLocal < limLo || aLocal >= limHi) { -+ /* something's wrong. Stop. */ -+ VG_(debugLog)(0, "main", "Root stack %p to %p, a local %p\n", -+ limLo, limHi, aLocal ); -+ VG_(debugLog)(0, "main", "Valgrind: FATAL: " -+ "Initial stack switched failed.\n"); -+ VG_(debugLog)(0, "main", " Cannot continue. Sorry.\n"); -+ VG_(exit)(1); -+ } -+ } -+ -+ //-------------------------------------------------------------- -+ // Ensure we have a plausible pointer to the stack on which -+ // we gained control (not the current stack!) -+ // p: logging -+ //-------------------------------------------------------------- -+ VG_(debugLog)(1, "main", "Checking initial stack was noted\n"); -+ if (the_iicii.sp_at_startup == 0) { -+ VG_(debugLog)(0, "main", "Valgrind: FATAL: " -+ "Initial stack was not noted.\n"); -+ VG_(debugLog)(0, "main", " Cannot continue. Sorry.\n"); -+ VG_(exit)(1); -+ } -+ -+ //-------------------------------------------------------------- -+ // Start up the address space manager, and determine the -+ // approximate location of the client's stack -+ // p: logging, plausible-stack -+ //-------------------------------------------------------------- -+ VG_(debugLog)(1, "main", "Starting the address space manager\n"); -+ vg_assert(VKI_PAGE_SIZE == 4096 || VKI_PAGE_SIZE == 65536); -+ vg_assert(VKI_MAX_PAGE_SIZE == 4096 || VKI_MAX_PAGE_SIZE == 65536); -+ vg_assert(VKI_PAGE_SIZE <= VKI_MAX_PAGE_SIZE); -+ vg_assert(VKI_PAGE_SIZE == (1 << VKI_PAGE_SHIFT)); -+ vg_assert(VKI_MAX_PAGE_SIZE == (1 << VKI_MAX_PAGE_SHIFT)); -+ the_iicii.clstack_top = VG_(am_startup)( the_iicii.sp_at_startup ); -+ VG_(debugLog)(1, "main", "Address space manager is running\n"); -+ -+ //-------------------------------------------------------------- -+ // Start up the dynamic memory manager -+ // p: address space management -+ // p: getting --profile-heap -+ // In fact m_mallocfree is self-initialising, so there's no -+ // initialisation call to do. Instead, try a simple malloc/ -+ // free pair right now to check that nothing is broken. -+ //-------------------------------------------------------------- -+ VG_(debugLog)(1, "main", "Starting the dynamic memory manager\n"); -+ { void* p = VG_(malloc)( "main.vm.1", 12345 ); -+ if (p) VG_(free)( p ); -+ } -+ VG_(debugLog)(1, "main", "Dynamic memory manager is running\n"); -+ -+ //============================================================ -+ // -+ // Dynamic memory management is now available. -+ // -+ //============================================================ -+ -+ //-------------------------------------------------------------- -+ // Initialise m_debuginfo -+ // p: dynamic memory allocation -+ VG_(debugLog)(1, "main", "Initialise m_debuginfo\n"); -+ VG_(di_initialise)(); -+ -+ //-------------------------------------------------------------- -+ // Look for alternative libdir -+ { HChar *cp = VG_(getenv)(VALGRIND_LIB); -+ if (cp != NULL) -+ VG_(libdir) = cp; -+ VG_(debugLog)(1, "main", "VG_(libdir) = %s\n", VG_(libdir)); -+ } -+ -+ //-------------------------------------------------------------- -+ // Extract the launcher name from the environment. -+ VG_(debugLog)(1, "main", "Getting launcher's name ...\n"); -+ VG_(name_of_launcher) = VG_(getenv)(VALGRIND_LAUNCHER); -+ if (VG_(name_of_launcher) == NULL) { -+ VG_(printf)("valgrind: You cannot run '%s' directly.\n", argv[0]); -+ VG_(printf)("valgrind: You should use $prefix/bin/valgrind.\n"); -+ VG_(exit)(1); -+ } -+ VG_(debugLog)(1, "main", "... %s\n", VG_(name_of_launcher)); -+ -+ //-------------------------------------------------------------- -+ // Get the current process datasize rlimit, and set it to zero. -+ // This prevents any internal uses of brk() from having any effect. -+ // We remember the old value so we can restore it on exec, so that -+ // child processes will have a reasonable brk value. -+ VG_(getrlimit)(VKI_RLIMIT_DATA, &VG_(client_rlimit_data)); -+ zero.rlim_max = VG_(client_rlimit_data).rlim_max; -+ VG_(setrlimit)(VKI_RLIMIT_DATA, &zero); -+ -+ // Get the current process stack rlimit. -+ VG_(getrlimit)(VKI_RLIMIT_STACK, &VG_(client_rlimit_stack)); -+ -+ //-------------------------------------------------------------- -+ // Figure out what sort of CPU we're on, and whether it is -+ // able to run V. -+ VG_(debugLog)(1, "main", "Get hardware capabilities ...\n"); -+ { VexArch vex_arch; -+ VexArchInfo vex_archinfo; -+ Bool ok = VG_(machine_get_hwcaps)(); -+ if (!ok) { -+ VG_(printf)("\n"); -+ VG_(printf)("valgrind: fatal error: unsupported CPU.\n"); -+ VG_(printf)(" Supported CPUs are:\n"); -+ VG_(printf)(" * x86 (practically any; Pentium-I or above), " -+ "AMD Athlon or above)\n"); -+ VG_(printf)(" * AMD Athlon64/Opteron\n"); -+ VG_(printf)(" * PowerPC (most; ppc405 and above)\n"); -+ VG_(printf)("\n"); -+ VG_(exit)(1); -+ } -+ VG_(machine_get_VexArchInfo)( &vex_arch, &vex_archinfo ); -+ VG_(debugLog)( -+ 1, "main", "... arch = %s, hwcaps = %s\n", -+ LibVEX_ppVexArch ( vex_arch ), -+ LibVEX_ppVexHwCaps ( vex_arch, vex_archinfo.hwcaps ) -+ ); -+ } -+ -+ //-------------------------------------------------------------- -+ // Record the working directory at startup -+ // p: none (Linux), getenv and sys_getpid work (AIX) -+ VG_(debugLog)(1, "main", "Getting the working directory at startup\n"); -+ { Bool ok = VG_(record_startup_wd)(); -+ if (!ok) -+ VG_(err_config_error)( "Can't establish current working " -+ "directory at startup"); -+ } -+ { Char buf[VKI_PATH_MAX+1]; -+ Bool ok = VG_(get_startup_wd)( buf, sizeof(buf) ); -+ vg_assert(ok); -+ buf[VKI_PATH_MAX] = 0; -+ VG_(debugLog)(1, "main", "... %s\n", buf ); -+ } -+ -+ //============================================================ -+ // Command line argument handling order: -+ // * If --help/--help-debug are present, show usage message -+ // (including the tool-specific usage) -+ // * (If no --tool option given, default to Memcheck) -+ // * Then, if client is missing, abort with error msg -+ // * Then, if any cmdline args are bad, abort with error msg -+ //============================================================ -+ -+ //-------------------------------------------------------------- -+ // Split up argv into: C args, V args, V extra args, and exename. -+ // p: dynamic memory allocation -+ //-------------------------------------------------------------- -+ VG_(debugLog)(1, "main", "Split up command line\n"); -+ VG_(split_up_argv)( argc, argv ); -+ vg_assert( VG_(args_for_valgrind) ); -+ vg_assert( VG_(args_for_client) ); -+ if (0) { -+ for (i = 0; i < VG_(sizeXA)( VG_(args_for_valgrind) ); i++) -+ VG_(printf)( -+ "varg %s\n", -+ * (HChar**) VG_(indexXA)( VG_(args_for_valgrind), i ) -+ ); -+ VG_(printf)(" exe %s\n", VG_(args_the_exename)); -+ for (i = 0; i < VG_(sizeXA)( VG_(args_for_client) ); i++) -+ VG_(printf)( -+ "carg %s\n", -+ * (HChar**) VG_(indexXA)( VG_(args_for_client), i ) -+ ); -+ } -+ -+# if defined(VGO_aix5) -+ /* Tolerate ptraced-based launchers. They can't run 'no program' -+ if the user types "valgrind --help", so they run a do-nothing -+ program $prefix/bin/no_op_client_for_valgrind, and we catch that -+ here and turn it the exe name back into NULL. Then --help, -+ --version etc work as they should. */ -+ if (VG_(args_the_exename) -+ && VG_(strstr)( VG_(args_the_exename), "/no_op_client_for_valgrind" )) { -+ VG_(args_the_exename) = NULL; -+ } -+# endif -+ -+ //-------------------------------------------------------------- -+ // Extract tool name and whether help has been requested. -+ // Note we can't print the help message yet, even if requested, -+ // because the tool has not been initialised. -+ // p: split_up_argv [for VG_(args_for_valgrind)] -+ //-------------------------------------------------------------- -+ VG_(debugLog)(1, "main", -+ "(early_) Process Valgrind's command line options\n"); -+ early_process_cmd_line_options(&need_help, &toolname); -+ -+ // Set default vex control params -+ LibVEX_default_VexControl(& VG_(clo_vex_control)); -+ -+ //-------------------------------------------------------------- -+ // Load client executable, finding in $PATH if necessary -+ // p: early_process_cmd_line_options() [for 'exec', 'need_help', -+ // clo_max_stackframe, -+ // clo_main_stacksize] -+ // p: layout_remaining_space [so there's space] -+ // -+ // Set up client's environment -+ // p: set-libdir [for VG_(libdir)] -+ // p: early_process_cmd_line_options [for toolname] -+ // -+ // Setup client stack, eip, and VG_(client_arg[cv]) -+ // p: load_client() [for 'info'] -+ // p: fix_environment() [for 'env'] -+ // -+ // Setup client data (brk) segment. Initially a 1-page segment -+ // which abuts a shrinkable reservation. -+ // p: load_client() [for 'info' and hence VG_(brk_base)] -+ // -+ // p: _start_in_C (for zeroing out the_iicii and putting some -+ // initial values into it) -+ //-------------------------------------------------------------- -+ if (!need_help) { -+ VG_(debugLog)(1, "main", "Create initial image\n"); -+ -+# if defined(VGO_linux) || defined(VGO_darwin) -+ the_iicii.argv = argv; -+ the_iicii.envp = envp; -+ the_iicii.toolname = toolname; -+# elif defined(VGO_aix5) -+ /* the_iicii.intregs37 already set up */ -+ /* the_iicii.bootblock already set up */ -+ /* the_iicii.adler32_exp already set up */ -+ /* the_iicii.sp_at_startup is irrelevant */ -+ /* the_iicii.clstack_top is irrelevant */ -+ the_iicii.toolname = toolname; -+# else -+# error "Unknown platform" -+# endif -+ -+ /* NOTE: this call reads VG_(clo_main_stacksize). */ -+ the_iifii = VG_(ii_create_image)( the_iicii ); -+ -+# if defined(VGO_aix5) -+ /* Tell aspacem where the initial client stack is, so that it -+ can later produce a faked-up NSegment in response to -+ VG_(am_find_nsegment) for that address range, if asked. */ -+ /* NOTE: this call reads VG_(clo_main_stacksize). */ -+ VG_(am_aix5_set_initial_client_sp)( the_iifii.initial_client_SP ); -+ /* Now have a look at said fake segment, so we can find out -+ the size of it. */ -+ { SizeT sz; -+ NSegment const* seg -+ = VG_(am_find_nsegment)( the_iifii.initial_client_SP ); -+ vg_assert(seg); -+ sz = seg->end - seg->start + 1; -+ vg_assert(sz >= 0 && sz <= (256+1)*1024*1024); /* stay sane */ -+ the_iifii.clstack_max_size = sz; -+ } -+# endif -+ } -+ -+ //============================================================== -+ // -+ // Finished loading/setting up the client address space. -+ // -+ //============================================================== -+ -+ //-------------------------------------------------------------- -+ // setup file descriptors -+ // p: n/a -+ //-------------------------------------------------------------- -+ VG_(debugLog)(1, "main", "Setup file descriptors\n"); -+ setup_file_descriptors(); -+ -+ //-------------------------------------------------------------- -+ // create the fake /proc//cmdline file and then unlink it, -+ // but hold onto the fd, so we can hand it out to the client -+ // when it tries to open /proc//cmdline for itself. -+ // p: setup file descriptors -+ //-------------------------------------------------------------- -+#if !defined(VGO_linux) -+ // client shouldn't be using /proc! -+ VG_(cl_cmdline_fd) = -1; -+#else -+ if (!need_help) { -+ HChar buf[50], buf2[50+64]; -+ HChar nul[1]; -+ Int fd, r; -+ const HChar* exename; -+ -+ VG_(debugLog)(1, "main", "Create fake /proc//cmdline\n"); -+ -+ VG_(sprintf)(buf, "proc_%d_cmdline", VG_(getpid)()); -+ fd = VG_(mkstemp)( buf, buf2 ); -+ if (fd == -1) -+ VG_(err_config_error)("Can't create client cmdline file in /tmp."); -+ -+ nul[0] = 0; -+ exename = VG_(args_the_exename) ? VG_(args_the_exename) -+ : "unknown_exename"; -+ VG_(write)(fd, VG_(args_the_exename), -+ VG_(strlen)( VG_(args_the_exename) )); -+ VG_(write)(fd, nul, 1); -+ -+ for (i = 0; i < VG_(sizeXA)( VG_(args_for_client) ); i++) { -+ HChar* arg = * (HChar**) VG_(indexXA)( VG_(args_for_client), i ); -+ VG_(write)(fd, arg, VG_(strlen)( arg )); -+ VG_(write)(fd, nul, 1); -+ } -+ -+ /* Don't bother to seek the file back to the start; instead do -+ it every time a copy of it is given out (by PRE(sys_open)). -+ That is probably more robust across fork() etc. */ -+ -+ /* Now delete it, but hang on to the fd. */ -+ r = VG_(unlink)( buf2 ); -+ if (r) -+ VG_(err_config_error)("Can't delete client cmdline file in /tmp."); -+ -+ VG_(cl_cmdline_fd) = fd; -+ } -+#endif -+ -+ //-------------------------------------------------------------- -+ // Init tool part 1: pre_clo_init -+ // p: setup_client_stack() [for 'VG_(client_arg[cv]'] -+ // p: setup_file_descriptors() [for 'VG_(fd_xxx_limit)'] -+ //-------------------------------------------------------------- -+ VG_(debugLog)(1, "main", "Initialise the tool part 1 (pre_clo_init)\n"); -+ VG_(tl_pre_clo_init)(); -+ -+ //-------------------------------------------------------------- -+ // If --tool and --help/--help-debug was given, now give the core+tool -+ // help message -+ // p: early_process_cmd_line_options() [for 'need_help'] -+ // p: tl_pre_clo_init [for 'VG_(tdict).usage'] -+ //-------------------------------------------------------------- -+ VG_(debugLog)(1, "main", "Print help and quit, if requested\n"); -+ if (need_help) { -+ usage_NORETURN(/*--help-debug?*/need_help >= 2); -+ } -+ -+ //-------------------------------------------------------------- -+ // Process command line options to Valgrind + tool -+ // p: setup_client_stack() [for 'VG_(client_arg[cv]'] -+ // p: setup_file_descriptors() [for 'VG_(fd_xxx_limit)'] -+ //-------------------------------------------------------------- -+ VG_(debugLog)(1, "main", -+ "(main_) Process Valgrind's command line options, " -+ "setup logging\n"); -+ main_process_cmd_line_options ( &logging_to_fd, &xml_fname_unexpanded, -+ toolname ); -+ -+ //-------------------------------------------------------------- -+ // Zeroise the millisecond counter by doing a first read of it. -+ // p: none -+ //-------------------------------------------------------------- -+ (void) VG_(read_millisecond_timer)(); -+ -+ //-------------------------------------------------------------- -+ // Print the preamble -+ // p: tl_pre_clo_init [for 'VG_(details).name' and friends] -+ // p: main_process_cmd_line_options() -+ // [for VG_(clo_verbosity), VG_(clo_xml), -+ // logging_to_fd, xml_fname_unexpanded] -+ //-------------------------------------------------------------- -+ VG_(debugLog)(1, "main", "Print the preamble...\n"); -+ print_preamble(logging_to_fd, xml_fname_unexpanded, toolname); -+ VG_(debugLog)(1, "main", "...finished the preamble\n"); -+ -+ //-------------------------------------------------------------- -+ // Init tool part 2: post_clo_init -+ // p: setup_client_stack() [for 'VG_(client_arg[cv]'] -+ // p: setup_file_descriptors() [for 'VG_(fd_xxx_limit)'] -+ // p: print_preamble() [so any warnings printed in post_clo_init -+ // are shown after the preamble] -+ //-------------------------------------------------------------- -+ VG_(debugLog)(1, "main", "Initialise the tool part 2 (post_clo_init)\n"); -+ VG_TDICT_CALL(tool_post_clo_init); -+ { -+ /* The tool's "needs" will by now be finalised, since it has no -+ further opportunity to specify them. So now sanity check -+ them. */ -+ Char* s; -+ Bool ok; -+ ok = VG_(sanity_check_needs)( &s ); -+ if (!ok) { -+ VG_(tool_panic)(s); -+ } -+ } -+ -+ //-------------------------------------------------------------- -+ // Initialise translation table and translation cache -+ // p: aspacem [??] -+ // p: tl_pre_clo_init [for 'VG_(details).avg_translation_sizeB'] -+ //-------------------------------------------------------------- -+ VG_(debugLog)(1, "main", "Initialise TT/TC\n"); -+ VG_(init_tt_tc)(); -+ -+ //-------------------------------------------------------------- -+ // Initialise the redirect table. -+ // p: init_tt_tc [so it can call VG_(search_transtab) safely] -+ // p: aspacem [so can change ownership of sysinfo pages] -+ //-------------------------------------------------------------- -+ VG_(debugLog)(1, "main", "Initialise redirects\n"); -+ VG_(redir_initialise)(); -+ -+ //-------------------------------------------------------------- -+ // Allow GDB attach -+ // p: main_process_cmd_line_options() [for VG_(clo_wait_for_gdb)] -+ //-------------------------------------------------------------- -+ /* Hook to delay things long enough so we can get the pid and -+ attach GDB in another shell. */ -+ if (VG_(clo_wait_for_gdb)) { -+ Long iters; -+ volatile Long q; -+ VG_(debugLog)(1, "main", "Wait for GDB\n"); -+ VG_(printf)("pid=%d, entering delay loop\n", VG_(getpid)()); -+ -+# if defined(VGP_x86_linux) -+ iters = 5; -+# elif defined(VGP_amd64_linux) || defined(VGP_ppc64_linux) -+ iters = 10; -+# elif defined(VGP_ppc32_linux) -+ iters = 5; -+# elif defined(VGP_arm_linux) -+ iters = 1; -+# elif defined(VGP_ppc32_aix5) || defined(VGP_ppc64_aix5) -+ iters = 4; -+# elif defined(VGO_darwin) -+ iters = 3; -+# else -+# error "Unknown plat" -+# endif -+ -+ iters *= 1000*1000*1000; -+ for (q = 0; q < iters; q++) -+ ; -+ } -+ -+ //-------------------------------------------------------------- -+ // Search for file descriptors that are inherited from our parent -+ // p: main_process_cmd_line_options [for VG_(clo_track_fds)] -+ //-------------------------------------------------------------- -+ if (VG_(clo_track_fds)) { -+ VG_(debugLog)(1, "main", "Init preopened fds\n"); -+ VG_(init_preopened_fds)(); -+ } -+ -+ //-------------------------------------------------------------- -+ // Load debug info for the existing segments. -+ // p: setup_code_redirect_table [so that redirs can be recorded] -+ // p: mallocfree -+ // p: probably: setup fds and process CLOs, so that logging works -+ // p: initialise m_debuginfo -+ // -+ // While doing this, make a note of the debuginfo-handles that -+ // come back from VG_(di_notify_mmap)/VG_(di_aix5_notify_segchange). -+ // Later, in "Tell the tool about the initial client memory permissions" -+ // (just below) we can then hand these handles off to the tool in -+ // calls to VG_TRACK(new_mem_startup, ...). This gives the tool the -+ // opportunity to make further queries to m_debuginfo before the -+ // client is started, if it wants. We put this information into an -+ // XArray, each handle along with the associated segment start address, -+ // and search the XArray for the handles later, when calling -+ // VG_TRACK(new_mem_startup, ...). -+ //-------------------------------------------------------------- -+ VG_(debugLog)(1, "main", "Load initial debug info\n"); -+ -+ tl_assert(!addr2dihandle); -+ addr2dihandle = VG_(newXA)( VG_(malloc), "main.vm.2", -+ VG_(free), sizeof(Addr_n_ULong) ); -+ tl_assert(addr2dihandle); -+ -+# if defined(VGO_linux) -+ { Addr* seg_starts; -+ Int n_seg_starts; -+ Addr_n_ULong anu; -+ -+ seg_starts = VG_(get_segment_starts)( &n_seg_starts ); -+ vg_assert(seg_starts && n_seg_starts >= 0); -+ -+ /* show them all to the debug info reader. allow_SkFileV has to -+ be True here so that we read info from the valgrind executable -+ itself. */ -+ for (i = 0; i < n_seg_starts; i++) { -+ anu.ull = VG_(di_notify_mmap)( seg_starts[i], True/*allow_SkFileV*/ ); -+ /* anu.ull holds the debuginfo handle returned by di_notify_mmap, -+ if any. */ -+ if (anu.ull > 0) { -+ anu.a = seg_starts[i]; -+ VG_(addToXA)( addr2dihandle, &anu ); -+ } -+ } -+ -+ VG_(free)( seg_starts ); -+ } -+# elif defined(VGO_aix5) -+ { AixCodeSegChange* changes; -+ Int changes_size, changes_used; -+ Addr_n_ULong anu; -+ -+ /* Find out how many AixCodeSegChange records we will need, -+ and acquire them. */ -+ changes_size = VG_(am_aix5_reread_procmap_howmany_directives)(); -+ changes = VG_(malloc)("main.vm.3", changes_size * sizeof(AixCodeSegChange)); -+ vg_assert(changes); -+ -+ /* Now re-read /proc//map and acquire a change set */ -+ VG_(am_aix5_reread_procmap)( changes, &changes_used ); -+ vg_assert(changes_used >= 0 && changes_used <= changes_size); -+ -+ /* And notify m_debuginfo of the changes. */ -+ for (i = 0; i < changes_used; i++) { -+ anu.ull = VG_(di_aix5_notify_segchange)( -+ changes[i].code_start, -+ changes[i].code_len, -+ changes[i].data_start, -+ changes[i].data_len, -+ changes[i].file_name, -+ changes[i].mem_name, -+ changes[i].is_mainexe, -+ changes[i].acquire -+ ); -+ if (anu.ull > 0) { -+ tl_assert(changes[i].acquire); -+ anu.a = changes[i].code_start; /* is this correct? */ -+ VG_(addToXA)( addr2dihandle, &anu ); -+ } -+ } -+ -+ VG_(free)(changes); -+ } -+# elif defined(VGO_darwin) -+ { Addr* seg_starts; -+ Int n_seg_starts; -+ seg_starts = VG_(get_segment_starts)( &n_seg_starts ); -+ vg_assert(seg_starts && n_seg_starts >= 0); -+ -+ /* show them all to the debug info reader. -+ Don't read from V segments (unlike Linux) */ -+ // GrP fixme really? -+ for (i = 0; i < n_seg_starts; i++) -+ VG_(di_notify_mmap)( seg_starts[i], False/*don't allow_SkFileV*/ ); -+ -+ VG_(free)( seg_starts ); -+ } -+# else -+# error Unknown OS -+# endif -+ -+ //-------------------------------------------------------------- -+ // Tell aspacem of ownership change of the asm helpers, so that -+ // m_translate allows them to be translated. However, only do this -+ // after the initial debug info read, since making a hole in the -+ // address range for the stage2 binary confuses the debug info reader. -+ // p: aspacem -+ //-------------------------------------------------------------- -+ { Bool change_ownership_v_c_OK; -+ Addr co_start = VG_PGROUNDDN( (Addr)&VG_(trampoline_stuff_start) ); -+ Addr co_endPlus = VG_PGROUNDUP( (Addr)&VG_(trampoline_stuff_end) ); -+ VG_(debugLog)(1,"redir", -+ "transfer ownership V -> C of 0x%llx .. 0x%llx\n", -+ (ULong)co_start, (ULong)co_endPlus-1 ); -+ -+ change_ownership_v_c_OK -+ = VG_(am_change_ownership_v_to_c)( co_start, co_endPlus - co_start ); -+ vg_assert(change_ownership_v_c_OK); -+ } -+ -+ //-------------------------------------------------------------- -+ // Initialise the scheduler (phase 1) [generates tid_main] -+ // p: none, afaics -+ //-------------------------------------------------------------- -+ VG_(debugLog)(1, "main", "Initialise scheduler (phase 1)\n"); -+ tid_main = VG_(scheduler_init_phase1)(); -+ vg_assert(tid_main >= 0 && tid_main < VG_N_THREADS -+ && tid_main != VG_INVALID_THREADID); -+ /* Tell the tool about tid_main */ -+ VG_TRACK( pre_thread_ll_create, VG_INVALID_THREADID, tid_main ); -+ -+ //-------------------------------------------------------------- -+ // Tell the tool about the initial client memory permissions -+ // p: aspacem -+ // p: mallocfree -+ // p: setup_client_stack -+ // p: setup_client_dataseg -+ // -+ // For each segment we tell the client about, look up in -+ // addr2dihandle as created above, to see if there's a debuginfo -+ // handle associated with the segment, that we can hand along -+ // to the tool, to be helpful. -+ //-------------------------------------------------------------- -+ VG_(debugLog)(1, "main", "Tell tool about initial permissions\n"); -+ { Addr* seg_starts; -+ Int n_seg_starts; -+ -+ tl_assert(addr2dihandle); -+ -+ /* Mark the main thread as running while we tell the tool about -+ the client memory so that the tool can associate that memory -+ with the main thread. */ -+ tl_assert(VG_(running_tid) == VG_INVALID_THREADID); -+ VG_(running_tid) = tid_main; -+ -+ seg_starts = VG_(get_segment_starts)( &n_seg_starts ); -+ vg_assert(seg_starts && n_seg_starts >= 0); -+ -+ /* show interesting ones to the tool */ -+ for (i = 0; i < n_seg_starts; i++) { -+ Word j, n; -+ NSegment const* seg -+ = VG_(am_find_nsegment)( seg_starts[i] ); -+ vg_assert(seg); -+ if (seg->kind == SkFileC || seg->kind == SkAnonC) { -+ /* This next assertion is tricky. If it is placed -+ immediately before this 'if', it very occasionally fails. -+ Why? Because previous iterations of the loop may have -+ caused tools (via the new_mem_startup calls) to do -+ dynamic memory allocation, and that may affect the mapped -+ segments; in particular it may cause segment merging to -+ happen. Hence we cannot assume that seg_starts[i], which -+ reflects the state of the world before we started this -+ loop, is the same as seg->start, as the latter reflects -+ the state of the world (viz, mappings) at this particular -+ iteration of the loop. -+ -+ Why does moving it inside the 'if' make it safe? Because -+ any dynamic memory allocation done by the tools will -+ affect only the state of Valgrind-owned segments, not of -+ Client-owned segments. And the 'if' guards against that -+ -- we only get in here for Client-owned segments. -+ -+ In other words: the loop may change the state of -+ Valgrind-owned segments as it proceeds. But it should -+ not cause the Client-owned segments to change. */ -+ vg_assert(seg->start == seg_starts[i]); -+ VG_(debugLog)(2, "main", -+ "tell tool about %010lx-%010lx %c%c%c\n", -+ seg->start, seg->end, -+ seg->hasR ? 'r' : '-', -+ seg->hasW ? 'w' : '-', -+ seg->hasX ? 'x' : '-' ); -+ /* search addr2dihandle to see if we have an entry -+ matching seg->start. */ -+ n = VG_(sizeXA)( addr2dihandle ); -+ for (j = 0; j < n; j++) { -+ Addr_n_ULong* anl = VG_(indexXA)( addr2dihandle, j ); -+ if (anl->a == seg->start) { -+ tl_assert(anl->ull > 0); /* check it's a valid handle */ -+ break; -+ } -+ } -+ vg_assert(j >= 0 && j <= n); -+ VG_TRACK( new_mem_startup, seg->start, seg->end+1-seg->start, -+ seg->hasR, seg->hasW, seg->hasX, -+ /* and the retrieved debuginfo handle, if any */ -+ j < n -+ ? ((Addr_n_ULong*)VG_(indexXA)( addr2dihandle, j ))->ull -+ : 0 ); -+ } -+ } -+ -+ VG_(free)( seg_starts ); -+ VG_(deleteXA)( addr2dihandle ); -+ -+ /* Also do the initial stack permissions. */ -+ { -+ SSizeT inaccessible_len; -+ NSegment const* seg -+ = VG_(am_find_nsegment)( the_iifii.initial_client_SP ); -+ vg_assert(seg); -+ vg_assert(seg->kind == SkAnonC); -+ vg_assert(the_iifii.initial_client_SP >= seg->start); -+ vg_assert(the_iifii.initial_client_SP <= seg->end); -+# if defined(VGO_aix5) -+ VG_(clstk_base) = seg->start; -+ VG_(clstk_end) = seg->end; -+# endif -+ -+ /* Stuff below the initial SP is unaddressable. Take into -+ account any ABI-mandated space below the stack pointer that -+ is required (VG_STACK_REDZONE_SZB). setup_client_stack() -+ will have allocated an extra page if a red zone is required, -+ to be on the safe side. */ -+ inaccessible_len = the_iifii.initial_client_SP - VG_STACK_REDZONE_SZB -+ - seg->start; -+ vg_assert(inaccessible_len >= 0); -+ if (inaccessible_len > 0) -+ VG_TRACK( die_mem_stack, -+ seg->start, -+ inaccessible_len ); -+ VG_(debugLog)(2, "main", "mark stack inaccessible %010lx-%010lx\n", -+ seg->start, -+ the_iifii.initial_client_SP-1 - VG_STACK_REDZONE_SZB); -+ } -+ -+ /* Also the assembly helpers. */ -+ VG_TRACK( new_mem_startup, -+ (Addr)&VG_(trampoline_stuff_start), -+ (Addr)&VG_(trampoline_stuff_end) -+ - (Addr)&VG_(trampoline_stuff_start), -+ False, /* readable? */ -+ False, /* writable? */ -+ True /* executable? */, -+ 0 /* di_handle: no associated debug info */ ); -+ -+ /* Clear the running thread indicator */ -+ VG_(running_tid) = VG_INVALID_THREADID; -+ tl_assert(VG_(running_tid) == VG_INVALID_THREADID); -+ } -+ -+ //-------------------------------------------------------------- -+ // Initialise the scheduler (phase 2) -+ // p: Initialise the scheduler (phase 1) [for tid_main] -+ // p: setup_file_descriptors() [else VG_(safe_fd)() breaks] -+ // p: setup_client_stack -+ //-------------------------------------------------------------- -+ VG_(debugLog)(1, "main", "Initialise scheduler (phase 2)\n"); -+ { NSegment const* seg -+ = VG_(am_find_nsegment)( the_iifii.initial_client_SP ); -+ vg_assert(seg); -+ vg_assert(seg->kind == SkAnonC); -+ vg_assert(the_iifii.initial_client_SP >= seg->start); -+ vg_assert(the_iifii.initial_client_SP <= seg->end); -+ VG_(scheduler_init_phase2)( tid_main, -+ seg->end, the_iifii.clstack_max_size ); -+ } -+ -+ //-------------------------------------------------------------- -+ // Set up state for the root thread -+ // p: ? -+ // setup_scheduler() [for sched-specific thread 1 stuff] -+ // VG_(ii_create_image) [for 'the_iicii' initial info] -+ //-------------------------------------------------------------- -+ VG_(debugLog)(1, "main", "Finalise initial image\n"); -+ VG_(ii_finalise_image)( the_iifii ); -+ -+ //-------------------------------------------------------------- -+ // Initialise the signal handling subsystem -+ // p: n/a -+ //-------------------------------------------------------------- -+ // Nb: temporarily parks the saved blocking-mask in saved_sigmask. -+ VG_(debugLog)(1, "main", "Initialise signal management\n"); -+ /* Check that the kernel-interface signal definitions look sane */ -+ VG_(vki_do_initial_consistency_checks)(); -+ /* .. and go on to use them. */ -+ VG_(sigstartup_actions)(); -+ -+ //-------------------------------------------------------------- -+ // Read suppression file -+ // p: main_process_cmd_line_options() [for VG_(clo_suppressions)] -+ //-------------------------------------------------------------- -+ if (VG_(needs).core_errors || VG_(needs).tool_errors) { -+ VG_(debugLog)(1, "main", "Load suppressions\n"); -+ VG_(load_suppressions)(); -+ } -+ -+ //-------------------------------------------------------------- -+ // register client stack -+ //-------------------------------------------------------------- -+ VG_(clstk_id) = VG_(register_stack)(VG_(clstk_base), VG_(clstk_end)); -+ -+ //-------------------------------------------------------------- -+ // Show the address space state so far -+ //-------------------------------------------------------------- -+ VG_(debugLog)(1, "main", "\n"); -+ VG_(debugLog)(1, "main", "\n"); -+ VG_(am_show_nsegments)(1,"Memory layout at client startup"); -+ VG_(debugLog)(1, "main", "\n"); -+ VG_(debugLog)(1, "main", "\n"); -+ -+ //-------------------------------------------------------------- -+ // Run! -+ //-------------------------------------------------------------- -+ if (VG_(clo_xml)) { -+ HChar buf[50]; -+ VG_(elapsed_wallclock_time)(buf); -+ VG_(printf_xml_no_f_c)( "\n" -+ " RUNNING\n" -+ " \n" -+ "\n", -+ buf ); -+ VG_(printf_xml_no_f_c)( "\n" ); -+ } -+ -+ VG_(debugLog)(1, "main", "Running thread 1\n"); -+ -+ /* As a result of the following call, the last thread standing -+ eventually winds up running shutdown_actions_NORETURN -+ just below. Unfortunately, simply exporting said function -+ causes m_main to be part of a module cycle, which is pretty -+ nonsensical. So instead of doing that, the address of said -+ function is stored in a global variable 'owned' by m_syswrap, -+ and it uses that function pointer to get back here when it needs -+ to. */ -+ -+ /* Set continuation address. */ -+ VG_(address_of_m_main_shutdown_actions_NORETURN) -+ = & shutdown_actions_NORETURN; -+ -+ /* Run the first thread, eventually ending up at the continuation -+ address. */ -+ VG_(main_thread_wrapper_NORETURN)(1); -+ -+ /*NOTREACHED*/ -+ vg_assert(0); -+} -+ -+/* Do everything which needs doing when the last thread exits or when -+ a thread exits requesting a complete process exit (exit on AIX). -+ -+ We enter here holding The Lock. For the case VgSrc_ExitProcess we -+ must never release it, because to do so would allow other threads -+ to continue after the system is ostensibly shut down. So we must -+ go to our grave, so to speak, holding the lock. -+ -+ In fact, there is never any point in releasing the lock at this -+ point - we have it, we're shutting down the entire system, and -+ for the case VgSrc_ExitProcess doing so positively causes trouble. -+ So don't. -+ -+ The final_tidyup call makes a bit of a nonsense of the ExitProcess -+ case, since it will run the libc_freeres function, thus allowing -+ other lurking threads to run again. Hmm. */ -+ -+static -+void shutdown_actions_NORETURN( ThreadId tid, -+ VgSchedReturnCode tids_schedretcode ) -+{ -+ VG_(debugLog)(1, "main", "entering VG_(shutdown_actions_NORETURN)\n"); -+ VG_(am_show_nsegments)(1,"Memory layout at client shutdown"); -+ -+ vg_assert(VG_(is_running_thread)(tid)); -+ -+ vg_assert(tids_schedretcode == VgSrc_ExitThread -+ || tids_schedretcode == VgSrc_ExitProcess -+ || tids_schedretcode == VgSrc_FatalSig ); -+ -+ if (tids_schedretcode == VgSrc_ExitThread) { -+ -+ // We are the last surviving thread. Right? -+ vg_assert( VG_(count_living_threads)() == 1 ); -+ -+ // Wait for all other threads to exit. -+ // jrs: Huh? but they surely are already gone -+ VG_(reap_threads)(tid); -+ -+ // Clean the client up before the final report -+ // this causes the libc_freeres function to run -+ final_tidyup(tid); -+ -+ /* be paranoid */ -+ vg_assert(VG_(is_running_thread)(tid)); -+ vg_assert(VG_(count_living_threads)() == 1); -+ -+ } else { -+ -+ // We may not be the last surviving thread. However, we -+ // want to shut down the entire process. We hold the lock -+ // and we need to keep hold of it all the way out, in order -+ // that none of the other threads ever run again. -+ vg_assert( VG_(count_living_threads)() >= 1 ); -+ -+ // Clean the client up before the final report -+ // this causes the libc_freeres function to run -+ // perhaps this is unsafe, as per comment above -+ final_tidyup(tid); -+ -+ /* be paranoid */ -+ vg_assert(VG_(is_running_thread)(tid)); -+ vg_assert(VG_(count_living_threads)() >= 1); -+ } -+ -+ VG_(threads)[tid].status = VgTs_Empty; -+ //-------------------------------------------------------------- -+ // Finalisation: cleanup, messages, etc. Order not so important, only -+ // affects what order the messages come. -+ //-------------------------------------------------------------- -+ // First thing in the post-amble is a blank line. -+ if (VG_(clo_xml)) -+ VG_(printf_xml)("\n"); -+ else if (VG_(clo_verbosity) > 0) -+ VG_(message)(Vg_UserMsg, "\n"); -+ -+ if (VG_(clo_xml)) { -+ HChar buf[50]; -+ VG_(elapsed_wallclock_time)(buf); -+ VG_(printf_xml_no_f_c)( "\n" -+ " FINISHED\n" -+ " \n" -+ "\n" -+ "\n", -+ buf); -+ } -+ -+ /* Print out file descriptor summary and stats. */ -+ if (VG_(clo_track_fds)) -+ VG_(show_open_fds)(); -+ -+ /* Call the tool's finalisation function. This makes Memcheck's -+ leak checker run, and possibly chuck a bunch of leak errors into -+ the error management machinery. */ -+ VG_TDICT_CALL(tool_fini, 0/*exitcode*/); -+ -+ /* Show the error counts. */ -+ if (VG_(clo_xml) -+ && (VG_(needs).core_errors || VG_(needs).tool_errors)) { -+ VG_(show_error_counts_as_XML)(); -+ } -+ -+ /* In XML mode, this merely prints the used suppressions. */ -+ if (VG_(needs).core_errors || VG_(needs).tool_errors) -+ VG_(show_all_errors)(); -+ -+ if (VG_(clo_xml)) { -+ VG_(printf_xml)("\n"); -+ VG_(printf_xml)("\n"); -+ VG_(printf_xml)("\n"); -+ } -+ -+ VG_(sanity_check_general)( True /*include expensive checks*/ ); -+ -+ if (VG_(clo_stats)) -+ print_all_stats(); -+ -+ /* Show a profile of the heap(s) at shutdown. Optionally, first -+ throw away all the debug info, as that makes it easy to spot -+ leaks in the debuginfo reader. */ -+ if (VG_(clo_profile_heap)) { -+ if (0) VG_(di_discard_ALL_debuginfo)(); -+ VG_(print_arena_cc_analysis)(); -+ } -+ -+ if (VG_(clo_profile_flags) > 0) { -+ #define N_MAX 200 -+ BBProfEntry tops[N_MAX]; -+ ULong score_total = VG_(get_BB_profile) (tops, N_MAX); -+ show_BB_profile(tops, N_MAX, score_total); -+ } -+ -+ /* Print Vex storage stats */ -+ if (0) -+ LibVEX_ShowAllocStats(); -+ -+ /* Flush any output cached by previous calls to VG_(message). */ -+ VG_(message_flush)(); -+ -+ /* Ok, finally exit in the os-specific way, according to the scheduler's -+ return code. In short, if the (last) thread exited by calling -+ sys_exit, do likewise; if the (last) thread stopped due to a fatal -+ signal, terminate the entire system with that same fatal signal. */ -+ VG_(debugLog)(1, "core_os", -+ "VG_(terminate_NORETURN)(tid=%lld)\n", (ULong)tid); -+ -+ switch (tids_schedretcode) { -+ case VgSrc_ExitThread: /* the normal way out (Linux) */ -+ case VgSrc_ExitProcess: /* the normal way out (AIX) */ -+ /* Change the application return code to user's return code, -+ if an error was found */ -+ if (VG_(clo_error_exitcode) > 0 -+ && VG_(get_n_errs_found)() > 0) { -+ VG_(exit)( VG_(clo_error_exitcode) ); -+ } else { -+ /* otherwise, return the client's exit code, in the normal -+ way. */ -+ VG_(exit)( VG_(threads)[tid].os_state.exitcode ); -+ } -+ /* NOT ALIVE HERE! */ -+ VG_(core_panic)("entered the afterlife in main() -- ExitT/P"); -+ break; /* what the hell :) */ -+ -+ case VgSrc_FatalSig: -+ /* We were killed by a fatal signal, so replicate the effect */ -+ vg_assert(VG_(threads)[tid].os_state.fatalsig != 0); -+ VG_(kill_self)(VG_(threads)[tid].os_state.fatalsig); -+ /* we shouldn't be alive at this point. But VG_(kill_self) -+ sometimes fails with EPERM on Darwin, for unclear reasons. */ -+# if defined(VGO_darwin) -+ VG_(debugLog)(0, "main", "VG_(kill_self) failed. Exiting normally.\n"); -+ VG_(exit)(0); /* bogus, but we really need to exit now */ -+ /* fall through .. */ -+# endif -+ VG_(core_panic)("main(): signal was supposed to be fatal"); -+ break; -+ -+ default: -+ VG_(core_panic)("main(): unexpected scheduler return code"); -+ } -+} -+ -+/* -------------------- */ -+ -+/* Final clean-up before terminating the process. -+ Clean up the client by calling __libc_freeres() (if requested) -+ This is Linux-specific? -+ GrP fixme glibc-specific, anyway -+*/ -+static void final_tidyup(ThreadId tid) -+{ -+#if !defined(VGO_darwin) -+# if defined(VGP_ppc64_linux) -+ Addr r2; -+# endif -+ Addr __libc_freeres_wrapper = VG_(client___libc_freeres_wrapper); -+ -+ vg_assert(VG_(is_running_thread)(tid)); -+ -+ if ( !VG_(needs).libc_freeres || -+ !VG_(clo_run_libc_freeres) || -+ 0 == __libc_freeres_wrapper ) -+ return; /* can't/won't do it */ -+# if defined(VGO_aix5) -+ return; /* inapplicable on non-Linux platforms */ -+# endif -+ -+# if defined(VGP_ppc64_linux) -+ r2 = VG_(get_tocptr)( __libc_freeres_wrapper ); -+ if (r2 == 0) { -+ VG_(message)(Vg_UserMsg, -+ "Caught __NR_exit, but can't run __libc_freeres()\n"); -+ VG_(message)(Vg_UserMsg, -+ " since cannot establish TOC pointer for it.\n"); -+ return; -+ } -+# endif -+ -+ if (VG_(clo_verbosity) > 2 || -+ VG_(clo_trace_syscalls) || -+ VG_(clo_trace_sched)) -+ VG_(message)(Vg_DebugMsg, -+ "Caught __NR_exit; running __libc_freeres()\n"); -+ -+ /* set thread context to point to libc_freeres_wrapper */ -+ /* ppc64-linux note: __libc_freeres_wrapper gives us the real -+ function entry point, not a fn descriptor, so can use it -+ directly. However, we need to set R2 (the toc pointer) -+ appropriately. */ -+ VG_(set_IP)(tid, __libc_freeres_wrapper); -+# if defined(VGP_ppc64_linux) -+ VG_(threads)[tid].arch.vex.guest_GPR2 = r2; -+# endif -+ -+ /* Block all blockable signals by copying the real block state into -+ the thread's block state*/ -+ VG_(sigprocmask)(VKI_SIG_BLOCK, NULL, &VG_(threads)[tid].sig_mask); -+ VG_(threads)[tid].tmp_sig_mask = VG_(threads)[tid].sig_mask; -+ -+ /* and restore handlers to default */ -+ VG_(set_default_handler)(VKI_SIGSEGV); -+ VG_(set_default_handler)(VKI_SIGBUS); -+ VG_(set_default_handler)(VKI_SIGILL); -+ VG_(set_default_handler)(VKI_SIGFPE); -+ -+ // We were exiting, so assert that... -+ vg_assert(VG_(is_exiting)(tid)); -+ // ...but now we're not again -+ VG_(threads)[tid].exitreason = VgSrc_None; -+ -+ // run until client thread exits - ideally with LIBC_FREERES_DONE, -+ // but exit/exitgroup/signal will do -+ VG_(scheduler)(tid); -+ -+ vg_assert(VG_(is_exiting)(tid)); -+#endif -+} -+ -+ -+/*====================================================================*/ -+/*=== Getting to main() alive: LINUX ===*/ -+/*====================================================================*/ -+ -+#if defined(VGO_linux) -+ -+/* If linking of the final executables is done with glibc present, -+ then Valgrind starts at main() above as usual, and all of the -+ following code is irrelevant. -+ -+ However, this is not the intended mode of use. The plan is to -+ avoid linking against glibc, by giving gcc the flags -+ -nodefaultlibs -lgcc -nostartfiles at startup. -+ -+ From this derive two requirements: -+ -+ 1. gcc may emit calls to memcpy and memset to deal with structure -+ assignments etc. Since we have chosen to ignore all the -+ "normal" supporting libraries, we have to provide our own -+ implementations of them. No problem. -+ -+ 2. We have to provide a symbol "_start", to which the kernel -+ hands control at startup. Hence the code below. -+*/ -+ -+/* ---------------- Requirement 1 ---------------- */ -+ -+void* memcpy(void *dest, const void *src, SizeT n); -+void* memcpy(void *dest, const void *src, SizeT n) { -+ return VG_(memcpy)(dest,src,n); -+} -+void* memset(void *s, int c, SizeT n); -+void* memset(void *s, int c, SizeT n) { -+ return VG_(memset)(s,c,n); -+} -+ -+/* BVA: abort() for those platforms that need it (PPC and ARM). */ -+void abort(void); -+void abort(void){ -+ VG_(printf)("Something called raise().\n"); -+ vg_assert(0); -+} -+ -+/* EAZG: ARM's EABI will call floating point exception handlers in -+ libgcc which boil down to an abort or raise, that's usually defined -+ in libc. Instead, define them here. */ -+#if defined(VGP_arm_linux) -+void raise(void); -+void raise(void){ -+ VG_(printf)("Something called raise().\n"); -+ vg_assert(0); -+} -+ -+void __aeabi_unwind_cpp_pr0(void); -+void __aeabi_unwind_cpp_pr0(void){ -+ VG_(printf)("Something called __aeabi_unwind_cpp_pr0()\n"); -+ vg_assert(0); -+} -+ -+void __aeabi_unwind_cpp_pr1(void); -+void __aeabi_unwind_cpp_pr1(void){ -+ VG_(printf)("Something called __aeabi_unwind_cpp_pr1()\n"); -+ vg_assert(0); -+} -+#endif -+ -+/* ---------------- Requirement 2 ---------------- */ -+ -+/* Glibc's sysdeps/i386/elf/start.S has the following gem of a -+ comment, which explains how the stack looks right at process start -+ (when _start is jumped to). Hence _start passes %esp to -+ _start_in_C_linux, which extracts argc/argv/envp and starts up -+ correctly. */ -+ -+/* This is the canonical entry point, usually the first thing in the text -+ segment. The SVR4/i386 ABI (pages 3-31, 3-32) says that when the entry -+ point runs, most registers' values are unspecified, except for: -+ -+ %edx Contains a function pointer to be registered with `atexit'. -+ This is how the dynamic linker arranges to have DT_FINI -+ functions called for shared libraries that have been loaded -+ before this code runs. -+ -+ %esp The stack contains the arguments and environment: -+ 0(%esp) argc -+ 4(%esp) argv[0] -+ ... -+ (4*argc)(%esp) NULL -+ (4*(argc+1))(%esp) envp[0] -+ ... -+ NULL -+*/ -+ -+/* The kernel hands control to _start, which extracts the initial -+ stack pointer and calls onwards to _start_in_C_linux. This also switches -+ the new stack. */ -+#if defined(VGP_x86_linux) -+asm("\n" -+ ".text\n" -+ "\t.globl _start\n" -+ "\t.type _start,@function\n" -+ "_start:\n" -+ /* set up the new stack in %eax */ -+ "\tmovl $vgPlain_interim_stack, %eax\n" -+ "\taddl $"VG_STRINGIFY(VG_STACK_GUARD_SZB)", %eax\n" -+ "\taddl $"VG_STRINGIFY(VG_STACK_ACTIVE_SZB)", %eax\n" -+ "\tsubl $16, %eax\n" -+ "\tandl $~15, %eax\n" -+ /* install it, and collect the original one */ -+ "\txchgl %eax, %esp\n" -+ /* call _start_in_C_linux, passing it the startup %esp */ -+ "\tpushl %eax\n" -+ "\tcall _start_in_C_linux\n" -+ "\thlt\n" -+ ".previous\n" -+); -+#elif defined(VGP_amd64_linux) -+asm("\n" -+ ".text\n" -+ "\t.globl _start\n" -+ "\t.type _start,@function\n" -+ "_start:\n" -+ /* set up the new stack in %rdi */ -+ "\tmovq $vgPlain_interim_stack, %rdi\n" -+ "\taddq $"VG_STRINGIFY(VG_STACK_GUARD_SZB)", %rdi\n" -+ "\taddq $"VG_STRINGIFY(VG_STACK_ACTIVE_SZB)", %rdi\n" -+ "\tandq $~15, %rdi\n" -+ /* install it, and collect the original one */ -+ "\txchgq %rdi, %rsp\n" -+ /* call _start_in_C_linux, passing it the startup %rsp */ -+ "\tcall _start_in_C_linux\n" -+ "\thlt\n" -+ ".previous\n" -+); -+#elif defined(VGP_ppc32_linux) -+asm("\n" -+ ".text\n" -+ "\t.globl _start\n" -+ "\t.type _start,@function\n" -+ "_start:\n" -+ /* set up the new stack in r16 */ -+ "\tlis 16,vgPlain_interim_stack@ha\n" -+ "\tla 16,vgPlain_interim_stack@l(16)\n" -+ "\tlis 17,("VG_STRINGIFY(VG_STACK_GUARD_SZB)" >> 16)\n" -+ "\tori 17,17,("VG_STRINGIFY(VG_STACK_GUARD_SZB)" & 0xFFFF)\n" -+ "\tlis 18,("VG_STRINGIFY(VG_STACK_ACTIVE_SZB)" >> 16)\n" -+ "\tori 18,18,("VG_STRINGIFY(VG_STACK_ACTIVE_SZB)" & 0xFFFF)\n" -+ "\tadd 16,17,16\n" -+ "\tadd 16,18,16\n" -+ "\trlwinm 16,16,0,0,27\n" -+ /* now r16 = &vgPlain_interim_stack + VG_STACK_GUARD_SZB + -+ VG_STACK_ACTIVE_SZB rounded down to the nearest 16-byte -+ boundary. And r1 is the original SP. Set the SP to r16 and -+ call _start_in_C_linux, passing it the initial SP. */ -+ "\tmr 3,1\n" -+ "\tmr 1,16\n" -+ "\tbl _start_in_C_linux\n" -+ "\ttrap\n" -+ ".previous\n" -+); -+#elif defined(VGP_ppc64_linux) -+asm("\n" -+ /* PPC64 ELF ABI says '_start' points to a function descriptor. -+ So we must have one, and that is what goes into the .opd section. */ -+ "\t.align 2\n" -+ "\t.global _start\n" -+ "\t.section \".opd\",\"aw\"\n" -+ "\t.align 3\n" -+ "_start:\n" -+ "\t.quad ._start,.TOC.@tocbase,0\n" -+ "\t.previous\n" -+ "\t.type ._start,@function\n" -+ "\t.global ._start\n" -+ "._start:\n" -+ /* set up the new stack in r16 */ -+ "\tlis 16, vgPlain_interim_stack@highest\n" -+ "\tori 16,16,vgPlain_interim_stack@higher\n" -+ "\tsldi 16,16,32\n" -+ "\toris 16,16,vgPlain_interim_stack@h\n" -+ "\tori 16,16,vgPlain_interim_stack@l\n" -+ "\txor 17,17,17\n" -+ "\tlis 17,("VG_STRINGIFY(VG_STACK_GUARD_SZB)" >> 16)\n" -+ "\tori 17,17,("VG_STRINGIFY(VG_STACK_GUARD_SZB)" & 0xFFFF)\n" -+ "\txor 18,18,18\n" -+ "\tlis 18,("VG_STRINGIFY(VG_STACK_ACTIVE_SZB)" >> 16)\n" -+ "\tori 18,18,("VG_STRINGIFY(VG_STACK_ACTIVE_SZB)" & 0xFFFF)\n" -+ "\tadd 16,17,16\n" -+ "\tadd 16,18,16\n" -+ "\trldicr 16,16,0,59\n" -+ /* now r16 = &vgPlain_interim_stack + VG_STACK_GUARD_SZB + -+ VG_STACK_ACTIVE_SZB rounded down to the nearest 16-byte -+ boundary. And r1 is the original SP. Set the SP to r16 and -+ call _start_in_C_linux, passing it the initial SP. */ -+ "\tmr 3,1\n" -+ "\tmr 1,16\n" -+ "\tbl ._start_in_C_linux\n" -+ "\tnop\n" -+ "\ttrap\n" -+); -+#elif defined(VGP_arm_linux) -+asm("\n" -+ "\t.align 2\n" -+ "\t.global _start\n" -+ "_start:\n" -+ "\tldr r0, [pc, #36]\n" -+ "\tldr r1, [pc, #36]\n" -+ "\tadd r0, r1, r0\n" -+ "\tldr r1, [pc, #32]\n" -+ "\tadd r0, r1, r0\n" -+ "\tmvn r1, #15\n" -+ "\tand r0, r0, r1\n" -+ "\tmov r1, sp\n" -+ "\tmov sp, r0\n" -+ "\tmov r0, r1\n" -+ "\tb _start_in_C_linux\n" -+ "\t.word vgPlain_interim_stack\n" -+ "\t.word "VG_STRINGIFY(VG_STACK_GUARD_SZB)"\n" -+ "\t.word "VG_STRINGIFY(VG_STACK_ACTIVE_SZB)"\n" -+); -+#else -+# error "Unknown linux platform" -+#endif -+ -+/* --- !!! --- EXTERNAL HEADERS start --- !!! --- */ -+#define _GNU_SOURCE -+#define _FILE_OFFSET_BITS 64 -+/* This is in order to get AT_NULL and AT_PAGESIZE. */ -+#include -+/* --- !!! --- EXTERNAL HEADERS end --- !!! --- */ -+ -+/* Avoid compiler warnings: this fn _is_ used, but labelling it -+ 'static' causes gcc to complain it isn't. */ -+void _start_in_C_linux ( UWord* pArgc ); -+void _start_in_C_linux ( UWord* pArgc ) -+{ -+ Int r; -+ Word argc = pArgc[0]; -+ HChar** argv = (HChar**)&pArgc[1]; -+ HChar** envp = (HChar**)&pArgc[1+argc+1]; -+ -+ VG_(memset)( &the_iicii, 0, sizeof(the_iicii) ); -+ VG_(memset)( &the_iifii, 0, sizeof(the_iifii) ); -+ -+ the_iicii.sp_at_startup = (Addr)pArgc; -+ -+# if defined(VGP_ppc32_linux) || defined(VGP_ppc64_linux) -+ { -+ /* ppc/ppc64 can be configured with different page sizes. -+ Determine this early. This is an ugly hack and really should -+ be moved into valgrind_main. */ -+ UWord *sp = &pArgc[1+argc+1]; -+ while (*sp++ != 0) -+ ; -+ for (; *sp != AT_NULL && *sp != AT_PAGESZ; sp += 2); -+ if (*sp == AT_PAGESZ) { -+ VKI_PAGE_SIZE = sp[1]; -+ for (VKI_PAGE_SHIFT = 12; -+ VKI_PAGE_SHIFT <= VKI_MAX_PAGE_SHIFT; VKI_PAGE_SHIFT++) -+ if (VKI_PAGE_SIZE == (1UL << VKI_PAGE_SHIFT)) -+ break; -+ } -+ } -+# endif -+ -+ r = valgrind_main( (Int)argc, argv, envp ); -+ /* NOTREACHED */ -+ VG_(exit)(r); -+} -+ -+ -+/*====================================================================*/ -+/*=== Getting to main() alive: AIX5 ===*/ -+/*====================================================================*/ -+ -+#elif defined(VGO_aix5) -+ -+/* This is somewhat simpler than the Linux case. _start_valgrind -+ receives control from the magic piece of code created in this -+ process' address space by the launcher, via use of ptrace(). At -+ the point of entry: -+ -+ - the initial client process image is in memory and ready to roll, -+ except that we've partially trashed its integer register state -+ in order to get this far. So .. -+ -+ - intregs37 holds the client's initial integer register state, so -+ we can restore it before starting the client on the VCPU. -+ -+ - we're on the client's stack. This is not good; therefore the -+ first order of business is to switch to our temporary stack. -+ -+ - the client's initial argc/v/envp is in r3/r4/r5 (32 bit mode) or -+ r14/r15/r16 (64 bit mode). They are pulled out of the stashed -+ integer register state and passed to our main(). -+ -+ The launcher will have played some games with argv. If the launcher -+ ($prefix/bin/valgrind) was started like this -+ -+ valgrind [args-for-V] app [args-for-app] -+ -+ then the launcher will have started the client as -+ -+ app [args-for-V] app [args-for-app] -+ -+ m_initimg will have to mess with the client's initial r4/r5 -+ (32-bit) or r15/r16 (64-bit) so that it believes it was execd as -+ "app [args-for-app]". Well, that's no big deal. -+*/ -+ -+#include "launcher-aix5-bootblock.h" -+ -+void _start_in_C_aix5 ( AIX5Bootblock* bootblock ); -+void _start_in_C_aix5 ( AIX5Bootblock* bootblock ) -+{ -+ Int r; -+ ULong* intregs37; -+ UWord argc, argv, envp; -+ __NR_getpid = bootblock->__NR_getpid; -+ __NR_write = bootblock->__NR_write; -+ __NR_exit = bootblock->__NR_exit; -+ __NR_open = bootblock->__NR_open; -+ __NR_read = bootblock->__NR_read; -+ __NR_close = bootblock->__NR_close; -+ -+ VG_(memset)( &the_iicii, 0, sizeof(the_iicii) ); -+ VG_(memset)( &the_iifii, 0, sizeof(the_iifii) ); -+ -+ intregs37 = &bootblock->iregs_pc_cr_lr_ctr_xer[0]; -+ the_iicii.intregs37 = intregs37; -+ the_iicii.bootblock = (void*)bootblock; -+ the_iicii.adler32_exp = bootblock->adler32; -+ -+ /* Not important on AIX. */ -+ the_iicii.sp_at_startup = (Addr)0x31415927ULL; -+ -+# if defined(VGP_ppc32_aix5) -+ argc = (UWord)intregs37[3]; /* client's r3 == argc */ -+ argv = (UWord)intregs37[4]; -+ envp = (UWord)intregs37[5]; -+# else /* defined(VGP_ppc64_aix5) */ -+ argc = (UWord)intregs37[14]; /* client's r14 == argc */ -+ argv = (UWord)intregs37[15]; -+ envp = (UWord)intregs37[16]; -+# endif -+ -+ r = valgrind_main( (Int)argc, (HChar**)argv, (HChar**)envp ); -+ -+ /* NOTREACHED */ -+ VG_(exit)(r); -+} -+ -+/* THE ENTRY POINT */ -+void _start_valgrind ( AIX5Bootblock* bootblock ); -+void _start_valgrind ( AIX5Bootblock* bootblock ) -+{ -+ /* Switch immediately to our temporary stack, and continue. This -+ is pretty dodgy in that it assumes that gcc does not place on -+ the stack, anything needed to form the _start_in_C_aix5 call, -+ since it will be on the old stack. */ -+ register UWord new_r1; -+ new_r1 = (UWord)&VG_(interim_stack); -+ new_r1 += VG_STACK_GUARD_SZB; /* step over lower guard page */ -+ new_r1 += VG_STACK_ACTIVE_SZB; /* step to top of active area */ -+ new_r1 -= 512; /* paranoia */ -+ __asm__ __volatile__("mr 1,%0" :/*wr*/ -+ :/*rd*/ "b"(new_r1) -+ :/*trash*/"r1","memory"); -+ _start_in_C_aix5(bootblock); -+ /*NOTREACHED*/ -+ VG_(exit)(0); -+} -+ -+/* At some point in Oct 2008, static linking appeared to stop working -+ on AIX 5.3. This breaks the build since we link statically. The -+ linking fails citing absence of the following five symbols as the -+ reason. In the absence of a better solution, here are stand-ins -+ for them. Kludge appears to work; presumably said functions, -+ assuming they are indeed functions, are never called. */ -+void encrypted_pw_passlen ( void ) { vg_assert(0); } -+void crypt_r ( void ) { vg_assert(0); } -+void max_history_size ( void ) { vg_assert(0); } -+void getpass_auto ( void ) { vg_assert(0); } -+void max_pw_passlen ( void ) { vg_assert(0); } -+ -+ -+/*====================================================================*/ -+/*=== Getting to main() alive: darwin ===*/ -+/*====================================================================*/ -+ -+#elif defined(VGO_darwin) -+ -+/* -+ Memory layout established by kernel: -+ -+ 0(%esp) argc -+ 4(%esp) argv[0] -+ ... -+ argv[argc-1] -+ NULL -+ envp[0] -+ ... -+ envp[n] -+ NULL -+ executable name (presumably, a pointer to it) -+ NULL -+ -+ Ditto in the 64-bit case, except all offsets from SP are obviously -+ twice as large. -+*/ -+ -+/* The kernel hands control to _start, which extracts the initial -+ stack pointer and calls onwards to _start_in_C_darwin. This also -+ switches to the new stack. */ -+#if defined(VGP_x86_darwin) -+asm("\n" -+ ".text\n" -+ ".align 2,0x90\n" -+ "\t.globl __start\n" -+ "__start:\n" -+ /* set up the new stack in %eax */ -+ "\tmovl $_vgPlain_interim_stack, %eax\n" -+ "\taddl $"VG_STRINGIFY(VG_STACK_GUARD_SZB)", %eax\n" -+ "\taddl $"VG_STRINGIFY(VG_STACK_ACTIVE_SZB)", %eax\n" -+ "\tsubl $16, %eax\n" -+ "\tandl $~15, %eax\n" -+ /* install it, and collect the original one */ -+ "\txchgl %eax, %esp\n" -+ /* call _start_in_C_darwin, passing it the startup %esp */ -+ "\tpushl %eax\n" -+ "\tcall __start_in_C_darwin\n" -+ "\tint $3\n" -+ "\tint $3\n" -+); -+#elif defined(VGP_amd64_darwin) -+asm("\n" -+ ".text\n" -+ "\t.globl __start\n" -+ ".align 3,0x90\n" -+ "__start:\n" -+ /* set up the new stack in %rdi */ -+ "\tmovabsq $_vgPlain_interim_stack, %rdi\n" -+ "\taddq $"VG_STRINGIFY(VG_STACK_GUARD_SZB)", %rdi\n" -+ "\taddq $"VG_STRINGIFY(VG_STACK_ACTIVE_SZB)", %rdi\n" -+ "\tandq $~15, %rdi\n" -+ /* install it, and collect the original one */ -+ "\txchgq %rdi, %rsp\n" -+ /* call _start_in_C_darwin, passing it the startup %rsp */ -+ "\tcall __start_in_C_darwin\n" -+ "\tint $3\n" -+ "\tint $3\n" -+); -+#endif -+ -+void* __memcpy_chk(void *dest, const void *src, SizeT n, SizeT n2); -+void* __memcpy_chk(void *dest, const void *src, SizeT n, SizeT n2) { -+ // skip check -+ return VG_(memcpy)(dest,src,n); -+} -+void* __memset_chk(void *s, int c, SizeT n, SizeT n2); -+void* __memset_chk(void *s, int c, SizeT n, SizeT n2) { -+ // skip check -+ return VG_(memset)(s,c,n); -+} -+void bzero(void *s, SizeT n); -+void bzero(void *s, SizeT n) { -+ VG_(memset)(s,0,n); -+} -+ -+void* memcpy(void *dest, const void *src, SizeT n); -+void* memcpy(void *dest, const void *src, SizeT n) { -+ return VG_(memcpy)(dest,src,n); -+} -+void* memset(void *s, int c, SizeT n); -+void* memset(void *s, int c, SizeT n) { -+ return VG_(memset)(s,c,n); -+} -+ -+/* Avoid compiler warnings: this fn _is_ used, but labelling it -+ 'static' causes gcc to complain it isn't. */ -+void _start_in_C_darwin ( UWord* pArgc ); -+void _start_in_C_darwin ( UWord* pArgc ) -+{ -+ Int r; -+ Int argc = *(Int *)pArgc; // not pArgc[0] on LP64 -+ HChar** argv = (HChar**)&pArgc[1]; -+ HChar** envp = (HChar**)&pArgc[1+argc+1]; -+ -+ VG_(memset)( &the_iicii, 0, sizeof(the_iicii) ); -+ VG_(memset)( &the_iifii, 0, sizeof(the_iifii) ); -+ -+ the_iicii.sp_at_startup = (Addr)pArgc; -+ -+ r = valgrind_main( (Int)argc, argv, envp ); -+ /* NOTREACHED */ -+ VG_(exit)(r); -+} -+ -+ -+#else -+ -+# error "Unknown OS" -+#endif -+ -+ -+/*====================================================================*/ -+/*=== {u,}{div,mod}di3 replacements ===*/ -+/*====================================================================*/ -+ -+/* For static linking on x86-darwin, we need to supply our own 64-bit -+ integer division code, else the link dies thusly: -+ -+ ld_classic: Undefined symbols: -+ ___udivdi3 -+ ___umoddi3 -+*/ -+#if defined(VGP_x86_darwin) -+ -+/* Routines for doing signed/unsigned 64 x 64 ==> 64 div and mod -+ (udivdi3, umoddi3, divdi3, moddi3) using only 32 x 32 ==> 32 -+ division. Cobbled together from -+ -+ http://www.hackersdelight.org/HDcode/divlu.c -+ http://www.hackersdelight.org/HDcode/divls.c -+ http://www.hackersdelight.org/HDcode/newCode/divDouble.c -+ -+ The code from those three files is covered by the following license, -+ as it appears at: -+ -+ http://www.hackersdelight.org/permissions.htm -+ -+ You are free to use, copy, and distribute any of the code on -+ this web site, whether modified by you or not. You need not give -+ attribution. This includes the algorithms (some of which appear -+ in Hacker's Delight), the Hacker's Assistant, and any code -+ submitted by readers. Submitters implicitly agree to this. -+*/ -+ -+/* Long division, unsigned (64/32 ==> 32). -+ This procedure performs unsigned "long division" i.e., division of a -+64-bit unsigned dividend by a 32-bit unsigned divisor, producing a -+32-bit quotient. In the overflow cases (divide by 0, or quotient -+exceeds 32 bits), it returns a remainder of 0xFFFFFFFF (an impossible -+value). -+ The dividend is u1 and u0, with u1 being the most significant word. -+The divisor is parameter v. The value returned is the quotient. -+ Max line length is 57, to fit in hacker.book. */ -+ -+static Int nlz32(UInt x) -+{ -+ Int n; -+ if (x == 0) return(32); -+ n = 0; -+ if (x <= 0x0000FFFF) {n = n +16; x = x <<16;} -+ if (x <= 0x00FFFFFF) {n = n + 8; x = x << 8;} -+ if (x <= 0x0FFFFFFF) {n = n + 4; x = x << 4;} -+ if (x <= 0x3FFFFFFF) {n = n + 2; x = x << 2;} -+ if (x <= 0x7FFFFFFF) {n = n + 1;} -+ return n; -+} -+ -+/* 64 x 32 ==> 32 unsigned division, using only 32 x 32 ==> 32 -+ division as a primitive. */ -+static UInt divlu2(UInt u1, UInt u0, UInt v, UInt *r) -+{ -+ const UInt b = 65536; // Number base (16 bits). -+ UInt un1, un0, // Norm. dividend LSD's. -+ vn1, vn0, // Norm. divisor digits. -+ q1, q0, // Quotient digits. -+ un32, un21, un10, // Dividend digit pairs. -+ rhat; // A remainder. -+ Int s; // Shift amount for norm. -+ -+ if (u1 >= v) { // If overflow, set rem. -+ if (r != NULL) // to an impossible value, -+ *r = 0xFFFFFFFF; // and return the largest -+ return 0xFFFFFFFF;} // possible quotient. -+ -+ s = nlz32(v); // 0 <= s <= 31. -+ v = v << s; // Normalize divisor. -+ vn1 = v >> 16; // Break divisor up into -+ vn0 = v & 0xFFFF; // two 16-bit digits. -+ -+ un32 = (u1 << s) | ((u0 >> (32 - s)) & (-s >> 31)); -+ un10 = u0 << s; // Shift dividend left. -+ -+ un1 = un10 >> 16; // Break right half of -+ un0 = un10 & 0xFFFF; // dividend into two digits. -+ -+ q1 = un32/vn1; // Compute the first -+ rhat = un32 - q1*vn1; // quotient digit, q1. -+ again1: -+ if (q1 >= b || q1*vn0 > b*rhat + un1) { -+ q1 = q1 - 1; -+ rhat = rhat + vn1; -+ if (rhat < b) goto again1;} -+ -+ un21 = un32*b + un1 - q1*v; // Multiply and subtract. -+ -+ q0 = un21/vn1; // Compute the second -+ rhat = un21 - q0*vn1; // quotient digit, q0. -+ again2: -+ if (q0 >= b || q0*vn0 > b*rhat + un0) { -+ q0 = q0 - 1; -+ rhat = rhat + vn1; -+ if (rhat < b) goto again2;} -+ -+ if (r != NULL) // If remainder is wanted, -+ *r = (un21*b + un0 - q0*v) >> s; // return it. -+ return q1*b + q0; -+} -+ -+ -+/* 64 x 32 ==> 32 signed division, using only 32 x 32 ==> 32 division -+ as a primitive. */ -+static Int divls(Int u1, UInt u0, Int v, Int *r) -+{ -+ Int q, uneg, vneg, diff, borrow; -+ -+ uneg = u1 >> 31; // -1 if u < 0. -+ if (uneg) { // Compute the absolute -+ u0 = -u0; // value of the dividend u. -+ borrow = (u0 != 0); -+ u1 = -u1 - borrow;} -+ -+ vneg = v >> 31; // -1 if v < 0. -+ v = (v ^ vneg) - vneg; // Absolute value of v. -+ -+ if ((UInt)u1 >= (UInt)v) goto overflow; -+ -+ q = divlu2(u1, u0, v, (UInt *)r); -+ -+ diff = uneg ^ vneg; // Negate q if signs of -+ q = (q ^ diff) - diff; // u and v differed. -+ if (uneg && r != NULL) -+ *r = -*r; -+ -+ if ((diff ^ q) < 0 && q != 0) { // If overflow, -+ overflow: // set remainder -+ if (r != NULL) // to an impossible value, -+ *r = 0x80000000; // and return the largest -+ q = 0x80000000;} // possible neg. quotient. -+ return q; -+} -+ -+ -+ -+/* This file contains a program for doing 64/64 ==> 64 division, on a -+machine that does not have that instruction but that does have -+instructions for "long division" (64/32 ==> 32). Code for unsigned -+division is given first, followed by a simple program for doing the -+signed version by using the unsigned version. -+ These programs are useful in implementing "long long" (64-bit) -+arithmetic on a machine that has the long division instruction. It will -+work on 64- and 32-bit machines, provided the compiler implements long -+long's (64-bit integers). It is desirable that the machine have the -+Count Leading Zeros instruction. -+ In the GNU world, these programs are known as __divdi3 and __udivdi3, -+and similar names are used here. -+ This material is not in HD, but may be in a future edition. -+Max line length is 57, to fit in hacker.book. */ -+ -+ -+static Int nlz64(ULong x) -+{ -+ Int n; -+ if (x == 0) return(64); -+ n = 0; -+ if (x <= 0x00000000FFFFFFFFULL) {n = n + 32; x = x << 32;} -+ if (x <= 0x0000FFFFFFFFFFFFULL) {n = n + 16; x = x << 16;} -+ if (x <= 0x00FFFFFFFFFFFFFFULL) {n = n + 8; x = x << 8;} -+ if (x <= 0x0FFFFFFFFFFFFFFFULL) {n = n + 4; x = x << 4;} -+ if (x <= 0x3FFFFFFFFFFFFFFFULL) {n = n + 2; x = x << 2;} -+ if (x <= 0x7FFFFFFFFFFFFFFFULL) {n = n + 1;} -+ return n; -+} -+ -+// ---------------------------- udivdi3 -------------------------------- -+ -+ /* The variables u0, u1, etc. take on only 32-bit values, but they -+ are declared long long to avoid some compiler warning messages and to -+ avoid some unnecessary EXTRs that the compiler would put in, to -+ convert long longs to ints. -+ -+ First the procedure takes care of the case in which the divisor is a -+ 32-bit quantity. There are two subcases: (1) If the left half of the -+ dividend is less than the divisor, one execution of DIVU is all that -+ is required (overflow is not possible). (2) Otherwise it does two -+ divisions, using the grade school method, with variables used as -+ suggested below. -+ -+ q1 q0 -+ ________ -+ v) u1 u0 -+ q1*v -+ ____ -+ k u0 */ -+ -+/* These macros must be used with arguments of the appropriate type -+(unsigned long long for DIVU and long long for DIVS. They are -+simulations of the presumed machines ops. I.e., they look at only the -+low-order 32 bits of the divisor, they return garbage if the division -+overflows, and they return garbage in the high-order half of the -+quotient doubleword. -+ In practice, these would be replaced with uses of the machine's DIVU -+and DIVS instructions (e.g., by using the GNU "asm" facility). */ -+ -+static UInt DIVU ( ULong u, UInt v ) -+{ -+ UInt uHi = (UInt)(u >> 32); -+ UInt uLo = (UInt)u; -+ return divlu2(uHi, uLo, v, NULL); -+} -+ -+static Int DIVS ( Long u, Int v ) -+{ -+ Int uHi = (Int)(u >> 32); -+ UInt uLo = (UInt)u; -+ return divls(uHi, uLo, v, NULL); -+} -+ -+/* 64 x 64 ==> 64 unsigned division, using only 32 x 32 ==> 32 -+ division as a primitive. */ -+static ULong udivdi3(ULong u, ULong v) -+{ -+ ULong u0, u1, v1, q0, q1, k, n; -+ -+ if (v >> 32 == 0) { // If v < 2**32: -+ if (u >> 32 < v) // If u/v cannot overflow, -+ return DIVU(u, v) // just do one division. -+ & 0xFFFFFFFF; -+ else { // If u/v would overflow: -+ u1 = u >> 32; // Break u up into two -+ u0 = u & 0xFFFFFFFF; // halves. -+ q1 = DIVU(u1, v) // First quotient digit. -+ & 0xFFFFFFFF; -+ k = u1 - q1*v; // First remainder, < v. -+ q0 = DIVU((k << 32) + u0, v) // 2nd quot. digit. -+ & 0xFFFFFFFF; -+ return (q1 << 32) + q0; -+ } -+ } -+ // Here v >= 2**32. -+ n = nlz64(v); // 0 <= n <= 31. -+ v1 = (v << n) >> 32; // Normalize the divisor -+ // so its MSB is 1. -+ u1 = u >> 1; // To ensure no overflow. -+ q1 = DIVU(u1, v1) // Get quotient from -+ & 0xFFFFFFFF; // divide unsigned insn. -+ q0 = (q1 << n) >> 31; // Undo normalization and -+ // division of u by 2. -+ if (q0 != 0) // Make q0 correct or -+ q0 = q0 - 1; // too small by 1. -+ if ((u - q0*v) >= v) -+ q0 = q0 + 1; // Now q0 is correct. -+ return q0; -+} -+ -+ -+// ----------------------------- divdi3 -------------------------------- -+ -+/* This routine presumes that smallish cases (those which can be done in -+one execution of DIVS) are common. If this is not the case, the test for -+this case should be deleted. -+ Note that the test for when DIVS can be used is not entirely -+accurate. For example, DIVS is not used if v = 0xFFFFFFFF8000000, -+whereas if could be (if u is sufficiently small in magnitude). */ -+ -+// ------------------------------ cut ---------------------------------- -+ -+static ULong my_llabs ( Long x ) -+{ -+ ULong t = x >> 63; -+ return (x ^ t) - t; -+} -+ -+/* 64 x 64 ==> 64 signed division, using only 32 x 32 ==> 32 division -+ as a primitive. */ -+static Long divdi3(Long u, Long v) -+{ -+ ULong au, av; -+ Long q, t; -+ au = my_llabs(u); -+ av = my_llabs(v); -+ if (av >> 31 == 0) { // If |v| < 2**31 and -+ // if (v << 32 >> 32 == v) { // If v is in range and -+ if (au < av << 31) { // |u|/|v| cannot -+ q = DIVS(u, v); // overflow, use DIVS. -+ return (q << 32) >> 32; -+ } -+ } -+ q = udivdi3(au,av); // Invoke udivdi3. -+ t = (u ^ v) >> 63; // If u, v have different -+ return (q ^ t) - t; // signs, negate q. -+} -+ -+// ---------------------------- end cut -------------------------------- -+ -+ULong __udivdi3 (ULong u, ULong v); -+ULong __udivdi3 (ULong u, ULong v) -+{ -+ return udivdi3(u,v); -+} -+ -+Long __divdi3 (Long u, Long v); -+Long __divdi3 (Long u, Long v) -+{ -+ return divdi3(u,v); -+} -+ -+ULong __umoddi3 (ULong u, ULong v); -+ULong __umoddi3 (ULong u, ULong v) -+{ -+ ULong q = __udivdi3(u, v); -+ ULong r = u - q * v; -+ return r; -+} -+ -+Long __moddi3 (Long u, Long v); -+Long __moddi3 (Long u, Long v) -+{ -+ Long q = __divdi3(u, v); -+ Long r = u - q * v; -+ return r; -+} -+ -+#endif -+ -+ -+/*--------------------------------------------------------------------*/ -+/*--- end ---*/ -+/*--------------------------------------------------------------------*/ ---- coregrind/m_redir.c -+++ coregrind/m_redir.c -@@ -1078,6 +1078,9 @@ - (Addr)&VG_(amd64_darwin_REDIR_FOR_arc4random), NULL); - } - -+# elif defined(VGP_s390x_linux) -+ /* nothing so far */ -+ - # else - # error Unknown platform - # endif ---- coregrind/m_scheduler/scheduler.c -+++ coregrind/m_scheduler/scheduler.c -@@ -677,6 +677,10 @@ - vg_assert(VG_IS_8_ALIGNED(& tst->arch.vex_shadow1.guest_D1)); - vg_assert(VG_IS_8_ALIGNED(& tst->arch.vex_shadow2.guest_D1)); - # endif -+ -+# if defined(VGA_s390x) -+ /* no special requirements */ -+# endif - } - - -@@ -1310,6 +1314,9 @@ - #elif defined(VGA_arm) - # define VG_CLREQ_ARGS guest_R4 - # define VG_CLREQ_RET guest_R3 -+#elif defined (VGA_s390x) -+# define VG_CLREQ_ARGS guest_r2 -+# define VG_CLREQ_RET guest_r3 - #else - # error Unknown arch - #endif ---- coregrind/m_scheduler/scheduler.c.orig -+++ coregrind/m_scheduler/scheduler.c.orig -@@ -0,0 +1,1779 @@ -+ -+/*--------------------------------------------------------------------*/ -+/*--- Thread scheduling. scheduler.c ---*/ -+/*--------------------------------------------------------------------*/ -+ -+/* -+ This file is part of Valgrind, a dynamic binary instrumentation -+ framework. -+ -+ Copyright (C) 2000-2010 Julian Seward -+ jseward@acm.org -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA -+ 02111-1307, USA. -+ -+ The GNU General Public License is contained in the file COPYING. -+*/ -+ -+/* -+ Overview -+ -+ Valgrind tries to emulate the kernel's threading as closely as -+ possible. The client does all threading via the normal syscalls -+ (on Linux: clone, etc). Valgrind emulates this by creating exactly -+ the same process structure as would be created without Valgrind. -+ There are no extra threads. -+ -+ The main difference is that Valgrind only allows one client thread -+ to run at once. This is controlled with the CPU Big Lock, -+ "the_BigLock". Any time a thread wants to run client code or -+ manipulate any shared state (which is anything other than its own -+ ThreadState entry), it must hold the_BigLock. -+ -+ When a thread is about to block in a blocking syscall, it releases -+ the_BigLock, and re-takes it when it becomes runnable again (either -+ because the syscall finished, or we took a signal). -+ -+ VG_(scheduler) therefore runs in each thread. It returns only when -+ the thread is exiting, either because it exited itself, or it was -+ told to exit by another thread. -+ -+ This file is almost entirely OS-independent. The details of how -+ the OS handles threading and signalling are abstracted away and -+ implemented elsewhere. [Some of the functions have worked their -+ way back for the moment, until we do an OS port in earnest...] -+ */ -+ -+#include "pub_core_basics.h" -+#include "pub_core_debuglog.h" -+#include "pub_core_vki.h" -+#include "pub_core_vkiscnums.h" // __NR_sched_yield -+#include "pub_core_threadstate.h" -+#include "pub_core_aspacemgr.h" -+#include "pub_core_clreq.h" // for VG_USERREQ__* -+#include "pub_core_dispatch.h" -+#include "pub_core_errormgr.h" // For VG_(get_n_errs_found)() -+#include "pub_core_libcbase.h" -+#include "pub_core_libcassert.h" -+#include "pub_core_libcprint.h" -+#include "pub_core_libcproc.h" -+#include "pub_core_libcsignal.h" -+#if defined(VGO_darwin) -+#include "pub_core_mach.h" -+#endif -+#include "pub_core_machine.h" -+#include "pub_core_mallocfree.h" -+#include "pub_core_options.h" -+#include "pub_core_replacemalloc.h" -+#include "pub_core_signals.h" -+#include "pub_core_stacks.h" -+#include "pub_core_stacktrace.h" // For VG_(get_and_pp_StackTrace)() -+#include "pub_core_syscall.h" -+#include "pub_core_syswrap.h" -+#include "pub_core_tooliface.h" -+#include "pub_core_translate.h" // For VG_(translate)() -+#include "pub_core_transtab.h" -+#include "pub_core_debuginfo.h" // VG_(di_notify_pdb_debuginfo) -+#include "priv_sema.h" -+#include "pub_core_scheduler.h" // self -+#include "pub_core_redir.h" -+ -+ -+/* --------------------------------------------------------------------- -+ Types and globals for the scheduler. -+ ------------------------------------------------------------------ */ -+ -+/* ThreadId and ThreadState are defined elsewhere*/ -+ -+/* Defines the thread-scheduling timeslice, in terms of the number of -+ basic blocks we attempt to run each thread for. Smaller values -+ give finer interleaving but much increased scheduling overheads. */ -+#define SCHEDULING_QUANTUM 100000 -+ -+/* If False, a fault is Valgrind-internal (ie, a bug) */ -+Bool VG_(in_generated_code) = False; -+ -+/* Counts downwards in VG_(run_innerloop). */ -+UInt VG_(dispatch_ctr); -+ -+/* 64-bit counter for the number of basic blocks done. */ -+static ULong bbs_done = 0; -+ -+/* Forwards */ -+static void do_client_request ( ThreadId tid ); -+static void scheduler_sanity ( ThreadId tid ); -+static void mostly_clear_thread_record ( ThreadId tid ); -+ -+/* Stats. */ -+static ULong n_scheduling_events_MINOR = 0; -+static ULong n_scheduling_events_MAJOR = 0; -+ -+/* Sanity checking counts. */ -+static UInt sanity_fast_count = 0; -+static UInt sanity_slow_count = 0; -+ -+void VG_(print_scheduler_stats)(void) -+{ -+ VG_(message)(Vg_DebugMsg, -+ "scheduler: %'llu jumps (bb entries).\n", bbs_done ); -+ VG_(message)(Vg_DebugMsg, -+ "scheduler: %'llu/%'llu major/minor sched events.\n", -+ n_scheduling_events_MAJOR, n_scheduling_events_MINOR); -+ VG_(message)(Vg_DebugMsg, -+ " sanity: %d cheap, %d expensive checks.\n", -+ sanity_fast_count, sanity_slow_count ); -+} -+ -+/* CPU semaphore, so that threads can run exclusively */ -+static vg_sema_t the_BigLock; -+ -+ -+/* --------------------------------------------------------------------- -+ Helper functions for the scheduler. -+ ------------------------------------------------------------------ */ -+ -+static -+void print_sched_event ( ThreadId tid, Char* what ) -+{ -+ VG_(message)(Vg_DebugMsg, " SCHED[%d]: %s\n", tid, what ); -+} -+ -+static -+HChar* name_of_sched_event ( UInt event ) -+{ -+ switch (event) { -+ case VEX_TRC_JMP_SYS_SYSCALL: return "SYSCALL"; -+ case VEX_TRC_JMP_SYS_INT32: return "INT32"; -+ case VEX_TRC_JMP_SYS_INT128: return "INT128"; -+ case VEX_TRC_JMP_SYS_INT129: return "INT129"; -+ case VEX_TRC_JMP_SYS_INT130: return "INT130"; -+ case VEX_TRC_JMP_SYS_SYSENTER: return "SYSENTER"; -+ case VEX_TRC_JMP_CLIENTREQ: return "CLIENTREQ"; -+ case VEX_TRC_JMP_YIELD: return "YIELD"; -+ case VEX_TRC_JMP_NODECODE: return "NODECODE"; -+ case VEX_TRC_JMP_MAPFAIL: return "MAPFAIL"; -+ case VEX_TRC_JMP_NOREDIR: return "NOREDIR"; -+ case VEX_TRC_JMP_EMWARN: return "EMWARN"; -+ case VEX_TRC_JMP_TINVAL: return "TINVAL"; -+ case VG_TRC_INVARIANT_FAILED: return "INVFAILED"; -+ case VG_TRC_INNER_COUNTERZERO: return "COUNTERZERO"; -+ case VG_TRC_INNER_FASTMISS: return "FASTMISS"; -+ case VG_TRC_FAULT_SIGNAL: return "FAULTSIGNAL"; -+ default: return "??UNKNOWN??"; -+ } -+} -+ -+/* Allocate a completely empty ThreadState record. */ -+ThreadId VG_(alloc_ThreadState) ( void ) -+{ -+ Int i; -+ for (i = 1; i < VG_N_THREADS; i++) { -+ if (VG_(threads)[i].status == VgTs_Empty) { -+ VG_(threads)[i].status = VgTs_Init; -+ VG_(threads)[i].exitreason = VgSrc_None; -+ return i; -+ } -+ } -+ VG_(printf)("vg_alloc_ThreadState: no free slots available\n"); -+ VG_(printf)("Increase VG_N_THREADS, rebuild and try again.\n"); -+ VG_(core_panic)("VG_N_THREADS is too low"); -+ /*NOTREACHED*/ -+} -+ -+/* -+ Mark a thread as Runnable. This will block until the_BigLock is -+ available, so that we get exclusive access to all the shared -+ structures and the CPU. Up until we get the_BigLock, we must not -+ touch any shared state. -+ -+ When this returns, we'll actually be running. -+ */ -+void VG_(acquire_BigLock)(ThreadId tid, HChar* who) -+{ -+ ThreadState *tst; -+ -+#if 0 -+ if (VG_(clo_trace_sched)) { -+ HChar buf[100]; -+ vg_assert(VG_(strlen)(who) <= 100-50); -+ VG_(sprintf)(buf, "waiting for lock (%s)", who); -+ print_sched_event(tid, buf); -+ } -+#endif -+ -+ /* First, acquire the_BigLock. We can't do anything else safely -+ prior to this point. Even doing debug printing prior to this -+ point is, technically, wrong. */ -+ ML_(sema_down)(&the_BigLock, False/*not LL*/); -+ -+ tst = VG_(get_ThreadState)(tid); -+ -+ vg_assert(tst->status != VgTs_Runnable); -+ -+ tst->status = VgTs_Runnable; -+ -+ if (VG_(running_tid) != VG_INVALID_THREADID) -+ VG_(printf)("tid %d found %d running\n", tid, VG_(running_tid)); -+ vg_assert(VG_(running_tid) == VG_INVALID_THREADID); -+ VG_(running_tid) = tid; -+ -+ { Addr gsp = VG_(get_SP)(tid); -+ VG_(unknown_SP_update)(gsp, gsp, 0/*unknown origin*/); -+ } -+ -+ if (VG_(clo_trace_sched)) { -+ HChar buf[150]; -+ vg_assert(VG_(strlen)(who) <= 150-50); -+ VG_(sprintf)(buf, " acquired lock (%s)", who); -+ print_sched_event(tid, buf); -+ } -+} -+ -+/* -+ Set a thread into a sleeping state, and give up exclusive access to -+ the CPU. On return, the thread must be prepared to block until it -+ is ready to run again (generally this means blocking in a syscall, -+ but it may mean that we remain in a Runnable state and we're just -+ yielding the CPU to another thread). -+ */ -+void VG_(release_BigLock)(ThreadId tid, ThreadStatus sleepstate, HChar* who) -+{ -+ ThreadState *tst = VG_(get_ThreadState)(tid); -+ -+ vg_assert(tst->status == VgTs_Runnable); -+ -+ vg_assert(sleepstate == VgTs_WaitSys || -+ sleepstate == VgTs_Yielding); -+ -+ tst->status = sleepstate; -+ -+ vg_assert(VG_(running_tid) == tid); -+ VG_(running_tid) = VG_INVALID_THREADID; -+ -+ if (VG_(clo_trace_sched)) { -+ Char buf[200]; -+ vg_assert(VG_(strlen)(who) <= 200-100); -+ VG_(sprintf)(buf, "releasing lock (%s) -> %s", -+ who, VG_(name_of_ThreadStatus)(sleepstate)); -+ print_sched_event(tid, buf); -+ } -+ -+ /* Release the_BigLock; this will reschedule any runnable -+ thread. */ -+ ML_(sema_up)(&the_BigLock, False/*not LL*/); -+} -+ -+/* See pub_core_scheduler.h for description */ -+void VG_(acquire_BigLock_LL) ( HChar* who ) -+{ -+ ML_(sema_down)(&the_BigLock, True/*LL*/); -+} -+ -+/* See pub_core_scheduler.h for description */ -+void VG_(release_BigLock_LL) ( HChar* who ) -+{ -+ ML_(sema_up)(&the_BigLock, True/*LL*/); -+} -+ -+ -+/* Clear out the ThreadState and release the semaphore. Leaves the -+ ThreadState in VgTs_Zombie state, so that it doesn't get -+ reallocated until the caller is really ready. */ -+void VG_(exit_thread)(ThreadId tid) -+{ -+ vg_assert(VG_(is_valid_tid)(tid)); -+ vg_assert(VG_(is_running_thread)(tid)); -+ vg_assert(VG_(is_exiting)(tid)); -+ -+ mostly_clear_thread_record(tid); -+ VG_(running_tid) = VG_INVALID_THREADID; -+ -+ /* There should still be a valid exitreason for this thread */ -+ vg_assert(VG_(threads)[tid].exitreason != VgSrc_None); -+ -+ if (VG_(clo_trace_sched)) -+ print_sched_event(tid, "release lock in VG_(exit_thread)"); -+ -+ ML_(sema_up)(&the_BigLock, False/*not LL*/); -+} -+ -+/* If 'tid' is blocked in a syscall, send it SIGVGKILL so as to get it -+ out of the syscall and onto doing the next thing, whatever that is. -+ If it isn't blocked in a syscall, has no effect on the thread. */ -+void VG_(get_thread_out_of_syscall)(ThreadId tid) -+{ -+ vg_assert(VG_(is_valid_tid)(tid)); -+ vg_assert(!VG_(is_running_thread)(tid)); -+ -+ if (VG_(threads)[tid].status == VgTs_WaitSys) { -+ if (VG_(clo_trace_signals)) { -+ VG_(message)(Vg_DebugMsg, -+ "get_thread_out_of_syscall zaps tid %d lwp %d\n", -+ tid, VG_(threads)[tid].os_state.lwpid); -+ } -+# if defined(VGO_darwin) -+ { -+ // GrP fixme use mach primitives on darwin? -+ // GrP fixme thread_abort_safely? -+ // GrP fixme race for thread with WaitSys set but not in syscall yet? -+ extern kern_return_t thread_abort(mach_port_t); -+ thread_abort(VG_(threads)[tid].os_state.lwpid); -+ } -+# else -+ { -+ __attribute__((unused)) -+ Int r = VG_(tkill)(VG_(threads)[tid].os_state.lwpid, VG_SIGVGKILL); -+ /* JRS 2009-Mar-20: should we assert for r==0 (tkill succeeded)? -+ I'm really not sure. Here's a race scenario which argues -+ that we shoudn't; but equally I'm not sure the scenario is -+ even possible, because of constraints caused by the question -+ of who holds the BigLock when. -+ -+ Target thread tid does sys_read on a socket and blocks. This -+ function gets called, and we observe correctly that tid's -+ status is WaitSys but then for whatever reason this function -+ goes very slowly for a while. Then data arrives from -+ wherever, tid's sys_read returns, tid exits. Then we do -+ tkill on tid, but tid no longer exists; tkill returns an -+ error code and the assert fails. */ -+ /* vg_assert(r == 0); */ -+ } -+# endif -+ } -+} -+ -+/* -+ Yield the CPU for a short time to let some other thread run. -+ */ -+void VG_(vg_yield)(void) -+{ -+ ThreadId tid = VG_(running_tid); -+ -+ vg_assert(tid != VG_INVALID_THREADID); -+ vg_assert(VG_(threads)[tid].os_state.lwpid == VG_(gettid)()); -+ -+ VG_(release_BigLock)(tid, VgTs_Yielding, "VG_(vg_yield)"); -+ -+ /* -+ Tell the kernel we're yielding. -+ */ -+ VG_(do_syscall0)(__NR_sched_yield); -+ -+ VG_(acquire_BigLock)(tid, "VG_(vg_yield)"); -+} -+ -+ -+/* Set the standard set of blocked signals, used whenever we're not -+ running a client syscall. */ -+static void block_signals(void) -+{ -+ vki_sigset_t mask; -+ -+ VG_(sigfillset)(&mask); -+ -+ /* Don't block these because they're synchronous */ -+ VG_(sigdelset)(&mask, VKI_SIGSEGV); -+ VG_(sigdelset)(&mask, VKI_SIGBUS); -+ VG_(sigdelset)(&mask, VKI_SIGFPE); -+ VG_(sigdelset)(&mask, VKI_SIGILL); -+ VG_(sigdelset)(&mask, VKI_SIGTRAP); -+ -+ /* Can't block these anyway */ -+ VG_(sigdelset)(&mask, VKI_SIGSTOP); -+ VG_(sigdelset)(&mask, VKI_SIGKILL); -+ -+ VG_(sigprocmask)(VKI_SIG_SETMASK, &mask, NULL); -+} -+ -+static void os_state_clear(ThreadState *tst) -+{ -+ tst->os_state.lwpid = 0; -+ tst->os_state.threadgroup = 0; -+# if defined(VGO_linux) -+ /* no other fields to clear */ -+# elif defined(VGO_aix5) -+ tst->os_state.cancel_async = False; -+ tst->os_state.cancel_disabled = False; -+ tst->os_state.cancel_progress = Canc_NoRequest; -+# elif defined(VGO_darwin) -+ tst->os_state.post_mach_trap_fn = NULL; -+ tst->os_state.pthread = 0; -+ tst->os_state.func_arg = 0; -+ VG_(memset)(&tst->os_state.child_go, 0, sizeof(tst->os_state.child_go)); -+ VG_(memset)(&tst->os_state.child_done, 0, sizeof(tst->os_state.child_done)); -+ tst->os_state.wq_jmpbuf_valid = False; -+ tst->os_state.remote_port = 0; -+ tst->os_state.msgh_id = 0; -+ VG_(memset)(&tst->os_state.mach_args, 0, sizeof(tst->os_state.mach_args)); -+# else -+# error "Unknown OS" -+# endif -+} -+ -+static void os_state_init(ThreadState *tst) -+{ -+ tst->os_state.valgrind_stack_base = 0; -+ tst->os_state.valgrind_stack_init_SP = 0; -+ os_state_clear(tst); -+} -+ -+static -+void mostly_clear_thread_record ( ThreadId tid ) -+{ -+ vki_sigset_t savedmask; -+ -+ vg_assert(tid >= 0 && tid < VG_N_THREADS); -+ VG_(cleanup_thread)(&VG_(threads)[tid].arch); -+ VG_(threads)[tid].tid = tid; -+ -+ /* Leave the thread in Zombie, so that it doesn't get reallocated -+ until the caller is finally done with the thread stack. */ -+ VG_(threads)[tid].status = VgTs_Zombie; -+ -+ VG_(sigemptyset)(&VG_(threads)[tid].sig_mask); -+ VG_(sigemptyset)(&VG_(threads)[tid].tmp_sig_mask); -+ -+ os_state_clear(&VG_(threads)[tid]); -+ -+ /* start with no altstack */ -+ VG_(threads)[tid].altstack.ss_sp = (void *)0xdeadbeef; -+ VG_(threads)[tid].altstack.ss_size = 0; -+ VG_(threads)[tid].altstack.ss_flags = VKI_SS_DISABLE; -+ -+ VG_(clear_out_queued_signals)(tid, &savedmask); -+ -+ VG_(threads)[tid].sched_jmpbuf_valid = False; -+} -+ -+/* -+ Called in the child after fork. If the parent has multiple -+ threads, then we've inherited a VG_(threads) array describing them, -+ but only the thread which called fork() is actually alive in the -+ child. This functions needs to clean up all those other thread -+ structures. -+ -+ Whichever tid in the parent which called fork() becomes the -+ master_tid in the child. That's because the only living slot in -+ VG_(threads) in the child after fork is VG_(threads)[tid], and it -+ would be too hard to try to re-number the thread and relocate the -+ thread state down to VG_(threads)[1]. -+ -+ This function also needs to reinitialize the_BigLock, since -+ otherwise we may end up sharing its state with the parent, which -+ would be deeply confusing. -+*/ -+static void sched_fork_cleanup(ThreadId me) -+{ -+ ThreadId tid; -+ vg_assert(VG_(running_tid) == me); -+ -+# if defined(VGO_darwin) -+ // GrP fixme hack reset Mach ports -+ VG_(mach_init)(); -+# endif -+ -+ VG_(threads)[me].os_state.lwpid = VG_(gettid)(); -+ VG_(threads)[me].os_state.threadgroup = VG_(getpid)(); -+ -+ /* clear out all the unused thread slots */ -+ for (tid = 1; tid < VG_N_THREADS; tid++) { -+ if (tid != me) { -+ mostly_clear_thread_record(tid); -+ VG_(threads)[tid].status = VgTs_Empty; -+ VG_(clear_syscallInfo)(tid); -+ } -+ } -+ -+ /* re-init and take the sema */ -+ ML_(sema_deinit)(&the_BigLock); -+ ML_(sema_init)(&the_BigLock); -+ ML_(sema_down)(&the_BigLock, False/*not LL*/); -+} -+ -+ -+/* First phase of initialisation of the scheduler. Initialise the -+ bigLock, zeroise the VG_(threads) structure and decide on the -+ ThreadId of the root thread. -+*/ -+ThreadId VG_(scheduler_init_phase1) ( void ) -+{ -+ Int i; -+ ThreadId tid_main; -+ -+ VG_(debugLog)(1,"sched","sched_init_phase1\n"); -+ -+ ML_(sema_init)(&the_BigLock); -+ -+ for (i = 0 /* NB; not 1 */; i < VG_N_THREADS; i++) { -+ /* Paranoia .. completely zero it out. */ -+ VG_(memset)( & VG_(threads)[i], 0, sizeof( VG_(threads)[i] ) ); -+ -+ VG_(threads)[i].sig_queue = NULL; -+ -+ os_state_init(&VG_(threads)[i]); -+ mostly_clear_thread_record(i); -+ -+ VG_(threads)[i].status = VgTs_Empty; -+ VG_(threads)[i].client_stack_szB = 0; -+ VG_(threads)[i].client_stack_highest_word = (Addr)NULL; -+ } -+ -+ tid_main = VG_(alloc_ThreadState)(); -+ -+ /* Bleh. Unfortunately there are various places in the system that -+ assume that the main thread has a ThreadId of 1. -+ - Helgrind (possibly) -+ - stack overflow message in default_action() in m_signals.c -+ - definitely a lot more places -+ */ -+ vg_assert(tid_main == 1); -+ -+ return tid_main; -+} -+ -+ -+/* Second phase of initialisation of the scheduler. Given the root -+ ThreadId computed by first phase of initialisation, fill in stack -+ details and acquire bigLock. Initialise the scheduler. This is -+ called at startup. The caller subsequently initialises the guest -+ state components of this main thread. -+*/ -+void VG_(scheduler_init_phase2) ( ThreadId tid_main, -+ Addr clstack_end, -+ SizeT clstack_size ) -+{ -+ VG_(debugLog)(1,"sched","sched_init_phase2: tid_main=%d, " -+ "cls_end=0x%lx, cls_sz=%ld\n", -+ tid_main, clstack_end, clstack_size); -+ -+ vg_assert(VG_IS_PAGE_ALIGNED(clstack_end+1)); -+ vg_assert(VG_IS_PAGE_ALIGNED(clstack_size)); -+ -+ VG_(threads)[tid_main].client_stack_highest_word -+ = clstack_end + 1 - sizeof(UWord); -+ VG_(threads)[tid_main].client_stack_szB -+ = clstack_size; -+ -+ VG_(atfork)(NULL, NULL, sched_fork_cleanup); -+} -+ -+ -+/* --------------------------------------------------------------------- -+ Helpers for running translations. -+ ------------------------------------------------------------------ */ -+ -+/* Use gcc's built-in setjmp/longjmp. longjmp must not restore signal -+ mask state, but does need to pass "val" through. */ -+#define SCHEDSETJMP(tid, jumped, stmt) \ -+ do { \ -+ ThreadState * volatile _qq_tst = VG_(get_ThreadState)(tid); \ -+ \ -+ (jumped) = __builtin_setjmp(_qq_tst->sched_jmpbuf); \ -+ if ((jumped) == 0) { \ -+ vg_assert(!_qq_tst->sched_jmpbuf_valid); \ -+ _qq_tst->sched_jmpbuf_valid = True; \ -+ stmt; \ -+ } else if (VG_(clo_trace_sched)) \ -+ VG_(printf)("SCHEDSETJMP(line %d) tid %d, jumped=%d\n", \ -+ __LINE__, tid, jumped); \ -+ vg_assert(_qq_tst->sched_jmpbuf_valid); \ -+ _qq_tst->sched_jmpbuf_valid = False; \ -+ } while(0) -+ -+ -+/* Do various guest state alignment checks prior to running a thread. -+ Specifically, check that what we have matches Vex's guest state -+ layout requirements. See libvex.h for details, but in short the -+ requirements are: There must be no holes in between the primary -+ guest state, its two copies, and the spill area. In short, all 4 -+ areas must have a 16-aligned size and be 16-aligned, and placed -+ back-to-back. */ -+static void do_pre_run_checks ( ThreadState* tst ) -+{ -+ Addr a_vex = (Addr) & tst->arch.vex; -+ Addr a_vexsh1 = (Addr) & tst->arch.vex_shadow1; -+ Addr a_vexsh2 = (Addr) & tst->arch.vex_shadow2; -+ Addr a_spill = (Addr) & tst->arch.vex_spill; -+ UInt sz_vex = (UInt) sizeof tst->arch.vex; -+ UInt sz_vexsh1 = (UInt) sizeof tst->arch.vex_shadow1; -+ UInt sz_vexsh2 = (UInt) sizeof tst->arch.vex_shadow2; -+ UInt sz_spill = (UInt) sizeof tst->arch.vex_spill; -+ -+ if (0) -+ VG_(printf)("gst %p %d, sh1 %p %d, " -+ "sh2 %p %d, spill %p %d\n", -+ (void*)a_vex, sz_vex, -+ (void*)a_vexsh1, sz_vexsh1, -+ (void*)a_vexsh2, sz_vexsh2, -+ (void*)a_spill, sz_spill ); -+ -+ vg_assert(VG_IS_16_ALIGNED(sz_vex)); -+ vg_assert(VG_IS_16_ALIGNED(sz_vexsh1)); -+ vg_assert(VG_IS_16_ALIGNED(sz_vexsh2)); -+ vg_assert(VG_IS_16_ALIGNED(sz_spill)); -+ -+ vg_assert(VG_IS_16_ALIGNED(a_vex)); -+ vg_assert(VG_IS_16_ALIGNED(a_vexsh1)); -+ vg_assert(VG_IS_16_ALIGNED(a_vexsh2)); -+ vg_assert(VG_IS_16_ALIGNED(a_spill)); -+ -+ /* Check that the guest state and its two shadows have the same -+ size, and that there are no holes in between. The latter is -+ important because Memcheck assumes that it can reliably access -+ the shadows by indexing off a pointer to the start of the -+ primary guest state area. */ -+ vg_assert(sz_vex == sz_vexsh1); -+ vg_assert(sz_vex == sz_vexsh2); -+ vg_assert(a_vex + 1 * sz_vex == a_vexsh1); -+ vg_assert(a_vex + 2 * sz_vex == a_vexsh2); -+ /* Also check there's no hole between the second shadow area and -+ the spill area. */ -+ vg_assert(sz_spill == LibVEX_N_SPILL_BYTES); -+ vg_assert(a_vex + 3 * sz_vex == a_spill); -+ -+# if defined(VGA_amd64) -+ /* x86/amd64 XMM regs must form an array, ie, have no -+ holes in between. */ -+ vg_assert( -+ (offsetof(VexGuestAMD64State,guest_XMM16) -+ - offsetof(VexGuestAMD64State,guest_XMM0)) -+ == (17/*#regs*/-1) * 16/*bytes per reg*/ -+ ); -+# endif -+ -+# if defined(VGA_ppc32) || defined(VGA_ppc64) -+ /* ppc guest_state vector regs must be 16 byte aligned for -+ loads/stores. This is important! */ -+ vg_assert(VG_IS_16_ALIGNED(& tst->arch.vex.guest_VR0)); -+ vg_assert(VG_IS_16_ALIGNED(& tst->arch.vex_shadow1.guest_VR0)); -+ vg_assert(VG_IS_16_ALIGNED(& tst->arch.vex_shadow2.guest_VR0)); -+ /* be extra paranoid .. */ -+ vg_assert(VG_IS_16_ALIGNED(& tst->arch.vex.guest_VR1)); -+ vg_assert(VG_IS_16_ALIGNED(& tst->arch.vex_shadow1.guest_VR1)); -+ vg_assert(VG_IS_16_ALIGNED(& tst->arch.vex_shadow2.guest_VR1)); -+# endif -+ -+# if defined(VGA_arm) -+ /* arm guest_state VFP regs must be 8 byte aligned for -+ loads/stores. */ -+ vg_assert(VG_IS_8_ALIGNED(& tst->arch.vex.guest_D0)); -+ vg_assert(VG_IS_8_ALIGNED(& tst->arch.vex_shadow1.guest_D0)); -+ vg_assert(VG_IS_8_ALIGNED(& tst->arch.vex_shadow2.guest_D0)); -+ /* be extra paranoid .. */ -+ vg_assert(VG_IS_8_ALIGNED(& tst->arch.vex.guest_D1)); -+ vg_assert(VG_IS_8_ALIGNED(& tst->arch.vex_shadow1.guest_D1)); -+ vg_assert(VG_IS_8_ALIGNED(& tst->arch.vex_shadow2.guest_D1)); -+# endif -+} -+ -+ -+/* Run the thread tid for a while, and return a VG_TRC_* value -+ indicating why VG_(run_innerloop) stopped. */ -+static UInt run_thread_for_a_while ( ThreadId tid ) -+{ -+ volatile Int jumped; -+ volatile ThreadState* tst = NULL; /* stop gcc complaining */ -+ volatile UInt trc; -+ volatile Int dispatch_ctr_SAVED; -+ volatile Int done_this_time; -+ -+ /* Paranoia */ -+ vg_assert(VG_(is_valid_tid)(tid)); -+ vg_assert(VG_(is_running_thread)(tid)); -+ vg_assert(!VG_(is_exiting)(tid)); -+ -+ tst = VG_(get_ThreadState)(tid); -+ do_pre_run_checks( (ThreadState*)tst ); -+ /* end Paranoia */ -+ -+ trc = 0; -+ dispatch_ctr_SAVED = VG_(dispatch_ctr); -+ -+# if defined(VGP_ppc32_aix5) || defined(VGP_ppc64_aix5) -+ /* On AIX, we need to get a plausible value for SPRG3 for this -+ thread, since it's used I think as a thread-state pointer. It -+ is presumably set by the kernel for each dispatched thread and -+ cannot be changed by user space. It therefore seems safe enough -+ to copy the host's value of it into the guest state at the point -+ the thread is dispatched. -+ (Later): Hmm, looks like SPRG3 is only used in 32-bit mode. -+ Oh well. */ -+ { UWord host_sprg3; -+ __asm__ __volatile__( "mfspr %0,259\n" : "=b"(host_sprg3) ); -+ VG_(threads)[tid].arch.vex.guest_SPRG3_RO = host_sprg3; -+ vg_assert(sizeof(VG_(threads)[tid].arch.vex.guest_SPRG3_RO) == sizeof(void*)); -+ } -+# endif -+ -+ /* there should be no undealt-with signals */ -+ //vg_assert(VG_(threads)[tid].siginfo.si_signo == 0); -+ -+ if (0) { -+ vki_sigset_t m; -+ Int i, err = VG_(sigprocmask)(VKI_SIG_SETMASK, NULL, &m); -+ vg_assert(err == 0); -+ VG_(printf)("tid %d: entering code with unblocked signals: ", tid); -+ for (i = 1; i <= _VKI_NSIG; i++) -+ if (!VG_(sigismember)(&m, i)) -+ VG_(printf)("%d ", i); -+ VG_(printf)("\n"); -+ } -+ -+ // Tell the tool this thread is about to run client code -+ VG_TRACK( start_client_code, tid, bbs_done ); -+ -+ vg_assert(VG_(in_generated_code) == False); -+ VG_(in_generated_code) = True; -+ -+ SCHEDSETJMP( -+ tid, -+ jumped, -+ trc = (UInt)VG_(run_innerloop)( (void*)&tst->arch.vex, -+ VG_(clo_profile_flags) > 0 ? 1 : 0 ) -+ ); -+ -+ vg_assert(VG_(in_generated_code) == True); -+ VG_(in_generated_code) = False; -+ -+ if (jumped) { -+ /* We get here if the client took a fault that caused our signal -+ handler to longjmp. */ -+ vg_assert(trc == 0); -+ trc = VG_TRC_FAULT_SIGNAL; -+ block_signals(); -+ } -+ -+ done_this_time = (Int)dispatch_ctr_SAVED - (Int)VG_(dispatch_ctr) - 0; -+ -+ vg_assert(done_this_time >= 0); -+ bbs_done += (ULong)done_this_time; -+ -+ // Tell the tool this thread has stopped running client code -+ VG_TRACK( stop_client_code, tid, bbs_done ); -+ -+ return trc; -+} -+ -+ -+/* Run a no-redir translation just once, and return the resulting -+ VG_TRC_* value. */ -+static UInt run_noredir_translation ( Addr hcode, ThreadId tid ) -+{ -+ volatile Int jumped; -+ volatile ThreadState* tst; -+ volatile UWord argblock[4]; -+ volatile UInt retval; -+ -+ /* Paranoia */ -+ vg_assert(VG_(is_valid_tid)(tid)); -+ vg_assert(VG_(is_running_thread)(tid)); -+ vg_assert(!VG_(is_exiting)(tid)); -+ -+ tst = VG_(get_ThreadState)(tid); -+ do_pre_run_checks( (ThreadState*)tst ); -+ /* end Paranoia */ -+ -+# if defined(VGA_ppc32) || defined(VGA_ppc64) -+ /* I don't think we need to clear this thread's guest_RESVN here, -+ because we can only get here if run_thread_for_a_while() has -+ been used immediately before, on this same thread. */ -+# endif -+ -+ /* There can be 3 outcomes from VG_(run_a_noredir_translation): -+ -+ - a signal occurred and the sighandler longjmp'd. Then both [2] -+ and [3] are unchanged - hence zero. -+ -+ - translation ran normally, set [2] (next guest IP) and set [3] -+ to whatever [1] was beforehand, indicating a normal (boring) -+ jump to the next block. -+ -+ - translation ran normally, set [2] (next guest IP) and set [3] -+ to something different from [1] beforehand, which indicates a -+ TRC_ value. -+ */ -+ argblock[0] = (UWord)hcode; -+ argblock[1] = (UWord)&VG_(threads)[tid].arch.vex; -+ argblock[2] = 0; /* next guest IP is written here */ -+ argblock[3] = 0; /* guest state ptr afterwards is written here */ -+ -+ // Tell the tool this thread is about to run client code -+ VG_TRACK( start_client_code, tid, bbs_done ); -+ -+ vg_assert(VG_(in_generated_code) == False); -+ VG_(in_generated_code) = True; -+ -+ SCHEDSETJMP( -+ tid, -+ jumped, -+ VG_(run_a_noredir_translation)( &argblock[0] ) -+ ); -+ -+ VG_(in_generated_code) = False; -+ -+ if (jumped) { -+ /* We get here if the client took a fault that caused our signal -+ handler to longjmp. */ -+ vg_assert(argblock[2] == 0); /* next guest IP was not written */ -+ vg_assert(argblock[3] == 0); /* trc was not written */ -+ block_signals(); -+ retval = VG_TRC_FAULT_SIGNAL; -+ } else { -+ /* store away the guest program counter */ -+ VG_(set_IP)( tid, argblock[2] ); -+ if (argblock[3] == argblock[1]) -+ /* the guest state pointer afterwards was unchanged */ -+ retval = VG_TRC_BORING; -+ else -+ retval = (UInt)argblock[3]; -+ } -+ -+ bbs_done++; -+ -+ // Tell the tool this thread has stopped running client code -+ VG_TRACK( stop_client_code, tid, bbs_done ); -+ -+ return retval; -+} -+ -+ -+/* --------------------------------------------------------------------- -+ The scheduler proper. -+ ------------------------------------------------------------------ */ -+ -+static void handle_tt_miss ( ThreadId tid ) -+{ -+ Bool found; -+ Addr ip = VG_(get_IP)(tid); -+ -+ /* Trivial event. Miss in the fast-cache. Do a full -+ lookup for it. */ -+ found = VG_(search_transtab)( NULL, ip, True/*upd_fast_cache*/ ); -+ if (UNLIKELY(!found)) { -+ /* Not found; we need to request a translation. */ -+ if (VG_(translate)( tid, ip, /*debug*/False, 0/*not verbose*/, -+ bbs_done, True/*allow redirection*/ )) { -+ found = VG_(search_transtab)( NULL, ip, True ); -+ vg_assert2(found, "VG_TRC_INNER_FASTMISS: missing tt_fast entry"); -+ -+ } else { -+ // If VG_(translate)() fails, it's because it had to throw a -+ // signal because the client jumped to a bad address. That -+ // means that either a signal has been set up for delivery, -+ // or the thread has been marked for termination. Either -+ // way, we just need to go back into the scheduler loop. -+ } -+ } -+} -+ -+static void handle_syscall(ThreadId tid, UInt trc) -+{ -+ ThreadState * volatile tst = VG_(get_ThreadState)(tid); -+ Bool jumped; -+ -+ /* Syscall may or may not block; either way, it will be -+ complete by the time this call returns, and we'll be -+ runnable again. We could take a signal while the -+ syscall runs. */ -+ -+ if (VG_(clo_sanity_level >= 3)) -+ VG_(am_do_sync_check)("(BEFORE SYSCALL)",__FILE__,__LINE__); -+ -+ SCHEDSETJMP(tid, jumped, VG_(client_syscall)(tid, trc)); -+ -+ if (VG_(clo_sanity_level >= 3)) -+ VG_(am_do_sync_check)("(AFTER SYSCALL)",__FILE__,__LINE__); -+ -+ if (!VG_(is_running_thread)(tid)) -+ VG_(printf)("tid %d not running; VG_(running_tid)=%d, tid %d status %d\n", -+ tid, VG_(running_tid), tid, tst->status); -+ vg_assert(VG_(is_running_thread)(tid)); -+ -+ if (jumped) { -+ block_signals(); -+ VG_(poll_signals)(tid); -+ } -+} -+ -+/* tid just requested a jump to the noredir version of its current -+ program counter. So make up that translation if needed, run it, -+ and return the resulting thread return code. */ -+static UInt/*trc*/ handle_noredir_jump ( ThreadId tid ) -+{ -+ AddrH hcode = 0; -+ Addr ip = VG_(get_IP)(tid); -+ -+ Bool found = VG_(search_unredir_transtab)( &hcode, ip ); -+ if (!found) { -+ /* Not found; we need to request a translation. */ -+ if (VG_(translate)( tid, ip, /*debug*/False, 0/*not verbose*/, bbs_done, -+ False/*NO REDIRECTION*/ )) { -+ -+ found = VG_(search_unredir_transtab)( &hcode, ip ); -+ vg_assert2(found, "unredir translation missing after creation?!"); -+ -+ } else { -+ // If VG_(translate)() fails, it's because it had to throw a -+ // signal because the client jumped to a bad address. That -+ // means that either a signal has been set up for delivery, -+ // or the thread has been marked for termination. Either -+ // way, we just need to go back into the scheduler loop. -+ return VG_TRC_BORING; -+ } -+ -+ } -+ -+ vg_assert(found); -+ vg_assert(hcode != 0); -+ -+ /* Otherwise run it and return the resulting VG_TRC_* value. */ -+ return run_noredir_translation( hcode, tid ); -+} -+ -+ -+/* -+ Run a thread until it wants to exit. -+ -+ We assume that the caller has already called VG_(acquire_BigLock) for -+ us, so we own the VCPU. Also, all signals are blocked. -+ */ -+VgSchedReturnCode VG_(scheduler) ( ThreadId tid ) -+{ -+ UInt trc; -+ ThreadState *tst = VG_(get_ThreadState)(tid); -+ -+ if (VG_(clo_trace_sched)) -+ print_sched_event(tid, "entering VG_(scheduler)"); -+ -+ /* set the proper running signal mask */ -+ block_signals(); -+ -+ vg_assert(VG_(is_running_thread)(tid)); -+ -+ VG_(dispatch_ctr) = SCHEDULING_QUANTUM + 1; -+ -+ while (!VG_(is_exiting)(tid)) { -+ -+ if (VG_(dispatch_ctr) == 1) { -+ -+# if defined(VGP_ppc32_aix5) || defined(VGP_ppc64_aix5) -+ /* Note: count runnable threads before dropping The Lock. */ -+ Int rt = VG_(count_runnable_threads)(); -+# endif -+ -+ /* Our slice is done, so yield the CPU to another thread. On -+ Linux, this doesn't sleep between sleeping and running, -+ since that would take too much time. On AIX, we have to -+ prod the scheduler to get it consider other threads; not -+ doing so appears to cause very long delays before other -+ runnable threads get rescheduled. */ -+ -+ /* 4 July 06: it seems that a zero-length nsleep is needed to -+ cause async thread cancellation (canceller.c) to terminate -+ in finite time; else it is in some kind of race/starvation -+ situation and completion is arbitrarily delayed (although -+ this is not a deadlock). -+ -+ Unfortunately these sleeps cause MPI jobs not to terminate -+ sometimes (some kind of livelock). So sleeping once -+ every N opportunities appears to work. */ -+ -+ /* 3 Aug 06: doing sys__nsleep works but crashes some apps. -+ sys_yield also helps the problem, whilst not crashing apps. */ -+ -+ VG_(release_BigLock)(tid, VgTs_Yielding, -+ "VG_(scheduler):timeslice"); -+ /* ------------ now we don't have The Lock ------------ */ -+ -+# if defined(VGP_ppc32_aix5) || defined(VGP_ppc64_aix5) -+ { static Int ctr=0; -+ vg_assert(__NR_AIX5__nsleep != __NR_AIX5_UNKNOWN); -+ vg_assert(__NR_AIX5_yield != __NR_AIX5_UNKNOWN); -+ if (1 && rt > 0 && ((++ctr % 3) == 0)) { -+ //struct vki_timespec ts; -+ //ts.tv_sec = 0; -+ //ts.tv_nsec = 0*1000*1000; -+ //VG_(do_syscall2)(__NR_AIX5__nsleep, (UWord)&ts, (UWord)NULL); -+ VG_(do_syscall0)(__NR_AIX5_yield); -+ } -+ } -+# endif -+ -+ VG_(acquire_BigLock)(tid, "VG_(scheduler):timeslice"); -+ /* ------------ now we do have The Lock ------------ */ -+ -+ /* OK, do some relatively expensive housekeeping stuff */ -+ scheduler_sanity(tid); -+ VG_(sanity_check_general)(False); -+ -+ /* Look for any pending signals for this thread, and set them up -+ for delivery */ -+ VG_(poll_signals)(tid); -+ -+ if (VG_(is_exiting)(tid)) -+ break; /* poll_signals picked up a fatal signal */ -+ -+ /* For stats purposes only. */ -+ n_scheduling_events_MAJOR++; -+ -+ /* Figure out how many bbs to ask vg_run_innerloop to do. Note -+ that it decrements the counter before testing it for zero, so -+ that if tst->dispatch_ctr is set to N you get at most N-1 -+ iterations. Also this means that tst->dispatch_ctr must -+ exceed zero before entering the innerloop. Also also, the -+ decrement is done before the bb is actually run, so you -+ always get at least one decrement even if nothing happens. */ -+ VG_(dispatch_ctr) = SCHEDULING_QUANTUM + 1; -+ -+ /* paranoia ... */ -+ vg_assert(tst->tid == tid); -+ vg_assert(tst->os_state.lwpid == VG_(gettid)()); -+ } -+ -+ /* For stats purposes only. */ -+ n_scheduling_events_MINOR++; -+ -+ if (0) -+ VG_(message)(Vg_DebugMsg, "thread %d: running for %d bbs\n", -+ tid, VG_(dispatch_ctr) - 1 ); -+ -+ trc = run_thread_for_a_while ( tid ); -+ -+ if (VG_(clo_trace_sched) && VG_(clo_verbosity) > 2) { -+ Char buf[50]; -+ VG_(sprintf)(buf, "TRC: %s", name_of_sched_event(trc)); -+ print_sched_event(tid, buf); -+ } -+ -+ if (trc == VEX_TRC_JMP_NOREDIR) { -+ /* If we got a request to run a no-redir version of -+ something, do so now -- handle_noredir_jump just (creates -+ and) runs that one translation. The flip side is that the -+ noredir translation can't itself return another noredir -+ request -- that would be nonsensical. It can, however, -+ return VG_TRC_BORING, which just means keep going as -+ normal. */ -+ trc = handle_noredir_jump(tid); -+ vg_assert(trc != VEX_TRC_JMP_NOREDIR); -+ } -+ -+ switch (trc) { -+ case VG_TRC_BORING: -+ /* no special event, just keep going. */ -+ break; -+ -+ case VG_TRC_INNER_FASTMISS: -+ vg_assert(VG_(dispatch_ctr) > 1); -+ handle_tt_miss(tid); -+ break; -+ -+ case VEX_TRC_JMP_CLIENTREQ: -+ do_client_request(tid); -+ break; -+ -+ case VEX_TRC_JMP_SYS_INT128: /* x86-linux */ -+ case VEX_TRC_JMP_SYS_INT129: /* x86-darwin */ -+ case VEX_TRC_JMP_SYS_INT130: /* x86-darwin */ -+ case VEX_TRC_JMP_SYS_SYSCALL: /* amd64-linux, ppc32-linux, amd64-darwin */ -+ handle_syscall(tid, trc); -+ if (VG_(clo_sanity_level) > 2) -+ VG_(sanity_check_general)(True); /* sanity-check every syscall */ -+ break; -+ -+ case VEX_TRC_JMP_YIELD: -+ /* Explicit yield, because this thread is in a spin-lock -+ or something. Only let the thread run for a short while -+ longer. Because swapping to another thread is expensive, -+ we're prepared to let this thread eat a little more CPU -+ before swapping to another. That means that short term -+ spins waiting for hardware to poke memory won't cause a -+ thread swap. */ -+ if (VG_(dispatch_ctr) > 2000) -+ VG_(dispatch_ctr) = 2000; -+ break; -+ -+ case VG_TRC_INNER_COUNTERZERO: -+ /* Timeslice is out. Let a new thread be scheduled. */ -+ vg_assert(VG_(dispatch_ctr) == 1); -+ break; -+ -+ case VG_TRC_FAULT_SIGNAL: -+ /* Everything should be set up (either we're exiting, or -+ about to start in a signal handler). */ -+ break; -+ -+ case VEX_TRC_JMP_MAPFAIL: -+ /* Failure of arch-specific address translation (x86/amd64 -+ segment override use) */ -+ /* jrs 2005 03 11: is this correct? */ -+ VG_(synth_fault)(tid); -+ break; -+ -+ case VEX_TRC_JMP_EMWARN: { -+ static Int counts[EmWarn_NUMBER]; -+ static Bool counts_initted = False; -+ VexEmWarn ew; -+ HChar* what; -+ Bool show; -+ Int q; -+ if (!counts_initted) { -+ counts_initted = True; -+ for (q = 0; q < EmWarn_NUMBER; q++) -+ counts[q] = 0; -+ } -+ ew = (VexEmWarn)VG_(threads)[tid].arch.vex.guest_EMWARN; -+ what = (ew < 0 || ew >= EmWarn_NUMBER) -+ ? "unknown (?!)" -+ : LibVEX_EmWarn_string(ew); -+ show = (ew < 0 || ew >= EmWarn_NUMBER) -+ ? True -+ : counts[ew]++ < 3; -+ if (show && VG_(clo_show_emwarns) && !VG_(clo_xml)) { -+ VG_(message)( Vg_UserMsg, -+ "Emulation warning: unsupported action:\n"); -+ VG_(message)( Vg_UserMsg, " %s\n", what); -+ VG_(get_and_pp_StackTrace)( tid, VG_(clo_backtrace_size) ); -+ } -+ break; -+ } -+ -+ case VEX_TRC_JMP_EMFAIL: { -+ VexEmWarn ew; -+ HChar* what; -+ ew = (VexEmWarn)VG_(threads)[tid].arch.vex.guest_EMWARN; -+ what = (ew < 0 || ew >= EmWarn_NUMBER) -+ ? "unknown (?!)" -+ : LibVEX_EmWarn_string(ew); -+ VG_(message)( Vg_UserMsg, -+ "Emulation fatal error -- Valgrind cannot continue:\n"); -+ VG_(message)( Vg_UserMsg, " %s\n", what); -+ VG_(get_and_pp_StackTrace)( tid, VG_(clo_backtrace_size) ); -+ VG_(message)(Vg_UserMsg, "\n"); -+ VG_(message)(Vg_UserMsg, "Valgrind has to exit now. Sorry.\n"); -+ VG_(message)(Vg_UserMsg, "\n"); -+ VG_(exit)(1); -+ break; -+ } -+ -+ case VEX_TRC_JMP_SIGTRAP: -+ VG_(synth_sigtrap)(tid); -+ break; -+ -+ case VEX_TRC_JMP_SIGSEGV: -+ VG_(synth_fault)(tid); -+ break; -+ -+ case VEX_TRC_JMP_SIGBUS: -+ VG_(synth_sigbus)(tid); -+ break; -+ -+ case VEX_TRC_JMP_NODECODE: -+ VG_(umsg)( -+ "valgrind: Unrecognised instruction at address %#lx.\n", -+ VG_(get_IP)(tid)); -+#define M(a) VG_(umsg)(a "\n"); -+ M("Your program just tried to execute an instruction that Valgrind" ); -+ M("did not recognise. There are two possible reasons for this." ); -+ M("1. Your program has a bug and erroneously jumped to a non-code" ); -+ M(" location. If you are running Memcheck and you just saw a" ); -+ M(" warning about a bad jump, it's probably your program's fault."); -+ M("2. The instruction is legitimate but Valgrind doesn't handle it,"); -+ M(" i.e. it's Valgrind's fault. If you think this is the case or"); -+ M(" you are not sure, please let us know and we'll try to fix it."); -+ M("Either way, Valgrind will now raise a SIGILL signal which will" ); -+ M("probably kill your program." ); -+#undef M -+ VG_(synth_sigill)(tid, VG_(get_IP)(tid)); -+ break; -+ -+ case VEX_TRC_JMP_TINVAL: -+ VG_(discard_translations)( -+ (Addr64)VG_(threads)[tid].arch.vex.guest_TISTART, -+ VG_(threads)[tid].arch.vex.guest_TILEN, -+ "scheduler(VEX_TRC_JMP_TINVAL)" -+ ); -+ if (0) -+ VG_(printf)("dump translations done.\n"); -+ break; -+ -+ case VG_TRC_INVARIANT_FAILED: -+ /* This typically happens if, after running generated code, -+ it is detected that host CPU settings (eg, FPU/Vector -+ control words) are not as they should be. Vex's code -+ generation specifies the state such control words should -+ be in on entry to Vex-generated code, and they should be -+ unchanged on exit from it. Failure of this assertion -+ usually means a bug in Vex's code generation. */ -+ //{ UInt xx; -+ // __asm__ __volatile__ ( -+ // "\t.word 0xEEF12A10\n" // fmrx r2,fpscr -+ // "\tmov %0, r2" : "=r"(xx) : : "r2" ); -+ // VG_(printf)("QQQQ new fpscr = %08x\n", xx); -+ //} -+ vg_assert2(0, "VG_(scheduler), phase 3: " -+ "run_innerloop detected host " -+ "state invariant failure", trc); -+ -+ case VEX_TRC_JMP_SYS_SYSENTER: -+ /* Do whatever simulation is appropriate for an x86 sysenter -+ instruction. Note that it is critical to set this thread's -+ guest_EIP to point at the code to execute after the -+ sysenter, since Vex-generated code will not have set it -- -+ vex does not know what it should be. Vex sets the next -+ address to zero, so if you don't set guest_EIP, the thread -+ will jump to zero afterwards and probably die as a result. */ -+# if defined(VGP_x86_linux) -+ vg_assert2(0, "VG_(scheduler), phase 3: " -+ "sysenter_x86 on x86-linux is not supported"); -+# elif defined(VGP_x86_darwin) -+ /* return address in client edx */ -+ VG_(threads)[tid].arch.vex.guest_EIP -+ = VG_(threads)[tid].arch.vex.guest_EDX; -+ handle_syscall(tid, trc); -+# else -+ vg_assert2(0, "VG_(scheduler), phase 3: " -+ "sysenter_x86 on non-x86 platform?!?!"); -+# endif -+ break; -+ -+ default: -+ vg_assert2(0, "VG_(scheduler), phase 3: " -+ "unexpected thread return code (%u)", trc); -+ /* NOTREACHED */ -+ break; -+ -+ } /* switch (trc) */ -+ } -+ -+ if (VG_(clo_trace_sched)) -+ print_sched_event(tid, "exiting VG_(scheduler)"); -+ -+ vg_assert(VG_(is_exiting)(tid)); -+ -+ return tst->exitreason; -+} -+ -+ -+/* -+ This causes all threads to forceably exit. They aren't actually -+ dead by the time this returns; you need to call -+ VG_(reap_threads)() to wait for them. -+ */ -+void VG_(nuke_all_threads_except) ( ThreadId me, VgSchedReturnCode src ) -+{ -+ ThreadId tid; -+ -+ vg_assert(VG_(is_running_thread)(me)); -+ -+ for (tid = 1; tid < VG_N_THREADS; tid++) { -+ if (tid == me -+ || VG_(threads)[tid].status == VgTs_Empty) -+ continue; -+ if (0) -+ VG_(printf)( -+ "VG_(nuke_all_threads_except): nuking tid %d\n", tid); -+ -+ VG_(threads)[tid].exitreason = src; -+ if (src == VgSrc_FatalSig) -+ VG_(threads)[tid].os_state.fatalsig = VKI_SIGKILL; -+ VG_(get_thread_out_of_syscall)(tid); -+ } -+} -+ -+ -+/* --------------------------------------------------------------------- -+ Specifying shadow register values -+ ------------------------------------------------------------------ */ -+ -+#if defined(VGA_x86) -+# define VG_CLREQ_ARGS guest_EAX -+# define VG_CLREQ_RET guest_EDX -+#elif defined(VGA_amd64) -+# define VG_CLREQ_ARGS guest_RAX -+# define VG_CLREQ_RET guest_RDX -+#elif defined(VGA_ppc32) || defined(VGA_ppc64) -+# define VG_CLREQ_ARGS guest_GPR4 -+# define VG_CLREQ_RET guest_GPR3 -+#elif defined(VGA_arm) -+# define VG_CLREQ_ARGS guest_R4 -+# define VG_CLREQ_RET guest_R3 -+#else -+# error Unknown arch -+#endif -+ -+#define CLREQ_ARGS(regs) ((regs).vex.VG_CLREQ_ARGS) -+#define CLREQ_RET(regs) ((regs).vex.VG_CLREQ_RET) -+#define O_CLREQ_RET (offsetof(VexGuestArchState, VG_CLREQ_RET)) -+ -+// These macros write a value to a client's thread register, and tell the -+// tool that it's happened (if necessary). -+ -+#define SET_CLREQ_RETVAL(zztid, zzval) \ -+ do { CLREQ_RET(VG_(threads)[zztid].arch) = (zzval); \ -+ VG_TRACK( post_reg_write, \ -+ Vg_CoreClientReq, zztid, O_CLREQ_RET, sizeof(UWord)); \ -+ } while (0) -+ -+#define SET_CLCALL_RETVAL(zztid, zzval, f) \ -+ do { CLREQ_RET(VG_(threads)[zztid].arch) = (zzval); \ -+ VG_TRACK( post_reg_write_clientcall_return, \ -+ zztid, O_CLREQ_RET, sizeof(UWord), f); \ -+ } while (0) -+ -+ -+/* --------------------------------------------------------------------- -+ Handle client requests. -+ ------------------------------------------------------------------ */ -+ -+// OS-specific(?) client requests -+static Bool os_client_request(ThreadId tid, UWord *args) -+{ -+ Bool handled = True; -+ -+ vg_assert(VG_(is_running_thread)(tid)); -+ -+ switch(args[0]) { -+ case VG_USERREQ__LIBC_FREERES_DONE: -+ /* This is equivalent to an exit() syscall, but we don't set the -+ exitcode (since it might already be set) */ -+ if (0 || VG_(clo_trace_syscalls) || VG_(clo_trace_sched)) -+ VG_(message)(Vg_DebugMsg, -+ "__libc_freeres() done; really quitting!\n"); -+ VG_(threads)[tid].exitreason = VgSrc_ExitThread; -+ break; -+ -+ default: -+ handled = False; -+ break; -+ } -+ -+ return handled; -+} -+ -+ -+/* Do a client request for the thread tid. After the request, tid may -+ or may not still be runnable; if not, the scheduler will have to -+ choose a new thread to run. -+*/ -+static -+void do_client_request ( ThreadId tid ) -+{ -+ UWord* arg = (UWord*)(CLREQ_ARGS(VG_(threads)[tid].arch)); -+ UWord req_no = arg[0]; -+ -+ if (0) -+ VG_(printf)("req no = 0x%llx, arg = %p\n", (ULong)req_no, arg); -+ switch (req_no) { -+ -+ case VG_USERREQ__CLIENT_CALL0: { -+ UWord (*f)(ThreadId) = (void*)arg[1]; -+ if (f == NULL) -+ VG_(message)(Vg_DebugMsg, "VG_USERREQ__CLIENT_CALL0: func=%p\n", f); -+ else -+ SET_CLCALL_RETVAL(tid, f ( tid ), (Addr)f); -+ break; -+ } -+ case VG_USERREQ__CLIENT_CALL1: { -+ UWord (*f)(ThreadId, UWord) = (void*)arg[1]; -+ if (f == NULL) -+ VG_(message)(Vg_DebugMsg, "VG_USERREQ__CLIENT_CALL1: func=%p\n", f); -+ else -+ SET_CLCALL_RETVAL(tid, f ( tid, arg[2] ), (Addr)f ); -+ break; -+ } -+ case VG_USERREQ__CLIENT_CALL2: { -+ UWord (*f)(ThreadId, UWord, UWord) = (void*)arg[1]; -+ if (f == NULL) -+ VG_(message)(Vg_DebugMsg, "VG_USERREQ__CLIENT_CALL2: func=%p\n", f); -+ else -+ SET_CLCALL_RETVAL(tid, f ( tid, arg[2], arg[3] ), (Addr)f ); -+ break; -+ } -+ case VG_USERREQ__CLIENT_CALL3: { -+ UWord (*f)(ThreadId, UWord, UWord, UWord) = (void*)arg[1]; -+ if (f == NULL) -+ VG_(message)(Vg_DebugMsg, "VG_USERREQ__CLIENT_CALL3: func=%p\n", f); -+ else -+ SET_CLCALL_RETVAL(tid, f ( tid, arg[2], arg[3], arg[4] ), (Addr)f ); -+ break; -+ } -+ -+ // Nb: this looks like a circular definition, because it kind of is. -+ // See comment in valgrind.h to understand what's going on. -+ case VG_USERREQ__RUNNING_ON_VALGRIND: -+ SET_CLREQ_RETVAL(tid, RUNNING_ON_VALGRIND+1); -+ break; -+ -+ case VG_USERREQ__PRINTF: { -+ /* JRS 2010-Jan-28: this is DEPRECATED; use the -+ _VALIST_BY_REF version instead */ -+ if (sizeof(va_list) != sizeof(UWord)) -+ goto va_list_casting_error_NORETURN; -+ union { -+ va_list vargs; -+ unsigned long uw; -+ } u; -+ u.uw = (unsigned long)arg[2]; -+ Int count = -+ VG_(vmessage)( Vg_ClientMsg, (char *)arg[1], u.vargs ); -+ VG_(message_flush)(); -+ SET_CLREQ_RETVAL( tid, count ); -+ break; -+ } -+ -+ case VG_USERREQ__PRINTF_BACKTRACE: { -+ /* JRS 2010-Jan-28: this is DEPRECATED; use the -+ _VALIST_BY_REF version instead */ -+ if (sizeof(va_list) != sizeof(UWord)) -+ goto va_list_casting_error_NORETURN; -+ union { -+ va_list vargs; -+ unsigned long uw; -+ } u; -+ u.uw = (unsigned long)arg[2]; -+ Int count = -+ VG_(vmessage)( Vg_ClientMsg, (char *)arg[1], u.vargs ); -+ VG_(message_flush)(); -+ VG_(get_and_pp_StackTrace)( tid, VG_(clo_backtrace_size) ); -+ SET_CLREQ_RETVAL( tid, count ); -+ break; -+ } -+ -+ case VG_USERREQ__PRINTF_VALIST_BY_REF: { -+ va_list* vargsp = (va_list*)arg[2]; -+ Int count = -+ VG_(vmessage)( Vg_ClientMsg, (char *)arg[1], *vargsp ); -+ VG_(message_flush)(); -+ SET_CLREQ_RETVAL( tid, count ); -+ break; -+ } -+ -+ case VG_USERREQ__PRINTF_BACKTRACE_VALIST_BY_REF: { -+ va_list* vargsp = (va_list*)arg[2]; -+ Int count = -+ VG_(vmessage)( Vg_ClientMsg, (char *)arg[1], *vargsp ); -+ VG_(message_flush)(); -+ VG_(get_and_pp_StackTrace)( tid, VG_(clo_backtrace_size) ); -+ SET_CLREQ_RETVAL( tid, count ); -+ break; -+ } -+ -+ case VG_USERREQ__INTERNAL_PRINTF_VALIST_BY_REF: { -+ va_list* vargsp = (va_list*)arg[2]; -+ Int count = -+ VG_(vmessage)( Vg_DebugMsg, (char *)arg[1], *vargsp ); -+ VG_(message_flush)(); -+ SET_CLREQ_RETVAL( tid, count ); -+ break; -+ } -+ -+ case VG_USERREQ__ADD_IFUNC_TARGET: { -+ VG_(redir_add_ifunc_target)( arg[1], arg[2] ); -+ SET_CLREQ_RETVAL( tid, 0); -+ break; } -+ -+ case VG_USERREQ__STACK_REGISTER: { -+ UWord sid = VG_(register_stack)((Addr)arg[1], (Addr)arg[2]); -+ SET_CLREQ_RETVAL( tid, sid ); -+ break; } -+ -+ case VG_USERREQ__STACK_DEREGISTER: { -+ VG_(deregister_stack)(arg[1]); -+ SET_CLREQ_RETVAL( tid, 0 ); /* return value is meaningless */ -+ break; } -+ -+ case VG_USERREQ__STACK_CHANGE: { -+ VG_(change_stack)(arg[1], (Addr)arg[2], (Addr)arg[3]); -+ SET_CLREQ_RETVAL( tid, 0 ); /* return value is meaningless */ -+ break; } -+ -+ case VG_USERREQ__GET_MALLOCFUNCS: { -+ struct vg_mallocfunc_info *info = (struct vg_mallocfunc_info *)arg[1]; -+ -+ info->tl_malloc = VG_(tdict).tool_malloc; -+ info->tl_calloc = VG_(tdict).tool_calloc; -+ info->tl_realloc = VG_(tdict).tool_realloc; -+ info->tl_memalign = VG_(tdict).tool_memalign; -+ info->tl___builtin_new = VG_(tdict).tool___builtin_new; -+ info->tl___builtin_vec_new = VG_(tdict).tool___builtin_vec_new; -+ info->tl_free = VG_(tdict).tool_free; -+ info->tl___builtin_delete = VG_(tdict).tool___builtin_delete; -+ info->tl___builtin_vec_delete = VG_(tdict).tool___builtin_vec_delete; -+ info->tl_malloc_usable_size = VG_(tdict).tool_malloc_usable_size; -+ -+ info->mallinfo = VG_(mallinfo); -+ info->clo_trace_malloc = VG_(clo_trace_malloc); -+ -+ SET_CLREQ_RETVAL( tid, 0 ); /* return value is meaningless */ -+ -+ break; -+ } -+ -+ /* Requests from the client program */ -+ -+ case VG_USERREQ__DISCARD_TRANSLATIONS: -+ if (VG_(clo_verbosity) > 2) -+ VG_(printf)( "client request: DISCARD_TRANSLATIONS," -+ " addr %p, len %lu\n", -+ (void*)arg[1], arg[2] ); -+ -+ VG_(discard_translations)( -+ arg[1], arg[2], "scheduler(VG_USERREQ__DISCARD_TRANSLATIONS)" -+ ); -+ -+ SET_CLREQ_RETVAL( tid, 0 ); /* return value is meaningless */ -+ break; -+ -+ case VG_USERREQ__COUNT_ERRORS: -+ SET_CLREQ_RETVAL( tid, VG_(get_n_errs_found)() ); -+ break; -+ -+ case VG_USERREQ__LOAD_PDB_DEBUGINFO: -+ VG_(di_notify_pdb_debuginfo)( arg[1], arg[2], arg[3], arg[4] ); -+ SET_CLREQ_RETVAL( tid, 0 ); /* return value is meaningless */ -+ break; -+ -+ case VG_USERREQ__MAP_IP_TO_SRCLOC: { -+ Addr ip = arg[1]; -+ UChar* buf64 = (UChar*)arg[2]; -+ -+ VG_(memset)(buf64, 0, 64); -+ UInt linenum = 0; -+ Bool ok = VG_(get_filename_linenum)( -+ ip, &buf64[0], 50, NULL, 0, NULL, &linenum -+ ); -+ if (ok) { -+ /* Find the terminating zero in the first 50 bytes. */ -+ UInt i; -+ for (i = 0; i < 50; i++) { -+ if (buf64[i] == 0) -+ break; -+ } -+ /* We must find a zero somewhere in 0 .. 49. Else -+ VG_(get_filename_linenum) is not properly zero -+ terminating. */ -+ vg_assert(i < 50); -+ VG_(sprintf)(&buf64[i], ":%u", linenum); -+ } else { -+ buf64[0] = 0; -+ } -+ -+ SET_CLREQ_RETVAL( tid, 0 ); /* return value is meaningless */ -+ break; -+ } -+ -+ case VG_USERREQ__MALLOCLIKE_BLOCK: -+ case VG_USERREQ__FREELIKE_BLOCK: -+ // Ignore them if the addr is NULL; otherwise pass onto the tool. -+ if (!arg[1]) { -+ SET_CLREQ_RETVAL( tid, 0 ); /* return value is meaningless */ -+ break; -+ } else { -+ goto my_default; -+ } -+ -+ default: -+ my_default: -+ if (os_client_request(tid, arg)) { -+ // do nothing, os_client_request() handled it -+ } else if (VG_(needs).client_requests) { -+ UWord ret; -+ -+ if (VG_(clo_verbosity) > 2) -+ VG_(printf)("client request: code %lx, addr %p, len %lu\n", -+ arg[0], (void*)arg[1], arg[2] ); -+ -+ if ( VG_TDICT_CALL(tool_handle_client_request, tid, arg, &ret) ) -+ SET_CLREQ_RETVAL(tid, ret); -+ } else { -+ static Bool whined = False; -+ -+ if (!whined && VG_(clo_verbosity) > 2) { -+ // Allow for requests in core, but defined by tools, which -+ // have 0 and 0 in their two high bytes. -+ Char c1 = (arg[0] >> 24) & 0xff; -+ Char c2 = (arg[0] >> 16) & 0xff; -+ if (c1 == 0) c1 = '_'; -+ if (c2 == 0) c2 = '_'; -+ VG_(message)(Vg_UserMsg, "Warning:\n" -+ " unhandled client request: 0x%lx (%c%c+0x%lx). Perhaps\n" -+ " VG_(needs).client_requests should be set?\n", -+ arg[0], c1, c2, arg[0] & 0xffff); -+ whined = True; -+ } -+ } -+ break; -+ } -+ return; -+ -+ /*NOTREACHED*/ -+ va_list_casting_error_NORETURN: -+ VG_(umsg)( -+ "Valgrind: fatal error - cannot continue: use of the deprecated\n" -+ "client requests VG_USERREQ__PRINTF or VG_USERREQ__PRINTF_BACKTRACE\n" -+ "on a platform where they cannot be supported. Please use the\n" -+ "equivalent _VALIST_BY_REF versions instead.\n" -+ "\n" -+ "This is a binary-incompatible change in Valgrind's client request\n" -+ "mechanism. It is unfortunate, but difficult to avoid. End-users\n" -+ "are expected to almost never see this message. The only case in\n" -+ "which you might see this message is if your code uses the macros\n" -+ "VALGRIND_PRINTF or VALGRIND_PRINTF_BACKTRACE. If so, you will need\n" -+ "to recompile such code, using the header files from this version of\n" -+ "Valgrind, and not any previous version.\n" -+ "\n" -+ "If you see this mesage in any other circumstances, it is probably\n" -+ "a bug in Valgrind. In this case, please file a bug report at\n" -+ "\n" -+ " http://www.valgrind.org/support/bug_reports.html\n" -+ "\n" -+ "Will now abort.\n" -+ ); -+ vg_assert(0); -+} -+ -+ -+/* --------------------------------------------------------------------- -+ Sanity checking (permanently engaged) -+ ------------------------------------------------------------------ */ -+ -+/* Internal consistency checks on the sched structures. */ -+static -+void scheduler_sanity ( ThreadId tid ) -+{ -+ Bool bad = False; -+ static UInt lasttime = 0; -+ UInt now; -+ Int lwpid = VG_(gettid)(); -+ -+ if (!VG_(is_running_thread)(tid)) { -+ VG_(message)(Vg_DebugMsg, -+ "Thread %d is supposed to be running, " -+ "but doesn't own the_BigLock (owned by %d)\n", -+ tid, VG_(running_tid)); -+ bad = True; -+ } -+ -+ if (lwpid != VG_(threads)[tid].os_state.lwpid) { -+ VG_(message)(Vg_DebugMsg, -+ "Thread %d supposed to be in LWP %d, but we're actually %d\n", -+ tid, VG_(threads)[tid].os_state.lwpid, VG_(gettid)()); -+ bad = True; -+ } -+ -+#if !defined(VGO_darwin) -+ // GrP fixme -+ if (lwpid != the_BigLock.owner_lwpid) { -+ VG_(message)(Vg_DebugMsg, -+ "Thread (LWPID) %d doesn't own the_BigLock\n", -+ tid); -+ bad = True; -+ } -+#endif -+ -+ /* Periodically show the state of all threads, for debugging -+ purposes. */ -+ now = VG_(read_millisecond_timer)(); -+ if (0 && (!bad) && (lasttime + 4000/*ms*/ <= now)) { -+ lasttime = now; -+ VG_(printf)("\n------------ Sched State at %d ms ------------\n", -+ (Int)now); -+ VG_(show_sched_status)(); -+ } -+ -+ /* core_panic also shows the sched status, which is why we don't -+ show it above if bad==True. */ -+ if (bad) -+ VG_(core_panic)("scheduler_sanity: failed"); -+} -+ -+void VG_(sanity_check_general) ( Bool force_expensive ) -+{ -+ ThreadId tid; -+ -+ static UInt next_slow_check_at = 1; -+ static UInt slow_check_interval = 25; -+ -+ if (VG_(clo_sanity_level) < 1) return; -+ -+ /* --- First do all the tests that we can do quickly. ---*/ -+ -+ sanity_fast_count++; -+ -+ /* Check stuff pertaining to the memory check system. */ -+ -+ /* Check that nobody has spuriously claimed that the first or -+ last 16 pages of memory have become accessible [...] */ -+ if (VG_(needs).sanity_checks) { -+ vg_assert(VG_TDICT_CALL(tool_cheap_sanity_check)); -+ } -+ -+ /* --- Now some more expensive checks. ---*/ -+ -+ /* Once every now and again, check some more expensive stuff. -+ Gradually increase the interval between such checks so as not to -+ burden long-running programs too much. */ -+ if ( force_expensive -+ || VG_(clo_sanity_level) > 1 -+ || (VG_(clo_sanity_level) == 1 -+ && sanity_fast_count == next_slow_check_at)) { -+ -+ if (0) VG_(printf)("SLOW at %d\n", sanity_fast_count-1); -+ -+ next_slow_check_at = sanity_fast_count - 1 + slow_check_interval; -+ slow_check_interval++; -+ sanity_slow_count++; -+ -+ if (VG_(needs).sanity_checks) { -+ vg_assert(VG_TDICT_CALL(tool_expensive_sanity_check)); -+ } -+ -+ /* Look for stack overruns. Visit all threads. */ -+ for (tid = 1; tid < VG_N_THREADS; tid++) { -+ SizeT remains; -+ VgStack* stack; -+ -+ if (VG_(threads)[tid].status == VgTs_Empty || -+ VG_(threads)[tid].status == VgTs_Zombie) -+ continue; -+ -+ stack -+ = (VgStack*) -+ VG_(get_ThreadState)(tid)->os_state.valgrind_stack_base; -+ SizeT limit -+ = 4096; // Let's say. Checking more causes lots of L2 misses. -+ remains -+ = VG_(am_get_VgStack_unused_szB)(stack, limit); -+ if (remains < limit) -+ VG_(message)(Vg_DebugMsg, -+ "WARNING: Thread %d is within %ld bytes " -+ "of running out of stack!\n", -+ tid, remains); -+ } -+ } -+ -+ if (VG_(clo_sanity_level) > 1) { -+ /* Check sanity of the low-level memory manager. Note that bugs -+ in the client's code can cause this to fail, so we don't do -+ this check unless specially asked for. And because it's -+ potentially very expensive. */ -+ VG_(sanity_check_malloc_all)(); -+ } -+} -+ -+/*--------------------------------------------------------------------*/ -+/*--- end ---*/ -+/*--------------------------------------------------------------------*/ ---- coregrind/m_sigframe/sigframe-s390x-linux.c -+++ coregrind/m_sigframe/sigframe-s390x-linux.c -@@ -0,0 +1,570 @@ -+ -+/*--------------------------------------------------------------------*/ -+/*--- Create/destroy signal delivery frames. ---*/ -+/*--- sigframe-s390x-linux.c ---*/ -+/*--------------------------------------------------------------------*/ -+ -+/* -+ This file is part of Valgrind, a dynamic binary instrumentation -+ framework. -+ -+ Copyright IBM Corp. 2010 -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA -+ 02111-1307, USA. -+ -+ The GNU General Public License is contained in the file COPYING. -+*/ -+ -+/* Contributed by Christian Borntraeger */ -+ -+#include "pub_core_basics.h" -+#include "pub_core_vki.h" -+#include "pub_core_vkiscnums.h" -+#include "pub_core_threadstate.h" -+#include "pub_core_aspacemgr.h" -+#include "pub_core_libcbase.h" -+#include "pub_core_libcassert.h" -+#include "pub_core_libcprint.h" -+#include "pub_core_machine.h" -+#include "pub_core_options.h" -+#include "pub_core_sigframe.h" -+#include "pub_core_signals.h" -+#include "pub_core_tooliface.h" -+#include "pub_core_trampoline.h" -+ -+#if defined(VGA_s390x) -+ -+/* This module creates and removes signal frames for signal deliveries -+ on s390x-linux. -+ -+ Note, this file contains kernel-specific knowledge in the form of -+ 'struct sigframe' and 'struct rt_sigframe'. -+ -+ Either a 'struct sigframe' or a 'struct rtsigframe' is pushed -+ onto the client's stack. This contains a subsidiary -+ vki_ucontext. That holds the vcpu's state across the signal, -+ so that the sighandler can mess with the vcpu state if it -+ really wants. -+*/ -+ -+#define SET_SIGNAL_GPR(zztst, zzn, zzval) \ -+ do { zztst->arch.vex.guest_r##zzn = (unsigned long)(zzval); \ -+ VG_TRACK( post_reg_write, Vg_CoreSignal, zztst->tid, \ -+ offsetof(VexGuestS390XState,guest_r##zzn), \ -+ sizeof(UWord) ); \ -+ } while (0) -+ -+/*------------------------------------------------------------*/ -+/*--- Signal frame layouts ---*/ -+/*------------------------------------------------------------*/ -+ -+// A structure in which to save the application's registers -+// during the execution of signal handlers. -+ -+// Linux has 2 signal frame structures: one for normal signal -+// deliveries, and one for SA_SIGINFO deliveries (also known as RT -+// signals). -+// -+// In theory, so long as we get the arguments to the handler function -+// right, it doesn't matter what the exact layout of the rest of the -+// frame is. Unfortunately, things like gcc's exception unwinding -+// make assumptions about the locations of various parts of the frame, -+// so we need to duplicate it exactly. -+ -+/* Valgrind-specific parts of the signal frame */ -+struct vg_sigframe -+{ -+ /* Sanity check word. */ -+ UInt magicPI; -+ -+ UInt handlerflags; /* flags for signal handler */ -+ -+ -+ /* Safely-saved version of sigNo, as described above. */ -+ Int sigNo_private; -+ -+ /* XXX This is wrong. Surely we should store the shadow values -+ into the shadow memory behind the actual values? */ -+ VexGuestS390XState vex_shadow1; -+ VexGuestS390XState vex_shadow2; -+ -+ /* HACK ALERT */ -+ VexGuestS390XState vex; -+ /* end HACK ALERT */ -+ -+ /* saved signal mask to be restored when handler returns */ -+ vki_sigset_t mask; -+ -+ /* Sanity check word. Is the highest-addressed word; do not -+ move!*/ -+ UInt magicE; -+}; -+ -+#define S390_SYSCALL_SIZE 2 -+ -+struct sigframe -+{ -+ UChar callee_used_stack[__VKI_SIGNAL_FRAMESIZE]; -+ struct vki_sigcontext sc; -+ _vki_sigregs sregs; -+ Int sigNo; -+ UChar retcode[S390_SYSCALL_SIZE]; -+ -+ struct vg_sigframe vg; -+}; -+ -+struct rt_sigframe -+{ -+ UChar callee_used_stack[__VKI_SIGNAL_FRAMESIZE]; -+ UChar retcode[S390_SYSCALL_SIZE]; -+ struct vki_siginfo info; -+ struct vki_ucontext uc; -+ -+ struct vg_sigframe vg; -+}; -+ -+/*------------------------------------------------------------*/ -+/*--- Creating signal frames ---*/ -+/*------------------------------------------------------------*/ -+ -+/* Saves all user-controlled register into a _vki_sigregs structure */ -+static void save_sigregs(ThreadState *tst, _vki_sigregs *sigregs) -+{ -+ sigregs->regs.gprs[0] = tst->arch.vex.guest_r0; -+ sigregs->regs.gprs[1] = tst->arch.vex.guest_r1; -+ sigregs->regs.gprs[2] = tst->arch.vex.guest_r2; -+ sigregs->regs.gprs[3] = tst->arch.vex.guest_r3; -+ sigregs->regs.gprs[4] = tst->arch.vex.guest_r4; -+ sigregs->regs.gprs[5] = tst->arch.vex.guest_r5; -+ sigregs->regs.gprs[6] = tst->arch.vex.guest_r6; -+ sigregs->regs.gprs[7] = tst->arch.vex.guest_r7; -+ sigregs->regs.gprs[8] = tst->arch.vex.guest_r8; -+ sigregs->regs.gprs[9] = tst->arch.vex.guest_r9; -+ sigregs->regs.gprs[10] = tst->arch.vex.guest_r10; -+ sigregs->regs.gprs[11] = tst->arch.vex.guest_r11; -+ sigregs->regs.gprs[12] = tst->arch.vex.guest_r12; -+ sigregs->regs.gprs[13] = tst->arch.vex.guest_r13; -+ sigregs->regs.gprs[14] = tst->arch.vex.guest_r14; -+ sigregs->regs.gprs[15] = tst->arch.vex.guest_r15; -+ -+ sigregs->regs.acrs[0] = tst->arch.vex.guest_a0; -+ sigregs->regs.acrs[1] = tst->arch.vex.guest_a1; -+ sigregs->regs.acrs[2] = tst->arch.vex.guest_a2; -+ sigregs->regs.acrs[3] = tst->arch.vex.guest_a3; -+ sigregs->regs.acrs[4] = tst->arch.vex.guest_a4; -+ sigregs->regs.acrs[5] = tst->arch.vex.guest_a5; -+ sigregs->regs.acrs[6] = tst->arch.vex.guest_a6; -+ sigregs->regs.acrs[7] = tst->arch.vex.guest_a7; -+ sigregs->regs.acrs[8] = tst->arch.vex.guest_a8; -+ sigregs->regs.acrs[9] = tst->arch.vex.guest_a9; -+ sigregs->regs.acrs[10] = tst->arch.vex.guest_a10; -+ sigregs->regs.acrs[11] = tst->arch.vex.guest_a11; -+ sigregs->regs.acrs[12] = tst->arch.vex.guest_a12; -+ sigregs->regs.acrs[13] = tst->arch.vex.guest_a13; -+ sigregs->regs.acrs[14] = tst->arch.vex.guest_a14; -+ sigregs->regs.acrs[15] = tst->arch.vex.guest_a15; -+ -+ sigregs->fpregs.fprs[0] = tst->arch.vex.guest_f0; -+ sigregs->fpregs.fprs[1] = tst->arch.vex.guest_f1; -+ sigregs->fpregs.fprs[2] = tst->arch.vex.guest_f2; -+ sigregs->fpregs.fprs[3] = tst->arch.vex.guest_f3; -+ sigregs->fpregs.fprs[4] = tst->arch.vex.guest_f4; -+ sigregs->fpregs.fprs[5] = tst->arch.vex.guest_f5; -+ sigregs->fpregs.fprs[6] = tst->arch.vex.guest_f6; -+ sigregs->fpregs.fprs[7] = tst->arch.vex.guest_f7; -+ sigregs->fpregs.fprs[8] = tst->arch.vex.guest_f8; -+ sigregs->fpregs.fprs[9] = tst->arch.vex.guest_f9; -+ sigregs->fpregs.fprs[10] = tst->arch.vex.guest_f10; -+ sigregs->fpregs.fprs[11] = tst->arch.vex.guest_f11; -+ sigregs->fpregs.fprs[12] = tst->arch.vex.guest_f12; -+ sigregs->fpregs.fprs[13] = tst->arch.vex.guest_f13; -+ sigregs->fpregs.fprs[14] = tst->arch.vex.guest_f14; -+ sigregs->fpregs.fprs[15] = tst->arch.vex.guest_f15; -+ sigregs->fpregs.fpc = tst->arch.vex.guest_fpc; -+ -+ sigregs->regs.psw.addr = tst->arch.vex.guest_IA; -+ /* save a sane dummy mask */ -+ sigregs->regs.psw.mask = 0x0705000180000000UL; -+} -+ -+static void restore_sigregs(ThreadState *tst, _vki_sigregs *sigregs) -+{ -+ tst->arch.vex.guest_r0 = sigregs->regs.gprs[0]; -+ tst->arch.vex.guest_r1 = sigregs->regs.gprs[1]; -+ tst->arch.vex.guest_r2 = sigregs->regs.gprs[2]; -+ tst->arch.vex.guest_r3 = sigregs->regs.gprs[3]; -+ tst->arch.vex.guest_r4 = sigregs->regs.gprs[4]; -+ tst->arch.vex.guest_r5 = sigregs->regs.gprs[5]; -+ tst->arch.vex.guest_r6 = sigregs->regs.gprs[6]; -+ tst->arch.vex.guest_r7 = sigregs->regs.gprs[7]; -+ tst->arch.vex.guest_r8 = sigregs->regs.gprs[8]; -+ tst->arch.vex.guest_r9 = sigregs->regs.gprs[9]; -+ tst->arch.vex.guest_r10 = sigregs->regs.gprs[10]; -+ tst->arch.vex.guest_r11 = sigregs->regs.gprs[11]; -+ tst->arch.vex.guest_r12 = sigregs->regs.gprs[12]; -+ tst->arch.vex.guest_r13 = sigregs->regs.gprs[13]; -+ tst->arch.vex.guest_r14 = sigregs->regs.gprs[14]; -+ tst->arch.vex.guest_r15 = sigregs->regs.gprs[15]; -+ -+ tst->arch.vex.guest_a0 = sigregs->regs.acrs[0]; -+ tst->arch.vex.guest_a1 = sigregs->regs.acrs[1]; -+ tst->arch.vex.guest_a2 = sigregs->regs.acrs[2]; -+ tst->arch.vex.guest_a3 = sigregs->regs.acrs[3]; -+ tst->arch.vex.guest_a4 = sigregs->regs.acrs[4]; -+ tst->arch.vex.guest_a5 = sigregs->regs.acrs[5]; -+ tst->arch.vex.guest_a6 = sigregs->regs.acrs[6]; -+ tst->arch.vex.guest_a7 = sigregs->regs.acrs[7]; -+ tst->arch.vex.guest_a8 = sigregs->regs.acrs[8]; -+ tst->arch.vex.guest_a9 = sigregs->regs.acrs[9]; -+ tst->arch.vex.guest_a10 = sigregs->regs.acrs[10]; -+ tst->arch.vex.guest_a11 = sigregs->regs.acrs[11]; -+ tst->arch.vex.guest_a12 = sigregs->regs.acrs[12]; -+ tst->arch.vex.guest_a13 = sigregs->regs.acrs[13]; -+ tst->arch.vex.guest_a14 = sigregs->regs.acrs[14]; -+ tst->arch.vex.guest_a15 = sigregs->regs.acrs[15]; -+ -+ tst->arch.vex.guest_f0 = sigregs->fpregs.fprs[0]; -+ tst->arch.vex.guest_f1 = sigregs->fpregs.fprs[1]; -+ tst->arch.vex.guest_f2 = sigregs->fpregs.fprs[2]; -+ tst->arch.vex.guest_f3 = sigregs->fpregs.fprs[3]; -+ tst->arch.vex.guest_f4 = sigregs->fpregs.fprs[4]; -+ tst->arch.vex.guest_f5 = sigregs->fpregs.fprs[5]; -+ tst->arch.vex.guest_f6 = sigregs->fpregs.fprs[6]; -+ tst->arch.vex.guest_f7 = sigregs->fpregs.fprs[7]; -+ tst->arch.vex.guest_f8 = sigregs->fpregs.fprs[8]; -+ tst->arch.vex.guest_f9 = sigregs->fpregs.fprs[9]; -+ tst->arch.vex.guest_f10 = sigregs->fpregs.fprs[10]; -+ tst->arch.vex.guest_f11 = sigregs->fpregs.fprs[11]; -+ tst->arch.vex.guest_f12 = sigregs->fpregs.fprs[12]; -+ tst->arch.vex.guest_f13 = sigregs->fpregs.fprs[13]; -+ tst->arch.vex.guest_f14 = sigregs->fpregs.fprs[14]; -+ tst->arch.vex.guest_f15 = sigregs->fpregs.fprs[15]; -+ tst->arch.vex.guest_fpc = sigregs->fpregs.fpc; -+ -+ tst->arch.vex.guest_IA = sigregs->regs.psw.addr; -+} -+ -+/* Extend the stack segment downwards if needed so as to ensure the -+ new signal frames are mapped to something. Return a Bool -+ indicating whether or not the operation was successful. -+*/ -+static Bool extend ( ThreadState *tst, Addr addr, SizeT size ) -+{ -+ ThreadId tid = tst->tid; -+ NSegment const* stackseg = NULL; -+ -+ if (VG_(extend_stack)(addr, tst->client_stack_szB)) { -+ stackseg = VG_(am_find_nsegment)(addr); -+ if (0 && stackseg) -+ VG_(printf)("frame=%#lx seg=%#lx-%#lx\n", -+ addr, stackseg->start, stackseg->end); -+ } -+ -+ if (stackseg == NULL || !stackseg->hasR || !stackseg->hasW) { -+ VG_(message)( -+ Vg_UserMsg, -+ "Can't extend stack to %#lx during signal delivery for thread %d:\n", -+ addr, tid); -+ if (stackseg == NULL) -+ VG_(message)(Vg_UserMsg, " no stack segment\n"); -+ else -+ VG_(message)(Vg_UserMsg, " too small or bad protection modes\n"); -+ -+ /* set SIGSEGV to default handler */ -+ VG_(set_default_handler)(VKI_SIGSEGV); -+ VG_(synth_fault_mapping)(tid, addr); -+ -+ /* The whole process should be about to die, since the default -+ action of SIGSEGV to kill the whole process. */ -+ return False; -+ } -+ -+ /* For tracking memory events, indicate the entire frame has been -+ allocated. */ -+ VG_TRACK( new_mem_stack_signal, addr - VG_STACK_REDZONE_SZB, -+ size + VG_STACK_REDZONE_SZB, tid ); -+ -+ return True; -+} -+ -+ -+/* Build the Valgrind-specific part of a signal frame. */ -+ -+static void build_vg_sigframe(struct vg_sigframe *frame, -+ ThreadState *tst, -+ UInt flags, -+ Int sigNo) -+{ -+ frame->sigNo_private = sigNo; -+ frame->magicPI = 0x31415927; -+ frame->vex_shadow1 = tst->arch.vex_shadow1; -+ frame->vex_shadow2 = tst->arch.vex_shadow2; -+ /* HACK ALERT */ -+ frame->vex = tst->arch.vex; -+ /* end HACK ALERT */ -+ frame->mask = tst->sig_mask; -+ frame->handlerflags = flags; -+ frame->magicE = 0x27182818; -+} -+ -+ -+static Addr build_sigframe(ThreadState *tst, -+ Addr sp_top_of_frame, -+ const vki_siginfo_t *siginfo, -+ const struct vki_ucontext *siguc, -+ UInt flags, -+ const vki_sigset_t *mask, -+ void *restorer) -+{ -+ struct sigframe *frame; -+ Addr sp = sp_top_of_frame; -+ -+ vg_assert((flags & VKI_SA_SIGINFO) == 0); -+ vg_assert((sizeof(*frame) & 7) == 0); -+ vg_assert((sp & 7) == 0); -+ -+ sp -= sizeof(*frame); -+ frame = (struct sigframe *)sp; -+ -+ if (!extend(tst, sp, sizeof(*frame))) -+ return sp_top_of_frame; -+ -+ /* retcode, sigNo, sc, sregs fields are to be written */ -+ VG_TRACK( pre_mem_write, Vg_CoreSignal, tst->tid, "signal handler frame", -+ sp, offsetof(struct sigframe, vg) ); -+ -+ save_sigregs(tst, &frame->sregs); -+ -+ frame->sigNo = siginfo->si_signo; -+ frame->sc.sregs = &frame->sregs; -+ VG_(memcpy)(frame->sc.oldmask, mask->sig, sizeof(frame->sc.oldmask)); -+ -+ if (flags & VKI_SA_RESTORER) { -+ SET_SIGNAL_GPR(tst, 14, restorer); -+ } else { -+ frame->retcode[0] = 0x0a; -+ frame->retcode[1] = __NR_sigreturn; -+ /* This normally should be &frame->recode. but since there -+ might be problems with non-exec stack and we must discard -+ the translation for the on-stack sigreturn we just use the -+ trampoline like x86,ppc. We still fill in the retcode, lets -+ just hope that nobody actually jumps here */ -+ SET_SIGNAL_GPR(tst, 14, (Addr)&VG_(s390x_linux_SUBST_FOR_sigreturn)); -+ } -+ -+ SET_SIGNAL_GPR(tst, 2, siginfo->si_signo); -+ SET_SIGNAL_GPR(tst, 3, &frame->sc); -+ /* fixs390: we dont fill in trapno and prot_addr in r4 and r5*/ -+ -+ /* Set up backchain. */ -+ *((Addr *) sp) = sp_top_of_frame; -+ -+ VG_TRACK( post_mem_write, Vg_CoreSignal, tst->tid, -+ sp, offsetof(struct sigframe, vg) ); -+ -+ build_vg_sigframe(&frame->vg, tst, flags, siginfo->si_signo); -+ -+ return sp; -+} -+ -+static Addr build_rt_sigframe(ThreadState *tst, -+ Addr sp_top_of_frame, -+ const vki_siginfo_t *siginfo, -+ const struct vki_ucontext *siguc, -+ UInt flags, -+ const vki_sigset_t *mask, -+ void *restorer) -+{ -+ struct rt_sigframe *frame; -+ Addr sp = sp_top_of_frame; -+ Int sigNo = siginfo->si_signo; -+ -+ vg_assert((flags & VKI_SA_SIGINFO) != 0); -+ vg_assert((sizeof(*frame) & 7) == 0); -+ vg_assert((sp & 7) == 0); -+ -+ sp -= sizeof(*frame); -+ frame = (struct rt_sigframe *)sp; -+ -+ if (!extend(tst, sp, sizeof(*frame))) -+ return sp_top_of_frame; -+ -+ /* retcode, sigNo, sc, sregs fields are to be written */ -+ VG_TRACK( pre_mem_write, Vg_CoreSignal, tst->tid, "signal handler frame", -+ sp, offsetof(struct rt_sigframe, vg) ); -+ -+ save_sigregs(tst, &frame->uc.uc_mcontext); -+ -+ if (flags & VKI_SA_RESTORER) { -+ frame->retcode[0] = 0; -+ frame->retcode[1] = 0; -+ SET_SIGNAL_GPR(tst, 14, restorer); -+ } else { -+ frame->retcode[0] = 0x0a; -+ frame->retcode[1] = __NR_rt_sigreturn; -+ /* This normally should be &frame->recode. but since there -+ might be problems with non-exec stack and we must discard -+ the translation for the on-stack sigreturn we just use the -+ trampoline like x86,ppc. We still fill in the retcode, lets -+ just hope that nobody actually jumps here */ -+ SET_SIGNAL_GPR(tst, 14, (Addr)&VG_(s390x_linux_SUBST_FOR_rt_sigreturn)); -+ } -+ -+ VG_(memcpy)(&frame->info, siginfo, sizeof(vki_siginfo_t)); -+ frame->uc.uc_flags = 0; -+ frame->uc.uc_link = 0; -+ frame->uc.uc_sigmask = *mask; -+ frame->uc.uc_stack = tst->altstack; -+ -+ SET_SIGNAL_GPR(tst, 2, siginfo->si_signo); -+ SET_SIGNAL_GPR(tst, 3, &frame->info); -+ SET_SIGNAL_GPR(tst, 4, &frame->uc); -+ -+ /* Set up backchain. */ -+ *((Addr *) sp) = sp_top_of_frame; -+ -+ VG_TRACK( post_mem_write, Vg_CoreSignal, tst->tid, -+ sp, offsetof(struct rt_sigframe, vg) ); -+ -+ build_vg_sigframe(&frame->vg, tst, flags, sigNo); -+ return sp; -+} -+ -+/* EXPORTED */ -+void VG_(sigframe_create)( ThreadId tid, -+ Addr sp_top_of_frame, -+ const vki_siginfo_t *siginfo, -+ const struct vki_ucontext *siguc, -+ void *handler, -+ UInt flags, -+ const vki_sigset_t *mask, -+ void *restorer ) -+{ -+ Addr sp; -+ ThreadState* tst = VG_(get_ThreadState)(tid); -+ -+ if (flags & VKI_SA_SIGINFO) -+ sp = build_rt_sigframe(tst, sp_top_of_frame, siginfo, siguc, -+ flags, mask, restorer); -+ else -+ sp = build_sigframe(tst, sp_top_of_frame, siginfo, siguc, -+ flags, mask, restorer); -+ -+ /* Set the thread so it will next run the handler. */ -+ VG_(set_SP)(tid, sp); -+ VG_TRACK( post_reg_write, Vg_CoreSignal, tid, VG_O_STACK_PTR, sizeof(Addr)); -+ -+ tst->arch.vex.guest_IA = (Addr) handler; -+ /* We might have interrupted a repeating instruction that uses the guest -+ counter. Since our VEX requires that a new instruction will see a -+ guest counter == 0, we have to set it here. The old value will be -+ restored by restore_vg_sigframe. */ -+ tst->arch.vex.guest_counter = 0; -+ /* This thread needs to be marked runnable, but we leave that the -+ caller to do. */ -+} -+ -+ -+/*------------------------------------------------------------*/ -+/*--- Destroying signal frames ---*/ -+/*------------------------------------------------------------*/ -+ -+/* Return False and don't do anything, just set the client to take a -+ segfault, if it looks like the frame is corrupted. */ -+static -+Bool restore_vg_sigframe ( ThreadState *tst, -+ struct vg_sigframe *frame, Int *sigNo ) -+{ -+ if (frame->magicPI != 0x31415927 || -+ frame->magicE != 0x27182818) { -+ VG_(message)(Vg_UserMsg, "Thread %d return signal frame " -+ "corrupted. Killing process.\n", -+ tst->tid); -+ VG_(set_default_handler)(VKI_SIGSEGV); -+ VG_(synth_fault)(tst->tid); -+ *sigNo = VKI_SIGSEGV; -+ return False; -+ } -+ tst->sig_mask = frame->mask; -+ tst->tmp_sig_mask = frame->mask; -+ tst->arch.vex_shadow1 = frame->vex_shadow1; -+ tst->arch.vex_shadow2 = frame->vex_shadow2; -+ /* HACK ALERT */ -+ tst->arch.vex = frame->vex; -+ /* end HACK ALERT */ -+ *sigNo = frame->sigNo_private; -+ return True; -+} -+ -+static -+SizeT restore_sigframe ( ThreadState *tst, -+ struct sigframe *frame, Int *sigNo ) -+{ -+ if (restore_vg_sigframe(tst, &frame->vg, sigNo)) -+ restore_sigregs(tst, frame->sc.sregs); -+ -+ return sizeof(*frame); -+} -+ -+static -+SizeT restore_rt_sigframe ( ThreadState *tst, -+ struct rt_sigframe *frame, Int *sigNo ) -+{ -+ if (restore_vg_sigframe(tst, &frame->vg, sigNo)) { -+ restore_sigregs(tst, &frame->uc.uc_mcontext); -+ } -+ return sizeof(*frame); -+} -+ -+ -+/* EXPORTED */ -+void VG_(sigframe_destroy)( ThreadId tid, Bool isRT ) -+{ -+ Addr sp; -+ ThreadState* tst; -+ SizeT size; -+ Int sigNo; -+ -+ tst = VG_(get_ThreadState)(tid); -+ -+ /* Correctly reestablish the frame base address. */ -+ sp = tst->arch.vex.guest_SP; -+ -+ if (!isRT) -+ size = restore_sigframe(tst, (struct sigframe *)sp, &sigNo); -+ else -+ size = restore_rt_sigframe(tst, (struct rt_sigframe *)sp, &sigNo); -+ -+ /* same as for creation: we must announce the full memory (including -+ alignment), otherwise massif might fail on longjmp */ -+ VG_TRACK( die_mem_stack_signal, sp - VG_STACK_REDZONE_SZB, -+ size + VG_STACK_REDZONE_SZB ); -+ -+ if (VG_(clo_trace_signals)) -+ VG_(message)( -+ Vg_DebugMsg, -+ "VG_(sigframe_destroy) (thread %d): isRT=%d valid magic; IP=%#llx\n", -+ tid, isRT, tst->arch.vex.guest_IA); -+ -+ /* tell the tools */ -+ VG_TRACK( post_deliver_signal, tid, sigNo ); -+} -+ -+#endif /* VGA_s390x */ -+ -+/*--------------------------------------------------------------------*/ -+/*--- end sigframe-s390x-linux.c ---*/ -+/*--------------------------------------------------------------------*/ ---- coregrind/m_signals.c -+++ coregrind/m_signals.c -@@ -523,6 +523,23 @@ - I_die_here; - } - -+#elif defined(VGP_s390x_linux) -+ -+# define VG_UCONTEXT_INSTR_PTR(uc) ((uc)->uc_mcontext.regs.psw.addr) -+# define VG_UCONTEXT_STACK_PTR(uc) ((uc)->uc_mcontext.regs.gprs[15]) -+# define VG_UCONTEXT_FRAME_PTR(uc) ((uc)->uc_mcontext.regs.gprs[11]) -+# define VG_UCONTEXT_SYSCALL_SYSRES(uc) \ -+ VG_(mk_SysRes_s390x_linux)((uc)->uc_mcontext.regs.gprs[2]) -+# define VG_UCONTEXT_LINK_REG(uc) ((uc)->uc_mcontext.regs.gprs[14]) -+ -+# define VG_UCONTEXT_TO_UnwindStartRegs(srP, uc) \ -+ { (srP)->r_pc = (ULong)((uc)->uc_mcontext.regs.psw.addr); \ -+ (srP)->r_sp = (ULong)((uc)->uc_mcontext.regs.gprs[15]); \ -+ (srP)->misc.S390X.r_fp = (uc)->uc_mcontext.regs.gprs[11]; \ -+ (srP)->misc.S390X.r_lr = (uc)->uc_mcontext.regs.gprs[14]; \ -+ } -+ -+ - #else - # error Unknown platform - #endif -@@ -852,6 +869,13 @@ - "my_sigreturn:\n" \ - "ud2\n" - -+#elif defined(VGP_s390x_linux) -+# define _MY_SIGRETURN(name) \ -+ ".text\n" \ -+ "my_sigreturn:\n" \ -+ " svc " #name "\n" \ -+ ".previous\n" -+ - #else - # error Unknown platform - #endif -@@ -1862,6 +1886,7 @@ - uc.uc_mcontext->__es.__err = 0; - # endif - -+ /* fixs390: do we need to do anything here for s390 ? */ - resume_scheduler(tid); - deliver_signal(tid, &info, &uc); - } -@@ -2210,6 +2235,19 @@ - } - } - -+/* Returns the reported fault address for an exact address */ -+static Addr fault_mask(Addr in) -+{ -+ /* We have to use VG_PGROUNDDN because faults on s390x only deliver -+ the page address but not the address within a page. -+ */ -+# if defined(VGA_s390x) -+ return VG_PGROUNDDN(in); -+# else -+ return in; -+#endif -+} -+ - /* Returns True if the sync signal was due to the stack requiring extension - and the extension was successful. - */ -@@ -2247,7 +2285,7 @@ - && seg_next - && seg_next->kind == SkAnonC - && seg->end+1 == seg_next->start -- && fault >= (esp - VG_STACK_REDZONE_SZB)) { -+ && fault >= fault_mask(esp - VG_STACK_REDZONE_SZB)) { - /* If the fault address is above esp but below the current known - stack segment base, and it was a fault because there was - nothing mapped there (as opposed to a permissions fault), ---- coregrind/m_stacktrace.c -+++ coregrind/m_stacktrace.c -@@ -670,6 +670,85 @@ - - #endif - -+/* ------------------------ s390x ------------------------- */ -+#if defined(VGP_s390x_linux) -+UInt VG_(get_StackTrace_wrk) ( ThreadId tid_if_known, -+ /*OUT*/Addr* ips, UInt max_n_ips, -+ /*OUT*/Addr* sps, /*OUT*/Addr* fps, -+ UnwindStartRegs* startRegs, -+ Addr fp_max_orig ) -+{ -+ Bool debug = False; -+ Int i; -+ Addr fp_max; -+ UInt n_found = 0; -+ -+ vg_assert(sizeof(Addr) == sizeof(UWord)); -+ vg_assert(sizeof(Addr) == sizeof(void*)); -+ -+ D3UnwindRegs uregs; -+ uregs.ia = startRegs->r_pc; -+ uregs.sp = startRegs->r_sp; -+ Addr fp_min = uregs.sp; -+ uregs.fp = startRegs->misc.S390X.r_fp; -+ uregs.lr = startRegs->misc.S390X.r_lr; -+ -+ fp_max = VG_PGROUNDUP(fp_max_orig); -+ if (fp_max >= sizeof(Addr)) -+ fp_max -= sizeof(Addr); -+ -+ if (debug) -+ VG_(printf)("max_n_ips=%d fp_min=0x%lx fp_max_orig=0x%lx, " -+ "fp_max=0x%lx IA=0x%lx SP=0x%lx FP=0x%lx\n", -+ max_n_ips, fp_min, fp_max_orig, fp_max, -+ uregs.ia, uregs.sp,uregs.fp); -+ -+ /* The first frame is pretty obvious */ -+ ips[0] = uregs.ia; -+ if (sps) sps[0] = uregs.sp; -+ if (fps) fps[0] = uregs.fp; -+ i = 1; -+ -+ /* for everything else we have to rely on the eh_frame. gcc defaults to -+ not create a backchain and all the other tools (like gdb) also have -+ to use the CFI. */ -+ while (True) { -+ if (i >= max_n_ips) -+ break; -+ -+ if (VG_(use_CF_info)( &uregs, fp_min, fp_max )) { -+ if (sps) sps[i] = uregs.sp; -+ if (fps) fps[i] = uregs.fp; -+ ips[i++] = uregs.ia - 1; -+ uregs.ia = uregs.ia - 1; -+ continue; -+ } -+ /* A problem on the first frame? Lets assume it was a bad jump. -+ We will use the link register and the current stack and frame -+ pointers and see if we can use the CFI in the next round. */ -+ if (i == 1) { -+ if (sps) { -+ sps[i] = sps[0]; -+ uregs.sp = sps[0]; -+ } -+ if (fps) { -+ fps[i] = fps[0]; -+ uregs.fp = fps[0]; -+ } -+ uregs.ia = uregs.lr - 1; -+ ips[i++] = uregs.lr - 1; -+ continue; -+ } -+ -+ /* No luck. We have to give up. */ -+ break; -+ } -+ -+ n_found = i; -+ return n_found; -+} -+#endif -+ - /*------------------------------------------------------------*/ - /*--- ---*/ - /*--- END platform-dependent unwinder worker functions ---*/ ---- coregrind/m_syscall.c -+++ coregrind/m_syscall.c -@@ -100,6 +100,17 @@ - return res; - } - -+SysRes VG_(mk_SysRes_s390x_linux) ( Long val ) { -+ SysRes res; -+ res._isError = val >= -4095 && val <= -1; -+ if (res._isError) { -+ res._val = -val; -+ } else { -+ res._val = val; -+ } -+ return res; -+} -+ - SysRes VG_(mk_SysRes_arm_linux) ( Int val ) { - SysRes res; - res._isError = val >= -4095 && val <= -1; -@@ -719,6 +730,38 @@ - " retq \n" - ); - -+#elif defined(VGP_s390x_linux) -+ -+static UWord do_syscall_WRK ( -+ UWord syscall_no, -+ UWord arg1, UWord arg2, UWord arg3, -+ UWord arg4, UWord arg5, UWord arg6 -+ ) -+{ -+ register UWord __arg1 asm("2") = arg1; -+ register UWord __arg2 asm("3") = arg2; -+ register UWord __arg3 asm("4") = arg3; -+ register UWord __arg4 asm("5") = arg4; -+ register UWord __arg5 asm("6") = arg5; -+ register UWord __arg6 asm("7") = arg6; -+ register ULong __svcres asm("2"); -+ -+ __asm__ __volatile__ ( -+ "lgr %%r1,%1\n\t" -+ "svc 0\n\t" -+ : "=d" (__svcres) -+ : "a" (syscall_no), -+ "0" (__arg1), -+ "d" (__arg2), -+ "d" (__arg3), -+ "d" (__arg4), -+ "d" (__arg5), -+ "d" (__arg6) -+ : "1", "cc", "memory"); -+ -+ return (UWord) (__svcres); -+} -+ - #else - # error Unknown platform - #endif -@@ -846,6 +889,24 @@ - } - return VG_(mk_SysRes_amd64_darwin)( scclass, err ? True : False, wHI, wLO ); - -+#elif defined(VGP_s390x_linux) -+ UWord val; -+ -+ if (sysno == __NR_mmap) { -+ ULong argbuf[6]; -+ -+ argbuf[0] = a1; -+ argbuf[1] = a2; -+ argbuf[2] = a3; -+ argbuf[3] = a4; -+ argbuf[4] = a5; -+ argbuf[5] = a6; -+ val = do_syscall_WRK(sysno,(UWord)&argbuf[0],0,0,0,0,0); -+ } else { -+ val = do_syscall_WRK(sysno,a1,a2,a3,a4,a5,a6); -+ } -+ -+ return VG_(mk_SysRes_s390x_linux)( val ); - #else - # error Unknown platform - #endif ---- coregrind/m_syswrap/priv_types_n_macros.h -+++ coregrind/m_syswrap/priv_types_n_macros.h -@@ -89,7 +89,7 @@ - Int o_sysno; - # if defined(VGP_x86_linux) || defined(VGP_amd64_linux) \ - || defined(VGP_ppc32_linux) || defined(VGP_ppc64_linux) \ -- || defined(VGP_arm_linux) -+ || defined(VGP_arm_linux) || defined(VGP_s390x_linux) - Int o_arg1; - Int o_arg2; - Int o_arg3; ---- coregrind/m_syswrap/syscall-s390x-linux.S -+++ coregrind/m_syswrap/syscall-s390x-linux.S -@@ -0,0 +1,172 @@ -+ -+/*--------------------------------------------------------------------*/ -+/*--- Support for doing system calls. syscall-s390x-linux.S ---*/ -+/*--------------------------------------------------------------------*/ -+ -+/* -+ This file is part of Valgrind, a dynamic binary instrumentation -+ framework. -+ -+ Copyright IBM Corp. 2010 -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA -+ 02111-1307, USA. -+ -+ The GNU General Public License is contained in the file COPYING. -+*/ -+ -+/* Contributed by Christian Borntraeger */ -+ -+#include "pub_core_basics_asm.h" -+#include "pub_core_vkiscnums_asm.h" -+#include "libvex_guest_offsets.h" -+ -+#if defined(VGA_s390x) -+ -+/*----------------------------------------------------------------*/ -+/* -+ Perform a syscall for the client. This will run a syscall -+ with the client's specific per-thread signal mask. -+ -+ The structure of this function is such that, if the syscall is -+ interrupted by a signal, we can determine exactly what -+ execution state we were in with respect to the execution of -+ the syscall by examining the value of NIP in the signal -+ handler. This means that we can always do the appropriate -+ thing to precisely emulate the kernel's signal/syscall -+ interactions. -+ -+ The syscall number is taken from the argument, since the syscall -+ number can be encoded in the svc instruction itself. -+ The syscall result is written back to guest register r2. -+ -+ Returns 0 if the syscall was successfully called (even if the -+ syscall itself failed), or a nonzero error code in the lowest -+ 8 bits if one of the sigprocmasks failed (there's no way to -+ determine which one failed). And there's no obvious way to -+ recover from that either, but nevertheless we want to know. -+ -+ VG_(fixup_guest_state_after_syscall_interrupted) does the -+ thread state fixup in the case where we were interrupted by a -+ signal. -+ -+ Prototype: -+ -+ UWord ML_(do_syscall_for_client_WRK)( -+ Int syscallno, // r2 -+ void* guest_state, // r3 -+ const vki_sigset_t *sysmask, // r4 -+ const vki_sigset_t *postmask, // r5 -+ Int nsigwords) // r6 -+*/ -+/* from vki_arch.h */ -+#define VKI_SIG_SETMASK 2 -+ -+#define SP_SAVE 16 -+#define SP_R2 SP_SAVE + 0*8 -+#define SP_R3 SP_SAVE + 1*8 -+#define SP_R4 SP_SAVE + 2*8 -+#define SP_R5 SP_SAVE + 3*8 -+#define SP_R6 SP_SAVE + 4*8 -+#define SP_R7 SP_SAVE + 5*8 -+#define SP_R8 SP_SAVE + 6*8 -+#define SP_R9 SP_SAVE + 7*8 -+ -+.align 4 -+.globl ML_(do_syscall_for_client_WRK) -+ML_(do_syscall_for_client_WRK): -+1: /* Even though we can't take a signal until the sigprocmask completes, -+ start the range early. -+ If IA is in the range [1,2), the syscall hasn't been started yet */ -+ -+ /* Set the signal mask which should be current during the syscall. */ -+ /* Save and restore all the parameters and all the registers that -+ we clobber (r6-r9) */ -+ stmg %r2,%r9, SP_R2(%r15) -+ -+ lghi %r2, VKI_SIG_SETMASK /* how */ -+ lgr %r3, %r4 /* sysmask */ -+ lgr %r4, %r5 /* postmask */ -+ lgr %r5, %r6 /* nsigwords */ -+ svc __NR_rt_sigprocmask -+ cghi %r2, 0x0 -+ jne 7f /* sigprocmask failed */ -+ -+ /* OK, that worked. Now do the syscall proper. */ -+ lg %r9, SP_R3(%r15) /* guest state --> r9 */ -+ lg %r2, OFFSET_s390x_r2(%r9) /* guest r2 --> real r2 */ -+ lg %r3, OFFSET_s390x_r3(%r9) /* guest r3 --> real r3 */ -+ lg %r4, OFFSET_s390x_r4(%r9) /* guest r4 --> real r4 */ -+ lg %r5, OFFSET_s390x_r5(%r9) /* guest r5 --> real r5 */ -+ lg %r6, OFFSET_s390x_r6(%r9) /* guest r6 --> real r6 */ -+ lg %r7, OFFSET_s390x_r7(%r9) /* guest r7 --> real r7 */ -+ lg %r1, SP_R2(%r15) /* syscallno -> r1 */ -+ -+2: svc 0 -+ -+3: -+ stg %r2, OFFSET_s390x_r2(%r9) -+ -+4: /* Re-block signals. If IA is in [4,5), then the syscall -+ is complete and we needn't worry about it. */ -+ lghi %r2, VKI_SIG_SETMASK /* how */ -+ lg %r3, SP_R5(%r15) /* postmask */ -+ lghi %r4, 0x0 /* NULL */ -+ lg %r5, SP_R6(%r15) /* nsigwords */ -+ svc __NR_rt_sigprocmask -+ cghi %r2, 0x0 -+ jne 7f /* sigprocmask failed */ -+ -+5: /* Everyting ok. Return 0 and restore the call-saved -+ registers, that we have clobbered */ -+ lghi %r2, 0x0 -+ lmg %r6,%r9, SP_R6(%r15) -+ br %r14 -+ -+7: /* Some problem. Return 0x8000 | error and restore the call-saved -+ registers we have clobbered. */ -+ nill %r2, 0x7fff -+ oill %r2, 0x8000 -+ lmg %r6,%r9, SP_R6(%r15) -+ br %r14 -+ -+.section .rodata -+/* Export the ranges so that -+ VG_(fixup_guest_state_after_syscall_interrupted) can do the -+ right thing */ -+ -+.globl ML_(blksys_setup) -+.globl ML_(blksys_restart) -+.globl ML_(blksys_complete) -+.globl ML_(blksys_committed) -+.globl ML_(blksys_finished) -+ -+/* The compiler can assume that 8 byte data elements are aligned on 8 byte */ -+.align 8 -+ML_(blksys_setup): .quad 1b -+ML_(blksys_restart): .quad 2b -+ML_(blksys_complete): .quad 3b -+ML_(blksys_committed): .quad 4b -+ML_(blksys_finished): .quad 5b -+.previous -+ -+/* Let the linker know we don't need an executable stack */ -+.section .note.GNU-stack,"",@progbits -+ -+#endif /* VGA_s390x */ -+ -+/*--------------------------------------------------------------------*/ -+/*--- end ---*/ -+/*--------------------------------------------------------------------*/ ---- coregrind/m_syswrap/syswrap-generic.c -+++ coregrind/m_syswrap/syswrap-generic.c -@@ -1958,6 +1958,11 @@ - * call, mmap (aka sys_mmap) which takes the arguments in the - * normal way and the offset in bytes. - * -+ * - On s390x-linux there is mmap (aka old_mmap) which takes the -+ * arguments in a memory block and the offset in bytes. mmap2 -+ * is also available (but not exported via unistd.h) with -+ * arguments in a memory block and the offset in pages. -+ * - * To cope with all this we provide a generic handler function here - * and then each platform implements one or more system call handlers - * which call this generic routine after extracting and normalising ---- coregrind/m_syswrap/syswrap-linux.c -+++ coregrind/m_syswrap/syswrap-linux.c -@@ -206,6 +206,14 @@ - "svc 0x00000000\n" /* exit(tst->os_state.exitcode) */ - : "=m" (tst->status) - : "r" (VgTs_Empty), "n" (__NR_exit), "m" (tst->os_state.exitcode)); -+#elif defined(VGP_s390x_linux) -+ asm volatile ( -+ "st %1, %0\n" /* set tst->status = VgTs_Empty */ -+ "lg 2, %3\n" /* set r2 = tst->os_state.exitcode */ -+ "svc %2\n" /* exit(tst->os_state.exitcode) */ -+ : "=m" (tst->status) -+ : "d" (VgTs_Empty), "n" (__NR_exit), "m" (tst->os_state.exitcode) -+ : "2"); - #else - # error Unknown platform - #endif -@@ -288,6 +296,11 @@ - sp -= 112; - sp &= ~((Addr)0xF); - *(UWord *)sp = 0; -+#elif defined(VGP_s390x_linux) -+ /* make a stack frame */ -+ sp -= 160; -+ sp &= ~((Addr)0xF); -+ *(UWord *)sp = 0; - #endif - - /* If we can't even allocate the first thread's stack, we're hosed. -@@ -342,6 +355,10 @@ - res = VG_(do_syscall5)( __NR_clone, flags, - (UWord)NULL, (UWord)parent_tidptr, - (UWord)child_tidptr, (UWord)NULL ); -+#elif defined(VGP_s390x_linux) -+ /* Note that s390 has the stack first and then the flags */ -+ res = VG_(do_syscall4)( __NR_clone, (UWord) NULL, flags, -+ (UWord)parent_tidptr, (UWord)child_tidptr); - #else - # error Unknown platform - #endif -@@ -3566,7 +3583,7 @@ - } - #endif - --#if defined(VGP_amd64_linux) -+#if defined(VGP_amd64_linux) || defined(VGP_s390x_linux) - PRE(sys_lookup_dcookie) - { - *flags |= SfMayBlock; ---- coregrind/m_syswrap/syswrap-main.c -+++ coregrind/m_syswrap/syswrap-main.c -@@ -60,14 +60,20 @@ - /* Useful info which needs to be recorded somewhere: - Use of registers in syscalls is: - -- NUM ARG1 ARG2 ARG3 ARG4 ARG5 ARG6 ARG7 ARG8 RESULT -+ NUM ARG1 ARG2 ARG3 ARG4 ARG5 ARG6 ARG7 ARG8 RESULT - LINUX: -- x86 eax ebx ecx edx esi edi ebp n/a n/a eax (== NUM) -- amd64 rax rdi rsi rdx r10 r8 r9 n/a n/a rax (== NUM) -- ppc32 r0 r3 r4 r5 r6 r7 r8 n/a n/a r3+CR0.SO (== ARG1) -- ppc64 r0 r3 r4 r5 r6 r7 r8 n/a n/a r3+CR0.SO (== ARG1) -- arm r7 r0 r1 r2 r3 r4 r5 n/a n/a r0 (== ARG1) -- -+ x86 eax ebx ecx edx esi edi ebp n/a n/a eax (== NUM) -+ amd64 rax rdi rsi rdx r10 r8 r9 n/a n/a rax (== NUM) -+ ppc32 r0 r3 r4 r5 r6 r7 r8 n/a n/a r3+CR0.SO (== ARG1) -+ ppc64 r0 r3 r4 r5 r6 r7 r8 n/a n/a r3+CR0.SO (== ARG1) -+ arm r7 r0 r1 r2 r3 r4 r5 n/a n/a r0 (== ARG1) -+ On s390x the svc instruction is used for system calls. The system call -+ number is encoded in the instruction (8 bit immediate field). Since Linux -+ 2.6 it is also allowed to use svc 0 with the system call number in r1. -+ This was introduced for system calls >255, but works for all. It is -+ also possible to see the svc 0 together with an EXecute instruction, that -+ fills in the immediate field. -+ s390x r1/SVC r2 r3 r4 r5 r6 r7 n/a n/a r2 (== ARG1) - AIX: - ppc32 r2 r3 r4 r5 r6 r7 r8 r9 r10 r3(res),r4(err) - ppc64 r2 r3 r4 r5 r6 r7 r8 r9 r10 r3(res),r4(err) -@@ -160,6 +166,9 @@ - x86: Success(N) ==> edx:eax = N, cc = 0 - Fail(N) ==> edx:eax = N, cc = 1 - -+ s390x: Success(N) ==> r2 = N -+ Fail(N) ==> r2 = -N -+ - * The post wrapper is called if: - - - it exists, and -@@ -611,6 +620,17 @@ - - // no canonical->sysno adjustment needed - -+#elif defined(VGP_s390x_linux) -+ VexGuestS390XState* gst = (VexGuestS390XState*)gst_vanilla; -+ canonical->sysno = gst->guest_SYSNO; -+ canonical->arg1 = gst->guest_r2; -+ canonical->arg2 = gst->guest_r3; -+ canonical->arg3 = gst->guest_r4; -+ canonical->arg4 = gst->guest_r5; -+ canonical->arg5 = gst->guest_r6; -+ canonical->arg6 = gst->guest_r7; -+ canonical->arg7 = 0; -+ canonical->arg8 = 0; - #else - # error "getSyscallArgsFromGuestState: unknown arch" - #endif -@@ -728,6 +748,16 @@ - stack[1] = canonical->arg7; - stack[2] = canonical->arg8; - -+#elif defined(VGP_s390x_linux) -+ VexGuestS390XState* gst = (VexGuestS390XState*)gst_vanilla; -+ gst->guest_SYSNO = canonical->sysno; -+ gst->guest_r2 = canonical->arg1; -+ gst->guest_r3 = canonical->arg2; -+ gst->guest_r4 = canonical->arg3; -+ gst->guest_r5 = canonical->arg4; -+ gst->guest_r6 = canonical->arg5; -+ gst->guest_r7 = canonical->arg6; -+ - #else - # error "putSyscallArgsIntoGuestState: unknown arch" - #endif -@@ -842,6 +872,11 @@ - ); - canonical->what = SsComplete; - -+# elif defined(VGP_s390x_linux) -+ VexGuestS390XState* gst = (VexGuestS390XState*)gst_vanilla; -+ canonical->sres = VG_(mk_SysRes_s390x_linux)( gst->guest_r2 ); -+ canonical->what = SsComplete; -+ - # else - # error "getSyscallStatusFromGuestState: unknown arch" - # endif -@@ -1016,6 +1051,15 @@ - break; - } - -+# elif defined(VGP_s390x_linux) -+ VexGuestS390XState* gst = (VexGuestS390XState*)gst_vanilla; -+ vg_assert(canonical->what == SsComplete); -+ if (sr_isError(canonical->sres)) { -+ gst->guest_r2 = - (Long)sr_Err(canonical->sres); -+ } else { -+ gst->guest_r2 = sr_Res(canonical->sres); -+ } -+ - # else - # error "putSyscallStatusIntoGuestState: unknown arch" - # endif -@@ -1129,6 +1173,16 @@ - layout->s_arg7 = sizeof(UWord) * 1; - layout->s_arg8 = sizeof(UWord) * 2; - -+#elif defined(VGP_s390x_linux) -+ layout->o_sysno = OFFSET_s390x_SYSNO; -+ layout->o_arg1 = OFFSET_s390x_r2; -+ layout->o_arg2 = OFFSET_s390x_r3; -+ layout->o_arg3 = OFFSET_s390x_r4; -+ layout->o_arg4 = OFFSET_s390x_r5; -+ layout->o_arg5 = OFFSET_s390x_r6; -+ layout->o_arg6 = OFFSET_s390x_r7; -+ layout->uu_arg7 = -1; /* impossible value */ -+ layout->uu_arg8 = -1; /* impossible value */ - #else - # error "getSyscallLayout: unknown arch" - #endif -@@ -1957,6 +2011,23 @@ - // DDD: #warning GrP fixme amd64 restart unimplemented - vg_assert(0); - -+#elif defined(VGP_s390x_linux) -+ arch->vex.guest_IA -= 2; // sizeof(syscall) -+ -+ /* Make sure our caller is actually sane, and we're really backing -+ back over a syscall. -+ -+ syscall == 0A -+ */ -+ { -+ UChar *p = (UChar *)arch->vex.guest_IA; -+ if (p[0] != 0x0A) -+ VG_(message)(Vg_DebugMsg, -+ "?! restarting over syscall at %#llx %02x %02x\n", -+ arch->vex.guest_IA, p[0], p[1]); -+ -+ vg_assert(p[0] == 0x0A); -+ } - #else - # error "ML_(fixup_guest_state_to_restart_syscall): unknown plat" - #endif ---- coregrind/m_syswrap/syswrap-s390x-linux.c -+++ coregrind/m_syswrap/syswrap-s390x-linux.c -@@ -0,0 +1,1527 @@ -+ -+/*--------------------------------------------------------------------*/ -+/*--- Platform-specific syscalls stuff. syswrap-s390x-linux.c ---*/ -+/*--------------------------------------------------------------------*/ -+ -+/* -+ This file is part of Valgrind, a dynamic binary instrumentation -+ framework. -+ -+ Copyright IBM Corp. 2010 -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA -+ 02111-1307, USA. -+ -+ The GNU General Public License is contained in the file COPYING. -+*/ -+ -+/* Contributed by Christian Borntraeger */ -+ -+#if defined(VGP_s390x_linux) -+ -+#include "pub_core_basics.h" -+#include "pub_core_vki.h" -+#include "pub_core_vkiscnums.h" -+#include "pub_core_threadstate.h" -+#include "pub_core_aspacemgr.h" -+#include "pub_core_debuglog.h" -+#include "pub_core_libcbase.h" -+#include "pub_core_libcassert.h" -+#include "pub_core_libcprint.h" -+#include "pub_core_libcproc.h" -+#include "pub_core_libcsignal.h" -+#include "pub_core_mallocfree.h" -+#include "pub_core_options.h" -+#include "pub_core_scheduler.h" -+#include "pub_core_sigframe.h" // For VG_(sigframe_destroy)() -+#include "pub_core_signals.h" -+#include "pub_core_syscall.h" -+#include "pub_core_syswrap.h" -+#include "pub_core_tooliface.h" -+#include "pub_core_stacks.h" // VG_(register_stack) -+ -+#include "priv_types_n_macros.h" -+#include "priv_syswrap-generic.h" /* for decls of generic wrappers */ -+#include "priv_syswrap-linux.h" /* for decls of linux-ish wrappers */ -+#include "priv_syswrap-linux-variants.h" /* decls of linux variant wrappers */ -+#include "priv_syswrap-main.h" -+ -+ -+/* --------------------------------------------------------------------- -+ clone() handling -+ ------------------------------------------------------------------ */ -+ -+/* Call f(arg1), but first switch stacks, using 'stack' as the new -+ stack, and use 'retaddr' as f's return-to address. Also, clear all -+ the integer registers before entering f. -+ Thought: Why are we clearing the GPRs ? The callee pointed to by f -+ is a regular C function which will play by the ABI rules. So there is -+ no need to zero out the GPRs. If we assumed that f accesses registers at -+ will, then it would make sense to create a defined register state. -+ But then, why only for the GPRs and not the FPRs ? */ -+__attribute__((noreturn)) -+void ML_(call_on_new_stack_0_1) ( Addr stack, -+ Addr retaddr, -+ void (*f)(Word), -+ Word arg1 ); -+/* Upon entering this function we have the following setup: -+ r2 = stack -+ r3 = retaddr -+ r4 = f_desc -+ r5 = arg1 -+*/ -+asm( -+ ".text\n" -+ ".align 4\n" -+ ".globl vgModuleLocal_call_on_new_stack_0_1\n" -+ ".type vgModuleLocal_call_on_new_stack_0_1, @function\n" -+ "vgModuleLocal_call_on_new_stack_0_1:\n" -+ " lgr %r15,%r2\n" // stack to r15 -+ " lgr %r14,%r3\n" // retaddr to r14 -+ " lgr %r2,%r5\n" // arg1 to r2 -+ // zero all gprs to get a defined state -+ " lghi %r0,0\n" -+ " lghi %r1,0\n" -+ // r2 holds the argument for the callee -+ " lghi %r3,0\n" -+ // r4 holds the callee address -+ " lghi %r5,0\n" -+ " lghi %r6,0\n" -+ " lghi %r7,0\n" -+ " lghi %r8,0\n" -+ " lghi %r9,0\n" -+ " lghi %r10,0\n" -+ " lghi %r11,0\n" -+ " lghi %r12,0\n" -+ " lghi %r13,0\n" -+ // r14 holds the return address for the callee -+ // r15 is the stack pointer -+ " br %r4\n" // jump to f -+ ".previous\n" -+ ); -+ -+/* -+ Perform a clone system call. clone is strange because it has -+ fork()-like return-twice semantics, so it needs special -+ handling here. -+ -+ Upon entry, we have: -+ void* child_stack in r2 -+ long flags in r3 -+ int* parent_tid in r4 -+ int* child_tid in r5 -+ int* child_tid in r6 -+ Word (*fn)(void *) 160(r15) -+ void *arg 168(r15) -+ -+ System call requires: -+ void* child_stack in r2 (sc arg1) -+ long flags in r3 (sc arg2) -+ int* parent_tid in r4 (sc arg3) -+ int* child_tid in r5 (sc arg4) -+ void* tlsaddr in r6 (sc arg5) -+ -+ Returns a ULong encoded as: top half is %cr following syscall, -+ low half is syscall return value (r3). -+ */ -+#define __NR_CLONE VG_STRINGIFY(__NR_clone) -+#define __NR_EXIT VG_STRINGIFY(__NR_exit) -+ -+extern -+ULong do_syscall_clone_s390x_linux ( void *stack, -+ ULong flags, -+ Int *child_tid, -+ Int *parent_tid, -+ Addr tlsaddr, -+ Word (*fn)(void *), -+ void *arg); -+asm( -+ " .text\n" -+ " .align 4\n" -+ "do_syscall_clone_s390x_linux:\n" -+ " lg %r1, 160(%r15)\n" // save fn from parent stack into r1 -+ " lg %r0, 168(%r15)\n" // save arg from parent stack into r0 -+ " aghi %r2, -160\n" // create stack frame for child -+ // all syscall parameters are already in place (r2-r6) -+ " svc " __NR_CLONE"\n" // clone() -+ " ltgr %r2,%r2\n" // child if retval == 0 -+ " jne 1f\n" -+ -+ // CHILD - call thread function -+ " lgr %r2, %r0\n" // get arg from r0 -+ " basr %r14,%r1\n" // call fn -+ -+ // exit. The result is already in r2 -+ " svc " __NR_EXIT"\n" -+ -+ // Exit returned?! -+ " j +2\n" -+ -+ "1:\n" // PARENT or ERROR -+ " br %r14\n" -+ ".previous\n" -+); -+ -+#undef __NR_CLONE -+#undef __NR_EXIT -+ -+void VG_(cleanup_thread) ( ThreadArchState* arch ) -+{ -+ /* only used on x86 for descriptor tables */ -+} -+ -+static void setup_child ( /*OUT*/ ThreadArchState *child, -+ /*IN*/ ThreadArchState *parent ) -+{ -+ /* We inherit our parent's guest state. */ -+ child->vex = parent->vex; -+ child->vex_shadow1 = parent->vex_shadow1; -+ child->vex_shadow2 = parent->vex_shadow2; -+} -+ -+ -+/* -+ When a client clones, we need to keep track of the new thread. This means: -+ 1. allocate a ThreadId+ThreadState+stack for the the thread -+ -+ 2. initialize the thread's new VCPU state -+ -+ 3. create the thread using the same args as the client requested, -+ but using the scheduler entrypoint for IP, and a separate stack -+ for SP. -+ */ -+static SysRes do_clone ( ThreadId ptid, -+ Addr sp, ULong flags, -+ Int *parent_tidptr, -+ Int *child_tidptr, -+ Addr tlsaddr) -+{ -+ static const Bool debug = False; -+ -+ ThreadId ctid = VG_(alloc_ThreadState)(); -+ ThreadState* ptst = VG_(get_ThreadState)(ptid); -+ ThreadState* ctst = VG_(get_ThreadState)(ctid); -+ UWord* stack; -+ NSegment const* seg; -+ SysRes res; -+ ULong r2; -+ vki_sigset_t blockall, savedmask; -+ -+ VG_(sigfillset)(&blockall); -+ -+ vg_assert(VG_(is_running_thread)(ptid)); -+ vg_assert(VG_(is_valid_tid)(ctid)); -+ -+ stack = (UWord*)ML_(allocstack)(ctid); -+ if (stack == NULL) { -+ res = VG_(mk_SysRes_Error)( VKI_ENOMEM ); -+ goto out; -+ } -+ -+ /* Copy register state -+ -+ Both parent and child return to the same place, and the code -+ following the clone syscall works out which is which, so we -+ don't need to worry about it. -+ -+ The parent gets the child's new tid returned from clone, but the -+ child gets 0. -+ -+ If the clone call specifies a NULL sp for the new thread, then -+ it actually gets a copy of the parent's sp. -+ */ -+ setup_child( &ctst->arch, &ptst->arch ); -+ -+ /* Make sys_clone appear to have returned Success(0) in the -+ child. */ -+ ctst->arch.vex.guest_r2 = 0; -+ -+ if (sp != 0) -+ ctst->arch.vex.guest_r15 = sp; -+ -+ ctst->os_state.parent = ptid; -+ -+ /* inherit signal mask */ -+ ctst->sig_mask = ptst->sig_mask; -+ ctst->tmp_sig_mask = ptst->sig_mask; -+ -+ /* have the parents thread group */ -+ ctst->os_state.threadgroup = ptst->os_state.threadgroup; -+ -+ /* We don't really know where the client stack is, because its -+ allocated by the client. The best we can do is look at the -+ memory mappings and try to derive some useful information. We -+ assume that esp starts near its highest possible value, and can -+ only go down to the start of the mmaped segment. */ -+ seg = VG_(am_find_nsegment)((Addr)sp); -+ if (seg && seg->kind != SkResvn) { -+ ctst->client_stack_highest_word = (Addr)VG_PGROUNDUP(sp); -+ ctst->client_stack_szB = ctst->client_stack_highest_word - seg->start; -+ -+ VG_(register_stack)(seg->start, ctst->client_stack_highest_word); -+ -+ if (debug) -+ VG_(printf)("tid %d: guessed client stack range %#lx-%#lx\n", -+ ctid, seg->start, VG_PGROUNDUP(sp)); -+ } else { -+ VG_(message)(Vg_UserMsg, -+ "!? New thread %d starts with SP(%#lx) unmapped\n", -+ ctid, sp); -+ ctst->client_stack_szB = 0; -+ } -+ -+ /* Assume the clone will succeed, and tell any tool that wants to -+ know that this thread has come into existence. If the clone -+ fails, we'll send out a ll_exit notification for it at the out: -+ label below, to clean up. */ -+ VG_TRACK ( pre_thread_ll_create, ptid, ctid ); -+ -+ if (flags & VKI_CLONE_SETTLS) { -+ if (debug) -+ VG_(printf)("clone child has SETTLS: tls at %#lx\n", tlsaddr); -+ ctst->arch.vex.guest_a0 = (UInt) (tlsaddr >> 32); -+ ctst->arch.vex.guest_a1 = (UInt) tlsaddr; -+ } -+ flags &= ~VKI_CLONE_SETTLS; -+ -+ /* start the thread with everything blocked */ -+ VG_(sigprocmask)(VKI_SIG_SETMASK, &blockall, &savedmask); -+ -+ /* Create the new thread */ -+ r2 = do_syscall_clone_s390x_linux( -+ stack, flags, child_tidptr, parent_tidptr, tlsaddr, -+ ML_(start_thread_NORETURN), &VG_(threads)[ctid]); -+ -+ res = VG_(mk_SysRes_s390x_linux)( r2 ); -+ -+ VG_(sigprocmask)(VKI_SIG_SETMASK, &savedmask, NULL); -+ -+ out: -+ if (sr_isError(res)) { -+ /* clone failed */ -+ ctst->status = VgTs_Empty; -+ /* oops. Better tell the tool the thread exited in a hurry :-) */ -+ VG_TRACK( pre_thread_ll_exit, ctid ); -+ } -+ -+ return res; -+ -+} -+ -+ -+ -+/* --------------------------------------------------------------------- -+ PRE/POST wrappers for s390x/Linux-specific syscalls -+ ------------------------------------------------------------------ */ -+ -+#define PRE(name) DEFN_PRE_TEMPLATE(s390x_linux, name) -+#define POST(name) DEFN_POST_TEMPLATE(s390x_linux, name) -+ -+/* Add prototypes for the wrappers declared here, so that gcc doesn't -+ harass us for not having prototypes. Really this is a kludge -- -+ the right thing to do is to make these wrappers 'static' since they -+ aren't visible outside this file, but that requires even more macro -+ magic. */ -+ -+DECL_TEMPLATE(s390x_linux, sys_ptrace); -+DECL_TEMPLATE(s390x_linux, sys_socketcall); -+DECL_TEMPLATE(s390x_linux, sys_mmap); -+DECL_TEMPLATE(s390x_linux, sys_ipc); -+DECL_TEMPLATE(s390x_linux, sys_clone); -+DECL_TEMPLATE(s390x_linux, sys_sigreturn); -+DECL_TEMPLATE(s390x_linux, sys_rt_sigreturn); -+DECL_TEMPLATE(s390x_linux, sys_fadvise64); -+ -+// PEEK TEXT,DATA and USER are common to all architectures -+// PEEKUSR_AREA and POKEUSR_AREA are special, having a memory area -+// containing the real addr, data, and len field pointed to by ARG3 -+// instead of ARG4 -+PRE(sys_ptrace) -+{ -+ PRINT("sys_ptrace ( %ld, %ld, %#lx, %#lx )", ARG1,ARG2,ARG3,ARG4); -+ PRE_REG_READ4(int, "ptrace", -+ long, request, long, pid, long, addr, long, data); -+ switch (ARG1) { -+ case VKI_PTRACE_PEEKTEXT: -+ case VKI_PTRACE_PEEKDATA: -+ case VKI_PTRACE_PEEKUSR: -+ PRE_MEM_WRITE( "ptrace(peek)", ARG4, -+ sizeof (long)); -+ break; -+ case VKI_PTRACE_GETEVENTMSG: -+ PRE_MEM_WRITE( "ptrace(geteventmsg)", ARG4, sizeof(unsigned long)); -+ break; -+ case VKI_PTRACE_GETSIGINFO: -+ PRE_MEM_WRITE( "ptrace(getsiginfo)", ARG4, sizeof(vki_siginfo_t)); -+ break; -+ case VKI_PTRACE_SETSIGINFO: -+ PRE_MEM_READ( "ptrace(setsiginfo)", ARG4, sizeof(vki_siginfo_t)); -+ break; -+ case VKI_PTRACE_PEEKUSR_AREA: -+ { -+ vki_ptrace_area *pa; -+ -+ /* Reads a part of the user area into memory at pa->process_addr */ -+ pa = (vki_ptrace_area *) ARG3; -+ PRE_MEM_READ("ptrace(peekusrarea ptrace_area->len)", -+ (unsigned long) &pa->vki_len, sizeof(pa->vki_len)); -+ PRE_MEM_READ("ptrace(peekusrarea ptrace_area->kernel_addr)", -+ (unsigned long) &pa->vki_kernel_addr, sizeof(pa->vki_kernel_addr)); -+ PRE_MEM_READ("ptrace(peekusrarea ptrace_area->process_addr)", -+ (unsigned long) &pa->vki_process_addr, sizeof(pa->vki_process_addr)); -+ PRE_MEM_WRITE("ptrace(peekusrarea *(ptrace_area->process_addr))", -+ pa->vki_process_addr, pa->vki_len); -+ break; -+ } -+ case VKI_PTRACE_POKEUSR_AREA: -+ { -+ vki_ptrace_area *pa; -+ -+ /* Updates a part of the user area from memory at pa->process_addr */ -+ pa = (vki_ptrace_area *) ARG3; -+ PRE_MEM_READ("ptrace(pokeusrarea ptrace_area->len)", -+ (unsigned long) &pa->vki_len, sizeof(pa->vki_len)); -+ PRE_MEM_READ("ptrace(pokeusrarea ptrace_area->kernel_addr)", -+ (unsigned long) &pa->vki_kernel_addr, -+ sizeof(pa->vki_kernel_addr)); -+ PRE_MEM_READ("ptrace(pokeusrarea ptrace_area->process_addr)", -+ (unsigned long) &pa->vki_process_addr, -+ sizeof(pa->vki_process_addr)); -+ PRE_MEM_READ("ptrace(pokeusrarea *(ptrace_area->process_addr))", -+ pa->vki_process_addr, pa->vki_len); -+ break; -+ } -+ default: -+ break; -+ } -+} -+ -+POST(sys_ptrace) -+{ -+ switch (ARG1) { -+ case VKI_PTRACE_PEEKTEXT: -+ case VKI_PTRACE_PEEKDATA: -+ case VKI_PTRACE_PEEKUSR: -+ POST_MEM_WRITE( ARG4, sizeof (long)); -+ break; -+ case VKI_PTRACE_GETEVENTMSG: -+ POST_MEM_WRITE( ARG4, sizeof(unsigned long)); -+ break; -+ case VKI_PTRACE_GETSIGINFO: -+ /* XXX: This is a simplification. Different parts of the -+ * siginfo_t are valid depending on the type of signal. -+ */ -+ POST_MEM_WRITE( ARG4, sizeof(vki_siginfo_t)); -+ break; -+ case VKI_PTRACE_PEEKUSR_AREA: -+ { -+ vki_ptrace_area *pa; -+ -+ pa = (vki_ptrace_area *) ARG3; -+ POST_MEM_WRITE(pa->vki_process_addr, pa->vki_len); -+ } -+ default: -+ break; -+ } -+} -+ -+ -+PRE(sys_socketcall) -+{ -+# define ARG2_0 (((UWord*)ARG2)[0]) -+# define ARG2_1 (((UWord*)ARG2)[1]) -+# define ARG2_2 (((UWord*)ARG2)[2]) -+# define ARG2_3 (((UWord*)ARG2)[3]) -+# define ARG2_4 (((UWord*)ARG2)[4]) -+# define ARG2_5 (((UWord*)ARG2)[5]) -+ -+ *flags |= SfMayBlock; -+ PRINT("sys_socketcall ( %ld, %#lx )",ARG1,ARG2); -+ PRE_REG_READ2(long, "socketcall", int, call, unsigned long *, args); -+ -+ switch (ARG1 /* request */) { -+ -+ case VKI_SYS_SOCKETPAIR: -+ /* int socketpair(int d, int type, int protocol, int sv[2]); */ -+ PRE_MEM_READ( "socketcall.socketpair(args)", ARG2, 4*sizeof(Addr) ); -+ if (!ML_(valid_client_addr)(ARG2, 4*sizeof(Addr), tid, NULL)) { -+ SET_STATUS_Failure( VKI_EFAULT ); -+ break; -+ } -+ ML_(generic_PRE_sys_socketpair)( tid, ARG2_0, ARG2_1, ARG2_2, ARG2_3 ); -+ break; -+ -+ case VKI_SYS_SOCKET: -+ /* int socket(int domain, int type, int protocol); */ -+ PRE_MEM_READ( "socketcall.socket(args)", ARG2, 3*sizeof(Addr) ); -+ if (!ML_(valid_client_addr)(ARG2, 3*sizeof(Addr), tid, NULL)) { -+ SET_STATUS_Failure( VKI_EFAULT ); -+ break; -+ } -+ break; -+ -+ case VKI_SYS_BIND: -+ /* int bind(int sockfd, struct sockaddr *my_addr, -+ int addrlen); */ -+ PRE_MEM_READ( "socketcall.bind(args)", ARG2, 3*sizeof(Addr) ); -+ if (!ML_(valid_client_addr)(ARG2, 3*sizeof(Addr), tid, NULL)) { -+ SET_STATUS_Failure( VKI_EFAULT ); -+ break; -+ } -+ ML_(generic_PRE_sys_bind)( tid, ARG2_0, ARG2_1, ARG2_2 ); -+ break; -+ -+ case VKI_SYS_LISTEN: -+ /* int listen(int s, int backlog); */ -+ PRE_MEM_READ( "socketcall.listen(args)", ARG2, 2*sizeof(Addr) ); -+ if (!ML_(valid_client_addr)(ARG2, 2*sizeof(Addr), tid, NULL)) { -+ SET_STATUS_Failure( VKI_EFAULT ); -+ break; -+ } -+ break; -+ -+ case VKI_SYS_ACCEPT: { -+ /* int accept(int s, struct sockaddr *addr, int *addrlen); */ -+ PRE_MEM_READ( "socketcall.accept(args)", ARG2, 3*sizeof(Addr) ); -+ if (!ML_(valid_client_addr)(ARG2, 3*sizeof(Addr), tid, NULL)) { -+ SET_STATUS_Failure( VKI_EFAULT ); -+ break; -+ } -+ ML_(generic_PRE_sys_accept)( tid, ARG2_0, ARG2_1, ARG2_2 ); -+ break; -+ } -+ -+ case VKI_SYS_SENDTO: -+ /* int sendto(int s, const void *msg, int len, -+ unsigned int flags, -+ const struct sockaddr *to, int tolen); */ -+ PRE_MEM_READ( "socketcall.sendto(args)", ARG2, 6*sizeof(Addr) ); -+ if (!ML_(valid_client_addr)(ARG2, 6*sizeof(Addr), tid, NULL)) { -+ SET_STATUS_Failure( VKI_EFAULT ); -+ break; -+ } -+ ML_(generic_PRE_sys_sendto)( tid, ARG2_0, ARG2_1, ARG2_2, -+ ARG2_3, ARG2_4, ARG2_5 ); -+ break; -+ -+ case VKI_SYS_SEND: -+ /* int send(int s, const void *msg, size_t len, int flags); */ -+ PRE_MEM_READ( "socketcall.send(args)", ARG2, 4*sizeof(Addr) ); -+ if (!ML_(valid_client_addr)(ARG2, 4*sizeof(Addr), tid, NULL)) { -+ SET_STATUS_Failure( VKI_EFAULT ); -+ break; -+ } -+ ML_(generic_PRE_sys_send)( tid, ARG2_0, ARG2_1, ARG2_2 ); -+ break; -+ -+ case VKI_SYS_RECVFROM: -+ /* int recvfrom(int s, void *buf, int len, unsigned int flags, -+ struct sockaddr *from, int *fromlen); */ -+ PRE_MEM_READ( "socketcall.recvfrom(args)", ARG2, 6*sizeof(Addr) ); -+ if (!ML_(valid_client_addr)(ARG2, 6*sizeof(Addr), tid, NULL)) { -+ SET_STATUS_Failure( VKI_EFAULT ); -+ break; -+ } -+ ML_(generic_PRE_sys_recvfrom)( tid, ARG2_0, ARG2_1, ARG2_2, -+ ARG2_3, ARG2_4, ARG2_5 ); -+ break; -+ -+ case VKI_SYS_RECV: -+ /* int recv(int s, void *buf, int len, unsigned int flags); */ -+ /* man 2 recv says: -+ The recv call is normally used only on a connected socket -+ (see connect(2)) and is identical to recvfrom with a NULL -+ from parameter. -+ */ -+ PRE_MEM_READ( "socketcall.recv(args)", ARG2, 4*sizeof(Addr) ); -+ if (!ML_(valid_client_addr)(ARG2, 4*sizeof(Addr), tid, NULL)) { -+ SET_STATUS_Failure( VKI_EFAULT ); -+ break; -+ } -+ ML_(generic_PRE_sys_recv)( tid, ARG2_0, ARG2_1, ARG2_2 ); -+ break; -+ -+ case VKI_SYS_CONNECT: -+ /* int connect(int sockfd, -+ struct sockaddr *serv_addr, int addrlen ); */ -+ PRE_MEM_READ( "socketcall.connect(args)", ARG2, 3*sizeof(Addr) ); -+ if (!ML_(valid_client_addr)(ARG2, 3*sizeof(Addr), tid, NULL)) { -+ SET_STATUS_Failure( VKI_EFAULT ); -+ break; -+ } -+ ML_(generic_PRE_sys_connect)( tid, ARG2_0, ARG2_1, ARG2_2 ); -+ break; -+ -+ case VKI_SYS_SETSOCKOPT: -+ /* int setsockopt(int s, int level, int optname, -+ const void *optval, int optlen); */ -+ PRE_MEM_READ( "socketcall.setsockopt(args)", ARG2, 5*sizeof(Addr) ); -+ if (!ML_(valid_client_addr)(ARG2, 5*sizeof(Addr), tid, NULL)) { -+ SET_STATUS_Failure( VKI_EFAULT ); -+ break; -+ } -+ ML_(generic_PRE_sys_setsockopt)( tid, ARG2_0, ARG2_1, ARG2_2, -+ ARG2_3, ARG2_4 ); -+ break; -+ -+ case VKI_SYS_GETSOCKOPT: -+ /* int getsockopt(int s, int level, int optname, -+ void *optval, socklen_t *optlen); */ -+ PRE_MEM_READ( "socketcall.getsockopt(args)", ARG2, 5*sizeof(Addr) ); -+ if (!ML_(valid_client_addr)(ARG2, 5*sizeof(Addr), tid, NULL)) { -+ SET_STATUS_Failure( VKI_EFAULT ); -+ break; -+ } -+ ML_(linux_PRE_sys_getsockopt)( tid, ARG2_0, ARG2_1, ARG2_2, -+ ARG2_3, ARG2_4 ); -+ break; -+ -+ case VKI_SYS_GETSOCKNAME: -+ /* int getsockname(int s, struct sockaddr* name, int* namelen) */ -+ PRE_MEM_READ( "socketcall.getsockname(args)", ARG2, 3*sizeof(Addr) ); -+ if (!ML_(valid_client_addr)(ARG2, 3*sizeof(Addr), tid, NULL)) { -+ SET_STATUS_Failure( VKI_EFAULT ); -+ break; -+ } -+ ML_(generic_PRE_sys_getsockname)( tid, ARG2_0, ARG2_1, ARG2_2 ); -+ break; -+ -+ case VKI_SYS_GETPEERNAME: -+ /* int getpeername(int s, struct sockaddr* name, int* namelen) */ -+ PRE_MEM_READ( "socketcall.getpeername(args)", ARG2, 3*sizeof(Addr) ); -+ if (!ML_(valid_client_addr)(ARG2, 3*sizeof(Addr), tid, NULL)) { -+ SET_STATUS_Failure( VKI_EFAULT ); -+ break; -+ } -+ ML_(generic_PRE_sys_getpeername)( tid, ARG2_0, ARG2_1, ARG2_2 ); -+ break; -+ -+ case VKI_SYS_SHUTDOWN: -+ /* int shutdown(int s, int how); */ -+ PRE_MEM_READ( "socketcall.shutdown(args)", ARG2, 2*sizeof(Addr) ); -+ if (!ML_(valid_client_addr)(ARG2, 2*sizeof(Addr), tid, NULL)) { -+ SET_STATUS_Failure( VKI_EFAULT ); -+ break; -+ } -+ break; -+ -+ case VKI_SYS_SENDMSG: { -+ /* int sendmsg(int s, const struct msghdr *msg, int flags); */ -+ PRE_MEM_READ( "socketcall.sendmsg(args)", ARG2, 3*sizeof(Addr) ); -+ if (!ML_(valid_client_addr)(ARG2, 3*sizeof(Addr), tid, NULL)) { -+ SET_STATUS_Failure( VKI_EFAULT ); -+ break; -+ } -+ ML_(generic_PRE_sys_sendmsg)( tid, ARG2_0, ARG2_1 ); -+ break; -+ } -+ -+ case VKI_SYS_RECVMSG: { -+ /* int recvmsg(int s, struct msghdr *msg, int flags); */ -+ PRE_MEM_READ("socketcall.recvmsg(args)", ARG2, 3*sizeof(Addr) ); -+ if (!ML_(valid_client_addr)(ARG2, 3*sizeof(Addr), tid, NULL)) { -+ SET_STATUS_Failure( VKI_EFAULT ); -+ break; -+ } -+ ML_(generic_PRE_sys_recvmsg)( tid, ARG2_0, ARG2_1 ); -+ break; -+ } -+ -+ default: -+ VG_(message)(Vg_DebugMsg,"Warning: unhandled socketcall 0x%lx\n",ARG1); -+ SET_STATUS_Failure( VKI_EINVAL ); -+ break; -+ } -+# undef ARG2_0 -+# undef ARG2_1 -+# undef ARG2_2 -+# undef ARG2_3 -+# undef ARG2_4 -+# undef ARG2_5 -+} -+ -+POST(sys_socketcall) -+{ -+# define ARG2_0 (((UWord*)ARG2)[0]) -+# define ARG2_1 (((UWord*)ARG2)[1]) -+# define ARG2_2 (((UWord*)ARG2)[2]) -+# define ARG2_3 (((UWord*)ARG2)[3]) -+# define ARG2_4 (((UWord*)ARG2)[4]) -+# define ARG2_5 (((UWord*)ARG2)[5]) -+ -+ SysRes r; -+ vg_assert(SUCCESS); -+ switch (ARG1 /* request */) { -+ -+ case VKI_SYS_SOCKETPAIR: -+ r = ML_(generic_POST_sys_socketpair)( -+ tid, VG_(mk_SysRes_Success)(RES), -+ ARG2_0, ARG2_1, ARG2_2, ARG2_3 -+ ); -+ SET_STATUS_from_SysRes(r); -+ break; -+ -+ case VKI_SYS_SOCKET: -+ r = ML_(generic_POST_sys_socket)( tid, VG_(mk_SysRes_Success)(RES) ); -+ SET_STATUS_from_SysRes(r); -+ break; -+ -+ case VKI_SYS_BIND: -+ /* int bind(int sockfd, struct sockaddr *my_addr, -+ int addrlen); */ -+ break; -+ -+ case VKI_SYS_LISTEN: -+ /* int listen(int s, int backlog); */ -+ break; -+ -+ case VKI_SYS_ACCEPT: -+ /* int accept(int s, struct sockaddr *addr, int *addrlen); */ -+ r = ML_(generic_POST_sys_accept)( tid, VG_(mk_SysRes_Success)(RES), -+ ARG2_0, ARG2_1, ARG2_2 ); -+ SET_STATUS_from_SysRes(r); -+ break; -+ -+ case VKI_SYS_SENDTO: -+ break; -+ -+ case VKI_SYS_SEND: -+ break; -+ -+ case VKI_SYS_RECVFROM: -+ ML_(generic_POST_sys_recvfrom)( tid, VG_(mk_SysRes_Success)(RES), -+ ARG2_0, ARG2_1, ARG2_2, -+ ARG2_3, ARG2_4, ARG2_5 ); -+ break; -+ -+ case VKI_SYS_RECV: -+ ML_(generic_POST_sys_recv)( tid, RES, ARG2_0, ARG2_1, ARG2_2 ); -+ break; -+ -+ case VKI_SYS_CONNECT: -+ break; -+ -+ case VKI_SYS_SETSOCKOPT: -+ break; -+ -+ case VKI_SYS_GETSOCKOPT: -+ ML_(linux_POST_sys_getsockopt)( tid, VG_(mk_SysRes_Success)(RES), -+ ARG2_0, ARG2_1, -+ ARG2_2, ARG2_3, ARG2_4 ); -+ break; -+ -+ case VKI_SYS_GETSOCKNAME: -+ ML_(generic_POST_sys_getsockname)( tid, VG_(mk_SysRes_Success)(RES), -+ ARG2_0, ARG2_1, ARG2_2 ); -+ break; -+ -+ case VKI_SYS_GETPEERNAME: -+ ML_(generic_POST_sys_getpeername)( tid, VG_(mk_SysRes_Success)(RES), -+ ARG2_0, ARG2_1, ARG2_2 ); -+ break; -+ -+ case VKI_SYS_SHUTDOWN: -+ break; -+ -+ case VKI_SYS_SENDMSG: -+ break; -+ -+ case VKI_SYS_RECVMSG: -+ ML_(generic_POST_sys_recvmsg)( tid, ARG2_0, ARG2_1 ); -+ break; -+ -+ default: -+ VG_(message)(Vg_DebugMsg,"FATAL: unhandled socketcall 0x%lx\n",ARG1); -+ VG_(core_panic)("... bye!\n"); -+ break; /*NOTREACHED*/ -+ } -+# undef ARG2_0 -+# undef ARG2_1 -+# undef ARG2_2 -+# undef ARG2_3 -+# undef ARG2_4 -+# undef ARG2_5 -+} -+ -+PRE(sys_mmap) -+{ -+ UWord a0, a1, a2, a3, a4, a5; -+ SysRes r; -+ -+ UWord* args = (UWord*)ARG1; -+ PRE_REG_READ1(long, "sys_mmap", struct mmap_arg_struct *, args); -+ PRE_MEM_READ( "sys_mmap(args)", (Addr) args, 6*sizeof(UWord) ); -+ -+ a0 = args[0]; -+ a1 = args[1]; -+ a2 = args[2]; -+ a3 = args[3]; -+ a4 = args[4]; -+ a5 = args[5]; -+ -+ PRINT("sys_mmap ( %#lx, %llu, %ld, %ld, %ld, %ld )", -+ a0, (ULong)a1, a2, a3, a4, a5 ); -+ -+ r = ML_(generic_PRE_sys_mmap)( tid, a0, a1, a2, a3, a4, (Off64T)a5 ); -+ SET_STATUS_from_SysRes(r); -+} -+ -+static Addr deref_Addr ( ThreadId tid, Addr a, Char* s ) -+{ -+ Addr* a_p = (Addr*)a; -+ PRE_MEM_READ( s, (Addr)a_p, sizeof(Addr) ); -+ return *a_p; -+} -+ -+PRE(sys_ipc) -+{ -+ PRINT("sys_ipc ( %ld, %ld, %ld, %ld, %#lx, %ld )", -+ ARG1,ARG2,ARG3,ARG4,ARG5,ARG6); -+ // XXX: this is simplistic -- some args are not used in all circumstances. -+ PRE_REG_READ6(int, "ipc", -+ vki_uint, call, int, first, int, second, int, third, -+ void *, ptr, long, fifth) -+ -+ switch (ARG1 /* call */) { -+ case VKI_SEMOP: -+ ML_(generic_PRE_sys_semop)( tid, ARG2, ARG5, ARG3 ); -+ *flags |= SfMayBlock; -+ break; -+ case VKI_SEMGET: -+ break; -+ case VKI_SEMCTL: -+ { -+ UWord arg = deref_Addr( tid, ARG5, "semctl(arg)" ); -+ ML_(generic_PRE_sys_semctl)( tid, ARG2, ARG3, ARG4, arg ); -+ break; -+ } -+ case VKI_SEMTIMEDOP: -+ ML_(generic_PRE_sys_semtimedop)( tid, ARG2, ARG5, ARG3, ARG6 ); -+ *flags |= SfMayBlock; -+ break; -+ case VKI_MSGSND: -+ ML_(linux_PRE_sys_msgsnd)( tid, ARG2, ARG5, ARG3, ARG4 ); -+ if ((ARG4 & VKI_IPC_NOWAIT) == 0) -+ *flags |= SfMayBlock; -+ break; -+ case VKI_MSGRCV: -+ { -+ Addr msgp; -+ Word msgtyp; -+ -+ msgp = deref_Addr( tid, -+ (Addr) (&((struct vki_ipc_kludge *)ARG5)->msgp), -+ "msgrcv(msgp)" ); -+ msgtyp = deref_Addr( tid, -+ (Addr) (&((struct vki_ipc_kludge *)ARG5)->msgtyp), -+ "msgrcv(msgp)" ); -+ -+ ML_(linux_PRE_sys_msgrcv)( tid, ARG2, msgp, ARG3, msgtyp, ARG4 ); -+ -+ if ((ARG4 & VKI_IPC_NOWAIT) == 0) -+ *flags |= SfMayBlock; -+ break; -+ } -+ case VKI_MSGGET: -+ break; -+ case VKI_MSGCTL: -+ ML_(linux_PRE_sys_msgctl)( tid, ARG2, ARG3, ARG5 ); -+ break; -+ case VKI_SHMAT: -+ { -+ UWord w; -+ PRE_MEM_WRITE( "shmat(raddr)", ARG4, sizeof(Addr) ); -+ w = ML_(generic_PRE_sys_shmat)( tid, ARG2, ARG5, ARG3 ); -+ if (w == 0) -+ SET_STATUS_Failure( VKI_EINVAL ); -+ else -+ ARG5 = w; -+ break; -+ } -+ case VKI_SHMDT: -+ if (!ML_(generic_PRE_sys_shmdt)(tid, ARG5)) -+ SET_STATUS_Failure( VKI_EINVAL ); -+ break; -+ case VKI_SHMGET: -+ break; -+ case VKI_SHMCTL: /* IPCOP_shmctl */ -+ ML_(generic_PRE_sys_shmctl)( tid, ARG2, ARG3, ARG5 ); -+ break; -+ default: -+ VG_(message)(Vg_DebugMsg, "FATAL: unhandled syscall(ipc) %ld", ARG1 ); -+ VG_(core_panic)("... bye!\n"); -+ break; /*NOTREACHED*/ -+ } -+} -+ -+POST(sys_ipc) -+{ -+ vg_assert(SUCCESS); -+ switch (ARG1 /* call */) { -+ case VKI_SEMOP: -+ case VKI_SEMGET: -+ break; -+ case VKI_SEMCTL: -+ { -+ UWord arg = deref_Addr( tid, ARG5, "semctl(arg)" ); -+ ML_(generic_PRE_sys_semctl)( tid, ARG2, ARG3, ARG4, arg ); -+ break; -+ } -+ case VKI_SEMTIMEDOP: -+ case VKI_MSGSND: -+ break; -+ case VKI_MSGRCV: -+ { -+ Addr msgp; -+ Word msgtyp; -+ -+ msgp = deref_Addr( tid, -+ (Addr) (&((struct vki_ipc_kludge *)ARG5)->msgp), -+ "msgrcv(msgp)" ); -+ msgtyp = deref_Addr( tid, -+ (Addr) (&((struct vki_ipc_kludge *)ARG5)->msgtyp), -+ "msgrcv(msgp)" ); -+ -+ ML_(linux_POST_sys_msgrcv)( tid, RES, ARG2, msgp, ARG3, msgtyp, ARG4 ); -+ break; -+ } -+ case VKI_MSGGET: -+ break; -+ case VKI_MSGCTL: -+ ML_(linux_POST_sys_msgctl)( tid, RES, ARG2, ARG3, ARG5 ); -+ break; -+ case VKI_SHMAT: -+ { -+ Addr addr; -+ -+ /* force readability. before the syscall it is -+ * indeed uninitialized, as can be seen in -+ * glibc/sysdeps/unix/sysv/linux/shmat.c */ -+ POST_MEM_WRITE( ARG4, sizeof( Addr ) ); -+ -+ addr = deref_Addr ( tid, ARG4, "shmat(addr)" ); -+ ML_(generic_POST_sys_shmat)( tid, addr, ARG2, ARG5, ARG3 ); -+ break; -+ } -+ case VKI_SHMDT: -+ ML_(generic_POST_sys_shmdt)( tid, RES, ARG5 ); -+ break; -+ case VKI_SHMGET: -+ break; -+ case VKI_SHMCTL: -+ ML_(generic_POST_sys_shmctl)( tid, RES, ARG2, ARG3, ARG5 ); -+ break; -+ default: -+ VG_(message)(Vg_DebugMsg, -+ "FATAL: unhandled syscall(ipc) %ld", -+ ARG1 ); -+ VG_(core_panic)("... bye!\n"); -+ break; /*NOTREACHED*/ -+ } -+} -+ -+PRE(sys_clone) -+{ -+ UInt cloneflags; -+ -+ PRINT("sys_clone ( %lx, %#lx, %#lx, %#lx, %#lx )",ARG1,ARG2,ARG3,ARG4, ARG5); -+ PRE_REG_READ4(int, "clone", -+ void *, child_stack, -+ unsigned long, flags, -+ int *, parent_tidptr, -+ int *, child_tidptr); -+ -+ if (ARG2 & VKI_CLONE_PARENT_SETTID) { -+ PRE_MEM_WRITE("clone(parent_tidptr)", ARG3, sizeof(Int)); -+ if (!VG_(am_is_valid_for_client)(ARG3, sizeof(Int), -+ VKI_PROT_WRITE)) { -+ SET_STATUS_Failure( VKI_EFAULT ); -+ return; -+ } -+ } -+ if (ARG2 & (VKI_CLONE_CHILD_SETTID | VKI_CLONE_CHILD_CLEARTID)) { -+ PRE_MEM_WRITE("clone(child_tidptr)", ARG4, sizeof(Int)); -+ if (!VG_(am_is_valid_for_client)(ARG4, sizeof(Int), -+ VKI_PROT_WRITE)) { -+ SET_STATUS_Failure( VKI_EFAULT ); -+ return; -+ } -+ } -+ -+ cloneflags = ARG2; -+ -+ if (!ML_(client_signal_OK)(ARG2 & VKI_CSIGNAL)) { -+ SET_STATUS_Failure( VKI_EINVAL ); -+ return; -+ } -+ -+ /* Only look at the flags we really care about */ -+ switch (cloneflags & (VKI_CLONE_VM | VKI_CLONE_FS -+ | VKI_CLONE_FILES | VKI_CLONE_VFORK)) { -+ case VKI_CLONE_VM | VKI_CLONE_FS | VKI_CLONE_FILES: -+ /* thread creation */ -+ SET_STATUS_from_SysRes( -+ do_clone(tid, -+ (Addr)ARG1, /* child SP */ -+ ARG2, /* flags */ -+ (Int *)ARG3, /* parent_tidptr */ -+ (Int *)ARG4, /* child_tidptr */ -+ (Addr)ARG5)); /* tlsaddr */ -+ break; -+ -+ case VKI_CLONE_VFORK | VKI_CLONE_VM: /* vfork */ -+ /* FALLTHROUGH - assume vfork == fork */ -+ cloneflags &= ~(VKI_CLONE_VFORK | VKI_CLONE_VM); -+ -+ case 0: /* plain fork */ -+ SET_STATUS_from_SysRes( -+ ML_(do_fork_clone)(tid, -+ cloneflags, /* flags */ -+ (Int *)ARG3, /* parent_tidptr */ -+ (Int *)ARG4)); /* child_tidptr */ -+ break; -+ -+ default: -+ /* should we just ENOSYS? */ -+ VG_(message)(Vg_UserMsg, "Unsupported clone() flags: 0x%lx", ARG2); -+ VG_(message)(Vg_UserMsg, ""); -+ VG_(message)(Vg_UserMsg, "The only supported clone() uses are:"); -+ VG_(message)(Vg_UserMsg, " - via a threads library (NPTL)"); -+ VG_(message)(Vg_UserMsg, " - via the implementation of fork or vfork"); -+ VG_(unimplemented) -+ ("Valgrind does not support general clone()."); -+ } -+ -+ if (SUCCESS) { -+ if (ARG2 & VKI_CLONE_PARENT_SETTID) -+ POST_MEM_WRITE(ARG3, sizeof(Int)); -+ if (ARG2 & (VKI_CLONE_CHILD_SETTID | VKI_CLONE_CHILD_CLEARTID)) -+ POST_MEM_WRITE(ARG4, sizeof(Int)); -+ -+ /* Thread creation was successful; let the child have the chance -+ to run */ -+ *flags |= SfYieldAfter; -+ } -+} -+ -+PRE(sys_sigreturn) -+{ -+ ThreadState* tst; -+ PRINT("sys_sigreturn ( )"); -+ -+ vg_assert(VG_(is_valid_tid)(tid)); -+ vg_assert(tid >= 1 && tid < VG_N_THREADS); -+ vg_assert(VG_(is_running_thread)(tid)); -+ -+ tst = VG_(get_ThreadState)(tid); -+ -+ /* This is only so that the IA is (might be) useful to report if -+ something goes wrong in the sigreturn */ -+ ML_(fixup_guest_state_to_restart_syscall)(&tst->arch); -+ -+ /* Restore register state from frame and remove it */ -+ VG_(sigframe_destroy)(tid, False); -+ -+ /* Tell the driver not to update the guest state with the "result", -+ and set a bogus result to keep it happy. */ -+ *flags |= SfNoWriteResult; -+ SET_STATUS_Success(0); -+ -+ /* Check to see if any signals arose as a result of this. */ -+ *flags |= SfPollAfter; -+} -+ -+ -+PRE(sys_rt_sigreturn) -+{ -+ /* See comments on PRE(sys_rt_sigreturn) in syswrap-amd64-linux.c for -+ an explanation of what follows. */ -+ -+ ThreadState* tst; -+ PRINT("sys_rt_sigreturn ( )"); -+ -+ vg_assert(VG_(is_valid_tid)(tid)); -+ vg_assert(tid >= 1 && tid < VG_N_THREADS); -+ vg_assert(VG_(is_running_thread)(tid)); -+ -+ tst = VG_(get_ThreadState)(tid); -+ -+ /* This is only so that the IA is (might be) useful to report if -+ something goes wrong in the sigreturn */ -+ ML_(fixup_guest_state_to_restart_syscall)(&tst->arch); -+ -+ /* Restore register state from frame and remove it */ -+ VG_(sigframe_destroy)(tid, True); -+ -+ /* Tell the driver not to update the guest state with the "result", -+ and set a bogus result to keep it happy. */ -+ *flags |= SfNoWriteResult; -+ SET_STATUS_Success(0); -+ -+ /* Check to see if any signals arose as a result of this. */ -+ *flags |= SfPollAfter; -+} -+ -+/* we cant use the LINX_ version for 64 bit */ -+PRE(sys_fadvise64) -+{ -+ PRINT("sys_fadvise64 ( %ld, %ld, %ld, %ld )", ARG1,ARG2,ARG3,ARG4); -+ PRE_REG_READ4(long, "fadvise64", -+ int, fd, vki_loff_t, offset, vki_loff_t, len, int, advice); -+} -+ -+#undef PRE -+#undef POST -+ -+/* --------------------------------------------------------------------- -+ The s390x/Linux syscall table -+ ------------------------------------------------------------------ */ -+ -+/* Add an s390x-linux specific wrapper to a syscall table. */ -+#define PLAX_(sysno, name) WRAPPER_ENTRY_X_(s390x_linux, sysno, name) -+#define PLAXY(sysno, name) WRAPPER_ENTRY_XY(s390x_linux, sysno, name) -+ -+// This table maps from __NR_xxx syscall numbers from -+// linux/arch/s390/kernel/syscalls.S to the appropriate PRE/POST sys_foo() -+// wrappers on s390x. There are several unused numbers, which are only -+// defined on s390 (31bit mode) but no longer available on s390x (64 bit). -+// For those syscalls not handled by Valgrind, the annotation indicate its -+// arch/OS combination, eg. */* (generic), */Linux (Linux only), ?/? -+// (unknown). -+ -+static SyscallTableEntry syscall_table[] = { -+ GENX_(0, sys_ni_syscall), /* unimplemented (by the kernel) */ // 0 -+ GENX_(__NR_exit, sys_exit), // 1 -+ GENX_(__NR_fork, sys_fork), // 2 -+ GENXY(__NR_read, sys_read), // 3 -+ GENX_(__NR_write, sys_write), // 4 -+ -+ GENXY(__NR_open, sys_open), // 5 -+ GENXY(__NR_close, sys_close), // 6 -+// ?????(__NR_restart_syscall, ), // 7 -+ GENXY(__NR_creat, sys_creat), // 8 -+ GENX_(__NR_link, sys_link), // 9 -+ -+ GENX_(__NR_unlink, sys_unlink), // 10 -+ GENX_(__NR_execve, sys_execve), // 11 -+ GENX_(__NR_chdir, sys_chdir), // 12 -+ GENX_(13, sys_ni_syscall), /* unimplemented (by the kernel) */ // 13 -+ GENX_(__NR_mknod, sys_mknod), // 14 -+ -+ GENX_(__NR_chmod, sys_chmod), // 15 -+ GENX_(16, sys_ni_syscall), /* unimplemented (by the kernel) */ // 16 -+ GENX_(17, sys_ni_syscall), /* unimplemented (by the kernel) */ // 17 -+ GENX_(18, sys_ni_syscall), /* unimplemented (by the kernel) */ // 18 -+ LINX_(__NR_lseek, sys_lseek), // 19 -+ -+ GENX_(__NR_getpid, sys_getpid), // 20 -+ LINX_(__NR_mount, sys_mount), // 21 -+ LINX_(__NR_umount, sys_oldumount), // 22 -+ GENX_(23, sys_ni_syscall), /* unimplemented (by the kernel) */ // 23 -+ GENX_(24, sys_ni_syscall), /* unimplemented (by the kernel) */ // 24 -+ -+ GENX_(25, sys_ni_syscall), /* unimplemented (by the kernel) */ // 25 -+ PLAXY(__NR_ptrace, sys_ptrace), // 26 -+ GENX_(__NR_alarm, sys_alarm), // 27 -+ GENX_(28, sys_ni_syscall), /* unimplemented (by the kernel) */ // 28 -+ GENX_(__NR_pause, sys_pause), // 29 -+ -+ LINX_(__NR_utime, sys_utime), // 30 -+ GENX_(31, sys_ni_syscall), /* unimplemented (by the kernel) */ // 31 -+ GENX_(32, sys_ni_syscall), /* unimplemented (by the kernel) */ // 32 -+ GENX_(__NR_access, sys_access), // 33 -+ GENX_(__NR_nice, sys_nice), // 34 -+ -+ GENX_(35, sys_ni_syscall), /* unimplemented (by the kernel) */ // 35 -+ GENX_(__NR_sync, sys_sync), // 36 -+ GENX_(__NR_kill, sys_kill), // 37 -+ GENX_(__NR_rename, sys_rename), // 38 -+ GENX_(__NR_mkdir, sys_mkdir), // 39 -+ -+ GENX_(__NR_rmdir, sys_rmdir), // 40 -+ GENXY(__NR_dup, sys_dup), // 41 -+ LINXY(__NR_pipe, sys_pipe), // 42 -+ GENXY(__NR_times, sys_times), // 43 -+ GENX_(44, sys_ni_syscall), /* unimplemented (by the kernel) */ // 44 -+ -+ GENX_(__NR_brk, sys_brk), // 45 -+ GENX_(46, sys_ni_syscall), /* unimplemented (by the kernel) */ // 46 -+ GENX_(47, sys_ni_syscall), /* unimplemented (by the kernel) */ // 47 -+// ?????(__NR_signal, ), // 48 -+ GENX_(49, sys_ni_syscall), /* unimplemented (by the kernel) */ // 49 -+ -+ GENX_(50, sys_ni_syscall), /* unimplemented (by the kernel) */ // 50 -+ GENX_(__NR_acct, sys_acct), // 51 -+ LINX_(__NR_umount2, sys_umount), // 52 -+ GENX_(53, sys_ni_syscall), /* unimplemented (by the kernel) */ // 53 -+ LINXY(__NR_ioctl, sys_ioctl), // 54 -+ -+ LINXY(__NR_fcntl, sys_fcntl), // 55 -+ GENX_(56, sys_ni_syscall), /* unimplemented (by the kernel) */ // 56 -+ GENX_(__NR_setpgid, sys_setpgid), // 57 -+ GENX_(58, sys_ni_syscall), /* unimplemented (by the kernel) */ // 58 -+ GENX_(59, sys_ni_syscall), /* unimplemented (by the kernel) */ // 59 -+ -+ GENX_(__NR_umask, sys_umask), // 60 -+ GENX_(__NR_chroot, sys_chroot), // 61 -+// ?????(__NR_ustat, sys_ustat), /* deprecated in favor of statfs */ // 62 -+ GENXY(__NR_dup2, sys_dup2), // 63 -+ GENX_(__NR_getppid, sys_getppid), // 64 -+ -+ GENX_(__NR_getpgrp, sys_getpgrp), // 65 -+ GENX_(__NR_setsid, sys_setsid), // 66 -+// ?????(__NR_sigaction, ), /* userspace uses rt_sigaction */ // 67 -+ GENX_(68, sys_ni_syscall), /* unimplemented (by the kernel) */ // 68 -+ GENX_(69, sys_ni_syscall), /* unimplemented (by the kernel) */ // 69 -+ -+ GENX_(70, sys_ni_syscall), /* unimplemented (by the kernel) */ // 70 -+ GENX_(71, sys_ni_syscall), /* unimplemented (by the kernel) */ // 71 -+// ?????(__NR_sigsuspend, ), // 72 -+// ?????(__NR_sigpending, ), // 73 -+// ?????(__NR_sethostname, ), // 74 -+ -+ GENX_(__NR_setrlimit, sys_setrlimit), // 75 -+ GENXY(76, sys_getrlimit), /* see also 191 */ // 76 -+ GENXY(__NR_getrusage, sys_getrusage), // 77 -+ GENXY(__NR_gettimeofday, sys_gettimeofday), // 78 -+ GENX_(__NR_settimeofday, sys_settimeofday), // 79 -+ -+ GENX_(80, sys_ni_syscall), /* unimplemented (by the kernel) */ // 80 -+ GENX_(81, sys_ni_syscall), /* unimplemented (by the kernel) */ // 81 -+ GENX_(82, sys_ni_syscall), /* unimplemented (by the kernel) */ // 82 -+ GENX_(__NR_symlink, sys_symlink), // 83 -+ GENX_(84, sys_ni_syscall), /* unimplemented (by the kernel) */ // 84 -+ -+ GENX_(__NR_readlink, sys_readlink), // 85 -+// ?????(__NR_uselib, ), // 86 -+// ?????(__NR_swapon, ), // 87 -+// ?????(__NR_reboot, ), // 88 -+ GENX_(89, sys_ni_syscall), /* unimplemented (by the kernel) */ // 89 -+ -+ PLAX_(__NR_mmap, sys_mmap ), // 90 -+ GENXY(__NR_munmap, sys_munmap), // 91 -+ GENX_(__NR_truncate, sys_truncate), // 92 -+ GENX_(__NR_ftruncate, sys_ftruncate), // 93 -+ GENX_(__NR_fchmod, sys_fchmod), // 94 -+ -+ GENX_(95, sys_ni_syscall), /* unimplemented (by the kernel) */ // 95 -+ GENX_(__NR_getpriority, sys_getpriority), // 96 -+ GENX_(__NR_setpriority, sys_setpriority), // 97 -+ GENX_(98, sys_ni_syscall), /* unimplemented (by the kernel) */ // 98 -+ GENXY(__NR_statfs, sys_statfs), // 99 -+ -+ GENXY(__NR_fstatfs, sys_fstatfs), // 100 -+ GENX_(101, sys_ni_syscall), /* unimplemented (by the kernel) */ // 101 -+ PLAXY(__NR_socketcall, sys_socketcall), // 102 -+ LINXY(__NR_syslog, sys_syslog), // 103 -+ GENXY(__NR_setitimer, sys_setitimer), // 104 -+ -+ GENXY(__NR_getitimer, sys_getitimer), // 105 -+ GENXY(__NR_stat, sys_newstat), // 106 -+ GENXY(__NR_lstat, sys_newlstat), // 107 -+ GENXY(__NR_fstat, sys_newfstat), // 108 -+ GENX_(109, sys_ni_syscall), /* unimplemented (by the kernel) */ // 109 -+ -+ LINXY(__NR_lookup_dcookie, sys_lookup_dcookie), // 110 -+ LINX_(__NR_vhangup, sys_vhangup), // 111 -+ GENX_(112, sys_ni_syscall), /* unimplemented (by the kernel) */ // 112 -+ GENX_(113, sys_ni_syscall), /* unimplemented (by the kernel) */ // 113 -+ GENXY(__NR_wait4, sys_wait4), // 114 -+ -+// ?????(__NR_swapoff, ), // 115 -+ LINXY(__NR_sysinfo, sys_sysinfo), // 116 -+ PLAXY(__NR_ipc, sys_ipc), // 117 -+ GENX_(__NR_fsync, sys_fsync), // 118 -+ PLAX_(__NR_sigreturn, sys_sigreturn), // 119 -+ -+ PLAX_(__NR_clone, sys_clone), // 120 -+// ?????(__NR_setdomainname, ), // 121 -+ GENXY(__NR_uname, sys_newuname), // 122 -+ GENX_(123, sys_ni_syscall), /* unimplemented (by the kernel) */ // 123 -+// ?????(__NR_adjtimex, ), // 124 -+ -+ GENXY(__NR_mprotect, sys_mprotect), // 125 -+// LINXY(__NR_sigprocmask, sys_sigprocmask), // 126 -+ GENX_(127, sys_ni_syscall), /* unimplemented (by the kernel) */ // 127 -+ LINX_(__NR_init_module, sys_init_module), // 128 -+ LINX_(__NR_delete_module, sys_delete_module), // 129 -+ -+ GENX_(130, sys_ni_syscall), /* unimplemented (by the kernel) */ // 130 -+ LINX_(__NR_quotactl, sys_quotactl), // 131 -+ GENX_(__NR_getpgid, sys_getpgid), // 132 -+ GENX_(__NR_fchdir, sys_fchdir), // 133 -+// ?????(__NR_bdflush, ), // 134 -+ -+// ?????(__NR_sysfs, ), // 135 -+ LINX_(__NR_personality, sys_personality), // 136 -+ GENX_(137, sys_ni_syscall), /* unimplemented (by the kernel) */ // 137 -+ GENX_(138, sys_ni_syscall), /* unimplemented (by the kernel) */ // 138 -+ GENX_(139, sys_ni_syscall), /* unimplemented (by the kernel) */ // 139 -+ -+// LINXY(__NR__llseek, sys_llseek), /* 64 bit --> lseek */ // 140 -+ GENXY(__NR_getdents, sys_getdents), // 141 -+ GENX_(__NR_select, sys_select), // 142 -+ GENX_(__NR_flock, sys_flock), // 143 -+ GENX_(__NR_msync, sys_msync), // 144 -+ -+ GENXY(__NR_readv, sys_readv), // 145 -+ GENX_(__NR_writev, sys_writev), // 146 -+ GENX_(__NR_getsid, sys_getsid), // 147 -+ GENX_(__NR_fdatasync, sys_fdatasync), // 148 -+ LINXY(__NR__sysctl, sys_sysctl), // 149 -+ -+ GENX_(__NR_mlock, sys_mlock), // 150 -+ GENX_(__NR_munlock, sys_munlock), // 151 -+ GENX_(__NR_mlockall, sys_mlockall), // 152 -+ LINX_(__NR_munlockall, sys_munlockall), // 153 -+ LINXY(__NR_sched_setparam, sys_sched_setparam), // 154 -+ -+ LINXY(__NR_sched_getparam, sys_sched_getparam), // 155 -+ LINX_(__NR_sched_setscheduler, sys_sched_setscheduler), // 156 -+ LINX_(__NR_sched_getscheduler, sys_sched_getscheduler), // 157 -+ LINX_(__NR_sched_yield, sys_sched_yield), // 158 -+ LINX_(__NR_sched_get_priority_max, sys_sched_get_priority_max), // 159 -+ -+ LINX_(__NR_sched_get_priority_min, sys_sched_get_priority_min), // 160 -+// ?????(__NR_sched_rr_get_interval, ), // 161 -+ GENXY(__NR_nanosleep, sys_nanosleep), // 162 -+ GENX_(__NR_mremap, sys_mremap), // 163 -+ GENX_(164, sys_ni_syscall), /* unimplemented (by the kernel) */ // 164 -+ -+ GENX_(165, sys_ni_syscall), /* unimplemented (by the kernel) */ // 165 -+ GENX_(166, sys_ni_syscall), /* unimplemented (by the kernel) */ // 166 -+ GENX_(167, sys_ni_syscall), /* unimplemented (by the kernel) */ // 167 -+ GENXY(__NR_poll, sys_poll), // 168 -+// ?????(__NR_nfsservctl, ), // 169 -+ -+ GENX_(170, sys_ni_syscall), /* unimplemented (by the kernel) */ // 170 -+ GENX_(171, sys_ni_syscall), /* unimplemented (by the kernel) */ // 171 -+ LINXY(__NR_prctl, sys_prctl), // 172 -+ PLAX_(__NR_rt_sigreturn, sys_rt_sigreturn), // 173 -+ LINXY(__NR_rt_sigaction, sys_rt_sigaction), // 174 -+ -+ LINXY(__NR_rt_sigprocmask, sys_rt_sigprocmask), // 175 -+ LINXY(__NR_rt_sigpending, sys_rt_sigpending), // 176 -+ LINXY(__NR_rt_sigtimedwait, sys_rt_sigtimedwait), // 177 -+ LINXY(__NR_rt_sigqueueinfo, sys_rt_sigqueueinfo), // 178 -+ LINX_(__NR_rt_sigsuspend, sys_rt_sigsuspend), // 179 -+ -+ GENXY(__NR_pread64, sys_pread64), // 180 -+ GENX_(__NR_pwrite64, sys_pwrite64), // 181 -+ GENX_(182, sys_ni_syscall), /* unimplemented (by the kernel) */ // 182 -+ GENXY(__NR_getcwd, sys_getcwd), // 183 -+ LINXY(__NR_capget, sys_capget), // 184 -+ -+ LINX_(__NR_capset, sys_capset), // 185 -+ GENXY(__NR_sigaltstack, sys_sigaltstack), // 186 -+ LINXY(__NR_sendfile, sys_sendfile), // 187 -+ GENX_(188, sys_ni_syscall), /* unimplemented (by the kernel) */ // 188 -+ GENX_(189, sys_ni_syscall), /* unimplemented (by the kernel) */ // 189 -+ -+ GENX_(__NR_vfork, sys_fork), // 190 -+ GENXY(__NR_getrlimit, sys_getrlimit), // 191 -+ GENX_(192, sys_ni_syscall), /* not exported on 64bit*/ // 192 -+ GENX_(193, sys_ni_syscall), /* unimplemented (by the kernel) */ // 193 -+ GENX_(194, sys_ni_syscall), /* unimplemented (by the kernel) */ // 194 -+ -+ GENX_(195, sys_ni_syscall), /* unimplemented (by the kernel) */ // 195 -+ GENX_(196, sys_ni_syscall), /* unimplemented (by the kernel) */ // 196 -+ GENX_(197, sys_ni_syscall), /* unimplemented (by the kernel) */ // 197 -+ GENX_(__NR_lchown, sys_lchown), // 198 -+ GENX_(__NR_getuid, sys_getuid), // 199 -+ -+ GENX_(__NR_getgid, sys_getgid), // 200 -+ GENX_(__NR_geteuid, sys_geteuid), // 201 -+ GENX_(__NR_getegid, sys_getegid), // 202 -+ GENX_(__NR_setreuid, sys_setreuid), // 203 -+ GENX_(__NR_setregid, sys_setregid), // 204 -+ -+ GENXY(__NR_getgroups, sys_getgroups), // 205 -+ GENX_(__NR_setgroups, sys_setgroups), // 206 -+ GENX_(__NR_fchown, sys_fchown), // 207 -+ LINX_(__NR_setresuid, sys_setresuid), // 208 -+ LINXY(__NR_getresuid, sys_getresuid), // 209 -+ -+ LINX_(__NR_setresgid, sys_setresgid), // 210 -+ LINXY(__NR_getresgid, sys_getresgid), // 211 -+ GENX_(__NR_chown, sys_chown), // 212 -+ GENX_(__NR_setuid, sys_setuid), // 213 -+ GENX_(__NR_setgid, sys_setgid), // 214 -+ -+ LINX_(__NR_setfsuid, sys_setfsuid), // 215 -+ LINX_(__NR_setfsgid, sys_setfsgid), // 216 -+// ?????(__NR_pivot_root, ), -+ GENX_(__NR_mincore, sys_mincore), // 218 -+ GENX_(__NR_madvise, sys_madvise), // 219 -+ -+ GENXY(__NR_getdents64, sys_getdents64), // 220 -+ GENX_(221, sys_ni_syscall), /* unimplemented (by the kernel) */ // 221 -+ LINX_(__NR_readahead, sys_readahead), // 222 -+ GENX_(223, sys_ni_syscall), /* unimplemented (by the kernel) */ // 223 -+ LINX_(__NR_setxattr, sys_setxattr), // 224 -+ -+ LINX_(__NR_lsetxattr, sys_lsetxattr), // 225 -+ LINX_(__NR_fsetxattr, sys_fsetxattr), // 226 -+ LINXY(__NR_getxattr, sys_getxattr), // 227 -+ LINXY(__NR_lgetxattr, sys_lgetxattr), // 228 -+ LINXY(__NR_fgetxattr, sys_fgetxattr), // 229 -+ -+ LINXY(__NR_listxattr, sys_listxattr), // 230 -+ LINXY(__NR_llistxattr, sys_llistxattr), // 231 -+ LINXY(__NR_flistxattr, sys_flistxattr), // 232 -+ LINX_(__NR_removexattr, sys_removexattr), // 233 -+ LINX_(__NR_lremovexattr, sys_lremovexattr), // 234 -+ -+ LINX_(__NR_fremovexattr, sys_fremovexattr), // 235 -+ LINX_(__NR_gettid, sys_gettid), // 236 -+ LINXY(__NR_tkill, sys_tkill), // 237 -+ LINXY(__NR_futex, sys_futex), // 238 -+ LINX_(__NR_sched_setaffinity, sys_sched_setaffinity), // 239 -+ -+ LINXY(__NR_sched_getaffinity, sys_sched_getaffinity), // 240 -+ LINXY(__NR_tgkill, sys_tgkill), // 241 -+ GENX_(242, sys_ni_syscall), /* unimplemented (by the kernel) */ // 242 -+ LINXY(__NR_io_setup, sys_io_setup), // 243 -+ LINX_(__NR_io_destroy, sys_io_destroy), // 244 -+ -+ LINXY(__NR_io_getevents, sys_io_getevents), // 245 -+ LINX_(__NR_io_submit, sys_io_submit), // 246 -+ LINXY(__NR_io_cancel, sys_io_cancel), // 247 -+ LINX_(__NR_exit_group, sys_exit_group), // 248 -+ LINXY(__NR_epoll_create, sys_epoll_create), // 249 -+ -+ LINX_(__NR_epoll_ctl, sys_epoll_ctl), // 250 -+ LINXY(__NR_epoll_wait, sys_epoll_wait), // 251 -+ LINX_(__NR_set_tid_address, sys_set_tid_address), // 252 -+ PLAX_(__NR_fadvise64, sys_fadvise64), // 253 -+ LINXY(__NR_timer_create, sys_timer_create), // 254 -+ -+ LINXY(__NR_timer_settime, sys_timer_settime), // 255 -+ LINXY(__NR_timer_gettime, sys_timer_gettime), // 256 -+ LINX_(__NR_timer_getoverrun, sys_timer_getoverrun), // 257 -+ LINX_(__NR_timer_delete, sys_timer_delete), // 258 -+ LINX_(__NR_clock_settime, sys_clock_settime), // 259 -+ -+ LINXY(__NR_clock_gettime, sys_clock_gettime), // 260 -+ LINXY(__NR_clock_getres, sys_clock_getres), // 261 -+ LINXY(__NR_clock_nanosleep, sys_clock_nanosleep), // 262 -+ GENX_(263, sys_ni_syscall), /* unimplemented (by the kernel) */ // 263 -+ GENX_(264, sys_ni_syscall), /* unimplemented (by the kernel) */ // 264 -+ -+ GENXY(__NR_statfs64, sys_statfs64), // 265 -+ GENXY(__NR_fstatfs64, sys_fstatfs64), // 266 -+// ?????(__NR_remap_file_pages, ), -+ GENX_(268, sys_ni_syscall), /* unimplemented (by the kernel) */ // 268 -+ GENX_(269, sys_ni_syscall), /* unimplemented (by the kernel) */ // 269 -+ -+ GENX_(270, sys_ni_syscall), /* unimplemented (by the kernel) */ // 270 -+ LINXY(__NR_mq_open, sys_mq_open), // 271 -+ LINX_(__NR_mq_unlink, sys_mq_unlink), // 272 -+ LINX_(__NR_mq_timedsend, sys_mq_timedsend), // 273 -+ LINXY(__NR_mq_timedreceive, sys_mq_timedreceive), // 274 -+ -+ LINX_(__NR_mq_notify, sys_mq_notify), // 275 -+ LINXY(__NR_mq_getsetattr, sys_mq_getsetattr), // 276 -+// ?????(__NR_kexec_load, ), -+ LINX_(__NR_add_key, sys_add_key), // 278 -+ LINX_(__NR_request_key, sys_request_key), // 279 -+ -+ LINXY(__NR_keyctl, sys_keyctl), // 280 -+ LINXY(__NR_waitid, sys_waitid), // 281 -+ LINX_(__NR_ioprio_set, sys_ioprio_set), // 282 -+ LINX_(__NR_ioprio_get, sys_ioprio_get), // 283 -+ LINX_(__NR_inotify_init, sys_inotify_init), // 284 -+ -+ LINX_(__NR_inotify_add_watch, sys_inotify_add_watch), // 285 -+ LINX_(__NR_inotify_rm_watch, sys_inotify_rm_watch), // 286 -+ GENX_(287, sys_ni_syscall), /* unimplemented (by the kernel) */ // 287 -+ LINXY(__NR_openat, sys_openat), // 288 -+ LINX_(__NR_mkdirat, sys_mkdirat), // 289 -+ -+ LINX_(__NR_mknodat, sys_mknodat), // 290 -+ LINX_(__NR_fchownat, sys_fchownat), // 291 -+ LINX_(__NR_futimesat, sys_futimesat), // 292 -+ LINXY(__NR_newfstatat, sys_newfstatat), // 293 -+ LINX_(__NR_unlinkat, sys_unlinkat), // 294 -+ -+ LINX_(__NR_renameat, sys_renameat), // 295 -+ LINX_(__NR_linkat, sys_linkat), // 296 -+ LINX_(__NR_symlinkat, sys_symlinkat), // 297 -+ LINX_(__NR_readlinkat, sys_readlinkat), // 298 -+ LINX_(__NR_fchmodat, sys_fchmodat), // 299 -+ -+ LINX_(__NR_faccessat, sys_faccessat), // 300 -+ LINX_(__NR_pselect6, sys_pselect6), // 301 -+ LINXY(__NR_ppoll, sys_ppoll), // 302 -+// ?????(__NR_unshare, ), -+ LINX_(__NR_set_robust_list, sys_set_robust_list), // 304 -+ -+ LINXY(__NR_get_robust_list, sys_get_robust_list), // 305 -+// ?????(__NR_splice, ), -+ LINX_(__NR_sync_file_range, sys_sync_file_range), // 307 -+// ?????(__NR_tee, ), -+// ?????(__NR_vmsplice, ), -+ -+ GENX_(310, sys_ni_syscall), /* unimplemented (by the kernel) */ // 310 -+// ?????(__NR_getcpu, ), -+ LINXY(__NR_epoll_pwait, sys_epoll_pwait), // 312 -+ GENX_(__NR_utimes, sys_utimes), // 313 -+ LINX_(__NR_fallocate, sys_fallocate), // 314 -+ -+ LINX_(__NR_utimensat, sys_utimensat), // 315 -+ LINXY(__NR_signalfd, sys_signalfd), // 316 -+ GENX_(317, sys_ni_syscall), /* unimplemented (by the kernel) */ // 317 -+ LINX_(__NR_eventfd, sys_eventfd), // 318 -+ LINXY(__NR_timerfd_create, sys_timerfd_create), // 319 -+ -+ LINXY(__NR_timerfd_settime, sys_timerfd_settime), // 320 -+ LINXY(__NR_timerfd_gettime, sys_timerfd_gettime), // 321 -+ LINXY(__NR_signalfd4, sys_signalfd4), // 322 -+ LINX_(__NR_eventfd2, sys_eventfd2), // 323 -+ LINXY(__NR_inotify_init1, sys_inotify_init1), // 324 -+ -+ LINXY(__NR_pipe2, sys_pipe2), // 325 -+ // (__NR_dup3, ), -+ LINXY(__NR_epoll_create1, sys_epoll_create1), // 327 -+ LINXY(__NR_preadv, sys_preadv), // 328 -+ LINX_(__NR_pwritev, sys_pwritev), // 329 -+ -+// ?????(__NR_rt_tgsigqueueinfo, ), -+ LINXY(__NR_perf_event_open, sys_perf_counter_open), // 331 -+}; -+ -+SyscallTableEntry* ML_(get_linux_syscall_entry) ( UInt sysno ) -+{ -+ const UInt syscall_table_size -+ = sizeof(syscall_table) / sizeof(syscall_table[0]); -+ -+ /* Is it in the contiguous initial section of the table? */ -+ if (sysno < syscall_table_size) { -+ SyscallTableEntry* sys = &syscall_table[sysno]; -+ if (sys->before == NULL) -+ return NULL; /* no entry */ -+ else -+ return sys; -+ } -+ -+ /* Can't find a wrapper */ -+ return NULL; -+} -+ -+#endif -+ -+/*--------------------------------------------------------------------*/ -+/*--- end ---*/ -+/*--------------------------------------------------------------------*/ ---- coregrind/m_trampoline.S -+++ coregrind/m_trampoline.S -@@ -1214,6 +1214,39 @@ - .fill 2048, 2, 0x0b0f /* `ud2` */ - - -+/*---------------- s390x-linux ----------------*/ -+#else -+#if defined(VGP_s390x_linux) -+ -+ /* a leading page of unexecutable code */ -+ .fill 2048, 2, 0x0000 -+ -+.global VG_(trampoline_stuff_start) -+VG_(trampoline_stuff_start): -+ -+.global VG_(s390x_linux_SUBST_FOR_sigreturn) -+VG_(s390x_linux_SUBST_FOR_sigreturn): -+ svc __NR_sigreturn -+ .short 0 -+ -+.global VG_(s390x_linux_SUBST_FOR_rt_sigreturn) -+VG_(s390x_linux_SUBST_FOR_rt_sigreturn): -+ /* Old gcc unwinding code checks for a sig(_rt)_return svc and then -+ for ra = cfa to decide if it is a sig_rt_frame or not. Since we -+ set ra to this trampoline, but the cfa is still in the stack, -+ the unwinder thinks, that this is a non-rt frame and causes a -+ crash in the gcc unwinder - which is used by the thread library -+ and others. Therefore we add a lr 1,1 nop, to let the gcc -+ unwinder bail out gracefully. This might also affect unwinding -+ across the signal frame - tough luck. fixs390 */ -+ lr 1,1 -+ svc __NR_rt_sigreturn -+ .short 0 -+ -+.globl VG_(trampoline_stuff_end) -+VG_(trampoline_stuff_end): -+ .fill 2048, 2, 0x0000 -+ - /*---------------- unknown ----------------*/ - #else - # error Unknown platform -@@ -1221,6 +1254,7 @@ - #endif - #endif - #endif -+#endif - #endif - #endif - #endif ---- coregrind/m_translate.c -+++ coregrind/m_translate.c -@@ -692,7 +692,7 @@ - - static Bool translations_allowable_from_seg ( NSegment const* seg ) - { --# if defined(VGA_x86) -+# if defined(VGA_x86) || defined(VGA_s390x) - Bool allowR = True; - # else - Bool allowR = False; -@@ -1508,7 +1508,8 @@ - ? (void*) &VG_(run_innerloop__dispatch_profiled) - : (void*) &VG_(run_innerloop__dispatch_unprofiled); - # elif defined(VGA_ppc32) || defined(VGA_ppc64) \ -- || defined(VGA_arm) -+ || defined(VGA_arm) || defined(VGA_s390x) -+ /* See comment libvex.h; machine has link register --> dipatch = NULL */ - vta.dispatch = NULL; - # else - # error "Unknown arch" ---- coregrind/m_translate.c.orig -+++ coregrind/m_translate.c.orig -@@ -0,0 +1,1571 @@ -+ -+/*--------------------------------------------------------------------*/ -+/*--- Interface to LibVEX_Translate, and the SP-update pass ---*/ -+/*--- m_translate.c ---*/ -+/*--------------------------------------------------------------------*/ -+ -+/* -+ This file is part of Valgrind, a dynamic binary instrumentation -+ framework. -+ -+ Copyright (C) 2000-2010 Julian Seward -+ jseward@acm.org -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA -+ 02111-1307, USA. -+ -+ The GNU General Public License is contained in the file COPYING. -+*/ -+ -+#include "pub_core_basics.h" -+#include "pub_core_vki.h" -+#include "pub_core_aspacemgr.h" -+ -+#include "pub_core_machine.h" // VG_(fnptr_to_fnentry) -+ // VG_(get_SP) -+ // VG_(machine_get_VexArchInfo) -+#include "pub_core_libcbase.h" -+#include "pub_core_libcassert.h" -+#include "pub_core_libcprint.h" -+#include "pub_core_options.h" -+ -+#include "pub_core_debuginfo.h" // VG_(get_fnname_w_offset) -+#include "pub_core_redir.h" // VG_(redir_do_lookup) -+ -+#include "pub_core_signals.h" // VG_(synth_fault_{perms,mapping} -+#include "pub_core_stacks.h" // VG_(unknown_SP_update)() -+#include "pub_core_tooliface.h" // VG_(tdict) -+ -+#include "pub_core_translate.h" -+#include "pub_core_transtab.h" -+#include "pub_core_dispatch.h" // VG_(run_innerloop__dispatch_{un}profiled) -+ // VG_(run_a_noredir_translation__return_point) -+ -+#include "pub_core_threadstate.h" // VexGuestArchState -+#include "pub_core_trampoline.h" // VG_(ppctoc_magic_redirect_return_stub) -+ -+#include "pub_core_execontext.h" // VG_(make_depth_1_ExeContext_from_Addr) -+ -+ -+/*------------------------------------------------------------*/ -+/*--- Stats ---*/ -+/*------------------------------------------------------------*/ -+ -+static UInt n_SP_updates_fast = 0; -+static UInt n_SP_updates_generic_known = 0; -+static UInt n_SP_updates_generic_unknown = 0; -+ -+void VG_(print_translation_stats) ( void ) -+{ -+ Char buf[6]; -+ UInt n_SP_updates = n_SP_updates_fast + n_SP_updates_generic_known -+ + n_SP_updates_generic_unknown; -+ VG_(percentify)(n_SP_updates_fast, n_SP_updates, 1, 6, buf); -+ VG_(message)(Vg_DebugMsg, -+ "translate: fast SP updates identified: %'u (%s)\n", -+ n_SP_updates_fast, buf ); -+ -+ VG_(percentify)(n_SP_updates_generic_known, n_SP_updates, 1, 6, buf); -+ VG_(message)(Vg_DebugMsg, -+ "translate: generic_known SP updates identified: %'u (%s)\n", -+ n_SP_updates_generic_known, buf ); -+ -+ VG_(percentify)(n_SP_updates_generic_unknown, n_SP_updates, 1, 6, buf); -+ VG_(message)(Vg_DebugMsg, -+ "translate: generic_unknown SP updates identified: %'u (%s)\n", -+ n_SP_updates_generic_unknown, buf ); -+} -+ -+/*------------------------------------------------------------*/ -+/*--- %SP-update pass ---*/ -+/*------------------------------------------------------------*/ -+ -+static Bool need_to_handle_SP_assignment(void) -+{ -+ return ( VG_(tdict).track_new_mem_stack_4 || -+ VG_(tdict).track_die_mem_stack_4 || -+ VG_(tdict).track_new_mem_stack_8 || -+ VG_(tdict).track_die_mem_stack_8 || -+ VG_(tdict).track_new_mem_stack_12 || -+ VG_(tdict).track_die_mem_stack_12 || -+ VG_(tdict).track_new_mem_stack_16 || -+ VG_(tdict).track_die_mem_stack_16 || -+ VG_(tdict).track_new_mem_stack_32 || -+ VG_(tdict).track_die_mem_stack_32 || -+ VG_(tdict).track_new_mem_stack_112 || -+ VG_(tdict).track_die_mem_stack_112 || -+ VG_(tdict).track_new_mem_stack_128 || -+ VG_(tdict).track_die_mem_stack_128 || -+ VG_(tdict).track_new_mem_stack_144 || -+ VG_(tdict).track_die_mem_stack_144 || -+ VG_(tdict).track_new_mem_stack_160 || -+ VG_(tdict).track_die_mem_stack_160 || -+ VG_(tdict).track_new_mem_stack || -+ VG_(tdict).track_die_mem_stack ); -+} -+ -+// - The SP aliases are held in an array which is used as a circular buffer. -+// This misses very few constant updates of SP (ie. < 0.1%) while using a -+// small, constant structure that will also never fill up and cause -+// execution to abort. -+// - Unused slots have a .temp value of 'IRTemp_INVALID'. -+// - 'next_SP_alias_slot' is the index where the next alias will be stored. -+// - If the buffer fills, we circle around and start over-writing -+// non-IRTemp_INVALID values. This is rare, and the overwriting of a -+// value that would have subsequently be used is even rarer. -+// - Every slot below next_SP_alias_slot holds a non-IRTemp_INVALID value. -+// The rest either all won't (if we haven't yet circled around) or all -+// will (if we have circled around). -+ -+typedef -+ struct { -+ IRTemp temp; -+ Long delta; -+ } -+ SP_Alias; -+ -+// With 32 slots the buffer fills very rarely -- eg. once in a run of GCC. -+// And I've tested with smaller values and the wrap-around case works ok. -+#define N_ALIASES 32 -+static SP_Alias SP_aliases[N_ALIASES]; -+static Int next_SP_alias_slot = 0; -+ -+static void clear_SP_aliases(void) -+{ -+ Int i; -+ for (i = 0; i < N_ALIASES; i++) { -+ SP_aliases[i].temp = IRTemp_INVALID; -+ SP_aliases[i].delta = 0; -+ } -+ next_SP_alias_slot = 0; -+} -+ -+static void add_SP_alias(IRTemp temp, Long delta) -+{ -+ vg_assert(temp != IRTemp_INVALID); -+ SP_aliases[ next_SP_alias_slot ].temp = temp; -+ SP_aliases[ next_SP_alias_slot ].delta = delta; -+ next_SP_alias_slot++; -+ if (N_ALIASES == next_SP_alias_slot) next_SP_alias_slot = 0; -+} -+ -+static Bool get_SP_delta(IRTemp temp, ULong* delta) -+{ -+ Int i; // i must be signed! -+ vg_assert(IRTemp_INVALID != temp); -+ // Search backwards between current buffer position and the start. -+ for (i = next_SP_alias_slot-1; i >= 0; i--) { -+ if (temp == SP_aliases[i].temp) { -+ *delta = SP_aliases[i].delta; -+ return True; -+ } -+ } -+ // Search backwards between the end and the current buffer position. -+ for (i = N_ALIASES-1; i >= next_SP_alias_slot; i--) { -+ if (temp == SP_aliases[i].temp) { -+ *delta = SP_aliases[i].delta; -+ return True; -+ } -+ } -+ return False; -+} -+ -+static void update_SP_aliases(Long delta) -+{ -+ Int i; -+ for (i = 0; i < N_ALIASES; i++) { -+ if (SP_aliases[i].temp == IRTemp_INVALID) { -+ return; -+ } -+ SP_aliases[i].delta += delta; -+ } -+} -+ -+/* Given a guest IP, get an origin tag for a 1-element stack trace, -+ and wrap it up in an IR atom that can be passed as the origin-tag -+ value for a stack-adjustment helper function. */ -+static IRExpr* mk_ecu_Expr ( Addr64 guest_IP ) -+{ -+ UInt ecu; -+ ExeContext* ec -+ = VG_(make_depth_1_ExeContext_from_Addr)( (Addr)guest_IP ); -+ vg_assert(ec); -+ ecu = VG_(get_ECU_from_ExeContext)( ec ); -+ vg_assert(VG_(is_plausible_ECU)(ecu)); -+ /* This is always safe to do, since ecu is only 32 bits, and -+ HWord is 32 or 64. */ -+ return mkIRExpr_HWord( (HWord)ecu ); -+} -+ -+ -+/* For tools that want to know about SP changes, this pass adds -+ in the appropriate hooks. We have to do it after the tool's -+ instrumentation, so the tool doesn't have to worry about the C calls -+ it adds in, and we must do it before register allocation because -+ spilled temps make it much harder to work out the SP deltas. -+ This it is done with Vex's "second instrumentation" pass. -+ -+ Basically, we look for GET(SP)/PUT(SP) pairs and track constant -+ increments/decrements of SP between them. (This requires tracking one or -+ more "aliases", which are not exact aliases but instead are tempregs -+ whose value is equal to the SP's plus or minus a known constant.) -+ If all the changes to SP leading up to a PUT(SP) are by known, small -+ constants, we can do a specific call to eg. new_mem_stack_4, otherwise -+ we fall back to the case that handles an unknown SP change. -+ -+ There is some extra complexity to deal correctly with updates to -+ only parts of SP. Bizarre, but it has been known to happen. -+*/ -+static -+IRSB* vg_SP_update_pass ( void* closureV, -+ IRSB* sb_in, -+ VexGuestLayout* layout, -+ VexGuestExtents* vge, -+ IRType gWordTy, -+ IRType hWordTy ) -+{ -+ Int i, j, minoff_ST, maxoff_ST, sizeof_SP, offset_SP; -+ Int first_SP, last_SP, first_Put, last_Put; -+ IRDirty *dcall, *d; -+ IRStmt* st; -+ IRExpr* e; -+ IRRegArray* descr; -+ IRType typeof_SP; -+ Long delta, con; -+ -+ /* Set up stuff for tracking the guest IP */ -+ Bool curr_IP_known = False; -+ Addr64 curr_IP = 0; -+ -+ /* Set up BB */ -+ IRSB* bb = emptyIRSB(); -+ bb->tyenv = deepCopyIRTypeEnv(sb_in->tyenv); -+ bb->next = deepCopyIRExpr(sb_in->next); -+ bb->jumpkind = sb_in->jumpkind; -+ -+ delta = 0; -+ -+ sizeof_SP = layout->sizeof_SP; -+ offset_SP = layout->offset_SP; -+ typeof_SP = sizeof_SP==4 ? Ity_I32 : Ity_I64; -+ vg_assert(sizeof_SP == 4 || sizeof_SP == 8); -+ -+ /* --- Start of #defines --- */ -+ -+# define IS_ADD(op) (sizeof_SP==4 ? ((op)==Iop_Add32) : ((op)==Iop_Add64)) -+# define IS_SUB(op) (sizeof_SP==4 ? ((op)==Iop_Sub32) : ((op)==Iop_Sub64)) -+ -+# define IS_ADD_OR_SUB(op) (IS_ADD(op) || IS_SUB(op)) -+ -+# define GET_CONST(con) \ -+ (sizeof_SP==4 ? (Long)(Int)(con->Ico.U32) \ -+ : (Long)(con->Ico.U64)) -+ -+# define DO_NEW(syze, tmpp) \ -+ do { \ -+ Bool vanilla, w_ecu; \ -+ vg_assert(curr_IP_known); \ -+ vanilla = NULL != VG_(tdict).track_new_mem_stack_##syze; \ -+ w_ecu = NULL != VG_(tdict).track_new_mem_stack_##syze##_w_ECU; \ -+ vg_assert(!(vanilla && w_ecu)); /* can't have both */ \ -+ if (!(vanilla || w_ecu)) \ -+ goto generic; \ -+ \ -+ /* I don't know if it's really necessary to say that the */ \ -+ /* call reads the stack pointer. But anyway, we do. */ \ -+ if (w_ecu) { \ -+ dcall = unsafeIRDirty_0_N( \ -+ 2/*regparms*/, \ -+ "track_new_mem_stack_" #syze "_w_ECU", \ -+ VG_(fnptr_to_fnentry)( \ -+ VG_(tdict).track_new_mem_stack_##syze##_w_ECU ), \ -+ mkIRExprVec_2(IRExpr_RdTmp(tmpp), \ -+ mk_ecu_Expr(curr_IP)) \ -+ ); \ -+ } else { \ -+ dcall = unsafeIRDirty_0_N( \ -+ 1/*regparms*/, \ -+ "track_new_mem_stack_" #syze , \ -+ VG_(fnptr_to_fnentry)( \ -+ VG_(tdict).track_new_mem_stack_##syze ), \ -+ mkIRExprVec_1(IRExpr_RdTmp(tmpp)) \ -+ ); \ -+ } \ -+ dcall->nFxState = 1; \ -+ dcall->fxState[0].fx = Ifx_Read; \ -+ dcall->fxState[0].offset = layout->offset_SP; \ -+ dcall->fxState[0].size = layout->sizeof_SP; \ -+ \ -+ addStmtToIRSB( bb, IRStmt_Dirty(dcall) ); \ -+ \ -+ tl_assert(syze > 0); \ -+ update_SP_aliases(syze); \ -+ \ -+ n_SP_updates_fast++; \ -+ \ -+ } while (0) -+ -+# define DO_DIE(syze, tmpp) \ -+ do { \ -+ if (!VG_(tdict).track_die_mem_stack_##syze) \ -+ goto generic; \ -+ \ -+ /* I don't know if it's really necessary to say that the */ \ -+ /* call reads the stack pointer. But anyway, we do. */ \ -+ dcall = unsafeIRDirty_0_N( \ -+ 1/*regparms*/, \ -+ "track_die_mem_stack_" #syze, \ -+ VG_(fnptr_to_fnentry)( \ -+ VG_(tdict).track_die_mem_stack_##syze ), \ -+ mkIRExprVec_1(IRExpr_RdTmp(tmpp)) \ -+ ); \ -+ dcall->nFxState = 1; \ -+ dcall->fxState[0].fx = Ifx_Read; \ -+ dcall->fxState[0].offset = layout->offset_SP; \ -+ dcall->fxState[0].size = layout->sizeof_SP; \ -+ \ -+ addStmtToIRSB( bb, IRStmt_Dirty(dcall) ); \ -+ \ -+ tl_assert(syze > 0); \ -+ update_SP_aliases(-(syze)); \ -+ \ -+ n_SP_updates_fast++; \ -+ \ -+ } while (0) -+ -+ /* --- End of #defines --- */ -+ -+ clear_SP_aliases(); -+ -+ for (i = 0; i < sb_in->stmts_used; i++) { -+ -+ st = sb_in->stmts[i]; -+ -+ if (st->tag == Ist_IMark) { -+ curr_IP_known = True; -+ curr_IP = st->Ist.IMark.addr; -+ } -+ -+ /* t = Get(sp): curr = t, delta = 0 */ -+ if (st->tag != Ist_WrTmp) goto case2; -+ e = st->Ist.WrTmp.data; -+ if (e->tag != Iex_Get) goto case2; -+ if (e->Iex.Get.offset != offset_SP) goto case2; -+ if (e->Iex.Get.ty != typeof_SP) goto case2; -+ vg_assert( typeOfIRTemp(bb->tyenv, st->Ist.WrTmp.tmp) == typeof_SP ); -+ add_SP_alias(st->Ist.WrTmp.tmp, 0); -+ addStmtToIRSB( bb, st ); -+ continue; -+ -+ case2: -+ /* t' = curr +/- const: curr = t', delta +=/-= const */ -+ if (st->tag != Ist_WrTmp) goto case3; -+ e = st->Ist.WrTmp.data; -+ if (e->tag != Iex_Binop) goto case3; -+ if (e->Iex.Binop.arg1->tag != Iex_RdTmp) goto case3; -+ if (!get_SP_delta(e->Iex.Binop.arg1->Iex.RdTmp.tmp, &delta)) goto case3; -+ if (e->Iex.Binop.arg2->tag != Iex_Const) goto case3; -+ if (!IS_ADD_OR_SUB(e->Iex.Binop.op)) goto case3; -+ con = GET_CONST(e->Iex.Binop.arg2->Iex.Const.con); -+ vg_assert( typeOfIRTemp(bb->tyenv, st->Ist.WrTmp.tmp) == typeof_SP ); -+ if (IS_ADD(e->Iex.Binop.op)) { -+ add_SP_alias(st->Ist.WrTmp.tmp, delta + con); -+ } else { -+ add_SP_alias(st->Ist.WrTmp.tmp, delta - con); -+ } -+ addStmtToIRSB( bb, st ); -+ continue; -+ -+ case3: -+ /* t' = curr: curr = t' */ -+ if (st->tag != Ist_WrTmp) goto case4; -+ e = st->Ist.WrTmp.data; -+ if (e->tag != Iex_RdTmp) goto case4; -+ if (!get_SP_delta(e->Iex.RdTmp.tmp, &delta)) goto case4; -+ vg_assert( typeOfIRTemp(bb->tyenv, st->Ist.WrTmp.tmp) == typeof_SP ); -+ add_SP_alias(st->Ist.WrTmp.tmp, delta); -+ addStmtToIRSB( bb, st ); -+ continue; -+ -+ case4: -+ /* Put(sp) = curr */ -+ /* More generally, we must correctly handle a Put which writes -+ any part of SP, not just the case where all of SP is -+ written. */ -+ if (st->tag != Ist_Put) goto case5; -+ first_SP = offset_SP; -+ last_SP = first_SP + sizeof_SP - 1; -+ first_Put = st->Ist.Put.offset; -+ last_Put = first_Put -+ + sizeofIRType( typeOfIRExpr( bb->tyenv, st->Ist.Put.data )) -+ - 1; -+ vg_assert(first_SP <= last_SP); -+ vg_assert(first_Put <= last_Put); -+ -+ if (last_Put < first_SP || last_SP < first_Put) -+ goto case5; /* no overlap */ -+ -+ if (st->Ist.Put.data->tag == Iex_RdTmp -+ && get_SP_delta(st->Ist.Put.data->Iex.RdTmp.tmp, &delta)) { -+ IRTemp tttmp = st->Ist.Put.data->Iex.RdTmp.tmp; -+ /* Why should the following assertion hold? Because any -+ alias added by put_SP_alias must be of a temporary which -+ has the same type as typeof_SP, and whose value is a Get -+ at exactly offset_SP of size typeof_SP. Each call to -+ put_SP_alias is immediately preceded by an assertion that -+ we are putting in a binding for a correctly-typed -+ temporary. */ -+ vg_assert( typeOfIRTemp(bb->tyenv, tttmp) == typeof_SP ); -+ /* From the same type-and-offset-correctness argument, if -+ we found a useable alias, it must for an "exact" write of SP. */ -+ vg_assert(first_SP == first_Put); -+ vg_assert(last_SP == last_Put); -+ switch (delta) { -+ case 0: addStmtToIRSB(bb,st); continue; -+ case 4: DO_DIE( 4, tttmp); addStmtToIRSB(bb,st); continue; -+ case -4: DO_NEW( 4, tttmp); addStmtToIRSB(bb,st); continue; -+ case 8: DO_DIE( 8, tttmp); addStmtToIRSB(bb,st); continue; -+ case -8: DO_NEW( 8, tttmp); addStmtToIRSB(bb,st); continue; -+ case 12: DO_DIE( 12, tttmp); addStmtToIRSB(bb,st); continue; -+ case -12: DO_NEW( 12, tttmp); addStmtToIRSB(bb,st); continue; -+ case 16: DO_DIE( 16, tttmp); addStmtToIRSB(bb,st); continue; -+ case -16: DO_NEW( 16, tttmp); addStmtToIRSB(bb,st); continue; -+ case 32: DO_DIE( 32, tttmp); addStmtToIRSB(bb,st); continue; -+ case -32: DO_NEW( 32, tttmp); addStmtToIRSB(bb,st); continue; -+ case 112: DO_DIE( 112, tttmp); addStmtToIRSB(bb,st); continue; -+ case -112: DO_NEW( 112, tttmp); addStmtToIRSB(bb,st); continue; -+ case 128: DO_DIE( 128, tttmp); addStmtToIRSB(bb,st); continue; -+ case -128: DO_NEW( 128, tttmp); addStmtToIRSB(bb,st); continue; -+ case 144: DO_DIE( 144, tttmp); addStmtToIRSB(bb,st); continue; -+ case -144: DO_NEW( 144, tttmp); addStmtToIRSB(bb,st); continue; -+ case 160: DO_DIE( 160, tttmp); addStmtToIRSB(bb,st); continue; -+ case -160: DO_NEW( 160, tttmp); addStmtToIRSB(bb,st); continue; -+ default: -+ /* common values for ppc64: 144 128 160 112 176 */ -+ n_SP_updates_generic_known++; -+ goto generic; -+ } -+ } else { -+ /* Deal with an unknown update to SP. We're here because -+ either: -+ (1) the Put does not exactly cover SP; it is a partial update. -+ Highly unlikely, but has been known to happen for 16-bit -+ Windows apps running on Wine, doing 16-bit adjustments to -+ %sp. -+ (2) the Put does exactly cover SP, but we are unable to -+ determine how the value relates to the old SP. In any -+ case, we cannot assume that the Put.data value is a tmp; -+ we must assume it can be anything allowed in flat IR (tmp -+ or const). -+ */ -+ IRTemp old_SP; -+ n_SP_updates_generic_unknown++; -+ -+ // Nb: if all is well, this generic case will typically be -+ // called something like every 1000th SP update. If it's more than -+ // that, the above code may be missing some cases. -+ generic: -+ /* Pass both the old and new SP values to this helper. Also, -+ pass an origin tag, even if it isn't needed. */ -+ old_SP = newIRTemp(bb->tyenv, typeof_SP); -+ addStmtToIRSB( -+ bb, -+ IRStmt_WrTmp( old_SP, IRExpr_Get(offset_SP, typeof_SP) ) -+ ); -+ -+ /* Now we know what the old value of SP is. But knowing the new -+ value is a bit tricky if there is a partial write. */ -+ if (first_Put == first_SP && last_Put == last_SP) { -+ /* The common case, an exact write to SP. So st->Ist.Put.data -+ does hold the new value; simple. */ -+ vg_assert(curr_IP_known); -+ dcall = unsafeIRDirty_0_N( -+ 3/*regparms*/, -+ "VG_(unknown_SP_update)", -+ VG_(fnptr_to_fnentry)( &VG_(unknown_SP_update) ), -+ mkIRExprVec_3( IRExpr_RdTmp(old_SP), st->Ist.Put.data, -+ mk_ecu_Expr(curr_IP) ) -+ ); -+ addStmtToIRSB( bb, IRStmt_Dirty(dcall) ); -+ /* don't forget the original assignment */ -+ addStmtToIRSB( bb, st ); -+ } else { -+ /* We have a partial update to SP. We need to know what -+ the new SP will be, and hand that to the helper call, -+ but when the helper call happens, SP must hold the -+ value it had before the update. Tricky. -+ Therefore use the following kludge: -+ 1. do the partial SP update (Put) -+ 2. Get the new SP value into a tmp, new_SP -+ 3. Put old_SP -+ 4. Call the helper -+ 5. Put new_SP -+ */ -+ IRTemp new_SP; -+ /* 1 */ -+ addStmtToIRSB( bb, st ); -+ /* 2 */ -+ new_SP = newIRTemp(bb->tyenv, typeof_SP); -+ addStmtToIRSB( -+ bb, -+ IRStmt_WrTmp( new_SP, IRExpr_Get(offset_SP, typeof_SP) ) -+ ); -+ /* 3 */ -+ addStmtToIRSB( bb, IRStmt_Put(offset_SP, IRExpr_RdTmp(old_SP) )); -+ /* 4 */ -+ vg_assert(curr_IP_known); -+ dcall = unsafeIRDirty_0_N( -+ 3/*regparms*/, -+ "VG_(unknown_SP_update)", -+ VG_(fnptr_to_fnentry)( &VG_(unknown_SP_update) ), -+ mkIRExprVec_3( IRExpr_RdTmp(old_SP), -+ IRExpr_RdTmp(new_SP), -+ mk_ecu_Expr(curr_IP) ) -+ ); -+ addStmtToIRSB( bb, IRStmt_Dirty(dcall) ); -+ /* 5 */ -+ addStmtToIRSB( bb, IRStmt_Put(offset_SP, IRExpr_RdTmp(new_SP) )); -+ } -+ -+ /* Forget what we already know. */ -+ clear_SP_aliases(); -+ -+ /* If this is a Put of a tmp that exactly updates SP, -+ start tracking aliases against this tmp. */ -+ -+ if (first_Put == first_SP && last_Put == last_SP -+ && st->Ist.Put.data->tag == Iex_RdTmp) { -+ vg_assert( typeOfIRTemp(bb->tyenv, st->Ist.Put.data->Iex.RdTmp.tmp) -+ == typeof_SP ); -+ add_SP_alias(st->Ist.Put.data->Iex.RdTmp.tmp, 0); -+ } -+ continue; -+ } -+ -+ case5: -+ /* PutI or Dirty call which overlaps SP: complain. We can't -+ deal with SP changing in weird ways (well, we can, but not at -+ this time of night). */ -+ if (st->tag == Ist_PutI) { -+ descr = st->Ist.PutI.descr; -+ minoff_ST = descr->base; -+ maxoff_ST = descr->base -+ + descr->nElems * sizeofIRType(descr->elemTy) - 1; -+ if (!(offset_SP > maxoff_ST -+ || (offset_SP + sizeof_SP - 1) < minoff_ST)) -+ goto complain; -+ } -+ if (st->tag == Ist_Dirty) { -+ d = st->Ist.Dirty.details; -+ for (j = 0; j < d->nFxState; j++) { -+ minoff_ST = d->fxState[j].offset; -+ maxoff_ST = d->fxState[j].offset + d->fxState[j].size - 1; -+ if (d->fxState[j].fx == Ifx_Read || d->fxState[j].fx == Ifx_None) -+ continue; -+ if (!(offset_SP > maxoff_ST -+ || (offset_SP + sizeof_SP - 1) < minoff_ST)) -+ goto complain; -+ } -+ } -+ -+ /* well, not interesting. Just copy and keep going. */ -+ addStmtToIRSB( bb, st ); -+ -+ } /* for (i = 0; i < sb_in->stmts_used; i++) */ -+ -+ return bb; -+ -+ complain: -+ VG_(core_panic)("vg_SP_update_pass: PutI or Dirty which overlaps SP"); -+ -+#undef IS_ADD -+#undef IS_SUB -+#undef IS_ADD_OR_SUB -+#undef GET_CONST -+#undef DO_NEW -+#undef DO_DIE -+} -+ -+/*------------------------------------------------------------*/ -+/*--- Main entry point for the JITter. ---*/ -+/*------------------------------------------------------------*/ -+ -+/* Extra comments re self-checking translations and self-modifying -+ code. (JRS 14 Oct 05). -+ -+ There are 3 modes: -+ (1) no checking: all code assumed to be not self-modifying -+ (2) partial: known-problematic situations get a self-check -+ (3) full checking: all translations get a self-check -+ -+ As currently implemented, the default is (2). (3) is always safe, -+ but very slow. (1) works mostly, but fails for gcc nested-function -+ code which uses trampolines on the stack; this situation is -+ detected and handled by (2). -+ -+ ---------- -+ -+ A more robust and transparent solution, which is not currently -+ implemented, is a variant of (2): if a translation is made from an -+ area which aspacem says does not have 'w' permission, then it can -+ be non-self-checking. Otherwise, it needs a self-check. -+ -+ This is complicated by Vex's basic-block chasing. If a self-check -+ is requested, then Vex will not chase over basic block boundaries -+ (it's too complex). However there is still a problem if it chases -+ from a non-'w' area into a 'w' area. -+ -+ I think the right thing to do is: -+ -+ - if a translation request starts in a 'w' area, ask for a -+ self-checking translation, and do not allow any chasing (make -+ chase_into_ok return False). Note that the latter is redundant -+ in the sense that Vex won't chase anyway in this situation. -+ -+ - if a translation request starts in a non-'w' area, do not ask for -+ a self-checking translation. However, do not allow chasing (as -+ determined by chase_into_ok) to go into a 'w' area. -+ -+ The result of this is that all code inside 'w' areas is self -+ checking. -+ -+ To complete the trick, there is a caveat: we must watch the -+ client's mprotect calls. If pages are changed from non-'w' to 'w' -+ then we should throw away all translations which intersect the -+ affected area, so as to force them to be redone with self-checks. -+ -+ ---------- -+ -+ The above outlines the conditions under which bb chasing is allowed -+ from a self-modifying-code point of view. There are other -+ situations pertaining to function redirection in which it is -+ necessary to disallow chasing, but those fall outside the scope of -+ this comment. -+*/ -+ -+ -+/* Vex dumps the final code in here. Then we can copy it off -+ wherever we like. */ -+/* 60000: should agree with assertion in VG_(add_to_transtab) in -+ m_transtab.c. */ -+#define N_TMPBUF 60000 -+static UChar tmpbuf[N_TMPBUF]; -+ -+ -+/* Function pointers we must supply to LibVEX in order that it -+ can bomb out and emit messages under Valgrind's control. */ -+__attribute__ ((noreturn)) -+static -+void failure_exit ( void ) -+{ -+ LibVEX_ShowAllocStats(); -+ VG_(core_panic)("LibVEX called failure_exit()."); -+} -+ -+static -+void log_bytes ( HChar* bytes, Int nbytes ) -+{ -+ Int i; -+ for (i = 0; i < nbytes-3; i += 4) -+ VG_(printf)("%c%c%c%c", bytes[i], bytes[i+1], bytes[i+2], bytes[i+3]); -+ for (; i < nbytes; i++) -+ VG_(printf)("%c", bytes[i]); -+} -+ -+ -+/* --------- Various helper functions for translation --------- */ -+ -+/* Look for reasons to disallow making translations from the given -+ segment. */ -+ -+static Bool translations_allowable_from_seg ( NSegment const* seg ) -+{ -+# if defined(VGA_x86) -+ Bool allowR = True; -+# else -+ Bool allowR = False; -+# endif -+ return seg != NULL -+ && (seg->kind == SkAnonC || seg->kind == SkFileC || seg->kind == SkShmC) -+ && (seg->hasX || (seg->hasR && allowR)); -+} -+ -+ -+/* Is a self-check required for a translation of a guest address -+ inside segment SEG when requested by thread TID ? */ -+ -+static Bool self_check_required ( NSegment const* seg, ThreadId tid ) -+{ -+#if defined(VGO_darwin) -+ // GrP fixme hack - dyld i386 IMPORT gets rewritten -+ // to really do this correctly, we'd need to flush the -+ // translation cache whenever a segment became +WX -+ if (seg->hasX && seg->hasW) { -+ return True; -+ } -+#endif -+ switch (VG_(clo_smc_check)) { -+ case Vg_SmcNone: return False; -+ case Vg_SmcAll: return True; -+ case Vg_SmcStack: -+ return seg -+ ? (seg->start <= VG_(get_SP)(tid) -+ && VG_(get_SP)(tid)+sizeof(Word)-1 <= seg->end) -+ : False; -+ break; -+ default: -+ vg_assert2(0, "unknown VG_(clo_smc_check) value"); -+ } -+} -+ -+ -+/* This is a callback passed to LibVEX_Translate. It stops Vex from -+ chasing into function entry points that we wish to redirect. -+ Chasing across them obviously defeats the redirect mechanism, with -+ bad effects for Memcheck, Addrcheck, and possibly others. -+ -+ Also, we must stop Vex chasing into blocks for which we might want -+ to self checking. -+*/ -+static Bool chase_into_ok ( void* closureV, Addr64 addr64 ) -+{ -+ Addr addr = (Addr)addr64; -+ NSegment const* seg = VG_(am_find_nsegment)(addr); -+ VgCallbackClosure* closure = (VgCallbackClosure*)closureV; -+ -+ /* Work through a list of possibilities why we might not want to -+ allow a chase. */ -+ -+ /* Destination not in a plausible segment? */ -+ if (!translations_allowable_from_seg(seg)) -+ goto dontchase; -+ -+ /* Destination requires a self-check? */ -+ if (self_check_required(seg, closure->tid)) -+ goto dontchase; -+ -+ /* Destination is redirected? */ -+ if (addr != VG_(redir_do_lookup)(addr, NULL)) -+ goto dontchase; -+ -+# if defined(VG_PLAT_USES_PPCTOC) -+ /* This needs to be at the start of its own block. Don't chase. Re -+ ULong_to_Ptr, be careful to ensure we only compare 32 bits on a -+ 32-bit target.*/ -+ if (ULong_to_Ptr(addr64) -+ == (void*)&VG_(ppctoc_magic_redirect_return_stub)) -+ goto dontchase; -+# endif -+ -+ /* overly conservative, but .. don't chase into the distinguished -+ address that m_transtab uses as an empty-slot marker for -+ VG_(tt_fast). */ -+ if (addr == TRANSTAB_BOGUS_GUEST_ADDR) -+ goto dontchase; -+ -+ /* well, ok then. go on and chase. */ -+ return True; -+ -+ vg_assert(0); -+ /*NOTREACHED*/ -+ -+ dontchase: -+ if (0) VG_(printf)("not chasing into 0x%lx\n", addr); -+ return False; -+} -+ -+ -+/* --------------- helpers for with-TOC platforms --------------- */ -+ -+/* NOTE: with-TOC platforms are: ppc64-linux, ppc32-aix5, ppc64-aix5. */ -+ -+static IRExpr* mkU64 ( ULong n ) { -+ return IRExpr_Const(IRConst_U64(n)); -+} -+static IRExpr* mkU32 ( UInt n ) { -+ return IRExpr_Const(IRConst_U32(n)); -+} -+ -+#if defined(VG_PLAT_USES_PPCTOC) -+static IRExpr* mkU8 ( UChar n ) { -+ return IRExpr_Const(IRConst_U8(n)); -+} -+static IRExpr* narrowTo32 ( IRTypeEnv* tyenv, IRExpr* e ) { -+ if (typeOfIRExpr(tyenv, e) == Ity_I32) { -+ return e; -+ } else { -+ vg_assert(typeOfIRExpr(tyenv, e) == Ity_I64); -+ return IRExpr_Unop(Iop_64to32, e); -+ } -+} -+ -+/* Generate code to push word-typed expression 'e' onto this thread's -+ redir stack, checking for stack overflow and generating code to -+ bomb out if so. */ -+ -+static void gen_PUSH ( IRSB* bb, IRExpr* e ) -+{ -+ IRRegArray* descr; -+ IRTemp t1; -+ IRExpr* one; -+ -+# if defined(VGP_ppc64_linux) || defined(VGP_ppc64_aix5) -+ Int stack_size = VEX_GUEST_PPC64_REDIR_STACK_SIZE; -+ Int offB_REDIR_SP = offsetof(VexGuestPPC64State,guest_REDIR_SP); -+ Int offB_REDIR_STACK = offsetof(VexGuestPPC64State,guest_REDIR_STACK); -+ Int offB_EMWARN = offsetof(VexGuestPPC64State,guest_EMWARN); -+ Bool is64 = True; -+ IRType ty_Word = Ity_I64; -+ IROp op_CmpNE = Iop_CmpNE64; -+ IROp op_Sar = Iop_Sar64; -+ IROp op_Sub = Iop_Sub64; -+ IROp op_Add = Iop_Add64; -+ IRExpr*(*mkU)(ULong) = mkU64; -+ vg_assert(VG_WORDSIZE == 8); -+# else -+ Int stack_size = VEX_GUEST_PPC32_REDIR_STACK_SIZE; -+ Int offB_REDIR_SP = offsetof(VexGuestPPC32State,guest_REDIR_SP); -+ Int offB_REDIR_STACK = offsetof(VexGuestPPC32State,guest_REDIR_STACK); -+ Int offB_EMWARN = offsetof(VexGuestPPC32State,guest_EMWARN); -+ Bool is64 = False; -+ IRType ty_Word = Ity_I32; -+ IROp op_CmpNE = Iop_CmpNE32; -+ IROp op_Sar = Iop_Sar32; -+ IROp op_Sub = Iop_Sub32; -+ IROp op_Add = Iop_Add32; -+ IRExpr*(*mkU)(UInt) = mkU32; -+ vg_assert(VG_WORDSIZE == 4); -+# endif -+ -+ vg_assert(sizeof(void*) == VG_WORDSIZE); -+ vg_assert(sizeof(Word) == VG_WORDSIZE); -+ vg_assert(sizeof(Addr) == VG_WORDSIZE); -+ -+ descr = mkIRRegArray( offB_REDIR_STACK, ty_Word, stack_size ); -+ t1 = newIRTemp( bb->tyenv, ty_Word ); -+ one = mkU(1); -+ -+ vg_assert(typeOfIRExpr(bb->tyenv, e) == ty_Word); -+ -+ /* t1 = guest_REDIR_SP + 1 */ -+ addStmtToIRSB( -+ bb, -+ IRStmt_WrTmp( -+ t1, -+ IRExpr_Binop(op_Add, IRExpr_Get( offB_REDIR_SP, ty_Word ), one) -+ ) -+ ); -+ -+ /* Bomb out if t1 >=s stack_size, that is, (stack_size-1)-t1 tyenv,IRExpr_RdTmp(t1)), 0, e) -+ ); -+} -+ -+ -+/* Generate code to pop a word-sized value from this thread's redir -+ stack, binding it to a new temporary, which is returned. As with -+ gen_PUSH, an overflow check is also performed. */ -+ -+static IRTemp gen_POP ( IRSB* bb ) -+{ -+# if defined(VGP_ppc64_linux) || defined(VGP_ppc64_aix5) -+ Int stack_size = VEX_GUEST_PPC64_REDIR_STACK_SIZE; -+ Int offB_REDIR_SP = offsetof(VexGuestPPC64State,guest_REDIR_SP); -+ Int offB_REDIR_STACK = offsetof(VexGuestPPC64State,guest_REDIR_STACK); -+ Int offB_EMWARN = offsetof(VexGuestPPC64State,guest_EMWARN); -+ Bool is64 = True; -+ IRType ty_Word = Ity_I64; -+ IROp op_CmpNE = Iop_CmpNE64; -+ IROp op_Sar = Iop_Sar64; -+ IROp op_Sub = Iop_Sub64; -+ IRExpr*(*mkU)(ULong) = mkU64; -+# else -+ Int stack_size = VEX_GUEST_PPC32_REDIR_STACK_SIZE; -+ Int offB_REDIR_SP = offsetof(VexGuestPPC32State,guest_REDIR_SP); -+ Int offB_REDIR_STACK = offsetof(VexGuestPPC32State,guest_REDIR_STACK); -+ Int offB_EMWARN = offsetof(VexGuestPPC32State,guest_EMWARN); -+ Bool is64 = False; -+ IRType ty_Word = Ity_I32; -+ IROp op_CmpNE = Iop_CmpNE32; -+ IROp op_Sar = Iop_Sar32; -+ IROp op_Sub = Iop_Sub32; -+ IRExpr*(*mkU)(UInt) = mkU32; -+# endif -+ -+ IRRegArray* descr = mkIRRegArray( offB_REDIR_STACK, ty_Word, stack_size ); -+ IRTemp t1 = newIRTemp( bb->tyenv, ty_Word ); -+ IRTemp res = newIRTemp( bb->tyenv, ty_Word ); -+ IRExpr* one = mkU(1); -+ -+ vg_assert(sizeof(void*) == VG_WORDSIZE); -+ vg_assert(sizeof(Word) == VG_WORDSIZE); -+ vg_assert(sizeof(Addr) == VG_WORDSIZE); -+ -+ /* t1 = guest_REDIR_SP */ -+ addStmtToIRSB( -+ bb, -+ IRStmt_WrTmp( t1, IRExpr_Get( offB_REDIR_SP, ty_Word ) ) -+ ); -+ -+ /* Bomb out if t1 < 0. Same comments as gen_PUSH apply. */ -+ addStmtToIRSB( -+ bb, -+ IRStmt_Put(offB_EMWARN, mkU32(EmWarn_PPC64_redir_underflow)) -+ ); -+ addStmtToIRSB( -+ bb, -+ IRStmt_Exit( -+ IRExpr_Binop( -+ op_CmpNE, -+ IRExpr_Binop( -+ op_Sar, -+ IRExpr_RdTmp(t1), -+ mkU8(8 * VG_WORDSIZE - 1) -+ ), -+ mkU(0) -+ ), -+ Ijk_EmFail, -+ is64 ? IRConst_U64(0) : IRConst_U32(0) -+ ) -+ ); -+ -+ /* res = guest_REDIR_STACK[t1+0] */ -+ /* PutI/GetI have I32-typed indexes regardless of guest word size */ -+ addStmtToIRSB( -+ bb, -+ IRStmt_WrTmp( -+ res, -+ IRExpr_GetI(descr, narrowTo32(bb->tyenv,IRExpr_RdTmp(t1)), 0) -+ ) -+ ); -+ -+ /* guest_REDIR_SP = t1-1 */ -+ addStmtToIRSB( -+ bb, -+ IRStmt_Put(offB_REDIR_SP, IRExpr_Binop(op_Sub, IRExpr_RdTmp(t1), one)) -+ ); -+ -+ return res; -+} -+ -+/* Generate code to push LR and R2 onto this thread's redir stack, -+ then set R2 to the new value (which is the TOC pointer to be used -+ for the duration of the replacement function, as determined by -+ m_debuginfo), and set LR to the magic return stub, so we get to -+ intercept the return and restore R2 and L2 to the values saved -+ here. */ -+ -+static void gen_push_and_set_LR_R2 ( IRSB* bb, Addr64 new_R2_value ) -+{ -+# if defined(VGP_ppc64_linux) || defined(VGP_ppc64_aix5) -+ Addr64 bogus_RA = (Addr64)&VG_(ppctoc_magic_redirect_return_stub); -+ Int offB_GPR2 = offsetof(VexGuestPPC64State,guest_GPR2); -+ Int offB_LR = offsetof(VexGuestPPC64State,guest_LR); -+ gen_PUSH( bb, IRExpr_Get(offB_LR, Ity_I64) ); -+ gen_PUSH( bb, IRExpr_Get(offB_GPR2, Ity_I64) ); -+ addStmtToIRSB( bb, IRStmt_Put( offB_LR, mkU64( bogus_RA )) ); -+ addStmtToIRSB( bb, IRStmt_Put( offB_GPR2, mkU64( new_R2_value )) ); -+ -+# elif defined(VGP_ppc32_aix5) -+ Addr32 bogus_RA = (Addr32)&VG_(ppctoc_magic_redirect_return_stub); -+ Int offB_GPR2 = offsetof(VexGuestPPC32State,guest_GPR2); -+ Int offB_LR = offsetof(VexGuestPPC32State,guest_LR); -+ gen_PUSH( bb, IRExpr_Get(offB_LR, Ity_I32) ); -+ gen_PUSH( bb, IRExpr_Get(offB_GPR2, Ity_I32) ); -+ addStmtToIRSB( bb, IRStmt_Put( offB_LR, mkU32( bogus_RA )) ); -+ addStmtToIRSB( bb, IRStmt_Put( offB_GPR2, mkU32( new_R2_value )) ); -+ -+# else -+# error Platform is not TOC-afflicted, fortunately -+# endif -+} -+ -+static void gen_pop_R2_LR_then_bLR ( IRSB* bb ) -+{ -+# if defined(VGP_ppc64_linux) || defined(VGP_ppc64_aix5) -+ Int offB_GPR2 = offsetof(VexGuestPPC64State,guest_GPR2); -+ Int offB_LR = offsetof(VexGuestPPC64State,guest_LR); -+ IRTemp old_R2 = newIRTemp( bb->tyenv, Ity_I64 ); -+ IRTemp old_LR = newIRTemp( bb->tyenv, Ity_I64 ); -+ /* Restore R2 */ -+ old_R2 = gen_POP( bb ); -+ addStmtToIRSB( bb, IRStmt_Put( offB_GPR2, IRExpr_RdTmp(old_R2)) ); -+ /* Restore LR */ -+ old_LR = gen_POP( bb ); -+ addStmtToIRSB( bb, IRStmt_Put( offB_LR, IRExpr_RdTmp(old_LR)) ); -+ /* Branch to LR */ -+ /* re boring, we arrived here precisely because a wrapped fn did a -+ blr (hence Ijk_Ret); so we should just mark this jump as Boring, -+ else one _Call will have resulted in two _Rets. */ -+ bb->jumpkind = Ijk_Boring; -+ bb->next = IRExpr_Binop(Iop_And64, IRExpr_RdTmp(old_LR), mkU64(~(3ULL))); -+ -+# elif defined(VGP_ppc32_aix5) -+ Int offB_GPR2 = offsetof(VexGuestPPC32State,guest_GPR2); -+ Int offB_LR = offsetof(VexGuestPPC32State,guest_LR); -+ IRTemp old_R2 = newIRTemp( bb->tyenv, Ity_I32 ); -+ IRTemp old_LR = newIRTemp( bb->tyenv, Ity_I32 ); -+ /* Restore R2 */ -+ old_R2 = gen_POP( bb ); -+ addStmtToIRSB( bb, IRStmt_Put( offB_GPR2, IRExpr_RdTmp(old_R2)) ); -+ /* Restore LR */ -+ old_LR = gen_POP( bb ); -+ addStmtToIRSB( bb, IRStmt_Put( offB_LR, IRExpr_RdTmp(old_LR)) ); -+ -+ /* Branch to LR */ -+ /* re boring, we arrived here precisely because a wrapped fn did a -+ blr (hence Ijk_Ret); so we should just mark this jump as Boring, -+ else one _Call will have resulted in two _Rets. */ -+ bb->jumpkind = Ijk_Boring; -+ bb->next = IRExpr_Binop(Iop_And32, IRExpr_RdTmp(old_LR), mkU32(~3)); -+ -+# else -+# error Platform is not TOC-afflicted, fortunately -+# endif -+} -+ -+static -+Bool mk_preamble__ppctoc_magic_return_stub ( void* closureV, IRSB* bb ) -+{ -+ VgCallbackClosure* closure = (VgCallbackClosure*)closureV; -+ /* Since we're creating the entire IRSB right here, give it a -+ proper IMark, as it won't get one any other way, and cachegrind -+ will barf if it doesn't have one (fair enough really). */ -+ addStmtToIRSB( bb, IRStmt_IMark( closure->readdr, 4 ) ); -+ /* Generate the magic sequence: -+ pop R2 from hidden stack -+ pop LR from hidden stack -+ goto LR -+ */ -+ gen_pop_R2_LR_then_bLR(bb); -+ return True; /* True == this is the entire BB; don't disassemble any -+ real insns into it - just hand it directly to -+ optimiser/instrumenter/backend. */ -+} -+#endif -+ -+/* --------------- END helpers for with-TOC platforms --------------- */ -+ -+ -+/* This is the IR preamble generator used for replacement -+ functions. It adds code to set the guest_NRADDR{_GPR2} to zero -+ (technically not necessary, but facilitates detecting mixups in -+ which a replacement function has been erroneously declared using -+ VG_REPLACE_FUNCTION_Z{U,Z} when instead it should have been written -+ using VG_WRAP_FUNCTION_Z{U,Z}). -+ -+ On with-TOC platforms the follow hacks are also done: LR and R2 are -+ pushed onto a hidden stack, R2 is set to the correct value for the -+ replacement function, and LR is set to point at the magic -+ return-stub address. Setting LR causes the return of the -+ wrapped/redirected function to lead to our magic return stub, which -+ restores LR and R2 from said stack and returns for real. -+ -+ VG_(get_StackTrace_wrk) understands that the LR value may point to -+ the return stub address, and that in that case it can get the real -+ LR value from the hidden stack instead. */ -+static -+Bool mk_preamble__set_NRADDR_to_zero ( void* closureV, IRSB* bb ) -+{ -+ Int nraddr_szB -+ = sizeof(((VexGuestArchState*)0)->guest_NRADDR); -+ vg_assert(nraddr_szB == 4 || nraddr_szB == 8); -+ vg_assert(nraddr_szB == VG_WORDSIZE); -+ addStmtToIRSB( -+ bb, -+ IRStmt_Put( -+ offsetof(VexGuestArchState,guest_NRADDR), -+ nraddr_szB == 8 ? mkU64(0) : mkU32(0) -+ ) -+ ); -+# if defined(VG_PLAT_USES_PPCTOC) -+ { VgCallbackClosure* closure = (VgCallbackClosure*)closureV; -+ addStmtToIRSB( -+ bb, -+ IRStmt_Put( -+ offsetof(VexGuestArchState,guest_NRADDR_GPR2), -+ VG_WORDSIZE==8 ? mkU64(0) : mkU32(0) -+ ) -+ ); -+ gen_push_and_set_LR_R2 ( bb, VG_(get_tocptr)( closure->readdr ) ); -+ } -+# endif -+ return False; -+} -+ -+/* Ditto, except set guest_NRADDR to nraddr (the un-redirected guest -+ address). This is needed for function wrapping - so the wrapper -+ can read _NRADDR and find the address of the function being -+ wrapped. On toc-afflicted platforms we must also snarf r2. */ -+static -+Bool mk_preamble__set_NRADDR_to_nraddr ( void* closureV, IRSB* bb ) -+{ -+ VgCallbackClosure* closure = (VgCallbackClosure*)closureV; -+ Int nraddr_szB -+ = sizeof(((VexGuestArchState*)0)->guest_NRADDR); -+ vg_assert(nraddr_szB == 4 || nraddr_szB == 8); -+ vg_assert(nraddr_szB == VG_WORDSIZE); -+ addStmtToIRSB( -+ bb, -+ IRStmt_Put( -+ offsetof(VexGuestArchState,guest_NRADDR), -+ nraddr_szB == 8 -+ ? IRExpr_Const(IRConst_U64( closure->nraddr )) -+ : IRExpr_Const(IRConst_U32( (UInt)closure->nraddr )) -+ ) -+ ); -+# if defined(VGP_ppc64_linux) || defined(VGP_ppc32_aix5) \ -+ || defined(VGP_ppc64_aix5) -+ addStmtToIRSB( -+ bb, -+ IRStmt_Put( -+ offsetof(VexGuestArchState,guest_NRADDR_GPR2), -+ IRExpr_Get(offsetof(VexGuestArchState,guest_GPR2), -+ VG_WORDSIZE==8 ? Ity_I64 : Ity_I32) -+ ) -+ ); -+ gen_push_and_set_LR_R2 ( bb, VG_(get_tocptr)( closure->readdr ) ); -+# endif -+ return False; -+} -+ -+/* --- Helpers to do with PPC related stack redzones. --- */ -+ -+__attribute__((unused)) -+static Bool const_True ( Addr64 guest_addr ) -+{ -+ return True; -+} -+ -+__attribute__((unused)) -+static Bool bl_RZ_zap_ok_for_AIX ( Addr64 bl_target ) -+{ -+ /* paranoia */ -+ if (sizeof(void*) == 4) -+ bl_target &= 0xFFFFFFFFULL; -+ -+ /* don't zap the redzone for calls to millicode. */ -+ if (bl_target < 0x10000ULL) -+ return False; -+ -+ /* don't zap the redzone for calls to .$SAVEF14 .. .$SAVEF31. -+ First we need to be reasonably sure we won't segfault by looking -+ at the branch target. */ -+ { NSegment const*const seg = VG_(am_find_nsegment)( (Addr)bl_target ); -+ if (seg && seg->hasR) { -+ switch ( *(UInt*)(Addr)bl_target ) { -+ case 0xd9c1ff70: /* stfd f14,-144(r1) */ -+ case 0xd9e1ff78: /* stfd f15,-136(r1) */ -+ case 0xda01ff80: /* stfd f16,-128(r1) */ -+ case 0xda21ff88: /* stfd f17,-120(r1) */ -+ case 0xda41ff90: /* stfd f18,-112(r1) */ -+ case 0xda61ff98: /* stfd f19,-104(r1) */ -+ case 0xda81ffa0: /* stfd f20,-96(r1) */ -+ case 0xdaa1ffa8: /* stfd f21,-88(r1) */ -+ case 0xdac1ffb0: /* stfd f22,-80(r1) */ -+ case 0xdae1ffb8: /* stfd f23,-72(r1) */ -+ case 0xdb01ffc0: /* stfd f24,-64(r1) */ -+ case 0xdb21ffc8: /* stfd f25,-56(r1) */ -+ case 0xdb41ffd0: /* stfd f26,-48(r1) */ -+ case 0xdb61ffd8: /* stfd f27,-40(r1) */ -+ case 0xdb81ffe0: /* stfd f28,-32(r1) */ -+ case 0xdba1ffe8: /* stfd f29,-24(r1) */ -+ case 0xdbc1fff0: /* stfd f30,-16(r1) */ -+ case 0xdbe1fff8: /* stfd f31,-8(r1) */ -+ return False; -+ } -+ } -+ } -+ return True; -+} -+ -+/* --------------- main translation function --------------- */ -+ -+/* Note: see comments at top of m_redir.c for the Big Picture on how -+ redirections are managed. */ -+ -+typedef -+ enum { -+ /* normal translation, redir neither requested nor inhibited */ -+ T_Normal, -+ /* redir translation, function-wrap (set _NRADDR) style */ -+ T_Redir_Wrap, -+ /* redir translation, replacement (don't set _NRADDR) style */ -+ T_Redir_Replace, -+ /* a translation in which redir is specifically disallowed */ -+ T_NoRedir -+ } -+ T_Kind; -+ -+/* Translate the basic block beginning at NRADDR, and add it to the -+ translation cache & translation table. Unless -+ DEBUGGING_TRANSLATION is true, in which case the call is being done -+ for debugging purposes, so (a) throw away the translation once it -+ is made, and (b) produce a load of debugging output. If -+ ALLOW_REDIRECTION is False, do not attempt redirection of NRADDR, -+ and also, put the resulting translation into the no-redirect tt/tc -+ instead of the normal one. -+ -+ TID is the identity of the thread requesting this translation. -+*/ -+ -+Bool VG_(translate) ( ThreadId tid, -+ Addr64 nraddr, -+ Bool debugging_translation, -+ Int debugging_verbosity, -+ ULong bbs_done, -+ Bool allow_redirection ) -+{ -+ Addr64 addr; -+ T_Kind kind; -+ Int tmpbuf_used, verbosity, i; -+ Bool notrace_until_done, do_self_check; -+ UInt notrace_until_limit = 0; -+ Bool (*preamble_fn)(void*,IRSB*); -+ VexArch vex_arch; -+ VexArchInfo vex_archinfo; -+ VexAbiInfo vex_abiinfo; -+ VexGuestExtents vge; -+ VexTranslateArgs vta; -+ VexTranslateResult tres; -+ VgCallbackClosure closure; -+ -+ /* Make sure Vex is initialised right. */ -+ -+ static Bool vex_init_done = False; -+ -+ if (!vex_init_done) { -+ LibVEX_Init ( &failure_exit, &log_bytes, -+ 1, /* debug_paranoia */ -+ False, /* valgrind support */ -+ &VG_(clo_vex_control) ); -+ vex_init_done = True; -+ } -+ -+ /* Establish the translation kind and actual guest address to -+ start from. Sets (addr,kind). */ -+ if (allow_redirection) { -+ Bool isWrap; -+ Addr64 tmp = VG_(redir_do_lookup)( nraddr, &isWrap ); -+ if (tmp == nraddr) { -+ /* no redirection found */ -+ addr = nraddr; -+ kind = T_Normal; -+ } else { -+ /* found a redirect */ -+ addr = tmp; -+ kind = isWrap ? T_Redir_Wrap : T_Redir_Replace; -+ } -+ } else { -+ addr = nraddr; -+ kind = T_NoRedir; -+ } -+ -+ /* Established: (nraddr, addr, kind) */ -+ -+ /* Printing redirection info. */ -+ -+ if ((kind == T_Redir_Wrap || kind == T_Redir_Replace) -+ && (VG_(clo_verbosity) >= 2 || VG_(clo_trace_redir))) { -+ Bool ok; -+ Char name1[64] = ""; -+ Char name2[64] = ""; -+ name1[0] = name2[0] = 0; -+ ok = VG_(get_fnname_w_offset)(nraddr, name1, 64); -+ if (!ok) VG_(strcpy)(name1, "???"); -+ ok = VG_(get_fnname_w_offset)(addr, name2, 64); -+ if (!ok) VG_(strcpy)(name2, "???"); -+ VG_(message)(Vg_DebugMsg, -+ "REDIR: 0x%llx (%s) redirected to 0x%llx (%s)\n", -+ nraddr, name1, -+ addr, name2 ); -+ } -+ -+ /* If codegen tracing, don't start tracing until -+ notrace_until_limit blocks have gone by. This avoids printing -+ huge amounts of useless junk when all we want to see is the last -+ few blocks translated prior to a failure. Set -+ notrace_until_limit to be the number of translations to be made -+ before --trace-codegen= style printing takes effect. */ -+ notrace_until_done -+ = VG_(get_bbs_translated)() >= notrace_until_limit; -+ -+ if (!debugging_translation) -+ VG_TRACK( pre_mem_read, Vg_CoreTranslate, -+ tid, "(translator)", addr, 1 ); -+ -+ /* If doing any code printing, print a basic block start marker */ -+ if (VG_(clo_trace_flags) || debugging_translation) { -+ Char fnname[64] = ""; -+ VG_(get_fnname_w_offset)(addr, fnname, 64); -+ VG_(printf)( -+ "==== SB %d [tid %d] %s(0x%llx) SBs exec'd %lld ====\n", -+ VG_(get_bbs_translated)(), (Int)tid, fnname, addr, -+ bbs_done); -+ } -+ -+ /* Are we allowed to translate here? */ -+ -+ { /* BEGIN new scope specially for 'seg' */ -+ NSegment const* seg = VG_(am_find_nsegment)(addr); -+ -+ if ( (!translations_allowable_from_seg(seg)) -+ || addr == TRANSTAB_BOGUS_GUEST_ADDR ) { -+ if (VG_(clo_trace_signals)) -+ VG_(message)(Vg_DebugMsg, "translations not allowed here (0x%llx)" -+ " - throwing SEGV\n", addr); -+ /* U R busted, sonny. Place your hands on your head and step -+ away from the orig_addr. */ -+ /* Code address is bad - deliver a signal instead */ -+ if (seg != NULL) { -+ /* There's some kind of segment at the requested place, but we -+ aren't allowed to execute code here. */ -+ VG_(synth_fault_perms)(tid, addr); -+ } else { -+ /* There is no segment at all; we are attempting to execute in -+ the middle of nowhere. */ -+ VG_(synth_fault_mapping)(tid, addr); -+ } -+ return False; -+ } -+ -+ /* Do we want a self-checking translation? */ -+ do_self_check = self_check_required( seg, tid ); -+ -+ /* True if a debug trans., or if bit N set in VG_(clo_trace_codegen). */ -+ verbosity = 0; -+ if (debugging_translation) { -+ verbosity = debugging_verbosity; -+ } -+ else -+ if ( (VG_(clo_trace_flags) > 0 -+ && VG_(get_bbs_translated)() >= VG_(clo_trace_notbelow) )) { -+ verbosity = VG_(clo_trace_flags); -+ } -+ -+ /* Figure out which preamble-mangling callback to send. */ -+ preamble_fn = NULL; -+ if (kind == T_Redir_Replace) -+ preamble_fn = mk_preamble__set_NRADDR_to_zero; -+ else -+ if (kind == T_Redir_Wrap) -+ preamble_fn = mk_preamble__set_NRADDR_to_nraddr; -+ -+# if defined(VG_PLAT_USES_PPCTOC) -+ if (ULong_to_Ptr(nraddr) -+ == (void*)&VG_(ppctoc_magic_redirect_return_stub)) { -+ /* If entering the special return stub, this means a wrapped or -+ redirected function is returning. Make this translation one -+ which restores R2 and LR from the thread's hidden redir -+ stack, and branch to the (restored) link register, thereby -+ really causing the function to return. */ -+ vg_assert(kind == T_Normal); -+ vg_assert(nraddr == addr); -+ preamble_fn = mk_preamble__ppctoc_magic_return_stub; -+ } -+# endif -+ -+ /* ------ Actually do the translation. ------ */ -+ tl_assert2(VG_(tdict).tool_instrument, -+ "you forgot to set VgToolInterface function 'tool_instrument'"); -+ -+ /* Get the CPU info established at startup. */ -+ VG_(machine_get_VexArchInfo)( &vex_arch, &vex_archinfo ); -+ -+ /* Set up 'abiinfo' structure with stuff Vex needs to know about -+ the guest and host ABIs. */ -+ -+ LibVEX_default_VexAbiInfo( &vex_abiinfo ); -+ vex_abiinfo.guest_stack_redzone_size = VG_STACK_REDZONE_SZB; -+ -+# if defined(VGP_amd64_linux) -+ vex_abiinfo.guest_amd64_assume_fs_is_zero = True; -+# endif -+# if defined(VGP_amd64_darwin) -+ vex_abiinfo.guest_amd64_assume_gs_is_0x60 = True; -+# endif -+# if defined(VGP_ppc32_linux) -+ vex_abiinfo.guest_ppc_zap_RZ_at_blr = False; -+ vex_abiinfo.guest_ppc_zap_RZ_at_bl = NULL; -+ vex_abiinfo.host_ppc32_regalign_int64_args = True; -+# endif -+# if defined(VGP_ppc64_linux) -+ vex_abiinfo.guest_ppc_zap_RZ_at_blr = True; -+ vex_abiinfo.guest_ppc_zap_RZ_at_bl = const_True; -+ vex_abiinfo.host_ppc_calls_use_fndescrs = True; -+# endif -+# if defined(VGP_ppc32_aix5) || defined(VGP_ppc64_aix5) -+ vex_abiinfo.guest_ppc_zap_RZ_at_blr = False; -+ vex_abiinfo.guest_ppc_zap_RZ_at_bl = bl_RZ_zap_ok_for_AIX; -+ vex_abiinfo.guest_ppc_sc_continues_at_LR = True; -+ vex_abiinfo.host_ppc_calls_use_fndescrs = True; -+# endif -+ -+ /* Set up closure args. */ -+ closure.tid = tid; -+ closure.nraddr = nraddr; -+ closure.readdr = addr; -+ -+ /* Set up args for LibVEX_Translate. */ -+ vta.arch_guest = vex_arch; -+ vta.archinfo_guest = vex_archinfo; -+ vta.arch_host = vex_arch; -+ vta.archinfo_host = vex_archinfo; -+ vta.abiinfo_both = vex_abiinfo; -+ vta.guest_bytes = (UChar*)ULong_to_Ptr(addr); -+ vta.guest_bytes_addr = (Addr64)addr; -+ vta.callback_opaque = (void*)&closure; -+ vta.chase_into_ok = chase_into_ok; -+ vta.preamble_function = preamble_fn; -+ vta.guest_extents = &vge; -+ vta.host_bytes = tmpbuf; -+ vta.host_bytes_size = N_TMPBUF; -+ vta.host_bytes_used = &tmpbuf_used; -+ { /* At this point we have to reconcile Vex's view of the -+ instrumentation callback - which takes a void* first argument -+ - with Valgrind's view, in which the first arg is a -+ VgCallbackClosure*. Hence the following longwinded casts. -+ They are entirely legal but longwinded so as to maximise the -+ chance of the C typechecker picking up any type snafus. */ -+ IRSB*(*f)(VgCallbackClosure*, -+ IRSB*,VexGuestLayout*,VexGuestExtents*, -+ IRType,IRType) -+ = VG_(tdict).tool_instrument; -+ IRSB*(*g)(void*, -+ IRSB*,VexGuestLayout*,VexGuestExtents*, -+ IRType,IRType) -+ = (IRSB*(*)(void*,IRSB*,VexGuestLayout*,VexGuestExtents*,IRType,IRType))f; -+ vta.instrument1 = g; -+ } -+ /* No need for type kludgery here. */ -+ vta.instrument2 = need_to_handle_SP_assignment() -+ ? vg_SP_update_pass -+ : NULL; -+ vta.finaltidy = VG_(needs).final_IR_tidy_pass -+ ? VG_(tdict).tool_final_IR_tidy_pass -+ : NULL; -+ vta.do_self_check = do_self_check; -+ vta.traceflags = verbosity; -+ -+ /* Set up the dispatch-return info. For archs without a link -+ register, vex generates a jump back to the specified dispatch -+ address. Else, it just generates a branch-to-LR. */ -+# if defined(VGA_x86) || defined(VGA_amd64) -+ vta.dispatch -+ = (!allow_redirection) -+ ? /* It's a no-redir translation. Will be run with the nonstandard -+ dispatcher VG_(run_a_noredir_translation) -+ and so needs a nonstandard return point. */ -+ (void*) &VG_(run_a_noredir_translation__return_point) -+ -+ : /* normal translation. Uses VG_(run_innerloop). Return -+ point depends on whether we're profiling bbs or not. */ -+ VG_(clo_profile_flags) > 0 -+ ? (void*) &VG_(run_innerloop__dispatch_profiled) -+ : (void*) &VG_(run_innerloop__dispatch_unprofiled); -+# elif defined(VGA_ppc32) || defined(VGA_ppc64) \ -+ || defined(VGA_arm) -+ vta.dispatch = NULL; -+# else -+# error "Unknown arch" -+# endif -+ -+ /* Sheesh. Finally, actually _do_ the translation! */ -+ tres = LibVEX_Translate ( &vta ); -+ -+ vg_assert(tres == VexTransOK); -+ vg_assert(tmpbuf_used <= N_TMPBUF); -+ vg_assert(tmpbuf_used > 0); -+ -+ /* Tell aspacem of all segments that have had translations taken -+ from them. Optimisation: don't re-look up vge.base[0] since seg -+ should already point to it. */ -+ -+ vg_assert( vge.base[0] == (Addr64)addr ); -+ /* set 'translations taken from this segment' flag */ -+ VG_(am_set_segment_hasT_if_SkFileC_or_SkAnonC)( (NSegment*)seg ); -+ } /* END new scope specially for 'seg' */ -+ -+ for (i = 1; i < vge.n_used; i++) { -+ NSegment const* seg -+ = VG_(am_find_nsegment)( vge.base[i] ); -+ /* set 'translations taken from this segment' flag */ -+ VG_(am_set_segment_hasT_if_SkFileC_or_SkAnonC)( (NSegment*)seg ); -+ } -+ -+ /* Copy data at trans_addr into the translation cache. */ -+ vg_assert(tmpbuf_used > 0 && tmpbuf_used < 65536); -+ -+ // If debugging, don't do anything with the translated block; we -+ // only did this for the debugging output produced along the way. -+ if (!debugging_translation) { -+ -+ if (kind != T_NoRedir) { -+ // Put it into the normal TT/TC structures. This is the -+ // normal case. -+ -+ // Note that we use nraddr (the non-redirected address), not -+ // addr, which might have been changed by the redirection -+ VG_(add_to_transtab)( &vge, -+ nraddr, -+ (Addr)(&tmpbuf[0]), -+ tmpbuf_used, -+ do_self_check ); -+ } else { -+ VG_(add_to_unredir_transtab)( &vge, -+ nraddr, -+ (Addr)(&tmpbuf[0]), -+ tmpbuf_used ); -+ } -+ } -+ -+ return True; -+} -+ -+/*--------------------------------------------------------------------*/ -+/*--- end ---*/ -+/*--------------------------------------------------------------------*/ ---- coregrind/m_transtab.c -+++ coregrind/m_transtab.c -@@ -901,6 +901,9 @@ - # elif defined(VGA_amd64) - /* no need to do anything, hardware provides coherence */ - -+# elif defined(VGA_s390x) -+ /* no need to do anything, hardware provides coherence */ -+ - # elif defined(VGP_arm_linux) - /* ARM cache flushes are privileged, so we must defer to the kernel. */ - Addr startaddr = (Addr) ptr; ---- coregrind/pub_core_basics.h -+++ coregrind/pub_core_basics.h -@@ -58,6 +58,8 @@ - # include "libvex_guest_ppc64.h" - #elif defined(VGA_arm) - # include "libvex_guest_arm.h" -+#elif defined(VGA_s390x) -+# include "libvex_guest_s390x.h" - #else - # error Unknown arch - #endif -@@ -105,6 +107,10 @@ - UInt r11; - UInt r7; - } ARM; -+ struct { -+ ULong r_fp; -+ ULong r_lr; -+ } S390X; - } misc; - } - UnwindStartRegs; ---- coregrind/pub_core_debuginfo.h -+++ coregrind/pub_core_debuginfo.h -@@ -123,6 +123,10 @@ - typedef - UChar /* should be void, but gcc complains at use points */ - D3UnwindRegs; -+#elif defined(VGA_s390x) -+typedef -+ struct { Addr ia; Addr sp; Addr fp; Addr lr;} -+ D3UnwindRegs; - #else - # error "Unsupported arch" - #endif ---- coregrind/pub_core_machine.h -+++ coregrind/pub_core_machine.h -@@ -75,6 +75,11 @@ - # undef VG_ELF_MACHINE - # undef VG_ELF_CLASS - # undef VG_PLAT_USES_PPCTOC -+#elif defined(VGP_s390x_linux) -+# define VG_ELF_DATA2XXX ELFDATA2MSB -+# define VG_ELF_MACHINE EM_S390 -+# define VG_ELF_CLASS ELFCLASS64 -+# undef VG_PLAT_USES_PPCTOC - #else - # error Unknown platform - #endif -@@ -99,6 +104,10 @@ - # define VG_INSTR_PTR guest_R15T - # define VG_STACK_PTR guest_R13 - # define VG_FRAME_PTR guest_R11 -+#elif defined(VGA_s390x) -+# define VG_INSTR_PTR guest_IA -+# define VG_STACK_PTR guest_SP -+# define VG_FRAME_PTR guest_FP - #else - # error Unknown arch - #endif ---- coregrind/pub_core_mallocfree.h -+++ coregrind/pub_core_mallocfree.h -@@ -77,6 +77,7 @@ - // for any AltiVec- or SSE-related type. This matches the Darwin libc. - #elif defined(VGP_amd64_linux) || \ - defined(VGP_ppc64_linux) || \ -+ defined(VGP_s390x_linux) || \ - defined(VGP_ppc64_aix5) || \ - defined(VGP_ppc32_aix5) || \ - defined(VGP_x86_darwin) || \ ---- coregrind/pub_core_syscall.h -+++ coregrind/pub_core_syscall.h -@@ -80,6 +80,7 @@ - UInt wHI, UInt wLO ); - extern SysRes VG_(mk_SysRes_amd64_darwin)( UChar scclass, Bool isErr, - ULong wHI, ULong wLO ); -+extern SysRes VG_(mk_SysRes_s390x_linux) ( Long val ); - extern SysRes VG_(mk_SysRes_Error) ( UWord val ); - extern SysRes VG_(mk_SysRes_Success) ( UWord val ); - ---- coregrind/pub_core_threadstate.h -+++ coregrind/pub_core_threadstate.h -@@ -85,6 +85,8 @@ - typedef VexGuestPPC64State VexGuestArchState; - #elif defined(VGA_arm) - typedef VexGuestARMState VexGuestArchState; -+#elif defined(VGA_s390x) -+ typedef VexGuestS390XState VexGuestArchState; - #else - # error Unknown architecture - #endif ---- coregrind/pub_core_trampoline.h -+++ coregrind/pub_core_trampoline.h -@@ -140,6 +140,11 @@ - extern UInt VG_(amd64_darwin_REDIR_FOR_arc4random)( void ); - #endif - -+#if defined(VGP_s390x_linux) -+extern Addr VG_(s390x_linux_SUBST_FOR_sigreturn); -+extern Addr VG_(s390x_linux_SUBST_FOR_rt_sigreturn); -+#endif -+ - #endif // __PUB_CORE_TRAMPOLINE_H - - /*--------------------------------------------------------------------*/ ---- coregrind/pub_core_transtab_asm.h -+++ coregrind/pub_core_transtab_asm.h -@@ -43,7 +43,10 @@ - 2)[VG_TT_FAST_BITS-1 : 0]' on those targets. - - On ARM we do like ppc32/ppc64, although that will have to be -- revisited when we come to implement Thumb. */ -+ revisited when we come to implement Thumb. -+ -+ On s390x the rightmost bit of an instruction address is zero. -+ For best table utilization shift the address to the right by 1 bit. */ - - #define VG_TT_FAST_BITS 15 - #define VG_TT_FAST_SIZE (1 << VG_TT_FAST_BITS) -@@ -55,6 +58,8 @@ - # define VG_TT_FAST_HASH(_addr) ((((UWord)(_addr)) ) & VG_TT_FAST_MASK) - #elif defined(VGA_ppc32) || defined(VGA_ppc64) || defined(VGA_arm) - # define VG_TT_FAST_HASH(_addr) ((((UWord)(_addr)) >> 2) & VG_TT_FAST_MASK) -+#elif defined(VGA_s390x) -+# define VG_TT_FAST_HASH(_addr) ((((UWord)(_addr)) >> 1) & VG_TT_FAST_MASK) - #else - # error "VG_TT_FAST_HASH: unknown platform" - #endif ---- drd/drd_bitmap.h -+++ drd/drd_bitmap.h -@@ -139,7 +139,7 @@ - /** Log2 of BITS_PER_UWORD. */ - #if defined(VGA_x86) || defined(VGA_ppc32) || defined(VGA_arm) - #define BITS_PER_BITS_PER_UWORD 5 --#elif defined(VGA_amd64) || defined(VGA_ppc64) -+#elif defined(VGA_amd64) || defined(VGA_ppc64) || defined(VGA_s390x) - #define BITS_PER_BITS_PER_UWORD 6 - #else - #error Unknown platform. ---- drd/drd_load_store.c -+++ drd/drd_load_store.c -@@ -48,6 +48,8 @@ - #define STACK_POINTER_OFFSET OFFSET_ppc64_GPR1 - #elif defined(VGA_arm) - #define STACK_POINTER_OFFSET OFFSET_arm_R13 -+#elif defined(VGA_s390x) -+#define STACK_POINTER_OFFSET OFFSET_s390x_r15 - #else - #error Unknown architecture. - #endif ---- exp-ptrcheck/h_main.c -+++ exp-ptrcheck/h_main.c -@@ -564,7 +564,7 @@ - # define SHMEM_SECMAP_SHIFT 2 - # define SHMEM_IS_WORD_ALIGNED(_a) VG_IS_4_ALIGNED(_a) - # define SEC_MAP_WORDS (0x10000UL / 4UL) /* 16k */ --#elif defined(VGA_amd64) || defined(VGA_ppc64) -+#elif defined(VGA_amd64) || defined(VGA_ppc64) || defined(VGA_s390x) - # define SHMEM_SECMAP_MASK 0xFFF8 - # define SHMEM_SECMAP_SHIFT 3 - # define SHMEM_IS_WORD_ALIGNED(_a) VG_IS_8_ALIGNED(_a) -@@ -1296,6 +1296,11 @@ - # define PC_SIZEOF_GUEST_STATE sizeof(VexGuestARMState) - #endif - -+#if defined(VGA_s390x) -+# include "libvex_guest_s390x.h" -+# define PC_SIZEOF_GUEST_STATE sizeof(VexGuestS390XState) -+#endif -+ - - /* See description on definition of type IntRegInfo. */ - static void get_IntRegInfo ( /*OUT*/IntRegInfo* iii, Int offset, Int szB ) -@@ -1833,6 +1838,14 @@ - tl_assert(0); - - -+ /* -------------------- s390x -------------------- */ -+ -+# elif defined(VGA_s390x) -+ -+ Int o = offset; -+ -+ VG_(tool_panic)("not implemented for s390x"); -+ - # else - # error "FIXME: not implemented for this architecture" - # endif -@@ -1914,6 +1927,11 @@ - VG_(printf)("\n"); - tl_assert(0); - -+ /* -------------------- s390x -------------------- */ -+# elif defined(VGA_s390x) -+ -+ tl_assert(0); -+ - /* -------------------- arm -------------------- */ - # elif defined(VGA_arm) - /* There are no rotating register sections on ARM. */ -@@ -2472,7 +2490,9 @@ - ADD(0, __NR_symlink); - ADD(0, __NR_sysinfo); - ADD(0, __NR_tgkill); -+#if defined(__NR_time) - ADD(0, __NR_time); -+# endif - ADD(0, __NR_times); - ADD(0, __NR_truncate); - # if defined(__NR_truncate64) -@@ -2754,6 +2774,8 @@ - tl_assert(sizeof(UWord) == 4); - return (a >= 0x00008000UL && a < 0xFF000000UL); - -+# elif defined(VGA_s390x) -+ tl_assert(0); - # else - # error "Unsupported architecture" - # endif ---- exp-ptrcheck/pc_main.c -+++ exp-ptrcheck/pc_main.c -@@ -140,6 +140,10 @@ - "(like --enable-sg-checks=no).\n"); - } - sg_clo_enable_sg_checks = False; -+# elif defined(VGA_s390x) -+ /* fixs390: to be done. */ -+ VG_(message)(Vg_UserMsg, -+ "ERROR: exp-ptrcheck on s390x platform is not supported yet.\n"); - # else - # error "Unsupported architecture" - # endif ---- exp-ptrcheck/tests/is_arch_supported -+++ exp-ptrcheck/tests/is_arch_supported -@@ -1,7 +1,7 @@ - #!/bin/sh - # --# Not all architectures are supported by exp-ptr. Currently, PowerPC and ARM --# are not supported and will fail these tests as follows: -+# Not all architectures are supported by exp-ptr. Currently, PowerPC, s390x -+# and ARM are not supported and will fail these tests as follows: - # WARNING: exp-ptrcheck on platforms: stack and global array - # WARNING: checking is not currently supported. Only heap checking is - # WARNING: supported. -@@ -10,6 +10,6 @@ - # architectures. - - case `uname -i` in -- ppc*|arm*) exit 1;; -+ ppc*|arm*|s390x) exit 1;; - *) exit 0;; - esac ---- helgrind/tests/annotate_hbefore.c -+++ helgrind/tests/annotate_hbefore.c -@@ -167,6 +167,25 @@ - return success; - } - -+#elif defined(VGA_s390x) -+ -+// s390x -+/* return 1 if success, 0 if failure */ -+UWord do_acasW(UWord* addr, UWord expected, UWord nyu ) -+{ -+ int cc; -+ -+ __asm__ __volatile__ ( -+ "csg %2,%3,%1\n\t" -+ "ipm %0\n\t" -+ "srl %0,28\n\t" -+ : /* out */ "=r" (cc) -+ : /* in */ "Q" (*addr), "d" (expected), "d" (nyu) -+ : "memory", "cc" -+ ); -+ return cc == 0; -+} -+ - #endif - - void atomic_incW ( UWord* w ) ---- helgrind/tests/tc07_hbl1.c -+++ helgrind/tests/tc07_hbl1.c -@@ -15,6 +15,7 @@ - #undef PLAT_ppc32_linux - #undef PLAT_ppc64_linux - #undef PLAT_arm_linux -+#undef PLAT_s390x_linux - - #if defined(_AIX) && defined(__64BIT__) - # define PLAT_ppc64_aix5 1 -@@ -34,6 +35,8 @@ - # define PLAT_ppc64_linux 1 - #elif defined(__linux__) && defined(__arm__) - # define PLAT_arm_linux 1 -+#elif defined(__linux__) && defined(__s390x__) -+# define PLAT_s390x_linux 1 - #endif - - #if defined(PLAT_amd64_linux) || defined(PLAT_x86_linux) \ -@@ -65,6 +68,16 @@ - : /*out*/ : /*in*/ "r"(&(_lval)) \ - : /*trash*/ "r8", "r9", "cc", "memory" \ - ); -+#elif defined(PLAT_s390x_linux) -+# define INC(_lval,_lqual) \ -+ __asm__ __volatile__( \ -+ "1: l 0,%0\n" \ -+ " lr 1,0\n" \ -+ " ahi 1,1\n" \ -+ " cs 0,1,%0\n" \ -+ " jl 1b\n" \ -+ : "+m" (_lval) :: "cc", "1","2" \ -+ ) - #else - # error "Fix Me for this platform" - #endif ---- helgrind/tests/tc08_hbl2.c -+++ helgrind/tests/tc08_hbl2.c -@@ -31,6 +31,7 @@ - #undef PLAT_ppc32_linux - #undef PLAT_ppc64_linux - #undef PLAT_arm_linux -+#undef PLAT_s390x_linux - - #if defined(_AIX) && defined(__64BIT__) - # define PLAT_ppc64_aix5 1 -@@ -50,6 +51,8 @@ - # define PLAT_ppc64_linux 1 - #elif defined(__linux__) && defined(__arm__) - # define PLAT_arm_linux 1 -+#elif defined(__linux__) && defined(__s390x__) -+# define PLAT_s390x_linux 1 - #endif - - -@@ -82,6 +85,16 @@ - : /*out*/ : /*in*/ "r"(&(_lval)) \ - : /*trash*/ "r8", "r9", "cc", "memory" \ - ); -+#elif defined(PLAT_s390x_linux) -+# define INC(_lval,_lqual) \ -+ __asm__ __volatile__( \ -+ "1: l 0,%0\n" \ -+ " lr 1,0\n" \ -+ " ahi 1,1\n" \ -+ " cs 0,1,%0\n" \ -+ " jl 1b\n" \ -+ : "+m" (_lval) :: "cc", "0","1" \ -+ ) - #else - # error "Fix Me for this platform" - #endif ---- helgrind/tests/tc11_XCHG.c -+++ helgrind/tests/tc11_XCHG.c -@@ -18,6 +18,7 @@ - #undef PLAT_ppc32_linux - #undef PLAT_ppc64_linux - #undef PLAT_arm_linux -+#undef PLAT_s390x_linux - - #if defined(_AIX) && defined(__64BIT__) - # define PLAT_ppc64_aix5 1 -@@ -37,6 +38,8 @@ - # define PLAT_ppc64_linux 1 - #elif defined(__linux__) && defined(__arm__) - # define PLAT_arm_linux 1 -+#elif defined(__linux__) && defined(__s390x__) -+# define PLAT_s390x_linux 1 - #endif - - -@@ -59,7 +62,7 @@ - - #elif defined(PLAT_ppc32_linux) || defined(PLAT_ppc64_linux) \ - || defined(PLAT_ppc32_aix5) || defined(PLAT_ppc64_aix5) \ -- || defined(PLAT_arm_linux) -+ || defined(PLAT_arm_linux) || defined(PLAT_s390x_linux) - # if defined(HAVE_BUILTIN_ATOMIC) - # define XCHG_M_R(_addr,_lval) \ - do { \ ---- include/Makefile.am -+++ include/Makefile.am -@@ -43,17 +43,20 @@ - vki/vki-posixtypes-ppc32-linux.h \ - vki/vki-posixtypes-ppc64-linux.h \ - vki/vki-posixtypes-x86-linux.h \ -- vki/vki-posixtypes-arm-linux.h \ -+ vki/vki-posixtypes-arm-linux.h \ -+ vki/vki-posixtypes-s390x-linux.h \ - vki/vki-amd64-linux.h \ - vki/vki-ppc32-linux.h \ - vki/vki-ppc64-linux.h \ - vki/vki-x86-linux.h \ -- vki/vki-arm-linux.h \ -+ vki/vki-arm-linux.h \ -+ vki/vki-s390x-linux.h \ - vki/vki-scnums-amd64-linux.h \ - vki/vki-scnums-ppc32-linux.h \ - vki/vki-scnums-ppc64-linux.h \ - vki/vki-scnums-x86-linux.h \ -- vki/vki-scnums-arm-linux.h \ -+ vki/vki-scnums-arm-linux.h \ -+ vki/vki-scnums-s390x-linux.h \ - vki/vki-scnums-darwin.h - - noinst_HEADERS = \ ---- include/pub_tool_basics.h -+++ include/pub_tool_basics.h -@@ -292,7 +292,7 @@ - - #if defined(VGA_x86) || defined(VGA_amd64) || defined (VGA_arm) - # define VG_LITTLEENDIAN 1 --#elif defined(VGA_ppc32) || defined(VGA_ppc64) -+#elif defined(VGA_ppc32) || defined(VGA_ppc64) || defined(VGA_s390x) - # define VG_BIGENDIAN 1 - #else - # error Unknown arch -@@ -302,7 +302,7 @@ - #if defined(VGA_x86) - # define VG_REGPARM(n) __attribute__((regparm(n))) - #elif defined(VGA_amd64) || defined(VGA_ppc32) \ -- || defined(VGA_ppc64) || defined(VGA_arm) -+ || defined(VGA_ppc64) || defined(VGA_arm) || defined(VGA_s390x) - # define VG_REGPARM(n) /* */ - #else - # error Unknown arch ---- include/pub_tool_machine.h -+++ include/pub_tool_machine.h -@@ -81,6 +81,12 @@ - # define VG_CLREQ_SZB 20 - # define VG_STACK_REDZONE_SZB 288 // is this right? - -+#elif defined(VGP_s390x_linux) -+# define VG_MIN_INSTR_SZB 2 -+# define VG_MAX_INSTR_SZB 6 -+# define VG_CLREQ_SZB 10 -+# define VG_STACK_REDZONE_SZB 0 // s390 has no redzone -+ - #elif defined(VGP_x86_darwin) - # define VG_MIN_INSTR_SZB 1 // min length of native instruction - # define VG_MAX_INSTR_SZB 16 // max length of native instruction ---- include/pub_tool_vkiscnums_asm.h -+++ include/pub_tool_vkiscnums_asm.h -@@ -45,6 +45,9 @@ - #elif defined(VGP_ppc64_linux) - # include "vki/vki-scnums-ppc64-linux.h" - -+#elif defined(VGP_s390x_linux) -+# include "vki/vki-scnums-s390x-linux.h" -+ - #elif defined(VGP_arm_linux) - # include "vki/vki-scnums-arm-linux.h" - ---- include/valgrind.h -+++ include/valgrind.h -@@ -118,6 +118,8 @@ - #undef PLAT_ppc32_linux - #undef PLAT_ppc64_linux - #undef PLAT_arm_linux -+#undef PLAT_s390x_linux -+ - - #if defined(_AIX) && defined(__64BIT__) - # define PLAT_ppc64_aix5 1 -@@ -139,6 +141,8 @@ - # define PLAT_ppc64_linux 1 - #elif defined(__linux__) && defined(__arm__) - # define PLAT_arm_linux 1 -+#elif defined(__linux__) && defined(__s390__) && defined(__s390x__) -+# define PLAT_s390x_linux 1 - #else - /* If we're not compiling for our target platform, don't generate - any inline asms. */ -@@ -695,6 +699,75 @@ - - #endif /* PLAT_ppc64_aix5 */ - -+/* ------------------------ s390x-linux ------------------------ */ -+ -+#if defined(PLAT_s390x_linux) -+ -+typedef -+ struct { -+ unsigned long long int nraddr; /* where's the code? */ -+ } -+ OrigFn; -+ -+/* __SPECIAL_INSTRUCTION_PREAMBLE will be used to identify Valgrind specific -+ * code. This detection is implemented in platform specific toIR.c -+ * (e.g. VEX/priv/guest_s390_decoder.c). -+ */ -+#define __SPECIAL_INSTRUCTION_PREAMBLE \ -+ "lr 15,15\n\t" \ -+ "lr 1,1\n\t" \ -+ "lr 2,2\n\t" \ -+ "lr 3,3\n\t" -+ -+#define __CLIENT_REQUEST_CODE "lr 2,2\n\t" -+#define __GET_NR_CONTEXT_CODE "lr 3,3\n\t" -+#define __CALL_NO_REDIR_CODE "lr 4,4\n\t" -+ -+#define VALGRIND_DO_CLIENT_REQUEST( \ -+ _zzq_rlval, _zzq_default, _zzq_request, \ -+ _zzq_arg1, _zzq_arg2, _zzq_arg3, _zzq_arg4, _zzq_arg5) \ -+ { volatile unsigned long long int _zzq_args[6]; \ -+ volatile unsigned long long int _zzq_result; \ -+ _zzq_args[0] = (unsigned long long int)(_zzq_request); \ -+ _zzq_args[1] = (unsigned long long int)(_zzq_arg1); \ -+ _zzq_args[2] = (unsigned long long int)(_zzq_arg2); \ -+ _zzq_args[3] = (unsigned long long int)(_zzq_arg3); \ -+ _zzq_args[4] = (unsigned long long int)(_zzq_arg4); \ -+ _zzq_args[5] = (unsigned long long int)(_zzq_arg5); \ -+ __asm__ volatile(/* r2 = args */ \ -+ "lgr 2,%1\n\t" \ -+ /* r3 = default */ \ -+ "lgr 3,%2\n\t" \ -+ __SPECIAL_INSTRUCTION_PREAMBLE \ -+ __CLIENT_REQUEST_CODE \ -+ /* results = r3 */ \ -+ "lgr %0, 3\n\t" \ -+ : "=d" (_zzq_result) \ -+ : "a" (&_zzq_args[0]), "0" (_zzq_default) \ -+ : "cc", "2", "3", "memory" \ -+ ); \ -+ _zzq_rlval = _zzq_result; \ -+ } -+ -+#define VALGRIND_GET_NR_CONTEXT(_zzq_rlval) \ -+ { volatile OrigFn* _zzq_orig = &(_zzq_rlval); \ -+ volatile unsigned long long int __addr; \ -+ __asm__ volatile(__SPECIAL_INSTRUCTION_PREAMBLE \ -+ __GET_NR_CONTEXT_CODE \ -+ "lgr %0, 3\n\t" \ -+ : "=a" (__addr) \ -+ : \ -+ : "cc", "3", "memory" \ -+ ); \ -+ _zzq_orig->nraddr = __addr; \ -+ } -+ -+#define VALGRIND_CALL_NOREDIR_R1 \ -+ __SPECIAL_INSTRUCTION_PREAMBLE \ -+ __CALL_NO_REDIR_CODE -+ -+#endif /* PLAT_s390x_linux */ -+ - /* Insert assembly code for other platforms here... */ - - #endif /* NVALGRIND */ -@@ -4248,6 +4321,484 @@ - - #endif /* PLAT_ppc64_aix5 */ - -+/* ------------------------- s390x-linux ------------------------- */ -+ -+#if defined(PLAT_s390x_linux) -+ -+/* Similar workaround as amd64 (see above), but we use r11 as frame -+ pointer and save the old r11 in r7. r11 might be used for -+ argvec, therefore we copy argvec in r1 since r1 is clobbered -+ after the call anyway. */ -+#if defined(__GNUC__) && defined(__GCC_HAVE_DWARF2_CFI_ASM) -+# define __FRAME_POINTER \ -+ ,"d"(__builtin_dwarf_cfa()) -+# define VALGRIND_CFI_PROLOGUE \ -+ ".cfi_remember_state\n\t" \ -+ "lgr 1,%1\n\t" /* copy the argvec pointer in r1 */ \ -+ "lgr 7,11\n\t" \ -+ "lgr 11,%2\n\t" \ -+ ".cfi_def_cfa r11, 0\n\t" -+# define VALGRIND_CFI_EPILOGUE \ -+ "lgr 11, 7\n\t" \ -+ ".cfi_restore_state\n\t" -+#else -+# define __FRAME_POINTER -+# define VALGRIND_CFI_PROLOGUE \ -+ "lgr 1,%1\n\t" -+# define VALGRIND_CFI_EPILOGUE -+#endif -+ -+ -+ -+ -+/* These regs are trashed by the hidden call. Note that we overwrite -+ r14 in s390_irgen_noredir (VEX/priv/guest_s390_irgen.c) to give the -+ function a proper return address. All others are ABI defined call -+ clobbers. */ -+#define __CALLER_SAVED_REGS "0","1","2","3","4","5","14", \ -+ "f0","f1","f2","f3","f4","f5","f6","f7" -+ -+ -+#define CALL_FN_W_v(lval, orig) \ -+ do { \ -+ volatile OrigFn _orig = (orig); \ -+ volatile unsigned long _argvec[1]; \ -+ volatile unsigned long _res; \ -+ _argvec[0] = (unsigned long)_orig.nraddr; \ -+ __asm__ volatile( \ -+ VALGRIND_CFI_PROLOGUE \ -+ "aghi 15,-160\n\t" \ -+ "lg 1, 0(1)\n\t" /* target->r1 */ \ -+ VALGRIND_CALL_NOREDIR_R1 \ -+ "lgr %0, 2\n\t" \ -+ "aghi 15,160\n\t" \ -+ VALGRIND_CFI_EPILOGUE \ -+ : /*out*/ "=d" (_res) \ -+ : /*in*/ "d" (&_argvec[0]) __FRAME_POINTER \ -+ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS,"7" \ -+ ); \ -+ lval = (__typeof__(lval)) _res; \ -+ } while (0) -+ -+/* The call abi has the arguments in r2-r6 and stack */ -+#define CALL_FN_W_W(lval, orig, arg1) \ -+ do { \ -+ volatile OrigFn _orig = (orig); \ -+ volatile unsigned long _argvec[2]; \ -+ volatile unsigned long _res; \ -+ _argvec[0] = (unsigned long)_orig.nraddr; \ -+ _argvec[1] = (unsigned long)arg1; \ -+ __asm__ volatile( \ -+ VALGRIND_CFI_PROLOGUE \ -+ "aghi 15,-160\n\t" \ -+ "lg 2, 8(1)\n\t" \ -+ "lg 1, 0(1)\n\t" \ -+ VALGRIND_CALL_NOREDIR_R1 \ -+ "lgr %0, 2\n\t" \ -+ "aghi 15,160\n\t" \ -+ VALGRIND_CFI_EPILOGUE \ -+ : /*out*/ "=d" (_res) \ -+ : /*in*/ "a" (&_argvec[0]) __FRAME_POINTER \ -+ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS,"7" \ -+ ); \ -+ lval = (__typeof__(lval)) _res; \ -+ } while (0) -+ -+#define CALL_FN_W_WW(lval, orig, arg1, arg2) \ -+ do { \ -+ volatile OrigFn _orig = (orig); \ -+ volatile unsigned long _argvec[3]; \ -+ volatile unsigned long _res; \ -+ _argvec[0] = (unsigned long)_orig.nraddr; \ -+ _argvec[1] = (unsigned long)arg1; \ -+ _argvec[2] = (unsigned long)arg2; \ -+ __asm__ volatile( \ -+ VALGRIND_CFI_PROLOGUE \ -+ "aghi 15,-160\n\t" \ -+ "lg 2, 8(1)\n\t" \ -+ "lg 3,16(1)\n\t" \ -+ "lg 1, 0(1)\n\t" \ -+ VALGRIND_CALL_NOREDIR_R1 \ -+ "lgr %0, 2\n\t" \ -+ "aghi 15,160\n\t" \ -+ VALGRIND_CFI_EPILOGUE \ -+ : /*out*/ "=d" (_res) \ -+ : /*in*/ "a" (&_argvec[0]) __FRAME_POINTER \ -+ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS,"7" \ -+ ); \ -+ lval = (__typeof__(lval)) _res; \ -+ } while (0) -+ -+#define CALL_FN_W_WWW(lval, orig, arg1, arg2, arg3) \ -+ do { \ -+ volatile OrigFn _orig = (orig); \ -+ volatile unsigned long _argvec[4]; \ -+ volatile unsigned long _res; \ -+ _argvec[0] = (unsigned long)_orig.nraddr; \ -+ _argvec[1] = (unsigned long)arg1; \ -+ _argvec[2] = (unsigned long)arg2; \ -+ _argvec[3] = (unsigned long)arg3; \ -+ __asm__ volatile( \ -+ VALGRIND_CFI_PROLOGUE \ -+ "aghi 15,-160\n\t" \ -+ "lg 2, 8(1)\n\t" \ -+ "lg 3,16(1)\n\t" \ -+ "lg 4,24(1)\n\t" \ -+ "lg 1, 0(1)\n\t" \ -+ VALGRIND_CALL_NOREDIR_R1 \ -+ "lgr %0, 2\n\t" \ -+ "aghi 15,160\n\t" \ -+ VALGRIND_CFI_EPILOGUE \ -+ : /*out*/ "=d" (_res) \ -+ : /*in*/ "a" (&_argvec[0]) __FRAME_POINTER \ -+ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS,"7" \ -+ ); \ -+ lval = (__typeof__(lval)) _res; \ -+ } while (0) -+ -+#define CALL_FN_W_WWWW(lval, orig, arg1, arg2, arg3, arg4) \ -+ do { \ -+ volatile OrigFn _orig = (orig); \ -+ volatile unsigned long _argvec[5]; \ -+ volatile unsigned long _res; \ -+ _argvec[0] = (unsigned long)_orig.nraddr; \ -+ _argvec[1] = (unsigned long)arg1; \ -+ _argvec[2] = (unsigned long)arg2; \ -+ _argvec[3] = (unsigned long)arg3; \ -+ _argvec[4] = (unsigned long)arg4; \ -+ __asm__ volatile( \ -+ VALGRIND_CFI_PROLOGUE \ -+ "aghi 15,-160\n\t" \ -+ "lg 2, 8(1)\n\t" \ -+ "lg 3,16(1)\n\t" \ -+ "lg 4,24(1)\n\t" \ -+ "lg 5,32(1)\n\t" \ -+ "lg 1, 0(1)\n\t" \ -+ VALGRIND_CALL_NOREDIR_R1 \ -+ "lgr %0, 2\n\t" \ -+ "aghi 15,160\n\t" \ -+ VALGRIND_CFI_EPILOGUE \ -+ : /*out*/ "=d" (_res) \ -+ : /*in*/ "a" (&_argvec[0]) __FRAME_POINTER \ -+ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS,"7" \ -+ ); \ -+ lval = (__typeof__(lval)) _res; \ -+ } while (0) -+ -+#define CALL_FN_W_5W(lval, orig, arg1, arg2, arg3, arg4, arg5) \ -+ do { \ -+ volatile OrigFn _orig = (orig); \ -+ volatile unsigned long _argvec[6]; \ -+ volatile unsigned long _res; \ -+ _argvec[0] = (unsigned long)_orig.nraddr; \ -+ _argvec[1] = (unsigned long)arg1; \ -+ _argvec[2] = (unsigned long)arg2; \ -+ _argvec[3] = (unsigned long)arg3; \ -+ _argvec[4] = (unsigned long)arg4; \ -+ _argvec[5] = (unsigned long)arg5; \ -+ __asm__ volatile( \ -+ VALGRIND_CFI_PROLOGUE \ -+ "aghi 15,-160\n\t" \ -+ "lg 2, 8(1)\n\t" \ -+ "lg 3,16(1)\n\t" \ -+ "lg 4,24(1)\n\t" \ -+ "lg 5,32(1)\n\t" \ -+ "lg 6,40(1)\n\t" \ -+ "lg 1, 0(1)\n\t" \ -+ VALGRIND_CALL_NOREDIR_R1 \ -+ "lgr %0, 2\n\t" \ -+ "aghi 15,160\n\t" \ -+ VALGRIND_CFI_EPILOGUE \ -+ : /*out*/ "=d" (_res) \ -+ : /*in*/ "a" (&_argvec[0]) __FRAME_POINTER \ -+ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS,"6","7" \ -+ ); \ -+ lval = (__typeof__(lval)) _res; \ -+ } while (0) -+ -+#define CALL_FN_W_6W(lval, orig, arg1, arg2, arg3, arg4, arg5, \ -+ arg6) \ -+ do { \ -+ volatile OrigFn _orig = (orig); \ -+ volatile unsigned long _argvec[7]; \ -+ volatile unsigned long _res; \ -+ _argvec[0] = (unsigned long)_orig.nraddr; \ -+ _argvec[1] = (unsigned long)arg1; \ -+ _argvec[2] = (unsigned long)arg2; \ -+ _argvec[3] = (unsigned long)arg3; \ -+ _argvec[4] = (unsigned long)arg4; \ -+ _argvec[5] = (unsigned long)arg5; \ -+ _argvec[6] = (unsigned long)arg6; \ -+ __asm__ volatile( \ -+ VALGRIND_CFI_PROLOGUE \ -+ "aghi 15,-168\n\t" \ -+ "lg 2, 8(1)\n\t" \ -+ "lg 3,16(1)\n\t" \ -+ "lg 4,24(1)\n\t" \ -+ "lg 5,32(1)\n\t" \ -+ "lg 6,40(1)\n\t" \ -+ "mvc 160(8,15), 48(1)\n\t" \ -+ "lg 1, 0(1)\n\t" \ -+ VALGRIND_CALL_NOREDIR_R1 \ -+ "lgr %0, 2\n\t" \ -+ "aghi 15,168\n\t" \ -+ VALGRIND_CFI_EPILOGUE \ -+ : /*out*/ "=d" (_res) \ -+ : /*in*/ "a" (&_argvec[0]) __FRAME_POINTER \ -+ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS,"6","7" \ -+ ); \ -+ lval = (__typeof__(lval)) _res; \ -+ } while (0) -+ -+#define CALL_FN_W_7W(lval, orig, arg1, arg2, arg3, arg4, arg5, \ -+ arg6, arg7) \ -+ do { \ -+ volatile OrigFn _orig = (orig); \ -+ volatile unsigned long _argvec[8]; \ -+ volatile unsigned long _res; \ -+ _argvec[0] = (unsigned long)_orig.nraddr; \ -+ _argvec[1] = (unsigned long)arg1; \ -+ _argvec[2] = (unsigned long)arg2; \ -+ _argvec[3] = (unsigned long)arg3; \ -+ _argvec[4] = (unsigned long)arg4; \ -+ _argvec[5] = (unsigned long)arg5; \ -+ _argvec[6] = (unsigned long)arg6; \ -+ _argvec[7] = (unsigned long)arg7; \ -+ __asm__ volatile( \ -+ VALGRIND_CFI_PROLOGUE \ -+ "aghi 15,-176\n\t" \ -+ "lg 2, 8(1)\n\t" \ -+ "lg 3,16(1)\n\t" \ -+ "lg 4,24(1)\n\t" \ -+ "lg 5,32(1)\n\t" \ -+ "lg 6,40(1)\n\t" \ -+ "mvc 160(8,15), 48(1)\n\t" \ -+ "mvc 168(8,15), 56(1)\n\t" \ -+ "lg 1, 0(1)\n\t" \ -+ VALGRIND_CALL_NOREDIR_R1 \ -+ "lgr %0, 2\n\t" \ -+ "aghi 15,176\n\t" \ -+ VALGRIND_CFI_EPILOGUE \ -+ : /*out*/ "=d" (_res) \ -+ : /*in*/ "a" (&_argvec[0]) __FRAME_POINTER \ -+ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS,"6","7" \ -+ ); \ -+ lval = (__typeof__(lval)) _res; \ -+ } while (0) -+ -+#define CALL_FN_W_8W(lval, orig, arg1, arg2, arg3, arg4, arg5, \ -+ arg6, arg7 ,arg8) \ -+ do { \ -+ volatile OrigFn _orig = (orig); \ -+ volatile unsigned long _argvec[9]; \ -+ volatile unsigned long _res; \ -+ _argvec[0] = (unsigned long)_orig.nraddr; \ -+ _argvec[1] = (unsigned long)arg1; \ -+ _argvec[2] = (unsigned long)arg2; \ -+ _argvec[3] = (unsigned long)arg3; \ -+ _argvec[4] = (unsigned long)arg4; \ -+ _argvec[5] = (unsigned long)arg5; \ -+ _argvec[6] = (unsigned long)arg6; \ -+ _argvec[7] = (unsigned long)arg7; \ -+ _argvec[8] = (unsigned long)arg8; \ -+ __asm__ volatile( \ -+ VALGRIND_CFI_PROLOGUE \ -+ "aghi 15,-184\n\t" \ -+ "lg 2, 8(1)\n\t" \ -+ "lg 3,16(1)\n\t" \ -+ "lg 4,24(1)\n\t" \ -+ "lg 5,32(1)\n\t" \ -+ "lg 6,40(1)\n\t" \ -+ "mvc 160(8,15), 48(1)\n\t" \ -+ "mvc 168(8,15), 56(1)\n\t" \ -+ "mvc 176(8,15), 64(1)\n\t" \ -+ "lg 1, 0(1)\n\t" \ -+ VALGRIND_CALL_NOREDIR_R1 \ -+ "lgr %0, 2\n\t" \ -+ "aghi 15,184\n\t" \ -+ VALGRIND_CFI_EPILOGUE \ -+ : /*out*/ "=d" (_res) \ -+ : /*in*/ "a" (&_argvec[0]) __FRAME_POINTER \ -+ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS,"6","7" \ -+ ); \ -+ lval = (__typeof__(lval)) _res; \ -+ } while (0) -+ -+#define CALL_FN_W_9W(lval, orig, arg1, arg2, arg3, arg4, arg5, \ -+ arg6, arg7 ,arg8, arg9) \ -+ do { \ -+ volatile OrigFn _orig = (orig); \ -+ volatile unsigned long _argvec[10]; \ -+ volatile unsigned long _res; \ -+ _argvec[0] = (unsigned long)_orig.nraddr; \ -+ _argvec[1] = (unsigned long)arg1; \ -+ _argvec[2] = (unsigned long)arg2; \ -+ _argvec[3] = (unsigned long)arg3; \ -+ _argvec[4] = (unsigned long)arg4; \ -+ _argvec[5] = (unsigned long)arg5; \ -+ _argvec[6] = (unsigned long)arg6; \ -+ _argvec[7] = (unsigned long)arg7; \ -+ _argvec[8] = (unsigned long)arg8; \ -+ _argvec[9] = (unsigned long)arg9; \ -+ __asm__ volatile( \ -+ VALGRIND_CFI_PROLOGUE \ -+ "aghi 15,-192\n\t" \ -+ "lg 2, 8(1)\n\t" \ -+ "lg 3,16(1)\n\t" \ -+ "lg 4,24(1)\n\t" \ -+ "lg 5,32(1)\n\t" \ -+ "lg 6,40(1)\n\t" \ -+ "mvc 160(8,15), 48(1)\n\t" \ -+ "mvc 168(8,15), 56(1)\n\t" \ -+ "mvc 176(8,15), 64(1)\n\t" \ -+ "mvc 184(8,15), 72(1)\n\t" \ -+ "lg 1, 0(1)\n\t" \ -+ VALGRIND_CALL_NOREDIR_R1 \ -+ "lgr %0, 2\n\t" \ -+ "aghi 15,192\n\t" \ -+ VALGRIND_CFI_EPILOGUE \ -+ : /*out*/ "=d" (_res) \ -+ : /*in*/ "a" (&_argvec[0]) __FRAME_POINTER \ -+ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS,"6","7" \ -+ ); \ -+ lval = (__typeof__(lval)) _res; \ -+ } while (0) -+ -+#define CALL_FN_W_10W(lval, orig, arg1, arg2, arg3, arg4, arg5, \ -+ arg6, arg7 ,arg8, arg9, arg10) \ -+ do { \ -+ volatile OrigFn _orig = (orig); \ -+ volatile unsigned long _argvec[11]; \ -+ volatile unsigned long _res; \ -+ _argvec[0] = (unsigned long)_orig.nraddr; \ -+ _argvec[1] = (unsigned long)arg1; \ -+ _argvec[2] = (unsigned long)arg2; \ -+ _argvec[3] = (unsigned long)arg3; \ -+ _argvec[4] = (unsigned long)arg4; \ -+ _argvec[5] = (unsigned long)arg5; \ -+ _argvec[6] = (unsigned long)arg6; \ -+ _argvec[7] = (unsigned long)arg7; \ -+ _argvec[8] = (unsigned long)arg8; \ -+ _argvec[9] = (unsigned long)arg9; \ -+ _argvec[10] = (unsigned long)arg10; \ -+ __asm__ volatile( \ -+ VALGRIND_CFI_PROLOGUE \ -+ "aghi 15,-200\n\t" \ -+ "lg 2, 8(1)\n\t" \ -+ "lg 3,16(1)\n\t" \ -+ "lg 4,24(1)\n\t" \ -+ "lg 5,32(1)\n\t" \ -+ "lg 6,40(1)\n\t" \ -+ "mvc 160(8,15), 48(1)\n\t" \ -+ "mvc 168(8,15), 56(1)\n\t" \ -+ "mvc 176(8,15), 64(1)\n\t" \ -+ "mvc 184(8,15), 72(1)\n\t" \ -+ "mvc 192(8,15), 80(1)\n\t" \ -+ "lg 1, 0(1)\n\t" \ -+ VALGRIND_CALL_NOREDIR_R1 \ -+ "lgr %0, 2\n\t" \ -+ "aghi 15,200\n\t" \ -+ VALGRIND_CFI_EPILOGUE \ -+ : /*out*/ "=d" (_res) \ -+ : /*in*/ "a" (&_argvec[0]) __FRAME_POINTER \ -+ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS,"6","7" \ -+ ); \ -+ lval = (__typeof__(lval)) _res; \ -+ } while (0) -+ -+#define CALL_FN_W_11W(lval, orig, arg1, arg2, arg3, arg4, arg5, \ -+ arg6, arg7 ,arg8, arg9, arg10, arg11) \ -+ do { \ -+ volatile OrigFn _orig = (orig); \ -+ volatile unsigned long _argvec[12]; \ -+ volatile unsigned long _res; \ -+ _argvec[0] = (unsigned long)_orig.nraddr; \ -+ _argvec[1] = (unsigned long)arg1; \ -+ _argvec[2] = (unsigned long)arg2; \ -+ _argvec[3] = (unsigned long)arg3; \ -+ _argvec[4] = (unsigned long)arg4; \ -+ _argvec[5] = (unsigned long)arg5; \ -+ _argvec[6] = (unsigned long)arg6; \ -+ _argvec[7] = (unsigned long)arg7; \ -+ _argvec[8] = (unsigned long)arg8; \ -+ _argvec[9] = (unsigned long)arg9; \ -+ _argvec[10] = (unsigned long)arg10; \ -+ _argvec[11] = (unsigned long)arg11; \ -+ __asm__ volatile( \ -+ VALGRIND_CFI_PROLOGUE \ -+ "aghi 15,-208\n\t" \ -+ "lg 2, 8(1)\n\t" \ -+ "lg 3,16(1)\n\t" \ -+ "lg 4,24(1)\n\t" \ -+ "lg 5,32(1)\n\t" \ -+ "lg 6,40(1)\n\t" \ -+ "mvc 160(8,15), 48(1)\n\t" \ -+ "mvc 168(8,15), 56(1)\n\t" \ -+ "mvc 176(8,15), 64(1)\n\t" \ -+ "mvc 184(8,15), 72(1)\n\t" \ -+ "mvc 192(8,15), 80(1)\n\t" \ -+ "mvc 200(8,15), 88(1)\n\t" \ -+ "lg 1, 0(1)\n\t" \ -+ VALGRIND_CALL_NOREDIR_R1 \ -+ "lgr %0, 2\n\t" \ -+ "aghi 15,208\n\t" \ -+ VALGRIND_CFI_EPILOGUE \ -+ : /*out*/ "=d" (_res) \ -+ : /*in*/ "a" (&_argvec[0]) __FRAME_POINTER \ -+ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS,"6","7" \ -+ ); \ -+ lval = (__typeof__(lval)) _res; \ -+ } while (0) -+ -+#define CALL_FN_W_12W(lval, orig, arg1, arg2, arg3, arg4, arg5, \ -+ arg6, arg7 ,arg8, arg9, arg10, arg11, arg12)\ -+ do { \ -+ volatile OrigFn _orig = (orig); \ -+ volatile unsigned long _argvec[13]; \ -+ volatile unsigned long _res; \ -+ _argvec[0] = (unsigned long)_orig.nraddr; \ -+ _argvec[1] = (unsigned long)arg1; \ -+ _argvec[2] = (unsigned long)arg2; \ -+ _argvec[3] = (unsigned long)arg3; \ -+ _argvec[4] = (unsigned long)arg4; \ -+ _argvec[5] = (unsigned long)arg5; \ -+ _argvec[6] = (unsigned long)arg6; \ -+ _argvec[7] = (unsigned long)arg7; \ -+ _argvec[8] = (unsigned long)arg8; \ -+ _argvec[9] = (unsigned long)arg9; \ -+ _argvec[10] = (unsigned long)arg10; \ -+ _argvec[11] = (unsigned long)arg11; \ -+ _argvec[12] = (unsigned long)arg12; \ -+ __asm__ volatile( \ -+ VALGRIND_CFI_PROLOGUE \ -+ "aghi 15,-216\n\t" \ -+ "lg 2, 8(1)\n\t" \ -+ "lg 3,16(1)\n\t" \ -+ "lg 4,24(1)\n\t" \ -+ "lg 5,32(1)\n\t" \ -+ "lg 6,40(1)\n\t" \ -+ "mvc 160(8,15), 48(1)\n\t" \ -+ "mvc 168(8,15), 56(1)\n\t" \ -+ "mvc 176(8,15), 64(1)\n\t" \ -+ "mvc 184(8,15), 72(1)\n\t" \ -+ "mvc 192(8,15), 80(1)\n\t" \ -+ "mvc 200(8,15), 88(1)\n\t" \ -+ "mvc 208(8,15), 96(1)\n\t" \ -+ "lg 1, 0(1)\n\t" \ -+ VALGRIND_CALL_NOREDIR_R1 \ -+ "lgr %0, 2\n\t" \ -+ "aghi 15,216\n\t" \ -+ VALGRIND_CFI_EPILOGUE \ -+ : /*out*/ "=d" (_res) \ -+ : /*in*/ "a" (&_argvec[0]) __FRAME_POINTER \ -+ : /*trash*/ "cc", "memory", __CALLER_SAVED_REGS,"6","7" \ -+ ); \ -+ lval = (__typeof__(lval)) _res; \ -+ } while (0) -+ -+ -+#endif /* PLAT_s390x_linux */ -+ - - /* ------------------------------------------------------------------ */ - /* ARCHITECTURE INDEPENDENT MACROS for CLIENT REQUESTS. */ -@@ -4786,6 +5337,7 @@ - #undef PLAT_ppc32_linux - #undef PLAT_ppc64_linux - #undef PLAT_arm_linux -+#undef PLAT_s390x_linux - #undef PLAT_ppc32_aix5 - #undef PLAT_ppc64_aix5 - ---- include/vki/vki-linux.h -+++ include/vki/vki-linux.h -@@ -89,6 +89,8 @@ - # include "vki-posixtypes-ppc64-linux.h" - #elif defined(VGA_arm) - # include "vki-posixtypes-arm-linux.h" -+#elif defined(VGA_s390x) -+# include "vki-posixtypes-s390x-linux.h" - #else - # error Unknown platform - #endif -@@ -201,6 +203,8 @@ - # include "vki-ppc64-linux.h" - #elif defined(VGA_arm) - # include "vki-arm-linux.h" -+#elif defined(VGA_s390x) -+# include "vki-s390x-linux.h" - #else - # error Unknown platform - #endif ---- include/vki/vki-posixtypes-s390x-linux.h -+++ include/vki/vki-posixtypes-s390x-linux.h -@@ -0,0 +1,77 @@ -+ -+/*--------------------------------------------------------------------*/ -+/*--- s390x/Linux-specific kernel interface: posix types. ---*/ -+/*--- vki-posixtypes-s390x-linux.h ---*/ -+/*--------------------------------------------------------------------*/ -+ -+/* -+ This file is part of Valgrind, a dynamic binary instrumentation -+ framework. -+ -+ Copyright IBM Corp. 2010 -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA -+ 02111-1307, USA. -+ -+ The GNU General Public License is contained in the file COPYING. -+*/ -+ -+/* Contributed by Florian Krohm and Volker Sameske */ -+ -+#ifndef __VKI_POSIXTYPES_S390X_LINUX_H -+#define __VKI_POSIXTYPES_S390X_LINUX_H -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.16.60/include/asm-s390/posix_types.h -+//---------------------------------------------------------------------- -+ -+typedef long __vki_kernel_off_t; -+typedef int __vki_kernel_pid_t; -+typedef unsigned long __vki_kernel_size_t; -+typedef long __vki_kernel_time_t; -+typedef long __vki_kernel_suseconds_t; -+typedef long __vki_kernel_clock_t; -+typedef int __vki_kernel_timer_t; -+typedef int __vki_kernel_clockid_t; -+typedef int __vki_kernel_daddr_t; -+typedef char * __vki_kernel_caddr_t; -+typedef unsigned short __vki_kernel_uid16_t; -+typedef unsigned short __vki_kernel_gid16_t; -+typedef long long __vki_kernel_loff_t; -+ -+typedef unsigned int __vki_kernel_ino_t; -+typedef unsigned int __vki_kernel_mode_t; -+typedef unsigned int __vki_kernel_nlink_t; -+typedef int __vki_kernel_ipc_pid_t; -+typedef unsigned int __vki_kernel_uid_t; -+typedef unsigned int __vki_kernel_gid_t; -+typedef long __vki_kernel_ssize_t; -+typedef long __vki_kernel_ptrdiff_t; -+typedef unsigned long __vki_kernel_sigset_t; /* at least 32 bits */ -+typedef __vki_kernel_uid_t __vki_kernel_old_uid_t; -+typedef __vki_kernel_gid_t __vki_kernel_old_gid_t; -+typedef __vki_kernel_uid_t __vki_kernel_uid32_t; -+typedef __vki_kernel_gid_t __vki_kernel_gid32_t; -+typedef unsigned short __vki_kernel_old_dev_t; -+ -+typedef struct { -+ int val[2]; -+} __vki_kernel_fsid_t; -+ -+#endif // __VKI_POSIXTYPES_S390X_LINUX_H -+ -+/*--------------------------------------------------------------------*/ -+/*--- end ---*/ -+/*--------------------------------------------------------------------*/ ---- include/vki/vki-s390x-linux.h -+++ include/vki/vki-s390x-linux.h -@@ -0,0 +1,941 @@ -+ -+/*--------------------------------------------------------------------*/ -+/*--- s390x/Linux-specific kernel interface. vki-s390x-linux.h ---*/ -+/*--------------------------------------------------------------------*/ -+ -+/* -+ This file is part of Valgrind, a dynamic binary instrumentation -+ framework. -+ -+ Copyright IBM Corp. 2010 -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA -+ 02111-1307, USA. -+ -+ The GNU General Public License is contained in the file COPYING. -+*/ -+ -+/* Contributed by Florian Krohm and Volker Sameske */ -+ -+#ifndef __VKI_S390X_LINUX_H -+#define __VKI_S390X_LINUX_H -+ -+#define __force -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.16.60/include/asm-s390/types.h -+//---------------------------------------------------------------------- -+ -+typedef __signed__ char __vki_s8; -+typedef unsigned char __vki_u8; -+ -+typedef __signed__ short __vki_s16; -+typedef unsigned short __vki_u16; -+ -+typedef __signed__ int __vki_s32; -+typedef unsigned int __vki_u32; -+ -+typedef __signed__ long __vki_s64; -+typedef unsigned long __vki_u64; -+ -+typedef unsigned short vki_u16; -+ -+typedef unsigned int vki_u32; -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.16.60/include/asm-s390/page.h -+//---------------------------------------------------------------------- -+ -+/* PAGE_SHIFT determines the page size */ -+#define VKI_PAGE_SHIFT 12 -+#define VKI_PAGE_SIZE (1UL << VKI_PAGE_SHIFT) -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.16.60/include/asm-s390/siginfo.h -+//---------------------------------------------------------------------- -+ -+/* We need that to ensure that sizeof(siginfo) == 128. */ -+#ifdef __s390x__ -+#define __VKI_ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int)) -+#endif -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.16.60/include/asm-s390/sigcontext.h -+//---------------------------------------------------------------------- -+ -+#define __VKI_NUM_GPRS 16 -+#define __VKI_NUM_FPRS 16 -+#define __VKI_NUM_ACRS 16 -+ -+#ifndef VGA_s390x -+ -+/* Has to be at least _NSIG_WORDS from asm/signal.h */ -+#define _VKI_SIGCONTEXT_NSIG 64 -+#define _VKI_SIGCONTEXT_NSIG_BPW 32 -+/* Size of stack frame allocated when calling signal handler. */ -+#define __VKI_SIGNAL_FRAMESIZE 96 -+ -+#else /* VGA_s390x */ -+ -+/* Has to be at least _NSIG_WORDS from asm/signal.h */ -+#define _VKI_SIGCONTEXT_NSIG 64 -+#define _VKI_SIGCONTEXT_NSIG_BPW 64 -+/* Size of stack frame allocated when calling signal handler. */ -+#define __VKI_SIGNAL_FRAMESIZE 160 -+ -+#endif /* VGA_s390x */ -+ -+ -+#define _VKI_SIGCONTEXT_NSIG_WORDS (_VKI_SIGCONTEXT_NSIG / _VKI_SIGCONTEXT_NSIG_BPW) -+#define _VKI_SIGMASK_COPY_SIZE (sizeof(unsigned long)*_VKI_SIGCONTEXT_NSIG_WORDS) -+ -+typedef struct -+{ -+ unsigned long mask; -+ unsigned long addr; -+} __attribute__ ((aligned(8))) _vki_psw_t; -+ -+typedef struct -+{ -+ _vki_psw_t psw; -+ unsigned long gprs[__VKI_NUM_GPRS]; -+ unsigned int acrs[__VKI_NUM_ACRS]; -+} _vki_s390_regs_common; -+ -+typedef struct -+{ -+ unsigned int fpc; -+ double fprs[__VKI_NUM_FPRS]; -+} _vki_s390_fp_regs; -+ -+typedef struct -+{ -+ _vki_s390_regs_common regs; -+ _vki_s390_fp_regs fpregs; -+} _vki_sigregs; -+ -+ -+struct vki_sigcontext -+{ -+ unsigned long oldmask[_VKI_SIGCONTEXT_NSIG_WORDS]; -+ _vki_sigregs __user *sregs; -+}; -+ -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.16.60/include/asm-s390/signal.h -+//---------------------------------------------------------------------- -+ -+#define _VKI_NSIG _VKI_SIGCONTEXT_NSIG -+#define _VKI_NSIG_BPW _VKI_SIGCONTEXT_NSIG_BPW -+#define _VKI_NSIG_WORDS _VKI_SIGCONTEXT_NSIG_WORDS -+ -+typedef unsigned long vki_old_sigset_t; -+ -+typedef struct { -+ unsigned long sig[_VKI_NSIG_WORDS]; -+} vki_sigset_t; -+ -+#define VKI_SIGHUP 1 -+#define VKI_SIGINT 2 -+#define VKI_SIGQUIT 3 -+#define VKI_SIGILL 4 -+#define VKI_SIGTRAP 5 -+#define VKI_SIGABRT 6 -+#define VKI_SIGIOT 6 -+#define VKI_SIGBUS 7 -+#define VKI_SIGFPE 8 -+#define VKI_SIGKILL 9 -+#define VKI_SIGUSR1 10 -+#define VKI_SIGSEGV 11 -+#define VKI_SIGUSR2 12 -+#define VKI_SIGPIPE 13 -+#define VKI_SIGALRM 14 -+#define VKI_SIGTERM 15 -+#define VKI_SIGSTKFLT 16 -+#define VKI_SIGCHLD 17 -+#define VKI_SIGCONT 18 -+#define VKI_SIGSTOP 19 -+#define VKI_SIGTSTP 20 -+#define VKI_SIGTTIN 21 -+#define VKI_SIGTTOU 22 -+#define VKI_SIGURG 23 -+#define VKI_SIGXCPU 24 -+#define VKI_SIGXFSZ 25 -+#define VKI_SIGVTALRM 26 -+#define VKI_SIGPROF 27 -+#define VKI_SIGWINCH 28 -+#define VKI_SIGIO 29 -+#define VKI_SIGPOLL VKI_SIGIO -+/* -+#define VKI_SIGLOST 29 -+*/ -+#define VKI_SIGPWR 30 -+#define VKI_SIGSYS 31 -+#define VKI_SIGUNUSED 31 -+ -+/* These should not be considered constants from userland. */ -+#define VKI_SIGRTMIN 32 -+#define VKI_SIGRTMAX _VKI_NSIG -+ -+/* -+ * SA_FLAGS values: -+ * -+ * SA_ONSTACK indicates that a registered stack_t will be used. -+ * SA_INTERRUPT is a no-op, but left due to historical reasons. Use the -+ * SA_RESTART flag to get restarting signals (which were the default long ago) -+ * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. -+ * SA_RESETHAND clears the handler when the signal is delivered. -+ * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. -+ * SA_NODEFER prevents the current signal from being masked in the handler. -+ * -+ * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single -+ * Unix names RESETHAND and NODEFER respectively. -+ */ -+#define VKI_SA_NOCLDSTOP 0x00000001 -+#define VKI_SA_NOCLDWAIT 0x00000002 -+#define VKI_SA_SIGINFO 0x00000004 -+#define VKI_SA_ONSTACK 0x08000000 -+#define VKI_SA_RESTART 0x10000000 -+#define VKI_SA_NODEFER 0x40000000 -+#define VKI_SA_RESETHAND 0x80000000 -+ -+#define VKI_SA_NOMASK VKI_SA_NODEFER -+#define VKI_SA_ONESHOT VKI_SA_RESETHAND -+#define VKI_SA_INTERRUPT 0x20000000 /* dummy -- ignored */ -+ -+#define VKI_SA_RESTORER 0x04000000 -+ -+/* -+ * sigaltstack controls -+ */ -+#define VKI_SS_ONSTACK 1 -+#define VKI_SS_DISABLE 2 -+ -+#define VKI_MINSIGSTKSZ 2048 -+#define VKI_SIGSTKSZ 8192 -+ -+ -+/* Next lines asm-generic/signal.h */ -+#define VKI_SIG_BLOCK 0 /* for blocking signals */ -+#define VKI_SIG_UNBLOCK 1 /* for unblocking signals */ -+#define VKI_SIG_SETMASK 2 /* for setting the signal mask */ -+ -+typedef void __vki_signalfn_t(int); -+typedef __vki_signalfn_t __user *__vki_sighandler_t; -+ -+/* default signal handling */ -+#define VKI_SIG_DFL ((__force __vki_sighandler_t)0) -+/* ignore signal */ -+#define VKI_SIG_IGN ((__force __vki_sighandler_t)1) -+/* error return from signal */ -+#define VKI_SIG_ERR ((__force __vki_sighandler_t)-1) -+/* Back to asm-s390/signal.h */ -+ -+struct vki_old_sigaction { -+ // [[Nb: a 'k' prefix is added to "sa_handler" because -+ // bits/sigaction.h (which gets dragged in somehow via signal.h) -+ // #defines it as something else. Since that is done for glibc's -+ // purposes, which we don't care about here, we use our own name.]] -+ __vki_sighandler_t ksa_handler; -+ vki_old_sigset_t sa_mask; -+ unsigned long sa_flags; -+ void (*sa_restorer)(void); -+}; -+ -+struct vki_sigaction { -+ // [[See comment about extra 'k' above]] -+ __vki_sighandler_t ksa_handler; -+ unsigned long sa_flags; -+ void (*sa_restorer)(void); -+ vki_sigset_t sa_mask; /* mask last for extensibility */ -+}; -+ -+struct vki_k_sigaction { -+ struct vki_sigaction sa; -+}; -+ -+ -+/* On Linux we use the same type for passing sigactions to -+ and from the kernel. Hence: */ -+typedef struct vki_sigaction vki_sigaction_toK_t; -+typedef struct vki_sigaction vki_sigaction_fromK_t; -+ -+ -+typedef struct vki_sigaltstack { -+ void __user *ss_sp; -+ int ss_flags; -+ vki_size_t ss_size; -+} vki_stack_t; -+ -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.16.60/include/asm-s390/mman.h -+//---------------------------------------------------------------------- -+ -+#define VKI_PROT_NONE 0x0 /* No page permissions */ -+#define VKI_PROT_READ 0x1 /* page can be read */ -+#define VKI_PROT_WRITE 0x2 /* page can be written */ -+#define VKI_PROT_EXEC 0x4 /* page can be executed */ -+#define VKI_PROT_GROWSDOWN 0x01000000 /* mprotect flag: extend -+ change to start of -+ growsdown vma */ -+#define VKI_PROT_GROWSUP 0x02000000 /* mprotect flag: -+ extend change to end -+ of growsup vma */ -+ -+#define VKI_MAP_PRIVATE 0x0002 /* */ -+#define VKI_MAP_FIXED 0x0010 /* */ -+#define VKI_MAP_ANONYMOUS 0x0020 /* */ -+ -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.16.60/include/asm-s390/fcntl.h -+//---------------------------------------------------------------------- -+ -+#define VKI_O_RDONLY 00000000 -+#define VKI_O_WRONLY 00000001 -+#define VKI_O_RDWR 00000002 -+#define VKI_O_ACCMODE 00000003 -+#define VKI_O_CREAT 00000100 /* not fcntl */ -+#define VKI_O_EXCL 00000200 /* not fcntl */ -+#define VKI_O_NOCTTY 00000400 /* not fcntl */ -+#define VKI_O_TRUNC 00001000 /* not fcntl */ -+#define VKI_O_APPEND 00002000 -+ -+#define VKI_AT_FDCWD -100 -+ -+#define VKI_F_DUPFD 0 /* dup */ -+#define VKI_F_GETFD 1 /* get close_on_exec */ -+#define VKI_F_SETFD 2 /* set/clear close_on_exec */ -+#define VKI_F_GETFL 3 /* get file->f_flags */ -+#define VKI_F_SETFL 4 /* set file->f_flags */ -+#define VKI_F_GETLK 5 -+#define VKI_F_SETLK 6 -+#define VKI_F_SETLKW 7 -+#define VKI_F_SETOWN 8 /* for sockets. */ -+#define VKI_F_GETOWN 9 /* for sockets. */ -+#define VKI_F_SETSIG 10 /* for sockets. */ -+#define VKI_F_GETSIG 11 /* for sockets. */ -+ -+#define VKI_FD_CLOEXEC 1 /* actually anything with low bit set goes */ -+ -+#define VKI_F_LINUX_SPECIFIC_BASE 1024 -+ -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.16.60/include/asm-s390x/resource.h -+//---------------------------------------------------------------------- -+ -+// which just does #include -+ -+#define VKI_RLIMIT_DATA 2 /* max data size */ -+#define VKI_RLIMIT_STACK 3 /* max stack size */ -+#define VKI_RLIMIT_CORE 4 /* max core file size */ -+#define VKI_RLIMIT_NOFILE 7 /* max number of open files */ -+ -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.16.60/include/asm-s390/socket.h -+//---------------------------------------------------------------------- -+ -+#define VKI_SOL_SOCKET 1 -+ -+#define VKI_SO_TYPE 3 -+ -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.16.60/include/asm-s390/sockios.h -+//---------------------------------------------------------------------- -+ -+#define VKI_SIOCSPGRP 0x8902 -+#define VKI_SIOCGPGRP 0x8904 -+#define VKI_SIOCGSTAMP 0x8906 /* Get stamp (timeval) */ -+/* since 2.6.22 */ -+#define VKI_SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */ -+ -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.16.60/include/asm-s390/stat.h -+//---------------------------------------------------------------------- -+ -+#ifndef VGA_s390x -+struct vki_stat { -+ unsigned short st_dev; -+ unsigned short __pad1; -+ unsigned long st_ino; -+ unsigned short st_mode; -+ unsigned short st_nlink; -+ unsigned short st_uid; -+ unsigned short st_gid; -+ unsigned short st_rdev; -+ unsigned short __pad2; -+ unsigned long st_size; -+ unsigned long st_blksize; -+ unsigned long st_blocks; -+ unsigned long st_atime; -+ unsigned long st_atime_nsec; -+ unsigned long st_mtime; -+ unsigned long st_mtime_nsec; -+ unsigned long st_ctime; -+ unsigned long st_ctime_nsec; -+ unsigned long __unused4; -+ unsigned long __unused5; -+}; -+ -+/* This matches struct stat64 in glibc2.1, hence the absolutely -+ * insane amounts of padding around dev_t's. -+ */ -+struct vki_stat64 { -+ unsigned long long st_dev; -+ unsigned int __pad1; -+ unsigned long __st_ino; -+ unsigned int st_mode; -+ unsigned int st_nlink; -+ unsigned long st_uid; -+ unsigned long st_gid; -+ unsigned long long st_rdev; -+ unsigned int __pad3; -+ long long st_size; -+ unsigned long st_blksize; -+ unsigned char __pad4[4]; -+ unsigned long __pad5; /* future possible st_blocks high bits */ -+ unsigned long st_blocks; /* Number 512-byte blocks allocated. */ -+ unsigned long st_atime; -+ unsigned long st_atime_nsec; -+ unsigned long st_mtime; -+ unsigned long st_mtime_nsec; -+ unsigned long st_ctime; -+ unsigned long st_ctime_nsec; /* will be high 32 bits of ctime someday */ -+ unsigned long long st_ino; -+}; -+ -+#else -+ -+struct vki_stat { -+ unsigned long st_dev; -+ unsigned long st_ino; -+ unsigned long st_nlink; -+ unsigned int st_mode; -+ unsigned int st_uid; -+ unsigned int st_gid; -+ unsigned int __pad1; -+ unsigned long st_rdev; -+ unsigned long st_size; -+ unsigned long st_atime; -+ unsigned long st_atime_nsec; -+ unsigned long st_mtime; -+ unsigned long st_mtime_nsec; -+ unsigned long st_ctime; -+ unsigned long st_ctime_nsec; -+ unsigned long st_blksize; -+ long st_blocks; -+ unsigned long __unused[3]; -+}; -+ -+#endif /* VGA_s390x */ -+ -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.16.60/include/asm-s390/statfs.h -+//---------------------------------------------------------------------- -+ -+struct vki_statfs { -+ int f_type; -+ int f_bsize; -+ long f_blocks; -+ long f_bfree; -+ long f_bavail; -+ long f_files; -+ long f_ffree; -+ __vki_kernel_fsid_t f_fsid; -+ int f_namelen; -+ int f_frsize; -+ int f_spare[5]; -+}; -+ -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.16.60/include/asm-s390/termios.h -+//---------------------------------------------------------------------- -+ -+struct vki_winsize { -+ unsigned short ws_row; -+ unsigned short ws_col; -+ unsigned short ws_xpixel; -+ unsigned short ws_ypixel; -+}; -+ -+#define VKI_NCC 8 -+struct vki_termio { -+ unsigned short c_iflag; /* input mode flags */ -+ unsigned short c_oflag; /* output mode flags */ -+ unsigned short c_cflag; /* control mode flags */ -+ unsigned short c_lflag; /* local mode flags */ -+ unsigned char c_line; /* line discipline */ -+ unsigned char c_cc[VKI_NCC]; /* control characters */ -+}; -+ -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.16.60/include/asm-s390/termbits.h -+//---------------------------------------------------------------------- -+ -+typedef unsigned char vki_cc_t; -+typedef unsigned int vki_tcflag_t; -+ -+#define VKI_NCCS 19 -+struct vki_termios { -+ vki_tcflag_t c_iflag; /* input mode flags */ -+ vki_tcflag_t c_oflag; /* output mode flags */ -+ vki_tcflag_t c_cflag; /* control mode flags */ -+ vki_tcflag_t c_lflag; /* local mode flags */ -+ vki_cc_t c_line; /* line discipline */ -+ vki_cc_t c_cc[VKI_NCCS]; /* control characters */ -+}; -+ -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.16.60/include/asm-s390/ioctl.h -+//---------------------------------------------------------------------- -+ -+#define _VKI_IOC_NRBITS 8 -+#define _VKI_IOC_TYPEBITS 8 -+#define _VKI_IOC_SIZEBITS 14 -+#define _VKI_IOC_DIRBITS 2 -+ -+#define _VKI_IOC_NRMASK ((1 << _VKI_IOC_NRBITS)-1) -+#define _VKI_IOC_TYPEMASK ((1 << _VKI_IOC_TYPEBITS)-1) -+#define _VKI_IOC_SIZEMASK ((1 << _VKI_IOC_SIZEBITS)-1) -+#define _VKI_IOC_DIRMASK ((1 << _VKI_IOC_DIRBITS)-1) -+ -+#define _VKI_IOC_NRSHIFT 0 -+#define _VKI_IOC_TYPESHIFT (_VKI_IOC_NRSHIFT+_VKI_IOC_NRBITS) -+#define _VKI_IOC_SIZESHIFT (_VKI_IOC_TYPESHIFT+_VKI_IOC_TYPEBITS) -+#define _VKI_IOC_DIRSHIFT (_VKI_IOC_SIZESHIFT+_VKI_IOC_SIZEBITS) -+ -+#define _VKI_IOC_NONE 0U -+#define _VKI_IOC_WRITE 1U -+#define _VKI_IOC_READ 2U -+ -+#define _VKI_IOC(dir,type,nr,size) \ -+ (((dir) << _VKI_IOC_DIRSHIFT) | \ -+ ((type) << _VKI_IOC_TYPESHIFT) | \ -+ ((nr) << _VKI_IOC_NRSHIFT) | \ -+ ((size) << _VKI_IOC_SIZESHIFT)) -+ -+/* used to create numbers */ -+#define _VKI_IO(type,nr) _VKI_IOC(_VKI_IOC_NONE,(type),(nr),0) -+#define _VKI_IOR(type,nr,size) _VKI_IOC(_VKI_IOC_READ,(type),(nr),(_VKI_IOC_TYPECHECK(size))) -+#define _VKI_IOW(type,nr,size) _VKI_IOC(_VKI_IOC_WRITE,(type),(nr),(_VKI_IOC_TYPECHECK(size))) -+#define _VKI_IOWR(type,nr,size) _VKI_IOC(_VKI_IOC_READ|_VKI_IOC_WRITE,(type),(nr),(_VKI_IOC_TYPECHECK(size))) -+ -+/* used to decode ioctl numbers.. */ -+#define _VKI_IOC_DIR(nr) (((nr) >> _VKI_IOC_DIRSHIFT) & _VKI_IOC_DIRMASK) -+#define _VKI_IOC_TYPE(nr) (((nr) >> _VKI_IOC_TYPESHIFT) & _VKI_IOC_TYPEMASK) -+#define _VKI_IOC_NR(nr) (((nr) >> _VKI_IOC_NRSHIFT) & _VKI_IOC_NRMASK) -+#define _VKI_IOC_SIZE(nr) (((nr) >> _VKI_IOC_SIZESHIFT) & _VKI_IOC_SIZEMASK) -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.16.60/include/asm-s390/ioctls.h -+//---------------------------------------------------------------------- -+ -+/* 0x54 is just a magic number to make these relatively unique ('T') */ -+ -+#define VKI_TCGETS 0x5401 -+#define VKI_TCSETS 0x5402 -+#define VKI_TCSETSW 0x5403 -+#define VKI_TCSETSF 0x5404 -+#define VKI_TCGETA 0x5405 -+#define VKI_TCSETA 0x5406 -+#define VKI_TCSETAW 0x5407 -+#define VKI_TCSETAF 0x5408 -+#define VKI_TCSBRK 0x5409 -+#define VKI_TCXONC 0x540A -+#define VKI_TCFLSH 0x540B -+ -+#define VKI_TIOCSCTTY 0x540E -+#define VKI_TIOCGPGRP 0x540F -+#define VKI_TIOCSPGRP 0x5410 -+#define VKI_TIOCOUTQ 0x5411 -+ -+#define VKI_TIOCGWINSZ 0x5413 -+#define VKI_TIOCSWINSZ 0x5414 -+#define VKI_TIOCMGET 0x5415 -+#define VKI_TIOCMBIS 0x5416 -+#define VKI_TIOCMBIC 0x5417 -+#define VKI_TIOCMSET 0x5418 -+ -+#define VKI_FIONREAD 0x541B -+#define VKI_TIOCLINUX 0x541C -+ -+#define VKI_FIONBIO 0x5421 -+ -+#define VKI_TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */ -+ -+#define VKI_TIOCGPTN _VKI_IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ -+#define VKI_TIOCSPTLCK _VKI_IOW('T',0x31, int) /* Lock/unlock Pty */ -+ -+#define VKI_FIOASYNC 0x5452 -+ -+#define VKI_TIOCSERGETLSR 0x5459 /* Get line status register */ -+ -+#define VKI_TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ -+ -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.16.60/include/asm-s390/poll.h -+//---------------------------------------------------------------------- -+ -+struct vki_pollfd { -+ int fd; -+ short events; -+ short revents; -+}; -+ -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.16.60/include/asm-s390/ptrace.h -+//---------------------------------------------------------------------- -+#define VKI_NUM_GPRS 16 -+#define VKI_NUM_FPRS 16 -+#define VKI_NUM_CRS 16 -+#define VKI_NUM_ACRS 16 -+ -+typedef union -+{ -+ float f; -+ double d; -+ __vki_u64 ui; -+ struct -+ { -+ __vki_u32 hi; -+ __vki_u32 lo; -+ } fp; -+} vki_freg_t; -+ -+typedef struct -+{ -+ __vki_u32 fpc; -+ vki_freg_t fprs[VKI_NUM_FPRS]; -+} vki_s390_fp_regs; -+ -+typedef struct -+{ -+ unsigned long mask; -+ unsigned long addr; -+} __attribute__ ((aligned(8))) vki_psw_t; -+ -+typedef struct -+{ -+ vki_psw_t psw; -+ unsigned long gprs[VKI_NUM_GPRS]; -+ unsigned int acrs[VKI_NUM_ACRS]; -+ unsigned long orig_gpr2; -+} vki_s390_regs; -+ -+/* -+ * Now for the program event recording (trace) definitions. -+ */ -+typedef struct -+{ -+ unsigned long cr[3]; -+} vki_per_cr_words; -+ -+typedef struct -+{ -+#ifdef VGA_s390x -+ unsigned : 32; -+#endif /* VGA_s390x */ -+ unsigned em_branching : 1; -+ unsigned em_instruction_fetch : 1; -+ /* -+ * Switching on storage alteration automatically fixes -+ * the storage alteration event bit in the users std. -+ */ -+ unsigned em_storage_alteration : 1; -+ unsigned em_gpr_alt_unused : 1; -+ unsigned em_store_real_address : 1; -+ unsigned : 3; -+ unsigned branch_addr_ctl : 1; -+ unsigned : 1; -+ unsigned storage_alt_space_ctl : 1; -+ unsigned : 21; -+ unsigned long starting_addr; -+ unsigned long ending_addr; -+} vki_per_cr_bits; -+ -+typedef struct -+{ -+ unsigned short perc_atmid; -+ unsigned long address; -+ unsigned char access_id; -+} vki_per_lowcore_words; -+ -+typedef struct -+{ -+ unsigned perc_branching : 1; -+ unsigned perc_instruction_fetch : 1; -+ unsigned perc_storage_alteration : 1; -+ unsigned perc_gpr_alt_unused : 1; -+ unsigned perc_store_real_address : 1; -+ unsigned : 3; -+ unsigned atmid_psw_bit_31 : 1; -+ unsigned atmid_validity_bit : 1; -+ unsigned atmid_psw_bit_32 : 1; -+ unsigned atmid_psw_bit_5 : 1; -+ unsigned atmid_psw_bit_16 : 1; -+ unsigned atmid_psw_bit_17 : 1; -+ unsigned si : 2; -+ unsigned long address; -+ unsigned : 4; -+ unsigned access_id : 4; -+} vki_per_lowcore_bits; -+ -+typedef struct -+{ -+ union { -+ vki_per_cr_words words; -+ vki_per_cr_bits bits; -+ } control_regs; -+ /* -+ * Use these flags instead of setting em_instruction_fetch -+ * directly they are used so that single stepping can be -+ * switched on & off while not affecting other tracing -+ */ -+ unsigned single_step : 1; -+ unsigned instruction_fetch : 1; -+ unsigned : 30; -+ /* -+ * These addresses are copied into cr10 & cr11 if single -+ * stepping is switched off -+ */ -+ unsigned long starting_addr; -+ unsigned long ending_addr; -+ union { -+ vki_per_lowcore_words words; -+ vki_per_lowcore_bits bits; -+ } lowcore; -+} vki_per_struct; -+ -+/* -+ * The user_regs_struct defines the way the user registers are -+ * store on the stack for signal handling. -+ */ -+struct vki_user_regs_struct -+{ -+ vki_psw_t psw; -+ unsigned long gprs[VKI_NUM_GPRS]; -+ unsigned int acrs[VKI_NUM_ACRS]; -+ unsigned long orig_gpr2; -+ vki_s390_fp_regs fp_regs; -+ /* -+ * These per registers are in here so that gdb can modify them -+ * itself as there is no "official" ptrace interface for hardware -+ * watchpoints. This is the way intel does it. -+ */ -+ vki_per_struct per_info; -+ unsigned long ieee_instruction_pointer; -+ /* Used to give failing instruction back to user for ieee exceptions */ -+}; -+ -+typedef struct -+{ -+ unsigned int vki_len; -+ unsigned long vki_kernel_addr; -+ unsigned long vki_process_addr; -+} vki_ptrace_area; -+ -+/* -+ * S/390 specific non posix ptrace requests -+ */ -+#define VKI_PTRACE_PEEKUSR_AREA 0x5000 -+#define VKI_PTRACE_POKEUSR_AREA 0x5001 -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.16.60/include/asm-s390/elf.h -+//---------------------------------------------------------------------- -+ -+typedef vki_s390_fp_regs vki_elf_fpregset_t; -+typedef vki_s390_regs vki_elf_gregset_t; -+ -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.16.60/include/asm-s390/ucontext.h -+//---------------------------------------------------------------------- -+ -+struct vki_ucontext { -+ unsigned long uc_flags; -+ struct vki_ucontext *uc_link; -+ vki_stack_t uc_stack; -+ _vki_sigregs uc_mcontext; -+ vki_sigset_t uc_sigmask; /* mask last for extensibility */ -+}; -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.16.60/include/asm-s390/ipcbuf.h -+//---------------------------------------------------------------------- -+ -+struct vki_ipc64_perm -+{ -+ __vki_kernel_key_t key; -+ __vki_kernel_uid32_t uid; -+ __vki_kernel_gid32_t gid; -+ __vki_kernel_uid32_t cuid; -+ __vki_kernel_gid32_t cgid; -+ __vki_kernel_mode_t mode; -+ unsigned short __pad1; -+ unsigned short seq; -+#ifndef VGA_s390x -+ unsigned short __pad2; -+#endif /* ! VGA_s390x */ -+ unsigned long __unused1; -+ unsigned long __unused2; -+}; -+ -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.16.60/include/asm-s390/sembuf.h -+//---------------------------------------------------------------------- -+ -+struct vki_semid64_ds { -+ struct vki_ipc64_perm sem_perm; /* permissions .. see ipc.h */ -+ __vki_kernel_time_t sem_otime; /* last semop time */ -+#ifndef VGA_s390x -+ unsigned long __unused1; -+#endif /* ! VGA_s390x */ -+ __vki_kernel_time_t sem_ctime; /* last change time */ -+#ifndef VGA_s390x -+ unsigned long __unused2; -+#endif /* ! VGA_s390x */ -+ unsigned long sem_nsems; /* no. of semaphores in array */ -+ unsigned long __unused3; -+ unsigned long __unused4; -+}; -+ -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.16.60/include/asm-s390/msgbuf.h -+//---------------------------------------------------------------------- -+ -+struct vki_msqid64_ds { -+ struct vki_ipc64_perm msg_perm; -+ __vki_kernel_time_t msg_stime; /* last msgsnd time */ -+#ifndef VGA_s390x -+ unsigned long __unused1; -+#endif /* ! VGA_s390x */ -+ __vki_kernel_time_t msg_rtime; /* last msgrcv time */ -+#ifndef VGA_s390x -+ unsigned long __unused2; -+#endif /* ! VGA_s390x */ -+ __vki_kernel_time_t msg_ctime; /* last change time */ -+#ifndef VGA_s390x -+ unsigned long __unused3; -+#endif /* ! VGA_s390x */ -+ unsigned long msg_cbytes; /* current number of bytes on queue */ -+ unsigned long msg_qnum; /* number of messages in queue */ -+ unsigned long msg_qbytes; /* max number of bytes on queue */ -+ __vki_kernel_pid_t msg_lspid; /* pid of last msgsnd */ -+ __vki_kernel_pid_t msg_lrpid; /* last receive pid */ -+ unsigned long __unused4; -+ unsigned long __unused5; -+}; -+ -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.16.60/include/asm-s390/ipc.h -+//---------------------------------------------------------------------- -+ -+struct vki_ipc_kludge { -+ struct vki_msgbuf __user *msgp; -+ long msgtyp; -+}; -+ -+#define VKI_SEMOP 1 -+#define VKI_SEMGET 2 -+#define VKI_SEMCTL 3 -+#define VKI_SEMTIMEDOP 4 -+#define VKI_MSGSND 11 -+#define VKI_MSGRCV 12 -+#define VKI_MSGGET 13 -+#define VKI_MSGCTL 14 -+#define VKI_SHMAT 21 -+#define VKI_SHMDT 22 -+#define VKI_SHMGET 23 -+#define VKI_SHMCTL 24 -+ -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.16.60/include/asm-s390/shmbuf.h -+//---------------------------------------------------------------------- -+ -+struct vki_shmid64_ds { -+ struct vki_ipc64_perm shm_perm; /* operation perms */ -+ vki_size_t shm_segsz; /* size of segment (bytes) */ -+ __vki_kernel_time_t shm_atime; /* last attach time */ -+#ifndef VGA_s390x -+ unsigned long __unused1; -+#endif /* ! VGA_s390x */ -+ __vki_kernel_time_t shm_dtime; /* last detach time */ -+#ifndef VGA_s390x -+ unsigned long __unused2; -+#endif /* ! VGA_s390x */ -+ __vki_kernel_time_t shm_ctime; /* last change time */ -+#ifndef VGA_s390x -+ unsigned long __unused3; -+#endif /* ! VGA_s390x */ -+ __vki_kernel_pid_t shm_cpid; /* pid of creator */ -+ __vki_kernel_pid_t shm_lpid; /* pid of last operator */ -+ unsigned long shm_nattch; /* no. of current attaches */ -+ unsigned long __unused4; -+ unsigned long __unused5; -+}; -+ -+struct vki_shminfo64 { -+ unsigned long shmmax; -+ unsigned long shmmin; -+ unsigned long shmmni; -+ unsigned long shmseg; -+ unsigned long shmall; -+ unsigned long __unused1; -+ unsigned long __unused2; -+ unsigned long __unused3; -+ unsigned long __unused4; -+}; -+ -+ -+//---------------------------------------------------------------------- -+// The following are defined in the VKI namespace but are nowhere found -+// in the linux headers. -+//---------------------------------------------------------------------- -+#define VKI_BIG_ENDIAN 1 -+#define VKI_MAX_PAGE_SHIFT VKI_PAGE_SHIFT -+#define VKI_MAX_PAGE_SIZE VKI_PAGE_SIZE -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.35.4/arch/s390x/include/asm/shmparam.h -+//---------------------------------------------------------------------- -+ -+#define VKI_SHMLBA VKI_PAGE_SIZE -+ -+/* If a system call returns a value >= VKI_MAX_ERRNO then that is considered -+ an error condition. I.e. the system call failed. */ -+#define VKI_MAX_ERRNO -125 -+ -+#endif // __VKI_S390X_LINUX_H -+ -+/*--------------------------------------------------------------------*/ -+/*--- end ---*/ -+/*--------------------------------------------------------------------*/ ---- include/vki/vki-scnums-s390x-linux.h -+++ include/vki/vki-scnums-s390x-linux.h -@@ -0,0 +1,447 @@ -+ -+/*--------------------------------------------------------------------*/ -+/*--- System call numbers for s390x-linux. ---*/ -+/*--- vki-scnums-s390x-linux.h ---*/ -+/*--------------------------------------------------------------------*/ -+ -+/* -+ This file is part of Valgrind, a dynamic binary instrumentation -+ framework. -+ -+ Copyright IBM Corp. 2010 -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA -+ 02111-1307, USA. -+ -+ The GNU General Public License is contained in the file COPYING. -+*/ -+ -+/* Contributed by Florian Krohm and Christian Borntraeger. */ -+ -+#ifndef __VKI_SCNUMS_S390X_LINUX_H -+#define __VKI_SCNUMS_S390X_LINUX_H -+ -+//---------------------------------------------------------------------- -+// From linux-2.6.16.60/include/asm-s390/unistd.h -+//---------------------------------------------------------------------- -+ -+ -+#define __NR_exit 1 -+#define __NR_fork 2 -+#define __NR_read 3 -+#define __NR_write 4 -+#define __NR_open 5 -+#define __NR_close 6 -+#define __NR_restart_syscall 7 -+#define __NR_creat 8 -+#define __NR_link 9 -+#define __NR_unlink 10 -+#define __NR_execve 11 -+#define __NR_chdir 12 -+#define __NR_time 13 -+#define __NR_mknod 14 -+#define __NR_chmod 15 -+#define __NR_lchown 16 -+#define __NR_lseek 19 -+#define __NR_getpid 20 -+#define __NR_mount 21 -+#define __NR_umount 22 -+#define __NR_setuid 23 -+#define __NR_getuid 24 -+#define __NR_stime 25 -+#define __NR_ptrace 26 -+#define __NR_alarm 27 -+#define __NR_pause 29 -+#define __NR_utime 30 -+#define __NR_access 33 -+#define __NR_nice 34 -+#define __NR_sync 36 -+#define __NR_kill 37 -+#define __NR_rename 38 -+#define __NR_mkdir 39 -+#define __NR_rmdir 40 -+#define __NR_dup 41 -+#define __NR_pipe 42 -+#define __NR_times 43 -+#define __NR_brk 45 -+#define __NR_setgid 46 -+#define __NR_getgid 47 -+#define __NR_signal 48 -+#define __NR_geteuid 49 -+#define __NR_getegid 50 -+#define __NR_acct 51 -+#define __NR_umount2 52 -+#define __NR_ioctl 54 -+#define __NR_fcntl 55 -+#define __NR_setpgid 57 -+#define __NR_umask 60 -+#define __NR_chroot 61 -+#define __NR_ustat 62 -+#define __NR_dup2 63 -+#define __NR_getppid 64 -+#define __NR_getpgrp 65 -+#define __NR_setsid 66 -+#define __NR_sigaction 67 -+#define __NR_setreuid 70 -+#define __NR_setregid 71 -+#define __NR_sigsuspend 72 -+#define __NR_sigpending 73 -+#define __NR_sethostname 74 -+#define __NR_setrlimit 75 -+#define __NR_getrlimit 76 -+#define __NR_getrusage 77 -+#define __NR_gettimeofday 78 -+#define __NR_settimeofday 79 -+#define __NR_getgroups 80 -+#define __NR_setgroups 81 -+#define __NR_symlink 83 -+#define __NR_readlink 85 -+#define __NR_uselib 86 -+#define __NR_swapon 87 -+#define __NR_reboot 88 -+#define __NR_readdir 89 -+#define __NR_mmap 90 -+#define __NR_munmap 91 -+#define __NR_truncate 92 -+#define __NR_ftruncate 93 -+#define __NR_fchmod 94 -+#define __NR_fchown 95 -+#define __NR_getpriority 96 -+#define __NR_setpriority 97 -+#define __NR_statfs 99 -+#define __NR_fstatfs 100 -+#define __NR_ioperm 101 -+#define __NR_socketcall 102 -+#define __NR_syslog 103 -+#define __NR_setitimer 104 -+#define __NR_getitimer 105 -+#define __NR_stat 106 -+#define __NR_lstat 107 -+#define __NR_fstat 108 -+#define __NR_lookup_dcookie 110 -+#define __NR_vhangup 111 -+#define __NR_idle 112 -+#define __NR_wait4 114 -+#define __NR_swapoff 115 -+#define __NR_sysinfo 116 -+#define __NR_ipc 117 -+#define __NR_fsync 118 -+#define __NR_sigreturn 119 -+#define __NR_clone 120 -+#define __NR_setdomainname 121 -+#define __NR_uname 122 -+#define __NR_adjtimex 124 -+#define __NR_mprotect 125 -+#define __NR_sigprocmask 126 -+#define __NR_create_module 127 -+#define __NR_init_module 128 -+#define __NR_delete_module 129 -+#define __NR_get_kernel_syms 130 -+#define __NR_quotactl 131 -+#define __NR_getpgid 132 -+#define __NR_fchdir 133 -+#define __NR_bdflush 134 -+#define __NR_sysfs 135 -+#define __NR_personality 136 -+#define __NR_afs_syscall 137 /* Syscall for Andrew File System */ -+#define __NR_setfsuid 138 -+#define __NR_setfsgid 139 -+#define __NR__llseek 140 -+#define __NR_getdents 141 -+#define __NR__newselect 142 -+#define __NR_flock 143 -+#define __NR_msync 144 -+#define __NR_readv 145 -+#define __NR_writev 146 -+#define __NR_getsid 147 -+#define __NR_fdatasync 148 -+#define __NR__sysctl 149 -+#define __NR_mlock 150 -+#define __NR_munlock 151 -+#define __NR_mlockall 152 -+#define __NR_munlockall 153 -+#define __NR_sched_setparam 154 -+#define __NR_sched_getparam 155 -+#define __NR_sched_setscheduler 156 -+#define __NR_sched_getscheduler 157 -+#define __NR_sched_yield 158 -+#define __NR_sched_get_priority_max 159 -+#define __NR_sched_get_priority_min 160 -+#define __NR_sched_rr_get_interval 161 -+#define __NR_nanosleep 162 -+#define __NR_mremap 163 -+#define __NR_setresuid 164 -+#define __NR_getresuid 165 -+#define __NR_query_module 167 -+#define __NR_poll 168 -+#define __NR_nfsservctl 169 -+#define __NR_setresgid 170 -+#define __NR_getresgid 171 -+#define __NR_prctl 172 -+#define __NR_rt_sigreturn 173 -+#define __NR_rt_sigaction 174 -+#define __NR_rt_sigprocmask 175 -+#define __NR_rt_sigpending 176 -+#define __NR_rt_sigtimedwait 177 -+#define __NR_rt_sigqueueinfo 178 -+#define __NR_rt_sigsuspend 179 -+#define __NR_pread64 180 -+#define __NR_pwrite64 181 -+#define __NR_chown 182 -+#define __NR_getcwd 183 -+#define __NR_capget 184 -+#define __NR_capset 185 -+#define __NR_sigaltstack 186 -+#define __NR_sendfile 187 -+#define __NR_getpmsg 188 -+#define __NR_putpmsg 189 -+#define __NR_vfork 190 -+#define __NR_ugetrlimit 191 /* SuS compliant getrlimit */ -+#define __NR_mmap2 192 -+#define __NR_truncate64 193 -+#define __NR_ftruncate64 194 -+#define __NR_stat64 195 -+#define __NR_lstat64 196 -+#define __NR_fstat64 197 -+#define __NR_lchown32 198 -+#define __NR_getuid32 199 -+#define __NR_getgid32 200 -+#define __NR_geteuid32 201 -+#define __NR_getegid32 202 -+#define __NR_setreuid32 203 -+#define __NR_setregid32 204 -+#define __NR_getgroups32 205 -+#define __NR_setgroups32 206 -+#define __NR_fchown32 207 -+#define __NR_setresuid32 208 -+#define __NR_getresuid32 209 -+#define __NR_setresgid32 210 -+#define __NR_getresgid32 211 -+#define __NR_chown32 212 -+#define __NR_setuid32 213 -+#define __NR_setgid32 214 -+#define __NR_setfsuid32 215 -+#define __NR_setfsgid32 216 -+#define __NR_pivot_root 217 -+#define __NR_mincore 218 -+#define __NR_madvise 219 -+#define __NR_getdents64 220 -+#define __NR_fcntl64 221 -+#define __NR_readahead 222 -+#define __NR_sendfile64 223 -+#define __NR_setxattr 224 -+#define __NR_lsetxattr 225 -+#define __NR_fsetxattr 226 -+#define __NR_getxattr 227 -+#define __NR_lgetxattr 228 -+#define __NR_fgetxattr 229 -+#define __NR_listxattr 230 -+#define __NR_llistxattr 231 -+#define __NR_flistxattr 232 -+#define __NR_removexattr 233 -+#define __NR_lremovexattr 234 -+#define __NR_fremovexattr 235 -+#define __NR_gettid 236 -+#define __NR_tkill 237 -+#define __NR_futex 238 -+#define __NR_sched_setaffinity 239 -+#define __NR_sched_getaffinity 240 -+#define __NR_tgkill 241 -+/* Number 242 is reserved for tux */ -+#define __NR_io_setup 243 -+#define __NR_io_destroy 244 -+#define __NR_io_getevents 245 -+#define __NR_io_submit 246 -+#define __NR_io_cancel 247 -+#define __NR_exit_group 248 -+#define __NR_epoll_create 249 -+#define __NR_epoll_ctl 250 -+#define __NR_epoll_wait 251 -+#define __NR_set_tid_address 252 -+#define __NR_fadvise64 253 -+#define __NR_timer_create 254 -+#define __NR_timer_settime (__NR_timer_create+1) -+#define __NR_timer_gettime (__NR_timer_create+2) -+#define __NR_timer_getoverrun (__NR_timer_create+3) -+#define __NR_timer_delete (__NR_timer_create+4) -+#define __NR_clock_settime (__NR_timer_create+5) -+#define __NR_clock_gettime (__NR_timer_create+6) -+#define __NR_clock_getres (__NR_timer_create+7) -+#define __NR_clock_nanosleep (__NR_timer_create+8) -+/* Number 263 is reserved for vserver */ -+#define __NR_fadvise64_64 264 -+#define __NR_statfs64 265 -+#define __NR_fstatfs64 266 -+#define __NR_remap_file_pages 267 -+/* Number 268 is reserved for new sys_mbind */ -+/* Number 269 is reserved for new sys_get_mempolicy */ -+/* Number 270 is reserved for new sys_set_mempolicy */ -+#define __NR_mq_open 271 -+#define __NR_mq_unlink 272 -+#define __NR_mq_timedsend 273 -+#define __NR_mq_timedreceive 274 -+#define __NR_mq_notify 275 -+#define __NR_mq_getsetattr 276 -+#define __NR_kexec_load 277 -+#define __NR_add_key 278 -+#define __NR_request_key 279 -+#define __NR_keyctl 280 -+#define __NR_waitid 281 -+#define __NR_ioprio_set 282 -+#define __NR_ioprio_get 283 -+#define __NR_inotify_init 284 -+#define __NR_inotify_add_watch 285 -+#define __NR_inotify_rm_watch 286 -+/* Number 287 is reserved for new sys_migrate_pages */ -+#define __NR_openat 288 -+#define __NR_mkdirat 289 -+#define __NR_mknodat 290 -+#define __NR_fchownat 291 -+#define __NR_futimesat 292 -+#define __NR_fstatat64 293 -+#define __NR_unlinkat 294 -+#define __NR_renameat 295 -+#define __NR_linkat 296 -+#define __NR_symlinkat 297 -+#define __NR_readlinkat 298 -+#define __NR_fchmodat 299 -+#define __NR_faccessat 300 -+#define __NR_pselect6 301 -+#define __NR_ppoll 302 -+#define __NR_unshare 303 -+/* the following system calls from 2.6.32 unistd.h*/ -+#define __NR_set_robust_list 304 -+#define __NR_get_robust_list 305 -+#define __NR_splice 306 -+#define __NR_sync_file_range 307 -+#define __NR_tee 308 -+#define __NR_vmsplice 309 -+/* Number 310 is reserved for new sys_move_pages */ -+#define __NR_getcpu 311 -+#define __NR_epoll_pwait 312 -+#define __NR_utimes 313 -+#define __NR_fallocate 314 -+#define __NR_utimensat 315 -+#define __NR_signalfd 316 -+#define __NR_timerfd 317 -+#define __NR_eventfd 318 -+#define __NR_timerfd_create 319 -+#define __NR_timerfd_settime 320 -+#define __NR_timerfd_gettime 321 -+#define __NR_signalfd4 322 -+#define __NR_eventfd2 323 -+#define __NR_inotify_init1 324 -+#define __NR_pipe2 325 -+#define __NR_dup3 326 -+#define __NR_epoll_create1 327 -+#define __NR_preadv 328 -+#define __NR_pwritev 329 -+#define __NR_rt_tgsigqueueinfo 330 -+#define __NR_perf_event_open 331 -+ -+#define NR_syscalls 332 -+ -+/* -+ * There are some system calls that are not present on 64 bit, some -+ * have a different name although they do the same (e.g. __NR_chown32 -+ * is __NR_chown on 64 bit). -+ */ -+#ifdef VGA_s390x -+#undef __NR_time -+#undef __NR_lchown -+#undef __NR_setuid -+#undef __NR_getuid -+#undef __NR_stime -+#undef __NR_setgid -+#undef __NR_getgid -+#undef __NR_geteuid -+#undef __NR_getegid -+#undef __NR_setreuid -+#undef __NR_setregid -+#undef __NR_getrlimit -+#undef __NR_getgroups -+#undef __NR_setgroups -+#undef __NR_fchown -+#undef __NR_ioperm -+#undef __NR_setfsuid -+#undef __NR_setfsgid -+#undef __NR__llseek -+#undef __NR__newselect -+#undef __NR_setresuid -+#undef __NR_getresuid -+#undef __NR_setresgid -+#undef __NR_getresgid -+#undef __NR_chown -+#undef __NR_ugetrlimit -+#undef __NR_mmap2 -+#undef __NR_truncate64 -+#undef __NR_ftruncate64 -+#undef __NR_stat64 -+#undef __NR_lstat64 -+#undef __NR_fstat64 -+#undef __NR_lchown32 -+#undef __NR_getuid32 -+#undef __NR_getgid32 -+#undef __NR_geteuid32 -+#undef __NR_getegid32 -+#undef __NR_setreuid32 -+#undef __NR_setregid32 -+#undef __NR_getgroups32 -+#undef __NR_setgroups32 -+#undef __NR_fchown32 -+#undef __NR_setresuid32 -+#undef __NR_getresuid32 -+#undef __NR_setresgid32 -+#undef __NR_getresgid32 -+#undef __NR_chown32 -+#undef __NR_setuid32 -+#undef __NR_setgid32 -+#undef __NR_setfsuid32 -+#undef __NR_setfsgid32 -+#undef __NR_fcntl64 -+#undef __NR_sendfile64 -+#undef __NR_fadvise64_64 -+#undef __NR_fstatat64 -+ -+#define __NR_select 142 -+#define __NR_getrlimit 191 /* SuS compliant getrlimit */ -+#define __NR_lchown 198 -+#define __NR_getuid 199 -+#define __NR_getgid 200 -+#define __NR_geteuid 201 -+#define __NR_getegid 202 -+#define __NR_setreuid 203 -+#define __NR_setregid 204 -+#define __NR_getgroups 205 -+#define __NR_setgroups 206 -+#define __NR_fchown 207 -+#define __NR_setresuid 208 -+#define __NR_getresuid 209 -+#define __NR_setresgid 210 -+#define __NR_getresgid 211 -+#define __NR_chown 212 -+#define __NR_setuid 213 -+#define __NR_setgid 214 -+#define __NR_setfsuid 215 -+#define __NR_setfsgid 216 -+#define __NR_newfstatat 293 -+ -+#endif -+ -+#endif /* __VKI_SCNUMS_S390X_LINUX_H */ -+ -+/*--------------------------------------------------------------------*/ -+/*--- end ---*/ -+/*--------------------------------------------------------------------*/ ---- lackey/lk_main.c -+++ lackey/lk_main.c -@@ -314,7 +314,8 @@ - case Ity_I128: return 5; - case Ity_F32: return 6; - case Ity_F64: return 7; -- case Ity_V128: return 8; -+ case Ity_F128: return 8; -+ case Ity_V128: return 9; - default: tl_assert(0); - } - } -@@ -330,7 +331,8 @@ - case 5: return "I128"; break; - case 6: return "F32"; break; - case 7: return "F64"; break; -- case 8: return "V128"; break; -+ case 8: return "F128"; break; -+ case 9: return "V128"; break; - default: tl_assert(0); - } - } ---- Makefile.all.am -+++ Makefile.all.am -@@ -178,6 +178,11 @@ - -mmacosx-version-min=10.5 -fno-stack-protector - AM_CCASFLAGS_AMD64_DARWIN = $(AM_CPPFLAGS_AMD64_DARWIN) -arch x86_64 -g - -+AM_FLAG_M3264_S390X_LINUX = @FLAG_M64@ -+AM_CFLAGS_S390X_LINUX = @FLAG_M64@ $(AM_CFLAGS_BASE) -+AM_CCASFLAGS_S390X_LINUX = $(AM_CPPFLAGS_S390X_LINUX) -mzarch -march=z900 \ -+ @FLAG_M64@ -g -+ - # Flags for the primary target. These must be used to build the - # regtests and performance tests. In fact, these must be used to - # build anything which is built only once on a dual-arch build. -@@ -209,4 +214,5 @@ - PRELOAD_LDFLAGS_PPC64_AIX5 = $(PRELOAD_LDFLAGS_COMMON_AIX5) @FLAG_MAIX64@ - PRELOAD_LDFLAGS_X86_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch i386 - PRELOAD_LDFLAGS_AMD64_DARWIN = $(PRELOAD_LDFLAGS_COMMON_DARWIN) -arch x86_64 -+PRELOAD_LDFLAGS_S390X_LINUX = $(PRELOAD_LDFLAGS_COMMON_LINUX) @FLAG_M64@ - ---- Makefile.tool.am -+++ Makefile.tool.am -@@ -52,6 +52,9 @@ - TOOL_LDFLAGS_ARM_LINUX = \ - $(TOOL_LDFLAGS_COMMON_LINUX) @FLAG_M32@ - -+TOOL_LDFLAGS_S390X_LINUX = \ -+ $(TOOL_LDFLAGS_COMMON_LINUX) @FLAG_M64@ -+ - TOOL_LDFLAGS_PPC32_AIX5 = \ - $(TOOL_LDFLAGS_COMMON_AIX5) @FLAG_MAIX32@ - -@@ -104,6 +107,9 @@ - LIBREPLACEMALLOC_AMD64_DARWIN = \ - $(top_builddir)/coregrind/libreplacemalloc_toolpreload-amd64-darwin.a - -+LIBREPLACEMALLOC_S390X_LINUX = \ -+ $(top_builddir)/coregrind/libreplacemalloc_toolpreload-s390x-linux.a -+ - - LIBREPLACEMALLOC_LDFLAGS_X86_LINUX = \ - -Wl,--whole-archive \ -@@ -142,6 +148,11 @@ - LIBREPLACEMALLOC_LDFLAGS_AMD64_DARWIN = \ - $(LIBREPLACEMALLOC_AMD64_DARWIN) - -+LIBREPLACEMALLOC_LDFLAGS_S390X_LINUX = \ -+ -Wl,--whole-archive \ -+ $(LIBREPLACEMALLOC_S390X_LINUX) \ -+ -Wl,--no-whole-archive -+ - #---------------------------------------------------------------------------- - # General stuff - #---------------------------------------------------------------------------- ---- Makefile.vex.am -+++ Makefile.vex.am -@@ -24,6 +24,7 @@ - pub/libvex_guest_ppc32.h \ - pub/libvex_guest_ppc64.h \ - pub/libvex_guest_arm.h \ -+ pub/libvex_guest_s390x.h \ - pub/libvex_ir.h \ - pub/libvex_trc_values.h - -@@ -38,13 +39,16 @@ - priv/guest_amd64_defs.h \ - priv/guest_ppc_defs.h \ - priv/guest_arm_defs.h \ -+ priv/guest_s390_defs.h \ - priv/host_generic_regs.h \ - priv/host_generic_simd64.h \ - priv/host_generic_simd128.h \ - priv/host_x86_defs.h \ - priv/host_amd64_defs.h \ - priv/host_ppc_defs.h \ -- priv/host_arm_defs.h -+ priv/host_arm_defs.h \ -+ priv/host_s390_defs.h \ -+ priv/host_s390_disasm.h - - BUILT_SOURCES = pub/libvex_guest_offsets.h - CLEANFILES = pub/libvex_guest_offsets.h -@@ -58,7 +62,8 @@ - pub/libvex_guest_amd64.h \ - pub/libvex_guest_ppc32.h \ - pub/libvex_guest_ppc64.h \ -- pub/libvex_guest_arm.h -+ pub/libvex_guest_arm.h \ -+ pub/libvex_guest_s390x.h - rm -f auxprogs/genoffsets.s - $(CC) $(LIBVEX_CFLAGS) \ - $(AM_CFLAGS_@VGCONF_PLATFORM_PRI_CAPS@) \ -@@ -97,6 +102,8 @@ - priv/guest_ppc_toIR.c \ - priv/guest_arm_helpers.c \ - priv/guest_arm_toIR.c \ -+ priv/guest_s390_helpers.c \ -+ priv/guest_s390_toIR.c \ - priv/host_generic_regs.c \ - priv/host_generic_simd64.c \ - priv/host_generic_simd128.c \ -@@ -108,7 +115,10 @@ - priv/host_ppc_defs.c \ - priv/host_ppc_isel.c \ - priv/host_arm_defs.c \ -- priv/host_arm_isel.c -+ priv/host_arm_isel.c \ -+ priv/host_s390_defs.c \ -+ priv/host_s390_isel.c \ -+ priv/host_s390_disasm.c - - LIBVEX_CFLAGS = \ - -Wbad-function-cast \ ---- memcheck/mc_machine.c -+++ memcheck/mc_machine.c -@@ -65,6 +65,11 @@ - # define MC_SIZEOF_GUEST_STATE sizeof(VexGuestPPC64State) - #endif - -+#if defined(VGA_s390x) -+# include "libvex_guest_s390x.h" -+# define MC_SIZEOF_GUEST_STATE sizeof(VexGuestS390XState) -+#endif -+ - #if defined(VGA_arm) - # include "libvex_guest_arm.h" - # define MC_SIZEOF_GUEST_STATE sizeof(VexGuestARMState) -@@ -682,6 +687,54 @@ - # undef GOF - # undef SZB - -+ /* -------------------- s390x -------------------- */ -+ -+# elif defined(VGA_s390x) -+# define GOF(_fieldname) \ -+ (offsetof(VexGuestS390XState,guest_##_fieldname)) -+ Int o = offset; -+ Int sz = szB; -+ tl_assert(sz > 0); -+ tl_assert(host_is_big_endian()); -+ -+ /* no matter what byte(s) we change, we have changed the full 8 byte value -+ and need to track this change for the whole register */ -+ if (o >= GOF(r0) && sz <= 8 && o <= (GOF(r15) + 8 - sz)) -+ return GOF(r0) + ((o-GOF(r0)) & -8) ; -+ -+ -+ /* fprs are accessed 4 or 8 byte at once. Again, we track that change for -+ the full register */ -+ if ((sz == 8 || sz == 4) && o >= GOF(f0) && o <= GOF(f15)+8-sz) -+ return GOF(f0) + ((o-GOF(f0)) & -8) ; -+ -+ /* access registers are accessed 4 bytes at once */ -+ if (sz == 4 && o >= GOF(a0) && o <= GOF(a15)) -+ return o; -+ -+ /* we access the guest counter either fully or one of the 4byte words */ -+ if (o == GOF(counter) && (sz == 8 || sz ==4)) -+ return o; -+ if (o == GOF(counter) + 4 && sz == 4) -+ return o; -+ -+ if (o == GOF(CC_OP)) return -1; -+ if (o == GOF(CC_DEP1)) return o; -+ if (o == GOF(CC_DEP2)) return o; -+ if (o == GOF(CC_NDEP)) return -1; -+ if (o == GOF(TISTART)) return -1; -+ if (o == GOF(TILEN)) return -1; -+ if (o == GOF(NRADDR)) return -1; -+ if (o == GOF(IP_AT_SYSCALL)) return -1; -+ if (o == GOF(fpc)) return -1; -+ if (o == GOF(IA)) return -1; -+ if (o == GOF(SYSNO)) return -1; -+ VG_(printf)("MC_(get_otrack_shadow_offset)(s390x)(off=%d,sz=%d)\n", -+ offset,szB); -+ tl_assert(0); -+# undef GOF -+ -+ - /* --------------------- arm --------------------- */ - - # elif defined(VGA_arm) -@@ -889,6 +942,11 @@ - VG_(printf)("\n"); - tl_assert(0); - -+ /* --------------------- s390x --------------------- */ -+# elif defined(VGA_s390x) -+ /* Should never het here because s390x does not use Ist_PutI -+ and Iex_GetI. */ -+ tl_assert(0); - # else - # error "FIXME: not implemented for this architecture" - # endif ---- memcheck/mc_translate.c -+++ memcheck/mc_translate.c -@@ -121,6 +121,7 @@ - static IRExpr* expr2vbits ( struct _MCEnv* mce, IRExpr* e ); - static IRTemp findShadowTmpB ( struct _MCEnv* mce, IRTemp orig ); - -+static IRExpr *i128_const_zero(void); - - /*------------------------------------------------------------*/ - /*--- Memcheck running state, and tmp management. ---*/ -@@ -343,7 +344,7 @@ - /* Shadow state is always accessed using integer types. This returns - an integer type with the same size (as per sizeofIRType) as the - given type. The only valid shadow types are Bit, I8, I16, I32, -- I64, V128. */ -+ I64, I128, V128. */ - - static IRType shadowTypeV ( IRType ty ) - { -@@ -356,6 +357,7 @@ - case Ity_I128: return ty; - case Ity_F32: return Ity_I32; - case Ity_F64: return Ity_I64; -+ case Ity_F128: return Ity_I128; - case Ity_V128: return Ity_V128; - default: ppIRType(ty); - VG_(tool_panic)("memcheck:shadowTypeV"); -@@ -371,6 +373,7 @@ - case Ity_I16: return IRExpr_Const(IRConst_U16(0)); - case Ity_I32: return IRExpr_Const(IRConst_U32(0)); - case Ity_I64: return IRExpr_Const(IRConst_U64(0)); -+ case Ity_I128: return i128_const_zero(); - case Ity_V128: return IRExpr_Const(IRConst_V128(0x0000)); - default: VG_(tool_panic)("memcheck:definedOfType"); - } -@@ -438,6 +441,18 @@ - - - /*------------------------------------------------------------*/ -+/*--- Helper functions for 128-bit ops ---*/ -+/*------------------------------------------------------------*/ -+static IRExpr *i128_const_zero(void) -+{ -+ return binop(Iop_64HLto128, IRExpr_Const(IRConst_U64(0)), -+ IRExpr_Const(IRConst_U64(0))); -+} -+ -+/* There are no 128-bit loads and/or stores. So we do not need to worry -+ about that in expr2vbits_Load */ -+ -+/*------------------------------------------------------------*/ - /*--- Constructing definedness primitive ops ---*/ - /*------------------------------------------------------------*/ - -@@ -499,6 +514,20 @@ - return assignNew('V', mce, Ity_I64, binop(Iop_Or64, a1, a2)); - } - -+static IRAtom* mkUifU128 ( MCEnv* mce, IRAtom* a1, IRAtom* a2 ) { -+ IRAtom *tmp1, *tmp2, *tmp3, *tmp4, *tmp5, *tmp6; -+ tl_assert(isShadowAtom(mce,a1)); -+ tl_assert(isShadowAtom(mce,a2)); -+ tmp1 = assignNew('V', mce, Ity_I64, unop(Iop_128to64, a1)); -+ tmp2 = assignNew('V', mce, Ity_I64, unop(Iop_128HIto64, a1)); -+ tmp3 = assignNew('V', mce, Ity_I64, unop(Iop_128to64, a2)); -+ tmp4 = assignNew('V', mce, Ity_I64, unop(Iop_128HIto64, a2)); -+ tmp5 = assignNew('V', mce, Ity_I64, binop(Iop_Or64, tmp1, tmp3)); -+ tmp6 = assignNew('V', mce, Ity_I64, binop(Iop_Or64, tmp2, tmp4)); -+ -+ return assignNew('V', mce, Ity_I128, binop(Iop_64HLto128, tmp6, tmp5)); -+} -+ - static IRAtom* mkUifUV128 ( MCEnv* mce, IRAtom* a1, IRAtom* a2 ) { - tl_assert(isShadowAtom(mce,a1)); - tl_assert(isShadowAtom(mce,a2)); -@@ -511,6 +540,7 @@ - case Ity_I16: return mkUifU16(mce, a1, a2); - case Ity_I32: return mkUifU32(mce, a1, a2); - case Ity_I64: return mkUifU64(mce, a1, a2); -+ case Ity_I128: return mkUifU128(mce, a1, a2); - case Ity_V128: return mkUifUV128(mce, a1, a2); - default: - VG_(printf)("\n"); ppIRType(vty); VG_(printf)("\n"); -@@ -650,6 +680,10 @@ - - /* --------- Pessimising casts. --------- */ - -+/* The function returns an expression of type DST_TY. If any of the VBITS -+ is undefined (value == 1) the resulting expression has all bits set to -+ 1. Otherwise, all bits are 0. */ -+ - static IRAtom* mkPCastTo( MCEnv* mce, IRType dst_ty, IRAtom* vbits ) - { - IRType src_ty; -@@ -1202,6 +1236,7 @@ - - ty = typeOfIRExpr(mce->sb->tyenv, vatom); - tl_assert(ty != Ity_I1); -+ tl_assert(ty != Ity_I128); - if (isAlwaysDefd(mce, offset, sizeofIRType(ty))) { - /* later: no ... */ - /* emit code to emit a complaint if any of the vbits are 1. */ -@@ -1263,6 +1298,7 @@ - { - IRType tyS = shadowTypeV(ty); - tl_assert(ty != Ity_I1); -+ tl_assert(ty != Ity_I128); - if (isAlwaysDefd(mce, offset, sizeofIRType(ty))) { - /* Always defined, return all zeroes of the relevant type */ - return definedOfType(tyS); -@@ -1414,6 +1450,22 @@ - return at; - } - -+ /* I32 x I128 x I128 -> I128 */ -+ /* Standard FP idiom: rm x FParg1 x FParg2 -> FPresult */ -+ if (t1 == Ity_I32 && t2 == Ity_I128 && t3 == Ity_I128 -+ && finalVty == Ity_I128) { -+ if (0) VG_(printf)("mkLazy3: I32 x I128 x I128 -> I128\n"); -+ /* Widen 1st arg to I128. Since 1st arg is typically a rounding -+ mode indication which is fully defined, this should get -+ folded out later. */ -+ at = mkPCastTo(mce, Ity_I128, va1); -+ /* Now fold in 2nd and 3rd args. */ -+ at = mkUifU(mce, Ity_I128, at, va2); -+ at = mkUifU(mce, Ity_I128, at, va3); -+ /* and PCast once again. */ -+ at = mkPCastTo(mce, Ity_I128, at); -+ return at; -+ } - if (1) { - VG_(printf)("mkLazy3: "); - ppIRType(t1); -@@ -1474,6 +1526,19 @@ - at = mkPCastTo(mce, Ity_I64, at); - return at; - } -+ /* I32 x I32 x I32 x I32 -> I32 */ -+ /* Standard FP idiom: rm x FParg1 x FParg2 x FParg3 -> FPresult */ -+ if (t1 == Ity_I32 && t2 == Ity_I32 && t3 == Ity_I32 && t4 == Ity_I32 -+ && finalVty == Ity_I32) { -+ if (0) VG_(printf)("mkLazy4: I32 x I32 x I32 x I32 -> I32\n"); -+ at = va1; -+ /* Now fold in 2nd, 3rd, 4th args. */ -+ at = mkUifU(mce, Ity_I32, at, va2); -+ at = mkUifU(mce, Ity_I32, at, va3); -+ at = mkUifU(mce, Ity_I32, at, va4); -+ at = mkPCastTo(mce, Ity_I32, at); -+ return at; -+ } - - if (1) { - VG_(printf)("mkLazy4: "); -@@ -2136,6 +2201,12 @@ - case Iop_MSubF64r32: - /* I32(rm) x F64 x F64 x F64 -> F64 */ - return mkLazy4(mce, Ity_I64, vatom1, vatom2, vatom3, vatom4); -+ -+ case Iop_MAddF32: -+ case Iop_MSubF32: -+ /* I32(rm) x F32 x F32 x F32 -> F32 */ -+ return mkLazy4(mce, Ity_I32, vatom1, vatom2, vatom3, vatom4); -+ - default: - ppIROp(op); - VG_(tool_panic)("memcheck:expr2vbits_Qop"); -@@ -2162,6 +2233,12 @@ - tl_assert(sameKindedAtoms(atom2,vatom2)); - tl_assert(sameKindedAtoms(atom3,vatom3)); - switch (op) { -+ case Iop_AddF128: -+ case Iop_SubF128: -+ case Iop_MulF128: -+ case Iop_DivF128: -+ /* I32(rm) x F128 x F128 -> F128 */ -+ return mkLazy3(mce, Ity_I128, vatom1, vatom2, vatom3); - case Iop_AddF64: - case Iop_AddF64r32: - case Iop_SubF64: -@@ -2847,6 +2924,14 @@ - - /* Scalar floating point */ - -+ case Iop_F32toI64S: -+ /* I32(rm) x F32 -> I64 */ -+ return mkLazy2(mce, Ity_I64, vatom1, vatom2); -+ -+ case Iop_I64StoF32: -+ /* I32(rm) x I64 -> F32 */ -+ return mkLazy2(mce, Ity_I32, vatom1, vatom2); -+ - case Iop_RoundF64toInt: - case Iop_RoundF64toF32: - case Iop_F64toI64S: -@@ -2864,6 +2949,26 @@ - /* I32(rm) x I32/F32 -> I32/F32 */ - return mkLazy2(mce, Ity_I32, vatom1, vatom2); - -+ case Iop_SqrtF128: -+ /* I32(rm) x F128 -> F128 */ -+ return mkLazy2(mce, Ity_I128, vatom1, vatom2); -+ -+ case Iop_I32StoF32: -+ case Iop_F32toI32S: -+ /* First arg is I32 (rounding mode), second is F32/I32 (data). */ -+ return mkLazy2(mce, Ity_I32, vatom1, vatom2); -+ -+ case Iop_F128toI32S: /* IRRoundingMode(I32) x F128 -> signed I32 */ -+ case Iop_F128toF32: /* IRRoundingMode(I32) x F128 -> F32 */ -+ return mkLazy2(mce, Ity_I32, vatom1, vatom2); -+ -+ case Iop_F128toI64S: /* IRRoundingMode(I32) x F128 -> signed I64 */ -+ case Iop_F128toF64: /* IRRoundingMode(I32) x F128 -> F64 */ -+ return mkLazy2(mce, Ity_I64, vatom1, vatom2); -+ -+ case Iop_F64HLtoF128: -+ return assignNew('V', mce, Ity_I128, binop(Iop_64HLto128, vatom1, vatom2)); -+ - case Iop_F64toI32U: - case Iop_F64toI32S: - case Iop_F64toF32: -@@ -2874,7 +2979,9 @@ - /* First arg is I32 (rounding mode), second is F64 (data). */ - return mkLazy2(mce, Ity_I16, vatom1, vatom2); - -+ case Iop_CmpF32: - case Iop_CmpF64: -+ case Iop_CmpF128: - return mkLazy2(mce, Ity_I32, vatom1, vatom2); - - /* non-FP after here */ -@@ -2892,6 +2999,7 @@ - case Iop_32HLto64: - return assignNew('V', mce, Ity_I64, binop(op, vatom1, vatom2)); - -+ case Iop_DivModS64to64: - case Iop_MullS64: - case Iop_MullU64: { - IRAtom* vLo64 = mkLeft64(mce, mkUifU64(mce, vatom1,vatom2)); -@@ -3142,6 +3250,21 @@ - case Iop_Reverse64_32x4: - return assignNew('V', mce, Ity_V128, unop(op, vatom)); - -+ case Iop_F128HItoF64: /* F128 -> high half of F128 */ -+ return assignNew('V', mce, Ity_I64, unop(Iop_128HIto64, vatom)); -+ case Iop_F128LOtoF64: /* F128 -> low half of F128 */ -+ return assignNew('V', mce, Ity_I64, unop(Iop_128to64, vatom)); -+ -+ case Iop_NegF128: -+ case Iop_AbsF128: -+ return mkPCastTo(mce, Ity_I128, vatom); -+ -+ case Iop_I32StoF128: /* signed I32 -> F128 */ -+ case Iop_I64StoF128: /* signed I64 -> F128 */ -+ case Iop_F32toF128: /* F32 -> F128 */ -+ case Iop_F64toF128: /* F64 -> F128 */ -+ return mkPCastTo(mce, Ity_I128, vatom); -+ - case Iop_F32toF64: - case Iop_I32StoF64: - case Iop_I32UtoF64: -@@ -3185,6 +3308,7 @@ - case Iop_Reverse64_32x2: - return assignNew('V', mce, Ity_I64, unop(op, vatom)); - -+ case Iop_I16StoF32: - case Iop_64to32: - case Iop_64HIto32: - case Iop_1Uto32: -@@ -4536,6 +4660,7 @@ - case Ico_U32: n = (ULong)con->Ico.U32; break; - case Ico_U64: n = (ULong)con->Ico.U64; break; - case Ico_F64: return False; -+ case Ico_F32i: return False; - case Ico_F64i: return False; - case Ico_V128: return False; - default: ppIRExpr(at); tl_assert(0); ---- memcheck/tests/atomic_incs.c -+++ memcheck/tests/atomic_incs.c -@@ -76,6 +76,20 @@ - } while (success != 1); - #elif defined(VGA_arm) - *p += n; -+#elif defined(VGA_s390x) -+ int dummy; -+ __asm__ __volatile__( -+ " l 0,%0\n\t" -+ "0: st 0,%1\n\t" -+ " icm 1,1,%1\n\t" -+ " ar 1,%2\n\t" -+ " stcm 1,1,%1\n\t" -+ " l 1,%1\n\t" -+ " cs 0,1,%0\n\t" -+ " jl 0b\n\t" -+ : "+m" (*p), "+m" (dummy) -+ : "d" (n) -+ : "cc", "memory", "0", "1"); - #else - # error "Unsupported arch" - #endif -@@ -140,6 +154,20 @@ - } while (success != 1); - #elif defined(VGA_arm) - *p += n; -+#elif defined(VGA_s390x) -+ int dummy; -+ __asm__ __volatile__( -+ " l 0,%0\n\t" -+ "0: st 0,%1\n\t" -+ " icm 1,3,%1\n\t" -+ " ar 1,%2\n\t" -+ " stcm 1,3,%1\n\t" -+ " l 1,%1\n\t" -+ " cs 0,1,%0\n\t" -+ " jl 0b\n\t" -+ : "+m" (*p), "+m" (dummy) -+ : "d" (n) -+ : "cc", "memory", "0", "1"); - #else - # error "Unsupported arch" - #endif -@@ -216,6 +244,16 @@ - : /*trash*/ "memory", "cc", "r5", "r8", "r9", "r10" - ); - } while (block[2] != 0); -+#elif defined(VGA_s390x) -+ __asm__ __volatile__( -+ " l 0,%0\n\t" -+ "0: lr 1,0\n\t" -+ " ar 1,%1\n\t" -+ " cs 0,1,%0\n\t" -+ " jl 0b\n\t" -+ : "+m" (*p) -+ : "d" (n) -+ : "cc", "memory", "0", "1"); - #else - # error "Unsupported arch" - #endif -@@ -252,6 +290,16 @@ - : /*trash*/ "memory", "cc", "r15" - ); - } while (success != 1); -+#elif defined(VGA_s390x) -+ __asm__ __volatile__( -+ " lg 0,%0\n\t" -+ "0: lgr 1,0\n\t" -+ " agr 1,%1\n\t" -+ " csg 0,1,%0\n\t" -+ " jl 0b\n\t" -+ : "+m" (*p) -+ : "d" (n) -+ : "cc", "memory", "0", "1"); - #else - # error "Unsupported arch" - #endif ---- memcheck/tests/badjump2.stderr.exp-s390x -+++ memcheck/tests/badjump2.stderr.exp-s390x -@@ -0,0 +1,6 @@ -+Jump to the invalid address stated on the next line -+ at 0x........: ??? -+ by 0x........: main (badjump2.c:46) -+ Address 0x........ is not stack'd, malloc'd or (recently) free'd -+ -+Signal caught, as expected ---- memcheck/tests/badjump.stderr.exp-s390x -+++ memcheck/tests/badjump.stderr.exp-s390x -@@ -0,0 +1,25 @@ -+ -+Jump to the invalid address stated on the next line -+ at 0x........: ??? -+ by 0x........: main (badjump.c:17) -+ Address 0x........ is not stack'd, malloc'd or (recently) free'd -+ -+ -+Process terminating with default action of signal 11 (SIGSEGV) -+ Access not within mapped region at address 0x........ -+ at 0x........: ??? -+ by 0x........: main (badjump.c:17) -+ If you believe this happened as a result of a stack -+ overflow in your program's main thread (unlikely but -+ possible), you can try to increase the size of the -+ main thread stack using the --main-stacksize= flag. -+ The main thread stack size used in this run was .... -+ -+HEAP SUMMARY: -+ in use at exit: ... bytes in ... blocks -+ total heap usage: ... allocs, ... frees, ... bytes allocated -+ -+For a detailed leak analysis, rerun with: --leak-check=full -+ -+For counts of detected and suppressed errors, rerun with: -v -+ERROR SUMMARY: 1 errors from 1 contexts (suppressed: 0 from 0) ---- memcheck/tests/linux/capget.c -+++ memcheck/tests/linux/capget.c -@@ -4,6 +4,7 @@ - #include /* printf() */ - #include /* syscall() */ - #include /* __NR_capget */ -+#include /* uid_t */ - #include /* _LINUX_CAPABILITY_VERSION */ - - -@@ -13,6 +14,8 @@ - struct __user_cap_data_struct d; - int syscall_result; - -+ if (getuid() == 0) -+ fprintf(stderr, "Running as root\n"); - h.version = _LINUX_CAPABILITY_VERSION; - h.pid = 0; - syscall_result = syscall(__NR_capget, &h, &d); ---- memcheck/tests/linux/capget.stderr.exp2 -+++ memcheck/tests/linux/capget.stderr.exp2 -@@ -0,0 +1,15 @@ -+ -+Running as root -+capget result: -+effective 0x........ -+permitted 0x........ -+inheritable 0 -+ -+HEAP SUMMARY: -+ in use at exit: ... bytes in ... blocks -+ total heap usage: ... allocs, ... frees, ... bytes allocated -+ -+For a detailed leak analysis, rerun with: --leak-check=full -+ -+For counts of detected and suppressed errors, rerun with: -v -+ERROR SUMMARY: 0 errors from 0 contexts (suppressed: 0 from 0) ---- memcheck/tests/linux/timerfd-syscall.c -+++ memcheck/tests/linux/timerfd-syscall.c -@@ -61,6 +61,8 @@ - #define __NR_timerfd_create 322 - #elif defined(__powerpc__) - #define __NR_timerfd_create 306 -+#elif defined(__s390x__) -+#define __NR_timerfd_create 319 - #else - #error Cannot detect your architecture! - #endif -@@ -76,6 +78,9 @@ - #elif defined(__powerpc__) - #define __NR_timerfd_settime 311 - #define __NR_timerfd_gettime 312 -+#elif defined(__s390x__) -+#define __NR_timerfd_settime 320 -+#define __NR_timerfd_gettime 321 - #else - #error Cannot detect your architecture! - #endif ---- memcheck/tests/Makefile.am -+++ memcheck/tests/Makefile.am -@@ -295,8 +295,9 @@ - origin5_bz2_CFLAGS = $(AM_CFLAGS) -O -Wno-inline - origin6_fp_CFLAGS = $(AM_CFLAGS) -O - --# Don't allow GCC to inline memcpy(), because then we can't intercept it --overlap_CFLAGS = $(AM_CFLAGS) -fno-builtin-memcpy -+# Don't allow GCC to inline memcpy() and strcpy(), -+# because then we can't intercept it -+overlap_CFLAGS = $(AM_CFLAGS) -fno-builtin-memcpy -fno-builtin-strcpy - - str_tester_CFLAGS = $(AM_CFLAGS) -Wno-shadow - ---- memcheck/tests/Makefile.am.orig -+++ memcheck/tests/Makefile.am.orig -@@ -0,0 +1,421 @@ -+ -+include $(top_srcdir)/Makefile.tool-tests.am -+ -+SUBDIRS = . -+ -+# Arch-specific tests. -+if VGCONF_ARCHS_INCLUDE_X86 -+SUBDIRS += x86 -+endif -+if VGCONF_ARCHS_INCLUDE_AMD64 -+SUBDIRS += amd64 -+endif -+ -+if VGCONF_ARCHS_INCLUDE_PPC32 -+SUBDIRS += ppc32 -+endif -+if VGCONF_ARCHS_INCLUDE_PPC64 -+SUBDIRS += ppc64 -+endif -+ -+# OS-specific tests -+if VGCONF_OS_IS_LINUX -+SUBDIRS += linux -+endif -+if VGCONF_OS_IS_DARWIN -+SUBDIRS += darwin -+endif -+ -+# Platform-specific tests -+if VGCONF_PLATFORMS_INCLUDE_X86_LINUX -+SUBDIRS += x86-linux -+endif -+if VGCONF_PLATFORMS_INCLUDE_AMD64_LINUX -+SUBDIRS += amd64-linux -+endif -+ -+DIST_SUBDIRS = x86 amd64 ppc32 ppc64 linux darwin x86-linux amd64-linux . -+ -+dist_noinst_SCRIPTS = \ -+ filter_addressable \ -+ filter_allocs \ -+ filter_leak_cases_possible \ -+ filter_stderr filter_xml \ -+ filter_varinfo3 -+ -+noinst_HEADERS = leak.h -+ -+EXTRA_DIST = \ -+ addressable.stderr.exp addressable.stdout.exp addressable.vgtest \ -+ atomic_incs.stderr.exp atomic_incs.vgtest \ -+ atomic_incs.stdout.exp-32bit atomic_incs.stdout.exp-64bit \ -+ badaddrvalue.stderr.exp \ -+ badaddrvalue.stdout.exp badaddrvalue.vgtest \ -+ badfree-2trace.stderr.exp badfree-2trace.vgtest \ -+ badfree.stderr.exp badfree.vgtest \ -+ badfree3.stderr.exp badfree3.vgtest \ -+ badjump.stderr.exp badjump.vgtest \ -+ badjump2.stderr.exp badjump2.vgtest \ -+ badloop.stderr.exp badloop.vgtest \ -+ badpoll.stderr.exp badpoll.vgtest \ -+ badrw.stderr.exp badrw.vgtest \ -+ brk2.stderr.exp brk2.vgtest \ -+ buflen_check.stderr.exp buflen_check.vgtest \ -+ calloc-overflow.stderr.exp calloc-overflow.vgtest\ -+ clientperm.stderr.exp \ -+ clientperm.stdout.exp clientperm.vgtest \ -+ custom_alloc.stderr.exp custom_alloc.vgtest \ -+ custom-overlap.stderr.exp custom-overlap.vgtest \ -+ deep_templates.vgtest \ -+ deep_templates.stdout.exp deep_templates.stderr.exp \ -+ describe-block.stderr.exp describe-block.vgtest \ -+ doublefree.stderr.exp doublefree.vgtest \ -+ erringfds.stderr.exp erringfds.stdout.exp erringfds.vgtest \ -+ error_counts.stderr.exp error_counts.vgtest \ -+ errs1.stderr.exp errs1.vgtest \ -+ exitprog.stderr.exp exitprog.vgtest \ -+ execve.stderr.exp execve.vgtest \ -+ execve2.stderr.exp execve2.vgtest \ -+ file_locking.stderr.exp file_locking.vgtest \ -+ fprw.stderr.exp fprw.vgtest \ -+ fwrite.stderr.exp fwrite.vgtest \ -+ inits.stderr.exp inits.vgtest \ -+ inline.stderr.exp inline.stdout.exp inline.vgtest \ -+ leak-0.vgtest leak-0.stderr.exp \ -+ leak-cases-full.vgtest leak-cases-full.stderr.exp \ -+ leak-cases-possible.vgtest leak-cases-possible.stderr.exp \ -+ leak-cases-summary.vgtest leak-cases-summary.stderr.exp \ -+ leak-cycle.vgtest leak-cycle.stderr.exp \ -+ leak-pool-0.vgtest leak-pool-0.stderr.exp \ -+ leak-pool-1.vgtest leak-pool-1.stderr.exp \ -+ leak-pool-2.vgtest leak-pool-2.stderr.exp \ -+ leak-pool-3.vgtest leak-pool-3.stderr.exp \ -+ leak-pool-4.vgtest leak-pool-4.stderr.exp \ -+ leak-pool-5.vgtest leak-pool-5.stderr.exp \ -+ leak-tree.vgtest leak-tree.stderr.exp \ -+ linux-syslog-syscall linux-syslog-syscall.stderr.exp \ -+ linux-syscalls-2007 linux-syscalls-2007.stderr.exp \ -+ long_namespace_xml.vgtest long_namespace_xml.stdout.exp \ -+ long_namespace_xml.stderr.exp \ -+ long-supps.vgtest long-supps.stderr.exp long-supps.supp \ -+ mallinfo.stderr.exp mallinfo.vgtest \ -+ malloc_free_fill.vgtest \ -+ malloc_free_fill.stderr.exp \ -+ malloc_usable.stderr.exp malloc_usable.vgtest \ -+ malloc1.stderr.exp malloc1.vgtest \ -+ malloc2.stderr.exp malloc2.vgtest \ -+ malloc3.stderr.exp malloc3.stdout.exp malloc3.vgtest \ -+ manuel1.stderr.exp manuel1.stdout.exp manuel1.vgtest \ -+ manuel2.stderr.exp manuel2.stderr.exp64 manuel2.stdout.exp manuel2.vgtest \ -+ manuel3.stderr.exp manuel3.vgtest \ -+ match-overrun.stderr.exp match-overrun.vgtest match-overrun.supp \ -+ memalign_test.stderr.exp memalign_test.vgtest \ -+ memalign2.stderr.exp memalign2.vgtest \ -+ memcmptest.stderr.exp memcmptest.stderr.exp2 \ -+ memcmptest.stdout.exp memcmptest.vgtest \ -+ mempool.stderr.exp mempool.vgtest \ -+ metadata.stderr.exp metadata.stdout.exp metadata.vgtest \ -+ mismatches.stderr.exp mismatches.vgtest \ -+ mmaptest.stderr.exp mmaptest.vgtest \ -+ nanoleak_supp.stderr.exp nanoleak_supp.vgtest nanoleak.supp \ -+ nanoleak2.stderr.exp nanoleak2.vgtest \ -+ new_nothrow.stderr.exp new_nothrow.vgtest \ -+ new_override.stderr.exp new_override.stdout.exp new_override.vgtest \ -+ noisy_child.vgtest noisy_child.stderr.exp noisy_child.stdout.exp \ -+ null_socket.stderr.exp null_socket.vgtest \ -+ origin1-yes.vgtest origin1-yes.stdout.exp origin1-yes.stderr.exp \ -+ origin2-not-quite.vgtest origin2-not-quite.stdout.exp \ -+ origin2-not-quite.stderr.exp \ -+ origin3-no.vgtest origin3-no.stdout.exp \ -+ origin3-no.stderr.exp \ -+ origin4-many.vgtest origin4-many.stdout.exp \ -+ origin4-many.stderr.exp \ -+ origin5-bz2.vgtest origin5-bz2.stdout.exp \ -+ origin5-bz2.stderr.exp-glibc25-x86 \ -+ origin5-bz2.stderr.exp-glibc25-amd64 \ -+ origin5-bz2.stderr.exp-glibc27-ppc64 \ -+ origin6-fp.vgtest origin6-fp.stdout.exp \ -+ origin6-fp.stderr.exp-glibc25-amd64 \ -+ origin6-fp.stderr.exp-glibc27-ppc64 \ -+ overlap.stderr.exp overlap.stdout.exp overlap.vgtest \ -+ partiallydefinedeq.vgtest partiallydefinedeq.stderr.exp \ -+ partiallydefinedeq.stderr.exp2 \ -+ partiallydefinedeq.stdout.exp \ -+ partial_load_ok.vgtest partial_load_ok.stderr.exp partial_load_ok.stderr.exp64 \ -+ partial_load_dflt.vgtest partial_load_dflt.stderr.exp partial_load_dflt.stderr.exp64 \ -+ pdb-realloc.stderr.exp pdb-realloc.vgtest \ -+ pdb-realloc2.stderr.exp pdb-realloc2.stdout.exp pdb-realloc2.vgtest \ -+ pipe.stderr.exp pipe.vgtest \ -+ pointer-trace.vgtest \ -+ pointer-trace.stderr.exp \ -+ post-syscall.stderr.exp post-syscall.vgtest \ -+ realloc1.stderr.exp realloc1.vgtest \ -+ realloc2.stderr.exp realloc2.vgtest \ -+ realloc3.stderr.exp realloc3.vgtest \ -+ sh-mem.stderr.exp sh-mem.vgtest \ -+ sh-mem-random.stderr.exp sh-mem-random.stdout.exp64 \ -+ sh-mem-random.stdout.exp sh-mem-random.vgtest \ -+ sigaltstack.stderr.exp sigaltstack.vgtest \ -+ sigkill.stderr.exp sigkill.stderr.exp-darwin sigkill.vgtest \ -+ signal2.stderr.exp signal2.stdout.exp signal2.vgtest \ -+ sigprocmask.stderr.exp sigprocmask.stderr.exp2 sigprocmask.vgtest \ -+ strchr.stderr.exp strchr.stderr.exp2 strchr.stderr.exp-darwin \ -+ strchr.vgtest \ -+ str_tester.stderr.exp str_tester.vgtest \ -+ supp-dir.vgtest supp-dir.stderr.exp \ -+ supp_unknown.stderr.exp supp_unknown.vgtest supp_unknown.supp \ -+ supp1.stderr.exp supp1.vgtest \ -+ supp2.stderr.exp supp2.vgtest \ -+ supp.supp \ -+ suppfree.stderr.exp suppfree.vgtest \ -+ trivialleak.stderr.exp trivialleak.vgtest \ -+ unit_libcbase.stderr.exp unit_libcbase.vgtest \ -+ unit_oset.stderr.exp unit_oset.stdout.exp unit_oset.vgtest \ -+ varinfo1.vgtest varinfo1.stdout.exp varinfo1.stderr.exp varinfo1.stderr.exp-ppc64\ -+ varinfo2.vgtest varinfo2.stdout.exp varinfo2.stderr.exp varinfo2.stderr.exp-ppc64\ -+ varinfo3.vgtest varinfo3.stdout.exp varinfo3.stderr.exp varinfo3.stderr.exp-ppc64\ -+ varinfo4.vgtest varinfo4.stdout.exp varinfo4.stderr.exp varinfo4.stderr.exp-ppc64\ -+ varinfo5.vgtest varinfo5.stdout.exp varinfo5.stderr.exp varinfo5.stderr.exp-ppc64\ -+ varinfo6.vgtest varinfo6.stdout.exp varinfo6.stderr.exp varinfo6.stderr.exp-ppc64\ -+ vcpu_bz2.stdout.exp vcpu_bz2.stderr.exp vcpu_bz2.vgtest \ -+ vcpu_fbench.stdout.exp vcpu_fbench.stderr.exp vcpu_fbench.vgtest \ -+ vcpu_fnfns.stdout.exp vcpu_fnfns.stdout.exp-glibc28-amd64 \ -+ vcpu_fnfns.stdout.exp-darwin vcpu_fnfns.stderr.exp vcpu_fnfns.vgtest \ -+ wrap1.vgtest wrap1.stdout.exp wrap1.stderr.exp \ -+ wrap2.vgtest wrap2.stdout.exp wrap2.stderr.exp \ -+ wrap3.vgtest wrap3.stdout.exp wrap3.stderr.exp \ -+ wrap4.vgtest wrap4.stdout.exp wrap4.stderr.exp \ -+ wrap5.vgtest wrap5.stdout.exp wrap5.stderr.exp \ -+ wrap6.vgtest wrap6.stdout.exp wrap6.stderr.exp \ -+ wrap7.vgtest wrap7.stdout.exp wrap7.stderr.exp \ -+ wrap8.vgtest wrap8.stdout.exp wrap8.stderr.exp \ -+ wrap8.stdout.exp2 wrap8.stderr.exp2 \ -+ writev.stderr.exp writev.vgtest \ -+ xml1.stderr.exp xml1.stdout.exp xml1.vgtest -+ -+check_PROGRAMS = \ -+ addressable \ -+ atomic_incs \ -+ badaddrvalue badfree badjump badjump2 \ -+ badloop \ -+ badpoll \ -+ badrw \ -+ brk2 \ -+ buflen_check \ -+ calloc-overflow \ -+ clientperm \ -+ custom_alloc \ -+ custom-overlap \ -+ deep_templates \ -+ describe-block \ -+ doublefree error_counts errs1 exitprog execve execve2 erringfds \ -+ file_locking \ -+ fprw fwrite inits inline \ -+ leak-0 \ -+ leak-cases \ -+ leak-cycle \ -+ leak-pool \ -+ leak-tree \ -+ linux-syslog-syscall \ -+ linux-syscalls-2007 \ -+ long_namespace_xml \ -+ long-supps \ -+ mallinfo \ -+ malloc_free_fill \ -+ malloc_usable malloc1 malloc2 malloc3 manuel1 manuel2 manuel3 \ -+ match-overrun \ -+ memalign_test memalign2 memcmptest mempool mmaptest \ -+ mismatches new_override metadata \ -+ nanoleak_supp nanoleak2 new_nothrow \ -+ noisy_child \ -+ null_socket \ -+ origin1-yes origin2-not-quite origin3-no \ -+ origin4-many origin5-bz2 origin6-fp \ -+ overlap \ -+ partiallydefinedeq \ -+ partial_load pdb-realloc pdb-realloc2 \ -+ pipe pointer-trace \ -+ post-syscall \ -+ realloc1 realloc2 realloc3 \ -+ sh-mem sh-mem-random \ -+ sigaltstack signal2 sigprocmask sigkill \ -+ strchr \ -+ str_tester \ -+ supp_unknown supp1 supp2 suppfree \ -+ trivialleak \ -+ unit_libcbase unit_oset \ -+ varinfo1 varinfo2 varinfo3 varinfo4 \ -+ varinfo5 varinfo5so.so varinfo6 \ -+ vcpu_fbench vcpu_fnfns \ -+ xml1 \ -+ wrap1 wrap2 wrap3 wrap4 wrap5 wrap6 wrap7 wrap7so.so wrap8 \ -+ writev -+ -+ -+AM_CFLAGS += $(AM_FLAG_M3264_PRI) -+AM_CXXFLAGS += $(AM_FLAG_M3264_PRI) -+ -+if VGCONF_PLATFORMS_INCLUDE_ARM_LINUX -+AM_CFLAGS += -mfloat-abi=softfp -+AM_CXXFLAGS += -mfloat-abi=softfp -+endif -+ -+if VGCONF_OS_IS_DARWIN -+atomic_incs_CFLAGS = $(AM_CFLAGS) -mdynamic-no-pic -+else -+atomic_incs_CFLAGS = $(AM_CFLAGS) -+endif -+ -+deep_templates_SOURCES = deep_templates.cpp -+deep_templates_CXXFLAGS = $(AM_CFLAGS) -O -gstabs -+ -+error_counts_CFLAGS = $(AM_CFLAGS) @FLAG_W_NO_UNINITIALIZED@ -+ -+inits_CFLAGS = $(AM_CFLAGS) @FLAG_W_NO_UNINITIALIZED@ -+ -+long_namespace_xml_SOURCES = long_namespace_xml.cpp -+ -+manuel1_CFLAGS = $(AM_CFLAGS) @FLAG_W_NO_UNINITIALIZED@ -+ -+memcmptest_CFLAGS = $(AM_CFLAGS) -fno-builtin-memcmp -+ -+mismatches_SOURCES = mismatches.cpp -+ -+new_nothrow_SOURCES = new_nothrow.cpp -+new_override_SOURCES = new_override.cpp -+ -+origin2_not_quite_CFLAGS = $(AM_CFLAGS) @FLAG_W_NO_UNINITIALIZED@ -+ -+origin3_no_CFLAGS = $(AM_CFLAGS) @FLAG_W_NO_UNINITIALIZED@ -+ -+# This requires optimisation in order to get just one resulting error. -+origin4_many_CFLAGS = $(AM_CFLAGS) -O -+ -+# Apply -O so as to run in reasonable time. -+origin5_bz2_CFLAGS = $(AM_CFLAGS) -O -Wno-inline -+origin6_fp_CFLAGS = $(AM_CFLAGS) -O -+ -+# Don't allow GCC to inline memcpy(), because then we can't intercept it -+overlap_CFLAGS = $(AM_CFLAGS) -fno-builtin-memcpy -+ -+str_tester_CFLAGS = $(AM_CFLAGS) -Wno-shadow -+ -+supp_unknown_SOURCES = badjump.c -+supp1_SOURCES = supp.c -+supp2_SOURCES = supp.c -+ -+vcpu_bz2_CFLAGS = $(AM_CFLAGS) -O2 -+vcpu_fbench_CFLAGS = $(AM_CFLAGS) -O2 -+vcpu_fnfns_CFLAGS = $(AM_CFLAGS) -O2 -+vcpu_fnfns_LDADD = -lm -+wrap6_CFLAGS = $(AM_CFLAGS) -O2 -+ -+# To make it a bit more realistic, have some optimisation enabled -+# for the varinfo tests. We still expect sane results. -+varinfo1_CFLAGS = $(AM_CFLAGS) -O -+varinfo2_CFLAGS = $(AM_CFLAGS) -O -Wno-shadow -+varinfo3_CFLAGS = $(AM_CFLAGS) -O -+varinfo4_CFLAGS = $(AM_CFLAGS) -O -+varinfo5_CFLAGS = $(AM_CFLAGS) -O -+varinfo6_CFLAGS = $(AM_CFLAGS) -O -+ -+if VGCONF_PLATFORMS_INCLUDE_PPC32_AIX5 -+if VGCONF_PLATFORMS_INCLUDE_PPC64_AIX5 -+else -+ # persuade the AIX linker not to junk apparently unused -+ # function descriptors. Unfortunately -Wl,-G -Wl,-bnogc -+ # produces a link error on 64-bit AIX, hence only 32-bit -+ # gets these flags. -+ wrap1_LDFLAGS = $(AM_FLAG_M3264_PRI) -Wl,-G -Wl,-bnogc -+ wrap2_LDFLAGS = $(AM_FLAG_M3264_PRI) -Wl,-G -Wl,-bnogc -+ wrap3_LDFLAGS = $(AM_FLAG_M3264_PRI) -Wl,-G -Wl,-bnogc -+ wrap4_LDFLAGS = $(AM_FLAG_M3264_PRI) -Wl,-G -Wl,-bnogc -+ wrap5_LDFLAGS = $(AM_FLAG_M3264_PRI) -Wl,-G -Wl,-bnogc -+ wrap6_LDFLAGS = $(AM_FLAG_M3264_PRI) -Wl,-G -Wl,-bnogc -+ wrap8_LDFLAGS = $(AM_FLAG_M3264_PRI) -Wl,-G -Wl,-bnogc -+endif -+endif -+ -+# Build shared object for varinfo5 -+varinfo5_SOURCES = varinfo5.c -+varinfo5_DEPENDENCIES = varinfo5so.so -+if VGCONF_PLATFORMS_INCLUDE_PPC64_AIX5 -+ varinfo5_LDADD = `pwd`/varinfo5so.so -+ varinfo5_LDFLAGS = $(AM_FLAG_M3264_PRI) -+else -+if VGCONF_PLATFORMS_INCLUDE_PPC32_AIX5 -+ varinfo5_LDADD = `pwd`/varinfo5so.so -+ varinfo5_LDFLAGS = $(AM_FLAG_M3264_PRI) -Wl,-G -Wl,-bnogc -+else -+if VGCONF_OS_IS_DARWIN -+ varinfo5_LDADD = `pwd`/varinfo5so.so -+ varinfo5_LDFLAGS = $(AM_FLAG_M3264_PRI) -+else -+ varinfo5_LDADD = varinfo5so.so -+ varinfo5_LDFLAGS = $(AM_FLAG_M3264_PRI) \ -+ -Wl,-rpath,$(top_builddir)/memcheck/tests -+endif -+endif -+ -+varinfo5so_so_SOURCES = varinfo5so.c -+varinfo5so_so_CFLAGS = $(AM_CFLAGS) -fpic -O -Wno-shadow -+if VGCONF_PLATFORMS_INCLUDE_PPC64_AIX5 -+ varinfo5so_so_LDFLAGS = -fpic $(AM_FLAG_M3264_PRI) -shared -+else -+if VGCONF_PLATFORMS_INCLUDE_PPC32_AIX5 -+ varinfo5so_so_LDFLAGS = -fpic $(AM_FLAG_M3264_PRI) -shared \ -+ -Wl,-G -Wl,-bnogc -+else -+if VGCONF_OS_IS_DARWIN -+ varinfo5so_so_LDFLAGS = -fpic $(AM_FLAG_M3264_PRI) -dynamic \ -+ -dynamiclib -all_load -+else -+ varinfo5so_so_LDFLAGS = -fpic $(AM_FLAG_M3264_PRI) -shared \ -+ -Wl,-soname -Wl,varinfo5so.so -+endif -+endif -+endif -+ -+# Build shared object for wrap7 -+wrap7_SOURCES = wrap7.c -+wrap7_DEPENDENCIES = wrap7so.so -+if VGCONF_PLATFORMS_INCLUDE_PPC64_AIX5 -+ wrap7_LDADD = `pwd`/wrap7so.so -+ wrap7_LDFLAGS = $(AM_FLAG_M3264_PRI) -+else -+if VGCONF_PLATFORMS_INCLUDE_PPC32_AIX5 -+ wrap7_LDADD = `pwd`/wrap7so.so -+ wrap7_LDFLAGS = $(AM_FLAG_M3264_PRI) -Wl,-G -Wl,-bnogc -+else -+if VGCONF_OS_IS_DARWIN -+ wrap7_LDADD = `pwd`/wrap7so.so -+ wrap7_LDFLAGS = $(AM_FLAG_M3264_PRI) -+else -+ wrap7_LDADD = wrap7so.so -+ wrap7_LDFLAGS = $(AM_FLAG_M3264_PRI) \ -+ -Wl,-rpath,$(top_builddir)/memcheck/tests -+endif -+endif -+endif -+ -+wrap7so_so_SOURCES = wrap7so.c -+wrap7so_so_CFLAGS = $(AM_CFLAGS) -fpic -+if VGCONF_PLATFORMS_INCLUDE_PPC64_AIX5 -+ wrap7so_so_LDFLAGS = -fpic $(AM_FLAG_M3264_PRI) -shared -+else -+if VGCONF_PLATFORMS_INCLUDE_PPC32_AIX5 -+ wrap7so_so_LDFLAGS = -fpic $(AM_FLAG_M3264_PRI) -shared \ -+ -Wl,-G -Wl,-bnogc -+else -+if VGCONF_OS_IS_DARWIN -+ wrap7so_so_LDFLAGS = -fpic $(AM_FLAG_M3264_PRI) -dynamic \ -+ -dynamiclib -all_load -+else -+ wrap7so_so_LDFLAGS = -fpic $(AM_FLAG_M3264_PRI) -shared \ -+ -Wl,-soname -Wl,wrap7so.so -+endif -+endif -+endif -+ -+endif -+ ---- memcheck/tests/origin5-bz2.stderr.exp-glibc212-s390x -+++ memcheck/tests/origin5-bz2.stderr.exp-glibc212-s390x -@@ -0,0 +1,133 @@ -+Conditional jump or move depends on uninitialised value(s) -+ at 0x........: main (origin5-bz2.c:6481) -+ Uninitialised value was created by a client request -+ at 0x........: main (origin5-bz2.c:6479) -+ -+Conditional jump or move depends on uninitialised value(s) -+ at 0x........: handle_compress (origin5-bz2.c:4686) -+ by 0x........: BZ2_bzCompress (origin5-bz2.c:4822) -+ by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630) -+ by 0x........: main (origin5-bz2.c:6484) -+ Uninitialised value was created by a client request -+ at 0x........: main (origin5-bz2.c:6479) -+ -+Use of uninitialised value of size 8 -+ at 0x........: handle_compress (origin5-bz2.c:4686) -+ by 0x........: BZ2_bzCompress (origin5-bz2.c:4822) -+ by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630) -+ by 0x........: main (origin5-bz2.c:6484) -+ Uninitialised value was created by a client request -+ at 0x........: main (origin5-bz2.c:6479) -+ -+Use of uninitialised value of size 8 -+ at 0x........: handle_compress (origin5-bz2.c:4686) -+ by 0x........: BZ2_bzCompress (origin5-bz2.c:4822) -+ by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630) -+ by 0x........: main (origin5-bz2.c:6484) -+ Uninitialised value was created by a client request -+ at 0x........: main (origin5-bz2.c:6479) -+ -+Use of uninitialised value of size 8 -+ at 0x........: mainSort (origin5-bz2.c:2820) -+ by 0x........: BZ2_blockSort (origin5-bz2.c:3105) -+ by 0x........: BZ2_compressBlock (origin5-bz2.c:4034) -+ by 0x........: handle_compress (origin5-bz2.c:4753) -+ by 0x........: BZ2_bzCompress (origin5-bz2.c:4822) -+ by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630) -+ by 0x........: main (origin5-bz2.c:6484) -+ Uninitialised value was created by a client request -+ at 0x........: main (origin5-bz2.c:6479) -+ -+Use of uninitialised value of size 8 -+ at 0x........: mainSort (origin5-bz2.c:2823) -+ by 0x........: BZ2_blockSort (origin5-bz2.c:3105) -+ by 0x........: BZ2_compressBlock (origin5-bz2.c:4034) -+ by 0x........: handle_compress (origin5-bz2.c:4753) -+ by 0x........: BZ2_bzCompress (origin5-bz2.c:4822) -+ by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630) -+ by 0x........: main (origin5-bz2.c:6484) -+ Uninitialised value was created by a client request -+ at 0x........: main (origin5-bz2.c:6479) -+ -+Use of uninitialised value of size 8 -+ at 0x........: mainSort (origin5-bz2.c:2854) -+ by 0x........: BZ2_blockSort (origin5-bz2.c:3105) -+ by 0x........: BZ2_compressBlock (origin5-bz2.c:4034) -+ by 0x........: handle_compress (origin5-bz2.c:4753) -+ by 0x........: BZ2_bzCompress (origin5-bz2.c:4822) -+ by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630) -+ by 0x........: main (origin5-bz2.c:6484) -+ Uninitialised value was created by a client request -+ at 0x........: main (origin5-bz2.c:6479) -+ -+Use of uninitialised value of size 8 -+ at 0x........: mainSort (origin5-bz2.c:2858) -+ by 0x........: BZ2_blockSort (origin5-bz2.c:3105) -+ by 0x........: BZ2_compressBlock (origin5-bz2.c:4034) -+ by 0x........: handle_compress (origin5-bz2.c:4753) -+ by 0x........: BZ2_bzCompress (origin5-bz2.c:4822) -+ by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630) -+ by 0x........: main (origin5-bz2.c:6484) -+ Uninitialised value was created by a client request -+ at 0x........: main (origin5-bz2.c:6479) -+ -+Use of uninitialised value of size 8 -+ at 0x........: mainSort (origin5-bz2.c:2859) -+ by 0x........: BZ2_blockSort (origin5-bz2.c:3105) -+ by 0x........: BZ2_compressBlock (origin5-bz2.c:4034) -+ by 0x........: handle_compress (origin5-bz2.c:4753) -+ by 0x........: BZ2_bzCompress (origin5-bz2.c:4822) -+ by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630) -+ by 0x........: main (origin5-bz2.c:6484) -+ Uninitialised value was created by a client request -+ at 0x........: main (origin5-bz2.c:6479) -+ -+Use of uninitialised value of size 8 -+ at 0x........: mainSort (origin5-bz2.c:2963) -+ by 0x........: BZ2_blockSort (origin5-bz2.c:3105) -+ by 0x........: BZ2_compressBlock (origin5-bz2.c:4034) -+ by 0x........: handle_compress (origin5-bz2.c:4753) -+ by 0x........: BZ2_bzCompress (origin5-bz2.c:4822) -+ by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630) -+ by 0x........: main (origin5-bz2.c:6484) -+ Uninitialised value was created by a client request -+ at 0x........: main (origin5-bz2.c:6479) -+ -+Use of uninitialised value of size 8 -+ at 0x........: mainSort (origin5-bz2.c:2964) -+ by 0x........: BZ2_blockSort (origin5-bz2.c:3105) -+ by 0x........: BZ2_compressBlock (origin5-bz2.c:4034) -+ by 0x........: handle_compress (origin5-bz2.c:4753) -+ by 0x........: BZ2_bzCompress (origin5-bz2.c:4822) -+ by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630) -+ by 0x........: main (origin5-bz2.c:6484) -+ Uninitialised value was created by a client request -+ at 0x........: main (origin5-bz2.c:6479) -+ -+Use of uninitialised value of size 8 -+ at 0x........: fallbackSort (origin5-bz2.c:2269) -+ by 0x........: BZ2_blockSort (origin5-bz2.c:3116) -+ by 0x........: BZ2_compressBlock (origin5-bz2.c:4034) -+ by 0x........: handle_compress (origin5-bz2.c:4753) -+ by 0x........: BZ2_bzCompress (origin5-bz2.c:4822) -+ by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630) -+ by 0x........: main (origin5-bz2.c:6484) -+ Uninitialised value was created by a client request -+ at 0x........: main (origin5-bz2.c:6479) -+ -+Use of uninitialised value of size 8 -+ at 0x........: fallbackSort (origin5-bz2.c:2275) -+ by 0x........: BZ2_blockSort (origin5-bz2.c:3116) -+ by 0x........: BZ2_compressBlock (origin5-bz2.c:4034) -+ by 0x........: handle_compress (origin5-bz2.c:4753) -+ by 0x........: BZ2_bzCompress (origin5-bz2.c:4822) -+ by 0x........: BZ2_bzBuffToBuffCompress (origin5-bz2.c:5630) -+ by 0x........: main (origin5-bz2.c:6484) -+ Uninitialised value was created by a client request -+ at 0x........: main (origin5-bz2.c:6479) -+ -+Conditional jump or move depends on uninitialised value(s) -+ at 0x........: main (origin5-bz2.c:6512) -+ Uninitialised value was created by a client request -+ at 0x........: main (origin5-bz2.c:6479) -+ ---- memcheck/tests/partiallydefinedeq.c -+++ memcheck/tests/partiallydefinedeq.c -@@ -64,9 +64,16 @@ - // and so never appears as a literal, and so the instrumenter - // never spots it and so doesn't use the expensive scheme (for foo). - // Hence also on ARM we get 3 errors, not 2. -+// -+// s390x is even more complicated: Depending on the architecture -+// level we have the 0x80808080 either in the literal pool (3 errors) -+// or with the extended immediate facility in an instruction (2 errors). - static __attribute__((noinline)) void bar ( void ) - { - #if defined(__powerpc__) || defined(__powerpc64__) || defined(__arm__) - fprintf(stderr, "Currently running on ppc32/64/arm: this test should give 3 errors, not 2.\n"); - #endif -+#if defined(__s390__) -+ fprintf(stderr, "On s390 we might see 2 or 3 errors.\n"); -+#endif - } ---- memcheck/tests/partiallydefinedeq.stderr.exp3 -+++ memcheck/tests/partiallydefinedeq.stderr.exp3 -@@ -0,0 +1,20 @@ -+ -+On s390 we might see 2 or 3 errors. -+Conditional jump or move depends on uninitialised value(s) -+ at 0x........: foo (partiallydefinedeq.c:15) -+ by 0x........: main (partiallydefinedeq.c:37) -+ -+Conditional jump or move depends on uninitialised value(s) -+ at 0x........: foo (partiallydefinedeq.c:15) -+ by 0x........: main (partiallydefinedeq.c:52) -+ -+ -+HEAP SUMMARY: -+ in use at exit: ... bytes in ... blocks -+ total heap usage: ... allocs, ... frees, ... bytes allocated -+ -+For a detailed leak analysis, rerun with: --leak-check=full -+ -+For counts of detected and suppressed errors, rerun with: -v -+Use --track-origins=yes to see where uninitialised values come from -+ERROR SUMMARY: 2 errors from 2 contexts (suppressed: 0 from 0) ---- memcheck/tests/partiallydefinedeq.stderr.exp4 -+++ memcheck/tests/partiallydefinedeq.stderr.exp4 -@@ -0,0 +1,24 @@ -+ -+On s390 we might see 2 or 3 errors. -+Conditional jump or move depends on uninitialised value(s) -+ at 0x........: foo (partiallydefinedeq.c:15) -+ by 0x........: main (partiallydefinedeq.c:37) -+ -+Conditional jump or move depends on uninitialised value(s) -+ at 0x........: foo (partiallydefinedeq.c:15) -+ by 0x........: main (partiallydefinedeq.c:45) -+ -+Conditional jump or move depends on uninitialised value(s) -+ at 0x........: foo (partiallydefinedeq.c:15) -+ by 0x........: main (partiallydefinedeq.c:52) -+ -+ -+HEAP SUMMARY: -+ in use at exit: ... bytes in ... blocks -+ total heap usage: ... allocs, ... frees, ... bytes allocated -+ -+For a detailed leak analysis, rerun with: --leak-check=full -+ -+For counts of detected and suppressed errors, rerun with: -v -+Use --track-origins=yes to see where uninitialised values come from -+ERROR SUMMARY: 3 errors from 3 contexts (suppressed: 0 from 0) ---- memcheck/tests/sigprocmask.c -+++ memcheck/tests/sigprocmask.c -@@ -13,6 +13,7 @@ - { - #if defined(__NR_sigprocmask) \ - && !defined(__powerpc64__) \ -+ && !defined(__s390x__) \ - && !defined(_AIX) \ - && !defined(__arm__) - ---- memcheck/tests/supp_unknown.stderr.exp-s390x -+++ memcheck/tests/supp_unknown.stderr.exp-s390x -@@ -0,0 +1,10 @@ -+ -+Process terminating with default action of signal 11 (SIGSEGV) -+ Access not within mapped region at address 0x........ -+ at 0x........: ??? -+ by 0x........: main (badjump.c:17) -+ If you believe this happened as a result of a stack -+ overflow in your program's main thread (unlikely but -+ possible), you can try to increase the size of the -+ main thread stack using the --main-stacksize= flag. -+ The main thread stack size used in this run was .... ---- memcheck/tests/supp_unknown.supp -+++ memcheck/tests/supp_unknown.supp -@@ -6,3 +6,10 @@ - fun:(below main) - } - -+{ -+ -+ Memcheck:Jump -+ obj:* -+ fun:main -+} -+ ---- none/tests/Makefile.am -+++ none/tests/Makefile.am -@@ -19,6 +19,9 @@ - if VGCONF_ARCHS_INCLUDE_ARM - SUBDIRS += arm - endif -+if VGCONF_ARCHS_INCLUDE_S390X -+SUBDIRS += s390x -+endif - - # OS-specific tests - if VGCONF_OS_IS_LINUX -@@ -33,7 +36,7 @@ - SUBDIRS += x86-linux - endif - --DIST_SUBDIRS = x86 amd64 ppc32 ppc64 arm linux darwin x86-linux . -+DIST_SUBDIRS = x86 amd64 ppc32 ppc64 arm s390x linux darwin x86-linux . - - dist_noinst_SCRIPTS = \ - filter_cmdline0 \ ---- none/tests/s390x/add.c -+++ none/tests/s390x/add.c -@@ -0,0 +1,66 @@ -+#include -+#include "add.h" -+ -+static void do_imm_insns(void) -+{ -+ immsweep(ahi, 0, 0); -+ immsweep(ahi, -1, 0); -+ immsweep(ahi, -32768, 0); -+ immsweep(ahi, 32767, 0); -+ immsweep(aghi, 0, 0); -+ immsweep(aghi, -1, 0); -+ immsweep(aghi, -32768, 0); -+ immsweep(aghi, 32767, 0); -+} -+ -+ -+static void do_regmem_insns(unsigned long s2) -+{ -+ memsweep(a, s2, 0); -+ memsweep(ah, s2, 0); -+ memsweep(ag, s2, 0); -+ memsweep(agf, s2, 0); -+ memsweep(al, s2, 0); -+ memsweep(alg, s2, 0); -+ memsweep(agf, s2, 0); -+ memsweep(algf, s2, 0); -+ regsweep(ar, s2, 0); -+ regsweep(agr, s2, 0); -+ regsweep(agfr, s2, 0); -+ regsweep(alr, s2, 0); -+ regsweep(algr, s2, 0); -+ regsweep(algfr, s2, 0); -+ memsweep(alc, s2, 0); -+ memsweep(alcg, s2, 0); -+ regsweep(alcr, s2, 0); -+ regsweep(alcgr, s2, 0); -+ memsweep(alc, s2, 1); -+ memsweep(alcg, s2, 1); -+ regsweep(alcr, s2, 1); -+ regsweep(alcgr, s2, 1); -+ memsweep(ahy, s2, 0); -+ memsweep(ay, s2, 0); -+ memsweep(aly, s2, 0); -+} -+ -+int main() -+{ -+ do_regmem_insns(0x0ul); -+ do_regmem_insns(0x7ffffffffffffffful); -+ do_regmem_insns(0x8000000000000000ul); -+ do_regmem_insns(0xfffffffffffffffful); -+ do_regmem_insns(0x7fffffff00000000ul); -+ do_regmem_insns(0x8000000000000000ul); -+ do_regmem_insns(0xffffffff00000000ul); -+ do_regmem_insns(0x000000007ffffffful); -+ do_regmem_insns(0x0000000080000000ul); -+ do_regmem_insns(0x00000000fffffffful); -+ do_regmem_insns(0x000000000000fffful); -+ do_regmem_insns(0x0000000000007ffful); -+ do_regmem_insns(0x0000000000008000ul); -+ do_regmem_insns(0x000000000000fffful); -+ -+ do_imm_insns(); -+ -+ return 0; -+} ---- none/tests/s390x/add_EI.c -+++ none/tests/s390x/add_EI.c -@@ -0,0 +1,42 @@ -+#include -+#include "add.h" -+ -+static void do_imm_insns(void) -+{ -+ immsweep(afi, 0, 0); -+ immsweep(afi, -1, 0); -+ immsweep(afi, -32768, 0); -+ immsweep(afi, 32767, 0); -+ immsweep(afi, -1, 0); -+ immsweep(afi, -2147483648, 0); -+ immsweep(afi, 2147483647, 0); -+ immsweep(agfi, 0, 0); -+ immsweep(agfi, -1, 0); -+ immsweep(agfi, -32768, 0); -+ immsweep(agfi, 32767, 0); -+ immsweep(agfi, -1, 0); -+ immsweep(agfi, -2147483648, 0); -+ immsweep(agfi, 2147483647, 0); -+ immsweep(alfi, 0, 0); -+ immsweep(alfi, 65535, 0); -+ immsweep(alfi, 32768, 0); -+ immsweep(alfi, 32767, 0); -+ immsweep(alfi, 4294967295, 0); -+ immsweep(alfi, 2147483648, 0); -+ immsweep(alfi, 2147483647, 0); -+ immsweep(algfi, 0, 0); -+ immsweep(algfi, 65535, 0); -+ immsweep(algfi, 32768, 0); -+ immsweep(algfi, 32767, 0); -+ immsweep(algfi, 4294967295, 0); -+ immsweep(algfi, 2147483648, 0); -+ immsweep(algfi, 2147483647, 0); -+ -+} -+ -+int main() -+{ -+ do_imm_insns(); -+ -+ return 0; -+} ---- none/tests/s390x/add_EI.stderr.exp -+++ none/tests/s390x/add_EI.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/add_EI.stdout.exp -+++ none/tests/s390x/add_EI.stdout.exp -@@ -0,0 +1,308 @@ -+afi 0 + 0000000000000000 + 0000000000000000 = 0000000000000000 (cc=0) -+afi 0 + 0000000000000001 + 0000000000000000 = 0000000000000001 (cc=2) -+afi 0 + 000000000000FFFF + 0000000000000000 = 000000000000FFFF (cc=2) -+afi 0 + 0000000000007FFF + 0000000000000000 = 0000000000007FFF (cc=2) -+afi 0 + 0000000000008000 + 0000000000000000 = 0000000000008000 (cc=2) -+afi 0 + 00000000FFFFFFFF + 0000000000000000 = 00000000FFFFFFFF (cc=1) -+afi 0 + 0000000080000000 + 0000000000000000 = 0000000080000000 (cc=1) -+afi 0 + 000000007FFFFFFF + 0000000000000000 = 000000007FFFFFFF (cc=2) -+afi 0 + FFFFFFFFFFFFFFFF + 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+afi 0 + 8000000000000000 + 0000000000000000 = 8000000000000000 (cc=0) -+afi 0 + 7FFFFFFFFFFFFFFF + 0000000000000000 = 7FFFFFFFFFFFFFFF (cc=1) -+afi 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+afi 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=0) -+afi 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFE (cc=2) -+afi 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFE (cc=2) -+afi 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=2) -+afi 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=1) -+afi 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=3) -+afi 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=2) -+afi 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=1) -+afi 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 80000000FFFFFFFF (cc=1) -+afi 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=1) -+afi 0 + 0000000000000000 + FFFFFFFFFFFF8000 = 00000000FFFF8000 (cc=1) -+afi 0 + 0000000000000001 + FFFFFFFFFFFF8000 = 00000000FFFF8001 (cc=1) -+afi 0 + 000000000000FFFF + FFFFFFFFFFFF8000 = 0000000000007FFF (cc=2) -+afi 0 + 0000000000007FFF + FFFFFFFFFFFF8000 = 00000000FFFFFFFF (cc=1) -+afi 0 + 0000000000008000 + FFFFFFFFFFFF8000 = 0000000000000000 (cc=0) -+afi 0 + 00000000FFFFFFFF + FFFFFFFFFFFF8000 = 00000000FFFF7FFF (cc=1) -+afi 0 + 0000000080000000 + FFFFFFFFFFFF8000 = 000000007FFF8000 (cc=3) -+afi 0 + 000000007FFFFFFF + FFFFFFFFFFFF8000 = 000000007FFF7FFF (cc=2) -+afi 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFF8000 = FFFFFFFFFFFF7FFF (cc=1) -+afi 0 + 8000000000000000 + FFFFFFFFFFFF8000 = 80000000FFFF8000 (cc=1) -+afi 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFF8000 = 7FFFFFFFFFFF7FFF (cc=1) -+afi 0 + 0000000000000000 + 0000000000007FFF = 0000000000007FFF (cc=2) -+afi 0 + 0000000000000001 + 0000000000007FFF = 0000000000008000 (cc=2) -+afi 0 + 000000000000FFFF + 0000000000007FFF = 0000000000017FFE (cc=2) -+afi 0 + 0000000000007FFF + 0000000000007FFF = 000000000000FFFE (cc=2) -+afi 0 + 0000000000008000 + 0000000000007FFF = 000000000000FFFF (cc=2) -+afi 0 + 00000000FFFFFFFF + 0000000000007FFF = 0000000000007FFE (cc=2) -+afi 0 + 0000000080000000 + 0000000000007FFF = 0000000080007FFF (cc=1) -+afi 0 + 000000007FFFFFFF + 0000000000007FFF = 0000000080007FFE (cc=3) -+afi 0 + FFFFFFFFFFFFFFFF + 0000000000007FFF = FFFFFFFF00007FFE (cc=2) -+afi 0 + 8000000000000000 + 0000000000007FFF = 8000000000007FFF (cc=2) -+afi 0 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 7FFFFFFF00007FFE (cc=2) -+afi 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+afi 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=0) -+afi 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFE (cc=2) -+afi 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFE (cc=2) -+afi 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=2) -+afi 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=1) -+afi 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=3) -+afi 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=2) -+afi 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=1) -+afi 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 80000000FFFFFFFF (cc=1) -+afi 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=1) -+afi 0 + 0000000000000000 + FFFFFFFF80000000 = 0000000080000000 (cc=1) -+afi 0 + 0000000000000001 + FFFFFFFF80000000 = 0000000080000001 (cc=1) -+afi 0 + 000000000000FFFF + FFFFFFFF80000000 = 000000008000FFFF (cc=1) -+afi 0 + 0000000000007FFF + FFFFFFFF80000000 = 0000000080007FFF (cc=1) -+afi 0 + 0000000000008000 + FFFFFFFF80000000 = 0000000080008000 (cc=1) -+afi 0 + 00000000FFFFFFFF + FFFFFFFF80000000 = 000000007FFFFFFF (cc=3) -+afi 0 + 0000000080000000 + FFFFFFFF80000000 = 0000000000000000 (cc=3) -+afi 0 + 000000007FFFFFFF + FFFFFFFF80000000 = 00000000FFFFFFFF (cc=1) -+afi 0 + FFFFFFFFFFFFFFFF + FFFFFFFF80000000 = FFFFFFFF7FFFFFFF (cc=3) -+afi 0 + 8000000000000000 + FFFFFFFF80000000 = 8000000080000000 (cc=1) -+afi 0 + 7FFFFFFFFFFFFFFF + FFFFFFFF80000000 = 7FFFFFFF7FFFFFFF (cc=3) -+afi 0 + 0000000000000000 + 000000007FFFFFFF = 000000007FFFFFFF (cc=2) -+afi 0 + 0000000000000001 + 000000007FFFFFFF = 0000000080000000 (cc=3) -+afi 0 + 000000000000FFFF + 000000007FFFFFFF = 000000008000FFFE (cc=3) -+afi 0 + 0000000000007FFF + 000000007FFFFFFF = 0000000080007FFE (cc=3) -+afi 0 + 0000000000008000 + 000000007FFFFFFF = 0000000080007FFF (cc=3) -+afi 0 + 00000000FFFFFFFF + 000000007FFFFFFF = 000000007FFFFFFE (cc=2) -+afi 0 + 0000000080000000 + 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+afi 0 + 000000007FFFFFFF + 000000007FFFFFFF = 00000000FFFFFFFE (cc=3) -+afi 0 + FFFFFFFFFFFFFFFF + 000000007FFFFFFF = FFFFFFFF7FFFFFFE (cc=2) -+afi 0 + 8000000000000000 + 000000007FFFFFFF = 800000007FFFFFFF (cc=2) -+afi 0 + 7FFFFFFFFFFFFFFF + 000000007FFFFFFF = 7FFFFFFF7FFFFFFE (cc=2) -+agfi 0 + 0000000000000000 + 0000000000000000 = 0000000000000000 (cc=0) -+agfi 0 + 0000000000000001 + 0000000000000000 = 0000000000000001 (cc=2) -+agfi 0 + 000000000000FFFF + 0000000000000000 = 000000000000FFFF (cc=2) -+agfi 0 + 0000000000007FFF + 0000000000000000 = 0000000000007FFF (cc=2) -+agfi 0 + 0000000000008000 + 0000000000000000 = 0000000000008000 (cc=2) -+agfi 0 + 00000000FFFFFFFF + 0000000000000000 = 00000000FFFFFFFF (cc=2) -+agfi 0 + 0000000080000000 + 0000000000000000 = 0000000080000000 (cc=2) -+agfi 0 + 000000007FFFFFFF + 0000000000000000 = 000000007FFFFFFF (cc=2) -+agfi 0 + FFFFFFFFFFFFFFFF + 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+agfi 0 + 8000000000000000 + 0000000000000000 = 8000000000000000 (cc=1) -+agfi 0 + 7FFFFFFFFFFFFFFF + 0000000000000000 = 7FFFFFFFFFFFFFFF (cc=2) -+agfi 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+agfi 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=0) -+agfi 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFE (cc=2) -+agfi 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFE (cc=2) -+agfi 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=2) -+agfi 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=2) -+agfi 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=2) -+agfi 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=2) -+agfi 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=1) -+agfi 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF (cc=3) -+agfi 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=2) -+agfi 0 + 0000000000000000 + FFFFFFFFFFFF8000 = FFFFFFFFFFFF8000 (cc=1) -+agfi 0 + 0000000000000001 + FFFFFFFFFFFF8000 = FFFFFFFFFFFF8001 (cc=1) -+agfi 0 + 000000000000FFFF + FFFFFFFFFFFF8000 = 0000000000007FFF (cc=2) -+agfi 0 + 0000000000007FFF + FFFFFFFFFFFF8000 = FFFFFFFFFFFFFFFF (cc=1) -+agfi 0 + 0000000000008000 + FFFFFFFFFFFF8000 = 0000000000000000 (cc=0) -+agfi 0 + 00000000FFFFFFFF + FFFFFFFFFFFF8000 = 00000000FFFF7FFF (cc=2) -+agfi 0 + 0000000080000000 + FFFFFFFFFFFF8000 = 000000007FFF8000 (cc=2) -+agfi 0 + 000000007FFFFFFF + FFFFFFFFFFFF8000 = 000000007FFF7FFF (cc=2) -+agfi 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFF8000 = FFFFFFFFFFFF7FFF (cc=1) -+agfi 0 + 8000000000000000 + FFFFFFFFFFFF8000 = 7FFFFFFFFFFF8000 (cc=3) -+agfi 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFF8000 = 7FFFFFFFFFFF7FFF (cc=2) -+agfi 0 + 0000000000000000 + 0000000000007FFF = 0000000000007FFF (cc=2) -+agfi 0 + 0000000000000001 + 0000000000007FFF = 0000000000008000 (cc=2) -+agfi 0 + 000000000000FFFF + 0000000000007FFF = 0000000000017FFE (cc=2) -+agfi 0 + 0000000000007FFF + 0000000000007FFF = 000000000000FFFE (cc=2) -+agfi 0 + 0000000000008000 + 0000000000007FFF = 000000000000FFFF (cc=2) -+agfi 0 + 00000000FFFFFFFF + 0000000000007FFF = 0000000100007FFE (cc=2) -+agfi 0 + 0000000080000000 + 0000000000007FFF = 0000000080007FFF (cc=2) -+agfi 0 + 000000007FFFFFFF + 0000000000007FFF = 0000000080007FFE (cc=2) -+agfi 0 + FFFFFFFFFFFFFFFF + 0000000000007FFF = 0000000000007FFE (cc=2) -+agfi 0 + 8000000000000000 + 0000000000007FFF = 8000000000007FFF (cc=1) -+agfi 0 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 8000000000007FFE (cc=3) -+agfi 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+agfi 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=0) -+agfi 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFE (cc=2) -+agfi 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFE (cc=2) -+agfi 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=2) -+agfi 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=2) -+agfi 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=2) -+agfi 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=2) -+agfi 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=1) -+agfi 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF (cc=3) -+agfi 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=2) -+agfi 0 + 0000000000000000 + FFFFFFFF80000000 = FFFFFFFF80000000 (cc=1) -+agfi 0 + 0000000000000001 + FFFFFFFF80000000 = FFFFFFFF80000001 (cc=1) -+agfi 0 + 000000000000FFFF + FFFFFFFF80000000 = FFFFFFFF8000FFFF (cc=1) -+agfi 0 + 0000000000007FFF + FFFFFFFF80000000 = FFFFFFFF80007FFF (cc=1) -+agfi 0 + 0000000000008000 + FFFFFFFF80000000 = FFFFFFFF80008000 (cc=1) -+agfi 0 + 00000000FFFFFFFF + FFFFFFFF80000000 = 000000007FFFFFFF (cc=2) -+agfi 0 + 0000000080000000 + FFFFFFFF80000000 = 0000000000000000 (cc=0) -+agfi 0 + 000000007FFFFFFF + FFFFFFFF80000000 = FFFFFFFFFFFFFFFF (cc=1) -+agfi 0 + FFFFFFFFFFFFFFFF + FFFFFFFF80000000 = FFFFFFFF7FFFFFFF (cc=1) -+agfi 0 + 8000000000000000 + FFFFFFFF80000000 = 7FFFFFFF80000000 (cc=3) -+agfi 0 + 7FFFFFFFFFFFFFFF + FFFFFFFF80000000 = 7FFFFFFF7FFFFFFF (cc=2) -+agfi 0 + 0000000000000000 + 000000007FFFFFFF = 000000007FFFFFFF (cc=2) -+agfi 0 + 0000000000000001 + 000000007FFFFFFF = 0000000080000000 (cc=2) -+agfi 0 + 000000000000FFFF + 000000007FFFFFFF = 000000008000FFFE (cc=2) -+agfi 0 + 0000000000007FFF + 000000007FFFFFFF = 0000000080007FFE (cc=2) -+agfi 0 + 0000000000008000 + 000000007FFFFFFF = 0000000080007FFF (cc=2) -+agfi 0 + 00000000FFFFFFFF + 000000007FFFFFFF = 000000017FFFFFFE (cc=2) -+agfi 0 + 0000000080000000 + 000000007FFFFFFF = 00000000FFFFFFFF (cc=2) -+agfi 0 + 000000007FFFFFFF + 000000007FFFFFFF = 00000000FFFFFFFE (cc=2) -+agfi 0 + FFFFFFFFFFFFFFFF + 000000007FFFFFFF = 000000007FFFFFFE (cc=2) -+agfi 0 + 8000000000000000 + 000000007FFFFFFF = 800000007FFFFFFF (cc=1) -+agfi 0 + 7FFFFFFFFFFFFFFF + 000000007FFFFFFF = 800000007FFFFFFE (cc=3) -+alfi 0 + 0000000000000000 + 0000000000000000 = 0000000000000000 (cc=0) -+alfi 0 + 0000000000000001 + 0000000000000000 = 0000000000000001 (cc=1) -+alfi 0 + 000000000000FFFF + 0000000000000000 = 000000000000FFFF (cc=1) -+alfi 0 + 0000000000007FFF + 0000000000000000 = 0000000000007FFF (cc=1) -+alfi 0 + 0000000000008000 + 0000000000000000 = 0000000000008000 (cc=1) -+alfi 0 + 00000000FFFFFFFF + 0000000000000000 = 00000000FFFFFFFF (cc=1) -+alfi 0 + 0000000080000000 + 0000000000000000 = 0000000080000000 (cc=1) -+alfi 0 + 000000007FFFFFFF + 0000000000000000 = 000000007FFFFFFF (cc=1) -+alfi 0 + FFFFFFFFFFFFFFFF + 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+alfi 0 + 8000000000000000 + 0000000000000000 = 8000000000000000 (cc=0) -+alfi 0 + 7FFFFFFFFFFFFFFF + 0000000000000000 = 7FFFFFFFFFFFFFFF (cc=1) -+alfi 0 + 0000000000000000 + 000000000000FFFF = 000000000000FFFF (cc=1) -+alfi 0 + 0000000000000001 + 000000000000FFFF = 0000000000010000 (cc=1) -+alfi 0 + 000000000000FFFF + 000000000000FFFF = 000000000001FFFE (cc=1) -+alfi 0 + 0000000000007FFF + 000000000000FFFF = 0000000000017FFE (cc=1) -+alfi 0 + 0000000000008000 + 000000000000FFFF = 0000000000017FFF (cc=1) -+alfi 0 + 00000000FFFFFFFF + 000000000000FFFF = 000000000000FFFE (cc=3) -+alfi 0 + 0000000080000000 + 000000000000FFFF = 000000008000FFFF (cc=1) -+alfi 0 + 000000007FFFFFFF + 000000000000FFFF = 000000008000FFFE (cc=1) -+alfi 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFF0000FFFE (cc=3) -+alfi 0 + 8000000000000000 + 000000000000FFFF = 800000000000FFFF (cc=1) -+alfi 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFF0000FFFE (cc=3) -+alfi 0 + 0000000000000000 + 0000000000008000 = 0000000000008000 (cc=1) -+alfi 0 + 0000000000000001 + 0000000000008000 = 0000000000008001 (cc=1) -+alfi 0 + 000000000000FFFF + 0000000000008000 = 0000000000017FFF (cc=1) -+alfi 0 + 0000000000007FFF + 0000000000008000 = 000000000000FFFF (cc=1) -+alfi 0 + 0000000000008000 + 0000000000008000 = 0000000000010000 (cc=1) -+alfi 0 + 00000000FFFFFFFF + 0000000000008000 = 0000000000007FFF (cc=3) -+alfi 0 + 0000000080000000 + 0000000000008000 = 0000000080008000 (cc=1) -+alfi 0 + 000000007FFFFFFF + 0000000000008000 = 0000000080007FFF (cc=1) -+alfi 0 + FFFFFFFFFFFFFFFF + 0000000000008000 = FFFFFFFF00007FFF (cc=3) -+alfi 0 + 8000000000000000 + 0000000000008000 = 8000000000008000 (cc=1) -+alfi 0 + 7FFFFFFFFFFFFFFF + 0000000000008000 = 7FFFFFFF00007FFF (cc=3) -+alfi 0 + 0000000000000000 + 0000000000007FFF = 0000000000007FFF (cc=1) -+alfi 0 + 0000000000000001 + 0000000000007FFF = 0000000000008000 (cc=1) -+alfi 0 + 000000000000FFFF + 0000000000007FFF = 0000000000017FFE (cc=1) -+alfi 0 + 0000000000007FFF + 0000000000007FFF = 000000000000FFFE (cc=1) -+alfi 0 + 0000000000008000 + 0000000000007FFF = 000000000000FFFF (cc=1) -+alfi 0 + 00000000FFFFFFFF + 0000000000007FFF = 0000000000007FFE (cc=3) -+alfi 0 + 0000000080000000 + 0000000000007FFF = 0000000080007FFF (cc=1) -+alfi 0 + 000000007FFFFFFF + 0000000000007FFF = 0000000080007FFE (cc=1) -+alfi 0 + FFFFFFFFFFFFFFFF + 0000000000007FFF = FFFFFFFF00007FFE (cc=3) -+alfi 0 + 8000000000000000 + 0000000000007FFF = 8000000000007FFF (cc=1) -+alfi 0 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 7FFFFFFF00007FFE (cc=3) -+alfi 0 + 0000000000000000 + 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+alfi 0 + 0000000000000001 + 00000000FFFFFFFF = 0000000000000000 (cc=2) -+alfi 0 + 000000000000FFFF + 00000000FFFFFFFF = 000000000000FFFE (cc=3) -+alfi 0 + 0000000000007FFF + 00000000FFFFFFFF = 0000000000007FFE (cc=3) -+alfi 0 + 0000000000008000 + 00000000FFFFFFFF = 0000000000007FFF (cc=3) -+alfi 0 + 00000000FFFFFFFF + 00000000FFFFFFFF = 00000000FFFFFFFE (cc=3) -+alfi 0 + 0000000080000000 + 00000000FFFFFFFF = 000000007FFFFFFF (cc=3) -+alfi 0 + 000000007FFFFFFF + 00000000FFFFFFFF = 000000007FFFFFFE (cc=3) -+alfi 0 + FFFFFFFFFFFFFFFF + 00000000FFFFFFFF = FFFFFFFFFFFFFFFE (cc=3) -+alfi 0 + 8000000000000000 + 00000000FFFFFFFF = 80000000FFFFFFFF (cc=1) -+alfi 0 + 7FFFFFFFFFFFFFFF + 00000000FFFFFFFF = 7FFFFFFFFFFFFFFE (cc=3) -+alfi 0 + 0000000000000000 + 0000000080000000 = 0000000080000000 (cc=1) -+alfi 0 + 0000000000000001 + 0000000080000000 = 0000000080000001 (cc=1) -+alfi 0 + 000000000000FFFF + 0000000080000000 = 000000008000FFFF (cc=1) -+alfi 0 + 0000000000007FFF + 0000000080000000 = 0000000080007FFF (cc=1) -+alfi 0 + 0000000000008000 + 0000000080000000 = 0000000080008000 (cc=1) -+alfi 0 + 00000000FFFFFFFF + 0000000080000000 = 000000007FFFFFFF (cc=3) -+alfi 0 + 0000000080000000 + 0000000080000000 = 0000000000000000 (cc=2) -+alfi 0 + 000000007FFFFFFF + 0000000080000000 = 00000000FFFFFFFF (cc=1) -+alfi 0 + FFFFFFFFFFFFFFFF + 0000000080000000 = FFFFFFFF7FFFFFFF (cc=3) -+alfi 0 + 8000000000000000 + 0000000080000000 = 8000000080000000 (cc=1) -+alfi 0 + 7FFFFFFFFFFFFFFF + 0000000080000000 = 7FFFFFFF7FFFFFFF (cc=3) -+alfi 0 + 0000000000000000 + 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+alfi 0 + 0000000000000001 + 000000007FFFFFFF = 0000000080000000 (cc=1) -+alfi 0 + 000000000000FFFF + 000000007FFFFFFF = 000000008000FFFE (cc=1) -+alfi 0 + 0000000000007FFF + 000000007FFFFFFF = 0000000080007FFE (cc=1) -+alfi 0 + 0000000000008000 + 000000007FFFFFFF = 0000000080007FFF (cc=1) -+alfi 0 + 00000000FFFFFFFF + 000000007FFFFFFF = 000000007FFFFFFE (cc=3) -+alfi 0 + 0000000080000000 + 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+alfi 0 + 000000007FFFFFFF + 000000007FFFFFFF = 00000000FFFFFFFE (cc=1) -+alfi 0 + FFFFFFFFFFFFFFFF + 000000007FFFFFFF = FFFFFFFF7FFFFFFE (cc=3) -+alfi 0 + 8000000000000000 + 000000007FFFFFFF = 800000007FFFFFFF (cc=1) -+alfi 0 + 7FFFFFFFFFFFFFFF + 000000007FFFFFFF = 7FFFFFFF7FFFFFFE (cc=3) -+algfi 0 + 0000000000000000 + 0000000000000000 = 0000000000000000 (cc=0) -+algfi 0 + 0000000000000001 + 0000000000000000 = 0000000000000001 (cc=1) -+algfi 0 + 000000000000FFFF + 0000000000000000 = 000000000000FFFF (cc=1) -+algfi 0 + 0000000000007FFF + 0000000000000000 = 0000000000007FFF (cc=1) -+algfi 0 + 0000000000008000 + 0000000000000000 = 0000000000008000 (cc=1) -+algfi 0 + 00000000FFFFFFFF + 0000000000000000 = 00000000FFFFFFFF (cc=1) -+algfi 0 + 0000000080000000 + 0000000000000000 = 0000000080000000 (cc=1) -+algfi 0 + 000000007FFFFFFF + 0000000000000000 = 000000007FFFFFFF (cc=1) -+algfi 0 + FFFFFFFFFFFFFFFF + 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+algfi 0 + 8000000000000000 + 0000000000000000 = 8000000000000000 (cc=1) -+algfi 0 + 7FFFFFFFFFFFFFFF + 0000000000000000 = 7FFFFFFFFFFFFFFF (cc=1) -+algfi 0 + 0000000000000000 + 000000000000FFFF = 000000000000FFFF (cc=1) -+algfi 0 + 0000000000000001 + 000000000000FFFF = 0000000000010000 (cc=1) -+algfi 0 + 000000000000FFFF + 000000000000FFFF = 000000000001FFFE (cc=1) -+algfi 0 + 0000000000007FFF + 000000000000FFFF = 0000000000017FFE (cc=1) -+algfi 0 + 0000000000008000 + 000000000000FFFF = 0000000000017FFF (cc=1) -+algfi 0 + 00000000FFFFFFFF + 000000000000FFFF = 000000010000FFFE (cc=1) -+algfi 0 + 0000000080000000 + 000000000000FFFF = 000000008000FFFF (cc=1) -+algfi 0 + 000000007FFFFFFF + 000000000000FFFF = 000000008000FFFE (cc=1) -+algfi 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = 000000000000FFFE (cc=3) -+algfi 0 + 8000000000000000 + 000000000000FFFF = 800000000000FFFF (cc=1) -+algfi 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 800000000000FFFE (cc=1) -+algfi 0 + 0000000000000000 + 0000000000008000 = 0000000000008000 (cc=1) -+algfi 0 + 0000000000000001 + 0000000000008000 = 0000000000008001 (cc=1) -+algfi 0 + 000000000000FFFF + 0000000000008000 = 0000000000017FFF (cc=1) -+algfi 0 + 0000000000007FFF + 0000000000008000 = 000000000000FFFF (cc=1) -+algfi 0 + 0000000000008000 + 0000000000008000 = 0000000000010000 (cc=1) -+algfi 0 + 00000000FFFFFFFF + 0000000000008000 = 0000000100007FFF (cc=1) -+algfi 0 + 0000000080000000 + 0000000000008000 = 0000000080008000 (cc=1) -+algfi 0 + 000000007FFFFFFF + 0000000000008000 = 0000000080007FFF (cc=1) -+algfi 0 + FFFFFFFFFFFFFFFF + 0000000000008000 = 0000000000007FFF (cc=3) -+algfi 0 + 8000000000000000 + 0000000000008000 = 8000000000008000 (cc=1) -+algfi 0 + 7FFFFFFFFFFFFFFF + 0000000000008000 = 8000000000007FFF (cc=1) -+algfi 0 + 0000000000000000 + 0000000000007FFF = 0000000000007FFF (cc=1) -+algfi 0 + 0000000000000001 + 0000000000007FFF = 0000000000008000 (cc=1) -+algfi 0 + 000000000000FFFF + 0000000000007FFF = 0000000000017FFE (cc=1) -+algfi 0 + 0000000000007FFF + 0000000000007FFF = 000000000000FFFE (cc=1) -+algfi 0 + 0000000000008000 + 0000000000007FFF = 000000000000FFFF (cc=1) -+algfi 0 + 00000000FFFFFFFF + 0000000000007FFF = 0000000100007FFE (cc=1) -+algfi 0 + 0000000080000000 + 0000000000007FFF = 0000000080007FFF (cc=1) -+algfi 0 + 000000007FFFFFFF + 0000000000007FFF = 0000000080007FFE (cc=1) -+algfi 0 + FFFFFFFFFFFFFFFF + 0000000000007FFF = 0000000000007FFE (cc=3) -+algfi 0 + 8000000000000000 + 0000000000007FFF = 8000000000007FFF (cc=1) -+algfi 0 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 8000000000007FFE (cc=1) -+algfi 0 + 0000000000000000 + 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+algfi 0 + 0000000000000001 + 00000000FFFFFFFF = 0000000100000000 (cc=1) -+algfi 0 + 000000000000FFFF + 00000000FFFFFFFF = 000000010000FFFE (cc=1) -+algfi 0 + 0000000000007FFF + 00000000FFFFFFFF = 0000000100007FFE (cc=1) -+algfi 0 + 0000000000008000 + 00000000FFFFFFFF = 0000000100007FFF (cc=1) -+algfi 0 + 00000000FFFFFFFF + 00000000FFFFFFFF = 00000001FFFFFFFE (cc=1) -+algfi 0 + 0000000080000000 + 00000000FFFFFFFF = 000000017FFFFFFF (cc=1) -+algfi 0 + 000000007FFFFFFF + 00000000FFFFFFFF = 000000017FFFFFFE (cc=1) -+algfi 0 + FFFFFFFFFFFFFFFF + 00000000FFFFFFFF = 00000000FFFFFFFE (cc=3) -+algfi 0 + 8000000000000000 + 00000000FFFFFFFF = 80000000FFFFFFFF (cc=1) -+algfi 0 + 7FFFFFFFFFFFFFFF + 00000000FFFFFFFF = 80000000FFFFFFFE (cc=1) -+algfi 0 + 0000000000000000 + 0000000080000000 = 0000000080000000 (cc=1) -+algfi 0 + 0000000000000001 + 0000000080000000 = 0000000080000001 (cc=1) -+algfi 0 + 000000000000FFFF + 0000000080000000 = 000000008000FFFF (cc=1) -+algfi 0 + 0000000000007FFF + 0000000080000000 = 0000000080007FFF (cc=1) -+algfi 0 + 0000000000008000 + 0000000080000000 = 0000000080008000 (cc=1) -+algfi 0 + 00000000FFFFFFFF + 0000000080000000 = 000000017FFFFFFF (cc=1) -+algfi 0 + 0000000080000000 + 0000000080000000 = 0000000100000000 (cc=1) -+algfi 0 + 000000007FFFFFFF + 0000000080000000 = 00000000FFFFFFFF (cc=1) -+algfi 0 + FFFFFFFFFFFFFFFF + 0000000080000000 = 000000007FFFFFFF (cc=3) -+algfi 0 + 8000000000000000 + 0000000080000000 = 8000000080000000 (cc=1) -+algfi 0 + 7FFFFFFFFFFFFFFF + 0000000080000000 = 800000007FFFFFFF (cc=1) -+algfi 0 + 0000000000000000 + 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+algfi 0 + 0000000000000001 + 000000007FFFFFFF = 0000000080000000 (cc=1) -+algfi 0 + 000000000000FFFF + 000000007FFFFFFF = 000000008000FFFE (cc=1) -+algfi 0 + 0000000000007FFF + 000000007FFFFFFF = 0000000080007FFE (cc=1) -+algfi 0 + 0000000000008000 + 000000007FFFFFFF = 0000000080007FFF (cc=1) -+algfi 0 + 00000000FFFFFFFF + 000000007FFFFFFF = 000000017FFFFFFE (cc=1) -+algfi 0 + 0000000080000000 + 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+algfi 0 + 000000007FFFFFFF + 000000007FFFFFFF = 00000000FFFFFFFE (cc=1) -+algfi 0 + FFFFFFFFFFFFFFFF + 000000007FFFFFFF = 000000007FFFFFFE (cc=3) -+algfi 0 + 8000000000000000 + 000000007FFFFFFF = 800000007FFFFFFF (cc=1) -+algfi 0 + 7FFFFFFFFFFFFFFF + 000000007FFFFFFF = 800000007FFFFFFE (cc=1) ---- none/tests/s390x/add_EI.vgtest -+++ none/tests/s390x/add_EI.vgtest -@@ -0,0 +1,2 @@ -+prog: add_EI -+prereq: test -x add_EI ---- none/tests/s390x/add_GE.c -+++ none/tests/s390x/add_GE.c -@@ -0,0 +1,33 @@ -+#include -+#include "add.h" -+ -+static void do_memimm_insns(void) -+{ -+ memimmsweep(asi, 0, 0); -+ memimmsweep(agsi, 0, 0); -+ memimmsweep(alsi, 0, 0); -+ memimmsweep(algsi, 0, 0); -+ memimmsweep(asi, 1, 0); -+ memimmsweep(agsi, 1, 0); -+ memimmsweep(alsi, 1, 0); -+ memimmsweep(algsi, 1, 0); -+ memimmsweep(asi, -1, 0); -+ memimmsweep(agsi, -1, 0); -+ memimmsweep(alsi, -1, 0); -+ memimmsweep(algsi, -1, 0); -+ memimmsweep(asi, -128, 0); -+ memimmsweep(agsi, -128, 0); -+ memimmsweep(alsi, -128, 0); -+ memimmsweep(algsi, -128, 0); -+ memimmsweep(asi, 127, 0); -+ memimmsweep(agsi, 127, 0); -+ memimmsweep(alsi, 127, 0); -+ memimmsweep(algsi, 127, 0); -+} -+ -+int main() -+{ -+ do_memimm_insns(); -+ -+ return 0; -+} ---- none/tests/s390x/add_GE.stderr.exp -+++ none/tests/s390x/add_GE.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/add_GE.stdout.exp -+++ none/tests/s390x/add_GE.stdout.exp -@@ -0,0 +1,220 @@ -+asi 0 + 0000000000000000 + 0000000000000000 = 0000000000000000 (cc=0) -+asi 0 + 0000000000000001 + 0000000000000000 = 0000000000000001 (cc=0) -+asi 0 + 000000000000FFFF + 0000000000000000 = 000000000000FFFF (cc=0) -+asi 0 + 0000000000007FFF + 0000000000000000 = 0000000000007FFF (cc=0) -+asi 0 + 0000000000008000 + 0000000000000000 = 0000000000008000 (cc=0) -+asi 0 + 00000000FFFFFFFF + 0000000000000000 = 00000000FFFFFFFF (cc=0) -+asi 0 + 0000000080000000 + 0000000000000000 = 0000000080000000 (cc=0) -+asi 0 + 000000007FFFFFFF + 0000000000000000 = 000000007FFFFFFF (cc=0) -+asi 0 + FFFFFFFFFFFFFFFF + 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+asi 0 + 8000000000000000 + 0000000000000000 = 8000000000000000 (cc=1) -+asi 0 + 7FFFFFFFFFFFFFFF + 0000000000000000 = 7FFFFFFFFFFFFFFF (cc=2) -+agsi 0 + 0000000000000000 + 0000000000000000 = 0000000000000000 (cc=0) -+agsi 0 + 0000000000000001 + 0000000000000000 = 0000000000000001 (cc=2) -+agsi 0 + 000000000000FFFF + 0000000000000000 = 000000000000FFFF (cc=2) -+agsi 0 + 0000000000007FFF + 0000000000000000 = 0000000000007FFF (cc=2) -+agsi 0 + 0000000000008000 + 0000000000000000 = 0000000000008000 (cc=2) -+agsi 0 + 00000000FFFFFFFF + 0000000000000000 = 00000000FFFFFFFF (cc=2) -+agsi 0 + 0000000080000000 + 0000000000000000 = 0000000080000000 (cc=2) -+agsi 0 + 000000007FFFFFFF + 0000000000000000 = 000000007FFFFFFF (cc=2) -+agsi 0 + FFFFFFFFFFFFFFFF + 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+agsi 0 + 8000000000000000 + 0000000000000000 = 8000000000000000 (cc=1) -+agsi 0 + 7FFFFFFFFFFFFFFF + 0000000000000000 = 7FFFFFFFFFFFFFFF (cc=2) -+alsi 0 + 0000000000000000 + 0000000000000000 = 0000000000000000 (cc=0) -+alsi 0 + 0000000000000001 + 0000000000000000 = 0000000000000001 (cc=0) -+alsi 0 + 000000000000FFFF + 0000000000000000 = 000000000000FFFF (cc=0) -+alsi 0 + 0000000000007FFF + 0000000000000000 = 0000000000007FFF (cc=0) -+alsi 0 + 0000000000008000 + 0000000000000000 = 0000000000008000 (cc=0) -+alsi 0 + 00000000FFFFFFFF + 0000000000000000 = 00000000FFFFFFFF (cc=0) -+alsi 0 + 0000000080000000 + 0000000000000000 = 0000000080000000 (cc=0) -+alsi 0 + 000000007FFFFFFF + 0000000000000000 = 000000007FFFFFFF (cc=0) -+alsi 0 + FFFFFFFFFFFFFFFF + 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+alsi 0 + 8000000000000000 + 0000000000000000 = 8000000000000000 (cc=1) -+alsi 0 + 7FFFFFFFFFFFFFFF + 0000000000000000 = 7FFFFFFFFFFFFFFF (cc=1) -+algsi 0 + 0000000000000000 + 0000000000000000 = 0000000000000000 (cc=0) -+algsi 0 + 0000000000000001 + 0000000000000000 = 0000000000000001 (cc=1) -+algsi 0 + 000000000000FFFF + 0000000000000000 = 000000000000FFFF (cc=1) -+algsi 0 + 0000000000007FFF + 0000000000000000 = 0000000000007FFF (cc=1) -+algsi 0 + 0000000000008000 + 0000000000000000 = 0000000000008000 (cc=1) -+algsi 0 + 00000000FFFFFFFF + 0000000000000000 = 00000000FFFFFFFF (cc=1) -+algsi 0 + 0000000080000000 + 0000000000000000 = 0000000080000000 (cc=1) -+algsi 0 + 000000007FFFFFFF + 0000000000000000 = 000000007FFFFFFF (cc=1) -+algsi 0 + FFFFFFFFFFFFFFFF + 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+algsi 0 + 8000000000000000 + 0000000000000000 = 8000000000000000 (cc=1) -+algsi 0 + 7FFFFFFFFFFFFFFF + 0000000000000000 = 7FFFFFFFFFFFFFFF (cc=1) -+asi 0 + 0000000000000000 + 0000000000000001 = 0000000100000000 (cc=2) -+asi 0 + 0000000000000001 + 0000000000000001 = 0000000100000001 (cc=2) -+asi 0 + 000000000000FFFF + 0000000000000001 = 000000010000FFFF (cc=2) -+asi 0 + 0000000000007FFF + 0000000000000001 = 0000000100007FFF (cc=2) -+asi 0 + 0000000000008000 + 0000000000000001 = 0000000100008000 (cc=2) -+asi 0 + 00000000FFFFFFFF + 0000000000000001 = 00000001FFFFFFFF (cc=2) -+asi 0 + 0000000080000000 + 0000000000000001 = 0000000180000000 (cc=2) -+asi 0 + 000000007FFFFFFF + 0000000000000001 = 000000017FFFFFFF (cc=2) -+asi 0 + FFFFFFFFFFFFFFFF + 0000000000000001 = 00000000FFFFFFFF (cc=0) -+asi 0 + 8000000000000000 + 0000000000000001 = 8000000100000000 (cc=1) -+asi 0 + 7FFFFFFFFFFFFFFF + 0000000000000001 = 80000000FFFFFFFF (cc=3) -+agsi 0 + 0000000000000000 + 0000000000000001 = 0000000000000001 (cc=2) -+agsi 0 + 0000000000000001 + 0000000000000001 = 0000000000000002 (cc=2) -+agsi 0 + 000000000000FFFF + 0000000000000001 = 0000000000010000 (cc=2) -+agsi 0 + 0000000000007FFF + 0000000000000001 = 0000000000008000 (cc=2) -+agsi 0 + 0000000000008000 + 0000000000000001 = 0000000000008001 (cc=2) -+agsi 0 + 00000000FFFFFFFF + 0000000000000001 = 0000000100000000 (cc=2) -+agsi 0 + 0000000080000000 + 0000000000000001 = 0000000080000001 (cc=2) -+agsi 0 + 000000007FFFFFFF + 0000000000000001 = 0000000080000000 (cc=2) -+agsi 0 + FFFFFFFFFFFFFFFF + 0000000000000001 = 0000000000000000 (cc=0) -+agsi 0 + 8000000000000000 + 0000000000000001 = 8000000000000001 (cc=1) -+agsi 0 + 7FFFFFFFFFFFFFFF + 0000000000000001 = 8000000000000000 (cc=3) -+alsi 0 + 0000000000000000 + 0000000000000001 = 0000000100000000 (cc=1) -+alsi 0 + 0000000000000001 + 0000000000000001 = 0000000100000001 (cc=1) -+alsi 0 + 000000000000FFFF + 0000000000000001 = 000000010000FFFF (cc=1) -+alsi 0 + 0000000000007FFF + 0000000000000001 = 0000000100007FFF (cc=1) -+alsi 0 + 0000000000008000 + 0000000000000001 = 0000000100008000 (cc=1) -+alsi 0 + 00000000FFFFFFFF + 0000000000000001 = 00000001FFFFFFFF (cc=1) -+alsi 0 + 0000000080000000 + 0000000000000001 = 0000000180000000 (cc=1) -+alsi 0 + 000000007FFFFFFF + 0000000000000001 = 000000017FFFFFFF (cc=1) -+alsi 0 + FFFFFFFFFFFFFFFF + 0000000000000001 = 00000000FFFFFFFF (cc=2) -+alsi 0 + 8000000000000000 + 0000000000000001 = 8000000100000000 (cc=1) -+alsi 0 + 7FFFFFFFFFFFFFFF + 0000000000000001 = 80000000FFFFFFFF (cc=1) -+algsi 0 + 0000000000000000 + 0000000000000001 = 0000000000000001 (cc=1) -+algsi 0 + 0000000000000001 + 0000000000000001 = 0000000000000002 (cc=1) -+algsi 0 + 000000000000FFFF + 0000000000000001 = 0000000000010000 (cc=1) -+algsi 0 + 0000000000007FFF + 0000000000000001 = 0000000000008000 (cc=1) -+algsi 0 + 0000000000008000 + 0000000000000001 = 0000000000008001 (cc=1) -+algsi 0 + 00000000FFFFFFFF + 0000000000000001 = 0000000100000000 (cc=1) -+algsi 0 + 0000000080000000 + 0000000000000001 = 0000000080000001 (cc=1) -+algsi 0 + 000000007FFFFFFF + 0000000000000001 = 0000000080000000 (cc=1) -+algsi 0 + FFFFFFFFFFFFFFFF + 0000000000000001 = 0000000000000000 (cc=2) -+algsi 0 + 8000000000000000 + 0000000000000001 = 8000000000000001 (cc=1) -+algsi 0 + 7FFFFFFFFFFFFFFF + 0000000000000001 = 8000000000000000 (cc=1) -+asi 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = FFFFFFFF00000000 (cc=1) -+asi 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = FFFFFFFF00000001 (cc=1) -+asi 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = FFFFFFFF0000FFFF (cc=1) -+asi 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = FFFFFFFF00007FFF (cc=1) -+asi 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = FFFFFFFF00008000 (cc=1) -+asi 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+asi 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = FFFFFFFF80000000 (cc=1) -+asi 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFF7FFFFFFF (cc=1) -+asi 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFEFFFFFFFF (cc=1) -+asi 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 7FFFFFFF00000000 (cc=3) -+asi 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFEFFFFFFFF (cc=2) -+agsi 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+agsi 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=0) -+agsi 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFE (cc=2) -+agsi 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFE (cc=2) -+agsi 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=2) -+agsi 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=2) -+agsi 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=2) -+agsi 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=2) -+agsi 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=1) -+agsi 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF (cc=3) -+agsi 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=2) -+alsi 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = FFFFFFFF00000000 (cc=1) -+alsi 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = FFFFFFFF00000001 (cc=1) -+alsi 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = FFFFFFFF0000FFFF (cc=1) -+alsi 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = FFFFFFFF00007FFF (cc=1) -+alsi 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = FFFFFFFF00008000 (cc=1) -+alsi 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+alsi 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = FFFFFFFF80000000 (cc=1) -+alsi 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFF7FFFFFFF (cc=1) -+alsi 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFEFFFFFFFF (cc=3) -+alsi 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 7FFFFFFF00000000 (cc=3) -+alsi 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFEFFFFFFFF (cc=3) -+algsi 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+algsi 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=2) -+algsi 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFE (cc=3) -+algsi 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFE (cc=3) -+algsi 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=3) -+algsi 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=3) -+algsi 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=3) -+algsi 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=3) -+algsi 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=3) -+algsi 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF (cc=3) -+algsi 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=3) -+asi 0 + 0000000000000000 + FFFFFFFFFFFFFF80 = FFFFFF8000000000 (cc=1) -+asi 0 + 0000000000000001 + FFFFFFFFFFFFFF80 = FFFFFF8000000001 (cc=1) -+asi 0 + 000000000000FFFF + FFFFFFFFFFFFFF80 = FFFFFF800000FFFF (cc=1) -+asi 0 + 0000000000007FFF + FFFFFFFFFFFFFF80 = FFFFFF8000007FFF (cc=1) -+asi 0 + 0000000000008000 + FFFFFFFFFFFFFF80 = FFFFFF8000008000 (cc=1) -+asi 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFF80 = FFFFFF80FFFFFFFF (cc=1) -+asi 0 + 0000000080000000 + FFFFFFFFFFFFFF80 = FFFFFF8080000000 (cc=1) -+asi 0 + 000000007FFFFFFF + FFFFFFFFFFFFFF80 = FFFFFF807FFFFFFF (cc=1) -+asi 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFF80 = FFFFFF7FFFFFFFFF (cc=1) -+asi 0 + 8000000000000000 + FFFFFFFFFFFFFF80 = 7FFFFF8000000000 (cc=3) -+asi 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFF80 = 7FFFFF7FFFFFFFFF (cc=2) -+agsi 0 + 0000000000000000 + FFFFFFFFFFFFFF80 = FFFFFFFFFFFFFF80 (cc=1) -+agsi 0 + 0000000000000001 + FFFFFFFFFFFFFF80 = FFFFFFFFFFFFFF81 (cc=1) -+agsi 0 + 000000000000FFFF + FFFFFFFFFFFFFF80 = 000000000000FF7F (cc=2) -+agsi 0 + 0000000000007FFF + FFFFFFFFFFFFFF80 = 0000000000007F7F (cc=2) -+agsi 0 + 0000000000008000 + FFFFFFFFFFFFFF80 = 0000000000007F80 (cc=2) -+agsi 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFF80 = 00000000FFFFFF7F (cc=2) -+agsi 0 + 0000000080000000 + FFFFFFFFFFFFFF80 = 000000007FFFFF80 (cc=2) -+agsi 0 + 000000007FFFFFFF + FFFFFFFFFFFFFF80 = 000000007FFFFF7F (cc=2) -+agsi 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFF80 = FFFFFFFFFFFFFF7F (cc=1) -+agsi 0 + 8000000000000000 + FFFFFFFFFFFFFF80 = 7FFFFFFFFFFFFF80 (cc=3) -+agsi 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFF80 = 7FFFFFFFFFFFFF7F (cc=2) -+alsi 0 + 0000000000000000 + FFFFFFFFFFFFFF80 = FFFFFF8000000000 (cc=1) -+alsi 0 + 0000000000000001 + FFFFFFFFFFFFFF80 = FFFFFF8000000001 (cc=1) -+alsi 0 + 000000000000FFFF + FFFFFFFFFFFFFF80 = FFFFFF800000FFFF (cc=1) -+alsi 0 + 0000000000007FFF + FFFFFFFFFFFFFF80 = FFFFFF8000007FFF (cc=1) -+alsi 0 + 0000000000008000 + FFFFFFFFFFFFFF80 = FFFFFF8000008000 (cc=1) -+alsi 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFF80 = FFFFFF80FFFFFFFF (cc=1) -+alsi 0 + 0000000080000000 + FFFFFFFFFFFFFF80 = FFFFFF8080000000 (cc=1) -+alsi 0 + 000000007FFFFFFF + FFFFFFFFFFFFFF80 = FFFFFF807FFFFFFF (cc=1) -+alsi 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFF80 = FFFFFF7FFFFFFFFF (cc=3) -+alsi 0 + 8000000000000000 + FFFFFFFFFFFFFF80 = 7FFFFF8000000000 (cc=3) -+alsi 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFF80 = 7FFFFF7FFFFFFFFF (cc=3) -+algsi 0 + 0000000000000000 + FFFFFFFFFFFFFF80 = FFFFFFFFFFFFFF80 (cc=1) -+algsi 0 + 0000000000000001 + FFFFFFFFFFFFFF80 = FFFFFFFFFFFFFF81 (cc=1) -+algsi 0 + 000000000000FFFF + FFFFFFFFFFFFFF80 = 000000000000FF7F (cc=3) -+algsi 0 + 0000000000007FFF + FFFFFFFFFFFFFF80 = 0000000000007F7F (cc=3) -+algsi 0 + 0000000000008000 + FFFFFFFFFFFFFF80 = 0000000000007F80 (cc=3) -+algsi 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFF80 = 00000000FFFFFF7F (cc=3) -+algsi 0 + 0000000080000000 + FFFFFFFFFFFFFF80 = 000000007FFFFF80 (cc=3) -+algsi 0 + 000000007FFFFFFF + FFFFFFFFFFFFFF80 = 000000007FFFFF7F (cc=3) -+algsi 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFF80 = FFFFFFFFFFFFFF7F (cc=3) -+algsi 0 + 8000000000000000 + FFFFFFFFFFFFFF80 = 7FFFFFFFFFFFFF80 (cc=3) -+algsi 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFF80 = 7FFFFFFFFFFFFF7F (cc=3) -+asi 0 + 0000000000000000 + 000000000000007F = 0000007F00000000 (cc=2) -+asi 0 + 0000000000000001 + 000000000000007F = 0000007F00000001 (cc=2) -+asi 0 + 000000000000FFFF + 000000000000007F = 0000007F0000FFFF (cc=2) -+asi 0 + 0000000000007FFF + 000000000000007F = 0000007F00007FFF (cc=2) -+asi 0 + 0000000000008000 + 000000000000007F = 0000007F00008000 (cc=2) -+asi 0 + 00000000FFFFFFFF + 000000000000007F = 0000007FFFFFFFFF (cc=2) -+asi 0 + 0000000080000000 + 000000000000007F = 0000007F80000000 (cc=2) -+asi 0 + 000000007FFFFFFF + 000000000000007F = 0000007F7FFFFFFF (cc=2) -+asi 0 + FFFFFFFFFFFFFFFF + 000000000000007F = 0000007EFFFFFFFF (cc=2) -+asi 0 + 8000000000000000 + 000000000000007F = 8000007F00000000 (cc=1) -+asi 0 + 7FFFFFFFFFFFFFFF + 000000000000007F = 8000007EFFFFFFFF (cc=3) -+agsi 0 + 0000000000000000 + 000000000000007F = 000000000000007F (cc=2) -+agsi 0 + 0000000000000001 + 000000000000007F = 0000000000000080 (cc=2) -+agsi 0 + 000000000000FFFF + 000000000000007F = 000000000001007E (cc=2) -+agsi 0 + 0000000000007FFF + 000000000000007F = 000000000000807E (cc=2) -+agsi 0 + 0000000000008000 + 000000000000007F = 000000000000807F (cc=2) -+agsi 0 + 00000000FFFFFFFF + 000000000000007F = 000000010000007E (cc=2) -+agsi 0 + 0000000080000000 + 000000000000007F = 000000008000007F (cc=2) -+agsi 0 + 000000007FFFFFFF + 000000000000007F = 000000008000007E (cc=2) -+agsi 0 + FFFFFFFFFFFFFFFF + 000000000000007F = 000000000000007E (cc=2) -+agsi 0 + 8000000000000000 + 000000000000007F = 800000000000007F (cc=1) -+agsi 0 + 7FFFFFFFFFFFFFFF + 000000000000007F = 800000000000007E (cc=3) -+alsi 0 + 0000000000000000 + 000000000000007F = 0000007F00000000 (cc=1) -+alsi 0 + 0000000000000001 + 000000000000007F = 0000007F00000001 (cc=1) -+alsi 0 + 000000000000FFFF + 000000000000007F = 0000007F0000FFFF (cc=1) -+alsi 0 + 0000000000007FFF + 000000000000007F = 0000007F00007FFF (cc=1) -+alsi 0 + 0000000000008000 + 000000000000007F = 0000007F00008000 (cc=1) -+alsi 0 + 00000000FFFFFFFF + 000000000000007F = 0000007FFFFFFFFF (cc=1) -+alsi 0 + 0000000080000000 + 000000000000007F = 0000007F80000000 (cc=1) -+alsi 0 + 000000007FFFFFFF + 000000000000007F = 0000007F7FFFFFFF (cc=1) -+alsi 0 + FFFFFFFFFFFFFFFF + 000000000000007F = 0000007EFFFFFFFF (cc=3) -+alsi 0 + 8000000000000000 + 000000000000007F = 8000007F00000000 (cc=1) -+alsi 0 + 7FFFFFFFFFFFFFFF + 000000000000007F = 8000007EFFFFFFFF (cc=1) -+algsi 0 + 0000000000000000 + 000000000000007F = 000000000000007F (cc=1) -+algsi 0 + 0000000000000001 + 000000000000007F = 0000000000000080 (cc=1) -+algsi 0 + 000000000000FFFF + 000000000000007F = 000000000001007E (cc=1) -+algsi 0 + 0000000000007FFF + 000000000000007F = 000000000000807E (cc=1) -+algsi 0 + 0000000000008000 + 000000000000007F = 000000000000807F (cc=1) -+algsi 0 + 00000000FFFFFFFF + 000000000000007F = 000000010000007E (cc=1) -+algsi 0 + 0000000080000000 + 000000000000007F = 000000008000007F (cc=1) -+algsi 0 + 000000007FFFFFFF + 000000000000007F = 000000008000007E (cc=1) -+algsi 0 + FFFFFFFFFFFFFFFF + 000000000000007F = 000000000000007E (cc=3) -+algsi 0 + 8000000000000000 + 000000000000007F = 800000000000007F (cc=1) -+algsi 0 + 7FFFFFFFFFFFFFFF + 000000000000007F = 800000000000007E (cc=1) ---- none/tests/s390x/add_GE.vgtest -+++ none/tests/s390x/add_GE.vgtest -@@ -0,0 +1,2 @@ -+prog: add_GE -+prereq: test -x add_GE ---- none/tests/s390x/add.h -+++ none/tests/s390x/add.h -@@ -0,0 +1,123 @@ -+#include -+ -+#define ADD_REG_MEM(insn, s1, s2, CARRY) \ -+({ \ -+ unsigned long tmp = s1; \ -+ int cc; \ -+ asm volatile( "lghi 0," #CARRY "\n" \ -+ "aghi 0, 0\n" \ -+ #insn " %0, %3\n" \ -+ "ipm %1\n" \ -+ "srl %1,28\n" \ -+ : "+d" (tmp), "=d" (cc) \ -+ : "d" (tmp), "Q" (s2) \ -+ : "0", "cc"); \ -+ printf(#insn " " #CARRY " + %16.16lX + %16.16lX = %16.16lX (cc=%d)\n", s1, s2, tmp, cc); \ -+}) -+ -+#define ADD_REG_REG(insn, s1, s2, CARRY) \ -+({ \ -+ unsigned long tmp = s1; \ -+ int cc; \ -+ asm volatile( "lghi 0," #CARRY "\n" \ -+ "aghi 0, 0\n" \ -+ #insn " %0, %3\n" \ -+ "ipm %1\n" \ -+ "srl %1,28\n" \ -+ : "+d" (tmp), "=d" (cc) \ -+ : "d" (tmp), "d" (s2) \ -+ : "0", "cc"); \ -+ printf(#insn " " #CARRY " + %16.16lX + %16.16lX = %16.16lX (cc=%d)\n", s1, s2, tmp, cc); \ -+}) -+ -+#define ADD_REG_IMM(insn, s1, s2, CARRY) \ -+({ \ -+ unsigned long tmp = s1; \ -+ int cc; \ -+ asm volatile( "lghi 0," #CARRY "\n" \ -+ "aghi 0, 0\n" \ -+ #insn " %0," #s2 "\n" \ -+ "ipm %1\n" \ -+ "srl %1,28\n" \ -+ : "+d" (tmp), "=d" (cc) \ -+ : "d" (tmp) \ -+ : "0", "cc"); \ -+ printf(#insn " " #CARRY " + %16.16lX + %16.16lX = %16.16lX (cc=%d)\n", s1, (unsigned long) s2, tmp, cc); \ -+}) -+ -+#define ADD_MEM_IMM(insn, s1, s2, CARRY) \ -+({ \ -+ unsigned long tmp = s1; \ -+ int cc; \ -+ asm volatile( "lghi 0," #CARRY "\n" \ -+ "aghi 0, 0\n" \ -+ #insn " %0," #s2 "\n" \ -+ "ipm %1\n" \ -+ "srl %1,28\n" \ -+ : "+Q" (tmp), "=d" (cc) \ -+ : "Q" (tmp) \ -+ : "0", "cc"); \ -+ printf(#insn " " #CARRY " + %16.16lX + %16.16lX = %16.16lX (cc=%d)\n", s1, (unsigned long) s2, tmp, cc); \ -+}) -+ -+ -+#define memsweep(i, s2, carryset) \ -+({ \ -+ ADD_REG_MEM(i, 0ul, s2, carryset); \ -+ ADD_REG_MEM(i, 1ul, s2, carryset); \ -+ ADD_REG_MEM(i, 0xfffful, s2, carryset); \ -+ ADD_REG_MEM(i, 0x7ffful, s2, carryset); \ -+ ADD_REG_MEM(i, 0x8000ul, s2, carryset); \ -+ ADD_REG_MEM(i, 0xfffffffful, s2, carryset); \ -+ ADD_REG_MEM(i, 0x80000000ul, s2, carryset); \ -+ ADD_REG_MEM(i, 0x7ffffffful, s2, carryset); \ -+ ADD_REG_MEM(i, 0xfffffffffffffffful, s2, carryset); \ -+ ADD_REG_MEM(i, 0x8000000000000000ul, s2, carryset); \ -+ ADD_REG_MEM(i, 0x7ffffffffffffffful, s2, carryset); \ -+}) -+ -+#define regsweep(i, s2, carryset) \ -+({ \ -+ ADD_REG_REG(i, 0ul, s2, carryset); \ -+ ADD_REG_REG(i, 1ul, s2, carryset); \ -+ ADD_REG_REG(i, 0xfffful, s2, carryset); \ -+ ADD_REG_REG(i, 0x7ffful, s2, carryset); \ -+ ADD_REG_REG(i, 0x8000ul, s2, carryset); \ -+ ADD_REG_REG(i, 0xfffffffful, s2, carryset); \ -+ ADD_REG_REG(i, 0x80000000ul, s2, carryset); \ -+ ADD_REG_REG(i, 0x7ffffffful, s2, carryset); \ -+ ADD_REG_REG(i, 0xfffffffffffffffful, s2, carryset); \ -+ ADD_REG_REG(i, 0x8000000000000000ul, s2, carryset); \ -+ ADD_REG_REG(i, 0x7ffffffffffffffful, s2, carryset); \ -+}) -+ -+#define immsweep(i, s2, carryset) \ -+({ \ -+ ADD_REG_IMM(i, 0ul, s2, carryset); \ -+ ADD_REG_IMM(i, 1ul, s2, carryset); \ -+ ADD_REG_IMM(i, 0xfffful, s2, carryset); \ -+ ADD_REG_IMM(i, 0x7ffful, s2, carryset); \ -+ ADD_REG_IMM(i, 0x8000ul, s2, carryset); \ -+ ADD_REG_IMM(i, 0xfffffffful, s2, carryset); \ -+ ADD_REG_IMM(i, 0x80000000ul, s2, carryset); \ -+ ADD_REG_IMM(i, 0x7ffffffful, s2, carryset); \ -+ ADD_REG_IMM(i, 0xfffffffffffffffful, s2, carryset); \ -+ ADD_REG_IMM(i, 0x8000000000000000ul, s2, carryset); \ -+ ADD_REG_IMM(i, 0x7ffffffffffffffful, s2, carryset); \ -+}) -+ -+#define memimmsweep(i, s2, carryset) \ -+({ \ -+ ADD_MEM_IMM(i, 0ul, s2, carryset); \ -+ ADD_MEM_IMM(i, 1ul, s2, carryset); \ -+ ADD_MEM_IMM(i, 0xfffful, s2, carryset); \ -+ ADD_MEM_IMM(i, 0x7ffful, s2, carryset); \ -+ ADD_MEM_IMM(i, 0x8000ul, s2, carryset); \ -+ ADD_MEM_IMM(i, 0xfffffffful, s2, carryset); \ -+ ADD_MEM_IMM(i, 0x80000000ul, s2, carryset); \ -+ ADD_MEM_IMM(i, 0x7ffffffful, s2, carryset); \ -+ ADD_MEM_IMM(i, 0xfffffffffffffffful, s2, carryset); \ -+ ADD_MEM_IMM(i, 0x8000000000000000ul, s2, carryset); \ -+ ADD_MEM_IMM(i, 0x7ffffffffffffffful, s2, carryset); \ -+}) -+ ---- none/tests/s390x/add.stderr.exp -+++ none/tests/s390x/add.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/add.stdout.exp -+++ none/tests/s390x/add.stdout.exp -@@ -0,0 +1,3938 @@ -+a 0 + 0000000000000000 + 0000000000000000 = 0000000000000000 (cc=0) -+a 0 + 0000000000000001 + 0000000000000000 = 0000000000000001 (cc=2) -+a 0 + 000000000000FFFF + 0000000000000000 = 000000000000FFFF (cc=2) -+a 0 + 0000000000007FFF + 0000000000000000 = 0000000000007FFF (cc=2) -+a 0 + 0000000000008000 + 0000000000000000 = 0000000000008000 (cc=2) -+a 0 + 00000000FFFFFFFF + 0000000000000000 = 00000000FFFFFFFF (cc=1) -+a 0 + 0000000080000000 + 0000000000000000 = 0000000080000000 (cc=1) -+a 0 + 000000007FFFFFFF + 0000000000000000 = 000000007FFFFFFF (cc=2) -+a 0 + FFFFFFFFFFFFFFFF + 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+a 0 + 8000000000000000 + 0000000000000000 = 8000000000000000 (cc=0) -+a 0 + 7FFFFFFFFFFFFFFF + 0000000000000000 = 7FFFFFFFFFFFFFFF (cc=1) -+ah 0 + 0000000000000000 + 0000000000000000 = 0000000000000000 (cc=0) -+ah 0 + 0000000000000001 + 0000000000000000 = 0000000000000001 (cc=2) -+ah 0 + 000000000000FFFF + 0000000000000000 = 000000000000FFFF (cc=2) -+ah 0 + 0000000000007FFF + 0000000000000000 = 0000000000007FFF (cc=2) -+ah 0 + 0000000000008000 + 0000000000000000 = 0000000000008000 (cc=2) -+ah 0 + 00000000FFFFFFFF + 0000000000000000 = 00000000FFFFFFFF (cc=1) -+ah 0 + 0000000080000000 + 0000000000000000 = 0000000080000000 (cc=1) -+ah 0 + 000000007FFFFFFF + 0000000000000000 = 000000007FFFFFFF (cc=2) -+ah 0 + FFFFFFFFFFFFFFFF + 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+ah 0 + 8000000000000000 + 0000000000000000 = 8000000000000000 (cc=0) -+ah 0 + 7FFFFFFFFFFFFFFF + 0000000000000000 = 7FFFFFFFFFFFFFFF (cc=1) -+ag 0 + 0000000000000000 + 0000000000000000 = 0000000000000000 (cc=0) -+ag 0 + 0000000000000001 + 0000000000000000 = 0000000000000001 (cc=2) -+ag 0 + 000000000000FFFF + 0000000000000000 = 000000000000FFFF (cc=2) -+ag 0 + 0000000000007FFF + 0000000000000000 = 0000000000007FFF (cc=2) -+ag 0 + 0000000000008000 + 0000000000000000 = 0000000000008000 (cc=2) -+ag 0 + 00000000FFFFFFFF + 0000000000000000 = 00000000FFFFFFFF (cc=2) -+ag 0 + 0000000080000000 + 0000000000000000 = 0000000080000000 (cc=2) -+ag 0 + 000000007FFFFFFF + 0000000000000000 = 000000007FFFFFFF (cc=2) -+ag 0 + FFFFFFFFFFFFFFFF + 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+ag 0 + 8000000000000000 + 0000000000000000 = 8000000000000000 (cc=1) -+ag 0 + 7FFFFFFFFFFFFFFF + 0000000000000000 = 7FFFFFFFFFFFFFFF (cc=2) -+agf 0 + 0000000000000000 + 0000000000000000 = 0000000000000000 (cc=0) -+agf 0 + 0000000000000001 + 0000000000000000 = 0000000000000001 (cc=2) -+agf 0 + 000000000000FFFF + 0000000000000000 = 000000000000FFFF (cc=2) -+agf 0 + 0000000000007FFF + 0000000000000000 = 0000000000007FFF (cc=2) -+agf 0 + 0000000000008000 + 0000000000000000 = 0000000000008000 (cc=2) -+agf 0 + 00000000FFFFFFFF + 0000000000000000 = 00000000FFFFFFFF (cc=2) -+agf 0 + 0000000080000000 + 0000000000000000 = 0000000080000000 (cc=2) -+agf 0 + 000000007FFFFFFF + 0000000000000000 = 000000007FFFFFFF (cc=2) -+agf 0 + FFFFFFFFFFFFFFFF + 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + 8000000000000000 + 0000000000000000 = 8000000000000000 (cc=1) -+agf 0 + 7FFFFFFFFFFFFFFF + 0000000000000000 = 7FFFFFFFFFFFFFFF (cc=2) -+al 0 + 0000000000000000 + 0000000000000000 = 0000000000000000 (cc=0) -+al 0 + 0000000000000001 + 0000000000000000 = 0000000000000001 (cc=1) -+al 0 + 000000000000FFFF + 0000000000000000 = 000000000000FFFF (cc=1) -+al 0 + 0000000000007FFF + 0000000000000000 = 0000000000007FFF (cc=1) -+al 0 + 0000000000008000 + 0000000000000000 = 0000000000008000 (cc=1) -+al 0 + 00000000FFFFFFFF + 0000000000000000 = 00000000FFFFFFFF (cc=1) -+al 0 + 0000000080000000 + 0000000000000000 = 0000000080000000 (cc=1) -+al 0 + 000000007FFFFFFF + 0000000000000000 = 000000007FFFFFFF (cc=1) -+al 0 + FFFFFFFFFFFFFFFF + 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+al 0 + 8000000000000000 + 0000000000000000 = 8000000000000000 (cc=0) -+al 0 + 7FFFFFFFFFFFFFFF + 0000000000000000 = 7FFFFFFFFFFFFFFF (cc=1) -+alg 0 + 0000000000000000 + 0000000000000000 = 0000000000000000 (cc=0) -+alg 0 + 0000000000000001 + 0000000000000000 = 0000000000000001 (cc=1) -+alg 0 + 000000000000FFFF + 0000000000000000 = 000000000000FFFF (cc=1) -+alg 0 + 0000000000007FFF + 0000000000000000 = 0000000000007FFF (cc=1) -+alg 0 + 0000000000008000 + 0000000000000000 = 0000000000008000 (cc=1) -+alg 0 + 00000000FFFFFFFF + 0000000000000000 = 00000000FFFFFFFF (cc=1) -+alg 0 + 0000000080000000 + 0000000000000000 = 0000000080000000 (cc=1) -+alg 0 + 000000007FFFFFFF + 0000000000000000 = 000000007FFFFFFF (cc=1) -+alg 0 + FFFFFFFFFFFFFFFF + 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+alg 0 + 8000000000000000 + 0000000000000000 = 8000000000000000 (cc=1) -+alg 0 + 7FFFFFFFFFFFFFFF + 0000000000000000 = 7FFFFFFFFFFFFFFF (cc=1) -+agf 0 + 0000000000000000 + 0000000000000000 = 0000000000000000 (cc=0) -+agf 0 + 0000000000000001 + 0000000000000000 = 0000000000000001 (cc=2) -+agf 0 + 000000000000FFFF + 0000000000000000 = 000000000000FFFF (cc=2) -+agf 0 + 0000000000007FFF + 0000000000000000 = 0000000000007FFF (cc=2) -+agf 0 + 0000000000008000 + 0000000000000000 = 0000000000008000 (cc=2) -+agf 0 + 00000000FFFFFFFF + 0000000000000000 = 00000000FFFFFFFF (cc=2) -+agf 0 + 0000000080000000 + 0000000000000000 = 0000000080000000 (cc=2) -+agf 0 + 000000007FFFFFFF + 0000000000000000 = 000000007FFFFFFF (cc=2) -+agf 0 + FFFFFFFFFFFFFFFF + 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + 8000000000000000 + 0000000000000000 = 8000000000000000 (cc=1) -+agf 0 + 7FFFFFFFFFFFFFFF + 0000000000000000 = 7FFFFFFFFFFFFFFF (cc=2) -+algf 0 + 0000000000000000 + 0000000000000000 = 0000000000000000 (cc=0) -+algf 0 + 0000000000000001 + 0000000000000000 = 0000000000000001 (cc=1) -+algf 0 + 000000000000FFFF + 0000000000000000 = 000000000000FFFF (cc=1) -+algf 0 + 0000000000007FFF + 0000000000000000 = 0000000000007FFF (cc=1) -+algf 0 + 0000000000008000 + 0000000000000000 = 0000000000008000 (cc=1) -+algf 0 + 00000000FFFFFFFF + 0000000000000000 = 00000000FFFFFFFF (cc=1) -+algf 0 + 0000000080000000 + 0000000000000000 = 0000000080000000 (cc=1) -+algf 0 + 000000007FFFFFFF + 0000000000000000 = 000000007FFFFFFF (cc=1) -+algf 0 + FFFFFFFFFFFFFFFF + 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+algf 0 + 8000000000000000 + 0000000000000000 = 8000000000000000 (cc=1) -+algf 0 + 7FFFFFFFFFFFFFFF + 0000000000000000 = 7FFFFFFFFFFFFFFF (cc=1) -+ar 0 + 0000000000000000 + 0000000000000000 = 0000000000000000 (cc=0) -+ar 0 + 0000000000000001 + 0000000000000000 = 0000000000000001 (cc=2) -+ar 0 + 000000000000FFFF + 0000000000000000 = 000000000000FFFF (cc=2) -+ar 0 + 0000000000007FFF + 0000000000000000 = 0000000000007FFF (cc=2) -+ar 0 + 0000000000008000 + 0000000000000000 = 0000000000008000 (cc=2) -+ar 0 + 00000000FFFFFFFF + 0000000000000000 = 00000000FFFFFFFF (cc=1) -+ar 0 + 0000000080000000 + 0000000000000000 = 0000000080000000 (cc=1) -+ar 0 + 000000007FFFFFFF + 0000000000000000 = 000000007FFFFFFF (cc=2) -+ar 0 + FFFFFFFFFFFFFFFF + 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+ar 0 + 8000000000000000 + 0000000000000000 = 8000000000000000 (cc=0) -+ar 0 + 7FFFFFFFFFFFFFFF + 0000000000000000 = 7FFFFFFFFFFFFFFF (cc=1) -+agr 0 + 0000000000000000 + 0000000000000000 = 0000000000000000 (cc=0) -+agr 0 + 0000000000000001 + 0000000000000000 = 0000000000000001 (cc=2) -+agr 0 + 000000000000FFFF + 0000000000000000 = 000000000000FFFF (cc=2) -+agr 0 + 0000000000007FFF + 0000000000000000 = 0000000000007FFF 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7FFFFFFFFFFFFFFF + 7FFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=3) -+algr 0 + 0000000000000000 + 7FFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF (cc=1) -+algr 0 + 0000000000000001 + 7FFFFFFFFFFFFFFF = 8000000000000000 (cc=1) -+algr 0 + 000000000000FFFF + 7FFFFFFFFFFFFFFF = 800000000000FFFE (cc=1) -+algr 0 + 0000000000007FFF + 7FFFFFFFFFFFFFFF = 8000000000007FFE (cc=1) -+algr 0 + 0000000000008000 + 7FFFFFFFFFFFFFFF = 8000000000007FFF (cc=1) -+algr 0 + 00000000FFFFFFFF + 7FFFFFFFFFFFFFFF = 80000000FFFFFFFE (cc=1) -+algr 0 + 0000000080000000 + 7FFFFFFFFFFFFFFF = 800000007FFFFFFF (cc=1) -+algr 0 + 000000007FFFFFFF + 7FFFFFFFFFFFFFFF = 800000007FFFFFFE (cc=1) -+algr 0 + FFFFFFFFFFFFFFFF + 7FFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=3) -+algr 0 + 8000000000000000 + 7FFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+algr 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=1) -+algfr 0 + 0000000000000000 + 7FFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+algfr 0 + 0000000000000001 + 7FFFFFFFFFFFFFFF = 0000000100000000 (cc=1) -+algfr 0 + 000000000000FFFF + 7FFFFFFFFFFFFFFF = 000000010000FFFE (cc=1) -+algfr 0 + 0000000000007FFF + 7FFFFFFFFFFFFFFF = 0000000100007FFE (cc=1) -+algfr 0 + 0000000000008000 + 7FFFFFFFFFFFFFFF = 0000000100007FFF (cc=1) -+algfr 0 + 00000000FFFFFFFF + 7FFFFFFFFFFFFFFF = 00000001FFFFFFFE (cc=1) -+algfr 0 + 0000000080000000 + 7FFFFFFFFFFFFFFF = 000000017FFFFFFF (cc=1) -+algfr 0 + 000000007FFFFFFF + 7FFFFFFFFFFFFFFF = 000000017FFFFFFE (cc=1) -+algfr 0 + FFFFFFFFFFFFFFFF + 7FFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=3) -+algfr 0 + 8000000000000000 + 7FFFFFFFFFFFFFFF = 80000000FFFFFFFF (cc=1) -+algfr 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFFFFFFFFFF = 80000000FFFFFFFE (cc=1) -+alc 0 + 0000000000000000 + 7FFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=1) -+alc 0 + 0000000000000001 + 7FFFFFFFFFFFFFFF = 0000000080000000 (cc=1) -+alc 0 + 000000000000FFFF + 7FFFFFFFFFFFFFFF = 000000008000FFFE (cc=1) -+alc 0 + 0000000000007FFF + 7FFFFFFFFFFFFFFF = 0000000080007FFE (cc=1) -+alc 0 + 0000000000008000 + 7FFFFFFFFFFFFFFF = 0000000080007FFF (cc=1) -+alc 0 + 00000000FFFFFFFF + 7FFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=3) -+alc 0 + 0000000080000000 + 7FFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+alc 0 + 000000007FFFFFFF + 7FFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=1) -+alc 0 + FFFFFFFFFFFFFFFF + 7FFFFFFFFFFFFFFF = FFFFFFFF7FFFFFFE (cc=3) -+alc 0 + 8000000000000000 + 7FFFFFFFFFFFFFFF = 800000007FFFFFFF (cc=1) -+alc 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFFFFFFFFFF = 7FFFFFFF7FFFFFFE (cc=3) -+alcg 0 + 0000000000000000 + 7FFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF (cc=1) -+alcg 0 + 0000000000000001 + 7FFFFFFFFFFFFFFF = 8000000000000000 (cc=1) -+alcg 0 + 000000000000FFFF + 7FFFFFFFFFFFFFFF = 800000000000FFFE (cc=1) -+alcg 0 + 0000000000007FFF + 7FFFFFFFFFFFFFFF = 8000000000007FFE (cc=1) -+alcg 0 + 0000000000008000 + 7FFFFFFFFFFFFFFF = 8000000000007FFF (cc=1) -+alcg 0 + 00000000FFFFFFFF + 7FFFFFFFFFFFFFFF = 80000000FFFFFFFE (cc=1) -+alcg 0 + 0000000080000000 + 7FFFFFFFFFFFFFFF = 800000007FFFFFFF (cc=1) -+alcg 0 + 000000007FFFFFFF + 7FFFFFFFFFFFFFFF = 800000007FFFFFFE (cc=1) -+alcg 0 + FFFFFFFFFFFFFFFF + 7FFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=3) -+alcg 0 + 8000000000000000 + 7FFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+alcg 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=1) -+alcr 0 + 0000000000000000 + 7FFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+alcr 0 + 0000000000000001 + 7FFFFFFFFFFFFFFF = 0000000000000000 (cc=2) -+alcr 0 + 000000000000FFFF + 7FFFFFFFFFFFFFFF = 000000000000FFFE (cc=3) -+alcr 0 + 0000000000007FFF + 7FFFFFFFFFFFFFFF = 0000000000007FFE (cc=3) -+alcr 0 + 0000000000008000 + 7FFFFFFFFFFFFFFF = 0000000000007FFF (cc=3) -+alcr 0 + 00000000FFFFFFFF + 7FFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=3) -+alcr 0 + 0000000080000000 + 7FFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=3) -+alcr 0 + 000000007FFFFFFF + 7FFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=3) -+alcr 0 + FFFFFFFFFFFFFFFF + 7FFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=3) -+alcr 0 + 8000000000000000 + 7FFFFFFFFFFFFFFF = 80000000FFFFFFFF (cc=1) -+alcr 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=3) -+alcgr 0 + 0000000000000000 + 7FFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF (cc=1) -+alcgr 0 + 0000000000000001 + 7FFFFFFFFFFFFFFF = 8000000000000000 (cc=1) -+alcgr 0 + 000000000000FFFF + 7FFFFFFFFFFFFFFF = 800000000000FFFE (cc=1) -+alcgr 0 + 0000000000007FFF + 7FFFFFFFFFFFFFFF = 8000000000007FFE (cc=1) -+alcgr 0 + 0000000000008000 + 7FFFFFFFFFFFFFFF = 8000000000007FFF (cc=1) -+alcgr 0 + 00000000FFFFFFFF + 7FFFFFFFFFFFFFFF = 80000000FFFFFFFE (cc=1) -+alcgr 0 + 0000000080000000 + 7FFFFFFFFFFFFFFF = 800000007FFFFFFF (cc=1) -+alcgr 0 + 000000007FFFFFFF + 7FFFFFFFFFFFFFFF = 800000007FFFFFFE (cc=1) -+alcgr 0 + FFFFFFFFFFFFFFFF + 7FFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=3) -+alcgr 0 + 8000000000000000 + 7FFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+alcgr 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=1) -+alc 1 + 0000000000000000 + 7FFFFFFFFFFFFFFF = 0000000080000000 (cc=1) -+alc 1 + 0000000000000001 + 7FFFFFFFFFFFFFFF = 0000000080000001 (cc=1) -+alc 1 + 000000000000FFFF + 7FFFFFFFFFFFFFFF = 000000008000FFFF (cc=1) -+alc 1 + 0000000000007FFF + 7FFFFFFFFFFFFFFF = 0000000080007FFF (cc=1) -+alc 1 + 0000000000008000 + 7FFFFFFFFFFFFFFF = 0000000080008000 (cc=1) -+alc 1 + 00000000FFFFFFFF + 7FFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=3) -+alc 1 + 0000000080000000 + 7FFFFFFFFFFFFFFF = 0000000000000000 (cc=2) -+alc 1 + 000000007FFFFFFF + 7FFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+alc 1 + FFFFFFFFFFFFFFFF + 7FFFFFFFFFFFFFFF = FFFFFFFF7FFFFFFF (cc=3) -+alc 1 + 8000000000000000 + 7FFFFFFFFFFFFFFF = 8000000080000000 (cc=1) -+alc 1 + 7FFFFFFFFFFFFFFF + 7FFFFFFFFFFFFFFF = 7FFFFFFF7FFFFFFF (cc=3) -+alcg 1 + 0000000000000000 + 7FFFFFFFFFFFFFFF = 8000000000000000 (cc=1) -+alcg 1 + 0000000000000001 + 7FFFFFFFFFFFFFFF = 8000000000000001 (cc=1) -+alcg 1 + 000000000000FFFF + 7FFFFFFFFFFFFFFF = 800000000000FFFF (cc=1) -+alcg 1 + 0000000000007FFF + 7FFFFFFFFFFFFFFF = 8000000000007FFF (cc=1) -+alcg 1 + 0000000000008000 + 7FFFFFFFFFFFFFFF = 8000000000008000 (cc=1) -+alcg 1 + 00000000FFFFFFFF + 7FFFFFFFFFFFFFFF = 80000000FFFFFFFF (cc=1) -+alcg 1 + 0000000080000000 + 7FFFFFFFFFFFFFFF = 8000000080000000 (cc=1) -+alcg 1 + 000000007FFFFFFF + 7FFFFFFFFFFFFFFF = 800000007FFFFFFF (cc=1) -+alcg 1 + FFFFFFFFFFFFFFFF + 7FFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF (cc=3) -+alcg 1 + 8000000000000000 + 7FFFFFFFFFFFFFFF = 0000000000000000 (cc=2) -+alcg 1 + 7FFFFFFFFFFFFFFF + 7FFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+alcr 1 + 0000000000000000 + 7FFFFFFFFFFFFFFF = 0000000000000000 (cc=2) -+alcr 1 + 0000000000000001 + 7FFFFFFFFFFFFFFF = 0000000000000001 (cc=3) -+alcr 1 + 000000000000FFFF + 7FFFFFFFFFFFFFFF = 000000000000FFFF (cc=3) -+alcr 1 + 0000000000007FFF + 7FFFFFFFFFFFFFFF = 0000000000007FFF (cc=3) -+alcr 1 + 0000000000008000 + 7FFFFFFFFFFFFFFF = 0000000000008000 (cc=3) -+alcr 1 + 00000000FFFFFFFF + 7FFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=3) -+alcr 1 + 0000000080000000 + 7FFFFFFFFFFFFFFF = 0000000080000000 (cc=3) -+alcr 1 + 000000007FFFFFFF + 7FFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=3) -+alcr 1 + FFFFFFFFFFFFFFFF + 7FFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=3) -+alcr 1 + 8000000000000000 + 7FFFFFFFFFFFFFFF = 8000000000000000 (cc=2) -+alcr 1 + 7FFFFFFFFFFFFFFF + 7FFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF (cc=3) -+alcgr 1 + 0000000000000000 + 7FFFFFFFFFFFFFFF = 8000000000000000 (cc=1) -+alcgr 1 + 0000000000000001 + 7FFFFFFFFFFFFFFF = 8000000000000001 (cc=1) -+alcgr 1 + 000000000000FFFF + 7FFFFFFFFFFFFFFF = 800000000000FFFF (cc=1) -+alcgr 1 + 0000000000007FFF + 7FFFFFFFFFFFFFFF = 8000000000007FFF (cc=1) -+alcgr 1 + 0000000000008000 + 7FFFFFFFFFFFFFFF = 8000000000008000 (cc=1) -+alcgr 1 + 00000000FFFFFFFF + 7FFFFFFFFFFFFFFF = 80000000FFFFFFFF (cc=1) -+alcgr 1 + 0000000080000000 + 7FFFFFFFFFFFFFFF = 8000000080000000 (cc=1) -+alcgr 1 + 000000007FFFFFFF + 7FFFFFFFFFFFFFFF = 800000007FFFFFFF (cc=1) -+alcgr 1 + FFFFFFFFFFFFFFFF + 7FFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF (cc=3) -+alcgr 1 + 8000000000000000 + 7FFFFFFFFFFFFFFF = 0000000000000000 (cc=2) -+alcgr 1 + 7FFFFFFFFFFFFFFF + 7FFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+ahy 0 + 0000000000000000 + 7FFFFFFFFFFFFFFF = 0000000000007FFF (cc=2) -+ahy 0 + 0000000000000001 + 7FFFFFFFFFFFFFFF = 0000000000008000 (cc=2) -+ahy 0 + 000000000000FFFF + 7FFFFFFFFFFFFFFF = 0000000000017FFE (cc=2) -+ahy 0 + 0000000000007FFF + 7FFFFFFFFFFFFFFF = 000000000000FFFE (cc=2) -+ahy 0 + 0000000000008000 + 7FFFFFFFFFFFFFFF = 000000000000FFFF (cc=2) -+ahy 0 + 00000000FFFFFFFF + 7FFFFFFFFFFFFFFF = 0000000000007FFE (cc=2) -+ahy 0 + 0000000080000000 + 7FFFFFFFFFFFFFFF = 0000000080007FFF (cc=1) -+ahy 0 + 000000007FFFFFFF + 7FFFFFFFFFFFFFFF = 0000000080007FFE (cc=3) -+ahy 0 + FFFFFFFFFFFFFFFF + 7FFFFFFFFFFFFFFF = FFFFFFFF00007FFE (cc=2) -+ahy 0 + 8000000000000000 + 7FFFFFFFFFFFFFFF = 8000000000007FFF (cc=2) -+ahy 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFFFFFFFFFF = 7FFFFFFF00007FFE (cc=2) -+ay 0 + 0000000000000000 + 7FFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=2) -+ay 0 + 0000000000000001 + 7FFFFFFFFFFFFFFF = 0000000080000000 (cc=3) -+ay 0 + 000000000000FFFF + 7FFFFFFFFFFFFFFF = 000000008000FFFE (cc=3) -+ay 0 + 0000000000007FFF + 7FFFFFFFFFFFFFFF = 0000000080007FFE (cc=3) -+ay 0 + 0000000000008000 + 7FFFFFFFFFFFFFFF = 0000000080007FFF (cc=3) -+ay 0 + 00000000FFFFFFFF + 7FFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=2) -+ay 0 + 0000000080000000 + 7FFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+ay 0 + 000000007FFFFFFF + 7FFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=3) -+ay 0 + FFFFFFFFFFFFFFFF + 7FFFFFFFFFFFFFFF = FFFFFFFF7FFFFFFE (cc=2) -+ay 0 + 8000000000000000 + 7FFFFFFFFFFFFFFF = 800000007FFFFFFF (cc=2) -+ay 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFFFFFFFFFF = 7FFFFFFF7FFFFFFE (cc=2) -+aly 0 + 0000000000000000 + 7FFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=1) -+aly 0 + 0000000000000001 + 7FFFFFFFFFFFFFFF = 0000000080000000 (cc=1) -+aly 0 + 000000000000FFFF + 7FFFFFFFFFFFFFFF = 000000008000FFFE (cc=1) -+aly 0 + 0000000000007FFF + 7FFFFFFFFFFFFFFF = 0000000080007FFE (cc=1) -+aly 0 + 0000000000008000 + 7FFFFFFFFFFFFFFF = 0000000080007FFF (cc=1) -+aly 0 + 00000000FFFFFFFF + 7FFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=3) -+aly 0 + 0000000080000000 + 7FFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+aly 0 + 000000007FFFFFFF + 7FFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=1) -+aly 0 + FFFFFFFFFFFFFFFF + 7FFFFFFFFFFFFFFF = FFFFFFFF7FFFFFFE (cc=3) -+aly 0 + 8000000000000000 + 7FFFFFFFFFFFFFFF = 800000007FFFFFFF (cc=1) -+aly 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFFFFFFFFFF = 7FFFFFFF7FFFFFFE (cc=3) -+a 0 + 0000000000000000 + 8000000000000000 = 0000000080000000 (cc=1) -+a 0 + 0000000000000001 + 8000000000000000 = 0000000080000001 (cc=1) -+a 0 + 000000000000FFFF + 8000000000000000 = 000000008000FFFF (cc=1) -+a 0 + 0000000000007FFF + 8000000000000000 = 0000000080007FFF (cc=1) -+a 0 + 0000000000008000 + 8000000000000000 = 0000000080008000 (cc=1) -+a 0 + 00000000FFFFFFFF + 8000000000000000 = 000000007FFFFFFF (cc=3) -+a 0 + 0000000080000000 + 8000000000000000 = 0000000000000000 (cc=3) -+a 0 + 000000007FFFFFFF + 8000000000000000 = 00000000FFFFFFFF (cc=1) -+a 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFF7FFFFFFF (cc=3) -+a 0 + 8000000000000000 + 8000000000000000 = 8000000080000000 (cc=1) -+a 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFF7FFFFFFF (cc=3) -+ah 0 + 0000000000000000 + 8000000000000000 = 00000000FFFF8000 (cc=1) -+ah 0 + 0000000000000001 + 8000000000000000 = 00000000FFFF8001 (cc=1) -+ah 0 + 000000000000FFFF + 8000000000000000 = 0000000000007FFF (cc=2) -+ah 0 + 0000000000007FFF + 8000000000000000 = 00000000FFFFFFFF (cc=1) -+ah 0 + 0000000000008000 + 8000000000000000 = 0000000000000000 (cc=0) -+ah 0 + 00000000FFFFFFFF + 8000000000000000 = 00000000FFFF7FFF (cc=1) -+ah 0 + 0000000080000000 + 8000000000000000 = 000000007FFF8000 (cc=3) -+ah 0 + 000000007FFFFFFF + 8000000000000000 = 000000007FFF7FFF (cc=2) -+ah 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFFFFFF7FFF (cc=1) -+ah 0 + 8000000000000000 + 8000000000000000 = 80000000FFFF8000 (cc=1) -+ah 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFFFFFF7FFF (cc=1) -+ag 0 + 0000000000000000 + 8000000000000000 = 8000000000000000 (cc=1) -+ag 0 + 0000000000000001 + 8000000000000000 = 8000000000000001 (cc=1) -+ag 0 + 000000000000FFFF + 8000000000000000 = 800000000000FFFF (cc=1) -+ag 0 + 0000000000007FFF + 8000000000000000 = 8000000000007FFF (cc=1) -+ag 0 + 0000000000008000 + 8000000000000000 = 8000000000008000 (cc=1) -+ag 0 + 00000000FFFFFFFF + 8000000000000000 = 80000000FFFFFFFF (cc=1) -+ag 0 + 0000000080000000 + 8000000000000000 = 8000000080000000 (cc=1) -+ag 0 + 000000007FFFFFFF + 8000000000000000 = 800000007FFFFFFF (cc=1) -+ag 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFFFFFFFFFF (cc=3) -+ag 0 + 8000000000000000 + 8000000000000000 = 0000000000000000 (cc=3) -+ag 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + 0000000000000000 + 8000000000000000 = FFFFFFFF80000000 (cc=1) -+agf 0 + 0000000000000001 + 8000000000000000 = FFFFFFFF80000001 (cc=1) -+agf 0 + 000000000000FFFF + 8000000000000000 = FFFFFFFF8000FFFF (cc=1) -+agf 0 + 0000000000007FFF + 8000000000000000 = FFFFFFFF80007FFF (cc=1) -+agf 0 + 0000000000008000 + 8000000000000000 = FFFFFFFF80008000 (cc=1) -+agf 0 + 00000000FFFFFFFF + 8000000000000000 = 000000007FFFFFFF (cc=2) -+agf 0 + 0000000080000000 + 8000000000000000 = 0000000000000000 (cc=0) -+agf 0 + 000000007FFFFFFF + 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFF7FFFFFFF (cc=1) -+agf 0 + 8000000000000000 + 8000000000000000 = 7FFFFFFF80000000 (cc=3) -+agf 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFF7FFFFFFF (cc=2) -+al 0 + 0000000000000000 + 8000000000000000 = 0000000080000000 (cc=1) -+al 0 + 0000000000000001 + 8000000000000000 = 0000000080000001 (cc=1) -+al 0 + 000000000000FFFF + 8000000000000000 = 000000008000FFFF (cc=1) -+al 0 + 0000000000007FFF + 8000000000000000 = 0000000080007FFF (cc=1) -+al 0 + 0000000000008000 + 8000000000000000 = 0000000080008000 (cc=1) -+al 0 + 00000000FFFFFFFF + 8000000000000000 = 000000007FFFFFFF (cc=3) -+al 0 + 0000000080000000 + 8000000000000000 = 0000000000000000 (cc=2) -+al 0 + 000000007FFFFFFF + 8000000000000000 = 00000000FFFFFFFF (cc=1) -+al 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFF7FFFFFFF (cc=3) -+al 0 + 8000000000000000 + 8000000000000000 = 8000000080000000 (cc=1) -+al 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFF7FFFFFFF (cc=3) -+alg 0 + 0000000000000000 + 8000000000000000 = 8000000000000000 (cc=1) -+alg 0 + 0000000000000001 + 8000000000000000 = 8000000000000001 (cc=1) -+alg 0 + 000000000000FFFF + 8000000000000000 = 800000000000FFFF (cc=1) -+alg 0 + 0000000000007FFF + 8000000000000000 = 8000000000007FFF (cc=1) -+alg 0 + 0000000000008000 + 8000000000000000 = 8000000000008000 (cc=1) -+alg 0 + 00000000FFFFFFFF + 8000000000000000 = 80000000FFFFFFFF (cc=1) -+alg 0 + 0000000080000000 + 8000000000000000 = 8000000080000000 (cc=1) -+alg 0 + 000000007FFFFFFF + 8000000000000000 = 800000007FFFFFFF (cc=1) -+alg 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFFFFFFFFFF (cc=3) -+alg 0 + 8000000000000000 + 8000000000000000 = 0000000000000000 (cc=2) -+alg 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + 0000000000000000 + 8000000000000000 = FFFFFFFF80000000 (cc=1) -+agf 0 + 0000000000000001 + 8000000000000000 = FFFFFFFF80000001 (cc=1) -+agf 0 + 000000000000FFFF + 8000000000000000 = FFFFFFFF8000FFFF (cc=1) -+agf 0 + 0000000000007FFF + 8000000000000000 = FFFFFFFF80007FFF (cc=1) -+agf 0 + 0000000000008000 + 8000000000000000 = FFFFFFFF80008000 (cc=1) -+agf 0 + 00000000FFFFFFFF + 8000000000000000 = 000000007FFFFFFF (cc=2) -+agf 0 + 0000000080000000 + 8000000000000000 = 0000000000000000 (cc=0) -+agf 0 + 000000007FFFFFFF + 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFF7FFFFFFF (cc=1) -+agf 0 + 8000000000000000 + 8000000000000000 = 7FFFFFFF80000000 (cc=3) -+agf 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFF7FFFFFFF (cc=2) -+algf 0 + 0000000000000000 + 8000000000000000 = 0000000080000000 (cc=1) -+algf 0 + 0000000000000001 + 8000000000000000 = 0000000080000001 (cc=1) -+algf 0 + 000000000000FFFF + 8000000000000000 = 000000008000FFFF (cc=1) -+algf 0 + 0000000000007FFF + 8000000000000000 = 0000000080007FFF (cc=1) -+algf 0 + 0000000000008000 + 8000000000000000 = 0000000080008000 (cc=1) -+algf 0 + 00000000FFFFFFFF + 8000000000000000 = 000000017FFFFFFF (cc=1) -+algf 0 + 0000000080000000 + 8000000000000000 = 0000000100000000 (cc=1) -+algf 0 + 000000007FFFFFFF + 8000000000000000 = 00000000FFFFFFFF (cc=1) -+algf 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = 000000007FFFFFFF (cc=3) -+algf 0 + 8000000000000000 + 8000000000000000 = 8000000080000000 (cc=1) -+algf 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 800000007FFFFFFF (cc=1) -+ar 0 + 0000000000000000 + 8000000000000000 = 0000000000000000 (cc=0) -+ar 0 + 0000000000000001 + 8000000000000000 = 0000000000000001 (cc=2) -+ar 0 + 000000000000FFFF + 8000000000000000 = 000000000000FFFF (cc=2) -+ar 0 + 0000000000007FFF + 8000000000000000 = 0000000000007FFF (cc=2) -+ar 0 + 0000000000008000 + 8000000000000000 = 0000000000008000 (cc=2) -+ar 0 + 00000000FFFFFFFF + 8000000000000000 = 00000000FFFFFFFF (cc=1) -+ar 0 + 0000000080000000 + 8000000000000000 = 0000000080000000 (cc=1) -+ar 0 + 000000007FFFFFFF + 8000000000000000 = 000000007FFFFFFF (cc=2) -+ar 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+ar 0 + 8000000000000000 + 8000000000000000 = 8000000000000000 (cc=0) -+ar 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFFFFFFFFFF (cc=1) -+agr 0 + 0000000000000000 + 8000000000000000 = 8000000000000000 (cc=1) -+agr 0 + 0000000000000001 + 8000000000000000 = 8000000000000001 (cc=1) -+agr 0 + 000000000000FFFF + 8000000000000000 = 800000000000FFFF (cc=1) -+agr 0 + 0000000000007FFF + 8000000000000000 = 8000000000007FFF (cc=1) -+agr 0 + 0000000000008000 + 8000000000000000 = 8000000000008000 (cc=1) -+agr 0 + 00000000FFFFFFFF + 8000000000000000 = 80000000FFFFFFFF (cc=1) -+agr 0 + 0000000080000000 + 8000000000000000 = 8000000080000000 (cc=1) -+agr 0 + 000000007FFFFFFF + 8000000000000000 = 800000007FFFFFFF (cc=1) -+agr 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFFFFFFFFFF (cc=3) -+agr 0 + 8000000000000000 + 8000000000000000 = 0000000000000000 (cc=3) -+agr 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+agfr 0 + 0000000000000000 + 8000000000000000 = 0000000000000000 (cc=0) -+agfr 0 + 0000000000000001 + 8000000000000000 = 0000000000000001 (cc=2) -+agfr 0 + 000000000000FFFF + 8000000000000000 = 000000000000FFFF (cc=2) -+agfr 0 + 0000000000007FFF + 8000000000000000 = 0000000000007FFF (cc=2) -+agfr 0 + 0000000000008000 + 8000000000000000 = 0000000000008000 (cc=2) -+agfr 0 + 00000000FFFFFFFF + 8000000000000000 = 00000000FFFFFFFF (cc=2) -+agfr 0 + 0000000080000000 + 8000000000000000 = 0000000080000000 (cc=2) -+agfr 0 + 000000007FFFFFFF + 8000000000000000 = 000000007FFFFFFF (cc=2) -+agfr 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+agfr 0 + 8000000000000000 + 8000000000000000 = 8000000000000000 (cc=1) -+agfr 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFFFFFFFFFF (cc=2) -+alr 0 + 0000000000000000 + 8000000000000000 = 0000000000000000 (cc=0) -+alr 0 + 0000000000000001 + 8000000000000000 = 0000000000000001 (cc=1) -+alr 0 + 000000000000FFFF + 8000000000000000 = 000000000000FFFF (cc=1) -+alr 0 + 0000000000007FFF + 8000000000000000 = 0000000000007FFF (cc=1) -+alr 0 + 0000000000008000 + 8000000000000000 = 0000000000008000 (cc=1) -+alr 0 + 00000000FFFFFFFF + 8000000000000000 = 00000000FFFFFFFF (cc=1) -+alr 0 + 0000000080000000 + 8000000000000000 = 0000000080000000 (cc=1) -+alr 0 + 000000007FFFFFFF + 8000000000000000 = 000000007FFFFFFF (cc=1) -+alr 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+alr 0 + 8000000000000000 + 8000000000000000 = 8000000000000000 (cc=0) -+alr 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFFFFFFFFFF (cc=1) -+algr 0 + 0000000000000000 + 8000000000000000 = 8000000000000000 (cc=1) -+algr 0 + 0000000000000001 + 8000000000000000 = 8000000000000001 (cc=1) -+algr 0 + 000000000000FFFF + 8000000000000000 = 800000000000FFFF (cc=1) -+algr 0 + 0000000000007FFF + 8000000000000000 = 8000000000007FFF (cc=1) -+algr 0 + 0000000000008000 + 8000000000000000 = 8000000000008000 (cc=1) -+algr 0 + 00000000FFFFFFFF + 8000000000000000 = 80000000FFFFFFFF (cc=1) -+algr 0 + 0000000080000000 + 8000000000000000 = 8000000080000000 (cc=1) -+algr 0 + 000000007FFFFFFF + 8000000000000000 = 800000007FFFFFFF (cc=1) -+algr 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFFFFFFFFFF (cc=3) -+algr 0 + 8000000000000000 + 8000000000000000 = 0000000000000000 (cc=2) -+algr 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+algfr 0 + 0000000000000000 + 8000000000000000 = 0000000000000000 (cc=0) -+algfr 0 + 0000000000000001 + 8000000000000000 = 0000000000000001 (cc=1) -+algfr 0 + 000000000000FFFF + 8000000000000000 = 000000000000FFFF (cc=1) -+algfr 0 + 0000000000007FFF + 8000000000000000 = 0000000000007FFF (cc=1) -+algfr 0 + 0000000000008000 + 8000000000000000 = 0000000000008000 (cc=1) -+algfr 0 + 00000000FFFFFFFF + 8000000000000000 = 00000000FFFFFFFF (cc=1) -+algfr 0 + 0000000080000000 + 8000000000000000 = 0000000080000000 (cc=1) -+algfr 0 + 000000007FFFFFFF + 8000000000000000 = 000000007FFFFFFF (cc=1) -+algfr 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+algfr 0 + 8000000000000000 + 8000000000000000 = 8000000000000000 (cc=1) -+algfr 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFFFFFFFFFF (cc=1) -+alc 0 + 0000000000000000 + 8000000000000000 = 0000000080000000 (cc=1) -+alc 0 + 0000000000000001 + 8000000000000000 = 0000000080000001 (cc=1) -+alc 0 + 000000000000FFFF + 8000000000000000 = 000000008000FFFF (cc=1) -+alc 0 + 0000000000007FFF + 8000000000000000 = 0000000080007FFF (cc=1) -+alc 0 + 0000000000008000 + 8000000000000000 = 0000000080008000 (cc=1) -+alc 0 + 00000000FFFFFFFF + 8000000000000000 = 000000007FFFFFFF (cc=3) -+alc 0 + 0000000080000000 + 8000000000000000 = 0000000000000000 (cc=2) -+alc 0 + 000000007FFFFFFF + 8000000000000000 = 00000000FFFFFFFF (cc=1) -+alc 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFF7FFFFFFF (cc=3) -+alc 0 + 8000000000000000 + 8000000000000000 = 8000000080000000 (cc=1) -+alc 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFF7FFFFFFF (cc=3) -+alcg 0 + 0000000000000000 + 8000000000000000 = 8000000000000000 (cc=1) -+alcg 0 + 0000000000000001 + 8000000000000000 = 8000000000000001 (cc=1) -+alcg 0 + 000000000000FFFF + 8000000000000000 = 800000000000FFFF (cc=1) -+alcg 0 + 0000000000007FFF + 8000000000000000 = 8000000000007FFF (cc=1) -+alcg 0 + 0000000000008000 + 8000000000000000 = 8000000000008000 (cc=1) -+alcg 0 + 00000000FFFFFFFF + 8000000000000000 = 80000000FFFFFFFF (cc=1) -+alcg 0 + 0000000080000000 + 8000000000000000 = 8000000080000000 (cc=1) -+alcg 0 + 000000007FFFFFFF + 8000000000000000 = 800000007FFFFFFF (cc=1) -+alcg 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFFFFFFFFFF (cc=3) -+alcg 0 + 8000000000000000 + 8000000000000000 = 0000000000000000 (cc=2) -+alcg 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+alcr 0 + 0000000000000000 + 8000000000000000 = 0000000000000000 (cc=0) -+alcr 0 + 0000000000000001 + 8000000000000000 = 0000000000000001 (cc=1) -+alcr 0 + 000000000000FFFF + 8000000000000000 = 000000000000FFFF (cc=1) -+alcr 0 + 0000000000007FFF + 8000000000000000 = 0000000000007FFF (cc=1) -+alcr 0 + 0000000000008000 + 8000000000000000 = 0000000000008000 (cc=1) -+alcr 0 + 00000000FFFFFFFF + 8000000000000000 = 00000000FFFFFFFF (cc=1) -+alcr 0 + 0000000080000000 + 8000000000000000 = 0000000080000000 (cc=1) -+alcr 0 + 000000007FFFFFFF + 8000000000000000 = 000000007FFFFFFF (cc=1) -+alcr 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+alcr 0 + 8000000000000000 + 8000000000000000 = 8000000000000000 (cc=0) -+alcr 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFFFFFFFFFF (cc=1) -+alcgr 0 + 0000000000000000 + 8000000000000000 = 8000000000000000 (cc=1) -+alcgr 0 + 0000000000000001 + 8000000000000000 = 8000000000000001 (cc=1) -+alcgr 0 + 000000000000FFFF + 8000000000000000 = 800000000000FFFF (cc=1) -+alcgr 0 + 0000000000007FFF + 8000000000000000 = 8000000000007FFF (cc=1) -+alcgr 0 + 0000000000008000 + 8000000000000000 = 8000000000008000 (cc=1) -+alcgr 0 + 00000000FFFFFFFF + 8000000000000000 = 80000000FFFFFFFF (cc=1) -+alcgr 0 + 0000000080000000 + 8000000000000000 = 8000000080000000 (cc=1) -+alcgr 0 + 000000007FFFFFFF + 8000000000000000 = 800000007FFFFFFF (cc=1) -+alcgr 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFFFFFFFFFF (cc=3) -+alcgr 0 + 8000000000000000 + 8000000000000000 = 0000000000000000 (cc=2) -+alcgr 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+alc 1 + 0000000000000000 + 8000000000000000 = 0000000080000001 (cc=1) -+alc 1 + 0000000000000001 + 8000000000000000 = 0000000080000002 (cc=1) -+alc 1 + 000000000000FFFF + 8000000000000000 = 0000000080010000 (cc=1) -+alc 1 + 0000000000007FFF + 8000000000000000 = 0000000080008000 (cc=1) -+alc 1 + 0000000000008000 + 8000000000000000 = 0000000080008001 (cc=1) -+alc 1 + 00000000FFFFFFFF + 8000000000000000 = 0000000080000000 (cc=3) -+alc 1 + 0000000080000000 + 8000000000000000 = 0000000000000001 (cc=3) -+alc 1 + 000000007FFFFFFF + 8000000000000000 = 0000000000000000 (cc=2) -+alc 1 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFF80000000 (cc=3) -+alc 1 + 8000000000000000 + 8000000000000000 = 8000000080000001 (cc=1) -+alc 1 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFF80000000 (cc=3) -+alcg 1 + 0000000000000000 + 8000000000000000 = 8000000000000001 (cc=1) -+alcg 1 + 0000000000000001 + 8000000000000000 = 8000000000000002 (cc=1) -+alcg 1 + 000000000000FFFF + 8000000000000000 = 8000000000010000 (cc=1) -+alcg 1 + 0000000000007FFF + 8000000000000000 = 8000000000008000 (cc=1) -+alcg 1 + 0000000000008000 + 8000000000000000 = 8000000000008001 (cc=1) -+alcg 1 + 00000000FFFFFFFF + 8000000000000000 = 8000000100000000 (cc=1) -+alcg 1 + 0000000080000000 + 8000000000000000 = 8000000080000001 (cc=1) -+alcg 1 + 000000007FFFFFFF + 8000000000000000 = 8000000080000000 (cc=1) -+alcg 1 + FFFFFFFFFFFFFFFF + 8000000000000000 = 8000000000000000 (cc=3) -+alcg 1 + 8000000000000000 + 8000000000000000 = 0000000000000001 (cc=3) -+alcg 1 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 0000000000000000 (cc=2) -+alcr 1 + 0000000000000000 + 8000000000000000 = 0000000000000001 (cc=1) -+alcr 1 + 0000000000000001 + 8000000000000000 = 0000000000000002 (cc=1) -+alcr 1 + 000000000000FFFF + 8000000000000000 = 0000000000010000 (cc=1) -+alcr 1 + 0000000000007FFF + 8000000000000000 = 0000000000008000 (cc=1) -+alcr 1 + 0000000000008000 + 8000000000000000 = 0000000000008001 (cc=1) -+alcr 1 + 00000000FFFFFFFF + 8000000000000000 = 0000000000000000 (cc=2) -+alcr 1 + 0000000080000000 + 8000000000000000 = 0000000080000001 (cc=1) -+alcr 1 + 000000007FFFFFFF + 8000000000000000 = 0000000080000000 (cc=1) -+alcr 1 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFF00000000 (cc=2) -+alcr 1 + 8000000000000000 + 8000000000000000 = 8000000000000001 (cc=1) -+alcr 1 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFF00000000 (cc=2) -+alcgr 1 + 0000000000000000 + 8000000000000000 = 8000000000000001 (cc=1) -+alcgr 1 + 0000000000000001 + 8000000000000000 = 8000000000000002 (cc=1) -+alcgr 1 + 000000000000FFFF + 8000000000000000 = 8000000000010000 (cc=1) -+alcgr 1 + 0000000000007FFF + 8000000000000000 = 8000000000008000 (cc=1) -+alcgr 1 + 0000000000008000 + 8000000000000000 = 8000000000008001 (cc=1) -+alcgr 1 + 00000000FFFFFFFF + 8000000000000000 = 8000000100000000 (cc=1) -+alcgr 1 + 0000000080000000 + 8000000000000000 = 8000000080000001 (cc=1) -+alcgr 1 + 000000007FFFFFFF + 8000000000000000 = 8000000080000000 (cc=1) -+alcgr 1 + FFFFFFFFFFFFFFFF + 8000000000000000 = 8000000000000000 (cc=3) -+alcgr 1 + 8000000000000000 + 8000000000000000 = 0000000000000001 (cc=3) -+alcgr 1 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 0000000000000000 (cc=2) -+ahy 0 + 0000000000000000 + 8000000000000000 = 00000000FFFF8000 (cc=1) -+ahy 0 + 0000000000000001 + 8000000000000000 = 00000000FFFF8001 (cc=1) -+ahy 0 + 000000000000FFFF + 8000000000000000 = 0000000000007FFF (cc=2) -+ahy 0 + 0000000000007FFF + 8000000000000000 = 00000000FFFFFFFF (cc=1) -+ahy 0 + 0000000000008000 + 8000000000000000 = 0000000000000000 (cc=0) -+ahy 0 + 00000000FFFFFFFF + 8000000000000000 = 00000000FFFF7FFF (cc=1) -+ahy 0 + 0000000080000000 + 8000000000000000 = 000000007FFF8000 (cc=3) -+ahy 0 + 000000007FFFFFFF + 8000000000000000 = 000000007FFF7FFF (cc=2) -+ahy 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFFFFFF7FFF (cc=1) -+ahy 0 + 8000000000000000 + 8000000000000000 = 80000000FFFF8000 (cc=1) -+ahy 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFFFFFF7FFF (cc=1) -+ay 0 + 0000000000000000 + 8000000000000000 = 0000000080000000 (cc=1) -+ay 0 + 0000000000000001 + 8000000000000000 = 0000000080000001 (cc=1) -+ay 0 + 000000000000FFFF + 8000000000000000 = 000000008000FFFF (cc=1) -+ay 0 + 0000000000007FFF + 8000000000000000 = 0000000080007FFF (cc=1) -+ay 0 + 0000000000008000 + 8000000000000000 = 0000000080008000 (cc=1) -+ay 0 + 00000000FFFFFFFF + 8000000000000000 = 000000007FFFFFFF (cc=3) -+ay 0 + 0000000080000000 + 8000000000000000 = 0000000000000000 (cc=3) -+ay 0 + 000000007FFFFFFF + 8000000000000000 = 00000000FFFFFFFF (cc=1) -+ay 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFF7FFFFFFF (cc=3) -+ay 0 + 8000000000000000 + 8000000000000000 = 8000000080000000 (cc=1) -+ay 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFF7FFFFFFF (cc=3) -+aly 0 + 0000000000000000 + 8000000000000000 = 0000000080000000 (cc=1) -+aly 0 + 0000000000000001 + 8000000000000000 = 0000000080000001 (cc=1) -+aly 0 + 000000000000FFFF + 8000000000000000 = 000000008000FFFF (cc=1) -+aly 0 + 0000000000007FFF + 8000000000000000 = 0000000080007FFF (cc=1) -+aly 0 + 0000000000008000 + 8000000000000000 = 0000000080008000 (cc=1) -+aly 0 + 00000000FFFFFFFF + 8000000000000000 = 000000007FFFFFFF (cc=3) -+aly 0 + 0000000080000000 + 8000000000000000 = 0000000000000000 (cc=2) -+aly 0 + 000000007FFFFFFF + 8000000000000000 = 00000000FFFFFFFF (cc=1) -+aly 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFF7FFFFFFF (cc=3) -+aly 0 + 8000000000000000 + 8000000000000000 = 8000000080000000 (cc=1) -+aly 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFF7FFFFFFF (cc=3) -+a 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+a 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=0) -+a 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFE (cc=2) -+a 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFE (cc=2) -+a 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=2) -+a 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=1) -+a 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=3) -+a 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=2) -+a 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=1) -+a 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 80000000FFFFFFFF (cc=1) -+a 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=1) -+ah 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+ah 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=0) -+ah 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFE (cc=2) -+ah 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFE (cc=2) -+ah 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=2) -+ah 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=1) -+ah 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=3) -+ah 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=2) -+ah 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=1) -+ah 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 80000000FFFFFFFF (cc=1) -+ah 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=1) -+ag 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+ag 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=0) -+ag 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFE (cc=2) -+ag 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFE (cc=2) -+ag 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=2) -+ag 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=2) -+ag 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=2) -+ag 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=2) -+ag 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=1) -+ag 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF (cc=3) -+ag 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=2) -+agf 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=0) -+agf 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFE (cc=2) -+agf 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFE (cc=2) -+agf 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=2) -+agf 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=2) -+agf 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=2) -+agf 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=2) -+agf 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=1) -+agf 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF (cc=3) -+agf 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=2) -+al 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+al 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=2) -+al 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFE (cc=3) -+al 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFE (cc=3) -+al 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=3) -+al 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=3) -+al 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=3) -+al 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=3) -+al 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=3) -+al 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 80000000FFFFFFFF (cc=1) -+al 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=3) -+alg 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+alg 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=2) -+alg 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFE (cc=3) -+alg 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFE (cc=3) -+alg 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=3) -+alg 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=3) -+alg 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=3) -+alg 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=3) -+alg 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=3) -+alg 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF (cc=3) -+alg 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=3) -+agf 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=0) -+agf 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFE (cc=2) -+agf 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFE (cc=2) -+agf 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=2) -+agf 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=2) -+agf 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=2) -+agf 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=2) -+agf 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=1) -+agf 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF (cc=3) -+agf 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=2) -+algf 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+algf 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000100000000 (cc=1) -+algf 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000010000FFFE (cc=1) -+algf 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000100007FFE (cc=1) -+algf 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000100007FFF (cc=1) -+algf 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000001FFFFFFFE (cc=1) -+algf 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000017FFFFFFF (cc=1) -+algf 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000017FFFFFFE (cc=1) -+algf 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=3) -+algf 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 80000000FFFFFFFF (cc=1) -+algf 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 80000000FFFFFFFE (cc=1) -+ar 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+ar 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=0) -+ar 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFE (cc=2) -+ar 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFE (cc=2) -+ar 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=2) -+ar 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=1) -+ar 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=3) -+ar 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=2) -+ar 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=1) -+ar 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 80000000FFFFFFFF (cc=1) -+ar 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=1) -+agr 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+agr 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=0) -+agr 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFE (cc=2) -+agr 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFE (cc=2) -+agr 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=2) -+agr 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=2) -+agr 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=2) -+agr 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=2) -+agr 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=1) -+agr 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF (cc=3) -+agr 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=2) -+agfr 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+agfr 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=0) -+agfr 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFE (cc=2) -+agfr 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFE (cc=2) -+agfr 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=2) -+agfr 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=2) -+agfr 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=2) -+agfr 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=2) -+agfr 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=1) -+agfr 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF (cc=3) -+agfr 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=2) -+alr 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+alr 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=2) -+alr 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFE (cc=3) -+alr 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFE (cc=3) -+alr 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=3) -+alr 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=3) -+alr 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=3) -+alr 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=3) -+alr 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=3) -+alr 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 80000000FFFFFFFF (cc=1) -+alr 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=3) -+algr 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+algr 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=2) -+algr 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFE (cc=3) -+algr 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFE (cc=3) -+algr 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=3) -+algr 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=3) -+algr 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=3) -+algr 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=3) -+algr 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=3) -+algr 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF (cc=3) -+algr 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=3) -+algfr 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+algfr 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000100000000 (cc=1) -+algfr 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000010000FFFE (cc=1) -+algfr 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000100007FFE (cc=1) -+algfr 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000100007FFF (cc=1) -+algfr 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000001FFFFFFFE (cc=1) -+algfr 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000017FFFFFFF (cc=1) -+algfr 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000017FFFFFFE (cc=1) -+algfr 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=3) -+algfr 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 80000000FFFFFFFF (cc=1) -+algfr 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 80000000FFFFFFFE (cc=1) -+alc 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+alc 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=2) -+alc 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFE (cc=3) -+alc 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFE (cc=3) -+alc 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=3) -+alc 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=3) -+alc 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=3) -+alc 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=3) -+alc 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=3) -+alc 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 80000000FFFFFFFF (cc=1) -+alc 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=3) -+alcg 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+alcg 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=2) -+alcg 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFE (cc=3) -+alcg 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFE (cc=3) -+alcg 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=3) -+alcg 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=3) -+alcg 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=3) -+alcg 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=3) -+alcg 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=3) -+alcg 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF (cc=3) -+alcg 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=3) -+alcr 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+alcr 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=2) -+alcr 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFE (cc=3) -+alcr 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFE (cc=3) -+alcr 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=3) -+alcr 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=3) -+alcr 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=3) -+alcr 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=3) -+alcr 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=3) -+alcr 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 80000000FFFFFFFF (cc=1) -+alcr 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=3) -+alcgr 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+alcgr 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=2) -+alcgr 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFE (cc=3) -+alcgr 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFE (cc=3) -+alcgr 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=3) -+alcgr 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=3) -+alcgr 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=3) -+alcgr 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=3) -+alcgr 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=3) -+alcgr 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF (cc=3) -+alcgr 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=3) -+alc 1 + 0000000000000000 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=2) -+alc 1 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000001 (cc=3) -+alc 1 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFF (cc=3) -+alc 1 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=3) -+alc 1 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000008000 (cc=3) -+alc 1 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=3) -+alc 1 + 0000000080000000 + FFFFFFFFFFFFFFFF = 0000000080000000 (cc=3) -+alc 1 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=3) -+alc 1 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=3) -+alc 1 + 8000000000000000 + FFFFFFFFFFFFFFFF = 8000000000000000 (cc=2) -+alc 1 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF (cc=3) -+alcg 1 + 0000000000000000 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=2) -+alcg 1 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000001 (cc=3) -+alcg 1 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFF (cc=3) -+alcg 1 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=3) -+alcg 1 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000008000 (cc=3) -+alcg 1 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=3) -+alcg 1 + 0000000080000000 + FFFFFFFFFFFFFFFF = 0000000080000000 (cc=3) -+alcg 1 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=3) -+alcg 1 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=3) -+alcg 1 + 8000000000000000 + FFFFFFFFFFFFFFFF = 8000000000000000 (cc=3) -+alcg 1 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF (cc=3) -+alcr 1 + 0000000000000000 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=2) -+alcr 1 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000001 (cc=3) -+alcr 1 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFF (cc=3) -+alcr 1 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=3) -+alcr 1 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000008000 (cc=3) -+alcr 1 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=3) -+alcr 1 + 0000000080000000 + FFFFFFFFFFFFFFFF = 0000000080000000 (cc=3) -+alcr 1 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=3) -+alcr 1 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=3) -+alcr 1 + 8000000000000000 + FFFFFFFFFFFFFFFF = 8000000000000000 (cc=2) -+alcr 1 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF (cc=3) -+alcgr 1 + 0000000000000000 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=2) -+alcgr 1 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000001 (cc=3) -+alcgr 1 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFF (cc=3) -+alcgr 1 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=3) -+alcgr 1 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000008000 (cc=3) -+alcgr 1 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=3) -+alcgr 1 + 0000000080000000 + FFFFFFFFFFFFFFFF = 0000000080000000 (cc=3) -+alcgr 1 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=3) -+alcgr 1 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=3) -+alcgr 1 + 8000000000000000 + FFFFFFFFFFFFFFFF = 8000000000000000 (cc=3) -+alcgr 1 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF (cc=3) -+ahy 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+ahy 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=0) -+ahy 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFE (cc=2) -+ahy 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFE (cc=2) -+ahy 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=2) -+ahy 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=1) -+ahy 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=3) -+ahy 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=2) -+ahy 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=1) -+ahy 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 80000000FFFFFFFF (cc=1) -+ahy 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=1) -+ay 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+ay 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=0) -+ay 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFE (cc=2) -+ay 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFE (cc=2) -+ay 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=2) -+ay 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=1) -+ay 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=3) -+ay 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=2) -+ay 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=1) -+ay 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 80000000FFFFFFFF (cc=1) -+ay 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=1) -+aly 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+aly 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=2) -+aly 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFE (cc=3) -+aly 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFE (cc=3) -+aly 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=3) -+aly 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=3) -+aly 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=3) -+aly 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=3) -+aly 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=3) -+aly 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 80000000FFFFFFFF (cc=1) -+aly 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=3) -+a 0 + 0000000000000000 + 7FFFFFFF00000000 = 000000007FFFFFFF (cc=2) -+a 0 + 0000000000000001 + 7FFFFFFF00000000 = 0000000080000000 (cc=3) -+a 0 + 000000000000FFFF + 7FFFFFFF00000000 = 000000008000FFFE (cc=3) -+a 0 + 0000000000007FFF + 7FFFFFFF00000000 = 0000000080007FFE (cc=3) -+a 0 + 0000000000008000 + 7FFFFFFF00000000 = 0000000080007FFF (cc=3) -+a 0 + 00000000FFFFFFFF + 7FFFFFFF00000000 = 000000007FFFFFFE (cc=2) -+a 0 + 0000000080000000 + 7FFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+a 0 + 000000007FFFFFFF + 7FFFFFFF00000000 = 00000000FFFFFFFE (cc=3) -+a 0 + FFFFFFFFFFFFFFFF + 7FFFFFFF00000000 = FFFFFFFF7FFFFFFE (cc=2) -+a 0 + 8000000000000000 + 7FFFFFFF00000000 = 800000007FFFFFFF (cc=2) -+a 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFF7FFFFFFE (cc=2) -+ah 0 + 0000000000000000 + 7FFFFFFF00000000 = 0000000000007FFF (cc=2) -+ah 0 + 0000000000000001 + 7FFFFFFF00000000 = 0000000000008000 (cc=2) -+ah 0 + 000000000000FFFF + 7FFFFFFF00000000 = 0000000000017FFE (cc=2) -+ah 0 + 0000000000007FFF + 7FFFFFFF00000000 = 000000000000FFFE (cc=2) -+ah 0 + 0000000000008000 + 7FFFFFFF00000000 = 000000000000FFFF (cc=2) -+ah 0 + 00000000FFFFFFFF + 7FFFFFFF00000000 = 0000000000007FFE (cc=2) -+ah 0 + 0000000080000000 + 7FFFFFFF00000000 = 0000000080007FFF (cc=1) -+ah 0 + 000000007FFFFFFF + 7FFFFFFF00000000 = 0000000080007FFE (cc=3) -+ah 0 + FFFFFFFFFFFFFFFF + 7FFFFFFF00000000 = FFFFFFFF00007FFE (cc=2) -+ah 0 + 8000000000000000 + 7FFFFFFF00000000 = 8000000000007FFF (cc=2) -+ah 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFF00007FFE (cc=2) -+ag 0 + 0000000000000000 + 7FFFFFFF00000000 = 7FFFFFFF00000000 (cc=2) -+ag 0 + 0000000000000001 + 7FFFFFFF00000000 = 7FFFFFFF00000001 (cc=2) -+ag 0 + 000000000000FFFF + 7FFFFFFF00000000 = 7FFFFFFF0000FFFF (cc=2) -+ag 0 + 0000000000007FFF + 7FFFFFFF00000000 = 7FFFFFFF00007FFF (cc=2) -+ag 0 + 0000000000008000 + 7FFFFFFF00000000 = 7FFFFFFF00008000 (cc=2) -+ag 0 + 00000000FFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFFFFFFFFFF (cc=2) -+ag 0 + 0000000080000000 + 7FFFFFFF00000000 = 7FFFFFFF80000000 (cc=2) -+ag 0 + 000000007FFFFFFF + 7FFFFFFF00000000 = 7FFFFFFF7FFFFFFF (cc=2) -+ag 0 + FFFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFEFFFFFFFF (cc=2) -+ag 0 + 8000000000000000 + 7FFFFFFF00000000 = FFFFFFFF00000000 (cc=1) -+ag 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFF00000000 = FFFFFFFEFFFFFFFF (cc=3) -+agf 0 + 0000000000000000 + 7FFFFFFF00000000 = 000000007FFFFFFF (cc=2) -+agf 0 + 0000000000000001 + 7FFFFFFF00000000 = 0000000080000000 (cc=2) -+agf 0 + 000000000000FFFF + 7FFFFFFF00000000 = 000000008000FFFE (cc=2) -+agf 0 + 0000000000007FFF + 7FFFFFFF00000000 = 0000000080007FFE (cc=2) -+agf 0 + 0000000000008000 + 7FFFFFFF00000000 = 0000000080007FFF (cc=2) -+agf 0 + 00000000FFFFFFFF + 7FFFFFFF00000000 = 000000017FFFFFFE (cc=2) -+agf 0 + 0000000080000000 + 7FFFFFFF00000000 = 00000000FFFFFFFF (cc=2) -+agf 0 + 000000007FFFFFFF + 7FFFFFFF00000000 = 00000000FFFFFFFE (cc=2) -+agf 0 + FFFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 000000007FFFFFFE (cc=2) -+agf 0 + 8000000000000000 + 7FFFFFFF00000000 = 800000007FFFFFFF (cc=1) -+agf 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 800000007FFFFFFE (cc=3) -+al 0 + 0000000000000000 + 7FFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+al 0 + 0000000000000001 + 7FFFFFFF00000000 = 0000000080000000 (cc=1) -+al 0 + 000000000000FFFF + 7FFFFFFF00000000 = 000000008000FFFE (cc=1) -+al 0 + 0000000000007FFF + 7FFFFFFF00000000 = 0000000080007FFE (cc=1) -+al 0 + 0000000000008000 + 7FFFFFFF00000000 = 0000000080007FFF (cc=1) -+al 0 + 00000000FFFFFFFF + 7FFFFFFF00000000 = 000000007FFFFFFE (cc=3) -+al 0 + 0000000080000000 + 7FFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+al 0 + 000000007FFFFFFF + 7FFFFFFF00000000 = 00000000FFFFFFFE (cc=1) -+al 0 + FFFFFFFFFFFFFFFF + 7FFFFFFF00000000 = FFFFFFFF7FFFFFFE (cc=3) -+al 0 + 8000000000000000 + 7FFFFFFF00000000 = 800000007FFFFFFF (cc=1) -+al 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFF7FFFFFFE (cc=3) -+alg 0 + 0000000000000000 + 7FFFFFFF00000000 = 7FFFFFFF00000000 (cc=1) -+alg 0 + 0000000000000001 + 7FFFFFFF00000000 = 7FFFFFFF00000001 (cc=1) -+alg 0 + 000000000000FFFF + 7FFFFFFF00000000 = 7FFFFFFF0000FFFF (cc=1) -+alg 0 + 0000000000007FFF + 7FFFFFFF00000000 = 7FFFFFFF00007FFF (cc=1) -+alg 0 + 0000000000008000 + 7FFFFFFF00000000 = 7FFFFFFF00008000 (cc=1) -+alg 0 + 00000000FFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFFFFFFFFFF (cc=1) -+alg 0 + 0000000080000000 + 7FFFFFFF00000000 = 7FFFFFFF80000000 (cc=1) -+alg 0 + 000000007FFFFFFF + 7FFFFFFF00000000 = 7FFFFFFF7FFFFFFF (cc=1) -+alg 0 + FFFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFEFFFFFFFF (cc=3) -+alg 0 + 8000000000000000 + 7FFFFFFF00000000 = FFFFFFFF00000000 (cc=1) -+alg 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFF00000000 = FFFFFFFEFFFFFFFF (cc=1) -+agf 0 + 0000000000000000 + 7FFFFFFF00000000 = 000000007FFFFFFF (cc=2) -+agf 0 + 0000000000000001 + 7FFFFFFF00000000 = 0000000080000000 (cc=2) -+agf 0 + 000000000000FFFF + 7FFFFFFF00000000 = 000000008000FFFE (cc=2) -+agf 0 + 0000000000007FFF + 7FFFFFFF00000000 = 0000000080007FFE (cc=2) -+agf 0 + 0000000000008000 + 7FFFFFFF00000000 = 0000000080007FFF (cc=2) -+agf 0 + 00000000FFFFFFFF + 7FFFFFFF00000000 = 000000017FFFFFFE (cc=2) -+agf 0 + 0000000080000000 + 7FFFFFFF00000000 = 00000000FFFFFFFF (cc=2) -+agf 0 + 000000007FFFFFFF + 7FFFFFFF00000000 = 00000000FFFFFFFE (cc=2) -+agf 0 + FFFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 000000007FFFFFFE (cc=2) -+agf 0 + 8000000000000000 + 7FFFFFFF00000000 = 800000007FFFFFFF (cc=1) -+agf 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 800000007FFFFFFE (cc=3) -+algf 0 + 0000000000000000 + 7FFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+algf 0 + 0000000000000001 + 7FFFFFFF00000000 = 0000000080000000 (cc=1) -+algf 0 + 000000000000FFFF + 7FFFFFFF00000000 = 000000008000FFFE (cc=1) -+algf 0 + 0000000000007FFF + 7FFFFFFF00000000 = 0000000080007FFE (cc=1) -+algf 0 + 0000000000008000 + 7FFFFFFF00000000 = 0000000080007FFF (cc=1) -+algf 0 + 00000000FFFFFFFF + 7FFFFFFF00000000 = 000000017FFFFFFE (cc=1) -+algf 0 + 0000000080000000 + 7FFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+algf 0 + 000000007FFFFFFF + 7FFFFFFF00000000 = 00000000FFFFFFFE (cc=1) -+algf 0 + FFFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 000000007FFFFFFE (cc=3) -+algf 0 + 8000000000000000 + 7FFFFFFF00000000 = 800000007FFFFFFF (cc=1) -+algf 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 800000007FFFFFFE (cc=1) -+ar 0 + 0000000000000000 + 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+ar 0 + 0000000000000001 + 7FFFFFFF00000000 = 0000000000000001 (cc=2) -+ar 0 + 000000000000FFFF + 7FFFFFFF00000000 = 000000000000FFFF (cc=2) -+ar 0 + 0000000000007FFF + 7FFFFFFF00000000 = 0000000000007FFF (cc=2) -+ar 0 + 0000000000008000 + 7FFFFFFF00000000 = 0000000000008000 (cc=2) -+ar 0 + 00000000FFFFFFFF + 7FFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+ar 0 + 0000000080000000 + 7FFFFFFF00000000 = 0000000080000000 (cc=1) -+ar 0 + 000000007FFFFFFF + 7FFFFFFF00000000 = 000000007FFFFFFF (cc=2) -+ar 0 + FFFFFFFFFFFFFFFF + 7FFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+ar 0 + 8000000000000000 + 7FFFFFFF00000000 = 8000000000000000 (cc=0) -+ar 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFFFFFFFFFF (cc=1) -+agr 0 + 0000000000000000 + 7FFFFFFF00000000 = 7FFFFFFF00000000 (cc=2) -+agr 0 + 0000000000000001 + 7FFFFFFF00000000 = 7FFFFFFF00000001 (cc=2) -+agr 0 + 000000000000FFFF + 7FFFFFFF00000000 = 7FFFFFFF0000FFFF (cc=2) -+agr 0 + 0000000000007FFF + 7FFFFFFF00000000 = 7FFFFFFF00007FFF (cc=2) -+agr 0 + 0000000000008000 + 7FFFFFFF00000000 = 7FFFFFFF00008000 (cc=2) -+agr 0 + 00000000FFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFFFFFFFFFF (cc=2) -+agr 0 + 0000000080000000 + 7FFFFFFF00000000 = 7FFFFFFF80000000 (cc=2) -+agr 0 + 000000007FFFFFFF + 7FFFFFFF00000000 = 7FFFFFFF7FFFFFFF (cc=2) -+agr 0 + FFFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFEFFFFFFFF (cc=2) -+agr 0 + 8000000000000000 + 7FFFFFFF00000000 = FFFFFFFF00000000 (cc=1) -+agr 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFF00000000 = FFFFFFFEFFFFFFFF (cc=3) -+agfr 0 + 0000000000000000 + 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+agfr 0 + 0000000000000001 + 7FFFFFFF00000000 = 0000000000000001 (cc=2) -+agfr 0 + 000000000000FFFF + 7FFFFFFF00000000 = 000000000000FFFF (cc=2) -+agfr 0 + 0000000000007FFF + 7FFFFFFF00000000 = 0000000000007FFF (cc=2) -+agfr 0 + 0000000000008000 + 7FFFFFFF00000000 = 0000000000008000 (cc=2) -+agfr 0 + 00000000FFFFFFFF + 7FFFFFFF00000000 = 00000000FFFFFFFF (cc=2) -+agfr 0 + 0000000080000000 + 7FFFFFFF00000000 = 0000000080000000 (cc=2) -+agfr 0 + 000000007FFFFFFF + 7FFFFFFF00000000 = 000000007FFFFFFF (cc=2) -+agfr 0 + FFFFFFFFFFFFFFFF + 7FFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+agfr 0 + 8000000000000000 + 7FFFFFFF00000000 = 8000000000000000 (cc=1) -+agfr 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFFFFFFFFFF (cc=2) -+alr 0 + 0000000000000000 + 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+alr 0 + 0000000000000001 + 7FFFFFFF00000000 = 0000000000000001 (cc=1) -+alr 0 + 000000000000FFFF + 7FFFFFFF00000000 = 000000000000FFFF (cc=1) -+alr 0 + 0000000000007FFF + 7FFFFFFF00000000 = 0000000000007FFF (cc=1) -+alr 0 + 0000000000008000 + 7FFFFFFF00000000 = 0000000000008000 (cc=1) -+alr 0 + 00000000FFFFFFFF + 7FFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+alr 0 + 0000000080000000 + 7FFFFFFF00000000 = 0000000080000000 (cc=1) -+alr 0 + 000000007FFFFFFF + 7FFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+alr 0 + FFFFFFFFFFFFFFFF + 7FFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+alr 0 + 8000000000000000 + 7FFFFFFF00000000 = 8000000000000000 (cc=0) -+alr 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFFFFFFFFFF (cc=1) -+algr 0 + 0000000000000000 + 7FFFFFFF00000000 = 7FFFFFFF00000000 (cc=1) -+algr 0 + 0000000000000001 + 7FFFFFFF00000000 = 7FFFFFFF00000001 (cc=1) -+algr 0 + 000000000000FFFF + 7FFFFFFF00000000 = 7FFFFFFF0000FFFF (cc=1) -+algr 0 + 0000000000007FFF + 7FFFFFFF00000000 = 7FFFFFFF00007FFF (cc=1) -+algr 0 + 0000000000008000 + 7FFFFFFF00000000 = 7FFFFFFF00008000 (cc=1) -+algr 0 + 00000000FFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFFFFFFFFFF (cc=1) -+algr 0 + 0000000080000000 + 7FFFFFFF00000000 = 7FFFFFFF80000000 (cc=1) -+algr 0 + 000000007FFFFFFF + 7FFFFFFF00000000 = 7FFFFFFF7FFFFFFF (cc=1) -+algr 0 + FFFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFEFFFFFFFF (cc=3) -+algr 0 + 8000000000000000 + 7FFFFFFF00000000 = FFFFFFFF00000000 (cc=1) -+algr 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFF00000000 = FFFFFFFEFFFFFFFF (cc=1) -+algfr 0 + 0000000000000000 + 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+algfr 0 + 0000000000000001 + 7FFFFFFF00000000 = 0000000000000001 (cc=1) -+algfr 0 + 000000000000FFFF + 7FFFFFFF00000000 = 000000000000FFFF (cc=1) -+algfr 0 + 0000000000007FFF + 7FFFFFFF00000000 = 0000000000007FFF (cc=1) -+algfr 0 + 0000000000008000 + 7FFFFFFF00000000 = 0000000000008000 (cc=1) -+algfr 0 + 00000000FFFFFFFF + 7FFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+algfr 0 + 0000000080000000 + 7FFFFFFF00000000 = 0000000080000000 (cc=1) -+algfr 0 + 000000007FFFFFFF + 7FFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+algfr 0 + FFFFFFFFFFFFFFFF + 7FFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+algfr 0 + 8000000000000000 + 7FFFFFFF00000000 = 8000000000000000 (cc=1) -+algfr 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFFFFFFFFFF (cc=1) -+alc 0 + 0000000000000000 + 7FFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+alc 0 + 0000000000000001 + 7FFFFFFF00000000 = 0000000080000000 (cc=1) -+alc 0 + 000000000000FFFF + 7FFFFFFF00000000 = 000000008000FFFE (cc=1) -+alc 0 + 0000000000007FFF + 7FFFFFFF00000000 = 0000000080007FFE (cc=1) -+alc 0 + 0000000000008000 + 7FFFFFFF00000000 = 0000000080007FFF (cc=1) -+alc 0 + 00000000FFFFFFFF + 7FFFFFFF00000000 = 000000007FFFFFFE (cc=3) -+alc 0 + 0000000080000000 + 7FFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+alc 0 + 000000007FFFFFFF + 7FFFFFFF00000000 = 00000000FFFFFFFE (cc=1) -+alc 0 + FFFFFFFFFFFFFFFF + 7FFFFFFF00000000 = FFFFFFFF7FFFFFFE (cc=3) -+alc 0 + 8000000000000000 + 7FFFFFFF00000000 = 800000007FFFFFFF (cc=1) -+alc 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFF7FFFFFFE (cc=3) -+alcg 0 + 0000000000000000 + 7FFFFFFF00000000 = 7FFFFFFF00000000 (cc=1) -+alcg 0 + 0000000000000001 + 7FFFFFFF00000000 = 7FFFFFFF00000001 (cc=1) -+alcg 0 + 000000000000FFFF + 7FFFFFFF00000000 = 7FFFFFFF0000FFFF (cc=1) -+alcg 0 + 0000000000007FFF + 7FFFFFFF00000000 = 7FFFFFFF00007FFF (cc=1) -+alcg 0 + 0000000000008000 + 7FFFFFFF00000000 = 7FFFFFFF00008000 (cc=1) -+alcg 0 + 00000000FFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFFFFFFFFFF (cc=1) -+alcg 0 + 0000000080000000 + 7FFFFFFF00000000 = 7FFFFFFF80000000 (cc=1) -+alcg 0 + 000000007FFFFFFF + 7FFFFFFF00000000 = 7FFFFFFF7FFFFFFF (cc=1) -+alcg 0 + FFFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFEFFFFFFFF (cc=3) -+alcg 0 + 8000000000000000 + 7FFFFFFF00000000 = FFFFFFFF00000000 (cc=1) -+alcg 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFF00000000 = FFFFFFFEFFFFFFFF (cc=1) -+alcr 0 + 0000000000000000 + 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+alcr 0 + 0000000000000001 + 7FFFFFFF00000000 = 0000000000000001 (cc=1) -+alcr 0 + 000000000000FFFF + 7FFFFFFF00000000 = 000000000000FFFF (cc=1) -+alcr 0 + 0000000000007FFF + 7FFFFFFF00000000 = 0000000000007FFF (cc=1) -+alcr 0 + 0000000000008000 + 7FFFFFFF00000000 = 0000000000008000 (cc=1) -+alcr 0 + 00000000FFFFFFFF + 7FFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+alcr 0 + 0000000080000000 + 7FFFFFFF00000000 = 0000000080000000 (cc=1) -+alcr 0 + 000000007FFFFFFF + 7FFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+alcr 0 + FFFFFFFFFFFFFFFF + 7FFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+alcr 0 + 8000000000000000 + 7FFFFFFF00000000 = 8000000000000000 (cc=0) -+alcr 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFFFFFFFFFF (cc=1) -+alcgr 0 + 0000000000000000 + 7FFFFFFF00000000 = 7FFFFFFF00000000 (cc=1) -+alcgr 0 + 0000000000000001 + 7FFFFFFF00000000 = 7FFFFFFF00000001 (cc=1) -+alcgr 0 + 000000000000FFFF + 7FFFFFFF00000000 = 7FFFFFFF0000FFFF (cc=1) -+alcgr 0 + 0000000000007FFF + 7FFFFFFF00000000 = 7FFFFFFF00007FFF (cc=1) -+alcgr 0 + 0000000000008000 + 7FFFFFFF00000000 = 7FFFFFFF00008000 (cc=1) -+alcgr 0 + 00000000FFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFFFFFFFFFF (cc=1) -+alcgr 0 + 0000000080000000 + 7FFFFFFF00000000 = 7FFFFFFF80000000 (cc=1) -+alcgr 0 + 000000007FFFFFFF + 7FFFFFFF00000000 = 7FFFFFFF7FFFFFFF (cc=1) -+alcgr 0 + FFFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFEFFFFFFFF (cc=3) -+alcgr 0 + 8000000000000000 + 7FFFFFFF00000000 = FFFFFFFF00000000 (cc=1) -+alcgr 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFF00000000 = FFFFFFFEFFFFFFFF (cc=1) -+alc 1 + 0000000000000000 + 7FFFFFFF00000000 = 0000000080000000 (cc=1) -+alc 1 + 0000000000000001 + 7FFFFFFF00000000 = 0000000080000001 (cc=1) -+alc 1 + 000000000000FFFF + 7FFFFFFF00000000 = 000000008000FFFF (cc=1) -+alc 1 + 0000000000007FFF + 7FFFFFFF00000000 = 0000000080007FFF (cc=1) -+alc 1 + 0000000000008000 + 7FFFFFFF00000000 = 0000000080008000 (cc=1) -+alc 1 + 00000000FFFFFFFF + 7FFFFFFF00000000 = 000000007FFFFFFF (cc=3) -+alc 1 + 0000000080000000 + 7FFFFFFF00000000 = 0000000000000000 (cc=2) -+alc 1 + 000000007FFFFFFF + 7FFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+alc 1 + FFFFFFFFFFFFFFFF + 7FFFFFFF00000000 = FFFFFFFF7FFFFFFF (cc=3) -+alc 1 + 8000000000000000 + 7FFFFFFF00000000 = 8000000080000000 (cc=1) -+alc 1 + 7FFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFF7FFFFFFF (cc=3) -+alcg 1 + 0000000000000000 + 7FFFFFFF00000000 = 7FFFFFFF00000001 (cc=1) -+alcg 1 + 0000000000000001 + 7FFFFFFF00000000 = 7FFFFFFF00000002 (cc=1) -+alcg 1 + 000000000000FFFF + 7FFFFFFF00000000 = 7FFFFFFF00010000 (cc=1) -+alcg 1 + 0000000000007FFF + 7FFFFFFF00000000 = 7FFFFFFF00008000 (cc=1) -+alcg 1 + 0000000000008000 + 7FFFFFFF00000000 = 7FFFFFFF00008001 (cc=1) -+alcg 1 + 00000000FFFFFFFF + 7FFFFFFF00000000 = 8000000000000000 (cc=1) -+alcg 1 + 0000000080000000 + 7FFFFFFF00000000 = 7FFFFFFF80000001 (cc=1) -+alcg 1 + 000000007FFFFFFF + 7FFFFFFF00000000 = 7FFFFFFF80000000 (cc=1) -+alcg 1 + FFFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFF00000000 (cc=3) -+alcg 1 + 8000000000000000 + 7FFFFFFF00000000 = FFFFFFFF00000001 (cc=1) -+alcg 1 + 7FFFFFFFFFFFFFFF + 7FFFFFFF00000000 = FFFFFFFF00000000 (cc=1) -+alcr 1 + 0000000000000000 + 7FFFFFFF00000000 = 0000000000000001 (cc=1) -+alcr 1 + 0000000000000001 + 7FFFFFFF00000000 = 0000000000000002 (cc=1) -+alcr 1 + 000000000000FFFF + 7FFFFFFF00000000 = 0000000000010000 (cc=1) -+alcr 1 + 0000000000007FFF + 7FFFFFFF00000000 = 0000000000008000 (cc=1) -+alcr 1 + 0000000000008000 + 7FFFFFFF00000000 = 0000000000008001 (cc=1) -+alcr 1 + 00000000FFFFFFFF + 7FFFFFFF00000000 = 0000000000000000 (cc=2) -+alcr 1 + 0000000080000000 + 7FFFFFFF00000000 = 0000000080000001 (cc=1) -+alcr 1 + 000000007FFFFFFF + 7FFFFFFF00000000 = 0000000080000000 (cc=1) -+alcr 1 + FFFFFFFFFFFFFFFF + 7FFFFFFF00000000 = FFFFFFFF00000000 (cc=2) -+alcr 1 + 8000000000000000 + 7FFFFFFF00000000 = 8000000000000001 (cc=1) -+alcr 1 + 7FFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFF00000000 (cc=2) -+alcgr 1 + 0000000000000000 + 7FFFFFFF00000000 = 7FFFFFFF00000001 (cc=1) -+alcgr 1 + 0000000000000001 + 7FFFFFFF00000000 = 7FFFFFFF00000002 (cc=1) -+alcgr 1 + 000000000000FFFF + 7FFFFFFF00000000 = 7FFFFFFF00010000 (cc=1) -+alcgr 1 + 0000000000007FFF + 7FFFFFFF00000000 = 7FFFFFFF00008000 (cc=1) -+alcgr 1 + 0000000000008000 + 7FFFFFFF00000000 = 7FFFFFFF00008001 (cc=1) -+alcgr 1 + 00000000FFFFFFFF + 7FFFFFFF00000000 = 8000000000000000 (cc=1) -+alcgr 1 + 0000000080000000 + 7FFFFFFF00000000 = 7FFFFFFF80000001 (cc=1) -+alcgr 1 + 000000007FFFFFFF + 7FFFFFFF00000000 = 7FFFFFFF80000000 (cc=1) -+alcgr 1 + FFFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFF00000000 (cc=3) -+alcgr 1 + 8000000000000000 + 7FFFFFFF00000000 = FFFFFFFF00000001 (cc=1) -+alcgr 1 + 7FFFFFFFFFFFFFFF + 7FFFFFFF00000000 = FFFFFFFF00000000 (cc=1) -+ahy 0 + 0000000000000000 + 7FFFFFFF00000000 = 0000000000007FFF (cc=2) -+ahy 0 + 0000000000000001 + 7FFFFFFF00000000 = 0000000000008000 (cc=2) -+ahy 0 + 000000000000FFFF + 7FFFFFFF00000000 = 0000000000017FFE (cc=2) -+ahy 0 + 0000000000007FFF + 7FFFFFFF00000000 = 000000000000FFFE (cc=2) -+ahy 0 + 0000000000008000 + 7FFFFFFF00000000 = 000000000000FFFF (cc=2) -+ahy 0 + 00000000FFFFFFFF + 7FFFFFFF00000000 = 0000000000007FFE (cc=2) -+ahy 0 + 0000000080000000 + 7FFFFFFF00000000 = 0000000080007FFF (cc=1) -+ahy 0 + 000000007FFFFFFF + 7FFFFFFF00000000 = 0000000080007FFE (cc=3) -+ahy 0 + FFFFFFFFFFFFFFFF + 7FFFFFFF00000000 = FFFFFFFF00007FFE (cc=2) -+ahy 0 + 8000000000000000 + 7FFFFFFF00000000 = 8000000000007FFF (cc=2) -+ahy 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFF00007FFE (cc=2) -+ay 0 + 0000000000000000 + 7FFFFFFF00000000 = 000000007FFFFFFF (cc=2) -+ay 0 + 0000000000000001 + 7FFFFFFF00000000 = 0000000080000000 (cc=3) -+ay 0 + 000000000000FFFF + 7FFFFFFF00000000 = 000000008000FFFE (cc=3) -+ay 0 + 0000000000007FFF + 7FFFFFFF00000000 = 0000000080007FFE (cc=3) -+ay 0 + 0000000000008000 + 7FFFFFFF00000000 = 0000000080007FFF (cc=3) -+ay 0 + 00000000FFFFFFFF + 7FFFFFFF00000000 = 000000007FFFFFFE (cc=2) -+ay 0 + 0000000080000000 + 7FFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+ay 0 + 000000007FFFFFFF + 7FFFFFFF00000000 = 00000000FFFFFFFE (cc=3) -+ay 0 + FFFFFFFFFFFFFFFF + 7FFFFFFF00000000 = FFFFFFFF7FFFFFFE (cc=2) -+ay 0 + 8000000000000000 + 7FFFFFFF00000000 = 800000007FFFFFFF (cc=2) -+ay 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFF7FFFFFFE (cc=2) -+aly 0 + 0000000000000000 + 7FFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+aly 0 + 0000000000000001 + 7FFFFFFF00000000 = 0000000080000000 (cc=1) -+aly 0 + 000000000000FFFF + 7FFFFFFF00000000 = 000000008000FFFE (cc=1) -+aly 0 + 0000000000007FFF + 7FFFFFFF00000000 = 0000000080007FFE (cc=1) -+aly 0 + 0000000000008000 + 7FFFFFFF00000000 = 0000000080007FFF (cc=1) -+aly 0 + 00000000FFFFFFFF + 7FFFFFFF00000000 = 000000007FFFFFFE (cc=3) -+aly 0 + 0000000080000000 + 7FFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+aly 0 + 000000007FFFFFFF + 7FFFFFFF00000000 = 00000000FFFFFFFE (cc=1) -+aly 0 + FFFFFFFFFFFFFFFF + 7FFFFFFF00000000 = FFFFFFFF7FFFFFFE (cc=3) -+aly 0 + 8000000000000000 + 7FFFFFFF00000000 = 800000007FFFFFFF (cc=1) -+aly 0 + 7FFFFFFFFFFFFFFF + 7FFFFFFF00000000 = 7FFFFFFF7FFFFFFE (cc=3) -+a 0 + 0000000000000000 + 8000000000000000 = 0000000080000000 (cc=1) -+a 0 + 0000000000000001 + 8000000000000000 = 0000000080000001 (cc=1) -+a 0 + 000000000000FFFF + 8000000000000000 = 000000008000FFFF (cc=1) -+a 0 + 0000000000007FFF + 8000000000000000 = 0000000080007FFF (cc=1) -+a 0 + 0000000000008000 + 8000000000000000 = 0000000080008000 (cc=1) -+a 0 + 00000000FFFFFFFF + 8000000000000000 = 000000007FFFFFFF (cc=3) -+a 0 + 0000000080000000 + 8000000000000000 = 0000000000000000 (cc=3) -+a 0 + 000000007FFFFFFF + 8000000000000000 = 00000000FFFFFFFF (cc=1) -+a 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFF7FFFFFFF (cc=3) -+a 0 + 8000000000000000 + 8000000000000000 = 8000000080000000 (cc=1) -+a 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFF7FFFFFFF (cc=3) -+ah 0 + 0000000000000000 + 8000000000000000 = 00000000FFFF8000 (cc=1) -+ah 0 + 0000000000000001 + 8000000000000000 = 00000000FFFF8001 (cc=1) -+ah 0 + 000000000000FFFF + 8000000000000000 = 0000000000007FFF (cc=2) -+ah 0 + 0000000000007FFF + 8000000000000000 = 00000000FFFFFFFF (cc=1) -+ah 0 + 0000000000008000 + 8000000000000000 = 0000000000000000 (cc=0) -+ah 0 + 00000000FFFFFFFF + 8000000000000000 = 00000000FFFF7FFF (cc=1) -+ah 0 + 0000000080000000 + 8000000000000000 = 000000007FFF8000 (cc=3) -+ah 0 + 000000007FFFFFFF + 8000000000000000 = 000000007FFF7FFF (cc=2) -+ah 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFFFFFF7FFF (cc=1) -+ah 0 + 8000000000000000 + 8000000000000000 = 80000000FFFF8000 (cc=1) -+ah 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFFFFFF7FFF (cc=1) -+ag 0 + 0000000000000000 + 8000000000000000 = 8000000000000000 (cc=1) -+ag 0 + 0000000000000001 + 8000000000000000 = 8000000000000001 (cc=1) -+ag 0 + 000000000000FFFF + 8000000000000000 = 800000000000FFFF (cc=1) -+ag 0 + 0000000000007FFF + 8000000000000000 = 8000000000007FFF (cc=1) -+ag 0 + 0000000000008000 + 8000000000000000 = 8000000000008000 (cc=1) -+ag 0 + 00000000FFFFFFFF + 8000000000000000 = 80000000FFFFFFFF (cc=1) -+ag 0 + 0000000080000000 + 8000000000000000 = 8000000080000000 (cc=1) -+ag 0 + 000000007FFFFFFF + 8000000000000000 = 800000007FFFFFFF (cc=1) -+ag 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFFFFFFFFFF (cc=3) -+ag 0 + 8000000000000000 + 8000000000000000 = 0000000000000000 (cc=3) -+ag 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + 0000000000000000 + 8000000000000000 = FFFFFFFF80000000 (cc=1) -+agf 0 + 0000000000000001 + 8000000000000000 = FFFFFFFF80000001 (cc=1) -+agf 0 + 000000000000FFFF + 8000000000000000 = FFFFFFFF8000FFFF (cc=1) -+agf 0 + 0000000000007FFF + 8000000000000000 = FFFFFFFF80007FFF (cc=1) -+agf 0 + 0000000000008000 + 8000000000000000 = FFFFFFFF80008000 (cc=1) -+agf 0 + 00000000FFFFFFFF + 8000000000000000 = 000000007FFFFFFF (cc=2) -+agf 0 + 0000000080000000 + 8000000000000000 = 0000000000000000 (cc=0) -+agf 0 + 000000007FFFFFFF + 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFF7FFFFFFF (cc=1) -+agf 0 + 8000000000000000 + 8000000000000000 = 7FFFFFFF80000000 (cc=3) -+agf 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFF7FFFFFFF (cc=2) -+al 0 + 0000000000000000 + 8000000000000000 = 0000000080000000 (cc=1) -+al 0 + 0000000000000001 + 8000000000000000 = 0000000080000001 (cc=1) -+al 0 + 000000000000FFFF + 8000000000000000 = 000000008000FFFF (cc=1) -+al 0 + 0000000000007FFF + 8000000000000000 = 0000000080007FFF (cc=1) -+al 0 + 0000000000008000 + 8000000000000000 = 0000000080008000 (cc=1) -+al 0 + 00000000FFFFFFFF + 8000000000000000 = 000000007FFFFFFF (cc=3) -+al 0 + 0000000080000000 + 8000000000000000 = 0000000000000000 (cc=2) -+al 0 + 000000007FFFFFFF + 8000000000000000 = 00000000FFFFFFFF (cc=1) -+al 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFF7FFFFFFF (cc=3) -+al 0 + 8000000000000000 + 8000000000000000 = 8000000080000000 (cc=1) -+al 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFF7FFFFFFF (cc=3) -+alg 0 + 0000000000000000 + 8000000000000000 = 8000000000000000 (cc=1) -+alg 0 + 0000000000000001 + 8000000000000000 = 8000000000000001 (cc=1) -+alg 0 + 000000000000FFFF + 8000000000000000 = 800000000000FFFF (cc=1) -+alg 0 + 0000000000007FFF + 8000000000000000 = 8000000000007FFF (cc=1) -+alg 0 + 0000000000008000 + 8000000000000000 = 8000000000008000 (cc=1) -+alg 0 + 00000000FFFFFFFF + 8000000000000000 = 80000000FFFFFFFF (cc=1) -+alg 0 + 0000000080000000 + 8000000000000000 = 8000000080000000 (cc=1) -+alg 0 + 000000007FFFFFFF + 8000000000000000 = 800000007FFFFFFF (cc=1) -+alg 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFFFFFFFFFF (cc=3) -+alg 0 + 8000000000000000 + 8000000000000000 = 0000000000000000 (cc=2) -+alg 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + 0000000000000000 + 8000000000000000 = FFFFFFFF80000000 (cc=1) -+agf 0 + 0000000000000001 + 8000000000000000 = FFFFFFFF80000001 (cc=1) -+agf 0 + 000000000000FFFF + 8000000000000000 = FFFFFFFF8000FFFF (cc=1) -+agf 0 + 0000000000007FFF + 8000000000000000 = FFFFFFFF80007FFF (cc=1) -+agf 0 + 0000000000008000 + 8000000000000000 = FFFFFFFF80008000 (cc=1) -+agf 0 + 00000000FFFFFFFF + 8000000000000000 = 000000007FFFFFFF (cc=2) -+agf 0 + 0000000080000000 + 8000000000000000 = 0000000000000000 (cc=0) -+agf 0 + 000000007FFFFFFF + 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFF7FFFFFFF (cc=1) -+agf 0 + 8000000000000000 + 8000000000000000 = 7FFFFFFF80000000 (cc=3) -+agf 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFF7FFFFFFF (cc=2) -+algf 0 + 0000000000000000 + 8000000000000000 = 0000000080000000 (cc=1) -+algf 0 + 0000000000000001 + 8000000000000000 = 0000000080000001 (cc=1) -+algf 0 + 000000000000FFFF + 8000000000000000 = 000000008000FFFF (cc=1) -+algf 0 + 0000000000007FFF + 8000000000000000 = 0000000080007FFF (cc=1) -+algf 0 + 0000000000008000 + 8000000000000000 = 0000000080008000 (cc=1) -+algf 0 + 00000000FFFFFFFF + 8000000000000000 = 000000017FFFFFFF (cc=1) -+algf 0 + 0000000080000000 + 8000000000000000 = 0000000100000000 (cc=1) -+algf 0 + 000000007FFFFFFF + 8000000000000000 = 00000000FFFFFFFF (cc=1) -+algf 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = 000000007FFFFFFF (cc=3) -+algf 0 + 8000000000000000 + 8000000000000000 = 8000000080000000 (cc=1) -+algf 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 800000007FFFFFFF (cc=1) -+ar 0 + 0000000000000000 + 8000000000000000 = 0000000000000000 (cc=0) -+ar 0 + 0000000000000001 + 8000000000000000 = 0000000000000001 (cc=2) -+ar 0 + 000000000000FFFF + 8000000000000000 = 000000000000FFFF (cc=2) -+ar 0 + 0000000000007FFF + 8000000000000000 = 0000000000007FFF (cc=2) -+ar 0 + 0000000000008000 + 8000000000000000 = 0000000000008000 (cc=2) -+ar 0 + 00000000FFFFFFFF + 8000000000000000 = 00000000FFFFFFFF (cc=1) -+ar 0 + 0000000080000000 + 8000000000000000 = 0000000080000000 (cc=1) -+ar 0 + 000000007FFFFFFF + 8000000000000000 = 000000007FFFFFFF (cc=2) -+ar 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+ar 0 + 8000000000000000 + 8000000000000000 = 8000000000000000 (cc=0) -+ar 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFFFFFFFFFF (cc=1) -+agr 0 + 0000000000000000 + 8000000000000000 = 8000000000000000 (cc=1) -+agr 0 + 0000000000000001 + 8000000000000000 = 8000000000000001 (cc=1) -+agr 0 + 000000000000FFFF + 8000000000000000 = 800000000000FFFF (cc=1) -+agr 0 + 0000000000007FFF + 8000000000000000 = 8000000000007FFF (cc=1) -+agr 0 + 0000000000008000 + 8000000000000000 = 8000000000008000 (cc=1) -+agr 0 + 00000000FFFFFFFF + 8000000000000000 = 80000000FFFFFFFF (cc=1) -+agr 0 + 0000000080000000 + 8000000000000000 = 8000000080000000 (cc=1) -+agr 0 + 000000007FFFFFFF + 8000000000000000 = 800000007FFFFFFF (cc=1) -+agr 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFFFFFFFFFF (cc=3) -+agr 0 + 8000000000000000 + 8000000000000000 = 0000000000000000 (cc=3) -+agr 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+agfr 0 + 0000000000000000 + 8000000000000000 = 0000000000000000 (cc=0) -+agfr 0 + 0000000000000001 + 8000000000000000 = 0000000000000001 (cc=2) -+agfr 0 + 000000000000FFFF + 8000000000000000 = 000000000000FFFF (cc=2) -+agfr 0 + 0000000000007FFF + 8000000000000000 = 0000000000007FFF (cc=2) -+agfr 0 + 0000000000008000 + 8000000000000000 = 0000000000008000 (cc=2) -+agfr 0 + 00000000FFFFFFFF + 8000000000000000 = 00000000FFFFFFFF (cc=2) -+agfr 0 + 0000000080000000 + 8000000000000000 = 0000000080000000 (cc=2) -+agfr 0 + 000000007FFFFFFF + 8000000000000000 = 000000007FFFFFFF (cc=2) -+agfr 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+agfr 0 + 8000000000000000 + 8000000000000000 = 8000000000000000 (cc=1) -+agfr 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFFFFFFFFFF (cc=2) -+alr 0 + 0000000000000000 + 8000000000000000 = 0000000000000000 (cc=0) -+alr 0 + 0000000000000001 + 8000000000000000 = 0000000000000001 (cc=1) -+alr 0 + 000000000000FFFF + 8000000000000000 = 000000000000FFFF (cc=1) -+alr 0 + 0000000000007FFF + 8000000000000000 = 0000000000007FFF (cc=1) -+alr 0 + 0000000000008000 + 8000000000000000 = 0000000000008000 (cc=1) -+alr 0 + 00000000FFFFFFFF + 8000000000000000 = 00000000FFFFFFFF (cc=1) -+alr 0 + 0000000080000000 + 8000000000000000 = 0000000080000000 (cc=1) -+alr 0 + 000000007FFFFFFF + 8000000000000000 = 000000007FFFFFFF (cc=1) -+alr 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+alr 0 + 8000000000000000 + 8000000000000000 = 8000000000000000 (cc=0) -+alr 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFFFFFFFFFF (cc=1) -+algr 0 + 0000000000000000 + 8000000000000000 = 8000000000000000 (cc=1) -+algr 0 + 0000000000000001 + 8000000000000000 = 8000000000000001 (cc=1) -+algr 0 + 000000000000FFFF + 8000000000000000 = 800000000000FFFF (cc=1) -+algr 0 + 0000000000007FFF + 8000000000000000 = 8000000000007FFF (cc=1) -+algr 0 + 0000000000008000 + 8000000000000000 = 8000000000008000 (cc=1) -+algr 0 + 00000000FFFFFFFF + 8000000000000000 = 80000000FFFFFFFF (cc=1) -+algr 0 + 0000000080000000 + 8000000000000000 = 8000000080000000 (cc=1) -+algr 0 + 000000007FFFFFFF + 8000000000000000 = 800000007FFFFFFF (cc=1) -+algr 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFFFFFFFFFF (cc=3) -+algr 0 + 8000000000000000 + 8000000000000000 = 0000000000000000 (cc=2) -+algr 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+algfr 0 + 0000000000000000 + 8000000000000000 = 0000000000000000 (cc=0) -+algfr 0 + 0000000000000001 + 8000000000000000 = 0000000000000001 (cc=1) -+algfr 0 + 000000000000FFFF + 8000000000000000 = 000000000000FFFF (cc=1) -+algfr 0 + 0000000000007FFF + 8000000000000000 = 0000000000007FFF (cc=1) -+algfr 0 + 0000000000008000 + 8000000000000000 = 0000000000008000 (cc=1) -+algfr 0 + 00000000FFFFFFFF + 8000000000000000 = 00000000FFFFFFFF (cc=1) -+algfr 0 + 0000000080000000 + 8000000000000000 = 0000000080000000 (cc=1) -+algfr 0 + 000000007FFFFFFF + 8000000000000000 = 000000007FFFFFFF (cc=1) -+algfr 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+algfr 0 + 8000000000000000 + 8000000000000000 = 8000000000000000 (cc=1) -+algfr 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFFFFFFFFFF (cc=1) -+alc 0 + 0000000000000000 + 8000000000000000 = 0000000080000000 (cc=1) -+alc 0 + 0000000000000001 + 8000000000000000 = 0000000080000001 (cc=1) -+alc 0 + 000000000000FFFF + 8000000000000000 = 000000008000FFFF (cc=1) -+alc 0 + 0000000000007FFF + 8000000000000000 = 0000000080007FFF (cc=1) -+alc 0 + 0000000000008000 + 8000000000000000 = 0000000080008000 (cc=1) -+alc 0 + 00000000FFFFFFFF + 8000000000000000 = 000000007FFFFFFF (cc=3) -+alc 0 + 0000000080000000 + 8000000000000000 = 0000000000000000 (cc=2) -+alc 0 + 000000007FFFFFFF + 8000000000000000 = 00000000FFFFFFFF (cc=1) -+alc 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFF7FFFFFFF (cc=3) -+alc 0 + 8000000000000000 + 8000000000000000 = 8000000080000000 (cc=1) -+alc 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFF7FFFFFFF (cc=3) -+alcg 0 + 0000000000000000 + 8000000000000000 = 8000000000000000 (cc=1) -+alcg 0 + 0000000000000001 + 8000000000000000 = 8000000000000001 (cc=1) -+alcg 0 + 000000000000FFFF + 8000000000000000 = 800000000000FFFF (cc=1) -+alcg 0 + 0000000000007FFF + 8000000000000000 = 8000000000007FFF (cc=1) -+alcg 0 + 0000000000008000 + 8000000000000000 = 8000000000008000 (cc=1) -+alcg 0 + 00000000FFFFFFFF + 8000000000000000 = 80000000FFFFFFFF (cc=1) -+alcg 0 + 0000000080000000 + 8000000000000000 = 8000000080000000 (cc=1) -+alcg 0 + 000000007FFFFFFF + 8000000000000000 = 800000007FFFFFFF (cc=1) -+alcg 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFFFFFFFFFF (cc=3) -+alcg 0 + 8000000000000000 + 8000000000000000 = 0000000000000000 (cc=2) -+alcg 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+alcr 0 + 0000000000000000 + 8000000000000000 = 0000000000000000 (cc=0) -+alcr 0 + 0000000000000001 + 8000000000000000 = 0000000000000001 (cc=1) -+alcr 0 + 000000000000FFFF + 8000000000000000 = 000000000000FFFF (cc=1) -+alcr 0 + 0000000000007FFF + 8000000000000000 = 0000000000007FFF (cc=1) -+alcr 0 + 0000000000008000 + 8000000000000000 = 0000000000008000 (cc=1) -+alcr 0 + 00000000FFFFFFFF + 8000000000000000 = 00000000FFFFFFFF (cc=1) -+alcr 0 + 0000000080000000 + 8000000000000000 = 0000000080000000 (cc=1) -+alcr 0 + 000000007FFFFFFF + 8000000000000000 = 000000007FFFFFFF (cc=1) -+alcr 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+alcr 0 + 8000000000000000 + 8000000000000000 = 8000000000000000 (cc=0) -+alcr 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFFFFFFFFFF (cc=1) -+alcgr 0 + 0000000000000000 + 8000000000000000 = 8000000000000000 (cc=1) -+alcgr 0 + 0000000000000001 + 8000000000000000 = 8000000000000001 (cc=1) -+alcgr 0 + 000000000000FFFF + 8000000000000000 = 800000000000FFFF (cc=1) -+alcgr 0 + 0000000000007FFF + 8000000000000000 = 8000000000007FFF (cc=1) -+alcgr 0 + 0000000000008000 + 8000000000000000 = 8000000000008000 (cc=1) -+alcgr 0 + 00000000FFFFFFFF + 8000000000000000 = 80000000FFFFFFFF (cc=1) -+alcgr 0 + 0000000080000000 + 8000000000000000 = 8000000080000000 (cc=1) -+alcgr 0 + 000000007FFFFFFF + 8000000000000000 = 800000007FFFFFFF (cc=1) -+alcgr 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFFFFFFFFFF (cc=3) -+alcgr 0 + 8000000000000000 + 8000000000000000 = 0000000000000000 (cc=2) -+alcgr 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+alc 1 + 0000000000000000 + 8000000000000000 = 0000000080000001 (cc=1) -+alc 1 + 0000000000000001 + 8000000000000000 = 0000000080000002 (cc=1) -+alc 1 + 000000000000FFFF + 8000000000000000 = 0000000080010000 (cc=1) -+alc 1 + 0000000000007FFF + 8000000000000000 = 0000000080008000 (cc=1) -+alc 1 + 0000000000008000 + 8000000000000000 = 0000000080008001 (cc=1) -+alc 1 + 00000000FFFFFFFF + 8000000000000000 = 0000000080000000 (cc=3) -+alc 1 + 0000000080000000 + 8000000000000000 = 0000000000000001 (cc=3) -+alc 1 + 000000007FFFFFFF + 8000000000000000 = 0000000000000000 (cc=2) -+alc 1 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFF80000000 (cc=3) -+alc 1 + 8000000000000000 + 8000000000000000 = 8000000080000001 (cc=1) -+alc 1 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFF80000000 (cc=3) -+alcg 1 + 0000000000000000 + 8000000000000000 = 8000000000000001 (cc=1) -+alcg 1 + 0000000000000001 + 8000000000000000 = 8000000000000002 (cc=1) -+alcg 1 + 000000000000FFFF + 8000000000000000 = 8000000000010000 (cc=1) -+alcg 1 + 0000000000007FFF + 8000000000000000 = 8000000000008000 (cc=1) -+alcg 1 + 0000000000008000 + 8000000000000000 = 8000000000008001 (cc=1) -+alcg 1 + 00000000FFFFFFFF + 8000000000000000 = 8000000100000000 (cc=1) -+alcg 1 + 0000000080000000 + 8000000000000000 = 8000000080000001 (cc=1) -+alcg 1 + 000000007FFFFFFF + 8000000000000000 = 8000000080000000 (cc=1) -+alcg 1 + FFFFFFFFFFFFFFFF + 8000000000000000 = 8000000000000000 (cc=3) -+alcg 1 + 8000000000000000 + 8000000000000000 = 0000000000000001 (cc=3) -+alcg 1 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 0000000000000000 (cc=2) -+alcr 1 + 0000000000000000 + 8000000000000000 = 0000000000000001 (cc=1) -+alcr 1 + 0000000000000001 + 8000000000000000 = 0000000000000002 (cc=1) -+alcr 1 + 000000000000FFFF + 8000000000000000 = 0000000000010000 (cc=1) -+alcr 1 + 0000000000007FFF + 8000000000000000 = 0000000000008000 (cc=1) -+alcr 1 + 0000000000008000 + 8000000000000000 = 0000000000008001 (cc=1) -+alcr 1 + 00000000FFFFFFFF + 8000000000000000 = 0000000000000000 (cc=2) -+alcr 1 + 0000000080000000 + 8000000000000000 = 0000000080000001 (cc=1) -+alcr 1 + 000000007FFFFFFF + 8000000000000000 = 0000000080000000 (cc=1) -+alcr 1 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFF00000000 (cc=2) -+alcr 1 + 8000000000000000 + 8000000000000000 = 8000000000000001 (cc=1) -+alcr 1 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFF00000000 (cc=2) -+alcgr 1 + 0000000000000000 + 8000000000000000 = 8000000000000001 (cc=1) -+alcgr 1 + 0000000000000001 + 8000000000000000 = 8000000000000002 (cc=1) -+alcgr 1 + 000000000000FFFF + 8000000000000000 = 8000000000010000 (cc=1) -+alcgr 1 + 0000000000007FFF + 8000000000000000 = 8000000000008000 (cc=1) -+alcgr 1 + 0000000000008000 + 8000000000000000 = 8000000000008001 (cc=1) -+alcgr 1 + 00000000FFFFFFFF + 8000000000000000 = 8000000100000000 (cc=1) -+alcgr 1 + 0000000080000000 + 8000000000000000 = 8000000080000001 (cc=1) -+alcgr 1 + 000000007FFFFFFF + 8000000000000000 = 8000000080000000 (cc=1) -+alcgr 1 + FFFFFFFFFFFFFFFF + 8000000000000000 = 8000000000000000 (cc=3) -+alcgr 1 + 8000000000000000 + 8000000000000000 = 0000000000000001 (cc=3) -+alcgr 1 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 0000000000000000 (cc=2) -+ahy 0 + 0000000000000000 + 8000000000000000 = 00000000FFFF8000 (cc=1) -+ahy 0 + 0000000000000001 + 8000000000000000 = 00000000FFFF8001 (cc=1) -+ahy 0 + 000000000000FFFF + 8000000000000000 = 0000000000007FFF (cc=2) -+ahy 0 + 0000000000007FFF + 8000000000000000 = 00000000FFFFFFFF (cc=1) -+ahy 0 + 0000000000008000 + 8000000000000000 = 0000000000000000 (cc=0) -+ahy 0 + 00000000FFFFFFFF + 8000000000000000 = 00000000FFFF7FFF (cc=1) -+ahy 0 + 0000000080000000 + 8000000000000000 = 000000007FFF8000 (cc=3) -+ahy 0 + 000000007FFFFFFF + 8000000000000000 = 000000007FFF7FFF (cc=2) -+ahy 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFFFFFF7FFF (cc=1) -+ahy 0 + 8000000000000000 + 8000000000000000 = 80000000FFFF8000 (cc=1) -+ahy 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFFFFFF7FFF (cc=1) -+ay 0 + 0000000000000000 + 8000000000000000 = 0000000080000000 (cc=1) -+ay 0 + 0000000000000001 + 8000000000000000 = 0000000080000001 (cc=1) -+ay 0 + 000000000000FFFF + 8000000000000000 = 000000008000FFFF (cc=1) -+ay 0 + 0000000000007FFF + 8000000000000000 = 0000000080007FFF (cc=1) -+ay 0 + 0000000000008000 + 8000000000000000 = 0000000080008000 (cc=1) -+ay 0 + 00000000FFFFFFFF + 8000000000000000 = 000000007FFFFFFF (cc=3) -+ay 0 + 0000000080000000 + 8000000000000000 = 0000000000000000 (cc=3) -+ay 0 + 000000007FFFFFFF + 8000000000000000 = 00000000FFFFFFFF (cc=1) -+ay 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFF7FFFFFFF (cc=3) -+ay 0 + 8000000000000000 + 8000000000000000 = 8000000080000000 (cc=1) -+ay 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFF7FFFFFFF (cc=3) -+aly 0 + 0000000000000000 + 8000000000000000 = 0000000080000000 (cc=1) -+aly 0 + 0000000000000001 + 8000000000000000 = 0000000080000001 (cc=1) -+aly 0 + 000000000000FFFF + 8000000000000000 = 000000008000FFFF (cc=1) -+aly 0 + 0000000000007FFF + 8000000000000000 = 0000000080007FFF (cc=1) -+aly 0 + 0000000000008000 + 8000000000000000 = 0000000080008000 (cc=1) -+aly 0 + 00000000FFFFFFFF + 8000000000000000 = 000000007FFFFFFF (cc=3) -+aly 0 + 0000000080000000 + 8000000000000000 = 0000000000000000 (cc=2) -+aly 0 + 000000007FFFFFFF + 8000000000000000 = 00000000FFFFFFFF (cc=1) -+aly 0 + FFFFFFFFFFFFFFFF + 8000000000000000 = FFFFFFFF7FFFFFFF (cc=3) -+aly 0 + 8000000000000000 + 8000000000000000 = 8000000080000000 (cc=1) -+aly 0 + 7FFFFFFFFFFFFFFF + 8000000000000000 = 7FFFFFFF7FFFFFFF (cc=3) -+a 0 + 0000000000000000 + FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+a 0 + 0000000000000001 + FFFFFFFF00000000 = 0000000000000000 (cc=0) -+a 0 + 000000000000FFFF + FFFFFFFF00000000 = 000000000000FFFE (cc=2) -+a 0 + 0000000000007FFF + FFFFFFFF00000000 = 0000000000007FFE (cc=2) -+a 0 + 0000000000008000 + FFFFFFFF00000000 = 0000000000007FFF (cc=2) -+a 0 + 00000000FFFFFFFF + FFFFFFFF00000000 = 00000000FFFFFFFE (cc=1) -+a 0 + 0000000080000000 + FFFFFFFF00000000 = 000000007FFFFFFF (cc=3) -+a 0 + 000000007FFFFFFF + FFFFFFFF00000000 = 000000007FFFFFFE (cc=2) -+a 0 + FFFFFFFFFFFFFFFF + FFFFFFFF00000000 = FFFFFFFFFFFFFFFE (cc=1) -+a 0 + 8000000000000000 + FFFFFFFF00000000 = 80000000FFFFFFFF (cc=1) -+a 0 + 7FFFFFFFFFFFFFFF + FFFFFFFF00000000 = 7FFFFFFFFFFFFFFE (cc=1) -+ah 0 + 0000000000000000 + FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+ah 0 + 0000000000000001 + FFFFFFFF00000000 = 0000000000000000 (cc=0) -+ah 0 + 000000000000FFFF + FFFFFFFF00000000 = 000000000000FFFE (cc=2) -+ah 0 + 0000000000007FFF + FFFFFFFF00000000 = 0000000000007FFE (cc=2) -+ah 0 + 0000000000008000 + FFFFFFFF00000000 = 0000000000007FFF (cc=2) -+ah 0 + 00000000FFFFFFFF + FFFFFFFF00000000 = 00000000FFFFFFFE (cc=1) -+ah 0 + 0000000080000000 + FFFFFFFF00000000 = 000000007FFFFFFF (cc=3) -+ah 0 + 000000007FFFFFFF + FFFFFFFF00000000 = 000000007FFFFFFE (cc=2) -+ah 0 + FFFFFFFFFFFFFFFF + FFFFFFFF00000000 = FFFFFFFFFFFFFFFE (cc=1) -+ah 0 + 8000000000000000 + FFFFFFFF00000000 = 80000000FFFFFFFF (cc=1) -+ah 0 + 7FFFFFFFFFFFFFFF + FFFFFFFF00000000 = 7FFFFFFFFFFFFFFE (cc=1) -+ag 0 + 0000000000000000 + FFFFFFFF00000000 = FFFFFFFF00000000 (cc=1) -+ag 0 + 0000000000000001 + FFFFFFFF00000000 = FFFFFFFF00000001 (cc=1) -+ag 0 + 000000000000FFFF + FFFFFFFF00000000 = FFFFFFFF0000FFFF (cc=1) -+ag 0 + 0000000000007FFF + FFFFFFFF00000000 = FFFFFFFF00007FFF (cc=1) -+ag 0 + 0000000000008000 + FFFFFFFF00000000 = FFFFFFFF00008000 (cc=1) -+ag 0 + 00000000FFFFFFFF + FFFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+ag 0 + 0000000080000000 + FFFFFFFF00000000 = FFFFFFFF80000000 (cc=1) -+ag 0 + 000000007FFFFFFF + FFFFFFFF00000000 = FFFFFFFF7FFFFFFF (cc=1) -+ag 0 + FFFFFFFFFFFFFFFF + FFFFFFFF00000000 = FFFFFFFEFFFFFFFF (cc=1) -+ag 0 + 8000000000000000 + FFFFFFFF00000000 = 7FFFFFFF00000000 (cc=3) -+ag 0 + 7FFFFFFFFFFFFFFF + FFFFFFFF00000000 = 7FFFFFFEFFFFFFFF (cc=2) -+agf 0 + 0000000000000000 + FFFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + 0000000000000001 + FFFFFFFF00000000 = 0000000000000000 (cc=0) -+agf 0 + 000000000000FFFF + FFFFFFFF00000000 = 000000000000FFFE (cc=2) -+agf 0 + 0000000000007FFF + FFFFFFFF00000000 = 0000000000007FFE (cc=2) -+agf 0 + 0000000000008000 + FFFFFFFF00000000 = 0000000000007FFF (cc=2) -+agf 0 + 00000000FFFFFFFF + FFFFFFFF00000000 = 00000000FFFFFFFE (cc=2) -+agf 0 + 0000000080000000 + FFFFFFFF00000000 = 000000007FFFFFFF (cc=2) -+agf 0 + 000000007FFFFFFF + FFFFFFFF00000000 = 000000007FFFFFFE (cc=2) -+agf 0 + FFFFFFFFFFFFFFFF + FFFFFFFF00000000 = FFFFFFFFFFFFFFFE (cc=1) -+agf 0 + 8000000000000000 + FFFFFFFF00000000 = 7FFFFFFFFFFFFFFF (cc=3) -+agf 0 + 7FFFFFFFFFFFFFFF + FFFFFFFF00000000 = 7FFFFFFFFFFFFFFE (cc=2) -+al 0 + 0000000000000000 + FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+al 0 + 0000000000000001 + FFFFFFFF00000000 = 0000000000000000 (cc=2) -+al 0 + 000000000000FFFF + FFFFFFFF00000000 = 000000000000FFFE (cc=3) -+al 0 + 0000000000007FFF + FFFFFFFF00000000 = 0000000000007FFE (cc=3) -+al 0 + 0000000000008000 + FFFFFFFF00000000 = 0000000000007FFF (cc=3) -+al 0 + 00000000FFFFFFFF + FFFFFFFF00000000 = 00000000FFFFFFFE (cc=3) -+al 0 + 0000000080000000 + FFFFFFFF00000000 = 000000007FFFFFFF (cc=3) -+al 0 + 000000007FFFFFFF + FFFFFFFF00000000 = 000000007FFFFFFE (cc=3) -+al 0 + FFFFFFFFFFFFFFFF + FFFFFFFF00000000 = FFFFFFFFFFFFFFFE (cc=3) -+al 0 + 8000000000000000 + FFFFFFFF00000000 = 80000000FFFFFFFF (cc=1) -+al 0 + 7FFFFFFFFFFFFFFF + FFFFFFFF00000000 = 7FFFFFFFFFFFFFFE (cc=3) -+alg 0 + 0000000000000000 + FFFFFFFF00000000 = FFFFFFFF00000000 (cc=1) -+alg 0 + 0000000000000001 + FFFFFFFF00000000 = FFFFFFFF00000001 (cc=1) -+alg 0 + 000000000000FFFF + FFFFFFFF00000000 = FFFFFFFF0000FFFF (cc=1) -+alg 0 + 0000000000007FFF + FFFFFFFF00000000 = FFFFFFFF00007FFF (cc=1) -+alg 0 + 0000000000008000 + FFFFFFFF00000000 = FFFFFFFF00008000 (cc=1) -+alg 0 + 00000000FFFFFFFF + FFFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+alg 0 + 0000000080000000 + FFFFFFFF00000000 = FFFFFFFF80000000 (cc=1) -+alg 0 + 000000007FFFFFFF + FFFFFFFF00000000 = FFFFFFFF7FFFFFFF (cc=1) -+alg 0 + FFFFFFFFFFFFFFFF + FFFFFFFF00000000 = FFFFFFFEFFFFFFFF (cc=3) -+alg 0 + 8000000000000000 + FFFFFFFF00000000 = 7FFFFFFF00000000 (cc=3) -+alg 0 + 7FFFFFFFFFFFFFFF + FFFFFFFF00000000 = 7FFFFFFEFFFFFFFF (cc=3) -+agf 0 + 0000000000000000 + FFFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + 0000000000000001 + FFFFFFFF00000000 = 0000000000000000 (cc=0) -+agf 0 + 000000000000FFFF + FFFFFFFF00000000 = 000000000000FFFE (cc=2) -+agf 0 + 0000000000007FFF + FFFFFFFF00000000 = 0000000000007FFE (cc=2) -+agf 0 + 0000000000008000 + FFFFFFFF00000000 = 0000000000007FFF (cc=2) -+agf 0 + 00000000FFFFFFFF + FFFFFFFF00000000 = 00000000FFFFFFFE (cc=2) -+agf 0 + 0000000080000000 + FFFFFFFF00000000 = 000000007FFFFFFF (cc=2) -+agf 0 + 000000007FFFFFFF + FFFFFFFF00000000 = 000000007FFFFFFE (cc=2) -+agf 0 + FFFFFFFFFFFFFFFF + FFFFFFFF00000000 = FFFFFFFFFFFFFFFE (cc=1) -+agf 0 + 8000000000000000 + FFFFFFFF00000000 = 7FFFFFFFFFFFFFFF (cc=3) -+agf 0 + 7FFFFFFFFFFFFFFF + FFFFFFFF00000000 = 7FFFFFFFFFFFFFFE (cc=2) -+algf 0 + 0000000000000000 + FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+algf 0 + 0000000000000001 + FFFFFFFF00000000 = 0000000100000000 (cc=1) -+algf 0 + 000000000000FFFF + FFFFFFFF00000000 = 000000010000FFFE (cc=1) -+algf 0 + 0000000000007FFF + FFFFFFFF00000000 = 0000000100007FFE (cc=1) -+algf 0 + 0000000000008000 + FFFFFFFF00000000 = 0000000100007FFF (cc=1) -+algf 0 + 00000000FFFFFFFF + FFFFFFFF00000000 = 00000001FFFFFFFE (cc=1) -+algf 0 + 0000000080000000 + FFFFFFFF00000000 = 000000017FFFFFFF (cc=1) -+algf 0 + 000000007FFFFFFF + FFFFFFFF00000000 = 000000017FFFFFFE (cc=1) -+algf 0 + FFFFFFFFFFFFFFFF + FFFFFFFF00000000 = 00000000FFFFFFFE (cc=3) -+algf 0 + 8000000000000000 + FFFFFFFF00000000 = 80000000FFFFFFFF (cc=1) -+algf 0 + 7FFFFFFFFFFFFFFF + FFFFFFFF00000000 = 80000000FFFFFFFE (cc=1) -+ar 0 + 0000000000000000 + FFFFFFFF00000000 = 0000000000000000 (cc=0) -+ar 0 + 0000000000000001 + FFFFFFFF00000000 = 0000000000000001 (cc=2) -+ar 0 + 000000000000FFFF + FFFFFFFF00000000 = 000000000000FFFF (cc=2) -+ar 0 + 0000000000007FFF + FFFFFFFF00000000 = 0000000000007FFF (cc=2) -+ar 0 + 0000000000008000 + FFFFFFFF00000000 = 0000000000008000 (cc=2) -+ar 0 + 00000000FFFFFFFF + FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+ar 0 + 0000000080000000 + FFFFFFFF00000000 = 0000000080000000 (cc=1) -+ar 0 + 000000007FFFFFFF + FFFFFFFF00000000 = 000000007FFFFFFF (cc=2) -+ar 0 + FFFFFFFFFFFFFFFF + FFFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+ar 0 + 8000000000000000 + FFFFFFFF00000000 = 8000000000000000 (cc=0) -+ar 0 + 7FFFFFFFFFFFFFFF + FFFFFFFF00000000 = 7FFFFFFFFFFFFFFF (cc=1) -+agr 0 + 0000000000000000 + FFFFFFFF00000000 = FFFFFFFF00000000 (cc=1) -+agr 0 + 0000000000000001 + FFFFFFFF00000000 = FFFFFFFF00000001 (cc=1) -+agr 0 + 000000000000FFFF + FFFFFFFF00000000 = FFFFFFFF0000FFFF (cc=1) -+agr 0 + 0000000000007FFF + FFFFFFFF00000000 = FFFFFFFF00007FFF (cc=1) -+agr 0 + 0000000000008000 + FFFFFFFF00000000 = FFFFFFFF00008000 (cc=1) -+agr 0 + 00000000FFFFFFFF + FFFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+agr 0 + 0000000080000000 + FFFFFFFF00000000 = FFFFFFFF80000000 (cc=1) -+agr 0 + 000000007FFFFFFF + FFFFFFFF00000000 = FFFFFFFF7FFFFFFF (cc=1) -+agr 0 + FFFFFFFFFFFFFFFF + FFFFFFFF00000000 = FFFFFFFEFFFFFFFF (cc=1) -+agr 0 + 8000000000000000 + FFFFFFFF00000000 = 7FFFFFFF00000000 (cc=3) -+agr 0 + 7FFFFFFFFFFFFFFF + FFFFFFFF00000000 = 7FFFFFFEFFFFFFFF (cc=2) -+agfr 0 + 0000000000000000 + FFFFFFFF00000000 = 0000000000000000 (cc=0) -+agfr 0 + 0000000000000001 + FFFFFFFF00000000 = 0000000000000001 (cc=2) -+agfr 0 + 000000000000FFFF + FFFFFFFF00000000 = 000000000000FFFF (cc=2) -+agfr 0 + 0000000000007FFF + FFFFFFFF00000000 = 0000000000007FFF (cc=2) -+agfr 0 + 0000000000008000 + FFFFFFFF00000000 = 0000000000008000 (cc=2) -+agfr 0 + 00000000FFFFFFFF + FFFFFFFF00000000 = 00000000FFFFFFFF (cc=2) -+agfr 0 + 0000000080000000 + FFFFFFFF00000000 = 0000000080000000 (cc=2) -+agfr 0 + 000000007FFFFFFF + FFFFFFFF00000000 = 000000007FFFFFFF (cc=2) -+agfr 0 + FFFFFFFFFFFFFFFF + FFFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+agfr 0 + 8000000000000000 + FFFFFFFF00000000 = 8000000000000000 (cc=1) -+agfr 0 + 7FFFFFFFFFFFFFFF + FFFFFFFF00000000 = 7FFFFFFFFFFFFFFF (cc=2) -+alr 0 + 0000000000000000 + FFFFFFFF00000000 = 0000000000000000 (cc=0) -+alr 0 + 0000000000000001 + FFFFFFFF00000000 = 0000000000000001 (cc=1) -+alr 0 + 000000000000FFFF + FFFFFFFF00000000 = 000000000000FFFF (cc=1) -+alr 0 + 0000000000007FFF + FFFFFFFF00000000 = 0000000000007FFF (cc=1) -+alr 0 + 0000000000008000 + FFFFFFFF00000000 = 0000000000008000 (cc=1) -+alr 0 + 00000000FFFFFFFF + FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+alr 0 + 0000000080000000 + FFFFFFFF00000000 = 0000000080000000 (cc=1) -+alr 0 + 000000007FFFFFFF + FFFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+alr 0 + FFFFFFFFFFFFFFFF + FFFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+alr 0 + 8000000000000000 + FFFFFFFF00000000 = 8000000000000000 (cc=0) -+alr 0 + 7FFFFFFFFFFFFFFF + FFFFFFFF00000000 = 7FFFFFFFFFFFFFFF (cc=1) -+algr 0 + 0000000000000000 + FFFFFFFF00000000 = FFFFFFFF00000000 (cc=1) -+algr 0 + 0000000000000001 + FFFFFFFF00000000 = FFFFFFFF00000001 (cc=1) -+algr 0 + 000000000000FFFF + FFFFFFFF00000000 = FFFFFFFF0000FFFF (cc=1) -+algr 0 + 0000000000007FFF + FFFFFFFF00000000 = FFFFFFFF00007FFF (cc=1) -+algr 0 + 0000000000008000 + FFFFFFFF00000000 = FFFFFFFF00008000 (cc=1) -+algr 0 + 00000000FFFFFFFF + FFFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+algr 0 + 0000000080000000 + FFFFFFFF00000000 = FFFFFFFF80000000 (cc=1) -+algr 0 + 000000007FFFFFFF + FFFFFFFF00000000 = FFFFFFFF7FFFFFFF (cc=1) -+algr 0 + FFFFFFFFFFFFFFFF + FFFFFFFF00000000 = FFFFFFFEFFFFFFFF (cc=3) -+algr 0 + 8000000000000000 + FFFFFFFF00000000 = 7FFFFFFF00000000 (cc=3) -+algr 0 + 7FFFFFFFFFFFFFFF + FFFFFFFF00000000 = 7FFFFFFEFFFFFFFF (cc=3) -+algfr 0 + 0000000000000000 + FFFFFFFF00000000 = 0000000000000000 (cc=0) -+algfr 0 + 0000000000000001 + FFFFFFFF00000000 = 0000000000000001 (cc=1) -+algfr 0 + 000000000000FFFF + FFFFFFFF00000000 = 000000000000FFFF (cc=1) -+algfr 0 + 0000000000007FFF + FFFFFFFF00000000 = 0000000000007FFF (cc=1) -+algfr 0 + 0000000000008000 + FFFFFFFF00000000 = 0000000000008000 (cc=1) -+algfr 0 + 00000000FFFFFFFF + FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+algfr 0 + 0000000080000000 + FFFFFFFF00000000 = 0000000080000000 (cc=1) -+algfr 0 + 000000007FFFFFFF + FFFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+algfr 0 + FFFFFFFFFFFFFFFF + FFFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+algfr 0 + 8000000000000000 + FFFFFFFF00000000 = 8000000000000000 (cc=1) -+algfr 0 + 7FFFFFFFFFFFFFFF + FFFFFFFF00000000 = 7FFFFFFFFFFFFFFF (cc=1) -+alc 0 + 0000000000000000 + FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+alc 0 + 0000000000000001 + FFFFFFFF00000000 = 0000000000000000 (cc=2) -+alc 0 + 000000000000FFFF + FFFFFFFF00000000 = 000000000000FFFE (cc=3) -+alc 0 + 0000000000007FFF + FFFFFFFF00000000 = 0000000000007FFE (cc=3) -+alc 0 + 0000000000008000 + FFFFFFFF00000000 = 0000000000007FFF (cc=3) -+alc 0 + 00000000FFFFFFFF + FFFFFFFF00000000 = 00000000FFFFFFFE (cc=3) -+alc 0 + 0000000080000000 + FFFFFFFF00000000 = 000000007FFFFFFF (cc=3) -+alc 0 + 000000007FFFFFFF + FFFFFFFF00000000 = 000000007FFFFFFE (cc=3) -+alc 0 + FFFFFFFFFFFFFFFF + FFFFFFFF00000000 = FFFFFFFFFFFFFFFE (cc=3) -+alc 0 + 8000000000000000 + FFFFFFFF00000000 = 80000000FFFFFFFF (cc=1) -+alc 0 + 7FFFFFFFFFFFFFFF + FFFFFFFF00000000 = 7FFFFFFFFFFFFFFE (cc=3) -+alcg 0 + 0000000000000000 + FFFFFFFF00000000 = FFFFFFFF00000000 (cc=1) -+alcg 0 + 0000000000000001 + FFFFFFFF00000000 = FFFFFFFF00000001 (cc=1) -+alcg 0 + 000000000000FFFF + FFFFFFFF00000000 = FFFFFFFF0000FFFF (cc=1) -+alcg 0 + 0000000000007FFF + FFFFFFFF00000000 = FFFFFFFF00007FFF (cc=1) -+alcg 0 + 0000000000008000 + FFFFFFFF00000000 = FFFFFFFF00008000 (cc=1) -+alcg 0 + 00000000FFFFFFFF + FFFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+alcg 0 + 0000000080000000 + FFFFFFFF00000000 = FFFFFFFF80000000 (cc=1) -+alcg 0 + 000000007FFFFFFF + FFFFFFFF00000000 = FFFFFFFF7FFFFFFF (cc=1) -+alcg 0 + FFFFFFFFFFFFFFFF + FFFFFFFF00000000 = FFFFFFFEFFFFFFFF (cc=3) -+alcg 0 + 8000000000000000 + FFFFFFFF00000000 = 7FFFFFFF00000000 (cc=3) -+alcg 0 + 7FFFFFFFFFFFFFFF + FFFFFFFF00000000 = 7FFFFFFEFFFFFFFF (cc=3) -+alcr 0 + 0000000000000000 + FFFFFFFF00000000 = 0000000000000000 (cc=0) -+alcr 0 + 0000000000000001 + FFFFFFFF00000000 = 0000000000000001 (cc=1) -+alcr 0 + 000000000000FFFF + FFFFFFFF00000000 = 000000000000FFFF (cc=1) -+alcr 0 + 0000000000007FFF + FFFFFFFF00000000 = 0000000000007FFF (cc=1) -+alcr 0 + 0000000000008000 + FFFFFFFF00000000 = 0000000000008000 (cc=1) -+alcr 0 + 00000000FFFFFFFF + FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+alcr 0 + 0000000080000000 + FFFFFFFF00000000 = 0000000080000000 (cc=1) -+alcr 0 + 000000007FFFFFFF + FFFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+alcr 0 + FFFFFFFFFFFFFFFF + FFFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+alcr 0 + 8000000000000000 + FFFFFFFF00000000 = 8000000000000000 (cc=0) -+alcr 0 + 7FFFFFFFFFFFFFFF + FFFFFFFF00000000 = 7FFFFFFFFFFFFFFF (cc=1) -+alcgr 0 + 0000000000000000 + FFFFFFFF00000000 = FFFFFFFF00000000 (cc=1) -+alcgr 0 + 0000000000000001 + FFFFFFFF00000000 = FFFFFFFF00000001 (cc=1) -+alcgr 0 + 000000000000FFFF + FFFFFFFF00000000 = FFFFFFFF0000FFFF (cc=1) -+alcgr 0 + 0000000000007FFF + FFFFFFFF00000000 = FFFFFFFF00007FFF (cc=1) -+alcgr 0 + 0000000000008000 + FFFFFFFF00000000 = FFFFFFFF00008000 (cc=1) -+alcgr 0 + 00000000FFFFFFFF + FFFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+alcgr 0 + 0000000080000000 + FFFFFFFF00000000 = FFFFFFFF80000000 (cc=1) -+alcgr 0 + 000000007FFFFFFF + FFFFFFFF00000000 = FFFFFFFF7FFFFFFF (cc=1) -+alcgr 0 + FFFFFFFFFFFFFFFF + FFFFFFFF00000000 = FFFFFFFEFFFFFFFF (cc=3) -+alcgr 0 + 8000000000000000 + FFFFFFFF00000000 = 7FFFFFFF00000000 (cc=3) -+alcgr 0 + 7FFFFFFFFFFFFFFF + FFFFFFFF00000000 = 7FFFFFFEFFFFFFFF (cc=3) -+alc 1 + 0000000000000000 + FFFFFFFF00000000 = 0000000000000000 (cc=2) -+alc 1 + 0000000000000001 + FFFFFFFF00000000 = 0000000000000001 (cc=3) -+alc 1 + 000000000000FFFF + FFFFFFFF00000000 = 000000000000FFFF (cc=3) -+alc 1 + 0000000000007FFF + FFFFFFFF00000000 = 0000000000007FFF (cc=3) -+alc 1 + 0000000000008000 + FFFFFFFF00000000 = 0000000000008000 (cc=3) -+alc 1 + 00000000FFFFFFFF + FFFFFFFF00000000 = 00000000FFFFFFFF (cc=3) -+alc 1 + 0000000080000000 + FFFFFFFF00000000 = 0000000080000000 (cc=3) -+alc 1 + 000000007FFFFFFF + FFFFFFFF00000000 = 000000007FFFFFFF (cc=3) -+alc 1 + FFFFFFFFFFFFFFFF + FFFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=3) -+alc 1 + 8000000000000000 + FFFFFFFF00000000 = 8000000000000000 (cc=2) -+alc 1 + 7FFFFFFFFFFFFFFF + FFFFFFFF00000000 = 7FFFFFFFFFFFFFFF (cc=3) -+alcg 1 + 0000000000000000 + FFFFFFFF00000000 = FFFFFFFF00000001 (cc=1) -+alcg 1 + 0000000000000001 + FFFFFFFF00000000 = FFFFFFFF00000002 (cc=1) -+alcg 1 + 000000000000FFFF + FFFFFFFF00000000 = FFFFFFFF00010000 (cc=1) -+alcg 1 + 0000000000007FFF + FFFFFFFF00000000 = FFFFFFFF00008000 (cc=1) -+alcg 1 + 0000000000008000 + FFFFFFFF00000000 = FFFFFFFF00008001 (cc=1) -+alcg 1 + 00000000FFFFFFFF + FFFFFFFF00000000 = 0000000000000000 (cc=2) -+alcg 1 + 0000000080000000 + FFFFFFFF00000000 = FFFFFFFF80000001 (cc=1) -+alcg 1 + 000000007FFFFFFF + FFFFFFFF00000000 = FFFFFFFF80000000 (cc=1) -+alcg 1 + FFFFFFFFFFFFFFFF + FFFFFFFF00000000 = FFFFFFFF00000000 (cc=3) -+alcg 1 + 8000000000000000 + FFFFFFFF00000000 = 7FFFFFFF00000001 (cc=3) -+alcg 1 + 7FFFFFFFFFFFFFFF + FFFFFFFF00000000 = 7FFFFFFF00000000 (cc=3) -+alcr 1 + 0000000000000000 + FFFFFFFF00000000 = 0000000000000001 (cc=1) -+alcr 1 + 0000000000000001 + FFFFFFFF00000000 = 0000000000000002 (cc=1) -+alcr 1 + 000000000000FFFF + FFFFFFFF00000000 = 0000000000010000 (cc=1) -+alcr 1 + 0000000000007FFF + FFFFFFFF00000000 = 0000000000008000 (cc=1) -+alcr 1 + 0000000000008000 + FFFFFFFF00000000 = 0000000000008001 (cc=1) -+alcr 1 + 00000000FFFFFFFF + FFFFFFFF00000000 = 0000000000000000 (cc=2) -+alcr 1 + 0000000080000000 + FFFFFFFF00000000 = 0000000080000001 (cc=1) -+alcr 1 + 000000007FFFFFFF + FFFFFFFF00000000 = 0000000080000000 (cc=1) -+alcr 1 + FFFFFFFFFFFFFFFF + FFFFFFFF00000000 = FFFFFFFF00000000 (cc=2) -+alcr 1 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00000000FFFFFFFF (cc=1) -+ahy 0 + 0000000000000001 + FFFFFFFF00000000 = 0000000000000000 (cc=0) -+ahy 0 + 000000000000FFFF + FFFFFFFF00000000 = 000000000000FFFE (cc=2) -+ahy 0 + 0000000000007FFF + FFFFFFFF00000000 = 0000000000007FFE (cc=2) -+ahy 0 + 0000000000008000 + FFFFFFFF00000000 = 0000000000007FFF (cc=2) -+ahy 0 + 00000000FFFFFFFF + FFFFFFFF00000000 = 00000000FFFFFFFE (cc=1) -+ahy 0 + 0000000080000000 + FFFFFFFF00000000 = 000000007FFFFFFF (cc=3) -+ahy 0 + 000000007FFFFFFF + FFFFFFFF00000000 = 000000007FFFFFFE (cc=2) -+ahy 0 + FFFFFFFFFFFFFFFF + FFFFFFFF00000000 = FFFFFFFFFFFFFFFE (cc=1) -+ahy 0 + 8000000000000000 + FFFFFFFF00000000 = 80000000FFFFFFFF (cc=1) -+ahy 0 + 7FFFFFFFFFFFFFFF + FFFFFFFF00000000 = 7FFFFFFFFFFFFFFE (cc=1) -+ay 0 + 0000000000000000 + FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+ay 0 + 0000000000000001 + FFFFFFFF00000000 = 0000000000000000 (cc=0) -+ay 0 + 000000000000FFFF + FFFFFFFF00000000 = 000000000000FFFE (cc=2) -+ay 0 + 0000000000007FFF + FFFFFFFF00000000 = 0000000000007FFE (cc=2) -+ay 0 + 0000000000008000 + FFFFFFFF00000000 = 0000000000007FFF (cc=2) -+ay 0 + 00000000FFFFFFFF + FFFFFFFF00000000 = 00000000FFFFFFFE (cc=1) -+ay 0 + 0000000080000000 + FFFFFFFF00000000 = 000000007FFFFFFF (cc=3) -+ay 0 + 000000007FFFFFFF + FFFFFFFF00000000 = 000000007FFFFFFE (cc=2) -+ay 0 + FFFFFFFFFFFFFFFF + FFFFFFFF00000000 = FFFFFFFFFFFFFFFE (cc=1) -+ay 0 + 8000000000000000 + FFFFFFFF00000000 = 80000000FFFFFFFF (cc=1) -+ay 0 + 7FFFFFFFFFFFFFFF + FFFFFFFF00000000 = 7FFFFFFFFFFFFFFE (cc=1) -+aly 0 + 0000000000000000 + FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+aly 0 + 0000000000000001 + FFFFFFFF00000000 = 0000000000000000 (cc=2) -+aly 0 + 000000000000FFFF + FFFFFFFF00000000 = 000000000000FFFE (cc=3) -+aly 0 + 0000000000007FFF + FFFFFFFF00000000 = 0000000000007FFE (cc=3) -+aly 0 + 0000000000008000 + FFFFFFFF00000000 = 0000000000007FFF (cc=3) -+aly 0 + 00000000FFFFFFFF + FFFFFFFF00000000 = 00000000FFFFFFFE (cc=3) -+aly 0 + 0000000080000000 + FFFFFFFF00000000 = 000000007FFFFFFF (cc=3) -+aly 0 + 000000007FFFFFFF + FFFFFFFF00000000 = 000000007FFFFFFE (cc=3) -+aly 0 + FFFFFFFFFFFFFFFF + FFFFFFFF00000000 = FFFFFFFFFFFFFFFE (cc=3) -+aly 0 + 8000000000000000 + FFFFFFFF00000000 = 80000000FFFFFFFF (cc=1) -+aly 0 + 7FFFFFFFFFFFFFFF + FFFFFFFF00000000 = 7FFFFFFFFFFFFFFE (cc=3) -+a 0 + 0000000000000000 + 000000007FFFFFFF = 0000000000000000 (cc=0) -+a 0 + 0000000000000001 + 000000007FFFFFFF = 0000000000000001 (cc=2) -+a 0 + 000000000000FFFF + 000000007FFFFFFF = 000000000000FFFF (cc=2) -+a 0 + 0000000000007FFF + 000000007FFFFFFF = 0000000000007FFF (cc=2) -+a 0 + 0000000000008000 + 000000007FFFFFFF = 0000000000008000 (cc=2) -+a 0 + 00000000FFFFFFFF + 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+a 0 + 0000000080000000 + 000000007FFFFFFF = 0000000080000000 (cc=1) -+a 0 + 000000007FFFFFFF + 000000007FFFFFFF = 000000007FFFFFFF (cc=2) -+a 0 + FFFFFFFFFFFFFFFF + 000000007FFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+a 0 + 8000000000000000 + 000000007FFFFFFF = 8000000000000000 (cc=0) -+a 0 + 7FFFFFFFFFFFFFFF + 000000007FFFFFFF = 7FFFFFFFFFFFFFFF (cc=1) -+ah 0 + 0000000000000000 + 000000007FFFFFFF = 0000000000000000 (cc=0) -+ah 0 + 0000000000000001 + 000000007FFFFFFF = 0000000000000001 (cc=2) -+ah 0 + 000000000000FFFF + 000000007FFFFFFF = 000000000000FFFF (cc=2) -+ah 0 + 0000000000007FFF + 000000007FFFFFFF = 0000000000007FFF (cc=2) -+ah 0 + 0000000000008000 + 000000007FFFFFFF = 0000000000008000 (cc=2) -+ah 0 + 00000000FFFFFFFF + 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+ah 0 + 0000000080000000 + 000000007FFFFFFF = 0000000080000000 (cc=1) -+ah 0 + 000000007FFFFFFF + 000000007FFFFFFF = 000000007FFFFFFF (cc=2) -+ah 0 + FFFFFFFFFFFFFFFF + 000000007FFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+ah 0 + 8000000000000000 + 000000007FFFFFFF = 8000000000000000 (cc=0) -+ah 0 + 7FFFFFFFFFFFFFFF + 000000007FFFFFFF = 7FFFFFFFFFFFFFFF (cc=1) -+ag 0 + 0000000000000000 + 000000007FFFFFFF = 000000007FFFFFFF (cc=2) -+ag 0 + 0000000000000001 + 000000007FFFFFFF = 0000000080000000 (cc=2) -+ag 0 + 000000000000FFFF + 000000007FFFFFFF = 000000008000FFFE (cc=2) -+ag 0 + 0000000000007FFF + 000000007FFFFFFF = 0000000080007FFE (cc=2) -+ag 0 + 0000000000008000 + 000000007FFFFFFF = 0000000080007FFF (cc=2) -+ag 0 + 00000000FFFFFFFF + 000000007FFFFFFF = 000000017FFFFFFE (cc=2) -+ag 0 + 0000000080000000 + 000000007FFFFFFF = 00000000FFFFFFFF (cc=2) -+ag 0 + 000000007FFFFFFF + 000000007FFFFFFF = 00000000FFFFFFFE (cc=2) -+ag 0 + FFFFFFFFFFFFFFFF + 000000007FFFFFFF = 000000007FFFFFFE (cc=2) -+ag 0 + 8000000000000000 + 000000007FFFFFFF = 800000007FFFFFFF (cc=1) -+ag 0 + 7FFFFFFFFFFFFFFF + 000000007FFFFFFF = 800000007FFFFFFE (cc=3) -+agf 0 + 0000000000000000 + 000000007FFFFFFF = 0000000000000000 (cc=0) -+agf 0 + 0000000000000001 + 000000007FFFFFFF = 0000000000000001 (cc=2) -+agf 0 + 000000000000FFFF + 000000007FFFFFFF = 000000000000FFFF (cc=2) -+agf 0 + 0000000000007FFF + 000000007FFFFFFF = 0000000000007FFF (cc=2) -+agf 0 + 0000000000008000 + 000000007FFFFFFF = 0000000000008000 (cc=2) -+agf 0 + 00000000FFFFFFFF + 000000007FFFFFFF = 00000000FFFFFFFF (cc=2) -+agf 0 + 0000000080000000 + 000000007FFFFFFF = 0000000080000000 (cc=2) -+agf 0 + 000000007FFFFFFF + 000000007FFFFFFF = 000000007FFFFFFF (cc=2) -+agf 0 + FFFFFFFFFFFFFFFF + 000000007FFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + 8000000000000000 + 000000007FFFFFFF = 8000000000000000 (cc=1) -+agf 0 + 7FFFFFFFFFFFFFFF + 000000007FFFFFFF = 7FFFFFFFFFFFFFFF (cc=2) -+al 0 + 0000000000000000 + 000000007FFFFFFF = 0000000000000000 (cc=0) -+al 0 + 0000000000000001 + 000000007FFFFFFF = 0000000000000001 (cc=1) -+al 0 + 000000000000FFFF + 000000007FFFFFFF = 000000000000FFFF (cc=1) -+al 0 + 0000000000007FFF + 000000007FFFFFFF = 0000000000007FFF (cc=1) -+al 0 + 0000000000008000 + 000000007FFFFFFF = 0000000000008000 (cc=1) -+al 0 + 00000000FFFFFFFF + 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+al 0 + 0000000080000000 + 000000007FFFFFFF = 0000000080000000 (cc=1) -+al 0 + 000000007FFFFFFF + 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+al 0 + FFFFFFFFFFFFFFFF + 000000007FFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+al 0 + 8000000000000000 + 000000007FFFFFFF = 8000000000000000 (cc=0) -+al 0 + 7FFFFFFFFFFFFFFF + 000000007FFFFFFF = 7FFFFFFFFFFFFFFF (cc=1) -+alg 0 + 0000000000000000 + 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+alg 0 + 0000000000000001 + 000000007FFFFFFF = 0000000080000000 (cc=1) -+alg 0 + 000000000000FFFF + 000000007FFFFFFF = 000000008000FFFE (cc=1) -+alg 0 + 0000000000007FFF + 000000007FFFFFFF = 0000000080007FFE (cc=1) -+alg 0 + 0000000000008000 + 000000007FFFFFFF = 0000000080007FFF (cc=1) -+alg 0 + 00000000FFFFFFFF + 000000007FFFFFFF = 000000017FFFFFFE (cc=1) -+alg 0 + 0000000080000000 + 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+alg 0 + 000000007FFFFFFF + 000000007FFFFFFF = 00000000FFFFFFFE (cc=1) -+alg 0 + FFFFFFFFFFFFFFFF + 000000007FFFFFFF = 000000007FFFFFFE (cc=3) -+alg 0 + 8000000000000000 + 000000007FFFFFFF = 800000007FFFFFFF (cc=1) -+alg 0 + 7FFFFFFFFFFFFFFF + 000000007FFFFFFF = 800000007FFFFFFE (cc=1) -+agf 0 + 0000000000000000 + 000000007FFFFFFF = 0000000000000000 (cc=0) -+agf 0 + 0000000000000001 + 000000007FFFFFFF = 0000000000000001 (cc=2) -+agf 0 + 000000000000FFFF + 000000007FFFFFFF = 000000000000FFFF (cc=2) -+agf 0 + 0000000000007FFF + 000000007FFFFFFF = 0000000000007FFF (cc=2) -+agf 0 + 0000000000008000 + 000000007FFFFFFF = 0000000000008000 (cc=2) -+agf 0 + 00000000FFFFFFFF + 000000007FFFFFFF = 00000000FFFFFFFF (cc=2) -+agf 0 + 0000000080000000 + 000000007FFFFFFF = 0000000080000000 (cc=2) -+agf 0 + 000000007FFFFFFF + 000000007FFFFFFF = 000000007FFFFFFF (cc=2) -+agf 0 + FFFFFFFFFFFFFFFF + 000000007FFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + 8000000000000000 + 000000007FFFFFFF = 8000000000000000 (cc=1) -+agf 0 + 7FFFFFFFFFFFFFFF + 000000007FFFFFFF = 7FFFFFFFFFFFFFFF (cc=2) -+algf 0 + 0000000000000000 + 000000007FFFFFFF = 0000000000000000 (cc=0) -+algf 0 + 0000000000000001 + 000000007FFFFFFF = 0000000000000001 (cc=1) -+algf 0 + 000000000000FFFF + 000000007FFFFFFF = 000000000000FFFF (cc=1) -+algf 0 + 0000000000007FFF + 000000007FFFFFFF = 0000000000007FFF (cc=1) -+algf 0 + 0000000000008000 + 000000007FFFFFFF = 0000000000008000 (cc=1) -+algf 0 + 00000000FFFFFFFF + 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+algf 0 + 0000000080000000 + 000000007FFFFFFF = 0000000080000000 (cc=1) -+algf 0 + 000000007FFFFFFF + 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+algf 0 + FFFFFFFFFFFFFFFF + 000000007FFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+algf 0 + 8000000000000000 + 000000007FFFFFFF = 8000000000000000 (cc=1) -+algf 0 + 7FFFFFFFFFFFFFFF + 000000007FFFFFFF = 7FFFFFFFFFFFFFFF (cc=1) -+ar 0 + 0000000000000000 + 000000007FFFFFFF = 000000007FFFFFFF (cc=2) -+ar 0 + 0000000000000001 + 000000007FFFFFFF = 0000000080000000 (cc=3) -+ar 0 + 000000000000FFFF + 000000007FFFFFFF = 000000008000FFFE (cc=3) -+ar 0 + 0000000000007FFF + 000000007FFFFFFF = 0000000080007FFE (cc=3) -+ar 0 + 0000000000008000 + 000000007FFFFFFF = 0000000080007FFF (cc=3) -+ar 0 + 00000000FFFFFFFF + 000000007FFFFFFF = 000000007FFFFFFE (cc=2) -+ar 0 + 0000000080000000 + 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+ar 0 + 000000007FFFFFFF + 000000007FFFFFFF = 00000000FFFFFFFE (cc=3) -+ar 0 + FFFFFFFFFFFFFFFF + 000000007FFFFFFF = FFFFFFFF7FFFFFFE (cc=2) -+ar 0 + 8000000000000000 + 000000007FFFFFFF = 800000007FFFFFFF (cc=2) -+ar 0 + 7FFFFFFFFFFFFFFF + 000000007FFFFFFF = 7FFFFFFF7FFFFFFE (cc=2) -+agr 0 + 0000000000000000 + 000000007FFFFFFF = 000000007FFFFFFF (cc=2) -+agr 0 + 0000000000000001 + 000000007FFFFFFF = 0000000080000000 (cc=2) -+agr 0 + 000000000000FFFF + 000000007FFFFFFF = 000000008000FFFE (cc=2) -+agr 0 + 0000000000007FFF + 000000007FFFFFFF = 0000000080007FFE (cc=2) -+agr 0 + 0000000000008000 + 000000007FFFFFFF = 0000000080007FFF (cc=2) -+agr 0 + 00000000FFFFFFFF + 000000007FFFFFFF = 000000017FFFFFFE (cc=2) -+agr 0 + 0000000080000000 + 000000007FFFFFFF = 00000000FFFFFFFF (cc=2) -+agr 0 + 000000007FFFFFFF + 000000007FFFFFFF = 00000000FFFFFFFE (cc=2) -+agr 0 + FFFFFFFFFFFFFFFF + 000000007FFFFFFF = 000000007FFFFFFE (cc=2) -+agr 0 + 8000000000000000 + 000000007FFFFFFF = 800000007FFFFFFF (cc=1) -+agr 0 + 7FFFFFFFFFFFFFFF + 000000007FFFFFFF = 800000007FFFFFFE (cc=3) -+agfr 0 + 0000000000000000 + 000000007FFFFFFF = 000000007FFFFFFF (cc=2) -+agfr 0 + 0000000000000001 + 000000007FFFFFFF = 0000000080000000 (cc=2) -+agfr 0 + 000000000000FFFF + 000000007FFFFFFF = 000000008000FFFE (cc=2) -+agfr 0 + 0000000000007FFF + 000000007FFFFFFF = 0000000080007FFE (cc=2) -+agfr 0 + 0000000000008000 + 000000007FFFFFFF = 0000000080007FFF (cc=2) -+agfr 0 + 00000000FFFFFFFF + 000000007FFFFFFF = 000000017FFFFFFE (cc=2) -+agfr 0 + 0000000080000000 + 000000007FFFFFFF = 00000000FFFFFFFF (cc=2) -+agfr 0 + 000000007FFFFFFF + 000000007FFFFFFF = 00000000FFFFFFFE (cc=2) -+agfr 0 + FFFFFFFFFFFFFFFF + 000000007FFFFFFF = 000000007FFFFFFE (cc=2) -+agfr 0 + 8000000000000000 + 000000007FFFFFFF = 800000007FFFFFFF (cc=1) -+agfr 0 + 7FFFFFFFFFFFFFFF + 000000007FFFFFFF = 800000007FFFFFFE (cc=3) -+alr 0 + 0000000000000000 + 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+alr 0 + 0000000000000001 + 000000007FFFFFFF = 0000000080000000 (cc=1) -+alr 0 + 000000000000FFFF + 000000007FFFFFFF = 000000008000FFFE (cc=1) -+alr 0 + 0000000000007FFF + 000000007FFFFFFF = 0000000080007FFE (cc=1) -+alr 0 + 0000000000008000 + 000000007FFFFFFF = 0000000080007FFF (cc=1) -+alr 0 + 00000000FFFFFFFF + 000000007FFFFFFF = 000000007FFFFFFE (cc=3) -+alr 0 + 0000000080000000 + 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+alr 0 + 000000007FFFFFFF + 000000007FFFFFFF = 00000000FFFFFFFE (cc=1) -+alr 0 + FFFFFFFFFFFFFFFF + 000000007FFFFFFF = FFFFFFFF7FFFFFFE (cc=3) -+alr 0 + 8000000000000000 + 000000007FFFFFFF = 800000007FFFFFFF (cc=1) -+alr 0 + 7FFFFFFFFFFFFFFF + 000000007FFFFFFF = 7FFFFFFF7FFFFFFE (cc=3) -+algr 0 + 0000000000000000 + 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+algr 0 + 0000000000000001 + 000000007FFFFFFF = 0000000080000000 (cc=1) -+algr 0 + 000000000000FFFF + 000000007FFFFFFF = 000000008000FFFE (cc=1) -+algr 0 + 0000000000007FFF + 000000007FFFFFFF = 0000000080007FFE (cc=1) -+algr 0 + 0000000000008000 + 000000007FFFFFFF = 0000000080007FFF (cc=1) -+algr 0 + 00000000FFFFFFFF + 000000007FFFFFFF = 000000017FFFFFFE (cc=1) -+algr 0 + 0000000080000000 + 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+algr 0 + 000000007FFFFFFF + 000000007FFFFFFF = 00000000FFFFFFFE (cc=1) -+algr 0 + FFFFFFFFFFFFFFFF + 000000007FFFFFFF = 000000007FFFFFFE (cc=3) -+algr 0 + 8000000000000000 + 000000007FFFFFFF = 800000007FFFFFFF (cc=1) -+algr 0 + 7FFFFFFFFFFFFFFF + 000000007FFFFFFF = 800000007FFFFFFE (cc=1) -+algfr 0 + 0000000000000000 + 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+algfr 0 + 0000000000000001 + 000000007FFFFFFF = 0000000080000000 (cc=1) -+algfr 0 + 000000000000FFFF + 000000007FFFFFFF = 000000008000FFFE (cc=1) -+algfr 0 + 0000000000007FFF + 000000007FFFFFFF = 0000000080007FFE (cc=1) -+algfr 0 + 0000000000008000 + 000000007FFFFFFF = 0000000080007FFF (cc=1) -+algfr 0 + 00000000FFFFFFFF + 000000007FFFFFFF = 000000017FFFFFFE (cc=1) -+algfr 0 + 0000000080000000 + 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+algfr 0 + 000000007FFFFFFF + 000000007FFFFFFF = 00000000FFFFFFFE (cc=1) -+algfr 0 + FFFFFFFFFFFFFFFF + 000000007FFFFFFF = 000000007FFFFFFE (cc=3) -+algfr 0 + 8000000000000000 + 000000007FFFFFFF = 800000007FFFFFFF (cc=1) -+algfr 0 + 7FFFFFFFFFFFFFFF + 000000007FFFFFFF = 800000007FFFFFFE (cc=1) -+alc 0 + 0000000000000000 + 000000007FFFFFFF = 0000000000000000 (cc=0) -+alc 0 + 0000000000000001 + 000000007FFFFFFF = 0000000000000001 (cc=1) -+alc 0 + 000000000000FFFF + 000000007FFFFFFF = 000000000000FFFF (cc=1) -+alc 0 + 0000000000007FFF + 000000007FFFFFFF = 0000000000007FFF (cc=1) -+alc 0 + 0000000000008000 + 000000007FFFFFFF = 0000000000008000 (cc=1) -+alc 0 + 00000000FFFFFFFF + 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+alc 0 + 0000000080000000 + 000000007FFFFFFF = 0000000080000000 (cc=1) -+alc 0 + 000000007FFFFFFF + 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+alc 0 + FFFFFFFFFFFFFFFF + 000000007FFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+alc 0 + 8000000000000000 + 000000007FFFFFFF = 8000000000000000 (cc=0) -+alc 0 + 7FFFFFFFFFFFFFFF + 000000007FFFFFFF = 7FFFFFFFFFFFFFFF (cc=1) -+alcg 0 + 0000000000000000 + 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+alcg 0 + 0000000000000001 + 000000007FFFFFFF = 0000000080000000 (cc=1) -+alcg 0 + 000000000000FFFF + 000000007FFFFFFF = 000000008000FFFE (cc=1) -+alcg 0 + 0000000000007FFF + 000000007FFFFFFF = 0000000080007FFE (cc=1) -+alcg 0 + 0000000000008000 + 000000007FFFFFFF = 0000000080007FFF (cc=1) -+alcg 0 + 00000000FFFFFFFF + 000000007FFFFFFF = 000000017FFFFFFE (cc=1) -+alcg 0 + 0000000080000000 + 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+alcg 0 + 000000007FFFFFFF + 000000007FFFFFFF = 00000000FFFFFFFE (cc=1) -+alcg 0 + FFFFFFFFFFFFFFFF + 000000007FFFFFFF = 000000007FFFFFFE (cc=3) -+alcg 0 + 8000000000000000 + 000000007FFFFFFF = 800000007FFFFFFF (cc=1) -+alcg 0 + 7FFFFFFFFFFFFFFF + 000000007FFFFFFF = 800000007FFFFFFE (cc=1) -+alcr 0 + 0000000000000000 + 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+alcr 0 + 0000000000000001 + 000000007FFFFFFF = 0000000080000000 (cc=1) -+alcr 0 + 000000000000FFFF + 000000007FFFFFFF = 000000008000FFFE (cc=1) -+alcr 0 + 0000000000007FFF + 000000007FFFFFFF = 0000000080007FFE (cc=1) -+alcr 0 + 0000000000008000 + 000000007FFFFFFF = 0000000080007FFF (cc=1) -+alcr 0 + 00000000FFFFFFFF + 000000007FFFFFFF = 000000007FFFFFFE (cc=3) -+alcr 0 + 0000000080000000 + 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+alcr 0 + 000000007FFFFFFF + 000000007FFFFFFF = 00000000FFFFFFFE (cc=1) -+alcr 0 + FFFFFFFFFFFFFFFF + 000000007FFFFFFF = FFFFFFFF7FFFFFFE (cc=3) -+alcr 0 + 8000000000000000 + 000000007FFFFFFF = 800000007FFFFFFF (cc=1) -+alcr 0 + 7FFFFFFFFFFFFFFF + 000000007FFFFFFF = 7FFFFFFF7FFFFFFE (cc=3) -+alcgr 0 + 0000000000000000 + 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+alcgr 0 + 0000000000000001 + 000000007FFFFFFF = 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0000000000008000 + 000000007FFFFFFF = 0000000000008001 (cc=1) -+alc 1 + 00000000FFFFFFFF + 000000007FFFFFFF = 0000000000000000 (cc=2) -+alc 1 + 0000000080000000 + 000000007FFFFFFF = 0000000080000001 (cc=1) -+alc 1 + 000000007FFFFFFF + 000000007FFFFFFF = 0000000080000000 (cc=1) -+alc 1 + FFFFFFFFFFFFFFFF + 000000007FFFFFFF = FFFFFFFF00000000 (cc=2) -+alc 1 + 8000000000000000 + 000000007FFFFFFF = 8000000000000001 (cc=1) -+alc 1 + 7FFFFFFFFFFFFFFF + 000000007FFFFFFF = 7FFFFFFF00000000 (cc=2) -+alcg 1 + 0000000000000000 + 000000007FFFFFFF = 0000000080000000 (cc=1) -+alcg 1 + 0000000000000001 + 000000007FFFFFFF = 0000000080000001 (cc=1) -+alcg 1 + 000000000000FFFF + 000000007FFFFFFF = 000000008000FFFF (cc=1) -+alcg 1 + 0000000000007FFF + 000000007FFFFFFF = 0000000080007FFF (cc=1) -+alcg 1 + 0000000000008000 + 000000007FFFFFFF = 0000000080008000 (cc=1) -+alcg 1 + 00000000FFFFFFFF + 000000007FFFFFFF = 000000017FFFFFFF (cc=1) -+alcg 1 + 0000000080000000 + 000000007FFFFFFF = 0000000100000000 (cc=1) -+alcg 1 + 000000007FFFFFFF + 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+alcg 1 + FFFFFFFFFFFFFFFF + 000000007FFFFFFF = 000000007FFFFFFF (cc=3) -+alcg 1 + 8000000000000000 + 000000007FFFFFFF = 8000000080000000 (cc=1) -+alcg 1 + 7FFFFFFFFFFFFFFF + 000000007FFFFFFF = 800000007FFFFFFF (cc=1) -+alcr 1 + 0000000000000000 + 000000007FFFFFFF = 0000000080000000 (cc=1) -+alcr 1 + 0000000000000001 + 000000007FFFFFFF = 0000000080000001 (cc=1) -+alcr 1 + 000000000000FFFF + 000000007FFFFFFF = 000000008000FFFF (cc=1) -+alcr 1 + 0000000000007FFF + 000000007FFFFFFF = 0000000080007FFF (cc=1) -+alcr 1 + 0000000000008000 + 000000007FFFFFFF = 0000000080008000 (cc=1) -+alcr 1 + 00000000FFFFFFFF + 000000007FFFFFFF = 000000007FFFFFFF (cc=3) -+alcr 1 + 0000000080000000 + 000000007FFFFFFF = 0000000000000000 (cc=2) -+alcr 1 + 000000007FFFFFFF + 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+alcr 1 + FFFFFFFFFFFFFFFF + 000000007FFFFFFF = FFFFFFFF7FFFFFFF (cc=3) -+alcr 1 + 8000000000000000 + 000000007FFFFFFF = 8000000080000000 (cc=1) -+alcr 1 + 7FFFFFFFFFFFFFFF + 000000007FFFFFFF = 7FFFFFFF7FFFFFFF (cc=3) -+alcgr 1 + 0000000000000000 + 000000007FFFFFFF = 0000000080000000 (cc=1) -+alcgr 1 + 0000000000000001 + 000000007FFFFFFF = 0000000080000001 (cc=1) -+alcgr 1 + 000000000000FFFF + 000000007FFFFFFF = 000000008000FFFF (cc=1) -+alcgr 1 + 0000000000007FFF + 000000007FFFFFFF = 0000000080007FFF (cc=1) -+alcgr 1 + 0000000000008000 + 000000007FFFFFFF = 0000000080008000 (cc=1) -+alcgr 1 + 00000000FFFFFFFF + 000000007FFFFFFF = 000000017FFFFFFF (cc=1) -+alcgr 1 + 0000000080000000 + 000000007FFFFFFF = 0000000100000000 (cc=1) -+alcgr 1 + 000000007FFFFFFF + 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+alcgr 1 + FFFFFFFFFFFFFFFF + 000000007FFFFFFF = 000000007FFFFFFF (cc=3) -+alcgr 1 + 8000000000000000 + 000000007FFFFFFF = 8000000080000000 (cc=1) -+alcgr 1 + 7FFFFFFFFFFFFFFF + 000000007FFFFFFF = 800000007FFFFFFF (cc=1) -+ahy 0 + 0000000000000000 + 000000007FFFFFFF = 0000000000000000 (cc=0) -+ahy 0 + 0000000000000001 + 000000007FFFFFFF = 0000000000000001 (cc=2) -+ahy 0 + 000000000000FFFF + 000000007FFFFFFF = 000000000000FFFF (cc=2) -+ahy 0 + 0000000000007FFF + 000000007FFFFFFF = 0000000000007FFF (cc=2) -+ahy 0 + 0000000000008000 + 000000007FFFFFFF = 0000000000008000 (cc=2) -+ahy 0 + 00000000FFFFFFFF + 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+ahy 0 + 0000000080000000 + 000000007FFFFFFF = 0000000080000000 (cc=1) -+ahy 0 + 000000007FFFFFFF + 000000007FFFFFFF = 000000007FFFFFFF (cc=2) -+ahy 0 + FFFFFFFFFFFFFFFF + 000000007FFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+ahy 0 + 8000000000000000 + 000000007FFFFFFF = 8000000000000000 (cc=0) -+ahy 0 + 7FFFFFFFFFFFFFFF + 000000007FFFFFFF = 7FFFFFFFFFFFFFFF (cc=1) -+ay 0 + 0000000000000000 + 000000007FFFFFFF = 0000000000000000 (cc=0) -+ay 0 + 0000000000000001 + 000000007FFFFFFF = 0000000000000001 (cc=2) -+ay 0 + 000000000000FFFF + 000000007FFFFFFF = 000000000000FFFF (cc=2) -+ay 0 + 0000000000007FFF + 000000007FFFFFFF = 0000000000007FFF (cc=2) -+ay 0 + 0000000000008000 + 000000007FFFFFFF = 0000000000008000 (cc=2) -+ay 0 + 00000000FFFFFFFF + 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+ay 0 + 0000000080000000 + 000000007FFFFFFF = 0000000080000000 (cc=1) -+ay 0 + 000000007FFFFFFF + 000000007FFFFFFF = 000000007FFFFFFF (cc=2) -+ay 0 + FFFFFFFFFFFFFFFF + 000000007FFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+ay 0 + 8000000000000000 + 000000007FFFFFFF = 8000000000000000 (cc=0) -+ay 0 + 7FFFFFFFFFFFFFFF + 000000007FFFFFFF = 7FFFFFFFFFFFFFFF (cc=1) -+aly 0 + 0000000000000000 + 000000007FFFFFFF = 0000000000000000 (cc=0) -+aly 0 + 0000000000000001 + 000000007FFFFFFF = 0000000000000001 (cc=1) -+aly 0 + 000000000000FFFF + 000000007FFFFFFF = 000000000000FFFF (cc=1) -+aly 0 + 0000000000007FFF + 000000007FFFFFFF = 0000000000007FFF (cc=1) -+aly 0 + 0000000000008000 + 000000007FFFFFFF = 0000000000008000 (cc=1) -+aly 0 + 00000000FFFFFFFF + 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+aly 0 + 0000000080000000 + 000000007FFFFFFF = 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8000000000000000 (cc=0) -+a 0 + 7FFFFFFFFFFFFFFF + 0000000080000000 = 7FFFFFFFFFFFFFFF (cc=1) -+ah 0 + 0000000000000000 + 0000000080000000 = 0000000000000000 (cc=0) -+ah 0 + 0000000000000001 + 0000000080000000 = 0000000000000001 (cc=2) -+ah 0 + 000000000000FFFF + 0000000080000000 = 000000000000FFFF (cc=2) -+ah 0 + 0000000000007FFF + 0000000080000000 = 0000000000007FFF (cc=2) -+ah 0 + 0000000000008000 + 0000000080000000 = 0000000000008000 (cc=2) -+ah 0 + 00000000FFFFFFFF + 0000000080000000 = 00000000FFFFFFFF (cc=1) -+ah 0 + 0000000080000000 + 0000000080000000 = 0000000080000000 (cc=1) -+ah 0 + 000000007FFFFFFF + 0000000080000000 = 000000007FFFFFFF (cc=2) -+ah 0 + FFFFFFFFFFFFFFFF + 0000000080000000 = FFFFFFFFFFFFFFFF (cc=1) -+ah 0 + 8000000000000000 + 0000000080000000 = 8000000000000000 (cc=0) -+ah 0 + 7FFFFFFFFFFFFFFF + 0000000080000000 = 7FFFFFFFFFFFFFFF (cc=1) -+ag 0 + 0000000000000000 + 0000000080000000 = 0000000080000000 (cc=2) -+ag 0 + 0000000000000001 + 0000000080000000 = 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0000000000008000 (cc=2) -+agf 0 + 00000000FFFFFFFF + 0000000080000000 = 00000000FFFFFFFF (cc=2) -+agf 0 + 0000000080000000 + 0000000080000000 = 0000000080000000 (cc=2) -+agf 0 + 000000007FFFFFFF + 0000000080000000 = 000000007FFFFFFF (cc=2) -+agf 0 + FFFFFFFFFFFFFFFF + 0000000080000000 = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + 8000000000000000 + 0000000080000000 = 8000000000000000 (cc=1) -+agf 0 + 7FFFFFFFFFFFFFFF + 0000000080000000 = 7FFFFFFFFFFFFFFF (cc=2) -+al 0 + 0000000000000000 + 0000000080000000 = 0000000000000000 (cc=0) -+al 0 + 0000000000000001 + 0000000080000000 = 0000000000000001 (cc=1) -+al 0 + 000000000000FFFF + 0000000080000000 = 000000000000FFFF (cc=1) -+al 0 + 0000000000007FFF + 0000000080000000 = 0000000000007FFF (cc=1) -+al 0 + 0000000000008000 + 0000000080000000 = 0000000000008000 (cc=1) -+al 0 + 00000000FFFFFFFF + 0000000080000000 = 00000000FFFFFFFF (cc=1) -+al 0 + 0000000080000000 + 0000000080000000 = 0000000080000000 (cc=1) -+al 0 + 000000007FFFFFFF + 0000000080000000 = 000000007FFFFFFF (cc=1) -+al 0 + FFFFFFFFFFFFFFFF + 0000000080000000 = FFFFFFFFFFFFFFFF (cc=1) -+al 0 + 8000000000000000 + 0000000080000000 = 8000000000000000 (cc=0) -+al 0 + 7FFFFFFFFFFFFFFF + 0000000080000000 = 7FFFFFFFFFFFFFFF (cc=1) -+alg 0 + 0000000000000000 + 0000000080000000 = 0000000080000000 (cc=1) -+alg 0 + 0000000000000001 + 0000000080000000 = 0000000080000001 (cc=1) -+alg 0 + 000000000000FFFF + 0000000080000000 = 000000008000FFFF (cc=1) -+alg 0 + 0000000000007FFF + 0000000080000000 = 0000000080007FFF (cc=1) -+alg 0 + 0000000000008000 + 0000000080000000 = 0000000080008000 (cc=1) -+alg 0 + 00000000FFFFFFFF + 0000000080000000 = 000000017FFFFFFF (cc=1) -+alg 0 + 0000000080000000 + 0000000080000000 = 0000000100000000 (cc=1) -+alg 0 + 000000007FFFFFFF + 0000000080000000 = 00000000FFFFFFFF (cc=1) -+alg 0 + FFFFFFFFFFFFFFFF + 0000000080000000 = 000000007FFFFFFF (cc=3) -+alg 0 + 8000000000000000 + 0000000080000000 = 8000000080000000 (cc=1) -+alg 0 + 7FFFFFFFFFFFFFFF + 0000000080000000 = 800000007FFFFFFF (cc=1) -+agf 0 + 0000000000000000 + 0000000080000000 = 0000000000000000 (cc=0) -+agf 0 + 0000000000000001 + 0000000080000000 = 0000000000000001 (cc=2) -+agf 0 + 000000000000FFFF + 0000000080000000 = 000000000000FFFF (cc=2) -+agf 0 + 0000000000007FFF + 0000000080000000 = 0000000000007FFF (cc=2) -+agf 0 + 0000000000008000 + 0000000080000000 = 0000000000008000 (cc=2) -+agf 0 + 00000000FFFFFFFF + 0000000080000000 = 00000000FFFFFFFF (cc=2) -+agf 0 + 0000000080000000 + 0000000080000000 = 0000000080000000 (cc=2) -+agf 0 + 000000007FFFFFFF + 0000000080000000 = 000000007FFFFFFF (cc=2) -+agf 0 + FFFFFFFFFFFFFFFF + 0000000080000000 = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + 8000000000000000 + 0000000080000000 = 8000000000000000 (cc=1) -+agf 0 + 7FFFFFFFFFFFFFFF + 0000000080000000 = 7FFFFFFFFFFFFFFF (cc=2) -+algf 0 + 0000000000000000 + 0000000080000000 = 0000000000000000 (cc=0) -+algf 0 + 0000000000000001 + 0000000080000000 = 0000000000000001 (cc=1) -+algf 0 + 000000000000FFFF + 0000000080000000 = 000000000000FFFF (cc=1) -+algf 0 + 0000000000007FFF + 0000000080000000 = 0000000000007FFF (cc=1) -+algf 0 + 0000000000008000 + 0000000080000000 = 0000000000008000 (cc=1) -+algf 0 + 00000000FFFFFFFF + 0000000080000000 = 00000000FFFFFFFF (cc=1) -+algf 0 + 0000000080000000 + 0000000080000000 = 0000000080000000 (cc=1) -+algf 0 + 000000007FFFFFFF + 0000000080000000 = 000000007FFFFFFF (cc=1) -+algf 0 + FFFFFFFFFFFFFFFF + 0000000080000000 = FFFFFFFFFFFFFFFF (cc=1) -+algf 0 + 8000000000000000 + 0000000080000000 = 8000000000000000 (cc=1) -+algf 0 + 7FFFFFFFFFFFFFFF + 0000000080000000 = 7FFFFFFFFFFFFFFF (cc=1) -+ar 0 + 0000000000000000 + 0000000080000000 = 0000000080000000 (cc=1) -+ar 0 + 0000000000000001 + 0000000080000000 = 0000000080000001 (cc=1) -+ar 0 + 000000000000FFFF + 0000000080000000 = 000000008000FFFF (cc=1) -+ar 0 + 0000000000007FFF + 0000000080000000 = 0000000080007FFF (cc=1) -+ar 0 + 0000000000008000 + 0000000080000000 = 0000000080008000 (cc=1) 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(cc=2) -+agr 0 + FFFFFFFFFFFFFFFF + 0000000080000000 = 000000007FFFFFFF (cc=2) -+agr 0 + 8000000000000000 + 0000000080000000 = 8000000080000000 (cc=1) -+agr 0 + 7FFFFFFFFFFFFFFF + 0000000080000000 = 800000007FFFFFFF (cc=3) -+agfr 0 + 0000000000000000 + 0000000080000000 = FFFFFFFF80000000 (cc=1) -+agfr 0 + 0000000000000001 + 0000000080000000 = FFFFFFFF80000001 (cc=1) -+agfr 0 + 000000000000FFFF + 0000000080000000 = FFFFFFFF8000FFFF (cc=1) -+agfr 0 + 0000000000007FFF + 0000000080000000 = FFFFFFFF80007FFF (cc=1) -+agfr 0 + 0000000000008000 + 0000000080000000 = FFFFFFFF80008000 (cc=1) -+agfr 0 + 00000000FFFFFFFF + 0000000080000000 = 000000007FFFFFFF (cc=2) -+agfr 0 + 0000000080000000 + 0000000080000000 = 0000000000000000 (cc=0) -+agfr 0 + 000000007FFFFFFF + 0000000080000000 = FFFFFFFFFFFFFFFF (cc=1) -+agfr 0 + FFFFFFFFFFFFFFFF + 0000000080000000 = FFFFFFFF7FFFFFFF (cc=1) -+agfr 0 + 8000000000000000 + 0000000080000000 = 7FFFFFFF80000000 (cc=3) -+agfr 0 + 7FFFFFFFFFFFFFFF + 0000000080000000 = 7FFFFFFF7FFFFFFF (cc=2) -+alr 0 + 0000000000000000 + 0000000080000000 = 0000000080000000 (cc=1) -+alr 0 + 0000000000000001 + 0000000080000000 = 0000000080000001 (cc=1) -+alr 0 + 000000000000FFFF + 0000000080000000 = 000000008000FFFF (cc=1) -+alr 0 + 0000000000007FFF + 0000000080000000 = 0000000080007FFF (cc=1) -+alr 0 + 0000000000008000 + 0000000080000000 = 0000000080008000 (cc=1) -+alr 0 + 00000000FFFFFFFF + 0000000080000000 = 000000007FFFFFFF (cc=3) -+alr 0 + 0000000080000000 + 0000000080000000 = 0000000000000000 (cc=2) -+alr 0 + 000000007FFFFFFF + 0000000080000000 = 00000000FFFFFFFF (cc=1) -+alr 0 + FFFFFFFFFFFFFFFF + 0000000080000000 = FFFFFFFF7FFFFFFF (cc=3) -+alr 0 + 8000000000000000 + 0000000080000000 = 8000000080000000 (cc=1) -+alr 0 + 7FFFFFFFFFFFFFFF + 0000000080000000 = 7FFFFFFF7FFFFFFF (cc=3) -+algr 0 + 0000000000000000 + 0000000080000000 = 0000000080000000 (cc=1) -+algr 0 + 0000000000000001 + 0000000080000000 = 0000000080000001 (cc=1) -+algr 0 + 000000000000FFFF + 0000000080000000 = 000000008000FFFF (cc=1) -+algr 0 + 0000000000007FFF + 0000000080000000 = 0000000080007FFF (cc=1) -+algr 0 + 0000000000008000 + 0000000080000000 = 0000000080008000 (cc=1) -+algr 0 + 00000000FFFFFFFF + 0000000080000000 = 000000017FFFFFFF (cc=1) -+algr 0 + 0000000080000000 + 0000000080000000 = 0000000100000000 (cc=1) -+algr 0 + 000000007FFFFFFF + 0000000080000000 = 00000000FFFFFFFF (cc=1) -+algr 0 + FFFFFFFFFFFFFFFF + 0000000080000000 = 000000007FFFFFFF (cc=3) -+algr 0 + 8000000000000000 + 0000000080000000 = 8000000080000000 (cc=1) -+algr 0 + 7FFFFFFFFFFFFFFF + 0000000080000000 = 800000007FFFFFFF (cc=1) -+algfr 0 + 0000000000000000 + 0000000080000000 = 0000000080000000 (cc=1) -+algfr 0 + 0000000000000001 + 0000000080000000 = 0000000080000001 (cc=1) -+algfr 0 + 000000000000FFFF + 0000000080000000 = 000000008000FFFF (cc=1) -+algfr 0 + 0000000000007FFF + 0000000080000000 = 0000000080007FFF (cc=1) -+algfr 0 + 0000000000008000 + 0000000080000000 = 0000000080008000 (cc=1) -+algfr 0 + 00000000FFFFFFFF + 0000000080000000 = 000000017FFFFFFF (cc=1) -+algfr 0 + 0000000080000000 + 0000000080000000 = 0000000100000000 (cc=1) -+algfr 0 + 000000007FFFFFFF + 0000000080000000 = 00000000FFFFFFFF (cc=1) -+algfr 0 + FFFFFFFFFFFFFFFF + 0000000080000000 = 000000007FFFFFFF (cc=3) -+algfr 0 + 8000000000000000 + 0000000080000000 = 8000000080000000 (cc=1) -+algfr 0 + 7FFFFFFFFFFFFFFF + 0000000080000000 = 800000007FFFFFFF (cc=1) -+alc 0 + 0000000000000000 + 0000000080000000 = 0000000000000000 (cc=0) -+alc 0 + 0000000000000001 + 0000000080000000 = 0000000000000001 (cc=1) -+alc 0 + 000000000000FFFF + 0000000080000000 = 000000000000FFFF (cc=1) -+alc 0 + 0000000000007FFF + 0000000080000000 = 0000000000007FFF (cc=1) -+alc 0 + 0000000000008000 + 0000000080000000 = 0000000000008000 (cc=1) -+alc 0 + 00000000FFFFFFFF + 0000000080000000 = 00000000FFFFFFFF (cc=1) -+alc 0 + 0000000080000000 + 0000000080000000 = 0000000080000000 (cc=1) -+alc 0 + 000000007FFFFFFF + 0000000080000000 = 000000007FFFFFFF (cc=1) -+alc 0 + FFFFFFFFFFFFFFFF + 0000000080000000 = FFFFFFFFFFFFFFFF (cc=1) -+alc 0 + 8000000000000000 + 0000000080000000 = 8000000000000000 (cc=0) -+alc 0 + 7FFFFFFFFFFFFFFF + 0000000080000000 = 7FFFFFFFFFFFFFFF (cc=1) -+alcg 0 + 0000000000000000 + 0000000080000000 = 0000000080000000 (cc=1) -+alcg 0 + 0000000000000001 + 0000000080000000 = 0000000080000001 (cc=1) -+alcg 0 + 000000000000FFFF + 0000000080000000 = 000000008000FFFF (cc=1) -+alcg 0 + 0000000000007FFF + 0000000080000000 = 0000000080007FFF (cc=1) -+alcg 0 + 0000000000008000 + 0000000080000000 = 0000000080008000 (cc=1) -+alcg 0 + 00000000FFFFFFFF + 0000000080000000 = 000000017FFFFFFF (cc=1) -+alcg 0 + 0000000080000000 + 0000000080000000 = 0000000100000000 (cc=1) -+alcg 0 + 000000007FFFFFFF + 0000000080000000 = 00000000FFFFFFFF (cc=1) -+alcg 0 + FFFFFFFFFFFFFFFF + 0000000080000000 = 000000007FFFFFFF (cc=3) -+alcg 0 + 8000000000000000 + 0000000080000000 = 8000000080000000 (cc=1) -+alcg 0 + 7FFFFFFFFFFFFFFF + 0000000080000000 = 800000007FFFFFFF (cc=1) -+alcr 0 + 0000000000000000 + 0000000080000000 = 0000000080000000 (cc=1) -+alcr 0 + 0000000000000001 + 0000000080000000 = 0000000080000001 (cc=1) -+alcr 0 + 000000000000FFFF + 0000000080000000 = 000000008000FFFF (cc=1) -+alcr 0 + 0000000000007FFF + 0000000080000000 = 0000000080007FFF (cc=1) -+alcr 0 + 0000000000008000 + 0000000080000000 = 0000000080008000 (cc=1) -+alcr 0 + 00000000FFFFFFFF + 0000000080000000 = 000000007FFFFFFF (cc=3) -+alcr 0 + 0000000080000000 + 0000000080000000 = 0000000000000000 (cc=2) -+alcr 0 + 000000007FFFFFFF + 0000000080000000 = 00000000FFFFFFFF (cc=1) -+alcr 0 + FFFFFFFFFFFFFFFF + 0000000080000000 = FFFFFFFF7FFFFFFF (cc=3) -+alcr 0 + 8000000000000000 + 0000000080000000 = 8000000080000000 (cc=1) -+alcr 0 + 7FFFFFFFFFFFFFFF + 0000000080000000 = 7FFFFFFF7FFFFFFF (cc=3) -+alcgr 0 + 0000000000000000 + 0000000080000000 = 0000000080000000 (cc=1) -+alcgr 0 + 0000000000000001 + 0000000080000000 = 0000000080000001 (cc=1) -+alcgr 0 + 000000000000FFFF + 0000000080000000 = 000000008000FFFF (cc=1) -+alcgr 0 + 0000000000007FFF + 0000000080000000 = 0000000080007FFF (cc=1) -+alcgr 0 + 0000000000008000 + 0000000080000000 = 0000000080008000 (cc=1) -+alcgr 0 + 00000000FFFFFFFF + 0000000080000000 = 000000017FFFFFFF (cc=1) -+alcgr 0 + 0000000080000000 + 0000000080000000 = 0000000100000000 (cc=1) -+alcgr 0 + 000000007FFFFFFF + 0000000080000000 = 00000000FFFFFFFF (cc=1) -+alcgr 0 + FFFFFFFFFFFFFFFF + 0000000080000000 = 000000007FFFFFFF (cc=3) -+alcgr 0 + 8000000000000000 + 0000000080000000 = 8000000080000000 (cc=1) -+alcgr 0 + 7FFFFFFFFFFFFFFF + 0000000080000000 = 800000007FFFFFFF (cc=1) -+alc 1 + 0000000000000000 + 0000000080000000 = 0000000000000001 (cc=1) -+alc 1 + 0000000000000001 + 0000000080000000 = 0000000000000002 (cc=1) -+alc 1 + 000000000000FFFF + 0000000080000000 = 0000000000010000 (cc=1) -+alc 1 + 0000000000007FFF + 0000000080000000 = 0000000000008000 (cc=1) -+alc 1 + 0000000000008000 + 0000000080000000 = 0000000000008001 (cc=1) -+alc 1 + 00000000FFFFFFFF + 0000000080000000 = 0000000000000000 (cc=2) -+alc 1 + 0000000080000000 + 0000000080000000 = 0000000080000001 (cc=1) -+alc 1 + 000000007FFFFFFF + 0000000080000000 = 0000000080000000 (cc=1) -+alc 1 + FFFFFFFFFFFFFFFF + 0000000080000000 = FFFFFFFF00000000 (cc=2) -+alc 1 + 8000000000000000 + 0000000080000000 = 8000000000000001 (cc=1) -+alc 1 + 7FFFFFFFFFFFFFFF + 0000000080000000 = 7FFFFFFF00000000 (cc=2) -+alcg 1 + 0000000000000000 + 0000000080000000 = 0000000080000001 (cc=1) -+alcg 1 + 0000000000000001 + 0000000080000000 = 0000000080000002 (cc=1) -+alcg 1 + 000000000000FFFF + 0000000080000000 = 0000000080010000 (cc=1) -+alcg 1 + 0000000000007FFF + 0000000080000000 = 0000000080008000 (cc=1) -+alcg 1 + 0000000000008000 + 0000000080000000 = 0000000080008001 (cc=1) -+alcg 1 + 00000000FFFFFFFF + 0000000080000000 = 0000000180000000 (cc=1) -+alcg 1 + 0000000080000000 + 0000000080000000 = 0000000100000001 (cc=1) -+alcg 1 + 000000007FFFFFFF + 0000000080000000 = 0000000100000000 (cc=1) -+alcg 1 + FFFFFFFFFFFFFFFF + 0000000080000000 = 0000000080000000 (cc=3) -+alcg 1 + 8000000000000000 + 0000000080000000 = 8000000080000001 (cc=1) -+alcg 1 + 7FFFFFFFFFFFFFFF + 0000000080000000 = 8000000080000000 (cc=1) -+alcr 1 + 0000000000000000 + 0000000080000000 = 0000000080000001 (cc=1) -+alcr 1 + 0000000000000001 + 0000000080000000 = 0000000080000002 (cc=1) -+alcr 1 + 000000000000FFFF + 0000000080000000 = 0000000080010000 (cc=1) -+alcr 1 + 0000000000007FFF + 0000000080000000 = 0000000080008000 (cc=1) -+alcr 1 + 0000000000008000 + 0000000080000000 = 0000000080008001 (cc=1) -+alcr 1 + 00000000FFFFFFFF + 0000000080000000 = 0000000080000000 (cc=3) -+alcr 1 + 0000000080000000 + 0000000080000000 = 0000000000000001 (cc=3) -+alcr 1 + 000000007FFFFFFF + 0000000080000000 = 0000000000000000 (cc=2) -+alcr 1 + FFFFFFFFFFFFFFFF + 0000000080000000 = FFFFFFFF80000000 (cc=3) -+alcr 1 + 8000000000000000 + 0000000080000000 = 8000000080000001 (cc=1) -+alcr 1 + 7FFFFFFFFFFFFFFF + 0000000080000000 = 7FFFFFFF80000000 (cc=3) -+alcgr 1 + 0000000000000000 + 0000000080000000 = 0000000080000001 (cc=1) -+alcgr 1 + 0000000000000001 + 0000000080000000 = 0000000080000002 (cc=1) -+alcgr 1 + 000000000000FFFF + 0000000080000000 = 0000000080010000 (cc=1) -+alcgr 1 + 0000000000007FFF + 0000000080000000 = 0000000080008000 (cc=1) -+alcgr 1 + 0000000000008000 + 0000000080000000 = 0000000080008001 (cc=1) -+alcgr 1 + 00000000FFFFFFFF + 0000000080000000 = 0000000180000000 (cc=1) -+alcgr 1 + 0000000080000000 + 0000000080000000 = 0000000100000001 (cc=1) -+alcgr 1 + 000000007FFFFFFF + 0000000080000000 = 0000000100000000 (cc=1) -+alcgr 1 + FFFFFFFFFFFFFFFF + 0000000080000000 = 0000000080000000 (cc=3) -+alcgr 1 + 8000000000000000 + 0000000080000000 = 8000000080000001 (cc=1) -+alcgr 1 + 7FFFFFFFFFFFFFFF + 0000000080000000 = 8000000080000000 (cc=1) -+ahy 0 + 0000000000000000 + 0000000080000000 = 0000000000000000 (cc=0) -+ahy 0 + 0000000000000001 + 0000000080000000 = 0000000000000001 (cc=2) -+ahy 0 + 000000000000FFFF + 0000000080000000 = 000000000000FFFF (cc=2) -+ahy 0 + 0000000000007FFF + 0000000080000000 = 0000000000007FFF (cc=2) -+ahy 0 + 0000000000008000 + 0000000080000000 = 0000000000008000 (cc=2) -+ahy 0 + 00000000FFFFFFFF + 0000000080000000 = 00000000FFFFFFFF (cc=1) -+ahy 0 + 0000000080000000 + 0000000080000000 = 0000000080000000 (cc=1) -+ahy 0 + 000000007FFFFFFF + 0000000080000000 = 000000007FFFFFFF (cc=2) -+ahy 0 + FFFFFFFFFFFFFFFF + 0000000080000000 = FFFFFFFFFFFFFFFF (cc=1) -+ahy 0 + 8000000000000000 + 0000000080000000 = 8000000000000000 (cc=0) -+ahy 0 + 7FFFFFFFFFFFFFFF + 0000000080000000 = 7FFFFFFFFFFFFFFF (cc=1) -+ay 0 + 0000000000000000 + 0000000080000000 = 0000000000000000 (cc=0) -+ay 0 + 0000000000000001 + 0000000080000000 = 0000000000000001 (cc=2) -+ay 0 + 000000000000FFFF + 0000000080000000 = 000000000000FFFF (cc=2) -+ay 0 + 0000000000007FFF + 0000000080000000 = 0000000000007FFF (cc=2) -+ay 0 + 0000000000008000 + 0000000080000000 = 0000000000008000 (cc=2) -+ay 0 + 00000000FFFFFFFF + 0000000080000000 = 00000000FFFFFFFF (cc=1) -+ay 0 + 0000000080000000 + 0000000080000000 = 0000000080000000 (cc=1) -+ay 0 + 000000007FFFFFFF + 0000000080000000 = 000000007FFFFFFF (cc=2) -+ay 0 + FFFFFFFFFFFFFFFF + 0000000080000000 = FFFFFFFFFFFFFFFF (cc=1) -+ay 0 + 8000000000000000 + 0000000080000000 = 8000000000000000 (cc=0) -+ay 0 + 7FFFFFFFFFFFFFFF + 0000000080000000 = 7FFFFFFFFFFFFFFF (cc=1) -+aly 0 + 0000000000000000 + 0000000080000000 = 0000000000000000 (cc=0) -+aly 0 + 0000000000000001 + 0000000080000000 = 0000000000000001 (cc=1) -+aly 0 + 000000000000FFFF + 0000000080000000 = 000000000000FFFF (cc=1) -+aly 0 + 0000000000007FFF + 0000000080000000 = 0000000000007FFF (cc=1) -+aly 0 + 0000000000008000 + 0000000080000000 = 0000000000008000 (cc=1) -+aly 0 + 00000000FFFFFFFF + 0000000080000000 = 00000000FFFFFFFF (cc=1) -+aly 0 + 0000000080000000 + 0000000080000000 = 0000000080000000 (cc=1) -+aly 0 + 000000007FFFFFFF + 0000000080000000 = 000000007FFFFFFF (cc=1) -+aly 0 + FFFFFFFFFFFFFFFF + 0000000080000000 = FFFFFFFFFFFFFFFF (cc=1) -+aly 0 + 8000000000000000 + 0000000080000000 = 8000000000000000 (cc=0) -+aly 0 + 7FFFFFFFFFFFFFFF + 0000000080000000 = 7FFFFFFFFFFFFFFF (cc=1) -+a 0 + 0000000000000000 + 00000000FFFFFFFF = 0000000000000000 (cc=0) -+a 0 + 0000000000000001 + 00000000FFFFFFFF = 0000000000000001 (cc=2) -+a 0 + 000000000000FFFF + 00000000FFFFFFFF = 000000000000FFFF (cc=2) -+a 0 + 0000000000007FFF + 00000000FFFFFFFF = 0000000000007FFF (cc=2) -+a 0 + 0000000000008000 + 00000000FFFFFFFF = 0000000000008000 (cc=2) -+a 0 + 00000000FFFFFFFF + 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+a 0 + 0000000080000000 + 00000000FFFFFFFF = 0000000080000000 (cc=1) -+a 0 + 000000007FFFFFFF + 00000000FFFFFFFF = 000000007FFFFFFF (cc=2) -+a 0 + FFFFFFFFFFFFFFFF + 00000000FFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+a 0 + 8000000000000000 + 00000000FFFFFFFF = 8000000000000000 (cc=0) -+a 0 + 7FFFFFFFFFFFFFFF + 00000000FFFFFFFF = 7FFFFFFFFFFFFFFF (cc=1) -+ah 0 + 0000000000000000 + 00000000FFFFFFFF = 0000000000000000 (cc=0) -+ah 0 + 0000000000000001 + 00000000FFFFFFFF = 0000000000000001 (cc=2) -+ah 0 + 000000000000FFFF + 00000000FFFFFFFF = 000000000000FFFF (cc=2) -+ah 0 + 0000000000007FFF + 00000000FFFFFFFF = 0000000000007FFF (cc=2) -+ah 0 + 0000000000008000 + 00000000FFFFFFFF = 0000000000008000 (cc=2) -+ah 0 + 00000000FFFFFFFF + 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+ah 0 + 0000000080000000 + 00000000FFFFFFFF = 0000000080000000 (cc=1) -+ah 0 + 000000007FFFFFFF + 00000000FFFFFFFF = 000000007FFFFFFF (cc=2) -+ah 0 + FFFFFFFFFFFFFFFF + 00000000FFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+ah 0 + 8000000000000000 + 00000000FFFFFFFF = 8000000000000000 (cc=0) -+ah 0 + 7FFFFFFFFFFFFFFF + 00000000FFFFFFFF = 7FFFFFFFFFFFFFFF (cc=1) -+ag 0 + 0000000000000000 + 00000000FFFFFFFF = 00000000FFFFFFFF (cc=2) -+ag 0 + 0000000000000001 + 00000000FFFFFFFF = 0000000100000000 (cc=2) -+ag 0 + 000000000000FFFF + 00000000FFFFFFFF = 000000010000FFFE (cc=2) -+ag 0 + 0000000000007FFF + 00000000FFFFFFFF = 0000000100007FFE (cc=2) -+ag 0 + 0000000000008000 + 00000000FFFFFFFF = 0000000100007FFF (cc=2) -+ag 0 + 00000000FFFFFFFF + 00000000FFFFFFFF = 00000001FFFFFFFE (cc=2) -+ag 0 + 0000000080000000 + 00000000FFFFFFFF = 000000017FFFFFFF (cc=2) -+ag 0 + 000000007FFFFFFF + 00000000FFFFFFFF = 000000017FFFFFFE (cc=2) -+ag 0 + FFFFFFFFFFFFFFFF + 00000000FFFFFFFF = 00000000FFFFFFFE (cc=2) -+ag 0 + 8000000000000000 + 00000000FFFFFFFF = 80000000FFFFFFFF (cc=1) -+ag 0 + 7FFFFFFFFFFFFFFF + 00000000FFFFFFFF = 80000000FFFFFFFE (cc=3) -+agf 0 + 0000000000000000 + 00000000FFFFFFFF = 0000000000000000 (cc=0) -+agf 0 + 0000000000000001 + 00000000FFFFFFFF = 0000000000000001 (cc=2) -+agf 0 + 000000000000FFFF + 00000000FFFFFFFF = 000000000000FFFF (cc=2) -+agf 0 + 0000000000007FFF + 00000000FFFFFFFF = 0000000000007FFF (cc=2) -+agf 0 + 0000000000008000 + 00000000FFFFFFFF = 0000000000008000 (cc=2) -+agf 0 + 00000000FFFFFFFF + 00000000FFFFFFFF = 00000000FFFFFFFF (cc=2) -+agf 0 + 0000000080000000 + 00000000FFFFFFFF = 0000000080000000 (cc=2) -+agf 0 + 000000007FFFFFFF + 00000000FFFFFFFF = 000000007FFFFFFF (cc=2) -+agf 0 + FFFFFFFFFFFFFFFF + 00000000FFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + 8000000000000000 + 00000000FFFFFFFF = 8000000000000000 (cc=1) -+agf 0 + 7FFFFFFFFFFFFFFF + 00000000FFFFFFFF = 7FFFFFFFFFFFFFFF (cc=2) -+al 0 + 0000000000000000 + 00000000FFFFFFFF = 0000000000000000 (cc=0) -+al 0 + 0000000000000001 + 00000000FFFFFFFF = 0000000000000001 (cc=1) -+al 0 + 000000000000FFFF + 00000000FFFFFFFF = 000000000000FFFF (cc=1) -+al 0 + 0000000000007FFF + 00000000FFFFFFFF = 0000000000007FFF (cc=1) -+al 0 + 0000000000008000 + 00000000FFFFFFFF = 0000000000008000 (cc=1) -+al 0 + 00000000FFFFFFFF + 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+al 0 + 0000000080000000 + 00000000FFFFFFFF = 0000000080000000 (cc=1) -+al 0 + 000000007FFFFFFF + 00000000FFFFFFFF = 000000007FFFFFFF (cc=1) -+al 0 + FFFFFFFFFFFFFFFF + 00000000FFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+al 0 + 8000000000000000 + 00000000FFFFFFFF = 8000000000000000 (cc=0) -+al 0 + 7FFFFFFFFFFFFFFF + 00000000FFFFFFFF = 7FFFFFFFFFFFFFFF (cc=1) -+alg 0 + 0000000000000000 + 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+alg 0 + 0000000000000001 + 00000000FFFFFFFF = 0000000100000000 (cc=1) -+alg 0 + 000000000000FFFF + 00000000FFFFFFFF = 000000010000FFFE (cc=1) -+alg 0 + 0000000000007FFF + 00000000FFFFFFFF = 0000000100007FFE (cc=1) -+alg 0 + 0000000000008000 + 00000000FFFFFFFF = 0000000100007FFF (cc=1) -+alg 0 + 00000000FFFFFFFF + 00000000FFFFFFFF = 00000001FFFFFFFE (cc=1) -+alg 0 + 0000000080000000 + 00000000FFFFFFFF = 000000017FFFFFFF (cc=1) -+alg 0 + 000000007FFFFFFF + 00000000FFFFFFFF = 000000017FFFFFFE (cc=1) -+alg 0 + FFFFFFFFFFFFFFFF + 00000000FFFFFFFF = 00000000FFFFFFFE (cc=3) -+alg 0 + 8000000000000000 + 00000000FFFFFFFF = 80000000FFFFFFFF (cc=1) -+alg 0 + 7FFFFFFFFFFFFFFF + 00000000FFFFFFFF = 80000000FFFFFFFE (cc=1) -+agf 0 + 0000000000000000 + 00000000FFFFFFFF = 0000000000000000 (cc=0) -+agf 0 + 0000000000000001 + 00000000FFFFFFFF = 0000000000000001 (cc=2) -+agf 0 + 000000000000FFFF + 00000000FFFFFFFF = 000000000000FFFF (cc=2) -+agf 0 + 0000000000007FFF + 00000000FFFFFFFF = 0000000000007FFF (cc=2) -+agf 0 + 0000000000008000 + 00000000FFFFFFFF = 0000000000008000 (cc=2) -+agf 0 + 00000000FFFFFFFF + 00000000FFFFFFFF = 00000000FFFFFFFF (cc=2) -+agf 0 + 0000000080000000 + 00000000FFFFFFFF = 0000000080000000 (cc=2) -+agf 0 + 000000007FFFFFFF + 00000000FFFFFFFF = 000000007FFFFFFF (cc=2) -+agf 0 + FFFFFFFFFFFFFFFF + 00000000FFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + 8000000000000000 + 00000000FFFFFFFF = 8000000000000000 (cc=1) -+agf 0 + 7FFFFFFFFFFFFFFF + 00000000FFFFFFFF = 7FFFFFFFFFFFFFFF (cc=2) -+algf 0 + 0000000000000000 + 00000000FFFFFFFF = 0000000000000000 (cc=0) -+algf 0 + 0000000000000001 + 00000000FFFFFFFF = 0000000000000001 (cc=1) -+algf 0 + 000000000000FFFF + 00000000FFFFFFFF = 000000000000FFFF (cc=1) -+algf 0 + 0000000000007FFF + 00000000FFFFFFFF = 0000000000007FFF (cc=1) -+algf 0 + 0000000000008000 + 00000000FFFFFFFF = 0000000000008000 (cc=1) -+algf 0 + 00000000FFFFFFFF + 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+algf 0 + 0000000080000000 + 00000000FFFFFFFF = 0000000080000000 (cc=1) -+algf 0 + 000000007FFFFFFF + 00000000FFFFFFFF = 000000007FFFFFFF (cc=1) -+algf 0 + FFFFFFFFFFFFFFFF + 00000000FFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+algf 0 + 8000000000000000 + 00000000FFFFFFFF = 8000000000000000 (cc=1) -+algf 0 + 7FFFFFFFFFFFFFFF + 00000000FFFFFFFF = 7FFFFFFFFFFFFFFF (cc=1) -+ar 0 + 0000000000000000 + 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+ar 0 + 0000000000000001 + 00000000FFFFFFFF = 0000000000000000 (cc=0) -+ar 0 + 000000000000FFFF + 00000000FFFFFFFF = 000000000000FFFE (cc=2) -+ar 0 + 0000000000007FFF + 00000000FFFFFFFF = 0000000000007FFE (cc=2) -+ar 0 + 0000000000008000 + 00000000FFFFFFFF = 0000000000007FFF (cc=2) -+ar 0 + 00000000FFFFFFFF + 00000000FFFFFFFF = 00000000FFFFFFFE (cc=1) -+ar 0 + 0000000080000000 + 00000000FFFFFFFF = 000000007FFFFFFF (cc=3) -+ar 0 + 000000007FFFFFFF + 00000000FFFFFFFF = 000000007FFFFFFE (cc=2) -+ar 0 + FFFFFFFFFFFFFFFF + 00000000FFFFFFFF = FFFFFFFFFFFFFFFE (cc=1) -+ar 0 + 8000000000000000 + 00000000FFFFFFFF = 80000000FFFFFFFF (cc=1) -+ar 0 + 7FFFFFFFFFFFFFFF + 00000000FFFFFFFF = 7FFFFFFFFFFFFFFE (cc=1) -+agr 0 + 0000000000000000 + 00000000FFFFFFFF = 00000000FFFFFFFF (cc=2) -+agr 0 + 0000000000000001 + 00000000FFFFFFFF = 0000000100000000 (cc=2) -+agr 0 + 000000000000FFFF + 00000000FFFFFFFF = 000000010000FFFE (cc=2) -+agr 0 + 0000000000007FFF + 00000000FFFFFFFF = 0000000100007FFE (cc=2) -+agr 0 + 0000000000008000 + 00000000FFFFFFFF = 0000000100007FFF (cc=2) -+agr 0 + 00000000FFFFFFFF + 00000000FFFFFFFF = 00000001FFFFFFFE (cc=2) -+agr 0 + 0000000080000000 + 00000000FFFFFFFF = 000000017FFFFFFF (cc=2) -+agr 0 + 000000007FFFFFFF + 00000000FFFFFFFF = 000000017FFFFFFE (cc=2) -+agr 0 + FFFFFFFFFFFFFFFF + 00000000FFFFFFFF = 00000000FFFFFFFE (cc=2) -+agr 0 + 8000000000000000 + 00000000FFFFFFFF = 80000000FFFFFFFF (cc=1) -+agr 0 + 7FFFFFFFFFFFFFFF + 00000000FFFFFFFF = 80000000FFFFFFFE (cc=3) -+agfr 0 + 0000000000000000 + 00000000FFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+agfr 0 + 0000000000000001 + 00000000FFFFFFFF = 0000000000000000 (cc=0) -+agfr 0 + 000000000000FFFF + 00000000FFFFFFFF = 000000000000FFFE (cc=2) -+agfr 0 + 0000000000007FFF + 00000000FFFFFFFF = 0000000000007FFE (cc=2) -+agfr 0 + 0000000000008000 + 00000000FFFFFFFF = 0000000000007FFF (cc=2) -+agfr 0 + 00000000FFFFFFFF + 00000000FFFFFFFF = 00000000FFFFFFFE (cc=2) -+agfr 0 + 0000000080000000 + 00000000FFFFFFFF = 000000007FFFFFFF (cc=2) -+agfr 0 + 000000007FFFFFFF + 00000000FFFFFFFF = 000000007FFFFFFE (cc=2) -+agfr 0 + FFFFFFFFFFFFFFFF + 00000000FFFFFFFF = FFFFFFFFFFFFFFFE (cc=1) -+agfr 0 + 8000000000000000 + 00000000FFFFFFFF = 7FFFFFFFFFFFFFFF (cc=3) -+agfr 0 + 7FFFFFFFFFFFFFFF + 00000000FFFFFFFF = 7FFFFFFFFFFFFFFE (cc=2) -+alr 0 + 0000000000000000 + 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+alr 0 + 0000000000000001 + 00000000FFFFFFFF = 0000000000000000 (cc=2) -+alr 0 + 000000000000FFFF + 00000000FFFFFFFF = 000000000000FFFE (cc=3) -+alr 0 + 0000000000007FFF + 00000000FFFFFFFF = 0000000000007FFE (cc=3) -+alr 0 + 0000000000008000 + 00000000FFFFFFFF = 0000000000007FFF (cc=3) -+alr 0 + 00000000FFFFFFFF + 00000000FFFFFFFF = 00000000FFFFFFFE (cc=3) -+alr 0 + 0000000080000000 + 00000000FFFFFFFF = 000000007FFFFFFF (cc=3) -+alr 0 + 000000007FFFFFFF + 00000000FFFFFFFF = 000000007FFFFFFE (cc=3) -+alr 0 + FFFFFFFFFFFFFFFF + 00000000FFFFFFFF = FFFFFFFFFFFFFFFE (cc=3) -+alr 0 + 8000000000000000 + 00000000FFFFFFFF = 80000000FFFFFFFF (cc=1) -+alr 0 + 7FFFFFFFFFFFFFFF + 00000000FFFFFFFF = 7FFFFFFFFFFFFFFE (cc=3) -+algr 0 + 0000000000000000 + 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+algr 0 + 0000000000000001 + 00000000FFFFFFFF = 0000000100000000 (cc=1) -+algr 0 + 000000000000FFFF + 00000000FFFFFFFF = 000000010000FFFE (cc=1) -+algr 0 + 0000000000007FFF + 00000000FFFFFFFF = 0000000100007FFE (cc=1) -+algr 0 + 0000000000008000 + 00000000FFFFFFFF = 0000000100007FFF (cc=1) -+algr 0 + 00000000FFFFFFFF + 00000000FFFFFFFF = 00000001FFFFFFFE (cc=1) -+algr 0 + 0000000080000000 + 00000000FFFFFFFF = 000000017FFFFFFF (cc=1) -+algr 0 + 000000007FFFFFFF + 00000000FFFFFFFF = 000000017FFFFFFE (cc=1) -+algr 0 + FFFFFFFFFFFFFFFF + 00000000FFFFFFFF = 00000000FFFFFFFE (cc=3) -+algr 0 + 8000000000000000 + 00000000FFFFFFFF = 80000000FFFFFFFF (cc=1) -+algr 0 + 7FFFFFFFFFFFFFFF + 00000000FFFFFFFF = 80000000FFFFFFFE (cc=1) -+algfr 0 + 0000000000000000 + 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+algfr 0 + 0000000000000001 + 00000000FFFFFFFF = 0000000100000000 (cc=1) -+algfr 0 + 000000000000FFFF + 00000000FFFFFFFF = 000000010000FFFE (cc=1) -+algfr 0 + 0000000000007FFF + 00000000FFFFFFFF = 0000000100007FFE (cc=1) -+algfr 0 + 0000000000008000 + 00000000FFFFFFFF = 0000000100007FFF (cc=1) -+algfr 0 + 00000000FFFFFFFF + 00000000FFFFFFFF = 00000001FFFFFFFE (cc=1) -+algfr 0 + 0000000080000000 + 00000000FFFFFFFF = 000000017FFFFFFF (cc=1) -+algfr 0 + 000000007FFFFFFF + 00000000FFFFFFFF = 000000017FFFFFFE (cc=1) -+algfr 0 + FFFFFFFFFFFFFFFF + 00000000FFFFFFFF = 00000000FFFFFFFE (cc=3) -+algfr 0 + 8000000000000000 + 00000000FFFFFFFF = 80000000FFFFFFFF (cc=1) -+algfr 0 + 7FFFFFFFFFFFFFFF + 00000000FFFFFFFF = 80000000FFFFFFFE (cc=1) -+alc 0 + 0000000000000000 + 00000000FFFFFFFF = 0000000000000000 (cc=0) -+alc 0 + 0000000000000001 + 00000000FFFFFFFF = 0000000000000001 (cc=1) -+alc 0 + 000000000000FFFF + 00000000FFFFFFFF = 000000000000FFFF (cc=1) -+alc 0 + 0000000000007FFF + 00000000FFFFFFFF = 0000000000007FFF (cc=1) -+alc 0 + 0000000000008000 + 00000000FFFFFFFF = 0000000000008000 (cc=1) -+alc 0 + 00000000FFFFFFFF + 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+alc 0 + 0000000080000000 + 00000000FFFFFFFF = 0000000080000000 (cc=1) -+alc 0 + 000000007FFFFFFF + 00000000FFFFFFFF = 000000007FFFFFFF (cc=1) -+alc 0 + FFFFFFFFFFFFFFFF + 00000000FFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+alc 0 + 8000000000000000 + 00000000FFFFFFFF = 8000000000000000 (cc=0) -+alc 0 + 7FFFFFFFFFFFFFFF + 00000000FFFFFFFF = 7FFFFFFFFFFFFFFF (cc=1) -+alcg 0 + 0000000000000000 + 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+alcg 0 + 0000000000000001 + 00000000FFFFFFFF = 0000000100000000 (cc=1) -+alcg 0 + 000000000000FFFF + 00000000FFFFFFFF = 000000010000FFFE (cc=1) -+alcg 0 + 0000000000007FFF + 00000000FFFFFFFF = 0000000100007FFE (cc=1) -+alcg 0 + 0000000000008000 + 00000000FFFFFFFF = 0000000100007FFF (cc=1) -+alcg 0 + 00000000FFFFFFFF + 00000000FFFFFFFF = 00000001FFFFFFFE (cc=1) -+alcg 0 + 0000000080000000 + 00000000FFFFFFFF = 000000017FFFFFFF (cc=1) -+alcg 0 + 000000007FFFFFFF + 00000000FFFFFFFF = 000000017FFFFFFE (cc=1) -+alcg 0 + FFFFFFFFFFFFFFFF + 00000000FFFFFFFF = 00000000FFFFFFFE (cc=3) -+alcg 0 + 8000000000000000 + 00000000FFFFFFFF = 80000000FFFFFFFF (cc=1) -+alcg 0 + 7FFFFFFFFFFFFFFF + 00000000FFFFFFFF = 80000000FFFFFFFE (cc=1) -+alcr 0 + 0000000000000000 + 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+alcr 0 + 0000000000000001 + 00000000FFFFFFFF = 0000000000000000 (cc=2) -+alcr 0 + 000000000000FFFF + 00000000FFFFFFFF = 000000000000FFFE (cc=3) -+alcr 0 + 0000000000007FFF + 00000000FFFFFFFF = 0000000000007FFE (cc=3) -+alcr 0 + 0000000000008000 + 00000000FFFFFFFF = 0000000000007FFF (cc=3) -+alcr 0 + 00000000FFFFFFFF + 00000000FFFFFFFF = 00000000FFFFFFFE (cc=3) -+alcr 0 + 0000000080000000 + 00000000FFFFFFFF = 000000007FFFFFFF (cc=3) -+alcr 0 + 000000007FFFFFFF + 00000000FFFFFFFF = 000000007FFFFFFE (cc=3) -+alcr 0 + FFFFFFFFFFFFFFFF + 00000000FFFFFFFF = FFFFFFFFFFFFFFFE (cc=3) -+alcr 0 + 8000000000000000 + 00000000FFFFFFFF = 80000000FFFFFFFF (cc=1) -+alcr 0 + 7FFFFFFFFFFFFFFF + 00000000FFFFFFFF = 7FFFFFFFFFFFFFFE (cc=3) -+alcgr 0 + 0000000000000000 + 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+alcgr 0 + 0000000000000001 + 00000000FFFFFFFF = 0000000100000000 (cc=1) -+alcgr 0 + 000000000000FFFF + 00000000FFFFFFFF = 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(cc=1) -+alcg 1 + FFFFFFFFFFFFFFFF + 00000000FFFFFFFF = 00000000FFFFFFFF (cc=3) -+alcg 1 + 8000000000000000 + 00000000FFFFFFFF = 8000000100000000 (cc=1) -+alcg 1 + 7FFFFFFFFFFFFFFF + 00000000FFFFFFFF = 80000000FFFFFFFF (cc=1) -+alcr 1 + 0000000000000000 + 00000000FFFFFFFF = 0000000000000000 (cc=2) -+alcr 1 + 0000000000000001 + 00000000FFFFFFFF = 0000000000000001 (cc=3) -+alcr 1 + 000000000000FFFF + 00000000FFFFFFFF = 000000000000FFFF (cc=3) -+alcr 1 + 0000000000007FFF + 00000000FFFFFFFF = 0000000000007FFF (cc=3) -+alcr 1 + 0000000000008000 + 00000000FFFFFFFF = 0000000000008000 (cc=3) -+alcr 1 + 00000000FFFFFFFF + 00000000FFFFFFFF = 00000000FFFFFFFF (cc=3) -+alcr 1 + 0000000080000000 + 00000000FFFFFFFF = 0000000080000000 (cc=3) -+alcr 1 + 000000007FFFFFFF + 00000000FFFFFFFF = 000000007FFFFFFF (cc=3) -+alcr 1 + FFFFFFFFFFFFFFFF + 00000000FFFFFFFF = FFFFFFFFFFFFFFFF (cc=3) -+alcr 1 + 8000000000000000 + 00000000FFFFFFFF = 8000000000000000 (cc=2) -+alcr 1 + 7FFFFFFFFFFFFFFF + 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7FFFFFFFFFFFFFFF (cc=1) -+ah 0 + 0000000000000000 + 000000000000FFFF = 0000000000000000 (cc=0) -+ah 0 + 0000000000000001 + 000000000000FFFF = 0000000000000001 (cc=2) -+ah 0 + 000000000000FFFF + 000000000000FFFF = 000000000000FFFF (cc=2) -+ah 0 + 0000000000007FFF + 000000000000FFFF = 0000000000007FFF (cc=2) -+ah 0 + 0000000000008000 + 000000000000FFFF = 0000000000008000 (cc=2) -+ah 0 + 00000000FFFFFFFF + 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+ah 0 + 0000000080000000 + 000000000000FFFF = 0000000080000000 (cc=1) -+ah 0 + 000000007FFFFFFF + 000000000000FFFF = 000000007FFFFFFF (cc=2) -+ah 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+ah 0 + 8000000000000000 + 000000000000FFFF = 8000000000000000 (cc=0) -+ah 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFFFFFFFFFF (cc=1) -+ag 0 + 0000000000000000 + 000000000000FFFF = 000000000000FFFF (cc=2) -+ag 0 + 0000000000000001 + 000000000000FFFF = 0000000000010000 (cc=2) -+ag 0 + 000000000000FFFF + 000000000000FFFF = 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00000000FFFFFFFF (cc=2) -+agf 0 + 0000000080000000 + 000000000000FFFF = 0000000080000000 (cc=2) -+agf 0 + 000000007FFFFFFF + 000000000000FFFF = 000000007FFFFFFF (cc=2) -+agf 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + 8000000000000000 + 000000000000FFFF = 8000000000000000 (cc=1) -+agf 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFFFFFFFFFF (cc=2) -+al 0 + 0000000000000000 + 000000000000FFFF = 0000000000000000 (cc=0) -+al 0 + 0000000000000001 + 000000000000FFFF = 0000000000000001 (cc=1) -+al 0 + 000000000000FFFF + 000000000000FFFF = 000000000000FFFF (cc=1) -+al 0 + 0000000000007FFF + 000000000000FFFF = 0000000000007FFF (cc=1) -+al 0 + 0000000000008000 + 000000000000FFFF = 0000000000008000 (cc=1) -+al 0 + 00000000FFFFFFFF + 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+al 0 + 0000000080000000 + 000000000000FFFF = 0000000080000000 (cc=1) -+al 0 + 000000007FFFFFFF + 000000000000FFFF = 000000007FFFFFFF (cc=1) -+al 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+al 0 + 8000000000000000 + 000000000000FFFF = 8000000000000000 (cc=0) -+al 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFFFFFFFFFF (cc=1) -+alg 0 + 0000000000000000 + 000000000000FFFF = 000000000000FFFF (cc=1) -+alg 0 + 0000000000000001 + 000000000000FFFF = 0000000000010000 (cc=1) -+alg 0 + 000000000000FFFF + 000000000000FFFF = 000000000001FFFE (cc=1) -+alg 0 + 0000000000007FFF + 000000000000FFFF = 0000000000017FFE (cc=1) -+alg 0 + 0000000000008000 + 000000000000FFFF = 0000000000017FFF (cc=1) -+alg 0 + 00000000FFFFFFFF + 000000000000FFFF = 000000010000FFFE (cc=1) -+alg 0 + 0000000080000000 + 000000000000FFFF = 000000008000FFFF (cc=1) -+alg 0 + 000000007FFFFFFF + 000000000000FFFF = 000000008000FFFE (cc=1) -+alg 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = 000000000000FFFE (cc=3) -+alg 0 + 8000000000000000 + 000000000000FFFF = 800000000000FFFF (cc=1) -+alg 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 800000000000FFFE (cc=1) -+agf 0 + 0000000000000000 + 000000000000FFFF = 0000000000000000 (cc=0) -+agf 0 + 0000000000000001 + 000000000000FFFF = 0000000000000001 (cc=2) -+agf 0 + 000000000000FFFF + 000000000000FFFF = 000000000000FFFF (cc=2) -+agf 0 + 0000000000007FFF + 000000000000FFFF = 0000000000007FFF (cc=2) -+agf 0 + 0000000000008000 + 000000000000FFFF = 0000000000008000 (cc=2) -+agf 0 + 00000000FFFFFFFF + 000000000000FFFF = 00000000FFFFFFFF (cc=2) -+agf 0 + 0000000080000000 + 000000000000FFFF = 0000000080000000 (cc=2) -+agf 0 + 000000007FFFFFFF + 000000000000FFFF = 000000007FFFFFFF (cc=2) -+agf 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + 8000000000000000 + 000000000000FFFF = 8000000000000000 (cc=1) -+agf 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFFFFFFFFFF (cc=2) -+algf 0 + 0000000000000000 + 000000000000FFFF = 0000000000000000 (cc=0) -+algf 0 + 0000000000000001 + 000000000000FFFF = 0000000000000001 (cc=1) -+algf 0 + 000000000000FFFF + 000000000000FFFF = 000000000000FFFF (cc=1) -+algf 0 + 0000000000007FFF + 000000000000FFFF = 0000000000007FFF (cc=1) -+algf 0 + 0000000000008000 + 000000000000FFFF = 0000000000008000 (cc=1) -+algf 0 + 00000000FFFFFFFF + 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+algf 0 + 0000000080000000 + 000000000000FFFF = 0000000080000000 (cc=1) -+algf 0 + 000000007FFFFFFF + 000000000000FFFF = 000000007FFFFFFF (cc=1) -+algf 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+algf 0 + 8000000000000000 + 000000000000FFFF = 8000000000000000 (cc=1) -+algf 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFFFFFFFFFF (cc=1) -+ar 0 + 0000000000000000 + 000000000000FFFF = 000000000000FFFF (cc=2) -+ar 0 + 0000000000000001 + 000000000000FFFF = 0000000000010000 (cc=2) -+ar 0 + 000000000000FFFF + 000000000000FFFF = 000000000001FFFE (cc=2) -+ar 0 + 0000000000007FFF + 000000000000FFFF = 0000000000017FFE (cc=2) -+ar 0 + 0000000000008000 + 000000000000FFFF = 0000000000017FFF (cc=2) -+ar 0 + 00000000FFFFFFFF + 000000000000FFFF = 000000000000FFFE (cc=2) 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= 000000000000FFFF (cc=1) -+alr 0 + 0000000000000001 + 000000000000FFFF = 0000000000010000 (cc=1) -+alr 0 + 000000000000FFFF + 000000000000FFFF = 000000000001FFFE (cc=1) -+alr 0 + 0000000000007FFF + 000000000000FFFF = 0000000000017FFE (cc=1) -+alr 0 + 0000000000008000 + 000000000000FFFF = 0000000000017FFF (cc=1) -+alr 0 + 00000000FFFFFFFF + 000000000000FFFF = 000000000000FFFE (cc=3) -+alr 0 + 0000000080000000 + 000000000000FFFF = 000000008000FFFF (cc=1) -+alr 0 + 000000007FFFFFFF + 000000000000FFFF = 000000008000FFFE (cc=1) -+alr 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFF0000FFFE (cc=3) -+alr 0 + 8000000000000000 + 000000000000FFFF = 800000000000FFFF (cc=1) -+alr 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFF0000FFFE (cc=3) -+algr 0 + 0000000000000000 + 000000000000FFFF = 000000000000FFFF (cc=1) -+algr 0 + 0000000000000001 + 000000000000FFFF = 0000000000010000 (cc=1) -+algr 0 + 000000000000FFFF + 000000000000FFFF = 000000000001FFFE (cc=1) -+algr 0 + 0000000000007FFF + 000000000000FFFF = 0000000000017FFE (cc=1) -+algr 0 + 0000000000008000 + 000000000000FFFF = 0000000000017FFF (cc=1) -+algr 0 + 00000000FFFFFFFF + 000000000000FFFF = 000000010000FFFE (cc=1) -+algr 0 + 0000000080000000 + 000000000000FFFF = 000000008000FFFF (cc=1) -+algr 0 + 000000007FFFFFFF + 000000000000FFFF = 000000008000FFFE (cc=1) -+algr 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = 000000000000FFFE (cc=3) -+algr 0 + 8000000000000000 + 000000000000FFFF = 800000000000FFFF (cc=1) -+algr 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 800000000000FFFE (cc=1) -+algfr 0 + 0000000000000000 + 000000000000FFFF = 000000000000FFFF (cc=1) -+algfr 0 + 0000000000000001 + 000000000000FFFF = 0000000000010000 (cc=1) -+algfr 0 + 000000000000FFFF + 000000000000FFFF = 000000000001FFFE (cc=1) -+algfr 0 + 0000000000007FFF + 000000000000FFFF = 0000000000017FFE (cc=1) -+algfr 0 + 0000000000008000 + 000000000000FFFF = 0000000000017FFF (cc=1) -+algfr 0 + 00000000FFFFFFFF + 000000000000FFFF = 000000010000FFFE (cc=1) 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FFFFFFFFFFFFFFFF (cc=1) -+alc 0 + 8000000000000000 + 000000000000FFFF = 8000000000000000 (cc=0) -+alc 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFFFFFFFFFF (cc=1) -+alcg 0 + 0000000000000000 + 000000000000FFFF = 000000000000FFFF (cc=1) -+alcg 0 + 0000000000000001 + 000000000000FFFF = 0000000000010000 (cc=1) -+alcg 0 + 000000000000FFFF + 000000000000FFFF = 000000000001FFFE (cc=1) -+alcg 0 + 0000000000007FFF + 000000000000FFFF = 0000000000017FFE (cc=1) -+alcg 0 + 0000000000008000 + 000000000000FFFF = 0000000000017FFF (cc=1) -+alcg 0 + 00000000FFFFFFFF + 000000000000FFFF = 000000010000FFFE (cc=1) -+alcg 0 + 0000000080000000 + 000000000000FFFF = 000000008000FFFF (cc=1) -+alcg 0 + 000000007FFFFFFF + 000000000000FFFF = 000000008000FFFE (cc=1) -+alcg 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = 000000000000FFFE (cc=3) -+alcg 0 + 8000000000000000 + 000000000000FFFF = 800000000000FFFF (cc=1) -+alcg 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 800000000000FFFE (cc=1) -+alcr 0 + 0000000000000000 + 000000000000FFFF = 000000000000FFFF (cc=1) -+alcr 0 + 0000000000000001 + 000000000000FFFF = 0000000000010000 (cc=1) -+alcr 0 + 000000000000FFFF + 000000000000FFFF = 000000000001FFFE (cc=1) -+alcr 0 + 0000000000007FFF + 000000000000FFFF = 0000000000017FFE (cc=1) -+alcr 0 + 0000000000008000 + 000000000000FFFF = 0000000000017FFF (cc=1) -+alcr 0 + 00000000FFFFFFFF + 000000000000FFFF = 000000000000FFFE (cc=3) -+alcr 0 + 0000000080000000 + 000000000000FFFF = 000000008000FFFF (cc=1) -+alcr 0 + 000000007FFFFFFF + 000000000000FFFF = 000000008000FFFE (cc=1) -+alcr 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFF0000FFFE (cc=3) -+alcr 0 + 8000000000000000 + 000000000000FFFF = 800000000000FFFF (cc=1) -+alcr 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFF0000FFFE (cc=3) -+alcgr 0 + 0000000000000000 + 000000000000FFFF = 000000000000FFFF (cc=1) -+alcgr 0 + 0000000000000001 + 000000000000FFFF = 0000000000010000 (cc=1) -+alcgr 0 + 000000000000FFFF + 000000000000FFFF = 000000000001FFFE (cc=1) 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0000000000000000 (cc=2) -+alc 1 + 0000000080000000 + 000000000000FFFF = 0000000080000001 (cc=1) -+alc 1 + 000000007FFFFFFF + 000000000000FFFF = 0000000080000000 (cc=1) -+alc 1 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFF00000000 (cc=2) -+alc 1 + 8000000000000000 + 000000000000FFFF = 8000000000000001 (cc=1) -+alc 1 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFF00000000 (cc=2) -+alcg 1 + 0000000000000000 + 000000000000FFFF = 0000000000010000 (cc=1) -+alcg 1 + 0000000000000001 + 000000000000FFFF = 0000000000010001 (cc=1) -+alcg 1 + 000000000000FFFF + 000000000000FFFF = 000000000001FFFF (cc=1) -+alcg 1 + 0000000000007FFF + 000000000000FFFF = 0000000000017FFF (cc=1) -+alcg 1 + 0000000000008000 + 000000000000FFFF = 0000000000018000 (cc=1) -+alcg 1 + 00000000FFFFFFFF + 000000000000FFFF = 000000010000FFFF (cc=1) -+alcg 1 + 0000000080000000 + 000000000000FFFF = 0000000080010000 (cc=1) -+alcg 1 + 000000007FFFFFFF + 000000000000FFFF = 000000008000FFFF (cc=1) -+alcg 1 + FFFFFFFFFFFFFFFF + 000000000000FFFF = 000000000000FFFF (cc=3) -+alcg 1 + 8000000000000000 + 000000000000FFFF = 8000000000010000 (cc=1) -+alcg 1 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 800000000000FFFF (cc=1) -+alcr 1 + 0000000000000000 + 000000000000FFFF = 0000000000010000 (cc=1) -+alcr 1 + 0000000000000001 + 000000000000FFFF = 0000000000010001 (cc=1) -+alcr 1 + 000000000000FFFF + 000000000000FFFF = 000000000001FFFF (cc=1) -+alcr 1 + 0000000000007FFF + 000000000000FFFF = 0000000000017FFF (cc=1) -+alcr 1 + 0000000000008000 + 000000000000FFFF = 0000000000018000 (cc=1) -+alcr 1 + 00000000FFFFFFFF + 000000000000FFFF = 000000000000FFFF (cc=3) -+alcr 1 + 0000000080000000 + 000000000000FFFF = 0000000080010000 (cc=1) -+alcr 1 + 000000007FFFFFFF + 000000000000FFFF = 000000008000FFFF (cc=1) -+alcr 1 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFF0000FFFF (cc=3) -+alcr 1 + 8000000000000000 + 000000000000FFFF = 8000000000010000 (cc=1) -+alcr 1 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFF0000FFFF (cc=3) -+alcgr 1 + 0000000000000000 + 000000000000FFFF = 0000000000010000 (cc=1) -+alcgr 1 + 0000000000000001 + 000000000000FFFF = 0000000000010001 (cc=1) -+alcgr 1 + 000000000000FFFF + 000000000000FFFF = 000000000001FFFF (cc=1) -+alcgr 1 + 0000000000007FFF + 000000000000FFFF = 0000000000017FFF (cc=1) -+alcgr 1 + 0000000000008000 + 000000000000FFFF = 0000000000018000 (cc=1) -+alcgr 1 + 00000000FFFFFFFF + 000000000000FFFF = 000000010000FFFF (cc=1) -+alcgr 1 + 0000000080000000 + 000000000000FFFF = 0000000080010000 (cc=1) -+alcgr 1 + 000000007FFFFFFF + 000000000000FFFF = 000000008000FFFF (cc=1) -+alcgr 1 + FFFFFFFFFFFFFFFF + 000000000000FFFF = 000000000000FFFF (cc=3) -+alcgr 1 + 8000000000000000 + 000000000000FFFF = 8000000000010000 (cc=1) -+alcgr 1 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 800000000000FFFF (cc=1) -+ahy 0 + 0000000000000000 + 000000000000FFFF = 0000000000000000 (cc=0) -+ahy 0 + 0000000000000001 + 000000000000FFFF = 0000000000000001 (cc=2) -+ahy 0 + 000000000000FFFF + 000000000000FFFF = 000000000000FFFF (cc=2) -+ahy 0 + 0000000000007FFF + 000000000000FFFF = 0000000000007FFF (cc=2) -+ahy 0 + 0000000000008000 + 000000000000FFFF = 0000000000008000 (cc=2) -+ahy 0 + 00000000FFFFFFFF + 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+ahy 0 + 0000000080000000 + 000000000000FFFF = 0000000080000000 (cc=1) -+ahy 0 + 000000007FFFFFFF + 000000000000FFFF = 000000007FFFFFFF (cc=2) -+ahy 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+ahy 0 + 8000000000000000 + 000000000000FFFF = 8000000000000000 (cc=0) -+ahy 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFFFFFFFFFF (cc=1) -+ay 0 + 0000000000000000 + 000000000000FFFF = 0000000000000000 (cc=0) -+ay 0 + 0000000000000001 + 000000000000FFFF = 0000000000000001 (cc=2) -+ay 0 + 000000000000FFFF + 000000000000FFFF = 000000000000FFFF (cc=2) -+ay 0 + 0000000000007FFF + 000000000000FFFF = 0000000000007FFF (cc=2) -+ay 0 + 0000000000008000 + 000000000000FFFF = 0000000000008000 (cc=2) -+ay 0 + 00000000FFFFFFFF + 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+ay 0 + 0000000080000000 + 000000000000FFFF = 0000000080000000 (cc=1) -+ay 0 + 000000007FFFFFFF + 000000000000FFFF = 000000007FFFFFFF (cc=2) -+ay 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+ay 0 + 8000000000000000 + 000000000000FFFF = 8000000000000000 (cc=0) -+ay 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFFFFFFFFFF (cc=1) -+aly 0 + 0000000000000000 + 000000000000FFFF = 0000000000000000 (cc=0) -+aly 0 + 0000000000000001 + 000000000000FFFF = 0000000000000001 (cc=1) -+aly 0 + 000000000000FFFF + 000000000000FFFF = 000000000000FFFF (cc=1) -+aly 0 + 0000000000007FFF + 000000000000FFFF = 0000000000007FFF (cc=1) -+aly 0 + 0000000000008000 + 000000000000FFFF = 0000000000008000 (cc=1) -+aly 0 + 00000000FFFFFFFF + 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+aly 0 + 0000000080000000 + 000000000000FFFF = 0000000080000000 (cc=1) -+aly 0 + 000000007FFFFFFF + 000000000000FFFF = 000000007FFFFFFF (cc=1) -+aly 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+aly 0 + 8000000000000000 + 000000000000FFFF = 8000000000000000 (cc=0) -+aly 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFFFFFFFFFF (cc=1) -+a 0 + 0000000000000000 + 0000000000007FFF = 0000000000000000 (cc=0) -+a 0 + 0000000000000001 + 0000000000007FFF = 0000000000000001 (cc=2) -+a 0 + 000000000000FFFF + 0000000000007FFF = 000000000000FFFF (cc=2) -+a 0 + 0000000000007FFF + 0000000000007FFF = 0000000000007FFF (cc=2) -+a 0 + 0000000000008000 + 0000000000007FFF = 0000000000008000 (cc=2) -+a 0 + 00000000FFFFFFFF + 0000000000007FFF = 00000000FFFFFFFF (cc=1) -+a 0 + 0000000080000000 + 0000000000007FFF = 0000000080000000 (cc=1) -+a 0 + 000000007FFFFFFF + 0000000000007FFF = 000000007FFFFFFF (cc=2) -+a 0 + FFFFFFFFFFFFFFFF + 0000000000007FFF = FFFFFFFFFFFFFFFF (cc=1) -+a 0 + 8000000000000000 + 0000000000007FFF = 8000000000000000 (cc=0) -+a 0 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 7FFFFFFFFFFFFFFF (cc=1) -+ah 0 + 0000000000000000 + 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0000000000007FFF = 000000000000FFFE (cc=2) -+ag 0 + 0000000000008000 + 0000000000007FFF = 000000000000FFFF (cc=2) -+ag 0 + 00000000FFFFFFFF + 0000000000007FFF = 0000000100007FFE (cc=2) -+ag 0 + 0000000080000000 + 0000000000007FFF = 0000000080007FFF (cc=2) -+ag 0 + 000000007FFFFFFF + 0000000000007FFF = 0000000080007FFE (cc=2) -+ag 0 + FFFFFFFFFFFFFFFF + 0000000000007FFF = 0000000000007FFE (cc=2) -+ag 0 + 8000000000000000 + 0000000000007FFF = 8000000000007FFF (cc=1) -+ag 0 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 8000000000007FFE (cc=3) -+agf 0 + 0000000000000000 + 0000000000007FFF = 0000000000000000 (cc=0) -+agf 0 + 0000000000000001 + 0000000000007FFF = 0000000000000001 (cc=2) -+agf 0 + 000000000000FFFF + 0000000000007FFF = 000000000000FFFF (cc=2) -+agf 0 + 0000000000007FFF + 0000000000007FFF = 0000000000007FFF (cc=2) -+agf 0 + 0000000000008000 + 0000000000007FFF = 0000000000008000 (cc=2) -+agf 0 + 00000000FFFFFFFF + 0000000000007FFF = 00000000FFFFFFFF (cc=2) -+agf 0 + 0000000080000000 + 0000000000007FFF = 0000000080000000 (cc=2) -+agf 0 + 000000007FFFFFFF + 0000000000007FFF = 000000007FFFFFFF (cc=2) -+agf 0 + FFFFFFFFFFFFFFFF + 0000000000007FFF = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + 8000000000000000 + 0000000000007FFF = 8000000000000000 (cc=1) -+agf 0 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 7FFFFFFFFFFFFFFF (cc=2) -+al 0 + 0000000000000000 + 0000000000007FFF = 0000000000000000 (cc=0) -+al 0 + 0000000000000001 + 0000000000007FFF = 0000000000000001 (cc=1) -+al 0 + 000000000000FFFF + 0000000000007FFF = 000000000000FFFF (cc=1) -+al 0 + 0000000000007FFF + 0000000000007FFF = 0000000000007FFF (cc=1) -+al 0 + 0000000000008000 + 0000000000007FFF = 0000000000008000 (cc=1) -+al 0 + 00000000FFFFFFFF + 0000000000007FFF = 00000000FFFFFFFF (cc=1) -+al 0 + 0000000080000000 + 0000000000007FFF = 0000000080000000 (cc=1) -+al 0 + 000000007FFFFFFF + 0000000000007FFF = 000000007FFFFFFF (cc=1) -+al 0 + FFFFFFFFFFFFFFFF + 0000000000007FFF = FFFFFFFFFFFFFFFF (cc=1) -+al 0 + 8000000000000000 + 0000000000007FFF = 8000000000000000 (cc=0) -+al 0 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 7FFFFFFFFFFFFFFF (cc=1) -+alg 0 + 0000000000000000 + 0000000000007FFF = 0000000000007FFF (cc=1) -+alg 0 + 0000000000000001 + 0000000000007FFF = 0000000000008000 (cc=1) -+alg 0 + 000000000000FFFF + 0000000000007FFF = 0000000000017FFE (cc=1) -+alg 0 + 0000000000007FFF + 0000000000007FFF = 000000000000FFFE (cc=1) -+alg 0 + 0000000000008000 + 0000000000007FFF = 000000000000FFFF (cc=1) -+alg 0 + 00000000FFFFFFFF + 0000000000007FFF = 0000000100007FFE (cc=1) -+alg 0 + 0000000080000000 + 0000000000007FFF = 0000000080007FFF (cc=1) -+alg 0 + 000000007FFFFFFF + 0000000000007FFF = 0000000080007FFE (cc=1) -+alg 0 + FFFFFFFFFFFFFFFF + 0000000000007FFF = 0000000000007FFE (cc=3) -+alg 0 + 8000000000000000 + 0000000000007FFF = 8000000000007FFF (cc=1) -+alg 0 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 8000000000007FFE (cc=1) -+agf 0 + 0000000000000000 + 0000000000007FFF = 0000000000000000 (cc=0) -+agf 0 + 0000000000000001 + 0000000000007FFF = 0000000000000001 (cc=2) -+agf 0 + 000000000000FFFF + 0000000000007FFF = 000000000000FFFF (cc=2) -+agf 0 + 0000000000007FFF + 0000000000007FFF = 0000000000007FFF (cc=2) -+agf 0 + 0000000000008000 + 0000000000007FFF = 0000000000008000 (cc=2) -+agf 0 + 00000000FFFFFFFF + 0000000000007FFF = 00000000FFFFFFFF (cc=2) -+agf 0 + 0000000080000000 + 0000000000007FFF = 0000000080000000 (cc=2) -+agf 0 + 000000007FFFFFFF + 0000000000007FFF = 000000007FFFFFFF (cc=2) -+agf 0 + FFFFFFFFFFFFFFFF + 0000000000007FFF = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + 8000000000000000 + 0000000000007FFF = 8000000000000000 (cc=1) -+agf 0 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 7FFFFFFFFFFFFFFF (cc=2) -+algf 0 + 0000000000000000 + 0000000000007FFF = 0000000000000000 (cc=0) -+algf 0 + 0000000000000001 + 0000000000007FFF = 0000000000000001 (cc=1) -+algf 0 + 000000000000FFFF + 0000000000007FFF = 000000000000FFFF (cc=1) -+algf 0 + 0000000000007FFF + 0000000000007FFF = 0000000000007FFF (cc=1) -+algf 0 + 0000000000008000 + 0000000000007FFF = 0000000000008000 (cc=1) -+algf 0 + 00000000FFFFFFFF + 0000000000007FFF = 00000000FFFFFFFF (cc=1) -+algf 0 + 0000000080000000 + 0000000000007FFF = 0000000080000000 (cc=1) -+algf 0 + 000000007FFFFFFF + 0000000000007FFF = 000000007FFFFFFF (cc=1) -+algf 0 + FFFFFFFFFFFFFFFF + 0000000000007FFF = FFFFFFFFFFFFFFFF (cc=1) -+algf 0 + 8000000000000000 + 0000000000007FFF = 8000000000000000 (cc=1) -+algf 0 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 7FFFFFFFFFFFFFFF (cc=1) -+ar 0 + 0000000000000000 + 0000000000007FFF = 0000000000007FFF (cc=2) -+ar 0 + 0000000000000001 + 0000000000007FFF = 0000000000008000 (cc=2) -+ar 0 + 000000000000FFFF + 0000000000007FFF = 0000000000017FFE (cc=2) -+ar 0 + 0000000000007FFF + 0000000000007FFF = 000000000000FFFE (cc=2) -+ar 0 + 0000000000008000 + 0000000000007FFF = 000000000000FFFF (cc=2) -+ar 0 + 00000000FFFFFFFF + 0000000000007FFF = 0000000000007FFE (cc=2) -+ar 0 + 0000000080000000 + 0000000000007FFF = 0000000080007FFF (cc=1) -+ar 0 + 000000007FFFFFFF + 0000000000007FFF = 0000000080007FFE (cc=3) -+ar 0 + FFFFFFFFFFFFFFFF + 0000000000007FFF = FFFFFFFF00007FFE (cc=2) -+ar 0 + 8000000000000000 + 0000000000007FFF = 8000000000007FFF (cc=2) -+ar 0 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 7FFFFFFF00007FFE (cc=2) -+agr 0 + 0000000000000000 + 0000000000007FFF = 0000000000007FFF (cc=2) -+agr 0 + 0000000000000001 + 0000000000007FFF = 0000000000008000 (cc=2) -+agr 0 + 000000000000FFFF + 0000000000007FFF = 0000000000017FFE (cc=2) -+agr 0 + 0000000000007FFF + 0000000000007FFF = 000000000000FFFE (cc=2) -+agr 0 + 0000000000008000 + 0000000000007FFF = 000000000000FFFF (cc=2) -+agr 0 + 00000000FFFFFFFF + 0000000000007FFF = 0000000100007FFE (cc=2) -+agr 0 + 0000000080000000 + 0000000000007FFF = 0000000080007FFF (cc=2) -+agr 0 + 000000007FFFFFFF + 0000000000007FFF = 0000000080007FFE (cc=2) -+agr 0 + FFFFFFFFFFFFFFFF + 0000000000007FFF = 0000000000007FFE (cc=2) -+agr 0 + 8000000000000000 + 0000000000007FFF = 8000000000007FFF (cc=1) -+agr 0 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 8000000000007FFE (cc=3) -+agfr 0 + 0000000000000000 + 0000000000007FFF = 0000000000007FFF (cc=2) -+agfr 0 + 0000000000000001 + 0000000000007FFF = 0000000000008000 (cc=2) -+agfr 0 + 000000000000FFFF + 0000000000007FFF = 0000000000017FFE (cc=2) -+agfr 0 + 0000000000007FFF + 0000000000007FFF = 000000000000FFFE (cc=2) -+agfr 0 + 0000000000008000 + 0000000000007FFF = 000000000000FFFF (cc=2) -+agfr 0 + 00000000FFFFFFFF + 0000000000007FFF = 0000000100007FFE (cc=2) -+agfr 0 + 0000000080000000 + 0000000000007FFF = 0000000080007FFF (cc=2) -+agfr 0 + 000000007FFFFFFF + 0000000000007FFF = 0000000080007FFE (cc=2) -+agfr 0 + FFFFFFFFFFFFFFFF + 0000000000007FFF = 0000000000007FFE (cc=2) -+agfr 0 + 8000000000000000 + 0000000000007FFF = 8000000000007FFF (cc=1) -+agfr 0 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 8000000000007FFE (cc=3) -+alr 0 + 0000000000000000 + 0000000000007FFF = 0000000000007FFF (cc=1) -+alr 0 + 0000000000000001 + 0000000000007FFF = 0000000000008000 (cc=1) -+alr 0 + 000000000000FFFF + 0000000000007FFF = 0000000000017FFE (cc=1) -+alr 0 + 0000000000007FFF + 0000000000007FFF = 000000000000FFFE (cc=1) -+alr 0 + 0000000000008000 + 0000000000007FFF = 000000000000FFFF (cc=1) -+alr 0 + 00000000FFFFFFFF + 0000000000007FFF = 0000000000007FFE (cc=3) -+alr 0 + 0000000080000000 + 0000000000007FFF = 0000000080007FFF (cc=1) -+alr 0 + 000000007FFFFFFF + 0000000000007FFF = 0000000080007FFE (cc=1) -+alr 0 + FFFFFFFFFFFFFFFF + 0000000000007FFF = FFFFFFFF00007FFE (cc=3) -+alr 0 + 8000000000000000 + 0000000000007FFF = 8000000000007FFF (cc=1) -+alr 0 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 7FFFFFFF00007FFE (cc=3) -+algr 0 + 0000000000000000 + 0000000000007FFF = 0000000000007FFF (cc=1) -+algr 0 + 0000000000000001 + 0000000000007FFF = 0000000000008000 (cc=1) -+algr 0 + 000000000000FFFF + 0000000000007FFF = 0000000000017FFE (cc=1) -+algr 0 + 0000000000007FFF + 0000000000007FFF = 000000000000FFFE (cc=1) -+algr 0 + 0000000000008000 + 0000000000007FFF = 000000000000FFFF (cc=1) -+algr 0 + 00000000FFFFFFFF + 0000000000007FFF = 0000000100007FFE (cc=1) -+algr 0 + 0000000080000000 + 0000000000007FFF = 0000000080007FFF (cc=1) -+algr 0 + 000000007FFFFFFF + 0000000000007FFF = 0000000080007FFE (cc=1) -+algr 0 + FFFFFFFFFFFFFFFF + 0000000000007FFF = 0000000000007FFE (cc=3) -+algr 0 + 8000000000000000 + 0000000000007FFF = 8000000000007FFF (cc=1) -+algr 0 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 8000000000007FFE (cc=1) -+algfr 0 + 0000000000000000 + 0000000000007FFF = 0000000000007FFF (cc=1) -+algfr 0 + 0000000000000001 + 0000000000007FFF = 0000000000008000 (cc=1) -+algfr 0 + 000000000000FFFF + 0000000000007FFF = 0000000000017FFE (cc=1) -+algfr 0 + 0000000000007FFF + 0000000000007FFF = 000000000000FFFE (cc=1) -+algfr 0 + 0000000000008000 + 0000000000007FFF = 000000000000FFFF (cc=1) -+algfr 0 + 00000000FFFFFFFF + 0000000000007FFF = 0000000100007FFE (cc=1) -+algfr 0 + 0000000080000000 + 0000000000007FFF = 0000000080007FFF (cc=1) -+algfr 0 + 000000007FFFFFFF + 0000000000007FFF = 0000000080007FFE (cc=1) -+algfr 0 + FFFFFFFFFFFFFFFF + 0000000000007FFF = 0000000000007FFE (cc=3) -+algfr 0 + 8000000000000000 + 0000000000007FFF = 8000000000007FFF (cc=1) -+algfr 0 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 8000000000007FFE (cc=1) -+alc 0 + 0000000000000000 + 0000000000007FFF = 0000000000000000 (cc=0) -+alc 0 + 0000000000000001 + 0000000000007FFF = 0000000000000001 (cc=1) -+alc 0 + 000000000000FFFF + 0000000000007FFF = 000000000000FFFF (cc=1) -+alc 0 + 0000000000007FFF + 0000000000007FFF = 0000000000007FFF (cc=1) -+alc 0 + 0000000000008000 + 0000000000007FFF = 0000000000008000 (cc=1) -+alc 0 + 00000000FFFFFFFF + 0000000000007FFF = 00000000FFFFFFFF (cc=1) -+alc 0 + 0000000080000000 + 0000000000007FFF = 0000000080000000 (cc=1) -+alc 0 + 000000007FFFFFFF + 0000000000007FFF = 000000007FFFFFFF (cc=1) -+alc 0 + FFFFFFFFFFFFFFFF + 0000000000007FFF = FFFFFFFFFFFFFFFF (cc=1) -+alc 0 + 8000000000000000 + 0000000000007FFF = 8000000000000000 (cc=0) -+alc 0 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 7FFFFFFFFFFFFFFF (cc=1) -+alcg 0 + 0000000000000000 + 0000000000007FFF = 0000000000007FFF (cc=1) -+alcg 0 + 0000000000000001 + 0000000000007FFF = 0000000000008000 (cc=1) -+alcg 0 + 000000000000FFFF + 0000000000007FFF = 0000000000017FFE (cc=1) -+alcg 0 + 0000000000007FFF + 0000000000007FFF = 000000000000FFFE (cc=1) -+alcg 0 + 0000000000008000 + 0000000000007FFF = 000000000000FFFF (cc=1) -+alcg 0 + 00000000FFFFFFFF + 0000000000007FFF = 0000000100007FFE (cc=1) -+alcg 0 + 0000000080000000 + 0000000000007FFF = 0000000080007FFF (cc=1) -+alcg 0 + 000000007FFFFFFF + 0000000000007FFF = 0000000080007FFE (cc=1) -+alcg 0 + FFFFFFFFFFFFFFFF + 0000000000007FFF = 0000000000007FFE (cc=3) -+alcg 0 + 8000000000000000 + 0000000000007FFF = 8000000000007FFF (cc=1) -+alcg 0 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 8000000000007FFE (cc=1) -+alcr 0 + 0000000000000000 + 0000000000007FFF = 0000000000007FFF (cc=1) -+alcr 0 + 0000000000000001 + 0000000000007FFF = 0000000000008000 (cc=1) -+alcr 0 + 000000000000FFFF + 0000000000007FFF = 0000000000017FFE (cc=1) -+alcr 0 + 0000000000007FFF + 0000000000007FFF = 000000000000FFFE (cc=1) -+alcr 0 + 0000000000008000 + 0000000000007FFF = 000000000000FFFF (cc=1) -+alcr 0 + 00000000FFFFFFFF + 0000000000007FFF = 0000000000007FFE (cc=3) -+alcr 0 + 0000000080000000 + 0000000000007FFF = 0000000080007FFF (cc=1) -+alcr 0 + 000000007FFFFFFF + 0000000000007FFF = 0000000080007FFE (cc=1) -+alcr 0 + FFFFFFFFFFFFFFFF + 0000000000007FFF = FFFFFFFF00007FFE (cc=3) -+alcr 0 + 8000000000000000 + 0000000000007FFF = 8000000000007FFF (cc=1) -+alcr 0 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 7FFFFFFF00007FFE (cc=3) -+alcgr 0 + 0000000000000000 + 0000000000007FFF = 0000000000007FFF (cc=1) -+alcgr 0 + 0000000000000001 + 0000000000007FFF = 0000000000008000 (cc=1) -+alcgr 0 + 000000000000FFFF + 0000000000007FFF = 0000000000017FFE (cc=1) -+alcgr 0 + 0000000000007FFF + 0000000000007FFF = 000000000000FFFE (cc=1) -+alcgr 0 + 0000000000008000 + 0000000000007FFF = 000000000000FFFF (cc=1) -+alcgr 0 + 00000000FFFFFFFF + 0000000000007FFF = 0000000100007FFE (cc=1) -+alcgr 0 + 0000000080000000 + 0000000000007FFF = 0000000080007FFF (cc=1) -+alcgr 0 + 000000007FFFFFFF + 0000000000007FFF = 0000000080007FFE (cc=1) -+alcgr 0 + FFFFFFFFFFFFFFFF + 0000000000007FFF = 0000000000007FFE (cc=3) -+alcgr 0 + 8000000000000000 + 0000000000007FFF = 8000000000007FFF (cc=1) -+alcgr 0 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 8000000000007FFE (cc=1) -+alc 1 + 0000000000000000 + 0000000000007FFF = 0000000000000001 (cc=1) -+alc 1 + 0000000000000001 + 0000000000007FFF = 0000000000000002 (cc=1) -+alc 1 + 000000000000FFFF + 0000000000007FFF = 0000000000010000 (cc=1) -+alc 1 + 0000000000007FFF + 0000000000007FFF = 0000000000008000 (cc=1) -+alc 1 + 0000000000008000 + 0000000000007FFF = 0000000000008001 (cc=1) -+alc 1 + 00000000FFFFFFFF + 0000000000007FFF = 0000000000000000 (cc=2) -+alc 1 + 0000000080000000 + 0000000000007FFF = 0000000080000001 (cc=1) -+alc 1 + 000000007FFFFFFF + 0000000000007FFF = 0000000080000000 (cc=1) -+alc 1 + FFFFFFFFFFFFFFFF + 0000000000007FFF = FFFFFFFF00000000 (cc=2) -+alc 1 + 8000000000000000 + 0000000000007FFF = 8000000000000001 (cc=1) -+alc 1 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 7FFFFFFF00000000 (cc=2) -+alcg 1 + 0000000000000000 + 0000000000007FFF = 0000000000008000 (cc=1) -+alcg 1 + 0000000000000001 + 0000000000007FFF = 0000000000008001 (cc=1) -+alcg 1 + 000000000000FFFF + 0000000000007FFF = 0000000000017FFF (cc=1) -+alcg 1 + 0000000000007FFF + 0000000000007FFF = 000000000000FFFF (cc=1) -+alcg 1 + 0000000000008000 + 0000000000007FFF = 0000000000010000 (cc=1) -+alcg 1 + 00000000FFFFFFFF + 0000000000007FFF = 0000000100007FFF (cc=1) -+alcg 1 + 0000000080000000 + 0000000000007FFF = 0000000080008000 (cc=1) -+alcg 1 + 000000007FFFFFFF + 0000000000007FFF = 0000000080007FFF (cc=1) -+alcg 1 + FFFFFFFFFFFFFFFF + 0000000000007FFF = 0000000000007FFF (cc=3) -+alcg 1 + 8000000000000000 + 0000000000007FFF = 8000000000008000 (cc=1) -+alcg 1 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 8000000000007FFF (cc=1) -+alcr 1 + 0000000000000000 + 0000000000007FFF = 0000000000008000 (cc=1) -+alcr 1 + 0000000000000001 + 0000000000007FFF = 0000000000008001 (cc=1) -+alcr 1 + 000000000000FFFF + 0000000000007FFF = 0000000000017FFF (cc=1) -+alcr 1 + 0000000000007FFF + 0000000000007FFF = 000000000000FFFF (cc=1) -+alcr 1 + 0000000000008000 + 0000000000007FFF = 0000000000010000 (cc=1) -+alcr 1 + 00000000FFFFFFFF + 0000000000007FFF = 0000000000007FFF (cc=3) -+alcr 1 + 0000000080000000 + 0000000000007FFF = 0000000080008000 (cc=1) -+alcr 1 + 000000007FFFFFFF + 0000000000007FFF = 0000000080007FFF (cc=1) -+alcr 1 + FFFFFFFFFFFFFFFF + 0000000000007FFF = FFFFFFFF00007FFF (cc=3) -+alcr 1 + 8000000000000000 + 0000000000007FFF = 8000000000008000 (cc=1) -+alcr 1 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 7FFFFFFF00007FFF (cc=3) -+alcgr 1 + 0000000000000000 + 0000000000007FFF = 0000000000008000 (cc=1) -+alcgr 1 + 0000000000000001 + 0000000000007FFF = 0000000000008001 (cc=1) -+alcgr 1 + 000000000000FFFF + 0000000000007FFF = 0000000000017FFF (cc=1) -+alcgr 1 + 0000000000007FFF + 0000000000007FFF = 000000000000FFFF (cc=1) -+alcgr 1 + 0000000000008000 + 0000000000007FFF = 0000000000010000 (cc=1) -+alcgr 1 + 00000000FFFFFFFF + 0000000000007FFF = 0000000100007FFF (cc=1) -+alcgr 1 + 0000000080000000 + 0000000000007FFF = 0000000080008000 (cc=1) -+alcgr 1 + 000000007FFFFFFF + 0000000000007FFF = 0000000080007FFF (cc=1) -+alcgr 1 + FFFFFFFFFFFFFFFF + 0000000000007FFF = 0000000000007FFF (cc=3) -+alcgr 1 + 8000000000000000 + 0000000000007FFF = 8000000000008000 (cc=1) -+alcgr 1 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 8000000000007FFF (cc=1) -+ahy 0 + 0000000000000000 + 0000000000007FFF = 0000000000000000 (cc=0) -+ahy 0 + 0000000000000001 + 0000000000007FFF = 0000000000000001 (cc=2) -+ahy 0 + 000000000000FFFF + 0000000000007FFF = 000000000000FFFF (cc=2) -+ahy 0 + 0000000000007FFF + 0000000000007FFF = 0000000000007FFF (cc=2) -+ahy 0 + 0000000000008000 + 0000000000007FFF = 0000000000008000 (cc=2) -+ahy 0 + 00000000FFFFFFFF + 0000000000007FFF = 00000000FFFFFFFF (cc=1) -+ahy 0 + 0000000080000000 + 0000000000007FFF = 0000000080000000 (cc=1) -+ahy 0 + 000000007FFFFFFF + 0000000000007FFF = 000000007FFFFFFF (cc=2) -+ahy 0 + FFFFFFFFFFFFFFFF + 0000000000007FFF = FFFFFFFFFFFFFFFF (cc=1) -+ahy 0 + 8000000000000000 + 0000000000007FFF = 8000000000000000 (cc=0) -+ahy 0 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 7FFFFFFFFFFFFFFF (cc=1) -+ay 0 + 0000000000000000 + 0000000000007FFF = 0000000000000000 (cc=0) -+ay 0 + 0000000000000001 + 0000000000007FFF = 0000000000000001 (cc=2) -+ay 0 + 000000000000FFFF + 0000000000007FFF = 000000000000FFFF (cc=2) -+ay 0 + 0000000000007FFF + 0000000000007FFF = 0000000000007FFF (cc=2) -+ay 0 + 0000000000008000 + 0000000000007FFF = 0000000000008000 (cc=2) -+ay 0 + 00000000FFFFFFFF + 0000000000007FFF = 00000000FFFFFFFF (cc=1) -+ay 0 + 0000000080000000 + 0000000000007FFF = 0000000080000000 (cc=1) -+ay 0 + 000000007FFFFFFF + 0000000000007FFF = 000000007FFFFFFF (cc=2) -+ay 0 + FFFFFFFFFFFFFFFF + 0000000000007FFF = FFFFFFFFFFFFFFFF (cc=1) -+ay 0 + 8000000000000000 + 0000000000007FFF = 8000000000000000 (cc=0) -+ay 0 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 7FFFFFFFFFFFFFFF (cc=1) -+aly 0 + 0000000000000000 + 0000000000007FFF = 0000000000000000 (cc=0) -+aly 0 + 0000000000000001 + 0000000000007FFF = 0000000000000001 (cc=1) -+aly 0 + 000000000000FFFF + 0000000000007FFF = 000000000000FFFF (cc=1) -+aly 0 + 0000000000007FFF + 0000000000007FFF = 0000000000007FFF (cc=1) -+aly 0 + 0000000000008000 + 0000000000007FFF = 0000000000008000 (cc=1) -+aly 0 + 00000000FFFFFFFF + 0000000000007FFF = 00000000FFFFFFFF (cc=1) -+aly 0 + 0000000080000000 + 0000000000007FFF = 0000000080000000 (cc=1) -+aly 0 + 000000007FFFFFFF + 0000000000007FFF = 000000007FFFFFFF (cc=1) -+aly 0 + FFFFFFFFFFFFFFFF + 0000000000007FFF = FFFFFFFFFFFFFFFF (cc=1) -+aly 0 + 8000000000000000 + 0000000000007FFF = 8000000000000000 (cc=0) -+aly 0 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 7FFFFFFFFFFFFFFF (cc=1) -+a 0 + 0000000000000000 + 0000000000008000 = 0000000000000000 (cc=0) -+a 0 + 0000000000000001 + 0000000000008000 = 0000000000000001 (cc=2) -+a 0 + 000000000000FFFF + 0000000000008000 = 000000000000FFFF (cc=2) -+a 0 + 0000000000007FFF + 0000000000008000 = 0000000000007FFF (cc=2) -+a 0 + 0000000000008000 + 0000000000008000 = 0000000000008000 (cc=2) -+a 0 + 00000000FFFFFFFF + 0000000000008000 = 00000000FFFFFFFF (cc=1) -+a 0 + 0000000080000000 + 0000000000008000 = 0000000080000000 (cc=1) -+a 0 + 000000007FFFFFFF + 0000000000008000 = 000000007FFFFFFF (cc=2) -+a 0 + FFFFFFFFFFFFFFFF + 0000000000008000 = FFFFFFFFFFFFFFFF (cc=1) -+a 0 + 8000000000000000 + 0000000000008000 = 8000000000000000 (cc=0) -+a 0 + 7FFFFFFFFFFFFFFF + 0000000000008000 = 7FFFFFFFFFFFFFFF (cc=1) -+ah 0 + 0000000000000000 + 0000000000008000 = 0000000000000000 (cc=0) -+ah 0 + 0000000000000001 + 0000000000008000 = 0000000000000001 (cc=2) -+ah 0 + 000000000000FFFF + 0000000000008000 = 000000000000FFFF (cc=2) -+ah 0 + 0000000000007FFF + 0000000000008000 = 0000000000007FFF (cc=2) -+ah 0 + 0000000000008000 + 0000000000008000 = 0000000000008000 (cc=2) -+ah 0 + 00000000FFFFFFFF + 0000000000008000 = 00000000FFFFFFFF (cc=1) -+ah 0 + 0000000080000000 + 0000000000008000 = 0000000080000000 (cc=1) -+ah 0 + 000000007FFFFFFF + 0000000000008000 = 000000007FFFFFFF (cc=2) -+ah 0 + FFFFFFFFFFFFFFFF + 0000000000008000 = FFFFFFFFFFFFFFFF (cc=1) -+ah 0 + 8000000000000000 + 0000000000008000 = 8000000000000000 (cc=0) -+ah 0 + 7FFFFFFFFFFFFFFF + 0000000000008000 = 7FFFFFFFFFFFFFFF (cc=1) -+ag 0 + 0000000000000000 + 0000000000008000 = 0000000000008000 (cc=2) -+ag 0 + 0000000000000001 + 0000000000008000 = 0000000000008001 (cc=2) -+ag 0 + 000000000000FFFF + 0000000000008000 = 0000000000017FFF (cc=2) -+ag 0 + 0000000000007FFF + 0000000000008000 = 000000000000FFFF (cc=2) -+ag 0 + 0000000000008000 + 0000000000008000 = 0000000000010000 (cc=2) -+ag 0 + 00000000FFFFFFFF + 0000000000008000 = 0000000100007FFF (cc=2) -+ag 0 + 0000000080000000 + 0000000000008000 = 0000000080008000 (cc=2) -+ag 0 + 000000007FFFFFFF + 0000000000008000 = 0000000080007FFF (cc=2) -+ag 0 + FFFFFFFFFFFFFFFF + 0000000000008000 = 0000000000007FFF (cc=2) -+ag 0 + 8000000000000000 + 0000000000008000 = 8000000000008000 (cc=1) -+ag 0 + 7FFFFFFFFFFFFFFF + 0000000000008000 = 8000000000007FFF (cc=3) -+agf 0 + 0000000000000000 + 0000000000008000 = 0000000000000000 (cc=0) -+agf 0 + 0000000000000001 + 0000000000008000 = 0000000000000001 (cc=2) -+agf 0 + 000000000000FFFF + 0000000000008000 = 000000000000FFFF (cc=2) -+agf 0 + 0000000000007FFF + 0000000000008000 = 0000000000007FFF (cc=2) -+agf 0 + 0000000000008000 + 0000000000008000 = 0000000000008000 (cc=2) -+agf 0 + 00000000FFFFFFFF + 0000000000008000 = 00000000FFFFFFFF (cc=2) -+agf 0 + 0000000080000000 + 0000000000008000 = 0000000080000000 (cc=2) -+agf 0 + 000000007FFFFFFF + 0000000000008000 = 000000007FFFFFFF (cc=2) -+agf 0 + FFFFFFFFFFFFFFFF + 0000000000008000 = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + 8000000000000000 + 0000000000008000 = 8000000000000000 (cc=1) -+agf 0 + 7FFFFFFFFFFFFFFF + 0000000000008000 = 7FFFFFFFFFFFFFFF (cc=2) -+al 0 + 0000000000000000 + 0000000000008000 = 0000000000000000 (cc=0) -+al 0 + 0000000000000001 + 0000000000008000 = 0000000000000001 (cc=1) -+al 0 + 000000000000FFFF + 0000000000008000 = 000000000000FFFF (cc=1) -+al 0 + 0000000000007FFF + 0000000000008000 = 0000000000007FFF (cc=1) -+al 0 + 0000000000008000 + 0000000000008000 = 0000000000008000 (cc=1) -+al 0 + 00000000FFFFFFFF + 0000000000008000 = 00000000FFFFFFFF (cc=1) -+al 0 + 0000000080000000 + 0000000000008000 = 0000000080000000 (cc=1) -+al 0 + 000000007FFFFFFF + 0000000000008000 = 000000007FFFFFFF (cc=1) -+al 0 + FFFFFFFFFFFFFFFF + 0000000000008000 = FFFFFFFFFFFFFFFF (cc=1) -+al 0 + 8000000000000000 + 0000000000008000 = 8000000000000000 (cc=0) -+al 0 + 7FFFFFFFFFFFFFFF + 0000000000008000 = 7FFFFFFFFFFFFFFF (cc=1) -+alg 0 + 0000000000000000 + 0000000000008000 = 0000000000008000 (cc=1) -+alg 0 + 0000000000000001 + 0000000000008000 = 0000000000008001 (cc=1) -+alg 0 + 000000000000FFFF + 0000000000008000 = 0000000000017FFF (cc=1) -+alg 0 + 0000000000007FFF + 0000000000008000 = 000000000000FFFF (cc=1) -+alg 0 + 0000000000008000 + 0000000000008000 = 0000000000010000 (cc=1) -+alg 0 + 00000000FFFFFFFF + 0000000000008000 = 0000000100007FFF (cc=1) -+alg 0 + 0000000080000000 + 0000000000008000 = 0000000080008000 (cc=1) -+alg 0 + 000000007FFFFFFF + 0000000000008000 = 0000000080007FFF (cc=1) -+alg 0 + FFFFFFFFFFFFFFFF + 0000000000008000 = 0000000000007FFF (cc=3) -+alg 0 + 8000000000000000 + 0000000000008000 = 8000000000008000 (cc=1) -+alg 0 + 7FFFFFFFFFFFFFFF + 0000000000008000 = 8000000000007FFF (cc=1) -+agf 0 + 0000000000000000 + 0000000000008000 = 0000000000000000 (cc=0) -+agf 0 + 0000000000000001 + 0000000000008000 = 0000000000000001 (cc=2) -+agf 0 + 000000000000FFFF + 0000000000008000 = 000000000000FFFF (cc=2) -+agf 0 + 0000000000007FFF + 0000000000008000 = 0000000000007FFF (cc=2) -+agf 0 + 0000000000008000 + 0000000000008000 = 0000000000008000 (cc=2) -+agf 0 + 00000000FFFFFFFF + 0000000000008000 = 00000000FFFFFFFF (cc=2) -+agf 0 + 0000000080000000 + 0000000000008000 = 0000000080000000 (cc=2) -+agf 0 + 000000007FFFFFFF + 0000000000008000 = 000000007FFFFFFF (cc=2) -+agf 0 + FFFFFFFFFFFFFFFF + 0000000000008000 = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + 8000000000000000 + 0000000000008000 = 8000000000000000 (cc=1) -+agf 0 + 7FFFFFFFFFFFFFFF + 0000000000008000 = 7FFFFFFFFFFFFFFF (cc=2) -+algf 0 + 0000000000000000 + 0000000000008000 = 0000000000000000 (cc=0) -+algf 0 + 0000000000000001 + 0000000000008000 = 0000000000000001 (cc=1) -+algf 0 + 000000000000FFFF + 0000000000008000 = 000000000000FFFF (cc=1) -+algf 0 + 0000000000007FFF + 0000000000008000 = 0000000000007FFF (cc=1) -+algf 0 + 0000000000008000 + 0000000000008000 = 0000000000008000 (cc=1) -+algf 0 + 00000000FFFFFFFF + 0000000000008000 = 00000000FFFFFFFF (cc=1) -+algf 0 + 0000000080000000 + 0000000000008000 = 0000000080000000 (cc=1) -+algf 0 + 000000007FFFFFFF + 0000000000008000 = 000000007FFFFFFF (cc=1) -+algf 0 + FFFFFFFFFFFFFFFF + 0000000000008000 = FFFFFFFFFFFFFFFF (cc=1) -+algf 0 + 8000000000000000 + 0000000000008000 = 8000000000000000 (cc=1) -+algf 0 + 7FFFFFFFFFFFFFFF + 0000000000008000 = 7FFFFFFFFFFFFFFF (cc=1) -+ar 0 + 0000000000000000 + 0000000000008000 = 0000000000008000 (cc=2) -+ar 0 + 0000000000000001 + 0000000000008000 = 0000000000008001 (cc=2) -+ar 0 + 000000000000FFFF + 0000000000008000 = 0000000000017FFF (cc=2) -+ar 0 + 0000000000007FFF + 0000000000008000 = 000000000000FFFF (cc=2) -+ar 0 + 0000000000008000 + 0000000000008000 = 0000000000010000 (cc=2) -+ar 0 + 00000000FFFFFFFF + 0000000000008000 = 0000000000007FFF (cc=2) -+ar 0 + 0000000080000000 + 0000000000008000 = 0000000080008000 (cc=1) -+ar 0 + 000000007FFFFFFF + 0000000000008000 = 0000000080007FFF (cc=3) -+ar 0 + FFFFFFFFFFFFFFFF + 0000000000008000 = FFFFFFFF00007FFF (cc=2) -+ar 0 + 8000000000000000 + 0000000000008000 = 8000000000008000 (cc=2) -+ar 0 + 7FFFFFFFFFFFFFFF + 0000000000008000 = 7FFFFFFF00007FFF (cc=2) -+agr 0 + 0000000000000000 + 0000000000008000 = 0000000000008000 (cc=2) -+agr 0 + 0000000000000001 + 0000000000008000 = 0000000000008001 (cc=2) -+agr 0 + 000000000000FFFF + 0000000000008000 = 0000000000017FFF (cc=2) -+agr 0 + 0000000000007FFF + 0000000000008000 = 000000000000FFFF (cc=2) -+agr 0 + 0000000000008000 + 0000000000008000 = 0000000000010000 (cc=2) -+agr 0 + 00000000FFFFFFFF + 0000000000008000 = 0000000100007FFF (cc=2) -+agr 0 + 0000000080000000 + 0000000000008000 = 0000000080008000 (cc=2) -+agr 0 + 000000007FFFFFFF + 0000000000008000 = 0000000080007FFF (cc=2) -+agr 0 + FFFFFFFFFFFFFFFF + 0000000000008000 = 0000000000007FFF (cc=2) -+agr 0 + 8000000000000000 + 0000000000008000 = 8000000000008000 (cc=1) -+agr 0 + 7FFFFFFFFFFFFFFF + 0000000000008000 = 8000000000007FFF (cc=3) -+agfr 0 + 0000000000000000 + 0000000000008000 = 0000000000008000 (cc=2) -+agfr 0 + 0000000000000001 + 0000000000008000 = 0000000000008001 (cc=2) -+agfr 0 + 000000000000FFFF + 0000000000008000 = 0000000000017FFF (cc=2) -+agfr 0 + 0000000000007FFF + 0000000000008000 = 000000000000FFFF (cc=2) -+agfr 0 + 0000000000008000 + 0000000000008000 = 0000000000010000 (cc=2) -+agfr 0 + 00000000FFFFFFFF + 0000000000008000 = 0000000100007FFF (cc=2) -+agfr 0 + 0000000080000000 + 0000000000008000 = 0000000080008000 (cc=2) -+agfr 0 + 000000007FFFFFFF + 0000000000008000 = 0000000080007FFF (cc=2) -+agfr 0 + FFFFFFFFFFFFFFFF + 0000000000008000 = 0000000000007FFF (cc=2) -+agfr 0 + 8000000000000000 + 0000000000008000 = 8000000000008000 (cc=1) -+agfr 0 + 7FFFFFFFFFFFFFFF + 0000000000008000 = 8000000000007FFF (cc=3) -+alr 0 + 0000000000000000 + 0000000000008000 = 0000000000008000 (cc=1) -+alr 0 + 0000000000000001 + 0000000000008000 = 0000000000008001 (cc=1) -+alr 0 + 000000000000FFFF + 0000000000008000 = 0000000000017FFF (cc=1) -+alr 0 + 0000000000007FFF + 0000000000008000 = 000000000000FFFF (cc=1) -+alr 0 + 0000000000008000 + 0000000000008000 = 0000000000010000 (cc=1) -+alr 0 + 00000000FFFFFFFF + 0000000000008000 = 0000000000007FFF (cc=3) -+alr 0 + 0000000080000000 + 0000000000008000 = 0000000080008000 (cc=1) -+alr 0 + 000000007FFFFFFF + 0000000000008000 = 0000000080007FFF (cc=1) -+alr 0 + FFFFFFFFFFFFFFFF + 0000000000008000 = FFFFFFFF00007FFF (cc=3) -+alr 0 + 8000000000000000 + 0000000000008000 = 8000000000008000 (cc=1) -+alr 0 + 7FFFFFFFFFFFFFFF + 0000000000008000 = 7FFFFFFF00007FFF (cc=3) -+algr 0 + 0000000000000000 + 0000000000008000 = 0000000000008000 (cc=1) -+algr 0 + 0000000000000001 + 0000000000008000 = 0000000000008001 (cc=1) -+algr 0 + 000000000000FFFF + 0000000000008000 = 0000000000017FFF (cc=1) -+algr 0 + 0000000000007FFF + 0000000000008000 = 000000000000FFFF (cc=1) -+algr 0 + 0000000000008000 + 0000000000008000 = 0000000000010000 (cc=1) -+algr 0 + 00000000FFFFFFFF + 0000000000008000 = 0000000100007FFF (cc=1) -+algr 0 + 0000000080000000 + 0000000000008000 = 0000000080008000 (cc=1) -+algr 0 + 000000007FFFFFFF + 0000000000008000 = 0000000080007FFF (cc=1) -+algr 0 + FFFFFFFFFFFFFFFF + 0000000000008000 = 0000000000007FFF (cc=3) -+algr 0 + 8000000000000000 + 0000000000008000 = 8000000000008000 (cc=1) -+algr 0 + 7FFFFFFFFFFFFFFF + 0000000000008000 = 8000000000007FFF (cc=1) -+algfr 0 + 0000000000000000 + 0000000000008000 = 0000000000008000 (cc=1) -+algfr 0 + 0000000000000001 + 0000000000008000 = 0000000000008001 (cc=1) -+algfr 0 + 000000000000FFFF + 0000000000008000 = 0000000000017FFF (cc=1) -+algfr 0 + 0000000000007FFF + 0000000000008000 = 000000000000FFFF (cc=1) -+algfr 0 + 0000000000008000 + 0000000000008000 = 0000000000010000 (cc=1) -+algfr 0 + 00000000FFFFFFFF + 0000000000008000 = 0000000100007FFF (cc=1) -+algfr 0 + 0000000080000000 + 0000000000008000 = 0000000080008000 (cc=1) -+algfr 0 + 000000007FFFFFFF + 0000000000008000 = 0000000080007FFF (cc=1) -+algfr 0 + FFFFFFFFFFFFFFFF + 0000000000008000 = 0000000000007FFF (cc=3) -+algfr 0 + 8000000000000000 + 0000000000008000 = 8000000000008000 (cc=1) -+algfr 0 + 7FFFFFFFFFFFFFFF + 0000000000008000 = 8000000000007FFF (cc=1) -+alc 0 + 0000000000000000 + 0000000000008000 = 0000000000000000 (cc=0) -+alc 0 + 0000000000000001 + 0000000000008000 = 0000000000000001 (cc=1) -+alc 0 + 000000000000FFFF + 0000000000008000 = 000000000000FFFF (cc=1) -+alc 0 + 0000000000007FFF + 0000000000008000 = 0000000000007FFF (cc=1) -+alc 0 + 0000000000008000 + 0000000000008000 = 0000000000008000 (cc=1) -+alc 0 + 00000000FFFFFFFF + 0000000000008000 = 00000000FFFFFFFF (cc=1) -+alc 0 + 0000000080000000 + 0000000000008000 = 0000000080000000 (cc=1) -+alc 0 + 000000007FFFFFFF + 0000000000008000 = 000000007FFFFFFF (cc=1) -+alc 0 + FFFFFFFFFFFFFFFF + 0000000000008000 = FFFFFFFFFFFFFFFF (cc=1) -+alc 0 + 8000000000000000 + 0000000000008000 = 8000000000000000 (cc=0) -+alc 0 + 7FFFFFFFFFFFFFFF + 0000000000008000 = 7FFFFFFFFFFFFFFF (cc=1) -+alcg 0 + 0000000000000000 + 0000000000008000 = 0000000000008000 (cc=1) -+alcg 0 + 0000000000000001 + 0000000000008000 = 0000000000008001 (cc=1) -+alcg 0 + 000000000000FFFF + 0000000000008000 = 0000000000017FFF (cc=1) -+alcg 0 + 0000000000007FFF + 0000000000008000 = 000000000000FFFF (cc=1) -+alcg 0 + 0000000000008000 + 0000000000008000 = 0000000000010000 (cc=1) -+alcg 0 + 00000000FFFFFFFF + 0000000000008000 = 0000000100007FFF (cc=1) -+alcg 0 + 0000000080000000 + 0000000000008000 = 0000000080008000 (cc=1) -+alcg 0 + 000000007FFFFFFF + 0000000000008000 = 0000000080007FFF (cc=1) -+alcg 0 + FFFFFFFFFFFFFFFF + 0000000000008000 = 0000000000007FFF (cc=3) -+alcg 0 + 8000000000000000 + 0000000000008000 = 8000000000008000 (cc=1) -+alcg 0 + 7FFFFFFFFFFFFFFF + 0000000000008000 = 8000000000007FFF (cc=1) -+alcr 0 + 0000000000000000 + 0000000000008000 = 0000000000008000 (cc=1) -+alcr 0 + 0000000000000001 + 0000000000008000 = 0000000000008001 (cc=1) -+alcr 0 + 000000000000FFFF + 0000000000008000 = 0000000000017FFF (cc=1) -+alcr 0 + 0000000000007FFF + 0000000000008000 = 000000000000FFFF (cc=1) -+alcr 0 + 0000000000008000 + 0000000000008000 = 0000000000010000 (cc=1) -+alcr 0 + 00000000FFFFFFFF + 0000000000008000 = 0000000000007FFF (cc=3) -+alcr 0 + 0000000080000000 + 0000000000008000 = 0000000080008000 (cc=1) -+alcr 0 + 000000007FFFFFFF + 0000000000008000 = 0000000080007FFF (cc=1) -+alcr 0 + FFFFFFFFFFFFFFFF + 0000000000008000 = FFFFFFFF00007FFF (cc=3) -+alcr 0 + 8000000000000000 + 0000000000008000 = 8000000000008000 (cc=1) -+alcr 0 + 7FFFFFFFFFFFFFFF + 0000000000008000 = 7FFFFFFF00007FFF (cc=3) -+alcgr 0 + 0000000000000000 + 0000000000008000 = 0000000000008000 (cc=1) -+alcgr 0 + 0000000000000001 + 0000000000008000 = 0000000000008001 (cc=1) -+alcgr 0 + 000000000000FFFF + 0000000000008000 = 0000000000017FFF (cc=1) -+alcgr 0 + 0000000000007FFF + 0000000000008000 = 000000000000FFFF (cc=1) -+alcgr 0 + 0000000000008000 + 0000000000008000 = 0000000000010000 (cc=1) -+alcgr 0 + 00000000FFFFFFFF + 0000000000008000 = 0000000100007FFF (cc=1) -+alcgr 0 + 0000000080000000 + 0000000000008000 = 0000000080008000 (cc=1) -+alcgr 0 + 000000007FFFFFFF + 0000000000008000 = 0000000080007FFF (cc=1) -+alcgr 0 + FFFFFFFFFFFFFFFF + 0000000000008000 = 0000000000007FFF (cc=3) -+alcgr 0 + 8000000000000000 + 0000000000008000 = 8000000000008000 (cc=1) -+alcgr 0 + 7FFFFFFFFFFFFFFF + 0000000000008000 = 8000000000007FFF (cc=1) -+alc 1 + 0000000000000000 + 0000000000008000 = 0000000000000001 (cc=1) -+alc 1 + 0000000000000001 + 0000000000008000 = 0000000000000002 (cc=1) -+alc 1 + 000000000000FFFF + 0000000000008000 = 0000000000010000 (cc=1) -+alc 1 + 0000000000007FFF + 0000000000008000 = 0000000000008000 (cc=1) -+alc 1 + 0000000000008000 + 0000000000008000 = 0000000000008001 (cc=1) -+alc 1 + 00000000FFFFFFFF + 0000000000008000 = 0000000000000000 (cc=2) -+alc 1 + 0000000080000000 + 0000000000008000 = 0000000080000001 (cc=1) -+alc 1 + 000000007FFFFFFF + 0000000000008000 = 0000000080000000 (cc=1) -+alc 1 + FFFFFFFFFFFFFFFF + 0000000000008000 = FFFFFFFF00000000 (cc=2) -+alc 1 + 8000000000000000 + 0000000000008000 = 8000000000000001 (cc=1) -+alc 1 + 7FFFFFFFFFFFFFFF + 0000000000008000 = 7FFFFFFF00000000 (cc=2) -+alcg 1 + 0000000000000000 + 0000000000008000 = 0000000000008001 (cc=1) -+alcg 1 + 0000000000000001 + 0000000000008000 = 0000000000008002 (cc=1) -+alcg 1 + 000000000000FFFF + 0000000000008000 = 0000000000018000 (cc=1) -+alcg 1 + 0000000000007FFF + 0000000000008000 = 0000000000010000 (cc=1) -+alcg 1 + 0000000000008000 + 0000000000008000 = 0000000000010001 (cc=1) -+alcg 1 + 00000000FFFFFFFF + 0000000000008000 = 0000000100008000 (cc=1) -+alcg 1 + 0000000080000000 + 0000000000008000 = 0000000080008001 (cc=1) -+alcg 1 + 000000007FFFFFFF + 0000000000008000 = 0000000080008000 (cc=1) -+alcg 1 + FFFFFFFFFFFFFFFF + 0000000000008000 = 0000000000008000 (cc=3) -+alcg 1 + 8000000000000000 + 0000000000008000 = 8000000000008001 (cc=1) -+alcg 1 + 7FFFFFFFFFFFFFFF + 0000000000008000 = 8000000000008000 (cc=1) -+alcr 1 + 0000000000000000 + 0000000000008000 = 0000000000008001 (cc=1) -+alcr 1 + 0000000000000001 + 0000000000008000 = 0000000000008002 (cc=1) -+alcr 1 + 000000000000FFFF + 0000000000008000 = 0000000000018000 (cc=1) -+alcr 1 + 0000000000007FFF + 0000000000008000 = 0000000000010000 (cc=1) -+alcr 1 + 0000000000008000 + 0000000000008000 = 0000000000010001 (cc=1) -+alcr 1 + 00000000FFFFFFFF + 0000000000008000 = 0000000000008000 (cc=3) -+alcr 1 + 0000000080000000 + 0000000000008000 = 0000000080008001 (cc=1) -+alcr 1 + 000000007FFFFFFF + 0000000000008000 = 0000000080008000 (cc=1) -+alcr 1 + FFFFFFFFFFFFFFFF + 0000000000008000 = FFFFFFFF00008000 (cc=3) -+alcr 1 + 8000000000000000 + 0000000000008000 = 8000000000008001 (cc=1) -+alcr 1 + 7FFFFFFFFFFFFFFF + 0000000000008000 = 7FFFFFFF00008000 (cc=3) -+alcgr 1 + 0000000000000000 + 0000000000008000 = 0000000000008001 (cc=1) -+alcgr 1 + 0000000000000001 + 0000000000008000 = 0000000000008002 (cc=1) -+alcgr 1 + 000000000000FFFF + 0000000000008000 = 0000000000018000 (cc=1) -+alcgr 1 + 0000000000007FFF + 0000000000008000 = 0000000000010000 (cc=1) -+alcgr 1 + 0000000000008000 + 0000000000008000 = 0000000000010001 (cc=1) -+alcgr 1 + 00000000FFFFFFFF + 0000000000008000 = 0000000100008000 (cc=1) -+alcgr 1 + 0000000080000000 + 0000000000008000 = 0000000080008001 (cc=1) -+alcgr 1 + 000000007FFFFFFF + 0000000000008000 = 0000000080008000 (cc=1) -+alcgr 1 + FFFFFFFFFFFFFFFF + 0000000000008000 = 0000000000008000 (cc=3) -+alcgr 1 + 8000000000000000 + 0000000000008000 = 8000000000008001 (cc=1) -+alcgr 1 + 7FFFFFFFFFFFFFFF + 0000000000008000 = 8000000000008000 (cc=1) -+ahy 0 + 0000000000000000 + 0000000000008000 = 0000000000000000 (cc=0) -+ahy 0 + 0000000000000001 + 0000000000008000 = 0000000000000001 (cc=2) -+ahy 0 + 000000000000FFFF + 0000000000008000 = 000000000000FFFF (cc=2) -+ahy 0 + 0000000000007FFF + 0000000000008000 = 0000000000007FFF (cc=2) -+ahy 0 + 0000000000008000 + 0000000000008000 = 0000000000008000 (cc=2) -+ahy 0 + 00000000FFFFFFFF + 0000000000008000 = 00000000FFFFFFFF (cc=1) -+ahy 0 + 0000000080000000 + 0000000000008000 = 0000000080000000 (cc=1) -+ahy 0 + 000000007FFFFFFF + 0000000000008000 = 000000007FFFFFFF (cc=2) -+ahy 0 + FFFFFFFFFFFFFFFF + 0000000000008000 = FFFFFFFFFFFFFFFF (cc=1) -+ahy 0 + 8000000000000000 + 0000000000008000 = 8000000000000000 (cc=0) -+ahy 0 + 7FFFFFFFFFFFFFFF + 0000000000008000 = 7FFFFFFFFFFFFFFF (cc=1) -+ay 0 + 0000000000000000 + 0000000000008000 = 0000000000000000 (cc=0) -+ay 0 + 0000000000000001 + 0000000000008000 = 0000000000000001 (cc=2) -+ay 0 + 000000000000FFFF + 0000000000008000 = 000000000000FFFF (cc=2) -+ay 0 + 0000000000007FFF + 0000000000008000 = 0000000000007FFF (cc=2) -+ay 0 + 0000000000008000 + 0000000000008000 = 0000000000008000 (cc=2) -+ay 0 + 00000000FFFFFFFF + 0000000000008000 = 00000000FFFFFFFF (cc=1) -+ay 0 + 0000000080000000 + 0000000000008000 = 0000000080000000 (cc=1) -+ay 0 + 000000007FFFFFFF + 0000000000008000 = 000000007FFFFFFF (cc=2) -+ay 0 + FFFFFFFFFFFFFFFF + 0000000000008000 = FFFFFFFFFFFFFFFF (cc=1) -+ay 0 + 8000000000000000 + 0000000000008000 = 8000000000000000 (cc=0) -+ay 0 + 7FFFFFFFFFFFFFFF + 0000000000008000 = 7FFFFFFFFFFFFFFF (cc=1) -+aly 0 + 0000000000000000 + 0000000000008000 = 0000000000000000 (cc=0) -+aly 0 + 0000000000000001 + 0000000000008000 = 0000000000000001 (cc=1) -+aly 0 + 000000000000FFFF + 0000000000008000 = 000000000000FFFF (cc=1) -+aly 0 + 0000000000007FFF + 0000000000008000 = 0000000000007FFF (cc=1) -+aly 0 + 0000000000008000 + 0000000000008000 = 0000000000008000 (cc=1) -+aly 0 + 00000000FFFFFFFF + 0000000000008000 = 00000000FFFFFFFF (cc=1) -+aly 0 + 0000000080000000 + 0000000000008000 = 0000000080000000 (cc=1) -+aly 0 + 000000007FFFFFFF + 0000000000008000 = 000000007FFFFFFF (cc=1) -+aly 0 + FFFFFFFFFFFFFFFF + 0000000000008000 = FFFFFFFFFFFFFFFF (cc=1) -+aly 0 + 8000000000000000 + 0000000000008000 = 8000000000000000 (cc=0) -+aly 0 + 7FFFFFFFFFFFFFFF + 0000000000008000 = 7FFFFFFFFFFFFFFF (cc=1) -+a 0 + 0000000000000000 + 000000000000FFFF = 0000000000000000 (cc=0) -+a 0 + 0000000000000001 + 000000000000FFFF = 0000000000000001 (cc=2) -+a 0 + 000000000000FFFF + 000000000000FFFF = 000000000000FFFF (cc=2) -+a 0 + 0000000000007FFF + 000000000000FFFF = 0000000000007FFF (cc=2) -+a 0 + 0000000000008000 + 000000000000FFFF = 0000000000008000 (cc=2) -+a 0 + 00000000FFFFFFFF + 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+a 0 + 0000000080000000 + 000000000000FFFF = 0000000080000000 (cc=1) -+a 0 + 000000007FFFFFFF + 000000000000FFFF = 000000007FFFFFFF (cc=2) -+a 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+a 0 + 8000000000000000 + 000000000000FFFF = 8000000000000000 (cc=0) -+a 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFFFFFFFFFF (cc=1) -+ah 0 + 0000000000000000 + 000000000000FFFF = 0000000000000000 (cc=0) -+ah 0 + 0000000000000001 + 000000000000FFFF = 0000000000000001 (cc=2) -+ah 0 + 000000000000FFFF + 000000000000FFFF = 000000000000FFFF (cc=2) -+ah 0 + 0000000000007FFF + 000000000000FFFF = 0000000000007FFF (cc=2) -+ah 0 + 0000000000008000 + 000000000000FFFF = 0000000000008000 (cc=2) -+ah 0 + 00000000FFFFFFFF + 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+ah 0 + 0000000080000000 + 000000000000FFFF = 0000000080000000 (cc=1) -+ah 0 + 000000007FFFFFFF + 000000000000FFFF = 000000007FFFFFFF (cc=2) -+ah 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+ah 0 + 8000000000000000 + 000000000000FFFF = 8000000000000000 (cc=0) -+ah 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFFFFFFFFFF (cc=1) -+ag 0 + 0000000000000000 + 000000000000FFFF = 000000000000FFFF (cc=2) -+ag 0 + 0000000000000001 + 000000000000FFFF = 0000000000010000 (cc=2) -+ag 0 + 000000000000FFFF + 000000000000FFFF = 000000000001FFFE (cc=2) -+ag 0 + 0000000000007FFF + 000000000000FFFF = 0000000000017FFE (cc=2) -+ag 0 + 0000000000008000 + 000000000000FFFF = 0000000000017FFF (cc=2) -+ag 0 + 00000000FFFFFFFF + 000000000000FFFF = 000000010000FFFE (cc=2) -+ag 0 + 0000000080000000 + 000000000000FFFF = 000000008000FFFF (cc=2) -+ag 0 + 000000007FFFFFFF + 000000000000FFFF = 000000008000FFFE (cc=2) -+ag 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = 000000000000FFFE (cc=2) -+ag 0 + 8000000000000000 + 000000000000FFFF = 800000000000FFFF (cc=1) -+ag 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 800000000000FFFE (cc=3) -+agf 0 + 0000000000000000 + 000000000000FFFF = 0000000000000000 (cc=0) -+agf 0 + 0000000000000001 + 000000000000FFFF = 0000000000000001 (cc=2) -+agf 0 + 000000000000FFFF + 000000000000FFFF = 000000000000FFFF (cc=2) -+agf 0 + 0000000000007FFF + 000000000000FFFF = 0000000000007FFF (cc=2) -+agf 0 + 0000000000008000 + 000000000000FFFF = 0000000000008000 (cc=2) -+agf 0 + 00000000FFFFFFFF + 000000000000FFFF = 00000000FFFFFFFF (cc=2) -+agf 0 + 0000000080000000 + 000000000000FFFF = 0000000080000000 (cc=2) -+agf 0 + 000000007FFFFFFF + 000000000000FFFF = 000000007FFFFFFF (cc=2) -+agf 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + 8000000000000000 + 000000000000FFFF = 8000000000000000 (cc=1) -+agf 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFFFFFFFFFF (cc=2) -+al 0 + 0000000000000000 + 000000000000FFFF = 0000000000000000 (cc=0) -+al 0 + 0000000000000001 + 000000000000FFFF = 0000000000000001 (cc=1) -+al 0 + 000000000000FFFF + 000000000000FFFF = 000000000000FFFF (cc=1) -+al 0 + 0000000000007FFF + 000000000000FFFF = 0000000000007FFF (cc=1) -+al 0 + 0000000000008000 + 000000000000FFFF = 0000000000008000 (cc=1) -+al 0 + 00000000FFFFFFFF + 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+al 0 + 0000000080000000 + 000000000000FFFF = 0000000080000000 (cc=1) -+al 0 + 000000007FFFFFFF + 000000000000FFFF = 000000007FFFFFFF (cc=1) -+al 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+al 0 + 8000000000000000 + 000000000000FFFF = 8000000000000000 (cc=0) -+al 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFFFFFFFFFF (cc=1) -+alg 0 + 0000000000000000 + 000000000000FFFF = 000000000000FFFF (cc=1) -+alg 0 + 0000000000000001 + 000000000000FFFF = 0000000000010000 (cc=1) -+alg 0 + 000000000000FFFF + 000000000000FFFF = 000000000001FFFE (cc=1) -+alg 0 + 0000000000007FFF + 000000000000FFFF = 0000000000017FFE (cc=1) -+alg 0 + 0000000000008000 + 000000000000FFFF = 0000000000017FFF (cc=1) -+alg 0 + 00000000FFFFFFFF + 000000000000FFFF = 000000010000FFFE (cc=1) -+alg 0 + 0000000080000000 + 000000000000FFFF = 000000008000FFFF (cc=1) -+alg 0 + 000000007FFFFFFF + 000000000000FFFF = 000000008000FFFE (cc=1) -+alg 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = 000000000000FFFE (cc=3) -+alg 0 + 8000000000000000 + 000000000000FFFF = 800000000000FFFF (cc=1) -+alg 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 800000000000FFFE (cc=1) -+agf 0 + 0000000000000000 + 000000000000FFFF = 0000000000000000 (cc=0) -+agf 0 + 0000000000000001 + 000000000000FFFF = 0000000000000001 (cc=2) -+agf 0 + 000000000000FFFF + 000000000000FFFF = 000000000000FFFF (cc=2) -+agf 0 + 0000000000007FFF + 000000000000FFFF = 0000000000007FFF (cc=2) -+agf 0 + 0000000000008000 + 000000000000FFFF = 0000000000008000 (cc=2) -+agf 0 + 00000000FFFFFFFF + 000000000000FFFF = 00000000FFFFFFFF (cc=2) -+agf 0 + 0000000080000000 + 000000000000FFFF = 0000000080000000 (cc=2) -+agf 0 + 000000007FFFFFFF + 000000000000FFFF = 000000007FFFFFFF (cc=2) -+agf 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+agf 0 + 8000000000000000 + 000000000000FFFF = 8000000000000000 (cc=1) -+agf 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFFFFFFFFFF (cc=2) -+algf 0 + 0000000000000000 + 000000000000FFFF = 0000000000000000 (cc=0) -+algf 0 + 0000000000000001 + 000000000000FFFF = 0000000000000001 (cc=1) -+algf 0 + 000000000000FFFF + 000000000000FFFF = 000000000000FFFF (cc=1) -+algf 0 + 0000000000007FFF + 000000000000FFFF = 0000000000007FFF (cc=1) -+algf 0 + 0000000000008000 + 000000000000FFFF = 0000000000008000 (cc=1) -+algf 0 + 00000000FFFFFFFF + 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+algf 0 + 0000000080000000 + 000000000000FFFF = 0000000080000000 (cc=1) -+algf 0 + 000000007FFFFFFF + 000000000000FFFF = 000000007FFFFFFF (cc=1) -+algf 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+algf 0 + 8000000000000000 + 000000000000FFFF = 8000000000000000 (cc=1) -+algf 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFFFFFFFFFF (cc=1) -+ar 0 + 0000000000000000 + 000000000000FFFF = 000000000000FFFF (cc=2) -+ar 0 + 0000000000000001 + 000000000000FFFF = 0000000000010000 (cc=2) -+ar 0 + 000000000000FFFF + 000000000000FFFF = 000000000001FFFE (cc=2) -+ar 0 + 0000000000007FFF + 000000000000FFFF = 0000000000017FFE (cc=2) -+ar 0 + 0000000000008000 + 000000000000FFFF = 0000000000017FFF (cc=2) -+ar 0 + 00000000FFFFFFFF + 000000000000FFFF = 000000000000FFFE (cc=2) -+ar 0 + 0000000080000000 + 000000000000FFFF = 000000008000FFFF (cc=1) -+ar 0 + 000000007FFFFFFF + 000000000000FFFF = 000000008000FFFE (cc=3) -+ar 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFF0000FFFE (cc=2) -+ar 0 + 8000000000000000 + 000000000000FFFF = 800000000000FFFF (cc=2) -+ar 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFF0000FFFE (cc=2) -+agr 0 + 0000000000000000 + 000000000000FFFF = 000000000000FFFF (cc=2) -+agr 0 + 0000000000000001 + 000000000000FFFF = 0000000000010000 (cc=2) -+agr 0 + 000000000000FFFF + 000000000000FFFF = 000000000001FFFE (cc=2) -+agr 0 + 0000000000007FFF + 000000000000FFFF = 0000000000017FFE (cc=2) -+agr 0 + 0000000000008000 + 000000000000FFFF = 0000000000017FFF (cc=2) -+agr 0 + 00000000FFFFFFFF + 000000000000FFFF = 000000010000FFFE (cc=2) -+agr 0 + 0000000080000000 + 000000000000FFFF = 000000008000FFFF (cc=2) -+agr 0 + 000000007FFFFFFF + 000000000000FFFF = 000000008000FFFE (cc=2) -+agr 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = 000000000000FFFE (cc=2) -+agr 0 + 8000000000000000 + 000000000000FFFF = 800000000000FFFF (cc=1) -+agr 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 800000000000FFFE (cc=3) -+agfr 0 + 0000000000000000 + 000000000000FFFF = 000000000000FFFF (cc=2) -+agfr 0 + 0000000000000001 + 000000000000FFFF = 0000000000010000 (cc=2) -+agfr 0 + 000000000000FFFF + 000000000000FFFF = 000000000001FFFE (cc=2) -+agfr 0 + 0000000000007FFF + 000000000000FFFF = 0000000000017FFE (cc=2) -+agfr 0 + 0000000000008000 + 000000000000FFFF = 0000000000017FFF (cc=2) -+agfr 0 + 00000000FFFFFFFF + 000000000000FFFF = 000000010000FFFE (cc=2) -+agfr 0 + 0000000080000000 + 000000000000FFFF = 000000008000FFFF (cc=2) -+agfr 0 + 000000007FFFFFFF + 000000000000FFFF = 000000008000FFFE (cc=2) -+agfr 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = 000000000000FFFE (cc=2) -+agfr 0 + 8000000000000000 + 000000000000FFFF = 800000000000FFFF (cc=1) -+agfr 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 800000000000FFFE (cc=3) -+alr 0 + 0000000000000000 + 000000000000FFFF = 000000000000FFFF (cc=1) -+alr 0 + 0000000000000001 + 000000000000FFFF = 0000000000010000 (cc=1) -+alr 0 + 000000000000FFFF + 000000000000FFFF = 000000000001FFFE (cc=1) -+alr 0 + 0000000000007FFF + 000000000000FFFF = 0000000000017FFE (cc=1) -+alr 0 + 0000000000008000 + 000000000000FFFF = 0000000000017FFF (cc=1) -+alr 0 + 00000000FFFFFFFF + 000000000000FFFF = 000000000000FFFE (cc=3) -+alr 0 + 0000000080000000 + 000000000000FFFF = 000000008000FFFF (cc=1) -+alr 0 + 000000007FFFFFFF + 000000000000FFFF = 000000008000FFFE (cc=1) -+alr 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFF0000FFFE (cc=3) -+alr 0 + 8000000000000000 + 000000000000FFFF = 800000000000FFFF (cc=1) -+alr 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFF0000FFFE (cc=3) -+algr 0 + 0000000000000000 + 000000000000FFFF = 000000000000FFFF (cc=1) -+algr 0 + 0000000000000001 + 000000000000FFFF = 0000000000010000 (cc=1) -+algr 0 + 000000000000FFFF + 000000000000FFFF = 000000000001FFFE (cc=1) -+algr 0 + 0000000000007FFF + 000000000000FFFF = 0000000000017FFE (cc=1) -+algr 0 + 0000000000008000 + 000000000000FFFF = 0000000000017FFF (cc=1) -+algr 0 + 00000000FFFFFFFF + 000000000000FFFF = 000000010000FFFE (cc=1) -+algr 0 + 0000000080000000 + 000000000000FFFF = 000000008000FFFF (cc=1) -+algr 0 + 000000007FFFFFFF + 000000000000FFFF = 000000008000FFFE (cc=1) -+algr 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = 000000000000FFFE (cc=3) -+algr 0 + 8000000000000000 + 000000000000FFFF = 800000000000FFFF (cc=1) -+algr 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 800000000000FFFE (cc=1) -+algfr 0 + 0000000000000000 + 000000000000FFFF = 000000000000FFFF (cc=1) -+algfr 0 + 0000000000000001 + 000000000000FFFF = 0000000000010000 (cc=1) -+algfr 0 + 000000000000FFFF + 000000000000FFFF = 000000000001FFFE (cc=1) -+algfr 0 + 0000000000007FFF + 000000000000FFFF = 0000000000017FFE (cc=1) -+algfr 0 + 0000000000008000 + 000000000000FFFF = 0000000000017FFF (cc=1) -+algfr 0 + 00000000FFFFFFFF + 000000000000FFFF = 000000010000FFFE (cc=1) -+algfr 0 + 0000000080000000 + 000000000000FFFF = 000000008000FFFF (cc=1) -+algfr 0 + 000000007FFFFFFF + 000000000000FFFF = 000000008000FFFE (cc=1) -+algfr 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = 000000000000FFFE (cc=3) -+algfr 0 + 8000000000000000 + 000000000000FFFF = 800000000000FFFF (cc=1) -+algfr 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 800000000000FFFE (cc=1) -+alc 0 + 0000000000000000 + 000000000000FFFF = 0000000000000000 (cc=0) -+alc 0 + 0000000000000001 + 000000000000FFFF = 0000000000000001 (cc=1) -+alc 0 + 000000000000FFFF + 000000000000FFFF = 000000000000FFFF (cc=1) -+alc 0 + 0000000000007FFF + 000000000000FFFF = 0000000000007FFF (cc=1) -+alc 0 + 0000000000008000 + 000000000000FFFF = 0000000000008000 (cc=1) -+alc 0 + 00000000FFFFFFFF + 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+alc 0 + 0000000080000000 + 000000000000FFFF = 0000000080000000 (cc=1) -+alc 0 + 000000007FFFFFFF + 000000000000FFFF = 000000007FFFFFFF (cc=1) -+alc 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+alc 0 + 8000000000000000 + 000000000000FFFF = 8000000000000000 (cc=0) -+alc 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFFFFFFFFFF (cc=1) -+alcg 0 + 0000000000000000 + 000000000000FFFF = 000000000000FFFF (cc=1) -+alcg 0 + 0000000000000001 + 000000000000FFFF = 0000000000010000 (cc=1) -+alcg 0 + 000000000000FFFF + 000000000000FFFF = 000000000001FFFE (cc=1) -+alcg 0 + 0000000000007FFF + 000000000000FFFF = 0000000000017FFE (cc=1) -+alcg 0 + 0000000000008000 + 000000000000FFFF = 0000000000017FFF (cc=1) -+alcg 0 + 00000000FFFFFFFF + 000000000000FFFF = 000000010000FFFE (cc=1) -+alcg 0 + 0000000080000000 + 000000000000FFFF = 000000008000FFFF (cc=1) -+alcg 0 + 000000007FFFFFFF + 000000000000FFFF = 000000008000FFFE (cc=1) -+alcg 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = 000000000000FFFE (cc=3) -+alcg 0 + 8000000000000000 + 000000000000FFFF = 800000000000FFFF (cc=1) -+alcg 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 800000000000FFFE (cc=1) -+alcr 0 + 0000000000000000 + 000000000000FFFF = 000000000000FFFF (cc=1) -+alcr 0 + 0000000000000001 + 000000000000FFFF = 0000000000010000 (cc=1) -+alcr 0 + 000000000000FFFF + 000000000000FFFF = 000000000001FFFE (cc=1) -+alcr 0 + 0000000000007FFF + 000000000000FFFF = 0000000000017FFE (cc=1) -+alcr 0 + 0000000000008000 + 000000000000FFFF = 0000000000017FFF (cc=1) -+alcr 0 + 00000000FFFFFFFF + 000000000000FFFF = 000000000000FFFE (cc=3) -+alcr 0 + 0000000080000000 + 000000000000FFFF = 000000008000FFFF (cc=1) -+alcr 0 + 000000007FFFFFFF + 000000000000FFFF = 000000008000FFFE (cc=1) -+alcr 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFF0000FFFE (cc=3) -+alcr 0 + 8000000000000000 + 000000000000FFFF = 800000000000FFFF (cc=1) -+alcr 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFF0000FFFE (cc=3) -+alcgr 0 + 0000000000000000 + 000000000000FFFF = 000000000000FFFF (cc=1) -+alcgr 0 + 0000000000000001 + 000000000000FFFF = 0000000000010000 (cc=1) -+alcgr 0 + 000000000000FFFF + 000000000000FFFF = 000000000001FFFE (cc=1) -+alcgr 0 + 0000000000007FFF + 000000000000FFFF = 0000000000017FFE (cc=1) -+alcgr 0 + 0000000000008000 + 000000000000FFFF = 0000000000017FFF (cc=1) -+alcgr 0 + 00000000FFFFFFFF + 000000000000FFFF = 000000010000FFFE (cc=1) -+alcgr 0 + 0000000080000000 + 000000000000FFFF = 000000008000FFFF (cc=1) -+alcgr 0 + 000000007FFFFFFF + 000000000000FFFF = 000000008000FFFE (cc=1) -+alcgr 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = 000000000000FFFE (cc=3) -+alcgr 0 + 8000000000000000 + 000000000000FFFF = 800000000000FFFF (cc=1) -+alcgr 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 800000000000FFFE (cc=1) -+alc 1 + 0000000000000000 + 000000000000FFFF = 0000000000000001 (cc=1) -+alc 1 + 0000000000000001 + 000000000000FFFF = 0000000000000002 (cc=1) -+alc 1 + 000000000000FFFF + 000000000000FFFF = 0000000000010000 (cc=1) -+alc 1 + 0000000000007FFF + 000000000000FFFF = 0000000000008000 (cc=1) -+alc 1 + 0000000000008000 + 000000000000FFFF = 0000000000008001 (cc=1) -+alc 1 + 00000000FFFFFFFF + 000000000000FFFF = 0000000000000000 (cc=2) -+alc 1 + 0000000080000000 + 000000000000FFFF = 0000000080000001 (cc=1) -+alc 1 + 000000007FFFFFFF + 000000000000FFFF = 0000000080000000 (cc=1) -+alc 1 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFF00000000 (cc=2) -+alc 1 + 8000000000000000 + 000000000000FFFF = 8000000000000001 (cc=1) -+alc 1 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFF00000000 (cc=2) -+alcg 1 + 0000000000000000 + 000000000000FFFF = 0000000000010000 (cc=1) -+alcg 1 + 0000000000000001 + 000000000000FFFF = 0000000000010001 (cc=1) -+alcg 1 + 000000000000FFFF + 000000000000FFFF = 000000000001FFFF (cc=1) -+alcg 1 + 0000000000007FFF + 000000000000FFFF = 0000000000017FFF (cc=1) -+alcg 1 + 0000000000008000 + 000000000000FFFF = 0000000000018000 (cc=1) -+alcg 1 + 00000000FFFFFFFF + 000000000000FFFF = 000000010000FFFF (cc=1) -+alcg 1 + 0000000080000000 + 000000000000FFFF = 0000000080010000 (cc=1) -+alcg 1 + 000000007FFFFFFF + 000000000000FFFF = 000000008000FFFF (cc=1) -+alcg 1 + FFFFFFFFFFFFFFFF + 000000000000FFFF = 000000000000FFFF (cc=3) -+alcg 1 + 8000000000000000 + 000000000000FFFF = 8000000000010000 (cc=1) -+alcg 1 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 800000000000FFFF (cc=1) -+alcr 1 + 0000000000000000 + 000000000000FFFF = 0000000000010000 (cc=1) -+alcr 1 + 0000000000000001 + 000000000000FFFF = 0000000000010001 (cc=1) -+alcr 1 + 000000000000FFFF + 000000000000FFFF = 000000000001FFFF (cc=1) -+alcr 1 + 0000000000007FFF + 000000000000FFFF = 0000000000017FFF (cc=1) -+alcr 1 + 0000000000008000 + 000000000000FFFF = 0000000000018000 (cc=1) -+alcr 1 + 00000000FFFFFFFF + 000000000000FFFF = 000000000000FFFF (cc=3) -+alcr 1 + 0000000080000000 + 000000000000FFFF = 0000000080010000 (cc=1) -+alcr 1 + 000000007FFFFFFF + 000000000000FFFF = 000000008000FFFF (cc=1) -+alcr 1 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFF0000FFFF (cc=3) -+alcr 1 + 8000000000000000 + 000000000000FFFF = 8000000000010000 (cc=1) -+alcr 1 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFF0000FFFF (cc=3) -+alcgr 1 + 0000000000000000 + 000000000000FFFF = 0000000000010000 (cc=1) -+alcgr 1 + 0000000000000001 + 000000000000FFFF = 0000000000010001 (cc=1) -+alcgr 1 + 000000000000FFFF + 000000000000FFFF = 000000000001FFFF (cc=1) -+alcgr 1 + 0000000000007FFF + 000000000000FFFF = 0000000000017FFF (cc=1) -+alcgr 1 + 0000000000008000 + 000000000000FFFF = 0000000000018000 (cc=1) -+alcgr 1 + 00000000FFFFFFFF + 000000000000FFFF = 000000010000FFFF (cc=1) -+alcgr 1 + 0000000080000000 + 000000000000FFFF = 0000000080010000 (cc=1) -+alcgr 1 + 000000007FFFFFFF + 000000000000FFFF = 000000008000FFFF (cc=1) -+alcgr 1 + FFFFFFFFFFFFFFFF + 000000000000FFFF = 000000000000FFFF (cc=3) -+alcgr 1 + 8000000000000000 + 000000000000FFFF = 8000000000010000 (cc=1) -+alcgr 1 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 800000000000FFFF (cc=1) -+ahy 0 + 0000000000000000 + 000000000000FFFF = 0000000000000000 (cc=0) -+ahy 0 + 0000000000000001 + 000000000000FFFF = 0000000000000001 (cc=2) -+ahy 0 + 000000000000FFFF + 000000000000FFFF = 000000000000FFFF (cc=2) -+ahy 0 + 0000000000007FFF + 000000000000FFFF = 0000000000007FFF (cc=2) -+ahy 0 + 0000000000008000 + 000000000000FFFF = 0000000000008000 (cc=2) -+ahy 0 + 00000000FFFFFFFF + 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+ahy 0 + 0000000080000000 + 000000000000FFFF = 0000000080000000 (cc=1) -+ahy 0 + 000000007FFFFFFF + 000000000000FFFF = 000000007FFFFFFF (cc=2) -+ahy 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+ahy 0 + 8000000000000000 + 000000000000FFFF = 8000000000000000 (cc=0) -+ahy 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFFFFFFFFFF (cc=1) -+ay 0 + 0000000000000000 + 000000000000FFFF = 0000000000000000 (cc=0) -+ay 0 + 0000000000000001 + 000000000000FFFF = 0000000000000001 (cc=2) -+ay 0 + 000000000000FFFF + 000000000000FFFF = 000000000000FFFF (cc=2) -+ay 0 + 0000000000007FFF + 000000000000FFFF = 0000000000007FFF (cc=2) -+ay 0 + 0000000000008000 + 000000000000FFFF = 0000000000008000 (cc=2) -+ay 0 + 00000000FFFFFFFF + 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+ay 0 + 0000000080000000 + 000000000000FFFF = 0000000080000000 (cc=1) -+ay 0 + 000000007FFFFFFF + 000000000000FFFF = 000000007FFFFFFF (cc=2) -+ay 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+ay 0 + 8000000000000000 + 000000000000FFFF = 8000000000000000 (cc=0) -+ay 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFFFFFFFFFF (cc=1) -+aly 0 + 0000000000000000 + 000000000000FFFF = 0000000000000000 (cc=0) -+aly 0 + 0000000000000001 + 000000000000FFFF = 0000000000000001 (cc=1) -+aly 0 + 000000000000FFFF + 000000000000FFFF = 000000000000FFFF (cc=1) -+aly 0 + 0000000000007FFF + 000000000000FFFF = 0000000000007FFF (cc=1) -+aly 0 + 0000000000008000 + 000000000000FFFF = 0000000000008000 (cc=1) -+aly 0 + 00000000FFFFFFFF + 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+aly 0 + 0000000080000000 + 000000000000FFFF = 0000000080000000 (cc=1) -+aly 0 + 000000007FFFFFFF + 000000000000FFFF = 000000007FFFFFFF (cc=1) -+aly 0 + FFFFFFFFFFFFFFFF + 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+aly 0 + 8000000000000000 + 000000000000FFFF = 8000000000000000 (cc=0) -+aly 0 + 7FFFFFFFFFFFFFFF + 000000000000FFFF = 7FFFFFFFFFFFFFFF (cc=1) -+ahi 0 + 0000000000000000 + 0000000000000000 = 0000000000000000 (cc=0) -+ahi 0 + 0000000000000001 + 0000000000000000 = 0000000000000001 (cc=2) -+ahi 0 + 000000000000FFFF + 0000000000000000 = 000000000000FFFF (cc=2) -+ahi 0 + 0000000000007FFF + 0000000000000000 = 0000000000007FFF (cc=2) -+ahi 0 + 0000000000008000 + 0000000000000000 = 0000000000008000 (cc=2) -+ahi 0 + 00000000FFFFFFFF + 0000000000000000 = 00000000FFFFFFFF (cc=1) -+ahi 0 + 0000000080000000 + 0000000000000000 = 0000000080000000 (cc=1) -+ahi 0 + 000000007FFFFFFF + 0000000000000000 = 000000007FFFFFFF (cc=2) -+ahi 0 + FFFFFFFFFFFFFFFF + 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+ahi 0 + 8000000000000000 + 0000000000000000 = 8000000000000000 (cc=0) -+ahi 0 + 7FFFFFFFFFFFFFFF + 0000000000000000 = 7FFFFFFFFFFFFFFF (cc=1) -+ahi 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+ahi 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=0) -+ahi 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFE (cc=2) -+ahi 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFE (cc=2) -+ahi 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=2) -+ahi 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=1) -+ahi 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=3) -+ahi 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=2) -+ahi 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=1) -+ahi 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 80000000FFFFFFFF (cc=1) -+ahi 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=1) -+ahi 0 + 0000000000000000 + FFFFFFFFFFFF8000 = 00000000FFFF8000 (cc=1) -+ahi 0 + 0000000000000001 + FFFFFFFFFFFF8000 = 00000000FFFF8001 (cc=1) -+ahi 0 + 000000000000FFFF + FFFFFFFFFFFF8000 = 0000000000007FFF (cc=2) -+ahi 0 + 0000000000007FFF + FFFFFFFFFFFF8000 = 00000000FFFFFFFF (cc=1) -+ahi 0 + 0000000000008000 + FFFFFFFFFFFF8000 = 0000000000000000 (cc=0) -+ahi 0 + 00000000FFFFFFFF + FFFFFFFFFFFF8000 = 00000000FFFF7FFF (cc=1) -+ahi 0 + 0000000080000000 + FFFFFFFFFFFF8000 = 000000007FFF8000 (cc=3) -+ahi 0 + 000000007FFFFFFF + FFFFFFFFFFFF8000 = 000000007FFF7FFF (cc=2) -+ahi 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFF8000 = FFFFFFFFFFFF7FFF (cc=1) -+ahi 0 + 8000000000000000 + FFFFFFFFFFFF8000 = 80000000FFFF8000 (cc=1) -+ahi 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFF8000 = 7FFFFFFFFFFF7FFF (cc=1) -+ahi 0 + 0000000000000000 + 0000000000007FFF = 0000000000007FFF (cc=2) -+ahi 0 + 0000000000000001 + 0000000000007FFF = 0000000000008000 (cc=2) -+ahi 0 + 000000000000FFFF + 0000000000007FFF = 0000000000017FFE (cc=2) -+ahi 0 + 0000000000007FFF + 0000000000007FFF = 000000000000FFFE (cc=2) -+ahi 0 + 0000000000008000 + 0000000000007FFF = 000000000000FFFF (cc=2) -+ahi 0 + 00000000FFFFFFFF + 0000000000007FFF = 0000000000007FFE (cc=2) -+ahi 0 + 0000000080000000 + 0000000000007FFF = 0000000080007FFF (cc=1) -+ahi 0 + 000000007FFFFFFF + 0000000000007FFF = 0000000080007FFE (cc=3) -+ahi 0 + FFFFFFFFFFFFFFFF + 0000000000007FFF = FFFFFFFF00007FFE (cc=2) -+ahi 0 + 8000000000000000 + 0000000000007FFF = 8000000000007FFF (cc=2) -+ahi 0 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 7FFFFFFF00007FFE (cc=2) -+aghi 0 + 0000000000000000 + 0000000000000000 = 0000000000000000 (cc=0) -+aghi 0 + 0000000000000001 + 0000000000000000 = 0000000000000001 (cc=2) -+aghi 0 + 000000000000FFFF + 0000000000000000 = 000000000000FFFF (cc=2) -+aghi 0 + 0000000000007FFF + 0000000000000000 = 0000000000007FFF (cc=2) -+aghi 0 + 0000000000008000 + 0000000000000000 = 0000000000008000 (cc=2) -+aghi 0 + 00000000FFFFFFFF + 0000000000000000 = 00000000FFFFFFFF (cc=2) -+aghi 0 + 0000000080000000 + 0000000000000000 = 0000000080000000 (cc=2) -+aghi 0 + 000000007FFFFFFF + 0000000000000000 = 000000007FFFFFFF (cc=2) -+aghi 0 + FFFFFFFFFFFFFFFF + 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+aghi 0 + 8000000000000000 + 0000000000000000 = 8000000000000000 (cc=1) -+aghi 0 + 7FFFFFFFFFFFFFFF + 0000000000000000 = 7FFFFFFFFFFFFFFF (cc=2) -+aghi 0 + 0000000000000000 + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+aghi 0 + 0000000000000001 + FFFFFFFFFFFFFFFF = 0000000000000000 (cc=0) -+aghi 0 + 000000000000FFFF + FFFFFFFFFFFFFFFF = 000000000000FFFE (cc=2) -+aghi 0 + 0000000000007FFF + FFFFFFFFFFFFFFFF = 0000000000007FFE (cc=2) -+aghi 0 + 0000000000008000 + FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=2) -+aghi 0 + 00000000FFFFFFFF + FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=2) -+aghi 0 + 0000000080000000 + FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=2) -+aghi 0 + 000000007FFFFFFF + FFFFFFFFFFFFFFFF = 000000007FFFFFFE (cc=2) -+aghi 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=1) -+aghi 0 + 8000000000000000 + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF (cc=3) -+aghi 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE (cc=2) -+aghi 0 + 0000000000000000 + FFFFFFFFFFFF8000 = FFFFFFFFFFFF8000 (cc=1) -+aghi 0 + 0000000000000001 + FFFFFFFFFFFF8000 = FFFFFFFFFFFF8001 (cc=1) -+aghi 0 + 000000000000FFFF + FFFFFFFFFFFF8000 = 0000000000007FFF (cc=2) -+aghi 0 + 0000000000007FFF + FFFFFFFFFFFF8000 = FFFFFFFFFFFFFFFF (cc=1) -+aghi 0 + 0000000000008000 + FFFFFFFFFFFF8000 = 0000000000000000 (cc=0) -+aghi 0 + 00000000FFFFFFFF + FFFFFFFFFFFF8000 = 00000000FFFF7FFF (cc=2) -+aghi 0 + 0000000080000000 + FFFFFFFFFFFF8000 = 000000007FFF8000 (cc=2) -+aghi 0 + 000000007FFFFFFF + FFFFFFFFFFFF8000 = 000000007FFF7FFF (cc=2) -+aghi 0 + FFFFFFFFFFFFFFFF + FFFFFFFFFFFF8000 = FFFFFFFFFFFF7FFF (cc=1) -+aghi 0 + 8000000000000000 + FFFFFFFFFFFF8000 = 7FFFFFFFFFFF8000 (cc=3) -+aghi 0 + 7FFFFFFFFFFFFFFF + FFFFFFFFFFFF8000 = 7FFFFFFFFFFF7FFF (cc=2) -+aghi 0 + 0000000000000000 + 0000000000007FFF = 0000000000007FFF (cc=2) -+aghi 0 + 0000000000000001 + 0000000000007FFF = 0000000000008000 (cc=2) -+aghi 0 + 000000000000FFFF + 0000000000007FFF = 0000000000017FFE (cc=2) -+aghi 0 + 0000000000007FFF + 0000000000007FFF = 000000000000FFFE (cc=2) -+aghi 0 + 0000000000008000 + 0000000000007FFF = 000000000000FFFF (cc=2) -+aghi 0 + 00000000FFFFFFFF + 0000000000007FFF = 0000000100007FFE (cc=2) -+aghi 0 + 0000000080000000 + 0000000000007FFF = 0000000080007FFF (cc=2) -+aghi 0 + 000000007FFFFFFF + 0000000000007FFF = 0000000080007FFE (cc=2) -+aghi 0 + FFFFFFFFFFFFFFFF + 0000000000007FFF = 0000000000007FFE (cc=2) -+aghi 0 + 8000000000000000 + 0000000000007FFF = 8000000000007FFF (cc=1) -+aghi 0 + 7FFFFFFFFFFFFFFF + 0000000000007FFF = 8000000000007FFE (cc=3) ---- none/tests/s390x/add.vgtest -+++ none/tests/s390x/add.vgtest -@@ -0,0 +1 @@ -+prog: add ---- none/tests/s390x/and.c -+++ none/tests/s390x/and.c -@@ -0,0 +1,79 @@ -+#include -+#include "and.h" -+ -+static void do_imm_insns(void) -+{ -+ memimmsweep(ni, 0); -+ memimmsweep(ni, 255); -+ memimmsweep(ni, 128); -+ memimmsweep(ni, 0xaa); -+ memimmsweep(ni, 0x55); -+ memimmsweep(niy, 0); -+ memimmsweep(niy, 255); -+ memimmsweep(niy, 128); -+ memimmsweep(niy, 0xaa); -+ memimmsweep(niy, 0x55); -+ immsweep(nihh, 0x55); -+ immsweep(nihl, 0x55); -+ immsweep(nilh, 0x55); -+ immsweep(nill, 0x55); -+ immsweep(nihh, 0xaa); -+ immsweep(nihl, 0xaa); -+ immsweep(nilh, 0xaa); -+ immsweep(nill, 0xaa); -+ immsweep(nihh, 0xff); -+ immsweep(nihl, 0xff); -+ immsweep(nilh, 0xff); -+ immsweep(nill, 0xff); -+ immsweep(nihh, 0x0); -+ immsweep(nihl, 0x0); -+ immsweep(nilh, 0x0); -+ immsweep(nill, 0x0); -+ immsweep(nihh, 0xffff); -+ immsweep(nihl, 0xffff); -+ immsweep(nilh, 0xffff); -+ immsweep(nill, 0xffff); -+ immsweep(nihh, 0xaaaa); -+ immsweep(nihl, 0xaaaa); -+ immsweep(nilh, 0xaaaa); -+ immsweep(nill, 0xaaaa); -+ immsweep(nihh, 0x5555); -+ immsweep(nihl, 0x5555); -+ immsweep(nilh, 0x5555); -+ immsweep(nill, 0x5555); -+} -+ -+ -+static void do_regmem_insns(unsigned long s2) -+{ -+ memsweep(n, s2); -+ memsweep(ng, s2); -+ regsweep(nr, s2); -+ regsweep(ngr, s2); -+ memsweep(ny, s2); -+} -+ -+int main() -+{ -+ do_regmem_insns(0x0ul); -+ do_regmem_insns(0x5555555555555555ul); -+ do_regmem_insns(0xaaaaaaaaaaaaaaaaul); -+ do_regmem_insns(0x8000000000000000ul); -+ do_regmem_insns(0xfffffffffffffffful); -+ do_regmem_insns(0x7fffffff00000000ul); -+ do_regmem_insns(0x8000000000000000ul); -+ do_regmem_insns(0xaaaaaaaa00000000ul); -+ do_regmem_insns(0xffffffff00000000ul); -+ do_regmem_insns(0x000000007ffffffful); -+ do_regmem_insns(0x0000000080000000ul); -+ do_regmem_insns(0x0000000055555555ul); -+ do_regmem_insns(0x00000000fffffffful); -+ do_regmem_insns(0x000000000000fffful); -+ do_regmem_insns(0x0000000000007ffful); -+ do_regmem_insns(0x0000000000008000ul); -+ do_regmem_insns(0x000000000000fffful); -+ -+ do_imm_insns(); -+ -+ return 0; -+} ---- none/tests/s390x/and_EI.c -+++ none/tests/s390x/and_EI.c -@@ -0,0 +1,27 @@ -+#include -+#include "and.h" -+ -+static void do_imm_insns(void) -+{ -+ immsweep(nihf, 0); -+ immsweep(nihf, 0xff); -+ immsweep(nihf, 0x55); -+ immsweep(nihf, 0xaa); -+ immsweep(nihf, 0xffff); -+ immsweep(nihf, 0x5555); -+ immsweep(nihf, 0xaaaa); -+ immsweep(nihf, 0xffff0000); -+ immsweep(nihf, 0x55550000); -+ immsweep(nihf, 0xaaaa0000); -+ immsweep(nihf, 0xffffffff); -+ immsweep(nihf, 0x55555555); -+ immsweep(nihf, 0xaaaaaaaa); -+} -+ -+ -+int main() -+{ -+ do_imm_insns(); -+ -+ return 0; -+} ---- none/tests/s390x/and_EI.stderr.exp -+++ none/tests/s390x/and_EI.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/and_EI.stdout.exp -+++ none/tests/s390x/and_EI.stdout.exp -@@ -0,0 +1,156 @@ -+nihf + 0000000000000000 & 0000000000000000 = 0000000000000000 (cc=0) -+nihf + 0000000000000001 & 0000000000000000 = 0000000000000001 (cc=0) -+nihf + 000000000000FFFF & 0000000000000000 = 000000000000FFFF (cc=0) -+nihf + 0000000000007FFF & 0000000000000000 = 0000000000007FFF (cc=0) -+nihf + 0000000000008000 & 0000000000000000 = 0000000000008000 (cc=0) -+nihf + 00000000FFFFFFFF & 0000000000000000 = 00000000FFFFFFFF (cc=0) -+nihf + 0000000080000000 & 0000000000000000 = 0000000080000000 (cc=0) -+nihf + 000000007FFFFFFF & 0000000000000000 = 000000007FFFFFFF (cc=0) -+nihf + AAAAAAAAAAAAAAAA & 0000000000000000 = 00000000AAAAAAAA (cc=0) -+nihf + 8000000000000000 & 0000000000000000 = 0000000000000000 (cc=0) -+nihf + FFFFFFFFFFFFFFFF & 0000000000000000 = 00000000FFFFFFFF (cc=0) -+nihf + 5555555555555555 & 0000000000000000 = 0000000055555555 (cc=0) -+nihf + 0000000000000000 & 00000000000000FF = 0000000000000000 (cc=0) -+nihf + 0000000000000001 & 00000000000000FF = 0000000000000001 (cc=0) -+nihf + 000000000000FFFF & 00000000000000FF = 000000000000FFFF (cc=0) -+nihf + 0000000000007FFF & 00000000000000FF = 0000000000007FFF (cc=0) -+nihf + 0000000000008000 & 00000000000000FF = 0000000000008000 (cc=0) -+nihf + 00000000FFFFFFFF & 00000000000000FF = 00000000FFFFFFFF (cc=0) -+nihf + 0000000080000000 & 00000000000000FF = 0000000080000000 (cc=0) -+nihf + 000000007FFFFFFF & 00000000000000FF = 000000007FFFFFFF (cc=0) -+nihf + AAAAAAAAAAAAAAAA & 00000000000000FF = 000000AAAAAAAAAA (cc=1) -+nihf + 8000000000000000 & 00000000000000FF = 0000000000000000 (cc=0) -+nihf + FFFFFFFFFFFFFFFF & 00000000000000FF = 000000FFFFFFFFFF (cc=1) -+nihf + 5555555555555555 & 00000000000000FF = 0000005555555555 (cc=1) -+nihf + 0000000000000000 & 0000000000000055 = 0000000000000000 (cc=0) -+nihf + 0000000000000001 & 0000000000000055 = 0000000000000001 (cc=0) -+nihf + 000000000000FFFF & 0000000000000055 = 000000000000FFFF (cc=0) -+nihf + 0000000000007FFF & 0000000000000055 = 0000000000007FFF (cc=0) -+nihf + 0000000000008000 & 0000000000000055 = 0000000000008000 (cc=0) -+nihf + 00000000FFFFFFFF & 0000000000000055 = 00000000FFFFFFFF (cc=0) -+nihf + 0000000080000000 & 0000000000000055 = 0000000080000000 (cc=0) -+nihf + 000000007FFFFFFF & 0000000000000055 = 000000007FFFFFFF (cc=0) -+nihf + AAAAAAAAAAAAAAAA & 0000000000000055 = 00000000AAAAAAAA (cc=0) -+nihf + 8000000000000000 & 0000000000000055 = 0000000000000000 (cc=0) -+nihf + FFFFFFFFFFFFFFFF & 0000000000000055 = 00000055FFFFFFFF (cc=1) -+nihf + 5555555555555555 & 0000000000000055 = 0000005555555555 (cc=1) -+nihf + 0000000000000000 & 00000000000000AA = 0000000000000000 (cc=0) -+nihf + 0000000000000001 & 00000000000000AA = 0000000000000001 (cc=0) -+nihf + 000000000000FFFF & 00000000000000AA = 000000000000FFFF (cc=0) -+nihf + 0000000000007FFF & 00000000000000AA = 0000000000007FFF (cc=0) -+nihf + 0000000000008000 & 00000000000000AA = 0000000000008000 (cc=0) -+nihf + 00000000FFFFFFFF & 00000000000000AA = 00000000FFFFFFFF (cc=0) -+nihf + 0000000080000000 & 00000000000000AA = 0000000080000000 (cc=0) -+nihf + 000000007FFFFFFF & 00000000000000AA = 000000007FFFFFFF (cc=0) -+nihf + AAAAAAAAAAAAAAAA & 00000000000000AA = 000000AAAAAAAAAA (cc=1) -+nihf + 8000000000000000 & 00000000000000AA = 0000000000000000 (cc=0) -+nihf + FFFFFFFFFFFFFFFF & 00000000000000AA = 000000AAFFFFFFFF (cc=1) -+nihf + 5555555555555555 & 00000000000000AA = 0000000055555555 (cc=0) -+nihf + 0000000000000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+nihf + 0000000000000001 & 000000000000FFFF = 0000000000000001 (cc=0) -+nihf + 000000000000FFFF & 000000000000FFFF = 000000000000FFFF (cc=0) -+nihf + 0000000000007FFF & 000000000000FFFF = 0000000000007FFF (cc=0) -+nihf + 0000000000008000 & 000000000000FFFF = 0000000000008000 (cc=0) -+nihf + 00000000FFFFFFFF & 000000000000FFFF = 00000000FFFFFFFF (cc=0) -+nihf + 0000000080000000 & 000000000000FFFF = 0000000080000000 (cc=0) -+nihf + 000000007FFFFFFF & 000000000000FFFF = 000000007FFFFFFF (cc=0) -+nihf + AAAAAAAAAAAAAAAA & 000000000000FFFF = 0000AAAAAAAAAAAA (cc=1) -+nihf + 8000000000000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+nihf + FFFFFFFFFFFFFFFF & 000000000000FFFF = 0000FFFFFFFFFFFF (cc=1) -+nihf + 5555555555555555 & 000000000000FFFF = 0000555555555555 (cc=1) -+nihf + 0000000000000000 & 0000000000005555 = 0000000000000000 (cc=0) -+nihf + 0000000000000001 & 0000000000005555 = 0000000000000001 (cc=0) -+nihf + 000000000000FFFF & 0000000000005555 = 000000000000FFFF (cc=0) -+nihf + 0000000000007FFF & 0000000000005555 = 0000000000007FFF (cc=0) -+nihf + 0000000000008000 & 0000000000005555 = 0000000000008000 (cc=0) -+nihf + 00000000FFFFFFFF & 0000000000005555 = 00000000FFFFFFFF (cc=0) -+nihf + 0000000080000000 & 0000000000005555 = 0000000080000000 (cc=0) -+nihf + 000000007FFFFFFF & 0000000000005555 = 000000007FFFFFFF (cc=0) -+nihf + AAAAAAAAAAAAAAAA & 0000000000005555 = 00000000AAAAAAAA (cc=0) -+nihf + 8000000000000000 & 0000000000005555 = 0000000000000000 (cc=0) -+nihf + FFFFFFFFFFFFFFFF & 0000000000005555 = 00005555FFFFFFFF (cc=1) -+nihf + 5555555555555555 & 0000000000005555 = 0000555555555555 (cc=1) -+nihf + 0000000000000000 & 000000000000AAAA = 0000000000000000 (cc=0) -+nihf + 0000000000000001 & 000000000000AAAA = 0000000000000001 (cc=0) -+nihf + 000000000000FFFF & 000000000000AAAA = 000000000000FFFF (cc=0) -+nihf + 0000000000007FFF & 000000000000AAAA = 0000000000007FFF (cc=0) -+nihf + 0000000000008000 & 000000000000AAAA = 0000000000008000 (cc=0) -+nihf + 00000000FFFFFFFF & 000000000000AAAA = 00000000FFFFFFFF (cc=0) -+nihf + 0000000080000000 & 000000000000AAAA = 0000000080000000 (cc=0) -+nihf + 000000007FFFFFFF & 000000000000AAAA = 000000007FFFFFFF (cc=0) -+nihf + AAAAAAAAAAAAAAAA & 000000000000AAAA = 0000AAAAAAAAAAAA (cc=1) -+nihf + 8000000000000000 & 000000000000AAAA = 0000000000000000 (cc=0) -+nihf + FFFFFFFFFFFFFFFF & 000000000000AAAA = 0000AAAAFFFFFFFF (cc=1) -+nihf + 5555555555555555 & 000000000000AAAA = 0000000055555555 (cc=0) -+nihf + 0000000000000000 & 00000000FFFF0000 = 0000000000000000 (cc=0) -+nihf + 0000000000000001 & 00000000FFFF0000 = 0000000000000001 (cc=0) -+nihf + 000000000000FFFF & 00000000FFFF0000 = 000000000000FFFF (cc=0) -+nihf + 0000000000007FFF & 00000000FFFF0000 = 0000000000007FFF (cc=0) -+nihf + 0000000000008000 & 00000000FFFF0000 = 0000000000008000 (cc=0) -+nihf + 00000000FFFFFFFF & 00000000FFFF0000 = 00000000FFFFFFFF (cc=0) -+nihf + 0000000080000000 & 00000000FFFF0000 = 0000000080000000 (cc=0) -+nihf + 000000007FFFFFFF & 00000000FFFF0000 = 000000007FFFFFFF (cc=0) -+nihf + AAAAAAAAAAAAAAAA & 00000000FFFF0000 = AAAA0000AAAAAAAA (cc=1) -+nihf + 8000000000000000 & 00000000FFFF0000 = 8000000000000000 (cc=1) -+nihf + FFFFFFFFFFFFFFFF & 00000000FFFF0000 = FFFF0000FFFFFFFF (cc=1) -+nihf + 5555555555555555 & 00000000FFFF0000 = 5555000055555555 (cc=1) -+nihf + 0000000000000000 & 0000000055550000 = 0000000000000000 (cc=0) -+nihf + 0000000000000001 & 0000000055550000 = 0000000000000001 (cc=0) -+nihf + 000000000000FFFF & 0000000055550000 = 000000000000FFFF (cc=0) -+nihf + 0000000000007FFF & 0000000055550000 = 0000000000007FFF (cc=0) -+nihf + 0000000000008000 & 0000000055550000 = 0000000000008000 (cc=0) -+nihf + 00000000FFFFFFFF & 0000000055550000 = 00000000FFFFFFFF (cc=0) -+nihf + 0000000080000000 & 0000000055550000 = 0000000080000000 (cc=0) -+nihf + 000000007FFFFFFF & 0000000055550000 = 000000007FFFFFFF (cc=0) -+nihf + AAAAAAAAAAAAAAAA & 0000000055550000 = 00000000AAAAAAAA (cc=0) -+nihf + 8000000000000000 & 0000000055550000 = 0000000000000000 (cc=0) -+nihf + FFFFFFFFFFFFFFFF & 0000000055550000 = 55550000FFFFFFFF (cc=1) -+nihf + 5555555555555555 & 0000000055550000 = 5555000055555555 (cc=1) -+nihf + 0000000000000000 & 00000000AAAA0000 = 0000000000000000 (cc=0) -+nihf + 0000000000000001 & 00000000AAAA0000 = 0000000000000001 (cc=0) -+nihf + 000000000000FFFF & 00000000AAAA0000 = 000000000000FFFF (cc=0) -+nihf + 0000000000007FFF & 00000000AAAA0000 = 0000000000007FFF (cc=0) -+nihf + 0000000000008000 & 00000000AAAA0000 = 0000000000008000 (cc=0) -+nihf + 00000000FFFFFFFF & 00000000AAAA0000 = 00000000FFFFFFFF (cc=0) -+nihf + 0000000080000000 & 00000000AAAA0000 = 0000000080000000 (cc=0) -+nihf + 000000007FFFFFFF & 00000000AAAA0000 = 000000007FFFFFFF (cc=0) -+nihf + AAAAAAAAAAAAAAAA & 00000000AAAA0000 = AAAA0000AAAAAAAA (cc=1) -+nihf + 8000000000000000 & 00000000AAAA0000 = 8000000000000000 (cc=1) -+nihf + FFFFFFFFFFFFFFFF & 00000000AAAA0000 = AAAA0000FFFFFFFF (cc=1) -+nihf + 5555555555555555 & 00000000AAAA0000 = 0000000055555555 (cc=0) -+nihf + 0000000000000000 & 00000000FFFFFFFF = 0000000000000000 (cc=0) -+nihf + 0000000000000001 & 00000000FFFFFFFF = 0000000000000001 (cc=0) -+nihf + 000000000000FFFF & 00000000FFFFFFFF = 000000000000FFFF (cc=0) -+nihf + 0000000000007FFF & 00000000FFFFFFFF = 0000000000007FFF (cc=0) -+nihf + 0000000000008000 & 00000000FFFFFFFF = 0000000000008000 (cc=0) -+nihf + 00000000FFFFFFFF & 00000000FFFFFFFF = 00000000FFFFFFFF (cc=0) -+nihf + 0000000080000000 & 00000000FFFFFFFF = 0000000080000000 (cc=0) -+nihf + 000000007FFFFFFF & 00000000FFFFFFFF = 000000007FFFFFFF (cc=0) -+nihf + AAAAAAAAAAAAAAAA & 00000000FFFFFFFF = AAAAAAAAAAAAAAAA (cc=1) -+nihf + 8000000000000000 & 00000000FFFFFFFF = 8000000000000000 (cc=1) -+nihf + FFFFFFFFFFFFFFFF & 00000000FFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+nihf + 5555555555555555 & 00000000FFFFFFFF = 5555555555555555 (cc=1) -+nihf + 0000000000000000 & 0000000055555555 = 0000000000000000 (cc=0) -+nihf + 0000000000000001 & 0000000055555555 = 0000000000000001 (cc=0) -+nihf + 000000000000FFFF & 0000000055555555 = 000000000000FFFF (cc=0) -+nihf + 0000000000007FFF & 0000000055555555 = 0000000000007FFF (cc=0) -+nihf + 0000000000008000 & 0000000055555555 = 0000000000008000 (cc=0) -+nihf + 00000000FFFFFFFF & 0000000055555555 = 00000000FFFFFFFF (cc=0) -+nihf + 0000000080000000 & 0000000055555555 = 0000000080000000 (cc=0) -+nihf + 000000007FFFFFFF & 0000000055555555 = 000000007FFFFFFF (cc=0) -+nihf + AAAAAAAAAAAAAAAA & 0000000055555555 = 00000000AAAAAAAA (cc=0) -+nihf + 8000000000000000 & 0000000055555555 = 0000000000000000 (cc=0) -+nihf + FFFFFFFFFFFFFFFF & 0000000055555555 = 55555555FFFFFFFF (cc=1) -+nihf + 5555555555555555 & 0000000055555555 = 5555555555555555 (cc=1) -+nihf + 0000000000000000 & 00000000AAAAAAAA = 0000000000000000 (cc=0) -+nihf + 0000000000000001 & 00000000AAAAAAAA = 0000000000000001 (cc=0) -+nihf + 000000000000FFFF & 00000000AAAAAAAA = 000000000000FFFF (cc=0) -+nihf + 0000000000007FFF & 00000000AAAAAAAA = 0000000000007FFF (cc=0) -+nihf + 0000000000008000 & 00000000AAAAAAAA = 0000000000008000 (cc=0) -+nihf + 00000000FFFFFFFF & 00000000AAAAAAAA = 00000000FFFFFFFF (cc=0) -+nihf + 0000000080000000 & 00000000AAAAAAAA = 0000000080000000 (cc=0) -+nihf + 000000007FFFFFFF & 00000000AAAAAAAA = 000000007FFFFFFF (cc=0) -+nihf + AAAAAAAAAAAAAAAA & 00000000AAAAAAAA = AAAAAAAAAAAAAAAA (cc=1) -+nihf + 8000000000000000 & 00000000AAAAAAAA = 8000000000000000 (cc=1) -+nihf + FFFFFFFFFFFFFFFF & 00000000AAAAAAAA = AAAAAAAAFFFFFFFF (cc=1) -+nihf + 5555555555555555 & 00000000AAAAAAAA = 0000000055555555 (cc=0) ---- none/tests/s390x/and_EI.vgtest -+++ none/tests/s390x/and_EI.vgtest -@@ -0,0 +1,2 @@ -+prog: and_EI -+prereq: test -x and_EI ---- none/tests/s390x/and.h -+++ none/tests/s390x/and.h -@@ -0,0 +1,120 @@ -+#include -+ -+#define AND_REG_MEM(insn, s1, s2) \ -+({ \ -+ unsigned long tmp = s1; \ -+ int cc; \ -+ asm volatile( #insn " %0, %3\n" \ -+ "ipm %1\n" \ -+ "srl %1,28\n" \ -+ : "+d" (tmp), "=d" (cc) \ -+ : "d" (tmp), "Q" (s2) \ -+ : "0", "cc"); \ -+ printf(#insn " + %16.16lX & %16.16lX = %16.16lX (cc=%d)\n", s1, s2, tmp, cc); \ -+}) -+ -+#define AND_REG_REG(insn, s1, s2) \ -+({ \ -+ unsigned long tmp = s1; \ -+ int cc; \ -+ asm volatile( #insn " %0, %3\n" \ -+ "ipm %1\n" \ -+ "srl %1,28\n" \ -+ : "+d" (tmp), "=d" (cc) \ -+ : "d" (tmp), "d" (s2) \ -+ : "0", "cc"); \ -+ printf(#insn " + %16.16lX & %16.16lX = %16.16lX (cc=%d)\n", s1, s2, tmp, cc); \ -+}) -+ -+#define AND_REG_IMM(insn, s1, s2) \ -+({ \ -+ unsigned long tmp = s1; \ -+ int cc; \ -+ asm volatile( #insn " %0," #s2 "\n" \ -+ "ipm %1\n" \ -+ "srl %1,28\n" \ -+ : "+d" (tmp), "=d" (cc) \ -+ : "d" (tmp) \ -+ : "0", "cc"); \ -+ printf(#insn " + %16.16lX & %16.16lX = %16.16lX (cc=%d)\n", s1, (unsigned long) s2, tmp, cc); \ -+}) -+ -+#define AND_MEM_IMM(insn, s1, s2) \ -+({ \ -+ unsigned long tmp = s1; \ -+ int cc; \ -+ asm volatile( #insn " %0," #s2 "\n" \ -+ "ipm %1\n" \ -+ "srl %1,28\n" \ -+ : "+Q" (tmp), "=d" (cc) \ -+ : "Q" (tmp) \ -+ : "0", "cc"); \ -+ printf(#insn " + %16.16lX & %16.16lX = %16.16lX (cc=%d)\n", s1, (unsigned long) s2, tmp, cc); \ -+}) -+ -+ -+#define memsweep(i, s2) \ -+({ \ -+ AND_REG_MEM(i, 0ul, s2); \ -+ AND_REG_MEM(i, 1ul, s2); \ -+ AND_REG_MEM(i, 0xfffful, s2); \ -+ AND_REG_MEM(i, 0x7ffful, s2); \ -+ AND_REG_MEM(i, 0x8000ul, s2); \ -+ AND_REG_MEM(i, 0xfffffffful, s2); \ -+ AND_REG_MEM(i, 0x80000000ul, s2); \ -+ AND_REG_MEM(i, 0x7ffffffful, s2); \ -+ AND_REG_MEM(i, 0xaaaaaaaaaaaaaaaaul, s2); \ -+ AND_REG_MEM(i, 0x8000000000000000ul, s2); \ -+ AND_REG_MEM(i, 0xfffffffffffffffful, s2); \ -+ AND_REG_MEM(i, 0x5555555555555555ul, s2); \ -+}) -+ -+#define regsweep(i, s2) \ -+({ \ -+ AND_REG_REG(i, 0ul, s2); \ -+ AND_REG_REG(i, 1ul, s2); \ -+ AND_REG_REG(i, 0xfffful, s2); \ -+ AND_REG_REG(i, 0x7ffful, s2); \ -+ AND_REG_REG(i, 0x8000ul, s2); \ -+ AND_REG_REG(i, 0xfffffffful, s2); \ -+ AND_REG_REG(i, 0x80000000ul, s2); \ -+ AND_REG_REG(i, 0x7ffffffful, s2); \ -+ AND_REG_REG(i, 0xaaaaaaaaaaaaaaaaul, s2); \ -+ AND_REG_REG(i, 0x8000000000000000ul, s2); \ -+ AND_REG_REG(i, 0xfffffffffffffffful, s2); \ -+ AND_REG_REG(i, 0x5555555555555555ul, s2); \ -+}) -+ -+#define immsweep(i, s2) \ -+({ \ -+ AND_REG_IMM(i, 0ul, s2); \ -+ AND_REG_IMM(i, 1ul, s2); \ -+ AND_REG_IMM(i, 0xfffful, s2); \ -+ AND_REG_IMM(i, 0x7ffful, s2); \ -+ AND_REG_IMM(i, 0x8000ul, s2); \ -+ AND_REG_IMM(i, 0xfffffffful, s2); \ -+ AND_REG_IMM(i, 0x80000000ul, s2); \ -+ AND_REG_IMM(i, 0x7ffffffful, s2); \ -+ AND_REG_IMM(i, 0xaaaaaaaaaaaaaaaaul, s2); \ -+ AND_REG_IMM(i, 0x8000000000000000ul, s2); \ -+ AND_REG_IMM(i, 0xfffffffffffffffful, s2); \ -+ AND_REG_IMM(i, 0x5555555555555555ul, s2); \ -+}) -+ -+#define memimmsweep(i, s2) \ -+({ \ -+ AND_MEM_IMM(i, 0ul, s2); \ -+ AND_MEM_IMM(i, 1ul, s2); \ -+ AND_MEM_IMM(i, 0xfffful, s2); \ -+ AND_MEM_IMM(i, 0x7ffful, s2); \ -+ AND_MEM_IMM(i, 0x8000ul, s2); \ -+ AND_MEM_IMM(i, 0xfffffffful, s2); \ -+ AND_MEM_IMM(i, 0x80000000ul, s2); \ -+ AND_MEM_IMM(i, 0x7ffffffful, s2); \ -+ AND_MEM_IMM(i, 0xaaaaaaaaaaaaaaaaul, s2); \ -+ AND_MEM_IMM(i, 0x8000000000000000ul, s2); \ -+ AND_MEM_IMM(i, 0xfffffffffffffffful, s2); \ -+ AND_MEM_IMM(i, 0x5555555555555555ul, s2); \ -+}) -+ -+ ---- none/tests/s390x/and.stderr.exp -+++ none/tests/s390x/and.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/and.stdout.exp -+++ none/tests/s390x/and.stdout.exp -@@ -0,0 +1,1476 @@ -+n + 0000000000000000 & 0000000000000000 = 0000000000000000 (cc=0) -+n + 0000000000000001 & 0000000000000000 = 0000000000000000 (cc=0) -+n + 000000000000FFFF & 0000000000000000 = 0000000000000000 (cc=0) -+n + 0000000000007FFF & 0000000000000000 = 0000000000000000 (cc=0) -+n + 0000000000008000 & 0000000000000000 = 0000000000000000 (cc=0) -+n + 00000000FFFFFFFF & 0000000000000000 = 0000000000000000 (cc=0) -+n + 0000000080000000 & 0000000000000000 = 0000000000000000 (cc=0) -+n + 000000007FFFFFFF & 0000000000000000 = 0000000000000000 (cc=0) -+n + AAAAAAAAAAAAAAAA & 0000000000000000 = AAAAAAAA00000000 (cc=0) -+n + 8000000000000000 & 0000000000000000 = 8000000000000000 (cc=0) -+n + FFFFFFFFFFFFFFFF & 0000000000000000 = FFFFFFFF00000000 (cc=0) -+n + 5555555555555555 & 0000000000000000 = 5555555500000000 (cc=0) -+ng + 0000000000000000 & 0000000000000000 = 0000000000000000 (cc=0) -+ng + 0000000000000001 & 0000000000000000 = 0000000000000000 (cc=0) -+ng + 000000000000FFFF & 0000000000000000 = 0000000000000000 (cc=0) -+ng + 0000000000007FFF & 0000000000000000 = 0000000000000000 (cc=0) -+ng + 0000000000008000 & 0000000000000000 = 0000000000000000 (cc=0) -+ng + 00000000FFFFFFFF & 0000000000000000 = 0000000000000000 (cc=0) -+ng + 0000000080000000 & 0000000000000000 = 0000000000000000 (cc=0) -+ng + 000000007FFFFFFF & 0000000000000000 = 0000000000000000 (cc=0) -+ng + AAAAAAAAAAAAAAAA & 0000000000000000 = 0000000000000000 (cc=0) -+ng + 8000000000000000 & 0000000000000000 = 0000000000000000 (cc=0) -+ng + FFFFFFFFFFFFFFFF & 0000000000000000 = 0000000000000000 (cc=0) -+ng + 5555555555555555 & 0000000000000000 = 0000000000000000 (cc=0) -+nr + 0000000000000000 & 0000000000000000 = 0000000000000000 (cc=0) -+nr + 0000000000000001 & 0000000000000000 = 0000000000000000 (cc=0) -+nr + 000000000000FFFF & 0000000000000000 = 0000000000000000 (cc=0) -+nr + 0000000000007FFF & 0000000000000000 = 0000000000000000 (cc=0) -+nr + 0000000000008000 & 0000000000000000 = 0000000000000000 (cc=0) -+nr + 00000000FFFFFFFF & 0000000000000000 = 0000000000000000 (cc=0) -+nr + 0000000080000000 & 0000000000000000 = 0000000000000000 (cc=0) -+nr + 000000007FFFFFFF & 0000000000000000 = 0000000000000000 (cc=0) -+nr + AAAAAAAAAAAAAAAA & 0000000000000000 = AAAAAAAA00000000 (cc=0) -+nr + 8000000000000000 & 0000000000000000 = 8000000000000000 (cc=0) -+nr + FFFFFFFFFFFFFFFF & 0000000000000000 = FFFFFFFF00000000 (cc=0) -+nr + 5555555555555555 & 0000000000000000 = 5555555500000000 (cc=0) -+ngr + 0000000000000000 & 0000000000000000 = 0000000000000000 (cc=0) -+ngr + 0000000000000001 & 0000000000000000 = 0000000000000000 (cc=0) -+ngr + 000000000000FFFF & 0000000000000000 = 0000000000000000 (cc=0) -+ngr + 0000000000007FFF & 0000000000000000 = 0000000000000000 (cc=0) -+ngr + 0000000000008000 & 0000000000000000 = 0000000000000000 (cc=0) -+ngr + 00000000FFFFFFFF & 0000000000000000 = 0000000000000000 (cc=0) -+ngr + 0000000080000000 & 0000000000000000 = 0000000000000000 (cc=0) -+ngr + 000000007FFFFFFF & 0000000000000000 = 0000000000000000 (cc=0) -+ngr + AAAAAAAAAAAAAAAA & 0000000000000000 = 0000000000000000 (cc=0) -+ngr + 8000000000000000 & 0000000000000000 = 0000000000000000 (cc=0) -+ngr + FFFFFFFFFFFFFFFF & 0000000000000000 = 0000000000000000 (cc=0) -+ngr + 5555555555555555 & 0000000000000000 = 0000000000000000 (cc=0) -+ny + 0000000000000000 & 0000000000000000 = 0000000000000000 (cc=0) -+ny + 0000000000000001 & 0000000000000000 = 0000000000000000 (cc=0) -+ny + 000000000000FFFF & 0000000000000000 = 0000000000000000 (cc=0) -+ny + 0000000000007FFF & 0000000000000000 = 0000000000000000 (cc=0) -+ny + 0000000000008000 & 0000000000000000 = 0000000000000000 (cc=0) -+ny + 00000000FFFFFFFF & 0000000000000000 = 0000000000000000 (cc=0) -+ny + 0000000080000000 & 0000000000000000 = 0000000000000000 (cc=0) -+ny + 000000007FFFFFFF & 0000000000000000 = 0000000000000000 (cc=0) -+ny + AAAAAAAAAAAAAAAA & 0000000000000000 = AAAAAAAA00000000 (cc=0) -+ny + 8000000000000000 & 0000000000000000 = 8000000000000000 (cc=0) -+ny + FFFFFFFFFFFFFFFF & 0000000000000000 = FFFFFFFF00000000 (cc=0) -+ny + 5555555555555555 & 0000000000000000 = 5555555500000000 (cc=0) -+n + 0000000000000000 & 5555555555555555 = 0000000000000000 (cc=0) -+n + 0000000000000001 & 5555555555555555 = 0000000000000001 (cc=1) -+n + 000000000000FFFF & 5555555555555555 = 0000000000005555 (cc=1) -+n + 0000000000007FFF & 5555555555555555 = 0000000000005555 (cc=1) -+n + 0000000000008000 & 5555555555555555 = 0000000000000000 (cc=0) -+n + 00000000FFFFFFFF & 5555555555555555 = 0000000055555555 (cc=1) -+n + 0000000080000000 & 5555555555555555 = 0000000000000000 (cc=0) -+n + 000000007FFFFFFF & 5555555555555555 = 0000000055555555 (cc=1) -+n + AAAAAAAAAAAAAAAA & 5555555555555555 = AAAAAAAA00000000 (cc=0) -+n + 8000000000000000 & 5555555555555555 = 8000000000000000 (cc=0) -+n + FFFFFFFFFFFFFFFF & 5555555555555555 = FFFFFFFF55555555 (cc=1) -+n + 5555555555555555 & 5555555555555555 = 5555555555555555 (cc=1) -+ng + 0000000000000000 & 5555555555555555 = 0000000000000000 (cc=0) -+ng + 0000000000000001 & 5555555555555555 = 0000000000000001 (cc=1) -+ng + 000000000000FFFF & 5555555555555555 = 0000000000005555 (cc=1) -+ng + 0000000000007FFF & 5555555555555555 = 0000000000005555 (cc=1) -+ng + 0000000000008000 & 5555555555555555 = 0000000000000000 (cc=0) -+ng + 00000000FFFFFFFF & 5555555555555555 = 0000000055555555 (cc=1) -+ng + 0000000080000000 & 5555555555555555 = 0000000000000000 (cc=0) -+ng + 000000007FFFFFFF & 5555555555555555 = 0000000055555555 (cc=1) -+ng + AAAAAAAAAAAAAAAA & 5555555555555555 = 0000000000000000 (cc=0) -+ng + 8000000000000000 & 5555555555555555 = 0000000000000000 (cc=0) -+ng + FFFFFFFFFFFFFFFF & 5555555555555555 = 5555555555555555 (cc=1) -+ng + 5555555555555555 & 5555555555555555 = 5555555555555555 (cc=1) -+nr + 0000000000000000 & 5555555555555555 = 0000000000000000 (cc=0) -+nr + 0000000000000001 & 5555555555555555 = 0000000000000001 (cc=1) -+nr + 000000000000FFFF & 5555555555555555 = 0000000000005555 (cc=1) -+nr + 0000000000007FFF & 5555555555555555 = 0000000000005555 (cc=1) -+nr + 0000000000008000 & 5555555555555555 = 0000000000000000 (cc=0) -+nr + 00000000FFFFFFFF & 5555555555555555 = 0000000055555555 (cc=1) -+nr + 0000000080000000 & 5555555555555555 = 0000000000000000 (cc=0) -+nr + 000000007FFFFFFF & 5555555555555555 = 0000000055555555 (cc=1) -+nr + AAAAAAAAAAAAAAAA & 5555555555555555 = AAAAAAAA00000000 (cc=0) -+nr + 8000000000000000 & 5555555555555555 = 8000000000000000 (cc=0) -+nr + FFFFFFFFFFFFFFFF & 5555555555555555 = FFFFFFFF55555555 (cc=1) -+nr + 5555555555555555 & 5555555555555555 = 5555555555555555 (cc=1) -+ngr + 0000000000000000 & 5555555555555555 = 0000000000000000 (cc=0) -+ngr + 0000000000000001 & 5555555555555555 = 0000000000000001 (cc=1) -+ngr + 000000000000FFFF & 5555555555555555 = 0000000000005555 (cc=1) -+ngr + 0000000000007FFF & 5555555555555555 = 0000000000005555 (cc=1) -+ngr + 0000000000008000 & 5555555555555555 = 0000000000000000 (cc=0) -+ngr + 00000000FFFFFFFF & 5555555555555555 = 0000000055555555 (cc=1) -+ngr + 0000000080000000 & 5555555555555555 = 0000000000000000 (cc=0) -+ngr + 000000007FFFFFFF & 5555555555555555 = 0000000055555555 (cc=1) -+ngr + AAAAAAAAAAAAAAAA & 5555555555555555 = 0000000000000000 (cc=0) -+ngr + 8000000000000000 & 5555555555555555 = 0000000000000000 (cc=0) -+ngr + FFFFFFFFFFFFFFFF & 5555555555555555 = 5555555555555555 (cc=1) -+ngr + 5555555555555555 & 5555555555555555 = 5555555555555555 (cc=1) -+ny + 0000000000000000 & 5555555555555555 = 0000000000000000 (cc=0) -+ny + 0000000000000001 & 5555555555555555 = 0000000000000001 (cc=1) -+ny + 000000000000FFFF & 5555555555555555 = 0000000000005555 (cc=1) -+ny + 0000000000007FFF & 5555555555555555 = 0000000000005555 (cc=1) -+ny + 0000000000008000 & 5555555555555555 = 0000000000000000 (cc=0) -+ny + 00000000FFFFFFFF & 5555555555555555 = 0000000055555555 (cc=1) -+ny + 0000000080000000 & 5555555555555555 = 0000000000000000 (cc=0) -+ny + 000000007FFFFFFF & 5555555555555555 = 0000000055555555 (cc=1) -+ny + AAAAAAAAAAAAAAAA & 5555555555555555 = AAAAAAAA00000000 (cc=0) -+ny + 8000000000000000 & 5555555555555555 = 8000000000000000 (cc=0) -+ny + FFFFFFFFFFFFFFFF & 5555555555555555 = FFFFFFFF55555555 (cc=1) -+ny + 5555555555555555 & 5555555555555555 = 5555555555555555 (cc=1) -+n + 0000000000000000 & AAAAAAAAAAAAAAAA = 0000000000000000 (cc=0) -+n + 0000000000000001 & AAAAAAAAAAAAAAAA = 0000000000000000 (cc=0) -+n + 000000000000FFFF & AAAAAAAAAAAAAAAA = 000000000000AAAA (cc=1) -+n + 0000000000007FFF & AAAAAAAAAAAAAAAA = 0000000000002AAA (cc=1) -+n + 0000000000008000 & AAAAAAAAAAAAAAAA = 0000000000008000 (cc=1) -+n + 00000000FFFFFFFF & AAAAAAAAAAAAAAAA = 00000000AAAAAAAA (cc=1) -+n + 0000000080000000 & AAAAAAAAAAAAAAAA = 0000000080000000 (cc=1) -+n + 000000007FFFFFFF & AAAAAAAAAAAAAAAA = 000000002AAAAAAA (cc=1) -+n + AAAAAAAAAAAAAAAA & AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAA (cc=1) -+n + 8000000000000000 & AAAAAAAAAAAAAAAA = 8000000000000000 (cc=0) -+n + FFFFFFFFFFFFFFFF & AAAAAAAAAAAAAAAA = FFFFFFFFAAAAAAAA (cc=1) -+n + 5555555555555555 & AAAAAAAAAAAAAAAA = 5555555500000000 (cc=0) -+ng + 0000000000000000 & AAAAAAAAAAAAAAAA = 0000000000000000 (cc=0) -+ng + 0000000000000001 & AAAAAAAAAAAAAAAA = 0000000000000000 (cc=0) -+ng + 000000000000FFFF & AAAAAAAAAAAAAAAA = 000000000000AAAA (cc=1) -+ng + 0000000000007FFF & AAAAAAAAAAAAAAAA = 0000000000002AAA (cc=1) -+ng + 0000000000008000 & AAAAAAAAAAAAAAAA = 0000000000008000 (cc=1) -+ng + 00000000FFFFFFFF & AAAAAAAAAAAAAAAA = 00000000AAAAAAAA (cc=1) -+ng + 0000000080000000 & AAAAAAAAAAAAAAAA = 0000000080000000 (cc=1) -+ng + 000000007FFFFFFF & AAAAAAAAAAAAAAAA = 000000002AAAAAAA (cc=1) -+ng + AAAAAAAAAAAAAAAA & AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAA (cc=1) -+ng + 8000000000000000 & AAAAAAAAAAAAAAAA = 8000000000000000 (cc=1) -+ng + FFFFFFFFFFFFFFFF & AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAA (cc=1) -+ng + 5555555555555555 & AAAAAAAAAAAAAAAA = 0000000000000000 (cc=0) -+nr + 0000000000000000 & AAAAAAAAAAAAAAAA = 0000000000000000 (cc=0) -+nr + 0000000000000001 & AAAAAAAAAAAAAAAA = 0000000000000000 (cc=0) -+nr + 000000000000FFFF & AAAAAAAAAAAAAAAA = 000000000000AAAA (cc=1) -+nr + 0000000000007FFF & AAAAAAAAAAAAAAAA = 0000000000002AAA (cc=1) -+nr + 0000000000008000 & AAAAAAAAAAAAAAAA = 0000000000008000 (cc=1) -+nr + 00000000FFFFFFFF & AAAAAAAAAAAAAAAA = 00000000AAAAAAAA (cc=1) -+nr + 0000000080000000 & AAAAAAAAAAAAAAAA = 0000000080000000 (cc=1) -+nr + 000000007FFFFFFF & AAAAAAAAAAAAAAAA = 000000002AAAAAAA (cc=1) -+nr + AAAAAAAAAAAAAAAA & AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAA (cc=1) -+nr + 8000000000000000 & AAAAAAAAAAAAAAAA = 8000000000000000 (cc=0) -+nr + FFFFFFFFFFFFFFFF & AAAAAAAAAAAAAAAA = FFFFFFFFAAAAAAAA (cc=1) -+nr + 5555555555555555 & AAAAAAAAAAAAAAAA = 5555555500000000 (cc=0) -+ngr + 0000000000000000 & AAAAAAAAAAAAAAAA = 0000000000000000 (cc=0) -+ngr + 0000000000000001 & AAAAAAAAAAAAAAAA = 0000000000000000 (cc=0) -+ngr + 000000000000FFFF & AAAAAAAAAAAAAAAA = 000000000000AAAA (cc=1) -+ngr + 0000000000007FFF & AAAAAAAAAAAAAAAA = 0000000000002AAA (cc=1) -+ngr + 0000000000008000 & AAAAAAAAAAAAAAAA = 0000000000008000 (cc=1) -+ngr + 00000000FFFFFFFF & AAAAAAAAAAAAAAAA = 00000000AAAAAAAA (cc=1) -+ngr + 0000000080000000 & AAAAAAAAAAAAAAAA = 0000000080000000 (cc=1) -+ngr + 000000007FFFFFFF & AAAAAAAAAAAAAAAA = 000000002AAAAAAA (cc=1) -+ngr + AAAAAAAAAAAAAAAA & AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAA (cc=1) -+ngr + 8000000000000000 & AAAAAAAAAAAAAAAA = 8000000000000000 (cc=1) -+ngr + FFFFFFFFFFFFFFFF & AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAA (cc=1) -+ngr + 5555555555555555 & AAAAAAAAAAAAAAAA = 0000000000000000 (cc=0) -+ny + 0000000000000000 & AAAAAAAAAAAAAAAA = 0000000000000000 (cc=0) -+ny + 0000000000000001 & AAAAAAAAAAAAAAAA = 0000000000000000 (cc=0) -+ny + 000000000000FFFF & AAAAAAAAAAAAAAAA = 000000000000AAAA (cc=1) -+ny + 0000000000007FFF & AAAAAAAAAAAAAAAA = 0000000000002AAA (cc=1) -+ny + 0000000000008000 & AAAAAAAAAAAAAAAA = 0000000000008000 (cc=1) -+ny + 00000000FFFFFFFF & AAAAAAAAAAAAAAAA = 00000000AAAAAAAA (cc=1) -+ny + 0000000080000000 & AAAAAAAAAAAAAAAA = 0000000080000000 (cc=1) -+ny + 000000007FFFFFFF & AAAAAAAAAAAAAAAA = 000000002AAAAAAA (cc=1) -+ny + AAAAAAAAAAAAAAAA & AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAA (cc=1) -+ny + 8000000000000000 & AAAAAAAAAAAAAAAA = 8000000000000000 (cc=0) -+ny + FFFFFFFFFFFFFFFF & AAAAAAAAAAAAAAAA = FFFFFFFFAAAAAAAA (cc=1) -+ny + 5555555555555555 & AAAAAAAAAAAAAAAA = 5555555500000000 (cc=0) -+n + 0000000000000000 & 8000000000000000 = 0000000000000000 (cc=0) -+n + 0000000000000001 & 8000000000000000 = 0000000000000000 (cc=0) -+n + 000000000000FFFF & 8000000000000000 = 0000000000000000 (cc=0) -+n + 0000000000007FFF & 8000000000000000 = 0000000000000000 (cc=0) -+n + 0000000000008000 & 8000000000000000 = 0000000000000000 (cc=0) -+n + 00000000FFFFFFFF & 8000000000000000 = 0000000080000000 (cc=1) -+n + 0000000080000000 & 8000000000000000 = 0000000080000000 (cc=1) -+n + 000000007FFFFFFF & 8000000000000000 = 0000000000000000 (cc=0) -+n + AAAAAAAAAAAAAAAA & 8000000000000000 = AAAAAAAA80000000 (cc=1) -+n + 8000000000000000 & 8000000000000000 = 8000000000000000 (cc=0) -+n + FFFFFFFFFFFFFFFF & 8000000000000000 = FFFFFFFF80000000 (cc=1) -+n + 5555555555555555 & 8000000000000000 = 5555555500000000 (cc=0) -+ng + 0000000000000000 & 8000000000000000 = 0000000000000000 (cc=0) -+ng + 0000000000000001 & 8000000000000000 = 0000000000000000 (cc=0) -+ng + 000000000000FFFF & 8000000000000000 = 0000000000000000 (cc=0) -+ng + 0000000000007FFF & 8000000000000000 = 0000000000000000 (cc=0) -+ng + 0000000000008000 & 8000000000000000 = 0000000000000000 (cc=0) -+ng + 00000000FFFFFFFF & 8000000000000000 = 0000000000000000 (cc=0) -+ng + 0000000080000000 & 8000000000000000 = 0000000000000000 (cc=0) -+ng + 000000007FFFFFFF & 8000000000000000 = 0000000000000000 (cc=0) -+ng + AAAAAAAAAAAAAAAA & 8000000000000000 = 8000000000000000 (cc=1) -+ng + 8000000000000000 & 8000000000000000 = 8000000000000000 (cc=1) -+ng + FFFFFFFFFFFFFFFF & 8000000000000000 = 8000000000000000 (cc=1) -+ng + 5555555555555555 & 8000000000000000 = 0000000000000000 (cc=0) -+nr + 0000000000000000 & 8000000000000000 = 0000000000000000 (cc=0) -+nr + 0000000000000001 & 8000000000000000 = 0000000000000000 (cc=0) -+nr + 000000000000FFFF & 8000000000000000 = 0000000000000000 (cc=0) -+nr + 0000000000007FFF & 8000000000000000 = 0000000000000000 (cc=0) -+nr + 0000000000008000 & 8000000000000000 = 0000000000000000 (cc=0) -+nr + 00000000FFFFFFFF & 8000000000000000 = 0000000000000000 (cc=0) -+nr + 0000000080000000 & 8000000000000000 = 0000000000000000 (cc=0) -+nr + 000000007FFFFFFF & 8000000000000000 = 0000000000000000 (cc=0) -+nr + AAAAAAAAAAAAAAAA & 8000000000000000 = AAAAAAAA00000000 (cc=0) -+nr + 8000000000000000 & 8000000000000000 = 8000000000000000 (cc=0) -+nr + FFFFFFFFFFFFFFFF & 8000000000000000 = FFFFFFFF00000000 (cc=0) -+nr + 5555555555555555 & 8000000000000000 = 5555555500000000 (cc=0) -+ngr + 0000000000000000 & 8000000000000000 = 0000000000000000 (cc=0) -+ngr + 0000000000000001 & 8000000000000000 = 0000000000000000 (cc=0) -+ngr + 000000000000FFFF & 8000000000000000 = 0000000000000000 (cc=0) -+ngr + 0000000000007FFF & 8000000000000000 = 0000000000000000 (cc=0) -+ngr + 0000000000008000 & 8000000000000000 = 0000000000000000 (cc=0) -+ngr + 00000000FFFFFFFF & 8000000000000000 = 0000000000000000 (cc=0) -+ngr + 0000000080000000 & 8000000000000000 = 0000000000000000 (cc=0) -+ngr + 000000007FFFFFFF & 8000000000000000 = 0000000000000000 (cc=0) -+ngr + AAAAAAAAAAAAAAAA & 8000000000000000 = 8000000000000000 (cc=1) -+ngr + 8000000000000000 & 8000000000000000 = 8000000000000000 (cc=1) -+ngr + FFFFFFFFFFFFFFFF & 8000000000000000 = 8000000000000000 (cc=1) -+ngr + 5555555555555555 & 8000000000000000 = 0000000000000000 (cc=0) -+ny + 0000000000000000 & 8000000000000000 = 0000000000000000 (cc=0) -+ny + 0000000000000001 & 8000000000000000 = 0000000000000000 (cc=0) -+ny + 000000000000FFFF & 8000000000000000 = 0000000000000000 (cc=0) -+ny + 0000000000007FFF & 8000000000000000 = 0000000000000000 (cc=0) -+ny + 0000000000008000 & 8000000000000000 = 0000000000000000 (cc=0) -+ny + 00000000FFFFFFFF & 8000000000000000 = 0000000080000000 (cc=1) -+ny + 0000000080000000 & 8000000000000000 = 0000000080000000 (cc=1) -+ny + 000000007FFFFFFF & 8000000000000000 = 0000000000000000 (cc=0) -+ny + AAAAAAAAAAAAAAAA & 8000000000000000 = AAAAAAAA80000000 (cc=1) -+ny + 8000000000000000 & 8000000000000000 = 8000000000000000 (cc=0) -+ny + FFFFFFFFFFFFFFFF & 8000000000000000 = FFFFFFFF80000000 (cc=1) -+ny + 5555555555555555 & 8000000000000000 = 5555555500000000 (cc=0) -+n + 0000000000000000 & FFFFFFFFFFFFFFFF = 0000000000000000 (cc=0) -+n + 0000000000000001 & FFFFFFFFFFFFFFFF = 0000000000000001 (cc=1) -+n + 000000000000FFFF & FFFFFFFFFFFFFFFF = 000000000000FFFF (cc=1) -+n + 0000000000007FFF & FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=1) -+n + 0000000000008000 & FFFFFFFFFFFFFFFF = 0000000000008000 (cc=1) -+n + 00000000FFFFFFFF & FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+n + 0000000080000000 & FFFFFFFFFFFFFFFF = 0000000080000000 (cc=1) -+n + 000000007FFFFFFF & FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=1) -+n + AAAAAAAAAAAAAAAA & FFFFFFFFFFFFFFFF = AAAAAAAAAAAAAAAA (cc=1) -+n + 8000000000000000 & FFFFFFFFFFFFFFFF = 8000000000000000 (cc=0) -+n + FFFFFFFFFFFFFFFF & FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+n + 5555555555555555 & FFFFFFFFFFFFFFFF = 5555555555555555 (cc=1) -+ng + 0000000000000000 & FFFFFFFFFFFFFFFF = 0000000000000000 (cc=0) -+ng + 0000000000000001 & FFFFFFFFFFFFFFFF = 0000000000000001 (cc=1) -+ng + 000000000000FFFF & FFFFFFFFFFFFFFFF = 000000000000FFFF (cc=1) -+ng + 0000000000007FFF & FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=1) -+ng + 0000000000008000 & FFFFFFFFFFFFFFFF = 0000000000008000 (cc=1) -+ng + 00000000FFFFFFFF & FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+ng + 0000000080000000 & FFFFFFFFFFFFFFFF = 0000000080000000 (cc=1) -+ng + 000000007FFFFFFF & FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=1) -+ng + AAAAAAAAAAAAAAAA & FFFFFFFFFFFFFFFF = AAAAAAAAAAAAAAAA (cc=1) -+ng + 8000000000000000 & FFFFFFFFFFFFFFFF = 8000000000000000 (cc=1) -+ng + FFFFFFFFFFFFFFFF & FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+ng + 5555555555555555 & FFFFFFFFFFFFFFFF = 5555555555555555 (cc=1) -+nr + 0000000000000000 & FFFFFFFFFFFFFFFF = 0000000000000000 (cc=0) -+nr + 0000000000000001 & FFFFFFFFFFFFFFFF = 0000000000000001 (cc=1) -+nr + 000000000000FFFF & FFFFFFFFFFFFFFFF = 000000000000FFFF (cc=1) -+nr + 0000000000007FFF & FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=1) -+nr + 0000000000008000 & FFFFFFFFFFFFFFFF = 0000000000008000 (cc=1) -+nr + 00000000FFFFFFFF & FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+nr + 0000000080000000 & FFFFFFFFFFFFFFFF = 0000000080000000 (cc=1) -+nr + 000000007FFFFFFF & FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=1) -+nr + AAAAAAAAAAAAAAAA & FFFFFFFFFFFFFFFF = AAAAAAAAAAAAAAAA (cc=1) -+nr + 8000000000000000 & FFFFFFFFFFFFFFFF = 8000000000000000 (cc=0) -+nr + FFFFFFFFFFFFFFFF & FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+nr + 5555555555555555 & FFFFFFFFFFFFFFFF = 5555555555555555 (cc=1) -+ngr + 0000000000000000 & FFFFFFFFFFFFFFFF = 0000000000000000 (cc=0) -+ngr + 0000000000000001 & FFFFFFFFFFFFFFFF = 0000000000000001 (cc=1) -+ngr + 000000000000FFFF & FFFFFFFFFFFFFFFF = 000000000000FFFF (cc=1) -+ngr + 0000000000007FFF & FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=1) -+ngr + 0000000000008000 & FFFFFFFFFFFFFFFF = 0000000000008000 (cc=1) -+ngr + 00000000FFFFFFFF & FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+ngr + 0000000080000000 & FFFFFFFFFFFFFFFF = 0000000080000000 (cc=1) -+ngr + 000000007FFFFFFF & FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=1) -+ngr + AAAAAAAAAAAAAAAA & FFFFFFFFFFFFFFFF = AAAAAAAAAAAAAAAA (cc=1) -+ngr + 8000000000000000 & FFFFFFFFFFFFFFFF = 8000000000000000 (cc=1) -+ngr + FFFFFFFFFFFFFFFF & FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+ngr + 5555555555555555 & FFFFFFFFFFFFFFFF = 5555555555555555 (cc=1) -+ny + 0000000000000000 & FFFFFFFFFFFFFFFF = 0000000000000000 (cc=0) -+ny + 0000000000000001 & FFFFFFFFFFFFFFFF = 0000000000000001 (cc=1) -+ny + 000000000000FFFF & FFFFFFFFFFFFFFFF = 000000000000FFFF (cc=1) -+ny + 0000000000007FFF & FFFFFFFFFFFFFFFF = 0000000000007FFF (cc=1) -+ny + 0000000000008000 & FFFFFFFFFFFFFFFF = 0000000000008000 (cc=1) -+ny + 00000000FFFFFFFF & FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+ny + 0000000080000000 & FFFFFFFFFFFFFFFF = 0000000080000000 (cc=1) -+ny + 000000007FFFFFFF & FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=1) -+ny + AAAAAAAAAAAAAAAA & FFFFFFFFFFFFFFFF = AAAAAAAAAAAAAAAA (cc=1) -+ny + 8000000000000000 & FFFFFFFFFFFFFFFF = 8000000000000000 (cc=0) -+ny + FFFFFFFFFFFFFFFF & FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+ny + 5555555555555555 & FFFFFFFFFFFFFFFF = 5555555555555555 (cc=1) -+n + 0000000000000000 & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+n + 0000000000000001 & 7FFFFFFF00000000 = 0000000000000001 (cc=1) -+n + 000000000000FFFF & 7FFFFFFF00000000 = 000000000000FFFF (cc=1) -+n + 0000000000007FFF & 7FFFFFFF00000000 = 0000000000007FFF (cc=1) -+n + 0000000000008000 & 7FFFFFFF00000000 = 0000000000008000 (cc=1) -+n + 00000000FFFFFFFF & 7FFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+n + 0000000080000000 & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+n + 000000007FFFFFFF & 7FFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+n + AAAAAAAAAAAAAAAA & 7FFFFFFF00000000 = AAAAAAAA2AAAAAAA (cc=1) -+n + 8000000000000000 & 7FFFFFFF00000000 = 8000000000000000 (cc=0) -+n + FFFFFFFFFFFFFFFF & 7FFFFFFF00000000 = FFFFFFFF7FFFFFFF (cc=1) -+n + 5555555555555555 & 7FFFFFFF00000000 = 5555555555555555 (cc=1) -+ng + 0000000000000000 & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+ng + 0000000000000001 & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+ng + 000000000000FFFF & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+ng + 0000000000007FFF & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+ng + 0000000000008000 & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+ng + 00000000FFFFFFFF & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+ng + 0000000080000000 & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+ng + 000000007FFFFFFF & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+ng + AAAAAAAAAAAAAAAA & 7FFFFFFF00000000 = 2AAAAAAA00000000 (cc=1) -+ng + 8000000000000000 & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+ng + FFFFFFFFFFFFFFFF & 7FFFFFFF00000000 = 7FFFFFFF00000000 (cc=1) -+ng + 5555555555555555 & 7FFFFFFF00000000 = 5555555500000000 (cc=1) -+nr + 0000000000000000 & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+nr + 0000000000000001 & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+nr + 000000000000FFFF & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+nr + 0000000000007FFF & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+nr + 0000000000008000 & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+nr + 00000000FFFFFFFF & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+nr + 0000000080000000 & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+nr + 000000007FFFFFFF & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+nr + AAAAAAAAAAAAAAAA & 7FFFFFFF00000000 = AAAAAAAA00000000 (cc=0) -+nr + 8000000000000000 & 7FFFFFFF00000000 = 8000000000000000 (cc=0) -+nr + FFFFFFFFFFFFFFFF & 7FFFFFFF00000000 = FFFFFFFF00000000 (cc=0) -+nr + 5555555555555555 & 7FFFFFFF00000000 = 5555555500000000 (cc=0) -+ngr + 0000000000000000 & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+ngr + 0000000000000001 & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+ngr + 000000000000FFFF & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+ngr + 0000000000007FFF & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+ngr + 0000000000008000 & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+ngr + 00000000FFFFFFFF & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+ngr + 0000000080000000 & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+ngr + 000000007FFFFFFF & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+ngr + AAAAAAAAAAAAAAAA & 7FFFFFFF00000000 = 2AAAAAAA00000000 (cc=1) -+ngr + 8000000000000000 & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+ngr + FFFFFFFFFFFFFFFF & 7FFFFFFF00000000 = 7FFFFFFF00000000 (cc=1) -+ngr + 5555555555555555 & 7FFFFFFF00000000 = 5555555500000000 (cc=1) -+ny + 0000000000000000 & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+ny + 0000000000000001 & 7FFFFFFF00000000 = 0000000000000001 (cc=1) -+ny + 000000000000FFFF & 7FFFFFFF00000000 = 000000000000FFFF (cc=1) -+ny + 0000000000007FFF & 7FFFFFFF00000000 = 0000000000007FFF (cc=1) -+ny + 0000000000008000 & 7FFFFFFF00000000 = 0000000000008000 (cc=1) -+ny + 00000000FFFFFFFF & 7FFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+ny + 0000000080000000 & 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+ny + 000000007FFFFFFF & 7FFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+ny + AAAAAAAAAAAAAAAA & 7FFFFFFF00000000 = AAAAAAAA2AAAAAAA (cc=1) -+ny + 8000000000000000 & 7FFFFFFF00000000 = 8000000000000000 (cc=0) -+ny + FFFFFFFFFFFFFFFF & 7FFFFFFF00000000 = FFFFFFFF7FFFFFFF (cc=1) -+ny + 5555555555555555 & 7FFFFFFF00000000 = 5555555555555555 (cc=1) -+n + 0000000000000000 & 8000000000000000 = 0000000000000000 (cc=0) -+n + 0000000000000001 & 8000000000000000 = 0000000000000000 (cc=0) -+n + 000000000000FFFF & 8000000000000000 = 0000000000000000 (cc=0) -+n + 0000000000007FFF & 8000000000000000 = 0000000000000000 (cc=0) -+n + 0000000000008000 & 8000000000000000 = 0000000000000000 (cc=0) -+n + 00000000FFFFFFFF & 8000000000000000 = 0000000080000000 (cc=1) -+n + 0000000080000000 & 8000000000000000 = 0000000080000000 (cc=1) -+n + 000000007FFFFFFF & 8000000000000000 = 0000000000000000 (cc=0) -+n + AAAAAAAAAAAAAAAA & 8000000000000000 = AAAAAAAA80000000 (cc=1) -+n + 8000000000000000 & 8000000000000000 = 8000000000000000 (cc=0) -+n + FFFFFFFFFFFFFFFF & 8000000000000000 = FFFFFFFF80000000 (cc=1) -+n + 5555555555555555 & 8000000000000000 = 5555555500000000 (cc=0) -+ng + 0000000000000000 & 8000000000000000 = 0000000000000000 (cc=0) -+ng + 0000000000000001 & 8000000000000000 = 0000000000000000 (cc=0) -+ng + 000000000000FFFF & 8000000000000000 = 0000000000000000 (cc=0) -+ng + 0000000000007FFF & 8000000000000000 = 0000000000000000 (cc=0) -+ng + 0000000000008000 & 8000000000000000 = 0000000000000000 (cc=0) -+ng + 00000000FFFFFFFF & 8000000000000000 = 0000000000000000 (cc=0) -+ng + 0000000080000000 & 8000000000000000 = 0000000000000000 (cc=0) -+ng + 000000007FFFFFFF & 8000000000000000 = 0000000000000000 (cc=0) -+ng + AAAAAAAAAAAAAAAA & 8000000000000000 = 8000000000000000 (cc=1) -+ng + 8000000000000000 & 8000000000000000 = 8000000000000000 (cc=1) -+ng + FFFFFFFFFFFFFFFF & 8000000000000000 = 8000000000000000 (cc=1) -+ng + 5555555555555555 & 8000000000000000 = 0000000000000000 (cc=0) -+nr + 0000000000000000 & 8000000000000000 = 0000000000000000 (cc=0) -+nr + 0000000000000001 & 8000000000000000 = 0000000000000000 (cc=0) -+nr + 000000000000FFFF & 8000000000000000 = 0000000000000000 (cc=0) -+nr + 0000000000007FFF & 8000000000000000 = 0000000000000000 (cc=0) -+nr + 0000000000008000 & 8000000000000000 = 0000000000000000 (cc=0) -+nr + 00000000FFFFFFFF & 8000000000000000 = 0000000000000000 (cc=0) -+nr + 0000000080000000 & 8000000000000000 = 0000000000000000 (cc=0) -+nr + 000000007FFFFFFF & 8000000000000000 = 0000000000000000 (cc=0) -+nr + AAAAAAAAAAAAAAAA & 8000000000000000 = AAAAAAAA00000000 (cc=0) -+nr + 8000000000000000 & 8000000000000000 = 8000000000000000 (cc=0) -+nr + FFFFFFFFFFFFFFFF & 8000000000000000 = FFFFFFFF00000000 (cc=0) -+nr + 5555555555555555 & 8000000000000000 = 5555555500000000 (cc=0) -+ngr + 0000000000000000 & 8000000000000000 = 0000000000000000 (cc=0) -+ngr + 0000000000000001 & 8000000000000000 = 0000000000000000 (cc=0) -+ngr + 000000000000FFFF & 8000000000000000 = 0000000000000000 (cc=0) -+ngr + 0000000000007FFF & 8000000000000000 = 0000000000000000 (cc=0) -+ngr + 0000000000008000 & 8000000000000000 = 0000000000000000 (cc=0) -+ngr + 00000000FFFFFFFF & 8000000000000000 = 0000000000000000 (cc=0) -+ngr + 0000000080000000 & 8000000000000000 = 0000000000000000 (cc=0) -+ngr + 000000007FFFFFFF & 8000000000000000 = 0000000000000000 (cc=0) -+ngr + AAAAAAAAAAAAAAAA & 8000000000000000 = 8000000000000000 (cc=1) -+ngr + 8000000000000000 & 8000000000000000 = 8000000000000000 (cc=1) -+ngr + FFFFFFFFFFFFFFFF & 8000000000000000 = 8000000000000000 (cc=1) -+ngr + 5555555555555555 & 8000000000000000 = 0000000000000000 (cc=0) -+ny + 0000000000000000 & 8000000000000000 = 0000000000000000 (cc=0) -+ny + 0000000000000001 & 8000000000000000 = 0000000000000000 (cc=0) -+ny + 000000000000FFFF & 8000000000000000 = 0000000000000000 (cc=0) -+ny + 0000000000007FFF & 8000000000000000 = 0000000000000000 (cc=0) -+ny + 0000000000008000 & 8000000000000000 = 0000000000000000 (cc=0) -+ny + 00000000FFFFFFFF & 8000000000000000 = 0000000080000000 (cc=1) -+ny + 0000000080000000 & 8000000000000000 = 0000000080000000 (cc=1) -+ny + 000000007FFFFFFF & 8000000000000000 = 0000000000000000 (cc=0) -+ny + AAAAAAAAAAAAAAAA & 8000000000000000 = AAAAAAAA80000000 (cc=1) -+ny + 8000000000000000 & 8000000000000000 = 8000000000000000 (cc=0) -+ny + FFFFFFFFFFFFFFFF & 8000000000000000 = FFFFFFFF80000000 (cc=1) -+ny + 5555555555555555 & 8000000000000000 = 5555555500000000 (cc=0) -+n + 0000000000000000 & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+n + 0000000000000001 & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+n + 000000000000FFFF & AAAAAAAA00000000 = 000000000000AAAA (cc=1) -+n + 0000000000007FFF & AAAAAAAA00000000 = 0000000000002AAA (cc=1) -+n + 0000000000008000 & AAAAAAAA00000000 = 0000000000008000 (cc=1) -+n + 00000000FFFFFFFF & AAAAAAAA00000000 = 00000000AAAAAAAA (cc=1) -+n + 0000000080000000 & AAAAAAAA00000000 = 0000000080000000 (cc=1) -+n + 000000007FFFFFFF & AAAAAAAA00000000 = 000000002AAAAAAA (cc=1) -+n + AAAAAAAAAAAAAAAA & AAAAAAAA00000000 = AAAAAAAAAAAAAAAA (cc=1) -+n + 8000000000000000 & AAAAAAAA00000000 = 8000000000000000 (cc=0) -+n + FFFFFFFFFFFFFFFF & AAAAAAAA00000000 = FFFFFFFFAAAAAAAA (cc=1) -+n + 5555555555555555 & AAAAAAAA00000000 = 5555555500000000 (cc=0) -+ng + 0000000000000000 & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+ng + 0000000000000001 & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+ng + 000000000000FFFF & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+ng + 0000000000007FFF & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+ng + 0000000000008000 & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+ng + 00000000FFFFFFFF & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+ng + 0000000080000000 & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+ng + 000000007FFFFFFF & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+ng + AAAAAAAAAAAAAAAA & AAAAAAAA00000000 = AAAAAAAA00000000 (cc=1) -+ng + 8000000000000000 & AAAAAAAA00000000 = 8000000000000000 (cc=1) -+ng + FFFFFFFFFFFFFFFF & AAAAAAAA00000000 = AAAAAAAA00000000 (cc=1) -+ng + 5555555555555555 & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+nr + 0000000000000000 & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+nr + 0000000000000001 & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+nr + 000000000000FFFF & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+nr + 0000000000007FFF & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+nr + 0000000000008000 & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+nr + 00000000FFFFFFFF & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+nr + 0000000080000000 & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+nr + 000000007FFFFFFF & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+nr + AAAAAAAAAAAAAAAA & AAAAAAAA00000000 = AAAAAAAA00000000 (cc=0) -+nr + 8000000000000000 & AAAAAAAA00000000 = 8000000000000000 (cc=0) -+nr + FFFFFFFFFFFFFFFF & AAAAAAAA00000000 = FFFFFFFF00000000 (cc=0) -+nr + 5555555555555555 & AAAAAAAA00000000 = 5555555500000000 (cc=0) -+ngr + 0000000000000000 & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+ngr + 0000000000000001 & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+ngr + 000000000000FFFF & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+ngr + 0000000000007FFF & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+ngr + 0000000000008000 & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+ngr + 00000000FFFFFFFF & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+ngr + 0000000080000000 & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+ngr + 000000007FFFFFFF & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+ngr + AAAAAAAAAAAAAAAA & AAAAAAAA00000000 = AAAAAAAA00000000 (cc=1) -+ngr + 8000000000000000 & AAAAAAAA00000000 = 8000000000000000 (cc=1) -+ngr + FFFFFFFFFFFFFFFF & AAAAAAAA00000000 = AAAAAAAA00000000 (cc=1) -+ngr + 5555555555555555 & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+ny + 0000000000000000 & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+ny + 0000000000000001 & AAAAAAAA00000000 = 0000000000000000 (cc=0) -+ny + 000000000000FFFF & AAAAAAAA00000000 = 000000000000AAAA (cc=1) -+ny + 0000000000007FFF & AAAAAAAA00000000 = 0000000000002AAA (cc=1) -+ny + 0000000000008000 & AAAAAAAA00000000 = 0000000000008000 (cc=1) -+ny + 00000000FFFFFFFF & AAAAAAAA00000000 = 00000000AAAAAAAA (cc=1) -+ny + 0000000080000000 & AAAAAAAA00000000 = 0000000080000000 (cc=1) -+ny + 000000007FFFFFFF & AAAAAAAA00000000 = 000000002AAAAAAA (cc=1) -+ny + AAAAAAAAAAAAAAAA & AAAAAAAA00000000 = AAAAAAAAAAAAAAAA (cc=1) -+ny + 8000000000000000 & AAAAAAAA00000000 = 8000000000000000 (cc=0) -+ny + FFFFFFFFFFFFFFFF & AAAAAAAA00000000 = FFFFFFFFAAAAAAAA (cc=1) -+ny + 5555555555555555 & AAAAAAAA00000000 = 5555555500000000 (cc=0) -+n + 0000000000000000 & FFFFFFFF00000000 = 0000000000000000 (cc=0) -+n + 0000000000000001 & FFFFFFFF00000000 = 0000000000000001 (cc=1) -+n + 000000000000FFFF & FFFFFFFF00000000 = 000000000000FFFF (cc=1) -+n + 0000000000007FFF & FFFFFFFF00000000 = 0000000000007FFF (cc=1) -+n + 0000000000008000 & FFFFFFFF00000000 = 0000000000008000 (cc=1) -+n + 00000000FFFFFFFF & FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+n + 0000000080000000 & FFFFFFFF00000000 = 0000000080000000 (cc=1) -+n + 000000007FFFFFFF & FFFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+n + AAAAAAAAAAAAAAAA & FFFFFFFF00000000 = AAAAAAAAAAAAAAAA (cc=1) -+n + 8000000000000000 & FFFFFFFF00000000 = 8000000000000000 (cc=0) -+n + FFFFFFFFFFFFFFFF & FFFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+n + 5555555555555555 & FFFFFFFF00000000 = 5555555555555555 (cc=1) -+ng + 0000000000000000 & FFFFFFFF00000000 = 0000000000000000 (cc=0) -+ng + 0000000000000001 & FFFFFFFF00000000 = 0000000000000000 (cc=0) -+ng + 000000000000FFFF & FFFFFFFF00000000 = 0000000000000000 (cc=0) -+ng + 0000000000007FFF & FFFFFFFF00000000 = 0000000000000000 (cc=0) -+ng + 0000000000008000 & FFFFFFFF00000000 = 0000000000000000 (cc=0) -+ng + 00000000FFFFFFFF & FFFFFFFF00000000 = 0000000000000000 (cc=0) -+ng + 0000000080000000 & FFFFFFFF00000000 = 0000000000000000 (cc=0) -+ng + 000000007FFFFFFF & FFFFFFFF00000000 = 0000000000000000 (cc=0) -+ng + AAAAAAAAAAAAAAAA & FFFFFFFF00000000 = AAAAAAAA00000000 (cc=1) -+ng + 8000000000000000 & FFFFFFFF00000000 = 8000000000000000 (cc=1) -+ng + FFFFFFFFFFFFFFFF & FFFFFFFF00000000 = FFFFFFFF00000000 (cc=1) -+ng + 5555555555555555 & FFFFFFFF00000000 = 5555555500000000 (cc=1) -+nr + 0000000000000000 & FFFFFFFF00000000 = 0000000000000000 (cc=0) -+nr + 0000000000000001 & FFFFFFFF00000000 = 0000000000000000 (cc=0) -+nr + 000000000000FFFF & FFFFFFFF00000000 = 0000000000000000 (cc=0) -+nr + 0000000000007FFF & FFFFFFFF00000000 = 0000000000000000 (cc=0) -+nr + 0000000000008000 & FFFFFFFF00000000 = 0000000000000000 (cc=0) -+nr + 00000000FFFFFFFF & FFFFFFFF00000000 = 0000000000000000 (cc=0) -+nr + 0000000080000000 & FFFFFFFF00000000 = 0000000000000000 (cc=0) -+nr + 000000007FFFFFFF & FFFFFFFF00000000 = 0000000000000000 (cc=0) -+nr + AAAAAAAAAAAAAAAA & FFFFFFFF00000000 = AAAAAAAA00000000 (cc=0) -+nr + 8000000000000000 & FFFFFFFF00000000 = 8000000000000000 (cc=0) -+nr + FFFFFFFFFFFFFFFF & FFFFFFFF00000000 = FFFFFFFF00000000 (cc=0) -+nr + 5555555555555555 & FFFFFFFF00000000 = 5555555500000000 (cc=0) -+ngr + 0000000000000000 & FFFFFFFF00000000 = 0000000000000000 (cc=0) -+ngr + 0000000000000001 & FFFFFFFF00000000 = 0000000000000000 (cc=0) -+ngr + 000000000000FFFF & FFFFFFFF00000000 = 0000000000000000 (cc=0) -+ngr + 0000000000007FFF & FFFFFFFF00000000 = 0000000000000000 (cc=0) -+ngr + 0000000000008000 & FFFFFFFF00000000 = 0000000000000000 (cc=0) -+ngr + 00000000FFFFFFFF & FFFFFFFF00000000 = 0000000000000000 (cc=0) -+ngr + 0000000080000000 & FFFFFFFF00000000 = 0000000000000000 (cc=0) -+ngr + 000000007FFFFFFF & FFFFFFFF00000000 = 0000000000000000 (cc=0) -+ngr + AAAAAAAAAAAAAAAA & FFFFFFFF00000000 = AAAAAAAA00000000 (cc=1) -+ngr + 8000000000000000 & FFFFFFFF00000000 = 8000000000000000 (cc=1) -+ngr + FFFFFFFFFFFFFFFF & FFFFFFFF00000000 = FFFFFFFF00000000 (cc=1) -+ngr + 5555555555555555 & FFFFFFFF00000000 = 5555555500000000 (cc=1) -+ny + 0000000000000000 & FFFFFFFF00000000 = 0000000000000000 (cc=0) -+ny + 0000000000000001 & FFFFFFFF00000000 = 0000000000000001 (cc=1) -+ny + 000000000000FFFF & FFFFFFFF00000000 = 000000000000FFFF (cc=1) -+ny + 0000000000007FFF & FFFFFFFF00000000 = 0000000000007FFF (cc=1) -+ny + 0000000000008000 & FFFFFFFF00000000 = 0000000000008000 (cc=1) -+ny + 00000000FFFFFFFF & FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+ny + 0000000080000000 & FFFFFFFF00000000 = 0000000080000000 (cc=1) -+ny + 000000007FFFFFFF & FFFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+ny + AAAAAAAAAAAAAAAA & FFFFFFFF00000000 = AAAAAAAAAAAAAAAA (cc=1) -+ny + 8000000000000000 & FFFFFFFF00000000 = 8000000000000000 (cc=0) -+ny + FFFFFFFFFFFFFFFF & FFFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+ny + 5555555555555555 & FFFFFFFF00000000 = 5555555555555555 (cc=1) -+n + 0000000000000000 & 000000007FFFFFFF = 0000000000000000 (cc=0) -+n + 0000000000000001 & 000000007FFFFFFF = 0000000000000000 (cc=0) -+n + 000000000000FFFF & 000000007FFFFFFF = 0000000000000000 (cc=0) -+n + 0000000000007FFF & 000000007FFFFFFF = 0000000000000000 (cc=0) -+n + 0000000000008000 & 000000007FFFFFFF = 0000000000000000 (cc=0) -+n + 00000000FFFFFFFF & 000000007FFFFFFF = 0000000000000000 (cc=0) -+n + 0000000080000000 & 000000007FFFFFFF = 0000000000000000 (cc=0) -+n + 000000007FFFFFFF & 000000007FFFFFFF = 0000000000000000 (cc=0) -+n + AAAAAAAAAAAAAAAA & 000000007FFFFFFF = AAAAAAAA00000000 (cc=0) -+n + 8000000000000000 & 000000007FFFFFFF = 8000000000000000 (cc=0) -+n + FFFFFFFFFFFFFFFF & 000000007FFFFFFF = FFFFFFFF00000000 (cc=0) -+n + 5555555555555555 & 000000007FFFFFFF = 5555555500000000 (cc=0) -+ng + 0000000000000000 & 000000007FFFFFFF = 0000000000000000 (cc=0) -+ng + 0000000000000001 & 000000007FFFFFFF = 0000000000000001 (cc=1) -+ng + 000000000000FFFF & 000000007FFFFFFF = 000000000000FFFF (cc=1) -+ng + 0000000000007FFF & 000000007FFFFFFF = 0000000000007FFF (cc=1) -+ng + 0000000000008000 & 000000007FFFFFFF = 0000000000008000 (cc=1) -+ng + 00000000FFFFFFFF & 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+ng + 0000000080000000 & 000000007FFFFFFF = 0000000000000000 (cc=0) -+ng + 000000007FFFFFFF & 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+ng + AAAAAAAAAAAAAAAA & 000000007FFFFFFF = 000000002AAAAAAA (cc=1) -+ng + 8000000000000000 & 000000007FFFFFFF = 0000000000000000 (cc=0) -+ng + FFFFFFFFFFFFFFFF & 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+ng + 5555555555555555 & 000000007FFFFFFF = 0000000055555555 (cc=1) -+nr + 0000000000000000 & 000000007FFFFFFF = 0000000000000000 (cc=0) -+nr + 0000000000000001 & 000000007FFFFFFF = 0000000000000001 (cc=1) -+nr + 000000000000FFFF & 000000007FFFFFFF = 000000000000FFFF (cc=1) -+nr + 0000000000007FFF & 000000007FFFFFFF = 0000000000007FFF (cc=1) -+nr + 0000000000008000 & 000000007FFFFFFF = 0000000000008000 (cc=1) -+nr + 00000000FFFFFFFF & 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+nr + 0000000080000000 & 000000007FFFFFFF = 0000000000000000 (cc=0) -+nr + 000000007FFFFFFF & 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+nr + AAAAAAAAAAAAAAAA & 000000007FFFFFFF = AAAAAAAA2AAAAAAA (cc=1) -+nr + 8000000000000000 & 000000007FFFFFFF = 8000000000000000 (cc=0) -+nr + FFFFFFFFFFFFFFFF & 000000007FFFFFFF = FFFFFFFF7FFFFFFF (cc=1) -+nr + 5555555555555555 & 000000007FFFFFFF = 5555555555555555 (cc=1) -+ngr + 0000000000000000 & 000000007FFFFFFF = 0000000000000000 (cc=0) -+ngr + 0000000000000001 & 000000007FFFFFFF = 0000000000000001 (cc=1) -+ngr + 000000000000FFFF & 000000007FFFFFFF = 000000000000FFFF (cc=1) -+ngr + 0000000000007FFF & 000000007FFFFFFF = 0000000000007FFF (cc=1) -+ngr + 0000000000008000 & 000000007FFFFFFF = 0000000000008000 (cc=1) -+ngr + 00000000FFFFFFFF & 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+ngr + 0000000080000000 & 000000007FFFFFFF = 0000000000000000 (cc=0) -+ngr + 000000007FFFFFFF & 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+ngr + AAAAAAAAAAAAAAAA & 000000007FFFFFFF = 000000002AAAAAAA (cc=1) -+ngr + 8000000000000000 & 000000007FFFFFFF = 0000000000000000 (cc=0) -+ngr + FFFFFFFFFFFFFFFF & 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+ngr + 5555555555555555 & 000000007FFFFFFF = 0000000055555555 (cc=1) -+ny + 0000000000000000 & 000000007FFFFFFF = 0000000000000000 (cc=0) -+ny + 0000000000000001 & 000000007FFFFFFF = 0000000000000000 (cc=0) -+ny + 000000000000FFFF & 000000007FFFFFFF = 0000000000000000 (cc=0) -+ny + 0000000000007FFF & 000000007FFFFFFF = 0000000000000000 (cc=0) -+ny + 0000000000008000 & 000000007FFFFFFF = 0000000000000000 (cc=0) -+ny + 00000000FFFFFFFF & 000000007FFFFFFF = 0000000000000000 (cc=0) -+ny + 0000000080000000 & 000000007FFFFFFF = 0000000000000000 (cc=0) -+ny + 000000007FFFFFFF & 000000007FFFFFFF = 0000000000000000 (cc=0) -+ny + AAAAAAAAAAAAAAAA & 000000007FFFFFFF = AAAAAAAA00000000 (cc=0) -+ny + 8000000000000000 & 000000007FFFFFFF = 8000000000000000 (cc=0) -+ny + FFFFFFFFFFFFFFFF & 000000007FFFFFFF = FFFFFFFF00000000 (cc=0) -+ny + 5555555555555555 & 000000007FFFFFFF = 5555555500000000 (cc=0) -+n + 0000000000000000 & 0000000080000000 = 0000000000000000 (cc=0) -+n + 0000000000000001 & 0000000080000000 = 0000000000000000 (cc=0) -+n + 000000000000FFFF & 0000000080000000 = 0000000000000000 (cc=0) -+n + 0000000000007FFF & 0000000080000000 = 0000000000000000 (cc=0) -+n + 0000000000008000 & 0000000080000000 = 0000000000000000 (cc=0) -+n + 00000000FFFFFFFF & 0000000080000000 = 0000000000000000 (cc=0) -+n + 0000000080000000 & 0000000080000000 = 0000000000000000 (cc=0) -+n + 000000007FFFFFFF & 0000000080000000 = 0000000000000000 (cc=0) -+n + AAAAAAAAAAAAAAAA & 0000000080000000 = AAAAAAAA00000000 (cc=0) -+n + 8000000000000000 & 0000000080000000 = 8000000000000000 (cc=0) -+n + FFFFFFFFFFFFFFFF & 0000000080000000 = FFFFFFFF00000000 (cc=0) -+n + 5555555555555555 & 0000000080000000 = 5555555500000000 (cc=0) -+ng + 0000000000000000 & 0000000080000000 = 0000000000000000 (cc=0) -+ng + 0000000000000001 & 0000000080000000 = 0000000000000000 (cc=0) -+ng + 000000000000FFFF & 0000000080000000 = 0000000000000000 (cc=0) -+ng + 0000000000007FFF & 0000000080000000 = 0000000000000000 (cc=0) -+ng + 0000000000008000 & 0000000080000000 = 0000000000000000 (cc=0) -+ng + 00000000FFFFFFFF & 0000000080000000 = 0000000080000000 (cc=1) -+ng + 0000000080000000 & 0000000080000000 = 0000000080000000 (cc=1) -+ng + 000000007FFFFFFF & 0000000080000000 = 0000000000000000 (cc=0) -+ng + AAAAAAAAAAAAAAAA & 0000000080000000 = 0000000080000000 (cc=1) -+ng + 8000000000000000 & 0000000080000000 = 0000000000000000 (cc=0) -+ng + FFFFFFFFFFFFFFFF & 0000000080000000 = 0000000080000000 (cc=1) -+ng + 5555555555555555 & 0000000080000000 = 0000000000000000 (cc=0) -+nr + 0000000000000000 & 0000000080000000 = 0000000000000000 (cc=0) -+nr + 0000000000000001 & 0000000080000000 = 0000000000000000 (cc=0) -+nr + 000000000000FFFF & 0000000080000000 = 0000000000000000 (cc=0) -+nr + 0000000000007FFF & 0000000080000000 = 0000000000000000 (cc=0) -+nr + 0000000000008000 & 0000000080000000 = 0000000000000000 (cc=0) -+nr + 00000000FFFFFFFF & 0000000080000000 = 0000000080000000 (cc=1) -+nr + 0000000080000000 & 0000000080000000 = 0000000080000000 (cc=1) -+nr + 000000007FFFFFFF & 0000000080000000 = 0000000000000000 (cc=0) -+nr + AAAAAAAAAAAAAAAA & 0000000080000000 = AAAAAAAA80000000 (cc=1) -+nr + 8000000000000000 & 0000000080000000 = 8000000000000000 (cc=0) -+nr + FFFFFFFFFFFFFFFF & 0000000080000000 = FFFFFFFF80000000 (cc=1) -+nr + 5555555555555555 & 0000000080000000 = 5555555500000000 (cc=0) -+ngr + 0000000000000000 & 0000000080000000 = 0000000000000000 (cc=0) -+ngr + 0000000000000001 & 0000000080000000 = 0000000000000000 (cc=0) -+ngr + 000000000000FFFF & 0000000080000000 = 0000000000000000 (cc=0) -+ngr + 0000000000007FFF & 0000000080000000 = 0000000000000000 (cc=0) -+ngr + 0000000000008000 & 0000000080000000 = 0000000000000000 (cc=0) -+ngr + 00000000FFFFFFFF & 0000000080000000 = 0000000080000000 (cc=1) -+ngr + 0000000080000000 & 0000000080000000 = 0000000080000000 (cc=1) -+ngr + 000000007FFFFFFF & 0000000080000000 = 0000000000000000 (cc=0) -+ngr + AAAAAAAAAAAAAAAA & 0000000080000000 = 0000000080000000 (cc=1) -+ngr + 8000000000000000 & 0000000080000000 = 0000000000000000 (cc=0) -+ngr + FFFFFFFFFFFFFFFF & 0000000080000000 = 0000000080000000 (cc=1) -+ngr + 5555555555555555 & 0000000080000000 = 0000000000000000 (cc=0) -+ny + 0000000000000000 & 0000000080000000 = 0000000000000000 (cc=0) -+ny + 0000000000000001 & 0000000080000000 = 0000000000000000 (cc=0) -+ny + 000000000000FFFF & 0000000080000000 = 0000000000000000 (cc=0) -+ny + 0000000000007FFF & 0000000080000000 = 0000000000000000 (cc=0) -+ny + 0000000000008000 & 0000000080000000 = 0000000000000000 (cc=0) -+ny + 00000000FFFFFFFF & 0000000080000000 = 0000000000000000 (cc=0) -+ny + 0000000080000000 & 0000000080000000 = 0000000000000000 (cc=0) -+ny + 000000007FFFFFFF & 0000000080000000 = 0000000000000000 (cc=0) -+ny + AAAAAAAAAAAAAAAA & 0000000080000000 = AAAAAAAA00000000 (cc=0) -+ny + 8000000000000000 & 0000000080000000 = 8000000000000000 (cc=0) -+ny + FFFFFFFFFFFFFFFF & 0000000080000000 = FFFFFFFF00000000 (cc=0) -+ny + 5555555555555555 & 0000000080000000 = 5555555500000000 (cc=0) -+n + 0000000000000000 & 0000000055555555 = 0000000000000000 (cc=0) -+n + 0000000000000001 & 0000000055555555 = 0000000000000000 (cc=0) -+n + 000000000000FFFF & 0000000055555555 = 0000000000000000 (cc=0) -+n + 0000000000007FFF & 0000000055555555 = 0000000000000000 (cc=0) -+n + 0000000000008000 & 0000000055555555 = 0000000000000000 (cc=0) -+n + 00000000FFFFFFFF & 0000000055555555 = 0000000000000000 (cc=0) -+n + 0000000080000000 & 0000000055555555 = 0000000000000000 (cc=0) -+n + 000000007FFFFFFF & 0000000055555555 = 0000000000000000 (cc=0) -+n + AAAAAAAAAAAAAAAA & 0000000055555555 = AAAAAAAA00000000 (cc=0) -+n + 8000000000000000 & 0000000055555555 = 8000000000000000 (cc=0) -+n + FFFFFFFFFFFFFFFF & 0000000055555555 = FFFFFFFF00000000 (cc=0) -+n + 5555555555555555 & 0000000055555555 = 5555555500000000 (cc=0) -+ng + 0000000000000000 & 0000000055555555 = 0000000000000000 (cc=0) -+ng + 0000000000000001 & 0000000055555555 = 0000000000000001 (cc=1) -+ng + 000000000000FFFF & 0000000055555555 = 0000000000005555 (cc=1) -+ng + 0000000000007FFF & 0000000055555555 = 0000000000005555 (cc=1) -+ng + 0000000000008000 & 0000000055555555 = 0000000000000000 (cc=0) -+ng + 00000000FFFFFFFF & 0000000055555555 = 0000000055555555 (cc=1) -+ng + 0000000080000000 & 0000000055555555 = 0000000000000000 (cc=0) -+ng + 000000007FFFFFFF & 0000000055555555 = 0000000055555555 (cc=1) -+ng + AAAAAAAAAAAAAAAA & 0000000055555555 = 0000000000000000 (cc=0) -+ng + 8000000000000000 & 0000000055555555 = 0000000000000000 (cc=0) -+ng + FFFFFFFFFFFFFFFF & 0000000055555555 = 0000000055555555 (cc=1) -+ng + 5555555555555555 & 0000000055555555 = 0000000055555555 (cc=1) -+nr + 0000000000000000 & 0000000055555555 = 0000000000000000 (cc=0) -+nr + 0000000000000001 & 0000000055555555 = 0000000000000001 (cc=1) -+nr + 000000000000FFFF & 0000000055555555 = 0000000000005555 (cc=1) -+nr + 0000000000007FFF & 0000000055555555 = 0000000000005555 (cc=1) -+nr + 0000000000008000 & 0000000055555555 = 0000000000000000 (cc=0) -+nr + 00000000FFFFFFFF & 0000000055555555 = 0000000055555555 (cc=1) -+nr + 0000000080000000 & 0000000055555555 = 0000000000000000 (cc=0) -+nr + 000000007FFFFFFF & 0000000055555555 = 0000000055555555 (cc=1) -+nr + AAAAAAAAAAAAAAAA & 0000000055555555 = AAAAAAAA00000000 (cc=0) -+nr + 8000000000000000 & 0000000055555555 = 8000000000000000 (cc=0) -+nr + FFFFFFFFFFFFFFFF & 0000000055555555 = FFFFFFFF55555555 (cc=1) -+nr + 5555555555555555 & 0000000055555555 = 5555555555555555 (cc=1) -+ngr + 0000000000000000 & 0000000055555555 = 0000000000000000 (cc=0) -+ngr + 0000000000000001 & 0000000055555555 = 0000000000000001 (cc=1) -+ngr + 000000000000FFFF & 0000000055555555 = 0000000000005555 (cc=1) -+ngr + 0000000000007FFF & 0000000055555555 = 0000000000005555 (cc=1) -+ngr + 0000000000008000 & 0000000055555555 = 0000000000000000 (cc=0) -+ngr + 00000000FFFFFFFF & 0000000055555555 = 0000000055555555 (cc=1) -+ngr + 0000000080000000 & 0000000055555555 = 0000000000000000 (cc=0) -+ngr + 000000007FFFFFFF & 0000000055555555 = 0000000055555555 (cc=1) -+ngr + AAAAAAAAAAAAAAAA & 0000000055555555 = 0000000000000000 (cc=0) -+ngr + 8000000000000000 & 0000000055555555 = 0000000000000000 (cc=0) -+ngr + FFFFFFFFFFFFFFFF & 0000000055555555 = 0000000055555555 (cc=1) -+ngr + 5555555555555555 & 0000000055555555 = 0000000055555555 (cc=1) -+ny + 0000000000000000 & 0000000055555555 = 0000000000000000 (cc=0) -+ny + 0000000000000001 & 0000000055555555 = 0000000000000000 (cc=0) -+ny + 000000000000FFFF & 0000000055555555 = 0000000000000000 (cc=0) -+ny + 0000000000007FFF & 0000000055555555 = 0000000000000000 (cc=0) -+ny + 0000000000008000 & 0000000055555555 = 0000000000000000 (cc=0) -+ny + 00000000FFFFFFFF & 0000000055555555 = 0000000000000000 (cc=0) -+ny + 0000000080000000 & 0000000055555555 = 0000000000000000 (cc=0) -+ny + 000000007FFFFFFF & 0000000055555555 = 0000000000000000 (cc=0) -+ny + AAAAAAAAAAAAAAAA & 0000000055555555 = AAAAAAAA00000000 (cc=0) -+ny + 8000000000000000 & 0000000055555555 = 8000000000000000 (cc=0) -+ny + FFFFFFFFFFFFFFFF & 0000000055555555 = FFFFFFFF00000000 (cc=0) -+ny + 5555555555555555 & 0000000055555555 = 5555555500000000 (cc=0) -+n + 0000000000000000 & 00000000FFFFFFFF = 0000000000000000 (cc=0) -+n + 0000000000000001 & 00000000FFFFFFFF = 0000000000000000 (cc=0) -+n + 000000000000FFFF & 00000000FFFFFFFF = 0000000000000000 (cc=0) -+n + 0000000000007FFF & 00000000FFFFFFFF = 0000000000000000 (cc=0) -+n + 0000000000008000 & 00000000FFFFFFFF = 0000000000000000 (cc=0) -+n + 00000000FFFFFFFF & 00000000FFFFFFFF = 0000000000000000 (cc=0) -+n + 0000000080000000 & 00000000FFFFFFFF = 0000000000000000 (cc=0) -+n + 000000007FFFFFFF & 00000000FFFFFFFF = 0000000000000000 (cc=0) -+n + AAAAAAAAAAAAAAAA & 00000000FFFFFFFF = AAAAAAAA00000000 (cc=0) -+n + 8000000000000000 & 00000000FFFFFFFF = 8000000000000000 (cc=0) -+n + FFFFFFFFFFFFFFFF & 00000000FFFFFFFF = FFFFFFFF00000000 (cc=0) -+n + 5555555555555555 & 00000000FFFFFFFF = 5555555500000000 (cc=0) -+ng + 0000000000000000 & 00000000FFFFFFFF = 0000000000000000 (cc=0) -+ng + 0000000000000001 & 00000000FFFFFFFF = 0000000000000001 (cc=1) -+ng + 000000000000FFFF & 00000000FFFFFFFF = 000000000000FFFF (cc=1) -+ng + 0000000000007FFF & 00000000FFFFFFFF = 0000000000007FFF (cc=1) -+ng + 0000000000008000 & 00000000FFFFFFFF = 0000000000008000 (cc=1) -+ng + 00000000FFFFFFFF & 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+ng + 0000000080000000 & 00000000FFFFFFFF = 0000000080000000 (cc=1) -+ng + 000000007FFFFFFF & 00000000FFFFFFFF = 000000007FFFFFFF (cc=1) -+ng + AAAAAAAAAAAAAAAA & 00000000FFFFFFFF = 00000000AAAAAAAA (cc=1) -+ng + 8000000000000000 & 00000000FFFFFFFF = 0000000000000000 (cc=0) -+ng + FFFFFFFFFFFFFFFF & 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+ng + 5555555555555555 & 00000000FFFFFFFF = 0000000055555555 (cc=1) -+nr + 0000000000000000 & 00000000FFFFFFFF = 0000000000000000 (cc=0) -+nr + 0000000000000001 & 00000000FFFFFFFF = 0000000000000001 (cc=1) -+nr + 000000000000FFFF & 00000000FFFFFFFF = 000000000000FFFF (cc=1) -+nr + 0000000000007FFF & 00000000FFFFFFFF = 0000000000007FFF (cc=1) -+nr + 0000000000008000 & 00000000FFFFFFFF = 0000000000008000 (cc=1) -+nr + 00000000FFFFFFFF & 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+nr + 0000000080000000 & 00000000FFFFFFFF = 0000000080000000 (cc=1) -+nr + 000000007FFFFFFF & 00000000FFFFFFFF = 000000007FFFFFFF (cc=1) -+nr + AAAAAAAAAAAAAAAA & 00000000FFFFFFFF = AAAAAAAAAAAAAAAA (cc=1) -+nr + 8000000000000000 & 00000000FFFFFFFF = 8000000000000000 (cc=0) -+nr + FFFFFFFFFFFFFFFF & 00000000FFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+nr + 5555555555555555 & 00000000FFFFFFFF = 5555555555555555 (cc=1) -+ngr + 0000000000000000 & 00000000FFFFFFFF = 0000000000000000 (cc=0) -+ngr + 0000000000000001 & 00000000FFFFFFFF = 0000000000000001 (cc=1) -+ngr + 000000000000FFFF & 00000000FFFFFFFF = 000000000000FFFF (cc=1) -+ngr + 0000000000007FFF & 00000000FFFFFFFF = 0000000000007FFF (cc=1) -+ngr + 0000000000008000 & 00000000FFFFFFFF = 0000000000008000 (cc=1) -+ngr + 00000000FFFFFFFF & 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+ngr + 0000000080000000 & 00000000FFFFFFFF = 0000000080000000 (cc=1) -+ngr + 000000007FFFFFFF & 00000000FFFFFFFF = 000000007FFFFFFF (cc=1) -+ngr + AAAAAAAAAAAAAAAA & 00000000FFFFFFFF = 00000000AAAAAAAA (cc=1) -+ngr + 8000000000000000 & 00000000FFFFFFFF = 0000000000000000 (cc=0) -+ngr + FFFFFFFFFFFFFFFF & 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+ngr + 5555555555555555 & 00000000FFFFFFFF = 0000000055555555 (cc=1) -+ny + 0000000000000000 & 00000000FFFFFFFF = 0000000000000000 (cc=0) -+ny + 0000000000000001 & 00000000FFFFFFFF = 0000000000000000 (cc=0) -+ny + 000000000000FFFF & 00000000FFFFFFFF = 0000000000000000 (cc=0) -+ny + 0000000000007FFF & 00000000FFFFFFFF = 0000000000000000 (cc=0) -+ny + 0000000000008000 & 00000000FFFFFFFF = 0000000000000000 (cc=0) -+ny + 00000000FFFFFFFF & 00000000FFFFFFFF = 0000000000000000 (cc=0) -+ny + 0000000080000000 & 00000000FFFFFFFF = 0000000000000000 (cc=0) -+ny + 000000007FFFFFFF & 00000000FFFFFFFF = 0000000000000000 (cc=0) -+ny + AAAAAAAAAAAAAAAA & 00000000FFFFFFFF = AAAAAAAA00000000 (cc=0) -+ny + 8000000000000000 & 00000000FFFFFFFF = 8000000000000000 (cc=0) -+ny + FFFFFFFFFFFFFFFF & 00000000FFFFFFFF = FFFFFFFF00000000 (cc=0) -+ny + 5555555555555555 & 00000000FFFFFFFF = 5555555500000000 (cc=0) -+n + 0000000000000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+n + 0000000000000001 & 000000000000FFFF = 0000000000000000 (cc=0) -+n + 000000000000FFFF & 000000000000FFFF = 0000000000000000 (cc=0) -+n + 0000000000007FFF & 000000000000FFFF = 0000000000000000 (cc=0) -+n + 0000000000008000 & 000000000000FFFF = 0000000000000000 (cc=0) -+n + 00000000FFFFFFFF & 000000000000FFFF = 0000000000000000 (cc=0) -+n + 0000000080000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+n + 000000007FFFFFFF & 000000000000FFFF = 0000000000000000 (cc=0) -+n + AAAAAAAAAAAAAAAA & 000000000000FFFF = AAAAAAAA00000000 (cc=0) -+n + 8000000000000000 & 000000000000FFFF = 8000000000000000 (cc=0) -+n + FFFFFFFFFFFFFFFF & 000000000000FFFF = FFFFFFFF00000000 (cc=0) -+n + 5555555555555555 & 000000000000FFFF = 5555555500000000 (cc=0) -+ng + 0000000000000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+ng + 0000000000000001 & 000000000000FFFF = 0000000000000001 (cc=1) -+ng + 000000000000FFFF & 000000000000FFFF = 000000000000FFFF (cc=1) -+ng + 0000000000007FFF & 000000000000FFFF = 0000000000007FFF (cc=1) -+ng + 0000000000008000 & 000000000000FFFF = 0000000000008000 (cc=1) -+ng + 00000000FFFFFFFF & 000000000000FFFF = 000000000000FFFF (cc=1) -+ng + 0000000080000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+ng + 000000007FFFFFFF & 000000000000FFFF = 000000000000FFFF (cc=1) -+ng + AAAAAAAAAAAAAAAA & 000000000000FFFF = 000000000000AAAA (cc=1) -+ng + 8000000000000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+ng + FFFFFFFFFFFFFFFF & 000000000000FFFF = 000000000000FFFF (cc=1) -+ng + 5555555555555555 & 000000000000FFFF = 0000000000005555 (cc=1) -+nr + 0000000000000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+nr + 0000000000000001 & 000000000000FFFF = 0000000000000001 (cc=1) -+nr + 000000000000FFFF & 000000000000FFFF = 000000000000FFFF (cc=1) -+nr + 0000000000007FFF & 000000000000FFFF = 0000000000007FFF (cc=1) -+nr + 0000000000008000 & 000000000000FFFF = 0000000000008000 (cc=1) -+nr + 00000000FFFFFFFF & 000000000000FFFF = 000000000000FFFF (cc=1) -+nr + 0000000080000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+nr + 000000007FFFFFFF & 000000000000FFFF = 000000000000FFFF (cc=1) -+nr + AAAAAAAAAAAAAAAA & 000000000000FFFF = AAAAAAAA0000AAAA (cc=1) -+nr + 8000000000000000 & 000000000000FFFF = 8000000000000000 (cc=0) -+nr + FFFFFFFFFFFFFFFF & 000000000000FFFF = FFFFFFFF0000FFFF (cc=1) -+nr + 5555555555555555 & 000000000000FFFF = 5555555500005555 (cc=1) -+ngr + 0000000000000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+ngr + 0000000000000001 & 000000000000FFFF = 0000000000000001 (cc=1) -+ngr + 000000000000FFFF & 000000000000FFFF = 000000000000FFFF (cc=1) -+ngr + 0000000000007FFF & 000000000000FFFF = 0000000000007FFF (cc=1) -+ngr + 0000000000008000 & 000000000000FFFF = 0000000000008000 (cc=1) -+ngr + 00000000FFFFFFFF & 000000000000FFFF = 000000000000FFFF (cc=1) -+ngr + 0000000080000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+ngr + 000000007FFFFFFF & 000000000000FFFF = 000000000000FFFF (cc=1) -+ngr + AAAAAAAAAAAAAAAA & 000000000000FFFF = 000000000000AAAA (cc=1) -+ngr + 8000000000000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+ngr + FFFFFFFFFFFFFFFF & 000000000000FFFF = 000000000000FFFF (cc=1) -+ngr + 5555555555555555 & 000000000000FFFF = 0000000000005555 (cc=1) -+ny + 0000000000000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+ny + 0000000000000001 & 000000000000FFFF = 0000000000000000 (cc=0) -+ny + 000000000000FFFF & 000000000000FFFF = 0000000000000000 (cc=0) -+ny + 0000000000007FFF & 000000000000FFFF = 0000000000000000 (cc=0) -+ny + 0000000000008000 & 000000000000FFFF = 0000000000000000 (cc=0) -+ny + 00000000FFFFFFFF & 000000000000FFFF = 0000000000000000 (cc=0) -+ny + 0000000080000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+ny + 000000007FFFFFFF & 000000000000FFFF = 0000000000000000 (cc=0) -+ny + AAAAAAAAAAAAAAAA & 000000000000FFFF = AAAAAAAA00000000 (cc=0) -+ny + 8000000000000000 & 000000000000FFFF = 8000000000000000 (cc=0) -+ny + FFFFFFFFFFFFFFFF & 000000000000FFFF = FFFFFFFF00000000 (cc=0) -+ny + 5555555555555555 & 000000000000FFFF = 5555555500000000 (cc=0) -+n + 0000000000000000 & 0000000000007FFF = 0000000000000000 (cc=0) -+n + 0000000000000001 & 0000000000007FFF = 0000000000000000 (cc=0) -+n + 000000000000FFFF & 0000000000007FFF = 0000000000000000 (cc=0) -+n + 0000000000007FFF & 0000000000007FFF = 0000000000000000 (cc=0) -+n + 0000000000008000 & 0000000000007FFF = 0000000000000000 (cc=0) -+n + 00000000FFFFFFFF & 0000000000007FFF = 0000000000000000 (cc=0) -+n + 0000000080000000 & 0000000000007FFF = 0000000000000000 (cc=0) -+n + 000000007FFFFFFF & 0000000000007FFF = 0000000000000000 (cc=0) -+n + AAAAAAAAAAAAAAAA & 0000000000007FFF = AAAAAAAA00000000 (cc=0) -+n + 8000000000000000 & 0000000000007FFF = 8000000000000000 (cc=0) -+n + FFFFFFFFFFFFFFFF & 0000000000007FFF = FFFFFFFF00000000 (cc=0) -+n + 5555555555555555 & 0000000000007FFF = 5555555500000000 (cc=0) -+ng + 0000000000000000 & 0000000000007FFF = 0000000000000000 (cc=0) -+ng + 0000000000000001 & 0000000000007FFF = 0000000000000001 (cc=1) -+ng + 000000000000FFFF & 0000000000007FFF = 0000000000007FFF (cc=1) -+ng + 0000000000007FFF & 0000000000007FFF = 0000000000007FFF (cc=1) -+ng + 0000000000008000 & 0000000000007FFF = 0000000000000000 (cc=0) -+ng + 00000000FFFFFFFF & 0000000000007FFF = 0000000000007FFF (cc=1) -+ng + 0000000080000000 & 0000000000007FFF = 0000000000000000 (cc=0) -+ng + 000000007FFFFFFF & 0000000000007FFF = 0000000000007FFF (cc=1) -+ng + AAAAAAAAAAAAAAAA & 0000000000007FFF = 0000000000002AAA (cc=1) -+ng + 8000000000000000 & 0000000000007FFF = 0000000000000000 (cc=0) -+ng + FFFFFFFFFFFFFFFF & 0000000000007FFF = 0000000000007FFF (cc=1) -+ng + 5555555555555555 & 0000000000007FFF = 0000000000005555 (cc=1) -+nr + 0000000000000000 & 0000000000007FFF = 0000000000000000 (cc=0) -+nr + 0000000000000001 & 0000000000007FFF = 0000000000000001 (cc=1) -+nr + 000000000000FFFF & 0000000000007FFF = 0000000000007FFF (cc=1) -+nr + 0000000000007FFF & 0000000000007FFF = 0000000000007FFF (cc=1) -+nr + 0000000000008000 & 0000000000007FFF = 0000000000000000 (cc=0) -+nr + 00000000FFFFFFFF & 0000000000007FFF = 0000000000007FFF (cc=1) -+nr + 0000000080000000 & 0000000000007FFF = 0000000000000000 (cc=0) -+nr + 000000007FFFFFFF & 0000000000007FFF = 0000000000007FFF (cc=1) -+nr + AAAAAAAAAAAAAAAA & 0000000000007FFF = AAAAAAAA00002AAA (cc=1) -+nr + 8000000000000000 & 0000000000007FFF = 8000000000000000 (cc=0) -+nr + FFFFFFFFFFFFFFFF & 0000000000007FFF = FFFFFFFF00007FFF (cc=1) -+nr + 5555555555555555 & 0000000000007FFF = 5555555500005555 (cc=1) -+ngr + 0000000000000000 & 0000000000007FFF = 0000000000000000 (cc=0) -+ngr + 0000000000000001 & 0000000000007FFF = 0000000000000001 (cc=1) -+ngr + 000000000000FFFF & 0000000000007FFF = 0000000000007FFF (cc=1) -+ngr + 0000000000007FFF & 0000000000007FFF = 0000000000007FFF (cc=1) -+ngr + 0000000000008000 & 0000000000007FFF = 0000000000000000 (cc=0) -+ngr + 00000000FFFFFFFF & 0000000000007FFF = 0000000000007FFF (cc=1) -+ngr + 0000000080000000 & 0000000000007FFF = 0000000000000000 (cc=0) -+ngr + 000000007FFFFFFF & 0000000000007FFF = 0000000000007FFF (cc=1) -+ngr + AAAAAAAAAAAAAAAA & 0000000000007FFF = 0000000000002AAA (cc=1) -+ngr + 8000000000000000 & 0000000000007FFF = 0000000000000000 (cc=0) -+ngr + FFFFFFFFFFFFFFFF & 0000000000007FFF = 0000000000007FFF (cc=1) -+ngr + 5555555555555555 & 0000000000007FFF = 0000000000005555 (cc=1) -+ny + 0000000000000000 & 0000000000007FFF = 0000000000000000 (cc=0) -+ny + 0000000000000001 & 0000000000007FFF = 0000000000000000 (cc=0) -+ny + 000000000000FFFF & 0000000000007FFF = 0000000000000000 (cc=0) -+ny + 0000000000007FFF & 0000000000007FFF = 0000000000000000 (cc=0) -+ny + 0000000000008000 & 0000000000007FFF = 0000000000000000 (cc=0) -+ny + 00000000FFFFFFFF & 0000000000007FFF = 0000000000000000 (cc=0) -+ny + 0000000080000000 & 0000000000007FFF = 0000000000000000 (cc=0) -+ny + 000000007FFFFFFF & 0000000000007FFF = 0000000000000000 (cc=0) -+ny + AAAAAAAAAAAAAAAA & 0000000000007FFF = AAAAAAAA00000000 (cc=0) -+ny + 8000000000000000 & 0000000000007FFF = 8000000000000000 (cc=0) -+ny + FFFFFFFFFFFFFFFF & 0000000000007FFF = FFFFFFFF00000000 (cc=0) -+ny + 5555555555555555 & 0000000000007FFF = 5555555500000000 (cc=0) -+n + 0000000000000000 & 0000000000008000 = 0000000000000000 (cc=0) -+n + 0000000000000001 & 0000000000008000 = 0000000000000000 (cc=0) -+n + 000000000000FFFF & 0000000000008000 = 0000000000000000 (cc=0) -+n + 0000000000007FFF & 0000000000008000 = 0000000000000000 (cc=0) -+n + 0000000000008000 & 0000000000008000 = 0000000000000000 (cc=0) -+n + 00000000FFFFFFFF & 0000000000008000 = 0000000000000000 (cc=0) -+n + 0000000080000000 & 0000000000008000 = 0000000000000000 (cc=0) -+n + 000000007FFFFFFF & 0000000000008000 = 0000000000000000 (cc=0) -+n + AAAAAAAAAAAAAAAA & 0000000000008000 = AAAAAAAA00000000 (cc=0) -+n + 8000000000000000 & 0000000000008000 = 8000000000000000 (cc=0) -+n + FFFFFFFFFFFFFFFF & 0000000000008000 = FFFFFFFF00000000 (cc=0) -+n + 5555555555555555 & 0000000000008000 = 5555555500000000 (cc=0) -+ng + 0000000000000000 & 0000000000008000 = 0000000000000000 (cc=0) -+ng + 0000000000000001 & 0000000000008000 = 0000000000000000 (cc=0) -+ng + 000000000000FFFF & 0000000000008000 = 0000000000008000 (cc=1) -+ng + 0000000000007FFF & 0000000000008000 = 0000000000000000 (cc=0) -+ng + 0000000000008000 & 0000000000008000 = 0000000000008000 (cc=1) -+ng + 00000000FFFFFFFF & 0000000000008000 = 0000000000008000 (cc=1) -+ng + 0000000080000000 & 0000000000008000 = 0000000000000000 (cc=0) -+ng + 000000007FFFFFFF & 0000000000008000 = 0000000000008000 (cc=1) -+ng + AAAAAAAAAAAAAAAA & 0000000000008000 = 0000000000008000 (cc=1) -+ng + 8000000000000000 & 0000000000008000 = 0000000000000000 (cc=0) -+ng + FFFFFFFFFFFFFFFF & 0000000000008000 = 0000000000008000 (cc=1) -+ng + 5555555555555555 & 0000000000008000 = 0000000000000000 (cc=0) -+nr + 0000000000000000 & 0000000000008000 = 0000000000000000 (cc=0) -+nr + 0000000000000001 & 0000000000008000 = 0000000000000000 (cc=0) -+nr + 000000000000FFFF & 0000000000008000 = 0000000000008000 (cc=1) -+nr + 0000000000007FFF & 0000000000008000 = 0000000000000000 (cc=0) -+nr + 0000000000008000 & 0000000000008000 = 0000000000008000 (cc=1) -+nr + 00000000FFFFFFFF & 0000000000008000 = 0000000000008000 (cc=1) -+nr + 0000000080000000 & 0000000000008000 = 0000000000000000 (cc=0) -+nr + 000000007FFFFFFF & 0000000000008000 = 0000000000008000 (cc=1) -+nr + AAAAAAAAAAAAAAAA & 0000000000008000 = AAAAAAAA00008000 (cc=1) -+nr + 8000000000000000 & 0000000000008000 = 8000000000000000 (cc=0) -+nr + FFFFFFFFFFFFFFFF & 0000000000008000 = FFFFFFFF00008000 (cc=1) -+nr + 5555555555555555 & 0000000000008000 = 5555555500000000 (cc=0) -+ngr + 0000000000000000 & 0000000000008000 = 0000000000000000 (cc=0) -+ngr + 0000000000000001 & 0000000000008000 = 0000000000000000 (cc=0) -+ngr + 000000000000FFFF & 0000000000008000 = 0000000000008000 (cc=1) -+ngr + 0000000000007FFF & 0000000000008000 = 0000000000000000 (cc=0) -+ngr + 0000000000008000 & 0000000000008000 = 0000000000008000 (cc=1) -+ngr + 00000000FFFFFFFF & 0000000000008000 = 0000000000008000 (cc=1) -+ngr + 0000000080000000 & 0000000000008000 = 0000000000000000 (cc=0) -+ngr + 000000007FFFFFFF & 0000000000008000 = 0000000000008000 (cc=1) -+ngr + AAAAAAAAAAAAAAAA & 0000000000008000 = 0000000000008000 (cc=1) -+ngr + 8000000000000000 & 0000000000008000 = 0000000000000000 (cc=0) -+ngr + FFFFFFFFFFFFFFFF & 0000000000008000 = 0000000000008000 (cc=1) -+ngr + 5555555555555555 & 0000000000008000 = 0000000000000000 (cc=0) -+ny + 0000000000000000 & 0000000000008000 = 0000000000000000 (cc=0) -+ny + 0000000000000001 & 0000000000008000 = 0000000000000000 (cc=0) -+ny + 000000000000FFFF & 0000000000008000 = 0000000000000000 (cc=0) -+ny + 0000000000007FFF & 0000000000008000 = 0000000000000000 (cc=0) -+ny + 0000000000008000 & 0000000000008000 = 0000000000000000 (cc=0) -+ny + 00000000FFFFFFFF & 0000000000008000 = 0000000000000000 (cc=0) -+ny + 0000000080000000 & 0000000000008000 = 0000000000000000 (cc=0) -+ny + 000000007FFFFFFF & 0000000000008000 = 0000000000000000 (cc=0) -+ny + AAAAAAAAAAAAAAAA & 0000000000008000 = AAAAAAAA00000000 (cc=0) -+ny + 8000000000000000 & 0000000000008000 = 8000000000000000 (cc=0) -+ny + FFFFFFFFFFFFFFFF & 0000000000008000 = FFFFFFFF00000000 (cc=0) -+ny + 5555555555555555 & 0000000000008000 = 5555555500000000 (cc=0) -+n + 0000000000000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+n + 0000000000000001 & 000000000000FFFF = 0000000000000000 (cc=0) -+n + 000000000000FFFF & 000000000000FFFF = 0000000000000000 (cc=0) -+n + 0000000000007FFF & 000000000000FFFF = 0000000000000000 (cc=0) -+n + 0000000000008000 & 000000000000FFFF = 0000000000000000 (cc=0) -+n + 00000000FFFFFFFF & 000000000000FFFF = 0000000000000000 (cc=0) -+n + 0000000080000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+n + 000000007FFFFFFF & 000000000000FFFF = 0000000000000000 (cc=0) -+n + AAAAAAAAAAAAAAAA & 000000000000FFFF = AAAAAAAA00000000 (cc=0) -+n + 8000000000000000 & 000000000000FFFF = 8000000000000000 (cc=0) -+n + FFFFFFFFFFFFFFFF & 000000000000FFFF = FFFFFFFF00000000 (cc=0) -+n + 5555555555555555 & 000000000000FFFF = 5555555500000000 (cc=0) -+ng + 0000000000000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+ng + 0000000000000001 & 000000000000FFFF = 0000000000000001 (cc=1) -+ng + 000000000000FFFF & 000000000000FFFF = 000000000000FFFF (cc=1) -+ng + 0000000000007FFF & 000000000000FFFF = 0000000000007FFF (cc=1) -+ng + 0000000000008000 & 000000000000FFFF = 0000000000008000 (cc=1) -+ng + 00000000FFFFFFFF & 000000000000FFFF = 000000000000FFFF (cc=1) -+ng + 0000000080000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+ng + 000000007FFFFFFF & 000000000000FFFF = 000000000000FFFF (cc=1) -+ng + AAAAAAAAAAAAAAAA & 000000000000FFFF = 000000000000AAAA (cc=1) -+ng + 8000000000000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+ng + FFFFFFFFFFFFFFFF & 000000000000FFFF = 000000000000FFFF (cc=1) -+ng + 5555555555555555 & 000000000000FFFF = 0000000000005555 (cc=1) -+nr + 0000000000000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+nr + 0000000000000001 & 000000000000FFFF = 0000000000000001 (cc=1) -+nr + 000000000000FFFF & 000000000000FFFF = 000000000000FFFF (cc=1) -+nr + 0000000000007FFF & 000000000000FFFF = 0000000000007FFF (cc=1) -+nr + 0000000000008000 & 000000000000FFFF = 0000000000008000 (cc=1) -+nr + 00000000FFFFFFFF & 000000000000FFFF = 000000000000FFFF (cc=1) -+nr + 0000000080000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+nr + 000000007FFFFFFF & 000000000000FFFF = 000000000000FFFF (cc=1) -+nr + AAAAAAAAAAAAAAAA & 000000000000FFFF = AAAAAAAA0000AAAA (cc=1) -+nr + 8000000000000000 & 000000000000FFFF = 8000000000000000 (cc=0) -+nr + FFFFFFFFFFFFFFFF & 000000000000FFFF = FFFFFFFF0000FFFF (cc=1) -+nr + 5555555555555555 & 000000000000FFFF = 5555555500005555 (cc=1) -+ngr + 0000000000000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+ngr + 0000000000000001 & 000000000000FFFF = 0000000000000001 (cc=1) -+ngr + 000000000000FFFF & 000000000000FFFF = 000000000000FFFF (cc=1) -+ngr + 0000000000007FFF & 000000000000FFFF = 0000000000007FFF (cc=1) -+ngr + 0000000000008000 & 000000000000FFFF = 0000000000008000 (cc=1) -+ngr + 00000000FFFFFFFF & 000000000000FFFF = 000000000000FFFF (cc=1) -+ngr + 0000000080000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+ngr + 000000007FFFFFFF & 000000000000FFFF = 000000000000FFFF (cc=1) -+ngr + AAAAAAAAAAAAAAAA & 000000000000FFFF = 000000000000AAAA (cc=1) -+ngr + 8000000000000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+ngr + FFFFFFFFFFFFFFFF & 000000000000FFFF = 000000000000FFFF (cc=1) -+ngr + 5555555555555555 & 000000000000FFFF = 0000000000005555 (cc=1) -+ny + 0000000000000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+ny + 0000000000000001 & 000000000000FFFF = 0000000000000000 (cc=0) -+ny + 000000000000FFFF & 000000000000FFFF = 0000000000000000 (cc=0) -+ny + 0000000000007FFF & 000000000000FFFF = 0000000000000000 (cc=0) -+ny + 0000000000008000 & 000000000000FFFF = 0000000000000000 (cc=0) -+ny + 00000000FFFFFFFF & 000000000000FFFF = 0000000000000000 (cc=0) -+ny + 0000000080000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+ny + 000000007FFFFFFF & 000000000000FFFF = 0000000000000000 (cc=0) -+ny + AAAAAAAAAAAAAAAA & 000000000000FFFF = AAAAAAAA00000000 (cc=0) -+ny + 8000000000000000 & 000000000000FFFF = 8000000000000000 (cc=0) -+ny + FFFFFFFFFFFFFFFF & 000000000000FFFF = FFFFFFFF00000000 (cc=0) -+ny + 5555555555555555 & 000000000000FFFF = 5555555500000000 (cc=0) -+ni + 0000000000000000 & 0000000000000000 = 0000000000000000 (cc=0) -+ni + 0000000000000001 & 0000000000000000 = 0000000000000001 (cc=0) -+ni + 000000000000FFFF & 0000000000000000 = 000000000000FFFF (cc=0) -+ni + 0000000000007FFF & 0000000000000000 = 0000000000007FFF (cc=0) -+ni + 0000000000008000 & 0000000000000000 = 0000000000008000 (cc=0) -+ni + 00000000FFFFFFFF & 0000000000000000 = 00000000FFFFFFFF (cc=0) -+ni + 0000000080000000 & 0000000000000000 = 0000000080000000 (cc=0) -+ni + 000000007FFFFFFF & 0000000000000000 = 000000007FFFFFFF (cc=0) -+ni + AAAAAAAAAAAAAAAA & 0000000000000000 = 00AAAAAAAAAAAAAA (cc=0) -+ni + 8000000000000000 & 0000000000000000 = 0000000000000000 (cc=0) -+ni + FFFFFFFFFFFFFFFF & 0000000000000000 = 00FFFFFFFFFFFFFF (cc=0) -+ni + 5555555555555555 & 0000000000000000 = 0055555555555555 (cc=0) -+ni + 0000000000000000 & 00000000000000FF = 0000000000000000 (cc=0) -+ni + 0000000000000001 & 00000000000000FF = 0000000000000001 (cc=0) -+ni + 000000000000FFFF & 00000000000000FF = 000000000000FFFF (cc=0) -+ni + 0000000000007FFF & 00000000000000FF = 0000000000007FFF (cc=0) -+ni + 0000000000008000 & 00000000000000FF = 0000000000008000 (cc=0) -+ni + 00000000FFFFFFFF & 00000000000000FF = 00000000FFFFFFFF (cc=0) -+ni + 0000000080000000 & 00000000000000FF = 0000000080000000 (cc=0) -+ni + 000000007FFFFFFF & 00000000000000FF = 000000007FFFFFFF (cc=0) -+ni + AAAAAAAAAAAAAAAA & 00000000000000FF = AAAAAAAAAAAAAAAA (cc=1) -+ni + 8000000000000000 & 00000000000000FF = 8000000000000000 (cc=1) -+ni + FFFFFFFFFFFFFFFF & 00000000000000FF = FFFFFFFFFFFFFFFF (cc=1) -+ni + 5555555555555555 & 00000000000000FF = 5555555555555555 (cc=1) -+ni + 0000000000000000 & 0000000000000080 = 0000000000000000 (cc=0) -+ni + 0000000000000001 & 0000000000000080 = 0000000000000001 (cc=0) -+ni + 000000000000FFFF & 0000000000000080 = 000000000000FFFF (cc=0) -+ni + 0000000000007FFF & 0000000000000080 = 0000000000007FFF (cc=0) -+ni + 0000000000008000 & 0000000000000080 = 0000000000008000 (cc=0) -+ni + 00000000FFFFFFFF & 0000000000000080 = 00000000FFFFFFFF (cc=0) -+ni + 0000000080000000 & 0000000000000080 = 0000000080000000 (cc=0) -+ni + 000000007FFFFFFF & 0000000000000080 = 000000007FFFFFFF (cc=0) -+ni + AAAAAAAAAAAAAAAA & 0000000000000080 = 80AAAAAAAAAAAAAA (cc=1) -+ni + 8000000000000000 & 0000000000000080 = 8000000000000000 (cc=1) -+ni + FFFFFFFFFFFFFFFF & 0000000000000080 = 80FFFFFFFFFFFFFF (cc=1) -+ni + 5555555555555555 & 0000000000000080 = 0055555555555555 (cc=0) -+ni + 0000000000000000 & 00000000000000AA = 0000000000000000 (cc=0) -+ni + 0000000000000001 & 00000000000000AA = 0000000000000001 (cc=0) -+ni + 000000000000FFFF & 00000000000000AA = 000000000000FFFF (cc=0) -+ni + 0000000000007FFF & 00000000000000AA = 0000000000007FFF (cc=0) -+ni + 0000000000008000 & 00000000000000AA = 0000000000008000 (cc=0) -+ni + 00000000FFFFFFFF & 00000000000000AA = 00000000FFFFFFFF (cc=0) -+ni + 0000000080000000 & 00000000000000AA = 0000000080000000 (cc=0) -+ni + 000000007FFFFFFF & 00000000000000AA = 000000007FFFFFFF (cc=0) -+ni + AAAAAAAAAAAAAAAA & 00000000000000AA = AAAAAAAAAAAAAAAA (cc=1) -+ni + 8000000000000000 & 00000000000000AA = 8000000000000000 (cc=1) -+ni + FFFFFFFFFFFFFFFF & 00000000000000AA = AAFFFFFFFFFFFFFF (cc=1) -+ni + 5555555555555555 & 00000000000000AA = 0055555555555555 (cc=0) -+ni + 0000000000000000 & 0000000000000055 = 0000000000000000 (cc=0) -+ni + 0000000000000001 & 0000000000000055 = 0000000000000001 (cc=0) -+ni + 000000000000FFFF & 0000000000000055 = 000000000000FFFF (cc=0) -+ni + 0000000000007FFF & 0000000000000055 = 0000000000007FFF (cc=0) -+ni + 0000000000008000 & 0000000000000055 = 0000000000008000 (cc=0) -+ni + 00000000FFFFFFFF & 0000000000000055 = 00000000FFFFFFFF (cc=0) -+ni + 0000000080000000 & 0000000000000055 = 0000000080000000 (cc=0) -+ni + 000000007FFFFFFF & 0000000000000055 = 000000007FFFFFFF (cc=0) -+ni + AAAAAAAAAAAAAAAA & 0000000000000055 = 00AAAAAAAAAAAAAA (cc=0) -+ni + 8000000000000000 & 0000000000000055 = 0000000000000000 (cc=0) -+ni + FFFFFFFFFFFFFFFF & 0000000000000055 = 55FFFFFFFFFFFFFF (cc=1) -+ni + 5555555555555555 & 0000000000000055 = 5555555555555555 (cc=1) -+niy + 0000000000000000 & 0000000000000000 = 0000000000000000 (cc=0) -+niy + 0000000000000001 & 0000000000000000 = 0000000000000001 (cc=0) -+niy + 000000000000FFFF & 0000000000000000 = 000000000000FFFF (cc=0) -+niy + 0000000000007FFF & 0000000000000000 = 0000000000007FFF (cc=0) -+niy + 0000000000008000 & 0000000000000000 = 0000000000008000 (cc=0) -+niy + 00000000FFFFFFFF & 0000000000000000 = 00000000FFFFFFFF (cc=0) -+niy + 0000000080000000 & 0000000000000000 = 0000000080000000 (cc=0) -+niy + 000000007FFFFFFF & 0000000000000000 = 000000007FFFFFFF (cc=0) -+niy + AAAAAAAAAAAAAAAA & 0000000000000000 = 00AAAAAAAAAAAAAA (cc=0) -+niy + 8000000000000000 & 0000000000000000 = 0000000000000000 (cc=0) -+niy + FFFFFFFFFFFFFFFF & 0000000000000000 = 00FFFFFFFFFFFFFF (cc=0) -+niy + 5555555555555555 & 0000000000000000 = 0055555555555555 (cc=0) -+niy + 0000000000000000 & 00000000000000FF = 0000000000000000 (cc=0) -+niy + 0000000000000001 & 00000000000000FF = 0000000000000001 (cc=0) -+niy + 000000000000FFFF & 00000000000000FF = 000000000000FFFF (cc=0) -+niy + 0000000000007FFF & 00000000000000FF = 0000000000007FFF (cc=0) -+niy + 0000000000008000 & 00000000000000FF = 0000000000008000 (cc=0) -+niy + 00000000FFFFFFFF & 00000000000000FF = 00000000FFFFFFFF (cc=0) -+niy + 0000000080000000 & 00000000000000FF = 0000000080000000 (cc=0) -+niy + 000000007FFFFFFF & 00000000000000FF = 000000007FFFFFFF (cc=0) -+niy + AAAAAAAAAAAAAAAA & 00000000000000FF = AAAAAAAAAAAAAAAA (cc=1) -+niy + 8000000000000000 & 00000000000000FF = 8000000000000000 (cc=1) -+niy + FFFFFFFFFFFFFFFF & 00000000000000FF = FFFFFFFFFFFFFFFF (cc=1) -+niy + 5555555555555555 & 00000000000000FF = 5555555555555555 (cc=1) -+niy + 0000000000000000 & 0000000000000080 = 0000000000000000 (cc=0) -+niy + 0000000000000001 & 0000000000000080 = 0000000000000001 (cc=0) -+niy + 000000000000FFFF & 0000000000000080 = 000000000000FFFF (cc=0) -+niy + 0000000000007FFF & 0000000000000080 = 0000000000007FFF (cc=0) -+niy + 0000000000008000 & 0000000000000080 = 0000000000008000 (cc=0) -+niy + 00000000FFFFFFFF & 0000000000000080 = 00000000FFFFFFFF (cc=0) -+niy + 0000000080000000 & 0000000000000080 = 0000000080000000 (cc=0) -+niy + 000000007FFFFFFF & 0000000000000080 = 000000007FFFFFFF (cc=0) -+niy + AAAAAAAAAAAAAAAA & 0000000000000080 = 80AAAAAAAAAAAAAA (cc=1) -+niy + 8000000000000000 & 0000000000000080 = 8000000000000000 (cc=1) -+niy + FFFFFFFFFFFFFFFF & 0000000000000080 = 80FFFFFFFFFFFFFF (cc=1) -+niy + 5555555555555555 & 0000000000000080 = 0055555555555555 (cc=0) -+niy + 0000000000000000 & 00000000000000AA = 0000000000000000 (cc=0) -+niy + 0000000000000001 & 00000000000000AA = 0000000000000001 (cc=0) -+niy + 000000000000FFFF & 00000000000000AA = 000000000000FFFF (cc=0) -+niy + 0000000000007FFF & 00000000000000AA = 0000000000007FFF (cc=0) -+niy + 0000000000008000 & 00000000000000AA = 0000000000008000 (cc=0) -+niy + 00000000FFFFFFFF & 00000000000000AA = 00000000FFFFFFFF (cc=0) -+niy + 0000000080000000 & 00000000000000AA = 0000000080000000 (cc=0) -+niy + 000000007FFFFFFF & 00000000000000AA = 000000007FFFFFFF (cc=0) -+niy + AAAAAAAAAAAAAAAA & 00000000000000AA = AAAAAAAAAAAAAAAA (cc=1) -+niy + 8000000000000000 & 00000000000000AA = 8000000000000000 (cc=1) -+niy + FFFFFFFFFFFFFFFF & 00000000000000AA = AAFFFFFFFFFFFFFF (cc=1) -+niy + 5555555555555555 & 00000000000000AA = 0055555555555555 (cc=0) -+niy + 0000000000000000 & 0000000000000055 = 0000000000000000 (cc=0) -+niy + 0000000000000001 & 0000000000000055 = 0000000000000001 (cc=0) -+niy + 000000000000FFFF & 0000000000000055 = 000000000000FFFF (cc=0) -+niy + 0000000000007FFF & 0000000000000055 = 0000000000007FFF (cc=0) -+niy + 0000000000008000 & 0000000000000055 = 0000000000008000 (cc=0) -+niy + 00000000FFFFFFFF & 0000000000000055 = 00000000FFFFFFFF (cc=0) -+niy + 0000000080000000 & 0000000000000055 = 0000000080000000 (cc=0) -+niy + 000000007FFFFFFF & 0000000000000055 = 000000007FFFFFFF (cc=0) -+niy + AAAAAAAAAAAAAAAA & 0000000000000055 = 00AAAAAAAAAAAAAA (cc=0) -+niy + 8000000000000000 & 0000000000000055 = 0000000000000000 (cc=0) -+niy + FFFFFFFFFFFFFFFF & 0000000000000055 = 55FFFFFFFFFFFFFF (cc=1) -+niy + 5555555555555555 & 0000000000000055 = 5555555555555555 (cc=1) -+nihh + 0000000000000000 & 0000000000000055 = 0000000000000000 (cc=0) -+nihh + 0000000000000001 & 0000000000000055 = 0000000000000001 (cc=0) -+nihh + 000000000000FFFF & 0000000000000055 = 000000000000FFFF (cc=0) -+nihh + 0000000000007FFF & 0000000000000055 = 0000000000007FFF (cc=0) -+nihh + 0000000000008000 & 0000000000000055 = 0000000000008000 (cc=0) -+nihh + 00000000FFFFFFFF & 0000000000000055 = 00000000FFFFFFFF (cc=0) -+nihh + 0000000080000000 & 0000000000000055 = 0000000080000000 (cc=0) -+nihh + 000000007FFFFFFF & 0000000000000055 = 000000007FFFFFFF (cc=0) -+nihh + AAAAAAAAAAAAAAAA & 0000000000000055 = 0000AAAAAAAAAAAA (cc=0) -+nihh + 8000000000000000 & 0000000000000055 = 0000000000000000 (cc=0) -+nihh + FFFFFFFFFFFFFFFF & 0000000000000055 = 0055FFFFFFFFFFFF (cc=1) -+nihh + 5555555555555555 & 0000000000000055 = 0055555555555555 (cc=1) -+nihl + 0000000000000000 & 0000000000000055 = 0000000000000000 (cc=0) -+nihl + 0000000000000001 & 0000000000000055 = 0000000000000001 (cc=0) -+nihl + 000000000000FFFF & 0000000000000055 = 000000000000FFFF (cc=0) -+nihl + 0000000000007FFF & 0000000000000055 = 0000000000007FFF (cc=0) -+nihl + 0000000000008000 & 0000000000000055 = 0000000000008000 (cc=0) -+nihl + 00000000FFFFFFFF & 0000000000000055 = 00000000FFFFFFFF (cc=0) -+nihl + 0000000080000000 & 0000000000000055 = 0000000080000000 (cc=0) -+nihl + 000000007FFFFFFF & 0000000000000055 = 000000007FFFFFFF (cc=0) -+nihl + AAAAAAAAAAAAAAAA & 0000000000000055 = AAAA0000AAAAAAAA (cc=0) -+nihl + 8000000000000000 & 0000000000000055 = 8000000000000000 (cc=0) -+nihl + FFFFFFFFFFFFFFFF & 0000000000000055 = FFFF0055FFFFFFFF (cc=1) -+nihl + 5555555555555555 & 0000000000000055 = 5555005555555555 (cc=1) -+nilh + 0000000000000000 & 0000000000000055 = 0000000000000000 (cc=0) -+nilh + 0000000000000001 & 0000000000000055 = 0000000000000001 (cc=0) -+nilh + 000000000000FFFF & 0000000000000055 = 000000000000FFFF (cc=0) -+nilh + 0000000000007FFF & 0000000000000055 = 0000000000007FFF (cc=0) -+nilh + 0000000000008000 & 0000000000000055 = 0000000000008000 (cc=0) -+nilh + 00000000FFFFFFFF & 0000000000000055 = 000000000055FFFF (cc=1) -+nilh + 0000000080000000 & 0000000000000055 = 0000000000000000 (cc=0) -+nilh + 000000007FFFFFFF & 0000000000000055 = 000000000055FFFF (cc=1) -+nilh + AAAAAAAAAAAAAAAA & 0000000000000055 = AAAAAAAA0000AAAA (cc=0) -+nilh + 8000000000000000 & 0000000000000055 = 8000000000000000 (cc=0) -+nilh + FFFFFFFFFFFFFFFF & 0000000000000055 = FFFFFFFF0055FFFF (cc=1) -+nilh + 5555555555555555 & 0000000000000055 = 5555555500555555 (cc=1) -+nill + 0000000000000000 & 0000000000000055 = 0000000000000000 (cc=0) -+nill + 0000000000000001 & 0000000000000055 = 0000000000000001 (cc=1) -+nill + 000000000000FFFF & 0000000000000055 = 0000000000000055 (cc=1) -+nill + 0000000000007FFF & 0000000000000055 = 0000000000000055 (cc=1) -+nill + 0000000000008000 & 0000000000000055 = 0000000000000000 (cc=0) -+nill + 00000000FFFFFFFF & 0000000000000055 = 00000000FFFF0055 (cc=1) -+nill + 0000000080000000 & 0000000000000055 = 0000000080000000 (cc=0) -+nill + 000000007FFFFFFF & 0000000000000055 = 000000007FFF0055 (cc=1) -+nill + AAAAAAAAAAAAAAAA & 0000000000000055 = AAAAAAAAAAAA0000 (cc=0) -+nill + 8000000000000000 & 0000000000000055 = 8000000000000000 (cc=0) -+nill + FFFFFFFFFFFFFFFF & 0000000000000055 = FFFFFFFFFFFF0055 (cc=1) -+nill + 5555555555555555 & 0000000000000055 = 5555555555550055 (cc=1) -+nihh + 0000000000000000 & 00000000000000AA = 0000000000000000 (cc=0) -+nihh + 0000000000000001 & 00000000000000AA = 0000000000000001 (cc=0) -+nihh + 000000000000FFFF & 00000000000000AA = 000000000000FFFF (cc=0) -+nihh + 0000000000007FFF & 00000000000000AA = 0000000000007FFF (cc=0) -+nihh + 0000000000008000 & 00000000000000AA = 0000000000008000 (cc=0) -+nihh + 00000000FFFFFFFF & 00000000000000AA = 00000000FFFFFFFF (cc=0) -+nihh + 0000000080000000 & 00000000000000AA = 0000000080000000 (cc=0) -+nihh + 000000007FFFFFFF & 00000000000000AA = 000000007FFFFFFF (cc=0) -+nihh + AAAAAAAAAAAAAAAA & 00000000000000AA = 00AAAAAAAAAAAAAA (cc=1) -+nihh + 8000000000000000 & 00000000000000AA = 0000000000000000 (cc=0) -+nihh + FFFFFFFFFFFFFFFF & 00000000000000AA = 00AAFFFFFFFFFFFF (cc=1) -+nihh + 5555555555555555 & 00000000000000AA = 0000555555555555 (cc=0) -+nihl + 0000000000000000 & 00000000000000AA = 0000000000000000 (cc=0) -+nihl + 0000000000000001 & 00000000000000AA = 0000000000000001 (cc=0) -+nihl + 000000000000FFFF & 00000000000000AA = 000000000000FFFF (cc=0) -+nihl + 0000000000007FFF & 00000000000000AA = 0000000000007FFF (cc=0) -+nihl + 0000000000008000 & 00000000000000AA = 0000000000008000 (cc=0) -+nihl + 00000000FFFFFFFF & 00000000000000AA = 00000000FFFFFFFF (cc=0) -+nihl + 0000000080000000 & 00000000000000AA = 0000000080000000 (cc=0) -+nihl + 000000007FFFFFFF & 00000000000000AA = 000000007FFFFFFF (cc=0) -+nihl + AAAAAAAAAAAAAAAA & 00000000000000AA = AAAA00AAAAAAAAAA (cc=1) -+nihl + 8000000000000000 & 00000000000000AA = 8000000000000000 (cc=0) -+nihl + FFFFFFFFFFFFFFFF & 00000000000000AA = FFFF00AAFFFFFFFF (cc=1) -+nihl + 5555555555555555 & 00000000000000AA = 5555000055555555 (cc=0) -+nilh + 0000000000000000 & 00000000000000AA = 0000000000000000 (cc=0) -+nilh + 0000000000000001 & 00000000000000AA = 0000000000000001 (cc=0) -+nilh + 000000000000FFFF & 00000000000000AA = 000000000000FFFF (cc=0) -+nilh + 0000000000007FFF & 00000000000000AA = 0000000000007FFF (cc=0) -+nilh + 0000000000008000 & 00000000000000AA = 0000000000008000 (cc=0) -+nilh + 00000000FFFFFFFF & 00000000000000AA = 0000000000AAFFFF (cc=1) -+nilh + 0000000080000000 & 00000000000000AA = 0000000000000000 (cc=0) -+nilh + 000000007FFFFFFF & 00000000000000AA = 0000000000AAFFFF (cc=1) -+nilh + AAAAAAAAAAAAAAAA & 00000000000000AA = AAAAAAAA00AAAAAA (cc=1) -+nilh + 8000000000000000 & 00000000000000AA = 8000000000000000 (cc=0) -+nilh + FFFFFFFFFFFFFFFF & 00000000000000AA = FFFFFFFF00AAFFFF (cc=1) -+nilh + 5555555555555555 & 00000000000000AA = 5555555500005555 (cc=0) -+nill + 0000000000000000 & 00000000000000AA = 0000000000000000 (cc=0) -+nill + 0000000000000001 & 00000000000000AA = 0000000000000000 (cc=0) -+nill + 000000000000FFFF & 00000000000000AA = 00000000000000AA (cc=1) -+nill + 0000000000007FFF & 00000000000000AA = 00000000000000AA (cc=1) -+nill + 0000000000008000 & 00000000000000AA = 0000000000000000 (cc=0) -+nill + 00000000FFFFFFFF & 00000000000000AA = 00000000FFFF00AA (cc=1) -+nill + 0000000080000000 & 00000000000000AA = 0000000080000000 (cc=0) -+nill + 000000007FFFFFFF & 00000000000000AA = 000000007FFF00AA (cc=1) -+nill + AAAAAAAAAAAAAAAA & 00000000000000AA = AAAAAAAAAAAA00AA (cc=1) -+nill + 8000000000000000 & 00000000000000AA = 8000000000000000 (cc=0) -+nill + FFFFFFFFFFFFFFFF & 00000000000000AA = FFFFFFFFFFFF00AA (cc=1) -+nill + 5555555555555555 & 00000000000000AA = 5555555555550000 (cc=0) -+nihh + 0000000000000000 & 00000000000000FF = 0000000000000000 (cc=0) -+nihh + 0000000000000001 & 00000000000000FF = 0000000000000001 (cc=0) -+nihh + 000000000000FFFF & 00000000000000FF = 000000000000FFFF (cc=0) -+nihh + 0000000000007FFF & 00000000000000FF = 0000000000007FFF (cc=0) -+nihh + 0000000000008000 & 00000000000000FF = 0000000000008000 (cc=0) -+nihh + 00000000FFFFFFFF & 00000000000000FF = 00000000FFFFFFFF (cc=0) -+nihh + 0000000080000000 & 00000000000000FF = 0000000080000000 (cc=0) -+nihh + 000000007FFFFFFF & 00000000000000FF = 000000007FFFFFFF (cc=0) -+nihh + AAAAAAAAAAAAAAAA & 00000000000000FF = 00AAAAAAAAAAAAAA (cc=1) -+nihh + 8000000000000000 & 00000000000000FF = 0000000000000000 (cc=0) -+nihh + FFFFFFFFFFFFFFFF & 00000000000000FF = 00FFFFFFFFFFFFFF (cc=1) -+nihh + 5555555555555555 & 00000000000000FF = 0055555555555555 (cc=1) -+nihl + 0000000000000000 & 00000000000000FF = 0000000000000000 (cc=0) -+nihl + 0000000000000001 & 00000000000000FF = 0000000000000001 (cc=0) -+nihl + 000000000000FFFF & 00000000000000FF = 000000000000FFFF (cc=0) -+nihl + 0000000000007FFF & 00000000000000FF = 0000000000007FFF (cc=0) -+nihl + 0000000000008000 & 00000000000000FF = 0000000000008000 (cc=0) -+nihl + 00000000FFFFFFFF & 00000000000000FF = 00000000FFFFFFFF (cc=0) -+nihl + 0000000080000000 & 00000000000000FF = 0000000080000000 (cc=0) -+nihl + 000000007FFFFFFF & 00000000000000FF = 000000007FFFFFFF (cc=0) -+nihl + AAAAAAAAAAAAAAAA & 00000000000000FF = AAAA00AAAAAAAAAA (cc=1) -+nihl + 8000000000000000 & 00000000000000FF = 8000000000000000 (cc=0) -+nihl + FFFFFFFFFFFFFFFF & 00000000000000FF = FFFF00FFFFFFFFFF (cc=1) -+nihl + 5555555555555555 & 00000000000000FF = 5555005555555555 (cc=1) -+nilh + 0000000000000000 & 00000000000000FF = 0000000000000000 (cc=0) -+nilh + 0000000000000001 & 00000000000000FF = 0000000000000001 (cc=0) -+nilh + 000000000000FFFF & 00000000000000FF = 000000000000FFFF (cc=0) -+nilh + 0000000000007FFF & 00000000000000FF = 0000000000007FFF (cc=0) -+nilh + 0000000000008000 & 00000000000000FF = 0000000000008000 (cc=0) -+nilh + 00000000FFFFFFFF & 00000000000000FF = 0000000000FFFFFF (cc=1) -+nilh + 0000000080000000 & 00000000000000FF = 0000000000000000 (cc=0) -+nilh + 000000007FFFFFFF & 00000000000000FF = 0000000000FFFFFF (cc=1) -+nilh + AAAAAAAAAAAAAAAA & 00000000000000FF = AAAAAAAA00AAAAAA (cc=1) -+nilh + 8000000000000000 & 00000000000000FF = 8000000000000000 (cc=0) -+nilh + FFFFFFFFFFFFFFFF & 00000000000000FF = FFFFFFFF00FFFFFF (cc=1) -+nilh + 5555555555555555 & 00000000000000FF = 5555555500555555 (cc=1) -+nill + 0000000000000000 & 00000000000000FF = 0000000000000000 (cc=0) -+nill + 0000000000000001 & 00000000000000FF = 0000000000000001 (cc=1) -+nill + 000000000000FFFF & 00000000000000FF = 00000000000000FF (cc=1) -+nill + 0000000000007FFF & 00000000000000FF = 00000000000000FF (cc=1) -+nill + 0000000000008000 & 00000000000000FF = 0000000000000000 (cc=0) -+nill + 00000000FFFFFFFF & 00000000000000FF = 00000000FFFF00FF (cc=1) -+nill + 0000000080000000 & 00000000000000FF = 0000000080000000 (cc=0) -+nill + 000000007FFFFFFF & 00000000000000FF = 000000007FFF00FF (cc=1) -+nill + AAAAAAAAAAAAAAAA & 00000000000000FF = AAAAAAAAAAAA00AA (cc=1) -+nill + 8000000000000000 & 00000000000000FF = 8000000000000000 (cc=0) -+nill + FFFFFFFFFFFFFFFF & 00000000000000FF = FFFFFFFFFFFF00FF (cc=1) -+nill + 5555555555555555 & 00000000000000FF = 5555555555550055 (cc=1) -+nihh + 0000000000000000 & 0000000000000000 = 0000000000000000 (cc=0) -+nihh + 0000000000000001 & 0000000000000000 = 0000000000000001 (cc=0) -+nihh + 000000000000FFFF & 0000000000000000 = 000000000000FFFF (cc=0) -+nihh + 0000000000007FFF & 0000000000000000 = 0000000000007FFF (cc=0) -+nihh + 0000000000008000 & 0000000000000000 = 0000000000008000 (cc=0) -+nihh + 00000000FFFFFFFF & 0000000000000000 = 00000000FFFFFFFF (cc=0) -+nihh + 0000000080000000 & 0000000000000000 = 0000000080000000 (cc=0) -+nihh + 000000007FFFFFFF & 0000000000000000 = 000000007FFFFFFF (cc=0) -+nihh + AAAAAAAAAAAAAAAA & 0000000000000000 = 0000AAAAAAAAAAAA (cc=0) -+nihh + 8000000000000000 & 0000000000000000 = 0000000000000000 (cc=0) -+nihh + FFFFFFFFFFFFFFFF & 0000000000000000 = 0000FFFFFFFFFFFF (cc=0) -+nihh + 5555555555555555 & 0000000000000000 = 0000555555555555 (cc=0) -+nihl + 0000000000000000 & 0000000000000000 = 0000000000000000 (cc=0) -+nihl + 0000000000000001 & 0000000000000000 = 0000000000000001 (cc=0) -+nihl + 000000000000FFFF & 0000000000000000 = 000000000000FFFF (cc=0) -+nihl + 0000000000007FFF & 0000000000000000 = 0000000000007FFF (cc=0) -+nihl + 0000000000008000 & 0000000000000000 = 0000000000008000 (cc=0) -+nihl + 00000000FFFFFFFF & 0000000000000000 = 00000000FFFFFFFF (cc=0) -+nihl + 0000000080000000 & 0000000000000000 = 0000000080000000 (cc=0) -+nihl + 000000007FFFFFFF & 0000000000000000 = 000000007FFFFFFF (cc=0) -+nihl + AAAAAAAAAAAAAAAA & 0000000000000000 = AAAA0000AAAAAAAA (cc=0) -+nihl + 8000000000000000 & 0000000000000000 = 8000000000000000 (cc=0) -+nihl + FFFFFFFFFFFFFFFF & 0000000000000000 = FFFF0000FFFFFFFF (cc=0) -+nihl + 5555555555555555 & 0000000000000000 = 5555000055555555 (cc=0) -+nilh + 0000000000000000 & 0000000000000000 = 0000000000000000 (cc=0) -+nilh + 0000000000000001 & 0000000000000000 = 0000000000000001 (cc=0) -+nilh + 000000000000FFFF & 0000000000000000 = 000000000000FFFF (cc=0) -+nilh + 0000000000007FFF & 0000000000000000 = 0000000000007FFF (cc=0) -+nilh + 0000000000008000 & 0000000000000000 = 0000000000008000 (cc=0) -+nilh + 00000000FFFFFFFF & 0000000000000000 = 000000000000FFFF (cc=0) -+nilh + 0000000080000000 & 0000000000000000 = 0000000000000000 (cc=0) -+nilh + 000000007FFFFFFF & 0000000000000000 = 000000000000FFFF (cc=0) -+nilh + AAAAAAAAAAAAAAAA & 0000000000000000 = AAAAAAAA0000AAAA (cc=0) -+nilh + 8000000000000000 & 0000000000000000 = 8000000000000000 (cc=0) -+nilh + FFFFFFFFFFFFFFFF & 0000000000000000 = FFFFFFFF0000FFFF (cc=0) -+nilh + 5555555555555555 & 0000000000000000 = 5555555500005555 (cc=0) -+nill + 0000000000000000 & 0000000000000000 = 0000000000000000 (cc=0) -+nill + 0000000000000001 & 0000000000000000 = 0000000000000000 (cc=0) -+nill + 000000000000FFFF & 0000000000000000 = 0000000000000000 (cc=0) -+nill + 0000000000007FFF & 0000000000000000 = 0000000000000000 (cc=0) -+nill + 0000000000008000 & 0000000000000000 = 0000000000000000 (cc=0) -+nill + 00000000FFFFFFFF & 0000000000000000 = 00000000FFFF0000 (cc=0) -+nill + 0000000080000000 & 0000000000000000 = 0000000080000000 (cc=0) -+nill + 000000007FFFFFFF & 0000000000000000 = 000000007FFF0000 (cc=0) -+nill + AAAAAAAAAAAAAAAA & 0000000000000000 = AAAAAAAAAAAA0000 (cc=0) -+nill + 8000000000000000 & 0000000000000000 = 8000000000000000 (cc=0) -+nill + FFFFFFFFFFFFFFFF & 0000000000000000 = FFFFFFFFFFFF0000 (cc=0) -+nill + 5555555555555555 & 0000000000000000 = 5555555555550000 (cc=0) -+nihh + 0000000000000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+nihh + 0000000000000001 & 000000000000FFFF = 0000000000000001 (cc=0) -+nihh + 000000000000FFFF & 000000000000FFFF = 000000000000FFFF (cc=0) -+nihh + 0000000000007FFF & 000000000000FFFF = 0000000000007FFF (cc=0) -+nihh + 0000000000008000 & 000000000000FFFF = 0000000000008000 (cc=0) -+nihh + 00000000FFFFFFFF & 000000000000FFFF = 00000000FFFFFFFF (cc=0) -+nihh + 0000000080000000 & 000000000000FFFF = 0000000080000000 (cc=0) -+nihh + 000000007FFFFFFF & 000000000000FFFF = 000000007FFFFFFF (cc=0) -+nihh + AAAAAAAAAAAAAAAA & 000000000000FFFF = AAAAAAAAAAAAAAAA (cc=1) -+nihh + 8000000000000000 & 000000000000FFFF = 8000000000000000 (cc=1) -+nihh + FFFFFFFFFFFFFFFF & 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+nihh + 5555555555555555 & 000000000000FFFF = 5555555555555555 (cc=1) -+nihl + 0000000000000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+nihl + 0000000000000001 & 000000000000FFFF = 0000000000000001 (cc=0) -+nihl + 000000000000FFFF & 000000000000FFFF = 000000000000FFFF (cc=0) -+nihl + 0000000000007FFF & 000000000000FFFF = 0000000000007FFF (cc=0) -+nihl + 0000000000008000 & 000000000000FFFF = 0000000000008000 (cc=0) -+nihl + 00000000FFFFFFFF & 000000000000FFFF = 00000000FFFFFFFF (cc=0) -+nihl + 0000000080000000 & 000000000000FFFF = 0000000080000000 (cc=0) -+nihl + 000000007FFFFFFF & 000000000000FFFF = 000000007FFFFFFF (cc=0) -+nihl + AAAAAAAAAAAAAAAA & 000000000000FFFF = AAAAAAAAAAAAAAAA (cc=1) -+nihl + 8000000000000000 & 000000000000FFFF = 8000000000000000 (cc=0) -+nihl + FFFFFFFFFFFFFFFF & 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+nihl + 5555555555555555 & 000000000000FFFF = 5555555555555555 (cc=1) -+nilh + 0000000000000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+nilh + 0000000000000001 & 000000000000FFFF = 0000000000000001 (cc=0) -+nilh + 000000000000FFFF & 000000000000FFFF = 000000000000FFFF (cc=0) -+nilh + 0000000000007FFF & 000000000000FFFF = 0000000000007FFF (cc=0) -+nilh + 0000000000008000 & 000000000000FFFF = 0000000000008000 (cc=0) -+nilh + 00000000FFFFFFFF & 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+nilh + 0000000080000000 & 000000000000FFFF = 0000000080000000 (cc=1) -+nilh + 000000007FFFFFFF & 000000000000FFFF = 000000007FFFFFFF (cc=1) -+nilh + AAAAAAAAAAAAAAAA & 000000000000FFFF = AAAAAAAAAAAAAAAA (cc=1) -+nilh + 8000000000000000 & 000000000000FFFF = 8000000000000000 (cc=0) -+nilh + FFFFFFFFFFFFFFFF & 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+nilh + 5555555555555555 & 000000000000FFFF = 5555555555555555 (cc=1) -+nill + 0000000000000000 & 000000000000FFFF = 0000000000000000 (cc=0) -+nill + 0000000000000001 & 000000000000FFFF = 0000000000000001 (cc=1) -+nill + 000000000000FFFF & 000000000000FFFF = 000000000000FFFF (cc=1) -+nill + 0000000000007FFF & 000000000000FFFF = 0000000000007FFF (cc=1) -+nill + 0000000000008000 & 000000000000FFFF = 0000000000008000 (cc=1) -+nill + 00000000FFFFFFFF & 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+nill + 0000000080000000 & 000000000000FFFF = 0000000080000000 (cc=0) -+nill + 000000007FFFFFFF & 000000000000FFFF = 000000007FFFFFFF (cc=1) -+nill + AAAAAAAAAAAAAAAA & 000000000000FFFF = AAAAAAAAAAAAAAAA (cc=1) -+nill + 8000000000000000 & 000000000000FFFF = 8000000000000000 (cc=0) -+nill + FFFFFFFFFFFFFFFF & 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+nill + 5555555555555555 & 000000000000FFFF = 5555555555555555 (cc=1) -+nihh + 0000000000000000 & 000000000000AAAA = 0000000000000000 (cc=0) -+nihh + 0000000000000001 & 000000000000AAAA = 0000000000000001 (cc=0) -+nihh + 000000000000FFFF & 000000000000AAAA = 000000000000FFFF (cc=0) -+nihh + 0000000000007FFF & 000000000000AAAA = 0000000000007FFF (cc=0) -+nihh + 0000000000008000 & 000000000000AAAA = 0000000000008000 (cc=0) -+nihh + 00000000FFFFFFFF & 000000000000AAAA = 00000000FFFFFFFF (cc=0) -+nihh + 0000000080000000 & 000000000000AAAA = 0000000080000000 (cc=0) -+nihh + 000000007FFFFFFF & 000000000000AAAA = 000000007FFFFFFF (cc=0) -+nihh + AAAAAAAAAAAAAAAA & 000000000000AAAA = AAAAAAAAAAAAAAAA (cc=1) -+nihh + 8000000000000000 & 000000000000AAAA = 8000000000000000 (cc=1) -+nihh + FFFFFFFFFFFFFFFF & 000000000000AAAA = AAAAFFFFFFFFFFFF (cc=1) -+nihh + 5555555555555555 & 000000000000AAAA = 0000555555555555 (cc=0) -+nihl + 0000000000000000 & 000000000000AAAA = 0000000000000000 (cc=0) -+nihl + 0000000000000001 & 000000000000AAAA = 0000000000000001 (cc=0) -+nihl + 000000000000FFFF & 000000000000AAAA = 000000000000FFFF (cc=0) -+nihl + 0000000000007FFF & 000000000000AAAA = 0000000000007FFF (cc=0) -+nihl + 0000000000008000 & 000000000000AAAA = 0000000000008000 (cc=0) -+nihl + 00000000FFFFFFFF & 000000000000AAAA = 00000000FFFFFFFF (cc=0) -+nihl + 0000000080000000 & 000000000000AAAA = 0000000080000000 (cc=0) -+nihl + 000000007FFFFFFF & 000000000000AAAA = 000000007FFFFFFF (cc=0) -+nihl + AAAAAAAAAAAAAAAA & 000000000000AAAA = AAAAAAAAAAAAAAAA (cc=1) -+nihl + 8000000000000000 & 000000000000AAAA = 8000000000000000 (cc=0) -+nihl + FFFFFFFFFFFFFFFF & 000000000000AAAA = FFFFAAAAFFFFFFFF (cc=1) -+nihl + 5555555555555555 & 000000000000AAAA = 5555000055555555 (cc=0) -+nilh + 0000000000000000 & 000000000000AAAA = 0000000000000000 (cc=0) -+nilh + 0000000000000001 & 000000000000AAAA = 0000000000000001 (cc=0) -+nilh + 000000000000FFFF & 000000000000AAAA = 000000000000FFFF (cc=0) -+nilh + 0000000000007FFF & 000000000000AAAA = 0000000000007FFF (cc=0) -+nilh + 0000000000008000 & 000000000000AAAA = 0000000000008000 (cc=0) -+nilh + 00000000FFFFFFFF & 000000000000AAAA = 00000000AAAAFFFF (cc=1) -+nilh + 0000000080000000 & 000000000000AAAA = 0000000080000000 (cc=1) -+nilh + 000000007FFFFFFF & 000000000000AAAA = 000000002AAAFFFF (cc=1) -+nilh + AAAAAAAAAAAAAAAA & 000000000000AAAA = AAAAAAAAAAAAAAAA (cc=1) -+nilh + 8000000000000000 & 000000000000AAAA = 8000000000000000 (cc=0) -+nilh + FFFFFFFFFFFFFFFF & 000000000000AAAA = FFFFFFFFAAAAFFFF (cc=1) -+nilh + 5555555555555555 & 000000000000AAAA = 5555555500005555 (cc=0) -+nill + 0000000000000000 & 000000000000AAAA = 0000000000000000 (cc=0) -+nill + 0000000000000001 & 000000000000AAAA = 0000000000000000 (cc=0) -+nill + 000000000000FFFF & 000000000000AAAA = 000000000000AAAA (cc=1) -+nill + 0000000000007FFF & 000000000000AAAA = 0000000000002AAA (cc=1) -+nill + 0000000000008000 & 000000000000AAAA = 0000000000008000 (cc=1) -+nill + 00000000FFFFFFFF & 000000000000AAAA = 00000000FFFFAAAA (cc=1) -+nill + 0000000080000000 & 000000000000AAAA = 0000000080000000 (cc=0) -+nill + 000000007FFFFFFF & 000000000000AAAA = 000000007FFFAAAA (cc=1) -+nill + AAAAAAAAAAAAAAAA & 000000000000AAAA = AAAAAAAAAAAAAAAA (cc=1) -+nill + 8000000000000000 & 000000000000AAAA = 8000000000000000 (cc=0) -+nill + FFFFFFFFFFFFFFFF & 000000000000AAAA = FFFFFFFFFFFFAAAA (cc=1) -+nill + 5555555555555555 & 000000000000AAAA = 5555555555550000 (cc=0) -+nihh + 0000000000000000 & 0000000000005555 = 0000000000000000 (cc=0) -+nihh + 0000000000000001 & 0000000000005555 = 0000000000000001 (cc=0) -+nihh + 000000000000FFFF & 0000000000005555 = 000000000000FFFF (cc=0) -+nihh + 0000000000007FFF & 0000000000005555 = 0000000000007FFF (cc=0) -+nihh + 0000000000008000 & 0000000000005555 = 0000000000008000 (cc=0) -+nihh + 00000000FFFFFFFF & 0000000000005555 = 00000000FFFFFFFF (cc=0) -+nihh + 0000000080000000 & 0000000000005555 = 0000000080000000 (cc=0) -+nihh + 000000007FFFFFFF & 0000000000005555 = 000000007FFFFFFF (cc=0) -+nihh + AAAAAAAAAAAAAAAA & 0000000000005555 = 0000AAAAAAAAAAAA (cc=0) -+nihh + 8000000000000000 & 0000000000005555 = 0000000000000000 (cc=0) -+nihh + FFFFFFFFFFFFFFFF & 0000000000005555 = 5555FFFFFFFFFFFF (cc=1) -+nihh + 5555555555555555 & 0000000000005555 = 5555555555555555 (cc=1) -+nihl + 0000000000000000 & 0000000000005555 = 0000000000000000 (cc=0) -+nihl + 0000000000000001 & 0000000000005555 = 0000000000000001 (cc=0) -+nihl + 000000000000FFFF & 0000000000005555 = 000000000000FFFF (cc=0) -+nihl + 0000000000007FFF & 0000000000005555 = 0000000000007FFF (cc=0) -+nihl + 0000000000008000 & 0000000000005555 = 0000000000008000 (cc=0) -+nihl + 00000000FFFFFFFF & 0000000000005555 = 00000000FFFFFFFF (cc=0) -+nihl + 0000000080000000 & 0000000000005555 = 0000000080000000 (cc=0) -+nihl + 000000007FFFFFFF & 0000000000005555 = 000000007FFFFFFF (cc=0) -+nihl + AAAAAAAAAAAAAAAA & 0000000000005555 = AAAA0000AAAAAAAA (cc=0) -+nihl + 8000000000000000 & 0000000000005555 = 8000000000000000 (cc=0) -+nihl + FFFFFFFFFFFFFFFF & 0000000000005555 = FFFF5555FFFFFFFF (cc=1) -+nihl + 5555555555555555 & 0000000000005555 = 5555555555555555 (cc=1) -+nilh + 0000000000000000 & 0000000000005555 = 0000000000000000 (cc=0) -+nilh + 0000000000000001 & 0000000000005555 = 0000000000000001 (cc=0) -+nilh + 000000000000FFFF & 0000000000005555 = 000000000000FFFF (cc=0) -+nilh + 0000000000007FFF & 0000000000005555 = 0000000000007FFF (cc=0) -+nilh + 0000000000008000 & 0000000000005555 = 0000000000008000 (cc=0) -+nilh + 00000000FFFFFFFF & 0000000000005555 = 000000005555FFFF (cc=1) -+nilh + 0000000080000000 & 0000000000005555 = 0000000000000000 (cc=0) -+nilh + 000000007FFFFFFF & 0000000000005555 = 000000005555FFFF (cc=1) -+nilh + AAAAAAAAAAAAAAAA & 0000000000005555 = AAAAAAAA0000AAAA (cc=0) -+nilh + 8000000000000000 & 0000000000005555 = 8000000000000000 (cc=0) -+nilh + FFFFFFFFFFFFFFFF & 0000000000005555 = FFFFFFFF5555FFFF (cc=1) -+nilh + 5555555555555555 & 0000000000005555 = 5555555555555555 (cc=1) -+nill + 0000000000000000 & 0000000000005555 = 0000000000000000 (cc=0) -+nill + 0000000000000001 & 0000000000005555 = 0000000000000001 (cc=1) -+nill + 000000000000FFFF & 0000000000005555 = 0000000000005555 (cc=1) -+nill + 0000000000007FFF & 0000000000005555 = 0000000000005555 (cc=1) -+nill + 0000000000008000 & 0000000000005555 = 0000000000000000 (cc=0) -+nill + 00000000FFFFFFFF & 0000000000005555 = 00000000FFFF5555 (cc=1) -+nill + 0000000080000000 & 0000000000005555 = 0000000080000000 (cc=0) -+nill + 000000007FFFFFFF & 0000000000005555 = 000000007FFF5555 (cc=1) -+nill + AAAAAAAAAAAAAAAA & 0000000000005555 = AAAAAAAAAAAA0000 (cc=0) -+nill + 8000000000000000 & 0000000000005555 = 8000000000000000 (cc=0) -+nill + FFFFFFFFFFFFFFFF & 0000000000005555 = FFFFFFFFFFFF5555 (cc=1) -+nill + 5555555555555555 & 0000000000005555 = 5555555555555555 (cc=1) ---- none/tests/s390x/and.vgtest -+++ none/tests/s390x/and.vgtest -@@ -0,0 +1 @@ -+prog: and ---- none/tests/s390x/clc.c -+++ none/tests/s390x/clc.c -@@ -0,0 +1,74 @@ -+#include -+#include -+ -+char b1[23] ="0123456789abcdefghijklm"; -+char b2[23] ="mlkjihgfedcba9876543210"; -+char b3[23] ="mmmmmmmmmmmmmmmmmmmmmmm"; -+char b4[23] ="00000000000000000000000"; -+char longbuf1[256]; -+char longbuf2[256]; -+ -+static int clc(char *a1,char *a2, int l) -+{ -+ int cc; -+ -+ asm volatile( "larl 1, 1f\n" -+ "ex %3,0(1)\n" -+ "j 2f\n" -+ "1: clc 0(1,%1),0(%2)\n" -+ "2: ipm %0\n" -+ "srl %0,28\n" -+ :"=d" (cc) -+ :"a" (a1), "a" (a2), "d" (l): "1", "cc"); -+ return cc; -+} -+ -+ -+void testrun(char *a1, char *a2, int l) -+{ -+ int cc; -+ -+ cc = clc(a1, a2, l); -+ printf("%d bytes:%d\n",l, cc); -+} -+ -+ -+void multiplex(int l, long offset1, long offset2) -+{ -+ testrun(b1 + offset1, b1 + offset2, l); -+ testrun(b1 + offset1, b2 + offset2, l); -+ testrun(b1 + offset1, b3 + offset2, l); -+ testrun(b1 + offset1, b4 + offset2, l); -+ testrun(b2 + offset1, b2 + offset2, l); -+ testrun(b2 + offset1, b3 + offset2, l); -+ testrun(b2 + offset1, b4 + offset2, l); -+ testrun(b3 + offset1, b3 + offset2, l); -+ testrun(b3 + offset1, b4 + offset2, l); -+ testrun(b4 + offset1, b4 + offset2, l); -+} -+ -+void sweep(int l) -+{ -+ multiplex(l, 0, 0); -+ multiplex(l, 1, 0); -+ multiplex(l, 1, 1); -+ multiplex(l, 0, 1); -+} -+ -+int main() -+{ -+ sweep(0); -+ sweep(1); -+ sweep(2); -+ sweep(3); -+ sweep(4); -+ sweep(5); -+ sweep(22); -+ testrun(longbuf1, longbuf2, 255); -+ longbuf1[255] = 'a'; -+ testrun(longbuf1, longbuf2, 255); -+ longbuf2[255] = 'b'; -+ testrun(longbuf1, longbuf2, 255); -+ return 0; -+} -+ ---- none/tests/s390x/clcle.c -+++ none/tests/s390x/clcle.c -@@ -0,0 +1,74 @@ -+#include -+#include -+ -+char b1[23] ="0123456789abcdefghijklm"; -+char b2[23] ="mlkjihgfedcba9876543210"; -+char b3[23] ="mmmmmmmmmmmmmmmmmmmmmmm"; -+char b4[23] ="00000000000000000000000"; -+char longbuf[17000000]; -+ -+static int clcle(unsigned long *_a1, unsigned long *_l1, unsigned long *_a3, unsigned long *_l3, char _pad) -+{ -+ register unsigned long a1 asm ("2") = *_a1; -+ register unsigned long l1 asm ("3") = *_l1; -+ register unsigned long a3 asm ("4") = *_a3; -+ register unsigned long l3 asm ("5") = *_l3; -+ register unsigned long pad asm ("6") = _pad; -+ register unsigned long cc asm ("7"); -+ -+ asm volatile( "0: clcle 2,4,0(6)\n\t" -+ "jo 0b\n\t" -+ "ipm %0\n\t" -+ "srl %0,28\n\t" -+ :"=d" (cc), "+d" (a1),"+d" (l1), "+d" (a3), "+d" (l3) -+ : "d" (pad) -+ : "memory", "cc"); -+ *_a1 = a1; -+ *_a3 = a3; -+ *_l1 = l1; -+ *_l3 = l3; -+ -+ return cc; -+} -+ -+ -+void testrun(void *_a1, unsigned long _l1, void *_a3, unsigned long _l3, char pad) -+{ -+ unsigned long a1,a3,l1,l3; -+ int cc; -+ -+ a1 = (unsigned long) _a1; l1 = _l1; a3 = (unsigned long) _a3; l3 = _l3; -+ cc = clcle(&a1, &l1, &a3, &l3, pad); -+ printf("cc: %d, l1: %lu(%lu) l3: %lu(%lu) diff1: %lu diff3: %lu\n", -+ cc, l1, _l1, l3, _l3, a1-(unsigned long) _a1, a3-(unsigned long) _a3); -+} -+ -+ -+void multiplex(unsigned long l1, unsigned long l3, char pad) -+{ -+ testrun(b1, l1, b1, l3, pad); -+ testrun(b1, l1, b2, l3, pad); -+ testrun(b1, l1, b3, l3, pad); -+ testrun(b1, l1, b4, l3, pad); -+ testrun(b2, l1, b2, l3, pad); -+ testrun(b2, l1, b3, l3, pad); -+ testrun(b2, l1, b4, l3, pad); -+ testrun(b3, l1, b3, l3, pad); -+ testrun(b3, l1, b4, l3, pad); -+ testrun(b4, l1, b4, l3, pad); -+} -+ -+int main() -+{ -+ multiplex(0,0,9); -+ multiplex(1,0,9); -+ multiplex(0,1,9); -+ multiplex(1,1,9); -+ multiplex(5,23,9); -+ multiplex(23,5,9); -+ testrun(longbuf,10000,longbuf,100000,0); -+ testrun(longbuf,10000,longbuf,100000,128); -+ testrun(longbuf,10000,longbuf,100000,255); -+ exit(0); -+} -+ ---- none/tests/s390x/clcle.stderr.exp -+++ none/tests/s390x/clcle.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/clcle.stdout.exp -+++ none/tests/s390x/clcle.stdout.exp -@@ -0,0 +1,63 @@ -+cc: 0, l1: 0(0) l3: 0(0) diff1: 0 diff3: 0 -+cc: 0, l1: 0(0) l3: 0(0) diff1: 0 diff3: 0 -+cc: 0, l1: 0(0) l3: 0(0) diff1: 0 diff3: 0 -+cc: 0, l1: 0(0) l3: 0(0) diff1: 0 diff3: 0 -+cc: 0, l1: 0(0) l3: 0(0) diff1: 0 diff3: 0 -+cc: 0, l1: 0(0) l3: 0(0) diff1: 0 diff3: 0 -+cc: 0, l1: 0(0) l3: 0(0) diff1: 0 diff3: 0 -+cc: 0, l1: 0(0) l3: 0(0) diff1: 0 diff3: 0 -+cc: 0, l1: 0(0) l3: 0(0) diff1: 0 diff3: 0 -+cc: 0, l1: 0(0) l3: 0(0) diff1: 0 diff3: 0 -+cc: 2, l1: 1(1) l3: 0(0) diff1: 0 diff3: 0 -+cc: 2, l1: 1(1) l3: 0(0) diff1: 0 diff3: 0 -+cc: 2, l1: 1(1) l3: 0(0) diff1: 0 diff3: 0 -+cc: 2, l1: 1(1) l3: 0(0) diff1: 0 diff3: 0 -+cc: 2, l1: 1(1) l3: 0(0) diff1: 0 diff3: 0 -+cc: 2, l1: 1(1) l3: 0(0) diff1: 0 diff3: 0 -+cc: 2, l1: 1(1) l3: 0(0) diff1: 0 diff3: 0 -+cc: 2, l1: 1(1) l3: 0(0) diff1: 0 diff3: 0 -+cc: 2, l1: 1(1) l3: 0(0) diff1: 0 diff3: 0 -+cc: 2, l1: 1(1) l3: 0(0) diff1: 0 diff3: 0 -+cc: 1, l1: 0(0) l3: 1(1) diff1: 0 diff3: 0 -+cc: 1, l1: 0(0) l3: 1(1) diff1: 0 diff3: 0 -+cc: 1, l1: 0(0) l3: 1(1) diff1: 0 diff3: 0 -+cc: 1, l1: 0(0) l3: 1(1) diff1: 0 diff3: 0 -+cc: 1, l1: 0(0) l3: 1(1) diff1: 0 diff3: 0 -+cc: 1, l1: 0(0) l3: 1(1) diff1: 0 diff3: 0 -+cc: 1, l1: 0(0) l3: 1(1) diff1: 0 diff3: 0 -+cc: 1, l1: 0(0) l3: 1(1) diff1: 0 diff3: 0 -+cc: 1, l1: 0(0) l3: 1(1) diff1: 0 diff3: 0 -+cc: 1, l1: 0(0) l3: 1(1) diff1: 0 diff3: 0 -+cc: 0, l1: 0(1) l3: 0(1) diff1: 1 diff3: 1 -+cc: 1, l1: 1(1) l3: 1(1) diff1: 0 diff3: 0 -+cc: 1, l1: 1(1) l3: 1(1) diff1: 0 diff3: 0 -+cc: 0, l1: 0(1) l3: 0(1) diff1: 1 diff3: 1 -+cc: 0, l1: 0(1) l3: 0(1) diff1: 1 diff3: 1 -+cc: 0, l1: 0(1) l3: 0(1) diff1: 1 diff3: 1 -+cc: 2, l1: 1(1) l3: 1(1) diff1: 0 diff3: 0 -+cc: 0, l1: 0(1) l3: 0(1) diff1: 1 diff3: 1 -+cc: 2, l1: 1(1) l3: 1(1) diff1: 0 diff3: 0 -+cc: 0, l1: 0(1) l3: 0(1) diff1: 1 diff3: 1 -+cc: 1, l1: 0(5) l3: 18(23) diff1: 5 diff3: 5 -+cc: 1, l1: 5(5) l3: 23(23) diff1: 0 diff3: 0 -+cc: 1, l1: 5(5) l3: 23(23) diff1: 0 diff3: 0 -+cc: 2, l1: 4(5) l3: 22(23) diff1: 1 diff3: 1 -+cc: 1, l1: 0(5) l3: 18(23) diff1: 5 diff3: 5 -+cc: 1, l1: 4(5) l3: 22(23) diff1: 1 diff3: 1 -+cc: 2, l1: 5(5) l3: 23(23) diff1: 0 diff3: 0 -+cc: 1, l1: 0(5) l3: 18(23) diff1: 5 diff3: 5 -+cc: 2, l1: 5(5) l3: 23(23) diff1: 0 diff3: 0 -+cc: 1, l1: 0(5) l3: 18(23) diff1: 5 diff3: 5 -+cc: 2, l1: 18(23) l3: 0(5) diff1: 5 diff3: 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bytes:1 -+22 bytes:2 -+22 bytes:1 -+22 bytes:2 -+22 bytes:1 -+22 bytes:0 -+22 bytes:1 -+22 bytes:1 -+22 bytes:2 -+22 bytes:0 -+22 bytes:1 -+22 bytes:2 -+22 bytes:0 -+22 bytes:2 -+22 bytes:0 -+22 bytes:1 -+22 bytes:1 -+22 bytes:1 -+22 bytes:2 -+22 bytes:2 -+22 bytes:1 -+22 bytes:2 -+22 bytes:2 -+22 bytes:2 -+22 bytes:2 -+255 bytes:0 -+255 bytes:2 -+255 bytes:1 ---- none/tests/s390x/clc.vgtest -+++ none/tests/s390x/clc.vgtest -@@ -0,0 +1 @@ -+prog: clc ---- none/tests/s390x/cvb.c -+++ none/tests/s390x/cvb.c -@@ -0,0 +1,104 @@ -+#include -+ -+static unsigned long test[] ={ -+ 0x000000000000000a, -+ 0x000000000000001a, -+ 0x000000000000012a, -+ 0x000000000000123a, -+ 0x000000000001234a, -+ 0x000000000012345a, -+ 0x000000000123456a, -+ 0x000000001234567a, -+ 0x000000012345678a, -+ 0x000000123456789a, -+ 0x000001234567890a, -+ 0x000000000000000b, -+ 0x000000000000001b, -+ 0x000000000000012b, -+ 0x000000000000123b, -+ 0x000000000001234b, -+ 0x000000000012345b, -+ 0x000000000123456b, -+ 0x000000001234567b, -+ 0x000000012345678b, -+ 0x000000123456789b, -+ 0x000001234567890b, -+ 0x000000000000000c, -+ 0x000000000000001c, -+ 0x000000000000012c, -+ 0x000000000000123c, -+ 0x000000000001234c, -+ 0x000000000012345c, -+ 0x000000000123456c, -+ 0x000000001234567c, -+ 0x000000012345678c, -+ 0x000000123456789c, -+ 0x000001234567890c, -+ 0x000000000000000d, -+ 0x000000000000001d, -+ 0x000000000000012d, -+ 0x000000000000123d, -+ 0x000000000001234d, -+ 0x000000000012345d, -+ 0x000000000123456d, -+ 0x000000001234567d, -+ 0x000000012345678d, -+ 0x000000123456789d, -+ 0x000001234567890d, -+ 0x000000000000000e, -+ 0x000000000000001e, -+ 0x000000000000012e, -+ 0x000000000000123e, -+ 0x000000000001234e, -+ 0x000000000012345e, -+ 0x000000000123456e, -+ 0x000000001234567e, -+ 0x000000012345678e, -+ 0x000000123456789e, -+ 0x000001234567890e, -+ 0x000000000000000f, -+ 0x000000000000001f, -+ 0x000000000000012f, -+ 0x000000000000123f, -+ 0x000000000001234f, -+ 0x000000000012345f, -+ 0x000000000123456f, -+ 0x000000001234567f, -+ 0x000000012345678f, -+ 0x000000123456789f, -+ 0x000001234567890f, -+ /* min and max */ -+ 0x000002147483647c, -+ 0x000002147483648d, -+ -+/* fixs390: we also need to check if invalid values cause a fixed-point-devide exception. -+ Not yet implemented. */ -+/* 0x000002147483648c, -+ 0x000002147483649d, -+ 0x00000000000000fa, */ -+ -+}; -+ -+ -+static signed int dec_to_hex(unsigned long *addr) -+{ -+ register signed int res asm("2") = 0; -+ register unsigned long *_addr asm("4") = addr; -+ -+ asm volatile( -+ " cvb %0,0(0,%1)" -+ : "=d" (res) : "d" (_addr) : "memory"); -+ return res & 0xffffffff; -+} -+ -+ -+ -+ -+int main() -+{ -+ int i; -+ -+ for (i = 0; i < sizeof(test) / sizeof(test[0]); i++) -+ printf("%d\n", dec_to_hex(&test[i])); -+ return 0; -+} ---- none/tests/s390x/cvb.stderr.exp -+++ none/tests/s390x/cvb.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/cvb.stdout.exp -+++ none/tests/s390x/cvb.stdout.exp -@@ -0,0 +1,68 @@ -+0 -+1 -+12 -+123 -+1234 -+12345 -+123456 -+1234567 -+12345678 -+123456789 -+1234567890 -+0 -+-1 -+-12 -+-123 -+-1234 -+-12345 -+-123456 -+-1234567 -+-12345678 -+-123456789 -+-1234567890 -+0 -+1 -+12 -+123 -+1234 -+12345 -+123456 -+1234567 -+12345678 -+123456789 -+1234567890 -+0 -+-1 -+-12 -+-123 -+-1234 -+-12345 -+-123456 -+-1234567 -+-12345678 -+-123456789 -+-1234567890 -+0 -+1 -+12 -+123 -+1234 -+12345 -+123456 -+1234567 -+12345678 -+123456789 -+1234567890 -+0 -+1 -+12 -+123 -+1234 -+12345 -+123456 -+1234567 -+12345678 -+123456789 -+1234567890 -+2147483647 -+-2147483648 ---- none/tests/s390x/cvb.vgtest -+++ none/tests/s390x/cvb.vgtest -@@ -0,0 +1 @@ -+prog: cvb ---- none/tests/s390x/cvd.c -+++ none/tests/s390x/cvd.c -@@ -0,0 +1,34 @@ -+#include -+ -+static signed int test[] ={ -+ 0, -+ 1, -+ -1, -+ 0x7fffffff, -+ 0x80000000, -+ 0x12345678, -+ 0x87654321, -+ 0x55555555, -+ 0x11111111, -+ 0xaaaaaaaa, -+}; -+ -+ -+static unsigned long hex_to_dec(signed int num) -+{ -+ unsigned long addr = 0; -+ -+ asm volatile( -+ " cvd %2,%0" -+ : "=m" (addr) : "a" (&addr) , "d" (num) : "memory"); -+ return addr; -+} -+ -+int main() -+{ -+ int i; -+ -+ for (i = 0; i < sizeof(test) / sizeof(test[0]); i++) -+ printf("%lx\n", hex_to_dec(test[i])); -+ return 0; -+} ---- none/tests/s390x/cvd.stderr.exp -+++ none/tests/s390x/cvd.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/cvd.stdout.exp -+++ none/tests/s390x/cvd.stdout.exp -@@ -0,0 +1,10 @@ -+c -+1c -+1d -+2147483647c -+2147483648d -+305419896c -+2023406815d -+1431655765c -+286331153c -+1431655766d ---- none/tests/s390x/cvd.vgtest -+++ none/tests/s390x/cvd.vgtest -@@ -0,0 +1 @@ -+prog: cvd ---- none/tests/s390x/div.c -+++ none/tests/s390x/div.c -@@ -0,0 +1,30 @@ -+#include -+#include "div.h" -+ -+static void do_regmem_insns(unsigned long m2) -+{ -+ memsweep(d, m2); -+ regsweep(dr, m2); -+ memsweep(dl, m2); -+ regsweep(dlr, m2); -+ memsweep(dlg, m2); -+ regsweep(dlgr, m2); -+ memsweep(dsg, m2); -+ regsweep(dsgr, m2); -+ memsweep(dsgf, m2); -+ regsweep(dsgfr, m2); -+} -+ -+int main() -+{ -+ do_regmem_insns(0x7ffffffffffffffaul); -+ do_regmem_insns(0x80000000f0000000ul); -+ do_regmem_insns(0xfffffffafffffffaul); -+ do_regmem_insns(0x7ffffffff0000000ul); -+ do_regmem_insns(0x80000000f0000000ul); -+ do_regmem_insns(0xfffffffaf0000000ul); -+ do_regmem_insns(0x000000087ffffffful); -+ do_regmem_insns(0x0000000480000000ul); -+ do_regmem_insns(0x00000008fffffffaul); -+ return 0; -+} ---- none/tests/s390x/div.h -+++ none/tests/s390x/div.h -@@ -0,0 +1,65 @@ -+#include -+ -+#define DIV_REG_MEM(insn, d1_1, d1_2, d2) \ -+({ \ -+ unsigned long tmp1 = d1_1; \ -+ unsigned long tmp2 = d1_2; \ -+ asm volatile( "lgr 2, %0\n" \ -+ "lgr 3, %1\n" \ -+ #insn " 2, %2\n" \ -+ "lgr %0,2\n" \ -+ "lgr %1,3\n" \ -+ : "+d" (tmp1), "+d" (tmp2) \ -+ : "Q" (d2) \ -+ : "2","3"); \ -+ printf(#insn " %16.16lX%16.16lX / %16.16lX = %16.16lX (rem %16.16lX)\n", d1_1, d1_2, d2, tmp2, tmp1); \ -+}) -+ -+#define DIV_REG_REG(insn, d1_1, d1_2, d2) \ -+({ \ -+ unsigned long tmp1 = d1_1; \ -+ unsigned long tmp2 = d1_2; \ -+ asm volatile( "lgr 2, %0\n" \ -+ "lgr 3, %1\n" \ -+ #insn " 2, %2\n" \ -+ "lgr %0,2\n" \ -+ "lgr %1,3\n" \ -+ : "+d" (tmp1), "+d" (tmp2) \ -+ : "d" (d2) \ -+ : "2","3"); \ -+ printf(#insn " %16.16lX%16.16lX / %16.16lX = %16.16lX (rem %16.16lX)\n", d1_1, d1_2, d2, tmp2, tmp1); \ -+}) -+ -+ -+#define memsweep(i, d2) \ -+({ \ -+ DIV_REG_MEM(i, 0x0ul, 0ul, d2); \ -+ DIV_REG_MEM(i, 0x0ul, 1ul, d2); \ -+ DIV_REG_MEM(i, 0x0ul, 0xfffful, d2); \ -+ DIV_REG_MEM(i, 0x0ul, 0x7ffful, d2); \ -+ DIV_REG_MEM(i, 0x0ul, 0x8000ul, d2); \ -+ DIV_REG_MEM(i, 0x0ul, 0xfffffffful, d2); \ -+ DIV_REG_MEM(i, 0x0ul, 0x80000000ul, d2); \ -+ DIV_REG_MEM(i, 0x0ul, 0x7ffffffful, d2); \ -+ DIV_REG_MEM(i, 0x0ul, 0xfffffffffffffffful, d2); \ -+ DIV_REG_MEM(i, 0x0ul, 0x8000000000000000ul, d2); \ -+ DIV_REG_MEM(i, 0x0ul, 0x7ffffffffffffffful, d2); \ -+ DIV_REG_MEM(i, 0x1ul, 0xaffffffful, d2); \ -+}) -+ -+#define regsweep(i, d2) \ -+({ \ -+ DIV_REG_REG(i, 0x0ul, 0ul, d2); \ -+ DIV_REG_REG(i, 0x0ul, 1ul, d2); \ -+ DIV_REG_REG(i, 0x0ul, 0xfffful, d2); \ -+ DIV_REG_REG(i, 0x0ul, 0x7ffful, d2); \ -+ DIV_REG_REG(i, 0x0ul, 0x8000ul, d2); \ -+ DIV_REG_REG(i, 0x0ul, 0xfffffffful, d2); \ -+ DIV_REG_REG(i, 0x0ul, 0x80000000ul, d2); \ -+ DIV_REG_REG(i, 0x0ul, 0x7ffffffful, d2); \ -+ DIV_REG_REG(i, 0x0ul, 0xfffffffffffffffful, d2); \ -+ DIV_REG_REG(i, 0x0ul, 0x8000000000000000ul, d2); \ -+ DIV_REG_REG(i, 0x0ul, 0x7ffffffffffffffful, d2); \ -+ DIV_REG_REG(i, 0x1ul, 0xaffffffful, d2); \ -+}) -+ ---- none/tests/s390x/div.stderr.exp -+++ none/tests/s390x/div.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/div.stdout.exp -+++ none/tests/s390x/div.stdout.exp -@@ -0,0 +1,1080 @@ -+d 00000000000000000000000000000000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000000000) -+d 00000000000000000000000000000001 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000000001) -+d 0000000000000000000000000000FFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 000000000000FFFF) -+d 00000000000000000000000000007FFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000007FFF) -+d 00000000000000000000000000008000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000008000) -+d 000000000000000000000000FFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000002 (rem 0000000000000001) -+d 00000000000000000000000080000000 / 7FFFFFFFFFFFFFFA = 0000000000000001 (rem 0000000000000001) -+d 0000000000000000000000007FFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000001 (rem 0000000000000000) -+d 0000000000000000FFFFFFFFFFFFFFFF / 7FFFFFFFFFFFFFFA = FFFFFFFF00000002 (rem 0000000000000001) -+d 00000000000000008000000000000000 / 7FFFFFFFFFFFFFFA = 8000000000000000 (rem 0000000000000000) -+d 00000000000000007FFFFFFFFFFFFFFF / 7FFFFFFFFFFFFFFA = 7FFFFFFF00000002 (rem 0000000000000001) -+d 000000000000000100000000AFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000003 (rem 0000000030000002) -+dr 00000000000000000000000000000000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000000000) -+dr 00000000000000000000000000000001 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000000001) -+dr 0000000000000000000000000000FFFF / 7FFFFFFFFFFFFFFA = 00000000FFFFD556 (rem 0000000000000003) -+dr 00000000000000000000000000007FFF / 7FFFFFFFFFFFFFFA = 00000000FFFFEAAB (rem 0000000000000001) -+dr 00000000000000000000000000008000 / 7FFFFFFFFFFFFFFA = 00000000FFFFEAAB (rem 0000000000000002) -+dr 000000000000000000000000FFFFFFFF / 7FFFFFFFFFFFFFFA = 00000000D5555556 (rem 0000000000000003) -+dr 00000000000000000000000080000000 / 7FFFFFFFFFFFFFFA = 00000000EAAAAAAB (rem 0000000000000002) -+dr 0000000000000000000000007FFFFFFF / 7FFFFFFFFFFFFFFA = 00000000EAAAAAAB (rem 0000000000000001) -+dr 0000000000000000FFFFFFFFFFFFFFFF / 7FFFFFFFFFFFFFFA = FFFFFFFFD5555556 (rem 0000000000000003) -+dr 00000000000000008000000000000000 / 7FFFFFFFFFFFFFFA = 8000000000000000 (rem 0000000000000000) -+dr 00000000000000007FFFFFFFFFFFFFFF / 7FFFFFFFFFFFFFFA = 7FFFFFFFD5555556 (rem 0000000000000003) -+dr 000000000000000100000000AFFFFFFF / 7FFFFFFFFFFFFFFA = 00000000B8000001 (rem 0000000000000005) -+dl 00000000000000000000000000000000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000000000) -+dl 00000000000000000000000000000001 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000000001) -+dl 0000000000000000000000000000FFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 000000000000FFFF) -+dl 00000000000000000000000000007FFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000007FFF) -+dl 00000000000000000000000000008000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000008000) -+dl 000000000000000000000000FFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000002 (rem 0000000000000001) -+dl 00000000000000000000000080000000 / 7FFFFFFFFFFFFFFA = 0000000000000001 (rem 0000000000000001) -+dl 0000000000000000000000007FFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000001 (rem 0000000000000000) -+dl 0000000000000000FFFFFFFFFFFFFFFF / 7FFFFFFFFFFFFFFA = FFFFFFFF00000002 (rem 0000000000000001) -+dl 00000000000000008000000000000000 / 7FFFFFFFFFFFFFFA = 8000000000000000 (rem 0000000000000000) -+dl 00000000000000007FFFFFFFFFFFFFFF / 7FFFFFFFFFFFFFFA = 7FFFFFFF00000002 (rem 0000000000000001) -+dl 000000000000000100000000AFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000003 (rem 0000000030000002) -+dlr 00000000000000000000000000000000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000000000) -+dlr 00000000000000000000000000000001 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000000001) -+dlr 0000000000000000000000000000FFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 000000000000FFFF) -+dlr 00000000000000000000000000007FFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000007FFF) -+dlr 00000000000000000000000000008000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000008000) -+dlr 000000000000000000000000FFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000001 (rem 0000000000000005) -+dlr 00000000000000000000000080000000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000080000000) -+dlr 0000000000000000000000007FFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 000000007FFFFFFF) -+dlr 0000000000000000FFFFFFFFFFFFFFFF / 7FFFFFFFFFFFFFFA = FFFFFFFF00000001 (rem 0000000000000005) -+dlr 00000000000000008000000000000000 / 7FFFFFFFFFFFFFFA = 8000000000000000 (rem 0000000000000000) -+dlr 00000000000000007FFFFFFFFFFFFFFF / 7FFFFFFFFFFFFFFA = 7FFFFFFF00000001 (rem 0000000000000005) -+dlr 000000000000000100000000AFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000001 (rem 00000000B0000005) -+dlg 00000000000000000000000000000000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000000000) -+dlg 00000000000000000000000000000001 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000000001) -+dlg 0000000000000000000000000000FFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 000000000000FFFF) -+dlg 00000000000000000000000000007FFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000007FFF) -+dlg 00000000000000000000000000008000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000008000) -+dlg 000000000000000000000000FFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 00000000FFFFFFFF) -+dlg 00000000000000000000000080000000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000080000000) -+dlg 0000000000000000000000007FFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 000000007FFFFFFF) -+dlg 0000000000000000FFFFFFFFFFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000002 (rem 000000000000000B) -+dlg 00000000000000008000000000000000 / 7FFFFFFFFFFFFFFA = 0000000000000001 (rem 0000000000000006) -+dlg 00000000000000007FFFFFFFFFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000001 (rem 0000000000000005) -+dlg 000000000000000100000000AFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000002 (rem 00000000B000000B) -+dlgr 00000000000000000000000000000000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000000000) -+dlgr 00000000000000000000000000000001 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000000001) -+dlgr 0000000000000000000000000000FFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 000000000000FFFF) -+dlgr 00000000000000000000000000007FFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000007FFF) -+dlgr 00000000000000000000000000008000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000008000) -+dlgr 000000000000000000000000FFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 00000000FFFFFFFF) -+dlgr 00000000000000000000000080000000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000080000000) -+dlgr 0000000000000000000000007FFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 000000007FFFFFFF) -+dlgr 0000000000000000FFFFFFFFFFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000002 (rem 000000000000000B) -+dlgr 00000000000000008000000000000000 / 7FFFFFFFFFFFFFFA = 0000000000000001 (rem 0000000000000006) -+dlgr 00000000000000007FFFFFFFFFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000001 (rem 0000000000000005) -+dlgr 000000000000000100000000AFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000002 (rem 00000000B000000B) -+dsg 00000000000000000000000000000000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000000000) -+dsg 00000000000000000000000000000001 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000000001) -+dsg 0000000000000000000000000000FFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 000000000000FFFF) -+dsg 00000000000000000000000000007FFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000007FFF) -+dsg 00000000000000000000000000008000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000008000) -+dsg 000000000000000000000000FFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 00000000FFFFFFFF) -+dsg 00000000000000000000000080000000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000080000000) -+dsg 0000000000000000000000007FFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 000000007FFFFFFF) -+dsg 0000000000000000FFFFFFFFFFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem FFFFFFFFFFFFFFFF) -+dsg 00000000000000008000000000000000 / 7FFFFFFFFFFFFFFA = FFFFFFFFFFFFFFFF (rem FFFFFFFFFFFFFFFA) -+dsg 00000000000000007FFFFFFFFFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000001 (rem 0000000000000005) -+dsg 000000000000000100000000AFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 00000000AFFFFFFF) -+dsgr 00000000000000000000000000000000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000000000) -+dsgr 00000000000000000000000000000001 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000000001) -+dsgr 0000000000000000000000000000FFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 000000000000FFFF) -+dsgr 00000000000000000000000000007FFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000007FFF) -+dsgr 00000000000000000000000000008000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000008000) -+dsgr 000000000000000000000000FFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 00000000FFFFFFFF) -+dsgr 00000000000000000000000080000000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000080000000) -+dsgr 0000000000000000000000007FFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 000000007FFFFFFF) -+dsgr 0000000000000000FFFFFFFFFFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem FFFFFFFFFFFFFFFF) -+dsgr 00000000000000008000000000000000 / 7FFFFFFFFFFFFFFA = FFFFFFFFFFFFFFFF (rem FFFFFFFFFFFFFFFA) -+dsgr 00000000000000007FFFFFFFFFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000001 (rem 0000000000000005) -+dsgr 000000000000000100000000AFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 00000000AFFFFFFF) -+dsgf 00000000000000000000000000000000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000000000) -+dsgf 00000000000000000000000000000001 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000000001) -+dsgf 0000000000000000000000000000FFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 000000000000FFFF) -+dsgf 00000000000000000000000000007FFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000007FFF) -+dsgf 00000000000000000000000000008000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000008000) -+dsgf 000000000000000000000000FFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000002 (rem 0000000000000001) -+dsgf 00000000000000000000000080000000 / 7FFFFFFFFFFFFFFA = 0000000000000001 (rem 0000000000000001) -+dsgf 0000000000000000000000007FFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000001 (rem 0000000000000000) -+dsgf 0000000000000000FFFFFFFFFFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem FFFFFFFFFFFFFFFF) -+dsgf 00000000000000008000000000000000 / 7FFFFFFFFFFFFFFA = FFFFFFFEFFFFFFFE (rem FFFFFFFFFFFFFFFE) -+dsgf 00000000000000007FFFFFFFFFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000100000002 (rem 0000000000000001) -+dsgf 000000000000000100000000AFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000001 (rem 0000000030000000) -+dsgfr 00000000000000000000000000000000 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000000000) -+dsgfr 00000000000000000000000000000001 / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem 0000000000000001) -+dsgfr 0000000000000000000000000000FFFF / 7FFFFFFFFFFFFFFA = FFFFFFFFFFFFD556 (rem 0000000000000003) -+dsgfr 00000000000000000000000000007FFF / 7FFFFFFFFFFFFFFA = FFFFFFFFFFFFEAAB (rem 0000000000000001) -+dsgfr 00000000000000000000000000008000 / 7FFFFFFFFFFFFFFA = FFFFFFFFFFFFEAAB (rem 0000000000000002) -+dsgfr 000000000000000000000000FFFFFFFF / 7FFFFFFFFFFFFFFA = FFFFFFFFD5555556 (rem 0000000000000003) -+dsgfr 00000000000000000000000080000000 / 7FFFFFFFFFFFFFFA = FFFFFFFFEAAAAAAB (rem 0000000000000002) -+dsgfr 0000000000000000000000007FFFFFFF / 7FFFFFFFFFFFFFFA = FFFFFFFFEAAAAAAB (rem 0000000000000001) -+dsgfr 0000000000000000FFFFFFFFFFFFFFFF / 7FFFFFFFFFFFFFFA = 0000000000000000 (rem FFFFFFFFFFFFFFFF) -+dsgfr 00000000000000008000000000000000 / 7FFFFFFFFFFFFFFA = 1555555555555555 (rem FFFFFFFFFFFFFFFE) -+dsgfr 00000000000000007FFFFFFFFFFFFFFF / 7FFFFFFFFFFFFFFA = EAAAAAAAAAAAAAAB (rem 0000000000000001) -+dsgfr 000000000000000100000000AFFFFFFF / 7FFFFFFFFFFFFFFA = FFFFFFFFE2AAAAAB (rem 0000000000000001) -+d 00000000000000000000000000000000 / 80000000F0000000 = 0000000000000000 (rem 0000000000000000) -+d 00000000000000000000000000000001 / 80000000F0000000 = 0000000000000000 (rem 0000000000000001) -+d 0000000000000000000000000000FFFF / 80000000F0000000 = 0000000000000000 (rem 000000000000FFFF) -+d 00000000000000000000000000007FFF / 80000000F0000000 = 0000000000000000 (rem 0000000000007FFF) -+d 00000000000000000000000000008000 / 80000000F0000000 = 0000000000000000 (rem 0000000000008000) -+d 000000000000000000000000FFFFFFFF / 80000000F0000000 = 00000000FFFFFFFF (rem 000000007FFFFFFF) -+d 00000000000000000000000080000000 / 80000000F0000000 = 00000000FFFFFFFF (rem 0000000000000000) -+d 0000000000000000000000007FFFFFFF / 80000000F0000000 = 0000000000000000 (rem 000000007FFFFFFF) -+d 0000000000000000FFFFFFFFFFFFFFFF / 80000000F0000000 = FFFFFFFFFFFFFFFF (rem 000000007FFFFFFF) -+d 00000000000000008000000000000000 / 80000000F0000000 = 8000000000000000 (rem 0000000000000000) -+d 00000000000000007FFFFFFFFFFFFFFF / 80000000F0000000 = 7FFFFFFFFFFFFFFF (rem 000000007FFFFFFF) -+d 000000000000000100000000AFFFFFFF / 80000000F0000000 = 00000000FFFFFFFD (rem 000000002FFFFFFF) -+dr 00000000000000000000000000000000 / 80000000F0000000 = 0000000000000000 (rem 0000000000000000) -+dr 00000000000000000000000000000001 / 80000000F0000000 = 0000000000000000 (rem 0000000000000001) -+dr 0000000000000000000000000000FFFF / 80000000F0000000 = 0000000000000000 (rem 000000000000FFFF) -+dr 00000000000000000000000000007FFF / 80000000F0000000 = 0000000000000000 (rem 0000000000007FFF) -+dr 00000000000000000000000000008000 / 80000000F0000000 = 0000000000000000 (rem 0000000000008000) -+dr 000000000000000000000000FFFFFFFF / 80000000F0000000 = 00000000FFFFFFF1 (rem 000000000FFFFFFF) -+dr 00000000000000000000000080000000 / 80000000F0000000 = 00000000FFFFFFF8 (rem 0000000000000000) -+dr 0000000000000000000000007FFFFFFF / 80000000F0000000 = 00000000FFFFFFF9 (rem 000000000FFFFFFF) -+dr 0000000000000000FFFFFFFFFFFFFFFF / 80000000F0000000 = FFFFFFFFFFFFFFF1 (rem 000000000FFFFFFF) -+dr 00000000000000008000000000000000 / 80000000F0000000 = 8000000000000000 (rem 0000000000000000) -+dr 00000000000000007FFFFFFFFFFFFFFF / 80000000F0000000 = 7FFFFFFFFFFFFFF1 (rem 000000000FFFFFFF) -+dr 000000000000000100000000AFFFFFFF / 80000000F0000000 = 00000000FFFFFFE6 (rem 000000000FFFFFFF) -+dl 00000000000000000000000000000000 / 80000000F0000000 = 0000000000000000 (rem 0000000000000000) -+dl 00000000000000000000000000000001 / 80000000F0000000 = 0000000000000000 (rem 0000000000000001) -+dl 0000000000000000000000000000FFFF / 80000000F0000000 = 0000000000000000 (rem 000000000000FFFF) -+dl 00000000000000000000000000007FFF / 80000000F0000000 = 0000000000000000 (rem 0000000000007FFF) -+dl 00000000000000000000000000008000 / 80000000F0000000 = 0000000000000000 (rem 0000000000008000) -+dl 000000000000000000000000FFFFFFFF / 80000000F0000000 = 0000000000000001 (rem 000000007FFFFFFF) -+dl 00000000000000000000000080000000 / 80000000F0000000 = 0000000000000001 (rem 0000000000000000) -+dl 0000000000000000000000007FFFFFFF / 80000000F0000000 = 0000000000000000 (rem 000000007FFFFFFF) -+dl 0000000000000000FFFFFFFFFFFFFFFF / 80000000F0000000 = FFFFFFFF00000001 (rem 000000007FFFFFFF) -+dl 00000000000000008000000000000000 / 80000000F0000000 = 8000000000000000 (rem 0000000000000000) -+dl 00000000000000007FFFFFFFFFFFFFFF / 80000000F0000000 = 7FFFFFFF00000001 (rem 000000007FFFFFFF) -+dl 000000000000000100000000AFFFFFFF / 80000000F0000000 = 0000000000000003 (rem 000000002FFFFFFF) -+dlr 00000000000000000000000000000000 / 80000000F0000000 = 0000000000000000 (rem 0000000000000000) -+dlr 00000000000000000000000000000001 / 80000000F0000000 = 0000000000000000 (rem 0000000000000001) -+dlr 0000000000000000000000000000FFFF / 80000000F0000000 = 0000000000000000 (rem 000000000000FFFF) -+dlr 00000000000000000000000000007FFF / 80000000F0000000 = 0000000000000000 (rem 0000000000007FFF) -+dlr 00000000000000000000000000008000 / 80000000F0000000 = 0000000000000000 (rem 0000000000008000) -+dlr 000000000000000000000000FFFFFFFF / 80000000F0000000 = 0000000000000001 (rem 000000000FFFFFFF) -+dlr 00000000000000000000000080000000 / 80000000F0000000 = 0000000000000000 (rem 0000000080000000) -+dlr 0000000000000000000000007FFFFFFF / 80000000F0000000 = 0000000000000000 (rem 000000007FFFFFFF) -+dlr 0000000000000000FFFFFFFFFFFFFFFF / 80000000F0000000 = FFFFFFFF00000001 (rem 000000000FFFFFFF) -+dlr 00000000000000008000000000000000 / 80000000F0000000 = 8000000000000000 (rem 0000000000000000) -+dlr 00000000000000007FFFFFFFFFFFFFFF / 80000000F0000000 = 7FFFFFFF00000001 (rem 000000000FFFFFFF) -+dlr 000000000000000100000000AFFFFFFF / 80000000F0000000 = 0000000000000001 (rem 00000000BFFFFFFF) -+dlg 00000000000000000000000000000000 / 80000000F0000000 = 0000000000000000 (rem 0000000000000000) -+dlg 00000000000000000000000000000001 / 80000000F0000000 = 0000000000000000 (rem 0000000000000001) -+dlg 0000000000000000000000000000FFFF / 80000000F0000000 = 0000000000000000 (rem 000000000000FFFF) -+dlg 00000000000000000000000000007FFF / 80000000F0000000 = 0000000000000000 (rem 0000000000007FFF) -+dlg 00000000000000000000000000008000 / 80000000F0000000 = 0000000000000000 (rem 0000000000008000) -+dlg 000000000000000000000000FFFFFFFF / 80000000F0000000 = 0000000000000000 (rem 00000000FFFFFFFF) -+dlg 00000000000000000000000080000000 / 80000000F0000000 = 0000000000000000 (rem 0000000080000000) -+dlg 0000000000000000000000007FFFFFFF / 80000000F0000000 = 0000000000000000 (rem 000000007FFFFFFF) -+dlg 0000000000000000FFFFFFFFFFFFFFFF / 80000000F0000000 = 0000000000000001 (rem 7FFFFFFF0FFFFFFF) -+dlg 00000000000000008000000000000000 / 80000000F0000000 = 0000000000000000 (rem 8000000000000000) -+dlg 00000000000000007FFFFFFFFFFFFFFF / 80000000F0000000 = 0000000000000000 (rem 7FFFFFFFFFFFFFFF) -+dlg 000000000000000100000000AFFFFFFF / 80000000F0000000 = 0000000000000001 (rem 7FFFFFFFBFFFFFFF) -+dlgr 00000000000000000000000000000000 / 80000000F0000000 = 0000000000000000 (rem 0000000000000000) -+dlgr 00000000000000000000000000000001 / 80000000F0000000 = 0000000000000000 (rem 0000000000000001) -+dlgr 0000000000000000000000000000FFFF / 80000000F0000000 = 0000000000000000 (rem 000000000000FFFF) -+dlgr 00000000000000000000000000007FFF / 80000000F0000000 = 0000000000000000 (rem 0000000000007FFF) -+dlgr 00000000000000000000000000008000 / 80000000F0000000 = 0000000000000000 (rem 0000000000008000) -+dlgr 000000000000000000000000FFFFFFFF / 80000000F0000000 = 0000000000000000 (rem 00000000FFFFFFFF) -+dlgr 00000000000000000000000080000000 / 80000000F0000000 = 0000000000000000 (rem 0000000080000000) -+dlgr 0000000000000000000000007FFFFFFF / 80000000F0000000 = 0000000000000000 (rem 000000007FFFFFFF) -+dlgr 0000000000000000FFFFFFFFFFFFFFFF / 80000000F0000000 = 0000000000000001 (rem 7FFFFFFF0FFFFFFF) -+dlgr 00000000000000008000000000000000 / 80000000F0000000 = 0000000000000000 (rem 8000000000000000) -+dlgr 00000000000000007FFFFFFFFFFFFFFF / 80000000F0000000 = 0000000000000000 (rem 7FFFFFFFFFFFFFFF) -+dlgr 000000000000000100000000AFFFFFFF / 80000000F0000000 = 0000000000000001 (rem 7FFFFFFFBFFFFFFF) -+dsg 00000000000000000000000000000000 / 80000000F0000000 = 0000000000000000 (rem 0000000000000000) -+dsg 00000000000000000000000000000001 / 80000000F0000000 = 0000000000000000 (rem 0000000000000001) -+dsg 0000000000000000000000000000FFFF / 80000000F0000000 = 0000000000000000 (rem 000000000000FFFF) -+dsg 00000000000000000000000000007FFF / 80000000F0000000 = 0000000000000000 (rem 0000000000007FFF) -+dsg 00000000000000000000000000008000 / 80000000F0000000 = 0000000000000000 (rem 0000000000008000) -+dsg 000000000000000000000000FFFFFFFF / 80000000F0000000 = 0000000000000000 (rem 00000000FFFFFFFF) -+dsg 00000000000000000000000080000000 / 80000000F0000000 = 0000000000000000 (rem 0000000080000000) -+dsg 0000000000000000000000007FFFFFFF / 80000000F0000000 = 0000000000000000 (rem 000000007FFFFFFF) -+dsg 0000000000000000FFFFFFFFFFFFFFFF / 80000000F0000000 = 0000000000000000 (rem FFFFFFFFFFFFFFFF) -+dsg 00000000000000008000000000000000 / 80000000F0000000 = 0000000000000001 (rem FFFFFFFF10000000) -+dsg 00000000000000007FFFFFFFFFFFFFFF / 80000000F0000000 = FFFFFFFFFFFFFFFF (rem 00000000EFFFFFFF) -+dsg 000000000000000100000000AFFFFFFF / 80000000F0000000 = 0000000000000000 (rem 00000000AFFFFFFF) -+dsgr 00000000000000000000000000000000 / 80000000F0000000 = 0000000000000000 (rem 0000000000000000) -+dsgr 00000000000000000000000000000001 / 80000000F0000000 = 0000000000000000 (rem 0000000000000001) -+dsgr 0000000000000000000000000000FFFF / 80000000F0000000 = 0000000000000000 (rem 000000000000FFFF) -+dsgr 00000000000000000000000000007FFF / 80000000F0000000 = 0000000000000000 (rem 0000000000007FFF) -+dsgr 00000000000000000000000000008000 / 80000000F0000000 = 0000000000000000 (rem 0000000000008000) -+dsgr 000000000000000000000000FFFFFFFF / 80000000F0000000 = 0000000000000000 (rem 00000000FFFFFFFF) -+dsgr 00000000000000000000000080000000 / 80000000F0000000 = 0000000000000000 (rem 0000000080000000) -+dsgr 0000000000000000000000007FFFFFFF / 80000000F0000000 = 0000000000000000 (rem 000000007FFFFFFF) -+dsgr 0000000000000000FFFFFFFFFFFFFFFF / 80000000F0000000 = 0000000000000000 (rem FFFFFFFFFFFFFFFF) -+dsgr 00000000000000008000000000000000 / 80000000F0000000 = 0000000000000001 (rem FFFFFFFF10000000) -+dsgr 00000000000000007FFFFFFFFFFFFFFF / 80000000F0000000 = FFFFFFFFFFFFFFFF (rem 00000000EFFFFFFF) -+dsgr 000000000000000100000000AFFFFFFF / 80000000F0000000 = 0000000000000000 (rem 00000000AFFFFFFF) -+dsgf 00000000000000000000000000000000 / 80000000F0000000 = 0000000000000000 (rem 0000000000000000) -+dsgf 00000000000000000000000000000001 / 80000000F0000000 = 0000000000000000 (rem 0000000000000001) -+dsgf 0000000000000000000000000000FFFF / 80000000F0000000 = 0000000000000000 (rem 000000000000FFFF) -+dsgf 00000000000000000000000000007FFF / 80000000F0000000 = 0000000000000000 (rem 0000000000007FFF) -+dsgf 00000000000000000000000000008000 / 80000000F0000000 = 0000000000000000 (rem 0000000000008000) -+dsgf 000000000000000000000000FFFFFFFF / 80000000F0000000 = FFFFFFFFFFFFFFFF (rem 000000007FFFFFFF) -+dsgf 00000000000000000000000080000000 / 80000000F0000000 = FFFFFFFFFFFFFFFF (rem 0000000000000000) -+dsgf 0000000000000000000000007FFFFFFF / 80000000F0000000 = 0000000000000000 (rem 000000007FFFFFFF) -+dsgf 0000000000000000FFFFFFFFFFFFFFFF / 80000000F0000000 = 0000000000000000 (rem FFFFFFFFFFFFFFFF) -+dsgf 00000000000000008000000000000000 / 80000000F0000000 = 0000000100000000 (rem 0000000000000000) -+dsgf 00000000000000007FFFFFFFFFFFFFFF / 80000000F0000000 = FFFFFFFF00000001 (rem 000000007FFFFFFF) -+dsgf 000000000000000100000000AFFFFFFF / 80000000F0000000 = FFFFFFFFFFFFFFFF (rem 000000002FFFFFFF) -+dsgfr 00000000000000000000000000000000 / 80000000F0000000 = 0000000000000000 (rem 0000000000000000) -+dsgfr 00000000000000000000000000000001 / 80000000F0000000 = 0000000000000000 (rem 0000000000000001) -+dsgfr 0000000000000000000000000000FFFF / 80000000F0000000 = 0000000000000000 (rem 000000000000FFFF) -+dsgfr 00000000000000000000000000007FFF / 80000000F0000000 = 0000000000000000 (rem 0000000000007FFF) -+dsgfr 00000000000000000000000000008000 / 80000000F0000000 = 0000000000000000 (rem 0000000000008000) -+dsgfr 000000000000000000000000FFFFFFFF / 80000000F0000000 = FFFFFFFFFFFFFFF1 (rem 000000000FFFFFFF) -+dsgfr 00000000000000000000000080000000 / 80000000F0000000 = FFFFFFFFFFFFFFF8 (rem 0000000000000000) -+dsgfr 0000000000000000000000007FFFFFFF / 80000000F0000000 = FFFFFFFFFFFFFFF9 (rem 000000000FFFFFFF) -+dsgfr 0000000000000000FFFFFFFFFFFFFFFF / 80000000F0000000 = 0000000000000000 (rem FFFFFFFFFFFFFFFF) -+dsgfr 00000000000000008000000000000000 / 80000000F0000000 = 0000000800000000 (rem 0000000000000000) -+dsgfr 00000000000000007FFFFFFFFFFFFFFF / 80000000F0000000 = FFFFFFF800000001 (rem 000000000FFFFFFF) -+dsgfr 000000000000000100000000AFFFFFFF / 80000000F0000000 = FFFFFFFFFFFFFFF6 (rem 000000000FFFFFFF) -+d 00000000000000000000000000000000 / FFFFFFFAFFFFFFFA = 0000000000000000 (rem 0000000000000000) -+d 00000000000000000000000000000001 / FFFFFFFAFFFFFFFA = 0000000000000000 (rem 0000000000000001) -+d 0000000000000000000000000000FFFF / FFFFFFFAFFFFFFFA = 00000000FFFFD556 (rem 0000000000000003) -+d 00000000000000000000000000007FFF / FFFFFFFAFFFFFFFA = 00000000FFFFEAAB (rem 0000000000000001) -+d 00000000000000000000000000008000 / FFFFFFFAFFFFFFFA = 00000000FFFFEAAB (rem 0000000000000002) -+d 000000000000000000000000FFFFFFFF / FFFFFFFAFFFFFFFA = 00000000D5555556 (rem 0000000000000003) -+d 00000000000000000000000080000000 / FFFFFFFAFFFFFFFA = 00000000EAAAAAAB (rem 0000000000000002) -+d 0000000000000000000000007FFFFFFF / FFFFFFFAFFFFFFFA = 00000000EAAAAAAB (rem 0000000000000001) -+d 0000000000000000FFFFFFFFFFFFFFFF / FFFFFFFAFFFFFFFA = FFFFFFFFD5555556 (rem 0000000000000003) -+d 00000000000000008000000000000000 / FFFFFFFAFFFFFFFA = 8000000000000000 (rem 0000000000000000) -+d 00000000000000007FFFFFFFFFFFFFFF / FFFFFFFAFFFFFFFA = 7FFFFFFFD5555556 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0000000000000000) -+dlgr 00000000000000000000000000000001 / FFFFFFFAFFFFFFFA = 0000000000000000 (rem 0000000000000001) -+dlgr 0000000000000000000000000000FFFF / FFFFFFFAFFFFFFFA = 0000000000000000 (rem 000000000000FFFF) -+dlgr 00000000000000000000000000007FFF / FFFFFFFAFFFFFFFA = 0000000000000000 (rem 0000000000007FFF) -+dlgr 00000000000000000000000000008000 / FFFFFFFAFFFFFFFA = 0000000000000000 (rem 0000000000008000) -+dlgr 000000000000000000000000FFFFFFFF / FFFFFFFAFFFFFFFA = 0000000000000000 (rem 00000000FFFFFFFF) -+dlgr 00000000000000000000000080000000 / FFFFFFFAFFFFFFFA = 0000000000000000 (rem 0000000080000000) -+dlgr 0000000000000000000000007FFFFFFF / FFFFFFFAFFFFFFFA = 0000000000000000 (rem 000000007FFFFFFF) -+dlgr 0000000000000000FFFFFFFFFFFFFFFF / FFFFFFFAFFFFFFFA = 0000000000000001 (rem 0000000500000005) -+dlgr 00000000000000008000000000000000 / FFFFFFFAFFFFFFFA = 0000000000000000 (rem 8000000000000000) -+dlgr 00000000000000007FFFFFFFFFFFFFFF / FFFFFFFAFFFFFFFA = 0000000000000000 (rem 7FFFFFFFFFFFFFFF) -+dlgr 000000000000000100000000AFFFFFFF / FFFFFFFAFFFFFFFA = 0000000000000001 (rem 00000005B0000005) -+dsg 00000000000000000000000000000000 / FFFFFFFAFFFFFFFA = 0000000000000000 (rem 0000000000000000) -+dsg 00000000000000000000000000000001 / FFFFFFFAFFFFFFFA = 0000000000000000 (rem 0000000000000001) -+dsg 0000000000000000000000000000FFFF / FFFFFFFAFFFFFFFA = 0000000000000000 (rem 000000000000FFFF) -+dsg 00000000000000000000000000007FFF / FFFFFFFAFFFFFFFA = 0000000000000000 (rem 0000000000007FFF) -+dsg 00000000000000000000000000008000 / FFFFFFFAFFFFFFFA = 0000000000000000 (rem 0000000000008000) -+dsg 000000000000000000000000FFFFFFFF / FFFFFFFAFFFFFFFA = 0000000000000000 (rem 00000000FFFFFFFF) -+dsg 00000000000000000000000080000000 / FFFFFFFAFFFFFFFA = 0000000000000000 (rem 0000000080000000) -+dsg 0000000000000000000000007FFFFFFF / FFFFFFFAFFFFFFFA = 0000000000000000 (rem 000000007FFFFFFF) -+dsg 0000000000000000FFFFFFFFFFFFFFFF / FFFFFFFAFFFFFFFA = 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7FFFFFFFF0000000 = 0000000000000000 (rem 00000000FFFFFFFF) -+dsgr 00000000000000000000000080000000 / 7FFFFFFFF0000000 = 0000000000000000 (rem 0000000080000000) -+dsgr 0000000000000000000000007FFFFFFF / 7FFFFFFFF0000000 = 0000000000000000 (rem 000000007FFFFFFF) -+dsgr 0000000000000000FFFFFFFFFFFFFFFF / 7FFFFFFFF0000000 = 0000000000000000 (rem FFFFFFFFFFFFFFFF) -+dsgr 00000000000000008000000000000000 / 7FFFFFFFF0000000 = FFFFFFFFFFFFFFFF (rem FFFFFFFFF0000000) -+dsgr 00000000000000007FFFFFFFFFFFFFFF / 7FFFFFFFF0000000 = 0000000000000001 (rem 000000000FFFFFFF) -+dsgr 000000000000000100000000AFFFFFFF / 7FFFFFFFF0000000 = 0000000000000000 (rem 00000000AFFFFFFF) -+dsgf 00000000000000000000000000000000 / 7FFFFFFFF0000000 = 0000000000000000 (rem 0000000000000000) -+dsgf 00000000000000000000000000000001 / 7FFFFFFFF0000000 = 0000000000000000 (rem 0000000000000001) -+dsgf 0000000000000000000000000000FFFF / 7FFFFFFFF0000000 = 0000000000000000 (rem 000000000000FFFF) -+dsgf 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0000000000000000) -+dsgfr 00000000000000000000000000000001 / 7FFFFFFFF0000000 = 0000000000000000 (rem 0000000000000001) -+dsgfr 0000000000000000000000000000FFFF / 7FFFFFFFF0000000 = 0000000000000000 (rem 000000000000FFFF) -+dsgfr 00000000000000000000000000007FFF / 7FFFFFFFF0000000 = 0000000000000000 (rem 0000000000007FFF) -+dsgfr 00000000000000000000000000008000 / 7FFFFFFFF0000000 = 0000000000000000 (rem 0000000000008000) -+dsgfr 000000000000000000000000FFFFFFFF / 7FFFFFFFF0000000 = FFFFFFFFFFFFFFF1 (rem 000000000FFFFFFF) -+dsgfr 00000000000000000000000080000000 / 7FFFFFFFF0000000 = FFFFFFFFFFFFFFF8 (rem 0000000000000000) -+dsgfr 0000000000000000000000007FFFFFFF / 7FFFFFFFF0000000 = FFFFFFFFFFFFFFF9 (rem 000000000FFFFFFF) -+dsgfr 0000000000000000FFFFFFFFFFFFFFFF / 7FFFFFFFF0000000 = 0000000000000000 (rem FFFFFFFFFFFFFFFF) -+dsgfr 00000000000000008000000000000000 / 7FFFFFFFF0000000 = 0000000800000000 (rem 0000000000000000) -+dsgfr 00000000000000007FFFFFFFFFFFFFFF / 7FFFFFFFF0000000 = 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0000000000000000000000007FFFFFFF / 000000087FFFFFFF = 0000000000000001 (rem 0000000000000000) -+dsgfr 0000000000000000FFFFFFFFFFFFFFFF / 000000087FFFFFFF = 0000000000000000 (rem FFFFFFFFFFFFFFFF) -+dsgfr 00000000000000008000000000000000 / 000000087FFFFFFF = FFFFFFFEFFFFFFFE (rem FFFFFFFFFFFFFFFE) -+dsgfr 00000000000000007FFFFFFFFFFFFFFF / 000000087FFFFFFF = 0000000100000002 (rem 0000000000000001) -+dsgfr 000000000000000100000000AFFFFFFF / 000000087FFFFFFF = 0000000000000001 (rem 0000000030000000) -+d 00000000000000000000000000000000 / 0000000480000000 = 0000000000000000 (rem 0000000000000000) -+d 00000000000000000000000000000001 / 0000000480000000 = 0000000000000000 (rem 0000000000000001) -+d 0000000000000000000000000000FFFF / 0000000480000000 = 0000000000003FFF (rem 0000000000000003) -+d 00000000000000000000000000007FFF / 0000000480000000 = 0000000000001FFF (rem 0000000000000003) -+d 00000000000000000000000000008000 / 0000000480000000 = 0000000000002000 (rem 0000000000000000) -+d 000000000000000000000000FFFFFFFF / 0000000480000000 = 000000003FFFFFFF (rem 0000000000000003) -+d 00000000000000000000000080000000 / 0000000480000000 = 0000000020000000 (rem 0000000000000000) -+d 0000000000000000000000007FFFFFFF / 0000000480000000 = 000000001FFFFFFF (rem 0000000000000003) -+d 0000000000000000FFFFFFFFFFFFFFFF / 0000000480000000 = FFFFFFFF3FFFFFFF (rem 0000000000000003) -+d 00000000000000008000000000000000 / 0000000480000000 = 8000000000000000 (rem 0000000000000000) -+d 00000000000000007FFFFFFFFFFFFFFF / 0000000480000000 = 7FFFFFFF3FFFFFFF (rem 0000000000000003) -+d 000000000000000100000000AFFFFFFF / 0000000480000000 = 000000006BFFFFFF (rem 0000000000000003) -+dr 00000000000000000000000000000000 / 0000000480000000 = 0000000000000000 (rem 0000000000000000) -+dr 00000000000000000000000000000001 / 0000000480000000 = 0000000000000000 (rem 0000000000000001) -+dr 0000000000000000000000000000FFFF / 0000000480000000 = 0000000000000000 (rem 000000000000FFFF) -+dr 00000000000000000000000000007FFF / 0000000480000000 = 0000000000000000 (rem 0000000000007FFF) -+dr 00000000000000000000000000008000 / 0000000480000000 = 0000000000000000 (rem 0000000000008000) -+dr 000000000000000000000000FFFFFFFF / 0000000480000000 = 00000000FFFFFFFF (rem 000000007FFFFFFF) -+dr 00000000000000000000000080000000 / 0000000480000000 = 00000000FFFFFFFF (rem 0000000000000000) -+dr 0000000000000000000000007FFFFFFF / 0000000480000000 = 0000000000000000 (rem 000000007FFFFFFF) -+dr 0000000000000000FFFFFFFFFFFFFFFF / 0000000480000000 = FFFFFFFFFFFFFFFF (rem 000000007FFFFFFF) -+dr 00000000000000008000000000000000 / 0000000480000000 = 8000000000000000 (rem 0000000000000000) -+dr 00000000000000007FFFFFFFFFFFFFFF / 0000000480000000 = 7FFFFFFFFFFFFFFF (rem 000000007FFFFFFF) -+dr 000000000000000100000000AFFFFFFF / 0000000480000000 = 00000000FFFFFFFD (rem 000000002FFFFFFF) -+dl 00000000000000000000000000000000 / 0000000480000000 = 0000000000000000 (rem 0000000000000000) -+dl 00000000000000000000000000000001 / 0000000480000000 = 0000000000000000 (rem 0000000000000001) -+dl 0000000000000000000000000000FFFF / 0000000480000000 = 0000000000003FFF (rem 0000000000000003) -+dl 00000000000000000000000000007FFF / 0000000480000000 = 0000000000001FFF (rem 0000000000000003) -+dl 00000000000000000000000000008000 / 0000000480000000 = 0000000000002000 (rem 0000000000000000) -+dl 000000000000000000000000FFFFFFFF / 0000000480000000 = 000000003FFFFFFF (rem 0000000000000003) -+dl 00000000000000000000000080000000 / 0000000480000000 = 0000000020000000 (rem 0000000000000000) -+dl 0000000000000000000000007FFFFFFF / 0000000480000000 = 000000001FFFFFFF (rem 0000000000000003) -+dl 0000000000000000FFFFFFFFFFFFFFFF / 0000000480000000 = FFFFFFFF3FFFFFFF (rem 0000000000000003) -+dl 00000000000000008000000000000000 / 0000000480000000 = 8000000000000000 (rem 0000000000000000) -+dl 00000000000000007FFFFFFFFFFFFFFF / 0000000480000000 = 7FFFFFFF3FFFFFFF (rem 0000000000000003) -+dl 000000000000000100000000AFFFFFFF / 0000000480000000 = 000000006BFFFFFF (rem 0000000000000003) -+dlr 00000000000000000000000000000000 / 0000000480000000 = 0000000000000000 (rem 0000000000000000) -+dlr 00000000000000000000000000000001 / 0000000480000000 = 0000000000000000 (rem 0000000000000001) -+dlr 0000000000000000000000000000FFFF / 0000000480000000 = 0000000000000000 (rem 000000000000FFFF) -+dlr 00000000000000000000000000007FFF / 0000000480000000 = 0000000000000000 (rem 0000000000007FFF) -+dlr 00000000000000000000000000008000 / 0000000480000000 = 0000000000000000 (rem 0000000000008000) -+dlr 000000000000000000000000FFFFFFFF / 0000000480000000 = 0000000000000001 (rem 000000007FFFFFFF) -+dlr 00000000000000000000000080000000 / 0000000480000000 = 0000000000000001 (rem 0000000000000000) -+dlr 0000000000000000000000007FFFFFFF / 0000000480000000 = 0000000000000000 (rem 000000007FFFFFFF) -+dlr 0000000000000000FFFFFFFFFFFFFFFF / 0000000480000000 = FFFFFFFF00000001 (rem 000000007FFFFFFF) -+dlr 00000000000000008000000000000000 / 0000000480000000 = 8000000000000000 (rem 0000000000000000) -+dlr 00000000000000007FFFFFFFFFFFFFFF / 0000000480000000 = 7FFFFFFF00000001 (rem 000000007FFFFFFF) -+dlr 000000000000000100000000AFFFFFFF / 0000000480000000 = 0000000000000003 (rem 000000002FFFFFFF) -+dlg 00000000000000000000000000000000 / 0000000480000000 = 0000000000000000 (rem 0000000000000000) -+dlg 00000000000000000000000000000001 / 0000000480000000 = 0000000000000000 (rem 0000000000000001) -+dlg 0000000000000000000000000000FFFF / 0000000480000000 = 0000000000000000 (rem 000000000000FFFF) -+dlg 00000000000000000000000000007FFF / 0000000480000000 = 0000000000000000 (rem 0000000000007FFF) -+dlg 00000000000000000000000000008000 / 0000000480000000 = 0000000000000000 (rem 0000000000008000) -+dlg 000000000000000000000000FFFFFFFF / 0000000480000000 = 0000000000000000 (rem 00000000FFFFFFFF) -+dlg 00000000000000000000000080000000 / 0000000480000000 = 0000000000000000 (rem 0000000080000000) -+dlg 0000000000000000000000007FFFFFFF / 0000000480000000 = 0000000000000000 (rem 000000007FFFFFFF) -+dlg 0000000000000000FFFFFFFFFFFFFFFF / 0000000480000000 = 0000000038E38E38 (rem 00000003FFFFFFFF) -+dlg 00000000000000008000000000000000 / 0000000480000000 = 000000001C71C71C (rem 0000000200000000) -+dlg 00000000000000007FFFFFFFFFFFFFFF / 0000000480000000 = 000000001C71C71C (rem 00000001FFFFFFFF) -+dlg 000000000000000100000000AFFFFFFF / 0000000480000000 = 0000000038E38E39 (rem 000000002FFFFFFF) -+dlgr 00000000000000000000000000000000 / 0000000480000000 = 0000000000000000 (rem 0000000000000000) -+dlgr 00000000000000000000000000000001 / 0000000480000000 = 0000000000000000 (rem 0000000000000001) -+dlgr 0000000000000000000000000000FFFF / 0000000480000000 = 0000000000000000 (rem 000000000000FFFF) -+dlgr 00000000000000000000000000007FFF / 0000000480000000 = 0000000000000000 (rem 0000000000007FFF) -+dlgr 00000000000000000000000000008000 / 0000000480000000 = 0000000000000000 (rem 0000000000008000) -+dlgr 000000000000000000000000FFFFFFFF / 0000000480000000 = 0000000000000000 (rem 00000000FFFFFFFF) -+dlgr 00000000000000000000000080000000 / 0000000480000000 = 0000000000000000 (rem 0000000080000000) -+dlgr 0000000000000000000000007FFFFFFF / 0000000480000000 = 0000000000000000 (rem 000000007FFFFFFF) -+dlgr 0000000000000000FFFFFFFFFFFFFFFF / 0000000480000000 = 0000000038E38E38 (rem 00000003FFFFFFFF) -+dlgr 00000000000000008000000000000000 / 0000000480000000 = 000000001C71C71C (rem 0000000200000000) -+dlgr 00000000000000007FFFFFFFFFFFFFFF / 0000000480000000 = 000000001C71C71C (rem 00000001FFFFFFFF) -+dlgr 000000000000000100000000AFFFFFFF / 0000000480000000 = 0000000038E38E39 (rem 000000002FFFFFFF) -+dsg 00000000000000000000000000000000 / 0000000480000000 = 0000000000000000 (rem 0000000000000000) -+dsg 00000000000000000000000000000001 / 0000000480000000 = 0000000000000000 (rem 0000000000000001) -+dsg 0000000000000000000000000000FFFF / 0000000480000000 = 0000000000000000 (rem 000000000000FFFF) -+dsg 00000000000000000000000000007FFF / 0000000480000000 = 0000000000000000 (rem 0000000000007FFF) -+dsg 00000000000000000000000000008000 / 0000000480000000 = 0000000000000000 (rem 0000000000008000) -+dsg 000000000000000000000000FFFFFFFF / 0000000480000000 = 0000000000000000 (rem 00000000FFFFFFFF) -+dsg 00000000000000000000000080000000 / 0000000480000000 = 0000000000000000 (rem 0000000080000000) -+dsg 0000000000000000000000007FFFFFFF / 0000000480000000 = 0000000000000000 (rem 000000007FFFFFFF) -+dsg 0000000000000000FFFFFFFFFFFFFFFF / 0000000480000000 = 0000000000000000 (rem FFFFFFFFFFFFFFFF) -+dsg 00000000000000008000000000000000 / 0000000480000000 = FFFFFFFFE38E38E4 (rem FFFFFFFE00000000) -+dsg 00000000000000007FFFFFFFFFFFFFFF / 0000000480000000 = 000000001C71C71C (rem 00000001FFFFFFFF) -+dsg 000000000000000100000000AFFFFFFF / 0000000480000000 = 0000000000000000 (rem 00000000AFFFFFFF) -+dsgr 00000000000000000000000000000000 / 0000000480000000 = 0000000000000000 (rem 0000000000000000) -+dsgr 00000000000000000000000000000001 / 0000000480000000 = 0000000000000000 (rem 0000000000000001) -+dsgr 0000000000000000000000000000FFFF / 0000000480000000 = 0000000000000000 (rem 000000000000FFFF) -+dsgr 00000000000000000000000000007FFF / 0000000480000000 = 0000000000000000 (rem 0000000000007FFF) -+dsgr 00000000000000000000000000008000 / 0000000480000000 = 0000000000000000 (rem 0000000000008000) -+dsgr 000000000000000000000000FFFFFFFF / 0000000480000000 = 0000000000000000 (rem 00000000FFFFFFFF) -+dsgr 00000000000000000000000080000000 / 0000000480000000 = 0000000000000000 (rem 0000000080000000) -+dsgr 0000000000000000000000007FFFFFFF / 0000000480000000 = 0000000000000000 (rem 000000007FFFFFFF) -+dsgr 0000000000000000FFFFFFFFFFFFFFFF / 0000000480000000 = 0000000000000000 (rem FFFFFFFFFFFFFFFF) -+dsgr 00000000000000008000000000000000 / 0000000480000000 = FFFFFFFFE38E38E4 (rem FFFFFFFE00000000) -+dsgr 00000000000000007FFFFFFFFFFFFFFF / 0000000480000000 = 000000001C71C71C (rem 00000001FFFFFFFF) -+dsgr 000000000000000100000000AFFFFFFF / 0000000480000000 = 0000000000000000 (rem 00000000AFFFFFFF) -+dsgf 00000000000000000000000000000000 / 0000000480000000 = 0000000000000000 (rem 0000000000000000) -+dsgf 00000000000000000000000000000001 / 0000000480000000 = 0000000000000000 (rem 0000000000000001) -+dsgf 0000000000000000000000000000FFFF / 0000000480000000 = 0000000000003FFF (rem 0000000000000003) -+dsgf 00000000000000000000000000007FFF / 0000000480000000 = 0000000000001FFF (rem 0000000000000003) -+dsgf 00000000000000000000000000008000 / 0000000480000000 = 0000000000002000 (rem 0000000000000000) -+dsgf 000000000000000000000000FFFFFFFF / 0000000480000000 = 000000003FFFFFFF (rem 0000000000000003) -+dsgf 00000000000000000000000080000000 / 0000000480000000 = 0000000020000000 (rem 0000000000000000) -+dsgf 0000000000000000000000007FFFFFFF / 0000000480000000 = 000000001FFFFFFF (rem 0000000000000003) -+dsgf 0000000000000000FFFFFFFFFFFFFFFF / 0000000480000000 = 0000000000000000 (rem FFFFFFFFFFFFFFFF) -+dsgf 00000000000000008000000000000000 / 0000000480000000 = E000000000000000 (rem 0000000000000000) -+dsgf 00000000000000007FFFFFFFFFFFFFFF / 0000000480000000 = 1FFFFFFFFFFFFFFF (rem 0000000000000003) -+dsgf 000000000000000100000000AFFFFFFF / 0000000480000000 = 000000002BFFFFFF (rem 0000000000000003) -+dsgfr 00000000000000000000000000000000 / 0000000480000000 = 0000000000000000 (rem 0000000000000000) -+dsgfr 00000000000000000000000000000001 / 0000000480000000 = 0000000000000000 (rem 0000000000000001) -+dsgfr 0000000000000000000000000000FFFF / 0000000480000000 = 0000000000000000 (rem 000000000000FFFF) -+dsgfr 00000000000000000000000000007FFF / 0000000480000000 = 0000000000000000 (rem 0000000000007FFF) -+dsgfr 00000000000000000000000000008000 / 0000000480000000 = 0000000000000000 (rem 0000000000008000) -+dsgfr 000000000000000000000000FFFFFFFF / 0000000480000000 = FFFFFFFFFFFFFFFF (rem 000000007FFFFFFF) -+dsgfr 00000000000000000000000080000000 / 0000000480000000 = FFFFFFFFFFFFFFFF (rem 0000000000000000) -+dsgfr 0000000000000000000000007FFFFFFF / 0000000480000000 = 0000000000000000 (rem 000000007FFFFFFF) -+dsgfr 0000000000000000FFFFFFFFFFFFFFFF / 0000000480000000 = 0000000000000000 (rem FFFFFFFFFFFFFFFF) -+dsgfr 00000000000000008000000000000000 / 0000000480000000 = 0000000100000000 (rem 0000000000000000) -+dsgfr 00000000000000007FFFFFFFFFFFFFFF / 0000000480000000 = FFFFFFFF00000001 (rem 000000007FFFFFFF) -+dsgfr 000000000000000100000000AFFFFFFF / 0000000480000000 = FFFFFFFFFFFFFFFF (rem 000000002FFFFFFF) -+d 00000000000000000000000000000000 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000000000) -+d 00000000000000000000000000000001 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000000001) -+d 0000000000000000000000000000FFFF / 00000008FFFFFFFA = 0000000000001FFF (rem 0000000000000007) -+d 00000000000000000000000000007FFF / 00000008FFFFFFFA = 0000000000000FFF (rem 0000000000000007) -+d 00000000000000000000000000008000 / 00000008FFFFFFFA = 0000000000001000 (rem 0000000000000000) -+d 000000000000000000000000FFFFFFFF / 00000008FFFFFFFA = 000000001FFFFFFF (rem 0000000000000007) -+d 00000000000000000000000080000000 / 00000008FFFFFFFA = 0000000010000000 (rem 0000000000000000) -+d 0000000000000000000000007FFFFFFF / 00000008FFFFFFFA = 000000000FFFFFFF (rem 0000000000000007) -+d 0000000000000000FFFFFFFFFFFFFFFF / 00000008FFFFFFFA = FFFFFFFF1FFFFFFF (rem 0000000000000007) -+d 00000000000000008000000000000000 / 00000008FFFFFFFA = 8000000000000000 (rem 0000000000000000) -+d 00000000000000007FFFFFFFFFFFFFFF / 00000008FFFFFFFA = 7FFFFFFF1FFFFFFF (rem 0000000000000007) -+d 000000000000000100000000AFFFFFFF / 00000008FFFFFFFA = 0000000035FFFFFF (rem 0000000000000007) -+dr 00000000000000000000000000000000 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000000000) -+dr 00000000000000000000000000000001 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000000001) -+dr 0000000000000000000000000000FFFF / 00000008FFFFFFFA = 00000000FFFFD556 (rem 0000000000000003) -+dr 00000000000000000000000000007FFF / 00000008FFFFFFFA = 00000000FFFFEAAB (rem 0000000000000001) -+dr 00000000000000000000000000008000 / 00000008FFFFFFFA = 00000000FFFFEAAB (rem 0000000000000002) -+dr 000000000000000000000000FFFFFFFF / 00000008FFFFFFFA = 00000000D5555556 (rem 0000000000000003) -+dr 00000000000000000000000080000000 / 00000008FFFFFFFA = 00000000EAAAAAAB (rem 0000000000000002) -+dr 0000000000000000000000007FFFFFFF / 00000008FFFFFFFA = 00000000EAAAAAAB (rem 0000000000000001) -+dr 0000000000000000FFFFFFFFFFFFFFFF / 00000008FFFFFFFA = FFFFFFFFD5555556 (rem 0000000000000003) -+dr 00000000000000008000000000000000 / 00000008FFFFFFFA = 8000000000000000 (rem 0000000000000000) -+dr 00000000000000007FFFFFFFFFFFFFFF / 00000008FFFFFFFA = 7FFFFFFFD5555556 (rem 0000000000000003) -+dr 000000000000000100000000AFFFFFFF / 00000008FFFFFFFA = 00000000B8000001 (rem 0000000000000005) -+dl 00000000000000000000000000000000 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000000000) -+dl 00000000000000000000000000000001 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000000001) -+dl 0000000000000000000000000000FFFF / 00000008FFFFFFFA = 0000000000001FFF (rem 0000000000000007) -+dl 00000000000000000000000000007FFF / 00000008FFFFFFFA = 0000000000000FFF (rem 0000000000000007) -+dl 00000000000000000000000000008000 / 00000008FFFFFFFA = 0000000000001000 (rem 0000000000000000) -+dl 000000000000000000000000FFFFFFFF / 00000008FFFFFFFA = 000000001FFFFFFF (rem 0000000000000007) -+dl 00000000000000000000000080000000 / 00000008FFFFFFFA = 0000000010000000 (rem 0000000000000000) -+dl 0000000000000000000000007FFFFFFF / 00000008FFFFFFFA = 000000000FFFFFFF (rem 0000000000000007) -+dl 0000000000000000FFFFFFFFFFFFFFFF / 00000008FFFFFFFA = FFFFFFFF1FFFFFFF (rem 0000000000000007) -+dl 00000000000000008000000000000000 / 00000008FFFFFFFA = 8000000000000000 (rem 0000000000000000) -+dl 00000000000000007FFFFFFFFFFFFFFF / 00000008FFFFFFFA = 7FFFFFFF1FFFFFFF (rem 0000000000000007) -+dl 000000000000000100000000AFFFFFFF / 00000008FFFFFFFA = 0000000035FFFFFF (rem 0000000000000007) -+dlr 00000000000000000000000000000000 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000000000) -+dlr 00000000000000000000000000000001 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000000001) -+dlr 0000000000000000000000000000FFFF / 00000008FFFFFFFA = 0000000000000000 (rem 000000000000FFFF) -+dlr 00000000000000000000000000007FFF / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000007FFF) -+dlr 00000000000000000000000000008000 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000008000) -+dlr 000000000000000000000000FFFFFFFF / 00000008FFFFFFFA = 0000000000000001 (rem 0000000000000005) -+dlr 00000000000000000000000080000000 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000080000000) -+dlr 0000000000000000000000007FFFFFFF / 00000008FFFFFFFA = 0000000000000000 (rem 000000007FFFFFFF) -+dlr 0000000000000000FFFFFFFFFFFFFFFF / 00000008FFFFFFFA = FFFFFFFF00000001 (rem 0000000000000005) -+dlr 00000000000000008000000000000000 / 00000008FFFFFFFA = 8000000000000000 (rem 0000000000000000) -+dlr 00000000000000007FFFFFFFFFFFFFFF / 00000008FFFFFFFA = 7FFFFFFF00000001 (rem 0000000000000005) -+dlr 000000000000000100000000AFFFFFFF / 00000008FFFFFFFA = 0000000000000001 (rem 00000000B0000005) -+dlg 00000000000000000000000000000000 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000000000) -+dlg 00000000000000000000000000000001 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000000001) -+dlg 0000000000000000000000000000FFFF / 00000008FFFFFFFA = 0000000000000000 (rem 000000000000FFFF) -+dlg 00000000000000000000000000007FFF / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000007FFF) -+dlg 00000000000000000000000000008000 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000008000) -+dlg 000000000000000000000000FFFFFFFF / 00000008FFFFFFFA = 0000000000000000 (rem 00000000FFFFFFFF) -+dlg 00000000000000000000000080000000 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000080000000) -+dlg 0000000000000000000000007FFFFFFF / 00000008FFFFFFFA = 0000000000000000 (rem 000000007FFFFFFF) -+dlg 0000000000000000FFFFFFFFFFFFFFFF / 00000008FFFFFFFA = 000000001C71C71C (rem 00000004AAAAAAA7) -+dlg 00000000000000008000000000000000 / 00000008FFFFFFFA = 000000000E38E38E (rem 0000000255555554) -+dlg 00000000000000007FFFFFFFFFFFFFFF / 00000008FFFFFFFA = 000000000E38E38E (rem 0000000255555553) -+dlg 000000000000000100000000AFFFFFFF / 00000008FFFFFFFA = 000000001C71C71C (rem 000000055AAAAAA7) -+dlgr 00000000000000000000000000000000 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000000000) -+dlgr 00000000000000000000000000000001 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000000001) -+dlgr 0000000000000000000000000000FFFF / 00000008FFFFFFFA = 0000000000000000 (rem 000000000000FFFF) -+dlgr 00000000000000000000000000007FFF / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000007FFF) -+dlgr 00000000000000000000000000008000 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000008000) -+dlgr 000000000000000000000000FFFFFFFF / 00000008FFFFFFFA = 0000000000000000 (rem 00000000FFFFFFFF) -+dlgr 00000000000000000000000080000000 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000080000000) -+dlgr 0000000000000000000000007FFFFFFF / 00000008FFFFFFFA = 0000000000000000 (rem 000000007FFFFFFF) -+dlgr 0000000000000000FFFFFFFFFFFFFFFF / 00000008FFFFFFFA = 000000001C71C71C (rem 00000004AAAAAAA7) -+dlgr 00000000000000008000000000000000 / 00000008FFFFFFFA = 000000000E38E38E (rem 0000000255555554) -+dlgr 00000000000000007FFFFFFFFFFFFFFF / 00000008FFFFFFFA = 000000000E38E38E (rem 0000000255555553) -+dlgr 000000000000000100000000AFFFFFFF / 00000008FFFFFFFA = 000000001C71C71C (rem 000000055AAAAAA7) -+dsg 00000000000000000000000000000000 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000000000) -+dsg 00000000000000000000000000000001 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000000001) -+dsg 0000000000000000000000000000FFFF / 00000008FFFFFFFA = 0000000000000000 (rem 000000000000FFFF) -+dsg 00000000000000000000000000007FFF / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000007FFF) -+dsg 00000000000000000000000000008000 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000008000) -+dsg 000000000000000000000000FFFFFFFF / 00000008FFFFFFFA = 0000000000000000 (rem 00000000FFFFFFFF) -+dsg 00000000000000000000000080000000 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000080000000) -+dsg 0000000000000000000000007FFFFFFF / 00000008FFFFFFFA = 0000000000000000 (rem 000000007FFFFFFF) -+dsg 0000000000000000FFFFFFFFFFFFFFFF / 00000008FFFFFFFA = 0000000000000000 (rem FFFFFFFFFFFFFFFF) -+dsg 00000000000000008000000000000000 / 00000008FFFFFFFA = FFFFFFFFF1C71C72 (rem FFFFFFFDAAAAAAAC) -+dsg 00000000000000007FFFFFFFFFFFFFFF / 00000008FFFFFFFA = 000000000E38E38E (rem 0000000255555553) -+dsg 000000000000000100000000AFFFFFFF / 00000008FFFFFFFA = 0000000000000000 (rem 00000000AFFFFFFF) -+dsgr 00000000000000000000000000000000 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000000000) -+dsgr 00000000000000000000000000000001 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000000001) -+dsgr 0000000000000000000000000000FFFF / 00000008FFFFFFFA = 0000000000000000 (rem 000000000000FFFF) -+dsgr 00000000000000000000000000007FFF / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000007FFF) -+dsgr 00000000000000000000000000008000 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000008000) -+dsgr 000000000000000000000000FFFFFFFF / 00000008FFFFFFFA = 0000000000000000 (rem 00000000FFFFFFFF) -+dsgr 00000000000000000000000080000000 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000080000000) -+dsgr 0000000000000000000000007FFFFFFF / 00000008FFFFFFFA = 0000000000000000 (rem 000000007FFFFFFF) -+dsgr 0000000000000000FFFFFFFFFFFFFFFF / 00000008FFFFFFFA = 0000000000000000 (rem FFFFFFFFFFFFFFFF) -+dsgr 00000000000000008000000000000000 / 00000008FFFFFFFA = FFFFFFFFF1C71C72 (rem FFFFFFFDAAAAAAAC) -+dsgr 00000000000000007FFFFFFFFFFFFFFF / 00000008FFFFFFFA = 000000000E38E38E (rem 0000000255555553) -+dsgr 000000000000000100000000AFFFFFFF / 00000008FFFFFFFA = 0000000000000000 (rem 00000000AFFFFFFF) -+dsgf 00000000000000000000000000000000 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000000000) -+dsgf 00000000000000000000000000000001 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000000001) -+dsgf 0000000000000000000000000000FFFF / 00000008FFFFFFFA = 0000000000001FFF (rem 0000000000000007) -+dsgf 00000000000000000000000000007FFF / 00000008FFFFFFFA = 0000000000000FFF (rem 0000000000000007) -+dsgf 00000000000000000000000000008000 / 00000008FFFFFFFA = 0000000000001000 (rem 0000000000000000) -+dsgf 000000000000000000000000FFFFFFFF / 00000008FFFFFFFA = 000000001FFFFFFF (rem 0000000000000007) -+dsgf 00000000000000000000000080000000 / 00000008FFFFFFFA = 0000000010000000 (rem 0000000000000000) -+dsgf 0000000000000000000000007FFFFFFF / 00000008FFFFFFFA = 000000000FFFFFFF (rem 0000000000000007) -+dsgf 0000000000000000FFFFFFFFFFFFFFFF / 00000008FFFFFFFA = 0000000000000000 (rem FFFFFFFFFFFFFFFF) -+dsgf 00000000000000008000000000000000 / 00000008FFFFFFFA = F000000000000000 (rem 0000000000000000) -+dsgf 00000000000000007FFFFFFFFFFFFFFF / 00000008FFFFFFFA = 0FFFFFFFFFFFFFFF (rem 0000000000000007) -+dsgf 000000000000000100000000AFFFFFFF / 00000008FFFFFFFA = 0000000015FFFFFF (rem 0000000000000007) -+dsgfr 00000000000000000000000000000000 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000000000) -+dsgfr 00000000000000000000000000000001 / 00000008FFFFFFFA = 0000000000000000 (rem 0000000000000001) -+dsgfr 0000000000000000000000000000FFFF / 00000008FFFFFFFA = FFFFFFFFFFFFD556 (rem 0000000000000003) -+dsgfr 00000000000000000000000000007FFF / 00000008FFFFFFFA = FFFFFFFFFFFFEAAB (rem 0000000000000001) -+dsgfr 00000000000000000000000000008000 / 00000008FFFFFFFA = FFFFFFFFFFFFEAAB (rem 0000000000000002) -+dsgfr 000000000000000000000000FFFFFFFF / 00000008FFFFFFFA = FFFFFFFFD5555556 (rem 0000000000000003) -+dsgfr 00000000000000000000000080000000 / 00000008FFFFFFFA = FFFFFFFFEAAAAAAB (rem 0000000000000002) -+dsgfr 0000000000000000000000007FFFFFFF / 00000008FFFFFFFA = FFFFFFFFEAAAAAAB (rem 0000000000000001) -+dsgfr 0000000000000000FFFFFFFFFFFFFFFF / 00000008FFFFFFFA = 0000000000000000 (rem FFFFFFFFFFFFFFFF) -+dsgfr 00000000000000008000000000000000 / 00000008FFFFFFFA = 1555555555555555 (rem FFFFFFFFFFFFFFFE) -+dsgfr 00000000000000007FFFFFFFFFFFFFFF / 00000008FFFFFFFA = EAAAAAAAAAAAAAAB (rem 0000000000000001) -+dsgfr 000000000000000100000000AFFFFFFF / 00000008FFFFFFFA = FFFFFFFFE2AAAAAB (rem 0000000000000001) ---- none/tests/s390x/div.vgtest -+++ none/tests/s390x/div.vgtest -@@ -0,0 +1 @@ -+prog: div ---- none/tests/s390x/ex_clone.c -+++ none/tests/s390x/ex_clone.c -@@ -0,0 +1,60 @@ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+char source[40] = "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa\0"; -+char target[40] = " \0"; -+ -+pthread_t thread; -+ -+void *threadfunc(void *arg) -+{ -+ char buf2[40]; -+ int i; -+ -+ memset(buf2, 0, sizeof(buf2)); -+ for (i=0; i<5000; i++) -+ asm volatile( -+ "lghi 2,0\n" -+ "lghi 3,0\n" -+ "lgr 4,%0\n" -+ "lgr 5,%1\n" -+ "larl 1,1f\n" -+ "0: ex 0,0(1)\n" -+ "j 2f\n" -+ "1: mvc 0(30,4),0(5)\n" -+ "2:\n" -+ ::"a" (buf2), "a" (source) -+ : "1", "2", "3", "4", "5", "memory"); -+ printf("%s\n", buf2); -+ pthread_exit(0); -+} -+ -+int main() -+{ -+ int i; -+ -+ pthread_create(&thread, NULL, threadfunc, NULL); -+ -+ for (i=0; i<5000; i++) -+ asm volatile( -+ "lghi 4,0\n" -+ "lghi 5,0\n" -+ "lgr 2,%0\n" -+ "lgr 3,%1\n" -+ "larl 1,1f\n" -+ "0: ex 0,0(1)\n" -+ "j 2f\n" -+ "1: mvc 0(20,2),0(3)\n" -+ "2:\n" -+ ::"a" (target), "a" (source) -+ : "1", "2", "3", "4", "5", "memory"); -+ pthread_join(thread, NULL); -+ printf("%s\n", target); -+ pthread_exit(0); -+} ---- none/tests/s390x/ex_clone.stderr.exp -+++ none/tests/s390x/ex_clone.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/ex_clone.stdout.exp -+++ none/tests/s390x/ex_clone.stdout.exp -@@ -0,0 +1,2 @@ -+aaaaaaaaaaaaaaaaaaaaaaaaaaaaaa -+aaaaaaaaaaaaaaaaaaaa ---- none/tests/s390x/ex_clone.vgtest -+++ none/tests/s390x/ex_clone.vgtest -@@ -0,0 +1 @@ -+prog: ex_clone ---- none/tests/s390x/ex_sig.c -+++ none/tests/s390x/ex_sig.c -@@ -0,0 +1,46 @@ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+char source[40] = "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa\0"; -+char target[40] = " \0"; -+ -+void handle_SIG(int sig) -+{ -+ static int counter; -+ char buf2[40]; -+ -+ counter++; -+ asm volatile( "larl 1,1f\n" -+ "ex 0,0(1)\n" -+ "j 2f\n" -+ "1: mvc 0(30,%0),0(%1)\n" -+ "2:\n" -+ ::"a" (buf2), "a" (source) -+ : "1"); -+ if (counter == 2) { -+ printf("%s\n", target); -+ exit(1); -+ } else -+ alarm(1); -+} -+ -+int main() -+{ -+ signal(SIGALRM, handle_SIG); -+ alarm(1); -+ -+ asm volatile( "larl 1,1f\n" -+ "0: ex 0,0(1)\n" -+ "j 0b\n" -+ "1: mvc 0(20,%0),0(%1)\n" -+ ::"a" (target), "a" (source) -+ : "1"); -+ exit(0); -+} ---- none/tests/s390x/ex_sig.stderr.exp -+++ none/tests/s390x/ex_sig.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/ex_sig.stdout.exp -+++ none/tests/s390x/ex_sig.stdout.exp -@@ -0,0 +1 @@ -+aaaaaaaaaaaaaaaaaaaa ---- none/tests/s390x/ex_sig.vgtest -+++ none/tests/s390x/ex_sig.vgtest -@@ -0,0 +1 @@ -+prog: ex_sig ---- none/tests/s390x/filter_stderr -+++ none/tests/s390x/filter_stderr -@@ -0,0 +1,4 @@ -+#! /bin/sh -+ -+../filter_stderr -+ ---- none/tests/s390x/flogr.c -+++ none/tests/s390x/flogr.c -@@ -0,0 +1,68 @@ -+#include -+ -+ -+/* Call FLOGR on INPUT. The results are returned through the parms. */ -+void -+flogr(unsigned long input, unsigned long *bitpos, unsigned long *modval, -+ unsigned int *cc) -+{ -+ unsigned int psw; -+ register unsigned long value asm("4") = input; -+ -+ asm volatile ( "flogr 2, %[val]\n\t" -+ "ipm %[psw]\n\t" -+ "stg 2, %[bitpos]\n\t" -+ "stg 3, %[modval]\n\t" -+ : [bitpos]"=m"(*bitpos), [modval]"=m"(*modval), -+ [psw]"=d"(psw) -+ : [val] "d"(value) -+ : "2", "3", "cc"); -+ -+ *cc = psw >> 28; -+#if 0 -+ printf("value = %lx, bitpos = %lu, modval = %lx, cc = %d\n", -+ value, *bitpos, *modval, *cc); -+#endif -+} -+ -+void -+runtest(void) -+{ -+ unsigned long bitpos, modval, value; -+ unsigned int cc; -+ int i; -+ -+ /* Value 0 is special */ -+ value = 0; -+ flogr(value, &bitpos, &modval, &cc); -+ if (modval != 0) fprintf(stderr, "modval is wrong for %lx\n", value); -+ if (bitpos != 64) fprintf(stderr, "bitpos is wrong for %lx\n", value); -+ if (cc != 0) fprintf(stderr, "cc is wrong for %lx\n", value); -+ -+ /* Test with exactly 1 bit set */ -+ for (i = 0; i < 64; ++i) { -+ value = 1ull << i; -+ flogr(value, &bitpos, &modval, &cc); -+ if (modval != 0) fprintf(stderr, "modval is wrong for %lx\n", value); -+ if (bitpos != 63 - i) fprintf(stderr, "bitpos is wrong for %lx\n", value); -+ if (cc != 2) fprintf(stderr, "cc is wrong for %lx\n", value); -+ } -+ -+ /* Test with all bits 1 right from first 1 bit */ -+ for (i = 1; i < 64; ++i) { -+ value = 1ull << i; -+ value = value | (value - 1); -+ flogr(value, &bitpos, &modval, &cc); -+ if (modval != (value >> 1)) fprintf(stderr, "modval is wrong for %lx\n", value); -+ if (bitpos != 63 - i) fprintf(stderr, "bitpos is wrong for %lx\n", value); -+ if (cc != 2) fprintf(stderr, "cc is wrong for %lx\n", value); -+ } -+} -+ -+ -+int main() -+{ -+ runtest(); -+ -+ return 0; -+} ---- none/tests/s390x/flogr.stderr.exp -+++ none/tests/s390x/flogr.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/flogr.vgtest -+++ none/tests/s390x/flogr.vgtest -@@ -0,0 +1,2 @@ -+prog: flogr -+prereq: test -x flogr ---- none/tests/s390x/icm.c -+++ none/tests/s390x/icm.c -@@ -0,0 +1,94 @@ -+#include -+#include "test.h" -+#define icm(r1, mask, b) do {\ -+ asm volatile( "lg 1, 0(%0)\n" \ -+ "icm 1," #mask ",0(%1)\n" \ -+ "stg 1, 0(%0)\n" \ -+ :: "a" (r1), "a" (b) \ -+ : "1", "memory", "cc"); \ -+} while(0) -+ -+#define icmh(r1, mask, b) do {\ -+ asm volatile( "lg 1, 0(%0)\n" \ -+ "icmh 1," #mask ",0(%1)\n" \ -+ "stg 1, 0(%0)\n" \ -+ :: "a" (r1), "a" (b) \ -+ : "1", "memory", "cc"); \ -+} while(0) -+ -+int main() -+{ -+ long a[320]; -+ char buffer[256]; -+ char *b1="\x80\x00\x00\x00"; -+ char *b2="\x00\x00\x00\x01"; -+ char *b3="\xff\x00\x00\x00"; -+ char *b4="\x00\xff\x00\x00"; -+ char *b5="\x00\x00\xff\x00"; -+ char *b6="\x00\x00\x00\xff"; -+ int n; -+ int cc; -+ -+ for (n=0; n<320; n++) -+ a[n] = n; -+ -+#define test(what, offset) do { \ -+ icm(&a[0+offset], 0, what); cc = get_cc(); \ -+ icm(&a[1+offset+cc], 1, what); cc = get_cc(); \ -+ icm(&a[2+offset+cc], 2, what); cc = get_cc(); \ -+ icm(&a[3+offset+cc], 3, what); cc = get_cc(); \ -+ icm(&a[4+offset+cc], 4, what); cc = get_cc(); \ -+ icm(&a[5+offset+cc], 5, what); cc = get_cc(); \ -+ icm(&a[6+offset+cc], 6, what); cc = get_cc(); \ -+ icm(&a[7+offset+cc], 7, what); cc = get_cc(); \ -+ icm(&a[8+offset+cc], 8, what); cc = get_cc(); \ -+ icm(&a[9+offset+cc], 9, what); cc = get_cc(); \ -+ icm(&a[10+offset+cc], 10, what); cc = get_cc(); \ -+ icm(&a[11+offset+cc], 11, what); cc = get_cc(); \ -+ icm(&a[12+offset+cc], 12, what); cc = get_cc(); \ -+ icm(&a[13+offset+cc], 13, what); cc = get_cc(); \ -+ icm(&a[14+offset+cc], 14, what); cc = get_cc(); \ -+ icm(&a[15+offset+cc], 15, what); cc = get_cc(); \ -+ icmh(&a[0+offset+cc], 0, what); cc = get_cc(); \ -+ icmh(&a[1+offset+cc], 1, what); cc = get_cc(); \ -+ icmh(&a[2+offset+cc], 2, what); cc = get_cc(); \ -+ icmh(&a[3+offset+cc], 3, what); cc = get_cc(); \ -+ icmh(&a[4+offset+cc], 4, what); cc = get_cc(); \ -+ icmh(&a[5+offset+cc], 5, what); cc = get_cc(); \ -+ icmh(&a[6+offset+cc], 6, what); cc = get_cc(); \ -+ icmh(&a[7+offset+cc], 7, what); cc = get_cc(); \ -+ icmh(&a[8+offset+cc], 8, what); cc = get_cc(); \ -+ icmh(&a[9+offset+cc], 9, what); cc = get_cc(); \ -+ icmh(&a[10+offset+cc], 10, what); cc = get_cc(); \ -+ icmh(&a[11+offset+cc], 11, what); cc = get_cc(); \ -+ icmh(&a[12+offset+cc], 12, what); cc = get_cc(); \ -+ icmh(&a[13+offset+cc], 13, what); cc = get_cc(); \ -+ icmh(&a[14+offset+cc], 14, what); cc = get_cc(); \ -+ icmh(&a[15+offset+cc], 15, what); \ -+} while (0) -+ -+ for (n=0; n<256; n++) -+ buffer[n] = n; -+ -+ test(&buffer[0],0); -+ test(&buffer[60],16); -+ test(&buffer[120],32); -+ test(&buffer[180],48); -+ test(&buffer[240],64); -+ test(&buffer[252],80); -+ test(b1,96); -+ test(b2,112); -+ for (n=0; n<256; n++) -+ buffer[n] = 255-n; -+ test(&buffer[0],128); -+ test(&buffer[60],144); -+ test(&buffer[160],160); -+ test(b3,176); -+ test(b4,192); -+ test(b5,208); -+ test(b6,224); -+ -+ dump_field((char *) a, sizeof(a)); -+ -+ return 0; -+} ---- none/tests/s390x/icm.stderr.exp -+++ none/tests/s390x/icm.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/icm.stdout.exp -+++ none/tests/s390x/icm.stdout.exp -@@ -0,0 +1 @@ -+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 00 00 00 01 00 00 00 01 00 00 00 00 00 00 00 04 00 00 00 01 00 00 00 01 00 00 00 00 00 00 00 06 00 00 00 00 00 00 00 07 00 00 01 00 00 00 01 08 00 00 01 01 00 00 01 01 00 00 00 00 00 00 00 0A 00 00 00 00 00 00 00 0B 00 00 01 00 00 00 01 0C 00 00 01 02 00 00 01 02 00 01 00 00 00 01 00 0E 00 01 00 02 00 01 00 02 00 01 02 00 00 01 02 10 00 01 02 3C 00 01 02 3C 00 00 00 00 00 00 00 12 00 00 00 00 00 00 00 13 00 00 3C 00 00 00 3C 14 00 00 3C 3D 00 00 3C 3D 00 3C 00 00 00 3C 00 16 00 3C 00 3D 00 3C 00 3D 00 3C 3D 00 00 3C 3D 18 00 3C 3D 3E 00 3C 3D 3E 3C 00 00 00 3C 00 00 1A 3C 00 00 3D 3C 00 00 3D 3C 00 3D 00 3C 00 3D 1C 3C 00 3D 3E 3C 00 3D 3E 3C 3D 00 00 3C 3D 00 1E 3C 3D 00 3E 3C 3D 00 3E 3C 3D 3E 00 3C 3D 3E 20 3C 3D 3E 78 3C 3D 3E 78 00 00 00 00 00 00 00 22 00 00 00 00 00 00 00 23 00 00 78 00 00 00 78 24 00 00 78 79 00 00 78 79 00 78 00 00 00 78 00 26 00 78 00 79 00 78 00 79 00 78 79 00 00 78 79 28 00 78 79 7A 00 78 79 7A 78 00 00 00 78 00 00 2A 78 00 00 79 78 00 00 79 78 00 79 00 78 00 79 2C 78 00 79 7A 78 00 79 7A 78 79 00 00 78 79 00 2E 78 79 00 7A 78 79 00 7A 78 79 7A 00 78 79 7A 30 78 79 7A B4 78 79 7A B4 00 00 00 00 00 00 00 32 00 00 B4 00 00 00 B4 33 00 00 B4 B5 00 00 B4 B5 00 B4 00 00 00 B4 00 35 00 B4 00 B5 00 B4 00 B5 00 B4 B5 00 00 B4 B5 37 00 B4 B5 B6 00 B4 B5 B6 B4 00 00 00 B4 00 00 39 B4 00 00 B5 B4 00 00 B5 B4 00 B5 00 B4 00 B5 3B B4 00 B5 B6 B4 00 B5 B6 B4 B5 00 00 B4 B5 00 3D B4 B5 00 B6 B4 B5 00 B6 B4 B5 B6 00 B4 B5 B6 3F B4 B5 B6 B7 B4 B5 B6 B7 00 00 00 F0 00 00 00 F0 00 00 00 00 00 00 00 42 00 00 F0 00 00 00 F0 43 00 00 F0 F1 00 00 F0 F1 00 F0 00 00 00 F0 00 45 00 F0 00 F1 00 F0 00 F1 00 F0 F1 00 00 F0 F1 47 00 F0 F1 F2 00 F0 F1 F2 F0 00 00 00 F0 00 00 49 F0 00 00 F1 F0 00 00 F1 F0 00 F1 00 F0 00 F1 4B F0 00 F1 F2 F0 00 F1 F2 F0 F1 00 00 F0 F1 00 4D F0 F1 00 F2 F0 F1 00 F2 F0 F1 F2 00 F0 F1 F2 4F F0 F1 F2 F3 F0 F1 F2 F3 00 00 00 FC 00 00 00 FC 00 00 00 00 00 00 00 52 00 00 FC 00 00 00 FC 53 00 00 FC FD 00 00 FC FD 00 FC 00 00 00 FC 00 55 00 FC 00 FD 00 FC 00 FD 00 FC FD 00 00 FC FD 57 00 FC FD FE 00 FC FD FE FC 00 00 00 FC 00 00 59 FC 00 00 FD FC 00 00 FD FC 00 FD 00 FC 00 FD 5B FC 00 FD FE FC 00 FD FE FC FD 00 00 FC FD 00 5D FC FD 00 FE FC FD 00 FE FC FD FE 00 FC FD FE 5F FC FD FE FF FC FD FE FF 00 00 00 80 00 00 00 80 00 00 00 00 00 00 00 62 00 00 80 00 00 00 80 63 00 00 80 00 00 00 80 00 00 80 00 00 00 80 00 65 00 80 00 00 00 80 00 00 00 80 00 00 00 80 00 67 00 80 00 00 00 80 00 00 80 00 00 00 80 00 00 69 80 00 00 00 80 00 00 00 80 00 00 00 80 00 00 6B 80 00 00 00 80 00 00 00 80 00 00 00 80 00 00 6D 80 00 00 00 80 00 00 00 80 00 00 00 80 00 00 6F 80 00 00 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 72 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 74 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 76 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 78 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 7A 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 7C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 7E 00 00 00 01 00 00 00 01 00 00 00 00 00 00 00 80 00 00 00 FF 00 00 00 FF 00 00 00 00 00 00 00 82 00 00 FF 00 00 00 FF 83 00 00 FF FE 00 00 FF FE 00 FF 00 00 00 FF 00 85 00 FF 00 FE 00 FF 00 FE 00 FF FE 00 00 FF FE 87 00 FF FE FD 00 FF FE FD FF 00 00 00 FF 00 00 89 FF 00 00 FE FF 00 00 FE FF 00 FE 00 FF 00 FE 8B FF 00 FE FD FF 00 FE FD FF FE 00 00 FF FE 00 8D FF FE 00 FD FF FE 00 FD FF FE FD 00 FF FE FD 8F FF FE FD FC FF FE FD FC 00 00 00 C3 00 00 00 C3 00 00 00 00 00 00 00 92 00 00 C3 00 00 00 C3 93 00 00 C3 C2 00 00 C3 C2 00 C3 00 00 00 C3 00 95 00 C3 00 C2 00 C3 00 C2 00 C3 C2 00 00 C3 C2 97 00 C3 C2 C1 00 C3 C2 C1 C3 00 00 00 C3 00 00 99 C3 00 00 C2 C3 00 00 C2 C3 00 C2 00 C3 00 C2 9B C3 00 C2 C1 C3 00 C2 C1 C3 C2 00 00 C3 C2 00 9D C3 C2 00 C1 C3 C2 00 C1 C3 C2 C1 00 C3 C2 C1 9F C3 C2 C1 C0 C3 C2 C1 C0 00 00 00 5F 00 00 00 5F 00 00 00 00 00 00 00 A2 00 00 00 00 00 00 00 A3 00 00 5F 00 00 00 5F A4 00 00 5F 5E 00 00 5F 5E 00 5F 00 00 00 5F 00 A6 00 5F 00 5E 00 5F 00 5E 00 5F 5E 00 00 5F 5E A8 00 5F 5E 5D 00 5F 5E 5D 5F 00 00 00 5F 00 00 AA 5F 00 00 5E 5F 00 00 5E 5F 00 5E 00 5F 00 5E AC 5F 00 5E 5D 5F 00 5E 5D 5F 5E 00 00 5F 5E 00 AE 5F 5E 00 5D 5F 5E 00 5D 5F 5E 5D 00 5F 5E 5D B0 5F 5E 5D FF 5F 5E 5D FF 00 00 00 00 00 00 00 B2 00 00 FF 00 00 00 FF B3 00 00 FF 00 00 00 FF 00 00 FF 00 00 00 FF 00 B5 00 FF 00 00 00 FF 00 00 00 FF 00 00 00 FF 00 B7 00 FF 00 00 00 FF 00 00 FF 00 00 00 FF 00 00 B9 FF 00 00 00 FF 00 00 00 FF 00 00 00 FF 00 00 BB FF 00 00 00 FF 00 00 00 FF 00 00 00 FF 00 00 BD FF 00 00 00 FF 00 00 00 FF 00 00 00 FF 00 00 BF FF 00 00 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 C2 00 00 00 FF 00 00 00 FF 00 00 00 00 00 00 00 C4 00 00 00 FF 00 00 00 FF 00 00 00 00 00 00 00 C6 00 00 00 00 00 00 00 C7 00 00 FF 00 00 00 FF C8 00 00 FF FF 00 00 FF FF 00 00 00 00 00 00 00 CA 00 00 00 00 00 00 00 CB 00 00 FF 00 00 00 FF CC 00 00 FF 00 00 00 FF 00 00 FF 00 00 00 FF 00 CE 00 FF 00 00 00 FF 00 00 00 FF 00 00 00 FF 00 D0 00 FF 00 00 00 FF 00 00 00 00 00 00 00 00 00 D2 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 D4 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 D6 00 00 00 FF 00 00 00 FF 00 00 00 00 00 00 00 D8 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 DA 00 00 00 FF 00 00 00 FF 00 00 00 00 00 00 00 DC 00 00 00 FF 00 00 00 FF 00 00 00 00 00 00 00 DE 00 00 00 00 00 00 00 DF 00 00 FF 00 00 00 FF E0 00 00 FF 00 00 00 FF 00 00 00 00 00 00 00 00 E2 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 E4 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 E6 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 E8 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 EA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 EC 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 EE 00 00 00 FF 00 00 00 FF 00 00 00 00 00 00 00 F0 00 00 00 00 00 00 00 F1 00 00 00 00 00 00 00 F2 00 00 00 00 00 00 00 F3 00 00 00 00 00 00 00 F4 00 00 00 00 00 00 00 F5 00 00 00 00 00 00 00 F6 00 00 00 00 00 00 00 F7 00 00 00 00 00 00 00 F8 00 00 00 00 00 00 00 F9 00 00 00 00 00 00 00 FA 00 00 00 00 00 00 00 FB 00 00 00 00 00 00 00 FC 00 00 00 00 00 00 00 FD 00 00 00 00 00 00 00 FE 00 00 00 00 00 00 00 FF 00 00 00 00 00 00 01 00 00 00 00 00 00 00 01 01 00 00 00 00 00 00 01 02 00 00 00 00 00 00 01 03 00 00 00 00 00 00 01 04 00 00 00 00 00 00 01 05 00 00 00 00 00 00 01 06 00 00 00 00 00 00 01 07 00 00 00 00 00 00 01 08 00 00 00 00 00 00 01 09 00 00 00 00 00 00 01 0A 00 00 00 00 00 00 01 0B 00 00 00 00 00 00 01 0C 00 00 00 00 00 00 01 0D 00 00 00 00 00 00 01 0E 00 00 00 00 00 00 01 0F 00 00 00 00 00 00 01 10 00 00 00 00 00 00 01 11 00 00 00 00 00 00 01 12 00 00 00 00 00 00 01 13 00 00 00 00 00 00 01 14 00 00 00 00 00 00 01 15 00 00 00 00 00 00 01 16 00 00 00 00 00 00 01 17 00 00 00 00 00 00 01 18 00 00 00 00 00 00 01 19 00 00 00 00 00 00 01 1A 00 00 00 00 00 00 01 1B 00 00 00 00 00 00 01 1C 00 00 00 00 00 00 01 1D 00 00 00 00 00 00 01 1E 00 00 00 00 00 00 01 1F 00 00 00 00 00 00 01 20 00 00 00 00 00 00 01 21 00 00 00 00 00 00 01 22 00 00 00 00 00 00 01 23 00 00 00 00 00 00 01 24 00 00 00 00 00 00 01 25 00 00 00 00 00 00 01 26 00 00 00 00 00 00 01 27 00 00 00 00 00 00 01 28 00 00 00 00 00 00 01 29 00 00 00 00 00 00 01 2A 00 00 00 00 00 00 01 2B 00 00 00 00 00 00 01 2C 00 00 00 00 00 00 01 2D 00 00 00 00 00 00 01 2E 00 00 00 00 00 00 01 2F 00 00 00 00 00 00 01 30 00 00 00 00 00 00 01 31 00 00 00 00 00 00 01 32 00 00 00 00 00 00 01 33 00 00 00 00 00 00 01 34 00 00 00 00 00 00 01 35 00 00 00 00 00 00 01 36 00 00 00 00 00 00 01 37 00 00 00 00 00 00 01 38 00 00 00 00 00 00 01 39 00 00 00 00 00 00 01 3A 00 00 00 00 00 00 01 3B 00 00 00 00 00 00 01 3C 00 00 00 00 00 00 01 3D 00 00 00 00 00 00 01 3E 00 00 00 00 00 00 01 3F -\ Kein Zeilenumbruch am Dateiende. ---- none/tests/s390x/icm.vgtest -+++ none/tests/s390x/icm.vgtest -@@ -0,0 +1 @@ -+prog: icm ---- none/tests/s390x/insert.c -+++ none/tests/s390x/insert.c -@@ -0,0 +1,65 @@ -+#include -+#include "insert.h" -+ -+static void do_imm_insns(void) -+{ -+ immsweep(iihh, 0x55); -+ immsweep(iihl, 0x55); -+ immsweep(iilh, 0x55); -+ immsweep(iill, 0x55); -+ immsweep(iihh, 0xaa); -+ immsweep(iihl, 0xaa); -+ immsweep(iilh, 0xaa); -+ immsweep(iill, 0xaa); -+ immsweep(iihh, 0xff); -+ immsweep(iihl, 0xff); -+ immsweep(iilh, 0xff); -+ immsweep(iill, 0xff); -+ immsweep(iihh, 0x0); -+ immsweep(iihl, 0x0); -+ immsweep(iilh, 0x0); -+ immsweep(iill, 0x0); -+ immsweep(iihh, 0xffff); -+ immsweep(iihl, 0xffff); -+ immsweep(iilh, 0xffff); -+ immsweep(iill, 0xffff); -+ immsweep(iihh, 0xaaaa); -+ immsweep(iihl, 0xaaaa); -+ immsweep(iilh, 0xaaaa); -+ immsweep(iill, 0xaaaa); -+ immsweep(iihh, 0x5555); -+ immsweep(iihl, 0x5555); -+ immsweep(iilh, 0x5555); -+ immsweep(iill, 0x5555); -+} -+ -+ -+static void do_mem_insns(unsigned long s2) -+{ -+ memsweep(ic, s2); -+ memsweep(icy, s2); -+} -+ -+int main() -+{ -+ do_mem_insns(0x0ul); -+ do_mem_insns(0x5555555555555555ul); -+ do_mem_insns(0xaaaaaaaaaaaaaaaaul); -+ do_mem_insns(0x8000000000000000ul); -+ do_mem_insns(0xfffffffffffffffful); -+ do_mem_insns(0x7fffffff00000000ul); -+ do_mem_insns(0x8000000000000000ul); -+ do_mem_insns(0xaaaaaaaa00000000ul); -+ do_mem_insns(0xffffffff00000000ul); -+ do_mem_insns(0x000000007ffffffful); -+ do_mem_insns(0x0000000080000000ul); -+ do_mem_insns(0x0000000055555555ul); -+ do_mem_insns(0x00000000fffffffful); -+ do_mem_insns(0x000000000000fffful); -+ do_mem_insns(0x0000000000007ffful); -+ do_mem_insns(0x0000000000008000ul); -+ do_mem_insns(0x000000000000fffful); -+ -+ do_imm_insns(); -+ return 0; -+} ---- none/tests/s390x/insert_EI.c -+++ none/tests/s390x/insert_EI.c -@@ -0,0 +1,38 @@ -+#include -+#include "insert.h" -+ -+static void do_imm_insns(void) -+{ -+ immsweep(iihf, 0); -+ immsweep(iihf, 0xff); -+ immsweep(iihf, 0x55); -+ immsweep(iihf, 0xaa); -+ immsweep(iihf, 0xffff); -+ immsweep(iihf, 0x5555); -+ immsweep(iihf, 0xaaaa); -+ immsweep(iihf, 0xffff0000); -+ immsweep(iihf, 0x55550000); -+ immsweep(iihf, 0xaaaa0000); -+ immsweep(iihf, 0xffffffff); -+ immsweep(iihf, 0x55555555); -+ immsweep(iihf, 0xaaaaaaaa); -+ immsweep(iilf, 0); -+ immsweep(iilf, 0xff); -+ immsweep(iilf, 0x55); -+ immsweep(iilf, 0xaa); -+ immsweep(iilf, 0xffff); -+ immsweep(iilf, 0x5555); -+ immsweep(iilf, 0xaaaa); -+ immsweep(iilf, 0xffff0000); -+ immsweep(iilf, 0x55550000); -+ immsweep(iilf, 0xaaaa0000); -+ immsweep(iilf, 0xffffffff); -+ immsweep(iilf, 0x55555555); -+ immsweep(iilf, 0xaaaaaaaa); -+} -+ -+int main() -+{ -+ do_imm_insns(); -+ return 0; -+} ---- none/tests/s390x/insert_EI.stderr.exp -+++ none/tests/s390x/insert_EI.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/insert_EI.stdout.exp -+++ none/tests/s390x/insert_EI.stdout.exp -@@ -0,0 +1,312 @@ -+iihf 0000000000000000 <- 0000000000000000 = 0000000000000000 -+iihf 0000000000000001 <- 0000000000000000 = 0000000000000001 -+iihf 000000000000FFFF <- 0000000000000000 = 000000000000FFFF -+iihf 0000000000007FFF <- 0000000000000000 = 0000000000007FFF -+iihf 0000000000008000 <- 0000000000000000 = 0000000000008000 -+iihf 00000000FFFFFFFF <- 0000000000000000 = 00000000FFFFFFFF -+iihf 0000000080000000 <- 0000000000000000 = 0000000080000000 -+iihf 000000007FFFFFFF <- 0000000000000000 = 000000007FFFFFFF -+iihf AAAAAAAAAAAAAAAA <- 0000000000000000 = 00000000AAAAAAAA -+iihf 8000000000000000 <- 0000000000000000 = 0000000000000000 -+iihf FFFFFFFFFFFFFFFF <- 0000000000000000 = 00000000FFFFFFFF -+iihf 5555555555555555 <- 0000000000000000 = 0000000055555555 -+iihf 0000000000000000 <- 00000000000000FF = 000000FF00000000 -+iihf 0000000000000001 <- 00000000000000FF = 000000FF00000001 -+iihf 000000000000FFFF <- 00000000000000FF = 000000FF0000FFFF -+iihf 0000000000007FFF <- 00000000000000FF = 000000FF00007FFF -+iihf 0000000000008000 <- 00000000000000FF = 000000FF00008000 -+iihf 00000000FFFFFFFF <- 00000000000000FF = 000000FFFFFFFFFF -+iihf 0000000080000000 <- 00000000000000FF = 000000FF80000000 -+iihf 000000007FFFFFFF <- 00000000000000FF = 000000FF7FFFFFFF -+iihf AAAAAAAAAAAAAAAA <- 00000000000000FF = 000000FFAAAAAAAA -+iihf 8000000000000000 <- 00000000000000FF = 000000FF00000000 -+iihf FFFFFFFFFFFFFFFF <- 00000000000000FF = 000000FFFFFFFFFF -+iihf 5555555555555555 <- 00000000000000FF = 000000FF55555555 -+iihf 0000000000000000 <- 0000000000000055 = 0000005500000000 -+iihf 0000000000000001 <- 0000000000000055 = 0000005500000001 -+iihf 000000000000FFFF <- 0000000000000055 = 000000550000FFFF -+iihf 0000000000007FFF <- 0000000000000055 = 0000005500007FFF -+iihf 0000000000008000 <- 0000000000000055 = 0000005500008000 -+iihf 00000000FFFFFFFF <- 0000000000000055 = 00000055FFFFFFFF -+iihf 0000000080000000 <- 0000000000000055 = 0000005580000000 -+iihf 000000007FFFFFFF <- 0000000000000055 = 000000557FFFFFFF -+iihf AAAAAAAAAAAAAAAA <- 0000000000000055 = 00000055AAAAAAAA -+iihf 8000000000000000 <- 0000000000000055 = 0000005500000000 -+iihf FFFFFFFFFFFFFFFF <- 0000000000000055 = 00000055FFFFFFFF -+iihf 5555555555555555 <- 0000000000000055 = 0000005555555555 -+iihf 0000000000000000 <- 00000000000000AA = 000000AA00000000 -+iihf 0000000000000001 <- 00000000000000AA = 000000AA00000001 -+iihf 000000000000FFFF <- 00000000000000AA = 000000AA0000FFFF -+iihf 0000000000007FFF <- 00000000000000AA = 000000AA00007FFF -+iihf 0000000000008000 <- 00000000000000AA = 000000AA00008000 -+iihf 00000000FFFFFFFF <- 00000000000000AA = 000000AAFFFFFFFF -+iihf 0000000080000000 <- 00000000000000AA = 000000AA80000000 -+iihf 000000007FFFFFFF <- 00000000000000AA = 000000AA7FFFFFFF -+iihf AAAAAAAAAAAAAAAA <- 00000000000000AA = 000000AAAAAAAAAA -+iihf 8000000000000000 <- 00000000000000AA = 000000AA00000000 -+iihf FFFFFFFFFFFFFFFF <- 00000000000000AA = 000000AAFFFFFFFF -+iihf 5555555555555555 <- 00000000000000AA = 000000AA55555555 -+iihf 0000000000000000 <- 000000000000FFFF = 0000FFFF00000000 -+iihf 0000000000000001 <- 000000000000FFFF = 0000FFFF00000001 -+iihf 000000000000FFFF <- 000000000000FFFF = 0000FFFF0000FFFF -+iihf 0000000000007FFF <- 000000000000FFFF = 0000FFFF00007FFF -+iihf 0000000000008000 <- 000000000000FFFF = 0000FFFF00008000 -+iihf 00000000FFFFFFFF <- 000000000000FFFF = 0000FFFFFFFFFFFF -+iihf 0000000080000000 <- 000000000000FFFF = 0000FFFF80000000 -+iihf 000000007FFFFFFF <- 000000000000FFFF = 0000FFFF7FFFFFFF -+iihf AAAAAAAAAAAAAAAA <- 000000000000FFFF = 0000FFFFAAAAAAAA -+iihf 8000000000000000 <- 000000000000FFFF = 0000FFFF00000000 -+iihf FFFFFFFFFFFFFFFF <- 000000000000FFFF = 0000FFFFFFFFFFFF -+iihf 5555555555555555 <- 000000000000FFFF = 0000FFFF55555555 -+iihf 0000000000000000 <- 0000000000005555 = 0000555500000000 -+iihf 0000000000000001 <- 0000000000005555 = 0000555500000001 -+iihf 000000000000FFFF <- 0000000000005555 = 000055550000FFFF -+iihf 0000000000007FFF <- 0000000000005555 = 0000555500007FFF -+iihf 0000000000008000 <- 0000000000005555 = 0000555500008000 -+iihf 00000000FFFFFFFF <- 0000000000005555 = 00005555FFFFFFFF -+iihf 0000000080000000 <- 0000000000005555 = 0000555580000000 -+iihf 000000007FFFFFFF <- 0000000000005555 = 000055557FFFFFFF -+iihf AAAAAAAAAAAAAAAA <- 0000000000005555 = 00005555AAAAAAAA -+iihf 8000000000000000 <- 0000000000005555 = 0000555500000000 -+iihf FFFFFFFFFFFFFFFF <- 0000000000005555 = 00005555FFFFFFFF -+iihf 5555555555555555 <- 0000000000005555 = 0000555555555555 -+iihf 0000000000000000 <- 000000000000AAAA = 0000AAAA00000000 -+iihf 0000000000000001 <- 000000000000AAAA = 0000AAAA00000001 -+iihf 000000000000FFFF <- 000000000000AAAA = 0000AAAA0000FFFF -+iihf 0000000000007FFF <- 000000000000AAAA = 0000AAAA00007FFF -+iihf 0000000000008000 <- 000000000000AAAA = 0000AAAA00008000 -+iihf 00000000FFFFFFFF <- 000000000000AAAA = 0000AAAAFFFFFFFF -+iihf 0000000080000000 <- 000000000000AAAA = 0000AAAA80000000 -+iihf 000000007FFFFFFF <- 000000000000AAAA = 0000AAAA7FFFFFFF -+iihf AAAAAAAAAAAAAAAA <- 000000000000AAAA = 0000AAAAAAAAAAAA -+iihf 8000000000000000 <- 000000000000AAAA = 0000AAAA00000000 -+iihf FFFFFFFFFFFFFFFF <- 000000000000AAAA = 0000AAAAFFFFFFFF -+iihf 5555555555555555 <- 000000000000AAAA = 0000AAAA55555555 -+iihf 0000000000000000 <- 00000000FFFF0000 = FFFF000000000000 -+iihf 0000000000000001 <- 00000000FFFF0000 = FFFF000000000001 -+iihf 000000000000FFFF <- 00000000FFFF0000 = FFFF00000000FFFF -+iihf 0000000000007FFF <- 00000000FFFF0000 = FFFF000000007FFF -+iihf 0000000000008000 <- 00000000FFFF0000 = FFFF000000008000 -+iihf 00000000FFFFFFFF <- 00000000FFFF0000 = FFFF0000FFFFFFFF -+iihf 0000000080000000 <- 00000000FFFF0000 = FFFF000080000000 -+iihf 000000007FFFFFFF <- 00000000FFFF0000 = FFFF00007FFFFFFF -+iihf AAAAAAAAAAAAAAAA <- 00000000FFFF0000 = FFFF0000AAAAAAAA -+iihf 8000000000000000 <- 00000000FFFF0000 = FFFF000000000000 -+iihf FFFFFFFFFFFFFFFF <- 00000000FFFF0000 = FFFF0000FFFFFFFF -+iihf 5555555555555555 <- 00000000FFFF0000 = FFFF000055555555 -+iihf 0000000000000000 <- 0000000055550000 = 5555000000000000 -+iihf 0000000000000001 <- 0000000055550000 = 5555000000000001 -+iihf 000000000000FFFF <- 0000000055550000 = 555500000000FFFF -+iihf 0000000000007FFF <- 0000000055550000 = 5555000000007FFF -+iihf 0000000000008000 <- 0000000055550000 = 5555000000008000 -+iihf 00000000FFFFFFFF <- 0000000055550000 = 55550000FFFFFFFF -+iihf 0000000080000000 <- 0000000055550000 = 5555000080000000 -+iihf 000000007FFFFFFF <- 0000000055550000 = 555500007FFFFFFF -+iihf AAAAAAAAAAAAAAAA <- 0000000055550000 = 55550000AAAAAAAA -+iihf 8000000000000000 <- 0000000055550000 = 5555000000000000 -+iihf FFFFFFFFFFFFFFFF <- 0000000055550000 = 55550000FFFFFFFF -+iihf 5555555555555555 <- 0000000055550000 = 5555000055555555 -+iihf 0000000000000000 <- 00000000AAAA0000 = AAAA000000000000 -+iihf 0000000000000001 <- 00000000AAAA0000 = AAAA000000000001 -+iihf 000000000000FFFF <- 00000000AAAA0000 = AAAA00000000FFFF -+iihf 0000000000007FFF <- 00000000AAAA0000 = AAAA000000007FFF -+iihf 0000000000008000 <- 00000000AAAA0000 = AAAA000000008000 -+iihf 00000000FFFFFFFF <- 00000000AAAA0000 = AAAA0000FFFFFFFF -+iihf 0000000080000000 <- 00000000AAAA0000 = AAAA000080000000 -+iihf 000000007FFFFFFF <- 00000000AAAA0000 = AAAA00007FFFFFFF -+iihf AAAAAAAAAAAAAAAA <- 00000000AAAA0000 = AAAA0000AAAAAAAA -+iihf 8000000000000000 <- 00000000AAAA0000 = AAAA000000000000 -+iihf FFFFFFFFFFFFFFFF <- 00000000AAAA0000 = AAAA0000FFFFFFFF -+iihf 5555555555555555 <- 00000000AAAA0000 = AAAA000055555555 -+iihf 0000000000000000 <- 00000000FFFFFFFF = FFFFFFFF00000000 -+iihf 0000000000000001 <- 00000000FFFFFFFF = FFFFFFFF00000001 -+iihf 000000000000FFFF <- 00000000FFFFFFFF = FFFFFFFF0000FFFF -+iihf 0000000000007FFF <- 00000000FFFFFFFF = FFFFFFFF00007FFF -+iihf 0000000000008000 <- 00000000FFFFFFFF = FFFFFFFF00008000 -+iihf 00000000FFFFFFFF <- 00000000FFFFFFFF = FFFFFFFFFFFFFFFF -+iihf 0000000080000000 <- 00000000FFFFFFFF = FFFFFFFF80000000 -+iihf 000000007FFFFFFF <- 00000000FFFFFFFF = FFFFFFFF7FFFFFFF -+iihf AAAAAAAAAAAAAAAA <- 00000000FFFFFFFF = FFFFFFFFAAAAAAAA -+iihf 8000000000000000 <- 00000000FFFFFFFF = FFFFFFFF00000000 -+iihf FFFFFFFFFFFFFFFF <- 00000000FFFFFFFF = FFFFFFFFFFFFFFFF -+iihf 5555555555555555 <- 00000000FFFFFFFF = FFFFFFFF55555555 -+iihf 0000000000000000 <- 0000000055555555 = 5555555500000000 -+iihf 0000000000000001 <- 0000000055555555 = 5555555500000001 -+iihf 000000000000FFFF <- 0000000055555555 = 555555550000FFFF -+iihf 0000000000007FFF <- 0000000055555555 = 5555555500007FFF -+iihf 0000000000008000 <- 0000000055555555 = 5555555500008000 -+iihf 00000000FFFFFFFF <- 0000000055555555 = 55555555FFFFFFFF -+iihf 0000000080000000 <- 0000000055555555 = 5555555580000000 -+iihf 000000007FFFFFFF <- 0000000055555555 = 555555557FFFFFFF -+iihf AAAAAAAAAAAAAAAA <- 0000000055555555 = 55555555AAAAAAAA -+iihf 8000000000000000 <- 0000000055555555 = 5555555500000000 -+iihf FFFFFFFFFFFFFFFF <- 0000000055555555 = 55555555FFFFFFFF -+iihf 5555555555555555 <- 0000000055555555 = 5555555555555555 -+iihf 0000000000000000 <- 00000000AAAAAAAA = AAAAAAAA00000000 -+iihf 0000000000000001 <- 00000000AAAAAAAA = AAAAAAAA00000001 -+iihf 000000000000FFFF <- 00000000AAAAAAAA = AAAAAAAA0000FFFF -+iihf 0000000000007FFF <- 00000000AAAAAAAA = AAAAAAAA00007FFF -+iihf 0000000000008000 <- 00000000AAAAAAAA = AAAAAAAA00008000 -+iihf 00000000FFFFFFFF <- 00000000AAAAAAAA = AAAAAAAAFFFFFFFF -+iihf 0000000080000000 <- 00000000AAAAAAAA = AAAAAAAA80000000 -+iihf 000000007FFFFFFF <- 00000000AAAAAAAA = AAAAAAAA7FFFFFFF -+iihf AAAAAAAAAAAAAAAA <- 00000000AAAAAAAA = AAAAAAAAAAAAAAAA -+iihf 8000000000000000 <- 00000000AAAAAAAA = AAAAAAAA00000000 -+iihf FFFFFFFFFFFFFFFF <- 00000000AAAAAAAA = AAAAAAAAFFFFFFFF -+iihf 5555555555555555 <- 00000000AAAAAAAA = AAAAAAAA55555555 -+iilf 0000000000000000 <- 0000000000000000 = 0000000000000000 -+iilf 0000000000000001 <- 0000000000000000 = 0000000000000000 -+iilf 000000000000FFFF <- 0000000000000000 = 0000000000000000 -+iilf 0000000000007FFF <- 0000000000000000 = 0000000000000000 -+iilf 0000000000008000 <- 0000000000000000 = 0000000000000000 -+iilf 00000000FFFFFFFF <- 0000000000000000 = 0000000000000000 -+iilf 0000000080000000 <- 0000000000000000 = 0000000000000000 -+iilf 000000007FFFFFFF <- 0000000000000000 = 0000000000000000 -+iilf AAAAAAAAAAAAAAAA <- 0000000000000000 = AAAAAAAA00000000 -+iilf 8000000000000000 <- 0000000000000000 = 8000000000000000 -+iilf FFFFFFFFFFFFFFFF <- 0000000000000000 = FFFFFFFF00000000 -+iilf 5555555555555555 <- 0000000000000000 = 5555555500000000 -+iilf 0000000000000000 <- 00000000000000FF = 00000000000000FF -+iilf 0000000000000001 <- 00000000000000FF = 00000000000000FF -+iilf 000000000000FFFF <- 00000000000000FF = 00000000000000FF -+iilf 0000000000007FFF <- 00000000000000FF = 00000000000000FF -+iilf 0000000000008000 <- 00000000000000FF = 00000000000000FF -+iilf 00000000FFFFFFFF <- 00000000000000FF = 00000000000000FF -+iilf 0000000080000000 <- 00000000000000FF = 00000000000000FF -+iilf 000000007FFFFFFF <- 00000000000000FF = 00000000000000FF -+iilf AAAAAAAAAAAAAAAA <- 00000000000000FF = AAAAAAAA000000FF -+iilf 8000000000000000 <- 00000000000000FF = 80000000000000FF -+iilf FFFFFFFFFFFFFFFF <- 00000000000000FF = FFFFFFFF000000FF -+iilf 5555555555555555 <- 00000000000000FF = 55555555000000FF -+iilf 0000000000000000 <- 0000000000000055 = 0000000000000055 -+iilf 0000000000000001 <- 0000000000000055 = 0000000000000055 -+iilf 000000000000FFFF <- 0000000000000055 = 0000000000000055 -+iilf 0000000000007FFF <- 0000000000000055 = 0000000000000055 -+iilf 0000000000008000 <- 0000000000000055 = 0000000000000055 -+iilf 00000000FFFFFFFF <- 0000000000000055 = 0000000000000055 -+iilf 0000000080000000 <- 0000000000000055 = 0000000000000055 -+iilf 000000007FFFFFFF <- 0000000000000055 = 0000000000000055 -+iilf AAAAAAAAAAAAAAAA <- 0000000000000055 = AAAAAAAA00000055 -+iilf 8000000000000000 <- 0000000000000055 = 8000000000000055 -+iilf FFFFFFFFFFFFFFFF <- 0000000000000055 = FFFFFFFF00000055 -+iilf 5555555555555555 <- 0000000000000055 = 5555555500000055 -+iilf 0000000000000000 <- 00000000000000AA = 00000000000000AA -+iilf 0000000000000001 <- 00000000000000AA = 00000000000000AA -+iilf 000000000000FFFF <- 00000000000000AA = 00000000000000AA -+iilf 0000000000007FFF <- 00000000000000AA = 00000000000000AA -+iilf 0000000000008000 <- 00000000000000AA = 00000000000000AA -+iilf 00000000FFFFFFFF <- 00000000000000AA = 00000000000000AA -+iilf 0000000080000000 <- 00000000000000AA = 00000000000000AA -+iilf 000000007FFFFFFF <- 00000000000000AA = 00000000000000AA -+iilf AAAAAAAAAAAAAAAA <- 00000000000000AA = AAAAAAAA000000AA -+iilf 8000000000000000 <- 00000000000000AA = 80000000000000AA -+iilf FFFFFFFFFFFFFFFF <- 00000000000000AA = FFFFFFFF000000AA -+iilf 5555555555555555 <- 00000000000000AA = 55555555000000AA -+iilf 0000000000000000 <- 000000000000FFFF = 000000000000FFFF -+iilf 0000000000000001 <- 000000000000FFFF = 000000000000FFFF -+iilf 000000000000FFFF <- 000000000000FFFF = 000000000000FFFF -+iilf 0000000000007FFF <- 000000000000FFFF = 000000000000FFFF -+iilf 0000000000008000 <- 000000000000FFFF = 000000000000FFFF -+iilf 00000000FFFFFFFF <- 000000000000FFFF = 000000000000FFFF -+iilf 0000000080000000 <- 000000000000FFFF = 000000000000FFFF -+iilf 000000007FFFFFFF <- 000000000000FFFF = 000000000000FFFF -+iilf AAAAAAAAAAAAAAAA <- 000000000000FFFF = AAAAAAAA0000FFFF -+iilf 8000000000000000 <- 000000000000FFFF = 800000000000FFFF -+iilf FFFFFFFFFFFFFFFF <- 000000000000FFFF = FFFFFFFF0000FFFF -+iilf 5555555555555555 <- 000000000000FFFF = 555555550000FFFF -+iilf 0000000000000000 <- 0000000000005555 = 0000000000005555 -+iilf 0000000000000001 <- 0000000000005555 = 0000000000005555 -+iilf 000000000000FFFF <- 0000000000005555 = 0000000000005555 -+iilf 0000000000007FFF <- 0000000000005555 = 0000000000005555 -+iilf 0000000000008000 <- 0000000000005555 = 0000000000005555 -+iilf 00000000FFFFFFFF <- 0000000000005555 = 0000000000005555 -+iilf 0000000080000000 <- 0000000000005555 = 0000000000005555 -+iilf 000000007FFFFFFF <- 0000000000005555 = 0000000000005555 -+iilf AAAAAAAAAAAAAAAA <- 0000000000005555 = AAAAAAAA00005555 -+iilf 8000000000000000 <- 0000000000005555 = 8000000000005555 -+iilf FFFFFFFFFFFFFFFF <- 0000000000005555 = FFFFFFFF00005555 -+iilf 5555555555555555 <- 0000000000005555 = 5555555500005555 -+iilf 0000000000000000 <- 000000000000AAAA = 000000000000AAAA -+iilf 0000000000000001 <- 000000000000AAAA = 000000000000AAAA -+iilf 000000000000FFFF <- 000000000000AAAA = 000000000000AAAA -+iilf 0000000000007FFF <- 000000000000AAAA = 000000000000AAAA -+iilf 0000000000008000 <- 000000000000AAAA = 000000000000AAAA -+iilf 00000000FFFFFFFF <- 000000000000AAAA = 000000000000AAAA -+iilf 0000000080000000 <- 000000000000AAAA = 000000000000AAAA -+iilf 000000007FFFFFFF <- 000000000000AAAA = 000000000000AAAA -+iilf AAAAAAAAAAAAAAAA <- 000000000000AAAA = AAAAAAAA0000AAAA -+iilf 8000000000000000 <- 000000000000AAAA = 800000000000AAAA -+iilf FFFFFFFFFFFFFFFF <- 000000000000AAAA = FFFFFFFF0000AAAA -+iilf 5555555555555555 <- 000000000000AAAA = 555555550000AAAA -+iilf 0000000000000000 <- 00000000FFFF0000 = 00000000FFFF0000 -+iilf 0000000000000001 <- 00000000FFFF0000 = 00000000FFFF0000 -+iilf 000000000000FFFF <- 00000000FFFF0000 = 00000000FFFF0000 -+iilf 0000000000007FFF <- 00000000FFFF0000 = 00000000FFFF0000 -+iilf 0000000000008000 <- 00000000FFFF0000 = 00000000FFFF0000 -+iilf 00000000FFFFFFFF <- 00000000FFFF0000 = 00000000FFFF0000 -+iilf 0000000080000000 <- 00000000FFFF0000 = 00000000FFFF0000 -+iilf 000000007FFFFFFF <- 00000000FFFF0000 = 00000000FFFF0000 -+iilf AAAAAAAAAAAAAAAA <- 00000000FFFF0000 = AAAAAAAAFFFF0000 -+iilf 8000000000000000 <- 00000000FFFF0000 = 80000000FFFF0000 -+iilf FFFFFFFFFFFFFFFF <- 00000000FFFF0000 = FFFFFFFFFFFF0000 -+iilf 5555555555555555 <- 00000000FFFF0000 = 55555555FFFF0000 -+iilf 0000000000000000 <- 0000000055550000 = 0000000055550000 -+iilf 0000000000000001 <- 0000000055550000 = 0000000055550000 -+iilf 000000000000FFFF <- 0000000055550000 = 0000000055550000 -+iilf 0000000000007FFF <- 0000000055550000 = 0000000055550000 -+iilf 0000000000008000 <- 0000000055550000 = 0000000055550000 -+iilf 00000000FFFFFFFF <- 0000000055550000 = 0000000055550000 -+iilf 0000000080000000 <- 0000000055550000 = 0000000055550000 -+iilf 000000007FFFFFFF <- 0000000055550000 = 0000000055550000 -+iilf AAAAAAAAAAAAAAAA <- 0000000055550000 = AAAAAAAA55550000 -+iilf 8000000000000000 <- 0000000055550000 = 8000000055550000 -+iilf FFFFFFFFFFFFFFFF <- 0000000055550000 = FFFFFFFF55550000 -+iilf 5555555555555555 <- 0000000055550000 = 5555555555550000 -+iilf 0000000000000000 <- 00000000AAAA0000 = 00000000AAAA0000 -+iilf 0000000000000001 <- 00000000AAAA0000 = 00000000AAAA0000 -+iilf 000000000000FFFF <- 00000000AAAA0000 = 00000000AAAA0000 -+iilf 0000000000007FFF <- 00000000AAAA0000 = 00000000AAAA0000 -+iilf 0000000000008000 <- 00000000AAAA0000 = 00000000AAAA0000 -+iilf 00000000FFFFFFFF <- 00000000AAAA0000 = 00000000AAAA0000 -+iilf 0000000080000000 <- 00000000AAAA0000 = 00000000AAAA0000 -+iilf 000000007FFFFFFF <- 00000000AAAA0000 = 00000000AAAA0000 -+iilf AAAAAAAAAAAAAAAA <- 00000000AAAA0000 = AAAAAAAAAAAA0000 -+iilf 8000000000000000 <- 00000000AAAA0000 = 80000000AAAA0000 -+iilf FFFFFFFFFFFFFFFF <- 00000000AAAA0000 = FFFFFFFFAAAA0000 -+iilf 5555555555555555 <- 00000000AAAA0000 = 55555555AAAA0000 -+iilf 0000000000000000 <- 00000000FFFFFFFF = 00000000FFFFFFFF -+iilf 0000000000000001 <- 00000000FFFFFFFF = 00000000FFFFFFFF -+iilf 000000000000FFFF <- 00000000FFFFFFFF = 00000000FFFFFFFF -+iilf 0000000000007FFF <- 00000000FFFFFFFF = 00000000FFFFFFFF -+iilf 0000000000008000 <- 00000000FFFFFFFF = 00000000FFFFFFFF -+iilf 00000000FFFFFFFF <- 00000000FFFFFFFF = 00000000FFFFFFFF -+iilf 0000000080000000 <- 00000000FFFFFFFF = 00000000FFFFFFFF -+iilf 000000007FFFFFFF <- 00000000FFFFFFFF = 00000000FFFFFFFF -+iilf AAAAAAAAAAAAAAAA <- 00000000FFFFFFFF = AAAAAAAAFFFFFFFF -+iilf 8000000000000000 <- 00000000FFFFFFFF = 80000000FFFFFFFF -+iilf FFFFFFFFFFFFFFFF <- 00000000FFFFFFFF = FFFFFFFFFFFFFFFF -+iilf 5555555555555555 <- 00000000FFFFFFFF = 55555555FFFFFFFF -+iilf 0000000000000000 <- 0000000055555555 = 0000000055555555 -+iilf 0000000000000001 <- 0000000055555555 = 0000000055555555 -+iilf 000000000000FFFF <- 0000000055555555 = 0000000055555555 -+iilf 0000000000007FFF <- 0000000055555555 = 0000000055555555 -+iilf 0000000000008000 <- 0000000055555555 = 0000000055555555 -+iilf 00000000FFFFFFFF <- 0000000055555555 = 0000000055555555 -+iilf 0000000080000000 <- 0000000055555555 = 0000000055555555 -+iilf 000000007FFFFFFF <- 0000000055555555 = 0000000055555555 -+iilf AAAAAAAAAAAAAAAA <- 0000000055555555 = AAAAAAAA55555555 -+iilf 8000000000000000 <- 0000000055555555 = 8000000055555555 -+iilf FFFFFFFFFFFFFFFF <- 0000000055555555 = FFFFFFFF55555555 -+iilf 5555555555555555 <- 0000000055555555 = 5555555555555555 -+iilf 0000000000000000 <- 00000000AAAAAAAA = 00000000AAAAAAAA -+iilf 0000000000000001 <- 00000000AAAAAAAA = 00000000AAAAAAAA -+iilf 000000000000FFFF <- 00000000AAAAAAAA = 00000000AAAAAAAA -+iilf 0000000000007FFF <- 00000000AAAAAAAA = 00000000AAAAAAAA -+iilf 0000000000008000 <- 00000000AAAAAAAA = 00000000AAAAAAAA -+iilf 00000000FFFFFFFF <- 00000000AAAAAAAA = 00000000AAAAAAAA -+iilf 0000000080000000 <- 00000000AAAAAAAA = 00000000AAAAAAAA -+iilf 000000007FFFFFFF <- 00000000AAAAAAAA = 00000000AAAAAAAA -+iilf AAAAAAAAAAAAAAAA <- 00000000AAAAAAAA = AAAAAAAAAAAAAAAA -+iilf 8000000000000000 <- 00000000AAAAAAAA = 80000000AAAAAAAA -+iilf FFFFFFFFFFFFFFFF <- 00000000AAAAAAAA = FFFFFFFFAAAAAAAA -+iilf 5555555555555555 <- 00000000AAAAAAAA = 55555555AAAAAAAA ---- none/tests/s390x/insert_EI.vgtest -+++ none/tests/s390x/insert_EI.vgtest -@@ -0,0 +1,2 @@ -+prog: insert_EI -+prereq: test -x insert_EI ---- none/tests/s390x/insert.h -+++ none/tests/s390x/insert.h -@@ -0,0 +1,62 @@ -+#include -+ -+#define INSERT_REG_MEM(insn, s1, s2) \ -+({ \ -+ unsigned long tmp = s1; \ -+ int cc; \ -+ asm volatile( #insn " %0, %3\n" \ -+ "ipm %1\n" \ -+ "srl %1,28\n" \ -+ : "+d" (tmp), "=d" (cc) \ -+ : "d" (tmp), "Q" (s2) \ -+ : "0", "cc"); \ -+ printf(#insn " %16.16lX <- %16.16lX = %16.16lX\n", s1, s2, tmp); \ -+}) -+ -+#define INSERT_REG_IMM(insn, s1, s2) \ -+({ \ -+ unsigned long tmp = s1; \ -+ int cc; \ -+ asm volatile( #insn " %0," #s2 "\n" \ -+ "ipm %1\n" \ -+ "srl %1,28\n" \ -+ : "+d" (tmp), "=d" (cc) \ -+ : "d" (tmp) \ -+ : "0", "cc"); \ -+ printf(#insn " %16.16lX <- %16.16lX = %16.16lX\n", s1, (unsigned long) s2, tmp); \ -+}) -+ -+ -+#define memsweep(i, s2) \ -+({ \ -+ INSERT_REG_MEM(i, 0ul, s2); \ -+ INSERT_REG_MEM(i, 1ul, s2); \ -+ INSERT_REG_MEM(i, 0xfffful, s2); \ -+ INSERT_REG_MEM(i, 0x7ffful, s2); \ -+ INSERT_REG_MEM(i, 0x8000ul, s2); \ -+ INSERT_REG_MEM(i, 0xfffffffful, s2); \ -+ INSERT_REG_MEM(i, 0x80000000ul, s2); \ -+ INSERT_REG_MEM(i, 0x7ffffffful, s2); \ -+ INSERT_REG_MEM(i, 0xaaaaaaaaaaaaaaaaul, s2); \ -+ INSERT_REG_MEM(i, 0x8000000000000000ul, s2); \ -+ INSERT_REG_MEM(i, 0xfffffffffffffffful, s2); \ -+ INSERT_REG_MEM(i, 0x5555555555555555ul, s2); \ -+}) -+ -+#define immsweep(i, s2) \ -+({ \ -+ INSERT_REG_IMM(i, 0ul, s2); \ -+ INSERT_REG_IMM(i, 1ul, s2); \ -+ INSERT_REG_IMM(i, 0xfffful, s2); \ -+ INSERT_REG_IMM(i, 0x7ffful, s2); \ -+ INSERT_REG_IMM(i, 0x8000ul, s2); \ -+ INSERT_REG_IMM(i, 0xfffffffful, s2); \ -+ INSERT_REG_IMM(i, 0x80000000ul, s2); \ -+ INSERT_REG_IMM(i, 0x7ffffffful, s2); \ -+ INSERT_REG_IMM(i, 0xaaaaaaaaaaaaaaaaul, s2); \ -+ INSERT_REG_IMM(i, 0x8000000000000000ul, s2); \ -+ INSERT_REG_IMM(i, 0xfffffffffffffffful, s2); \ -+ INSERT_REG_IMM(i, 0x5555555555555555ul, s2); \ -+}) -+ -+ ---- none/tests/s390x/insert.stderr.exp -+++ none/tests/s390x/insert.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/insert.stdout.exp -+++ none/tests/s390x/insert.stdout.exp -@@ -0,0 +1,744 @@ -+ic 0000000000000000 <- 0000000000000000 = 0000000000000000 -+ic 0000000000000001 <- 0000000000000000 = 0000000000000000 -+ic 000000000000FFFF <- 0000000000000000 = 000000000000FF00 -+ic 0000000000007FFF <- 0000000000000000 = 0000000000007F00 -+ic 0000000000008000 <- 0000000000000000 = 0000000000008000 -+ic 00000000FFFFFFFF <- 0000000000000000 = 00000000FFFFFF00 -+ic 0000000080000000 <- 0000000000000000 = 0000000080000000 -+ic 000000007FFFFFFF <- 0000000000000000 = 000000007FFFFF00 -+ic AAAAAAAAAAAAAAAA <- 0000000000000000 = AAAAAAAAAAAAAA00 -+ic 8000000000000000 <- 0000000000000000 = 8000000000000000 -+ic FFFFFFFFFFFFFFFF <- 0000000000000000 = FFFFFFFFFFFFFF00 -+ic 5555555555555555 <- 0000000000000000 = 5555555555555500 -+icy 0000000000000000 <- 0000000000000000 = 0000000000000000 -+icy 0000000000000001 <- 0000000000000000 = 0000000000000000 -+icy 000000000000FFFF <- 0000000000000000 = 000000000000FF00 -+icy 0000000000007FFF <- 0000000000000000 = 0000000000007F00 -+icy 0000000000008000 <- 0000000000000000 = 0000000000008000 -+icy 00000000FFFFFFFF <- 0000000000000000 = 00000000FFFFFF00 -+icy 0000000080000000 <- 0000000000000000 = 0000000080000000 -+icy 000000007FFFFFFF <- 0000000000000000 = 000000007FFFFF00 -+icy AAAAAAAAAAAAAAAA <- 0000000000000000 = AAAAAAAAAAAAAA00 -+icy 8000000000000000 <- 0000000000000000 = 8000000000000000 -+icy FFFFFFFFFFFFFFFF <- 0000000000000000 = FFFFFFFFFFFFFF00 -+icy 5555555555555555 <- 0000000000000000 = 5555555555555500 -+ic 0000000000000000 <- 5555555555555555 = 0000000000000055 -+ic 0000000000000001 <- 5555555555555555 = 0000000000000055 -+ic 000000000000FFFF <- 5555555555555555 = 000000000000FF55 -+ic 0000000000007FFF <- 5555555555555555 = 0000000000007F55 -+ic 0000000000008000 <- 5555555555555555 = 0000000000008055 -+ic 00000000FFFFFFFF <- 5555555555555555 = 00000000FFFFFF55 -+ic 0000000080000000 <- 5555555555555555 = 0000000080000055 -+ic 000000007FFFFFFF <- 5555555555555555 = 000000007FFFFF55 -+ic AAAAAAAAAAAAAAAA <- 5555555555555555 = AAAAAAAAAAAAAA55 -+ic 8000000000000000 <- 5555555555555555 = 8000000000000055 -+ic FFFFFFFFFFFFFFFF <- 5555555555555555 = FFFFFFFFFFFFFF55 -+ic 5555555555555555 <- 5555555555555555 = 5555555555555555 -+icy 0000000000000000 <- 5555555555555555 = 0000000000000055 -+icy 0000000000000001 <- 5555555555555555 = 0000000000000055 -+icy 000000000000FFFF <- 5555555555555555 = 000000000000FF55 -+icy 0000000000007FFF <- 5555555555555555 = 0000000000007F55 -+icy 0000000000008000 <- 5555555555555555 = 0000000000008055 -+icy 00000000FFFFFFFF <- 5555555555555555 = 00000000FFFFFF55 -+icy 0000000080000000 <- 5555555555555555 = 0000000080000055 -+icy 000000007FFFFFFF <- 5555555555555555 = 000000007FFFFF55 -+icy AAAAAAAAAAAAAAAA <- 5555555555555555 = AAAAAAAAAAAAAA55 -+icy 8000000000000000 <- 5555555555555555 = 8000000000000055 -+icy FFFFFFFFFFFFFFFF <- 5555555555555555 = FFFFFFFFFFFFFF55 -+icy 5555555555555555 <- 5555555555555555 = 5555555555555555 -+ic 0000000000000000 <- AAAAAAAAAAAAAAAA = 00000000000000AA -+ic 0000000000000001 <- AAAAAAAAAAAAAAAA = 00000000000000AA -+ic 000000000000FFFF <- AAAAAAAAAAAAAAAA = 000000000000FFAA -+ic 0000000000007FFF <- AAAAAAAAAAAAAAAA = 0000000000007FAA -+ic 0000000000008000 <- AAAAAAAAAAAAAAAA = 00000000000080AA -+ic 00000000FFFFFFFF <- AAAAAAAAAAAAAAAA = 00000000FFFFFFAA -+ic 0000000080000000 <- AAAAAAAAAAAAAAAA = 00000000800000AA -+ic 000000007FFFFFFF <- AAAAAAAAAAAAAAAA = 000000007FFFFFAA -+ic AAAAAAAAAAAAAAAA <- AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAA -+ic 8000000000000000 <- AAAAAAAAAAAAAAAA = 80000000000000AA -+ic FFFFFFFFFFFFFFFF <- AAAAAAAAAAAAAAAA = FFFFFFFFFFFFFFAA -+ic 5555555555555555 <- AAAAAAAAAAAAAAAA = 55555555555555AA -+icy 0000000000000000 <- AAAAAAAAAAAAAAAA = 00000000000000AA -+icy 0000000000000001 <- AAAAAAAAAAAAAAAA = 00000000000000AA -+icy 000000000000FFFF <- AAAAAAAAAAAAAAAA = 000000000000FFAA -+icy 0000000000007FFF <- AAAAAAAAAAAAAAAA = 0000000000007FAA -+icy 0000000000008000 <- AAAAAAAAAAAAAAAA = 00000000000080AA -+icy 00000000FFFFFFFF <- AAAAAAAAAAAAAAAA = 00000000FFFFFFAA -+icy 0000000080000000 <- AAAAAAAAAAAAAAAA = 00000000800000AA -+icy 000000007FFFFFFF <- AAAAAAAAAAAAAAAA = 000000007FFFFFAA -+icy AAAAAAAAAAAAAAAA <- AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAA -+icy 8000000000000000 <- AAAAAAAAAAAAAAAA = 80000000000000AA -+icy FFFFFFFFFFFFFFFF <- AAAAAAAAAAAAAAAA = FFFFFFFFFFFFFFAA -+icy 5555555555555555 <- AAAAAAAAAAAAAAAA = 55555555555555AA -+ic 0000000000000000 <- 8000000000000000 = 0000000000000080 -+ic 0000000000000001 <- 8000000000000000 = 0000000000000080 -+ic 000000000000FFFF <- 8000000000000000 = 000000000000FF80 -+ic 0000000000007FFF <- 8000000000000000 = 0000000000007F80 -+ic 0000000000008000 <- 8000000000000000 = 0000000000008080 -+ic 00000000FFFFFFFF <- 8000000000000000 = 00000000FFFFFF80 -+ic 0000000080000000 <- 8000000000000000 = 0000000080000080 -+ic 000000007FFFFFFF <- 8000000000000000 = 000000007FFFFF80 -+ic AAAAAAAAAAAAAAAA <- 8000000000000000 = AAAAAAAAAAAAAA80 -+ic 8000000000000000 <- 8000000000000000 = 8000000000000080 -+ic FFFFFFFFFFFFFFFF <- 8000000000000000 = FFFFFFFFFFFFFF80 -+ic 5555555555555555 <- 8000000000000000 = 5555555555555580 -+icy 0000000000000000 <- 8000000000000000 = 0000000000000080 -+icy 0000000000000001 <- 8000000000000000 = 0000000000000080 -+icy 000000000000FFFF <- 8000000000000000 = 000000000000FF80 -+icy 0000000000007FFF <- 8000000000000000 = 0000000000007F80 -+icy 0000000000008000 <- 8000000000000000 = 0000000000008080 -+icy 00000000FFFFFFFF <- 8000000000000000 = 00000000FFFFFF80 -+icy 0000000080000000 <- 8000000000000000 = 0000000080000080 -+icy 000000007FFFFFFF <- 8000000000000000 = 000000007FFFFF80 -+icy AAAAAAAAAAAAAAAA <- 8000000000000000 = AAAAAAAAAAAAAA80 -+icy 8000000000000000 <- 8000000000000000 = 8000000000000080 -+icy FFFFFFFFFFFFFFFF <- 8000000000000000 = FFFFFFFFFFFFFF80 -+icy 5555555555555555 <- 8000000000000000 = 5555555555555580 -+ic 0000000000000000 <- FFFFFFFFFFFFFFFF = 00000000000000FF -+ic 0000000000000001 <- FFFFFFFFFFFFFFFF = 00000000000000FF -+ic 000000000000FFFF <- FFFFFFFFFFFFFFFF = 000000000000FFFF -+ic 0000000000007FFF <- FFFFFFFFFFFFFFFF = 0000000000007FFF -+ic 0000000000008000 <- FFFFFFFFFFFFFFFF = 00000000000080FF -+ic 00000000FFFFFFFF <- FFFFFFFFFFFFFFFF = 00000000FFFFFFFF -+ic 0000000080000000 <- FFFFFFFFFFFFFFFF = 00000000800000FF -+ic 000000007FFFFFFF <- FFFFFFFFFFFFFFFF = 000000007FFFFFFF -+ic AAAAAAAAAAAAAAAA <- FFFFFFFFFFFFFFFF = AAAAAAAAAAAAAAFF -+ic 8000000000000000 <- FFFFFFFFFFFFFFFF = 80000000000000FF -+ic FFFFFFFFFFFFFFFF <- FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF -+ic 5555555555555555 <- FFFFFFFFFFFFFFFF = 55555555555555FF -+icy 0000000000000000 <- FFFFFFFFFFFFFFFF = 00000000000000FF -+icy 0000000000000001 <- FFFFFFFFFFFFFFFF = 00000000000000FF -+icy 000000000000FFFF <- FFFFFFFFFFFFFFFF = 000000000000FFFF -+icy 0000000000007FFF <- FFFFFFFFFFFFFFFF = 0000000000007FFF -+icy 0000000000008000 <- FFFFFFFFFFFFFFFF = 00000000000080FF -+icy 00000000FFFFFFFF <- FFFFFFFFFFFFFFFF = 00000000FFFFFFFF -+icy 0000000080000000 <- FFFFFFFFFFFFFFFF = 00000000800000FF -+icy 000000007FFFFFFF <- FFFFFFFFFFFFFFFF = 000000007FFFFFFF -+icy AAAAAAAAAAAAAAAA <- FFFFFFFFFFFFFFFF = AAAAAAAAAAAAAAFF -+icy 8000000000000000 <- FFFFFFFFFFFFFFFF = 80000000000000FF -+icy FFFFFFFFFFFFFFFF <- FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF -+icy 5555555555555555 <- FFFFFFFFFFFFFFFF = 55555555555555FF -+ic 0000000000000000 <- 7FFFFFFF00000000 = 000000000000007F -+ic 0000000000000001 <- 7FFFFFFF00000000 = 000000000000007F -+ic 000000000000FFFF <- 7FFFFFFF00000000 = 000000000000FF7F -+ic 0000000000007FFF <- 7FFFFFFF00000000 = 0000000000007F7F -+ic 0000000000008000 <- 7FFFFFFF00000000 = 000000000000807F -+ic 00000000FFFFFFFF <- 7FFFFFFF00000000 = 00000000FFFFFF7F -+ic 0000000080000000 <- 7FFFFFFF00000000 = 000000008000007F -+ic 000000007FFFFFFF <- 7FFFFFFF00000000 = 000000007FFFFF7F -+ic AAAAAAAAAAAAAAAA <- 7FFFFFFF00000000 = AAAAAAAAAAAAAA7F -+ic 8000000000000000 <- 7FFFFFFF00000000 = 800000000000007F -+ic FFFFFFFFFFFFFFFF <- 7FFFFFFF00000000 = FFFFFFFFFFFFFF7F -+ic 5555555555555555 <- 7FFFFFFF00000000 = 555555555555557F -+icy 0000000000000000 <- 7FFFFFFF00000000 = 000000000000007F -+icy 0000000000000001 <- 7FFFFFFF00000000 = 000000000000007F -+icy 000000000000FFFF <- 7FFFFFFF00000000 = 000000000000FF7F -+icy 0000000000007FFF <- 7FFFFFFF00000000 = 0000000000007F7F -+icy 0000000000008000 <- 7FFFFFFF00000000 = 000000000000807F -+icy 00000000FFFFFFFF <- 7FFFFFFF00000000 = 00000000FFFFFF7F -+icy 0000000080000000 <- 7FFFFFFF00000000 = 000000008000007F -+icy 000000007FFFFFFF <- 7FFFFFFF00000000 = 000000007FFFFF7F -+icy AAAAAAAAAAAAAAAA <- 7FFFFFFF00000000 = AAAAAAAAAAAAAA7F -+icy 8000000000000000 <- 7FFFFFFF00000000 = 800000000000007F -+icy FFFFFFFFFFFFFFFF <- 7FFFFFFF00000000 = FFFFFFFFFFFFFF7F -+icy 5555555555555555 <- 7FFFFFFF00000000 = 555555555555557F -+ic 0000000000000000 <- 8000000000000000 = 0000000000000080 -+ic 0000000000000001 <- 8000000000000000 = 0000000000000080 -+ic 000000000000FFFF <- 8000000000000000 = 000000000000FF80 -+ic 0000000000007FFF <- 8000000000000000 = 0000000000007F80 -+ic 0000000000008000 <- 8000000000000000 = 0000000000008080 -+ic 00000000FFFFFFFF <- 8000000000000000 = 00000000FFFFFF80 -+ic 0000000080000000 <- 8000000000000000 = 0000000080000080 -+ic 000000007FFFFFFF <- 8000000000000000 = 000000007FFFFF80 -+ic AAAAAAAAAAAAAAAA <- 8000000000000000 = AAAAAAAAAAAAAA80 -+ic 8000000000000000 <- 8000000000000000 = 8000000000000080 -+ic FFFFFFFFFFFFFFFF <- 8000000000000000 = FFFFFFFFFFFFFF80 -+ic 5555555555555555 <- 8000000000000000 = 5555555555555580 -+icy 0000000000000000 <- 8000000000000000 = 0000000000000080 -+icy 0000000000000001 <- 8000000000000000 = 0000000000000080 -+icy 000000000000FFFF <- 8000000000000000 = 000000000000FF80 -+icy 0000000000007FFF <- 8000000000000000 = 0000000000007F80 -+icy 0000000000008000 <- 8000000000000000 = 0000000000008080 -+icy 00000000FFFFFFFF <- 8000000000000000 = 00000000FFFFFF80 -+icy 0000000080000000 <- 8000000000000000 = 0000000080000080 -+icy 000000007FFFFFFF <- 8000000000000000 = 000000007FFFFF80 -+icy AAAAAAAAAAAAAAAA <- 8000000000000000 = AAAAAAAAAAAAAA80 -+icy 8000000000000000 <- 8000000000000000 = 8000000000000080 -+icy FFFFFFFFFFFFFFFF <- 8000000000000000 = FFFFFFFFFFFFFF80 -+icy 5555555555555555 <- 8000000000000000 = 5555555555555580 -+ic 0000000000000000 <- AAAAAAAA00000000 = 00000000000000AA -+ic 0000000000000001 <- AAAAAAAA00000000 = 00000000000000AA -+ic 000000000000FFFF <- AAAAAAAA00000000 = 000000000000FFAA -+ic 0000000000007FFF <- AAAAAAAA00000000 = 0000000000007FAA -+ic 0000000000008000 <- AAAAAAAA00000000 = 00000000000080AA -+ic 00000000FFFFFFFF <- AAAAAAAA00000000 = 00000000FFFFFFAA -+ic 0000000080000000 <- AAAAAAAA00000000 = 00000000800000AA -+ic 000000007FFFFFFF <- AAAAAAAA00000000 = 000000007FFFFFAA -+ic AAAAAAAAAAAAAAAA <- AAAAAAAA00000000 = AAAAAAAAAAAAAAAA -+ic 8000000000000000 <- AAAAAAAA00000000 = 80000000000000AA -+ic FFFFFFFFFFFFFFFF <- AAAAAAAA00000000 = FFFFFFFFFFFFFFAA -+ic 5555555555555555 <- AAAAAAAA00000000 = 55555555555555AA -+icy 0000000000000000 <- AAAAAAAA00000000 = 00000000000000AA -+icy 0000000000000001 <- AAAAAAAA00000000 = 00000000000000AA -+icy 000000000000FFFF <- AAAAAAAA00000000 = 000000000000FFAA -+icy 0000000000007FFF <- AAAAAAAA00000000 = 0000000000007FAA -+icy 0000000000008000 <- AAAAAAAA00000000 = 00000000000080AA -+icy 00000000FFFFFFFF <- AAAAAAAA00000000 = 00000000FFFFFFAA -+icy 0000000080000000 <- AAAAAAAA00000000 = 00000000800000AA -+icy 000000007FFFFFFF <- AAAAAAAA00000000 = 000000007FFFFFAA -+icy AAAAAAAAAAAAAAAA <- AAAAAAAA00000000 = AAAAAAAAAAAAAAAA -+icy 8000000000000000 <- AAAAAAAA00000000 = 80000000000000AA -+icy FFFFFFFFFFFFFFFF <- AAAAAAAA00000000 = FFFFFFFFFFFFFFAA -+icy 5555555555555555 <- AAAAAAAA00000000 = 55555555555555AA -+ic 0000000000000000 <- FFFFFFFF00000000 = 00000000000000FF -+ic 0000000000000001 <- FFFFFFFF00000000 = 00000000000000FF -+ic 000000000000FFFF <- FFFFFFFF00000000 = 000000000000FFFF -+ic 0000000000007FFF <- FFFFFFFF00000000 = 0000000000007FFF -+ic 0000000000008000 <- FFFFFFFF00000000 = 00000000000080FF -+ic 00000000FFFFFFFF <- FFFFFFFF00000000 = 00000000FFFFFFFF -+ic 0000000080000000 <- FFFFFFFF00000000 = 00000000800000FF -+ic 000000007FFFFFFF <- FFFFFFFF00000000 = 000000007FFFFFFF -+ic AAAAAAAAAAAAAAAA <- FFFFFFFF00000000 = AAAAAAAAAAAAAAFF -+ic 8000000000000000 <- FFFFFFFF00000000 = 80000000000000FF -+ic FFFFFFFFFFFFFFFF <- FFFFFFFF00000000 = FFFFFFFFFFFFFFFF -+ic 5555555555555555 <- FFFFFFFF00000000 = 55555555555555FF -+icy 0000000000000000 <- FFFFFFFF00000000 = 00000000000000FF -+icy 0000000000000001 <- FFFFFFFF00000000 = 00000000000000FF -+icy 000000000000FFFF <- FFFFFFFF00000000 = 000000000000FFFF -+icy 0000000000007FFF <- FFFFFFFF00000000 = 0000000000007FFF -+icy 0000000000008000 <- FFFFFFFF00000000 = 00000000000080FF -+icy 00000000FFFFFFFF <- FFFFFFFF00000000 = 00000000FFFFFFFF -+icy 0000000080000000 <- FFFFFFFF00000000 = 00000000800000FF -+icy 000000007FFFFFFF <- FFFFFFFF00000000 = 000000007FFFFFFF -+icy AAAAAAAAAAAAAAAA <- FFFFFFFF00000000 = AAAAAAAAAAAAAAFF -+icy 8000000000000000 <- FFFFFFFF00000000 = 80000000000000FF -+icy FFFFFFFFFFFFFFFF <- FFFFFFFF00000000 = FFFFFFFFFFFFFFFF -+icy 5555555555555555 <- FFFFFFFF00000000 = 55555555555555FF -+ic 0000000000000000 <- 000000007FFFFFFF = 0000000000000000 -+ic 0000000000000001 <- 000000007FFFFFFF = 0000000000000000 -+ic 000000000000FFFF <- 000000007FFFFFFF = 000000000000FF00 -+ic 0000000000007FFF <- 000000007FFFFFFF = 0000000000007F00 -+ic 0000000000008000 <- 000000007FFFFFFF = 0000000000008000 -+ic 00000000FFFFFFFF <- 000000007FFFFFFF = 00000000FFFFFF00 -+ic 0000000080000000 <- 000000007FFFFFFF = 0000000080000000 -+ic 000000007FFFFFFF <- 000000007FFFFFFF = 000000007FFFFF00 -+ic AAAAAAAAAAAAAAAA <- 000000007FFFFFFF = AAAAAAAAAAAAAA00 -+ic 8000000000000000 <- 000000007FFFFFFF = 8000000000000000 -+ic FFFFFFFFFFFFFFFF <- 000000007FFFFFFF = FFFFFFFFFFFFFF00 -+ic 5555555555555555 <- 000000007FFFFFFF = 5555555555555500 -+icy 0000000000000000 <- 000000007FFFFFFF = 0000000000000000 -+icy 0000000000000001 <- 000000007FFFFFFF = 0000000000000000 -+icy 000000000000FFFF <- 000000007FFFFFFF = 000000000000FF00 -+icy 0000000000007FFF <- 000000007FFFFFFF = 0000000000007F00 -+icy 0000000000008000 <- 000000007FFFFFFF = 0000000000008000 -+icy 00000000FFFFFFFF <- 000000007FFFFFFF = 00000000FFFFFF00 -+icy 0000000080000000 <- 000000007FFFFFFF = 0000000080000000 -+icy 000000007FFFFFFF <- 000000007FFFFFFF = 000000007FFFFF00 -+icy AAAAAAAAAAAAAAAA <- 000000007FFFFFFF = AAAAAAAAAAAAAA00 -+icy 8000000000000000 <- 000000007FFFFFFF = 8000000000000000 -+icy FFFFFFFFFFFFFFFF <- 000000007FFFFFFF = FFFFFFFFFFFFFF00 -+icy 5555555555555555 <- 000000007FFFFFFF = 5555555555555500 -+ic 0000000000000000 <- 0000000080000000 = 0000000000000000 -+ic 0000000000000001 <- 0000000080000000 = 0000000000000000 -+ic 000000000000FFFF <- 0000000080000000 = 000000000000FF00 -+ic 0000000000007FFF <- 0000000080000000 = 0000000000007F00 -+ic 0000000000008000 <- 0000000080000000 = 0000000000008000 -+ic 00000000FFFFFFFF <- 0000000080000000 = 00000000FFFFFF00 -+ic 0000000080000000 <- 0000000080000000 = 0000000080000000 -+ic 000000007FFFFFFF <- 0000000080000000 = 000000007FFFFF00 -+ic AAAAAAAAAAAAAAAA <- 0000000080000000 = AAAAAAAAAAAAAA00 -+ic 8000000000000000 <- 0000000080000000 = 8000000000000000 -+ic FFFFFFFFFFFFFFFF <- 0000000080000000 = FFFFFFFFFFFFFF00 -+ic 5555555555555555 <- 0000000080000000 = 5555555555555500 -+icy 0000000000000000 <- 0000000080000000 = 0000000000000000 -+icy 0000000000000001 <- 0000000080000000 = 0000000000000000 -+icy 000000000000FFFF <- 0000000080000000 = 000000000000FF00 -+icy 0000000000007FFF <- 0000000080000000 = 0000000000007F00 -+icy 0000000000008000 <- 0000000080000000 = 0000000000008000 -+icy 00000000FFFFFFFF <- 0000000080000000 = 00000000FFFFFF00 -+icy 0000000080000000 <- 0000000080000000 = 0000000080000000 -+icy 000000007FFFFFFF <- 0000000080000000 = 000000007FFFFF00 -+icy AAAAAAAAAAAAAAAA <- 0000000080000000 = AAAAAAAAAAAAAA00 -+icy 8000000000000000 <- 0000000080000000 = 8000000000000000 -+icy FFFFFFFFFFFFFFFF <- 0000000080000000 = FFFFFFFFFFFFFF00 -+icy 5555555555555555 <- 0000000080000000 = 5555555555555500 -+ic 0000000000000000 <- 0000000055555555 = 0000000000000000 -+ic 0000000000000001 <- 0000000055555555 = 0000000000000000 -+ic 000000000000FFFF <- 0000000055555555 = 000000000000FF00 -+ic 0000000000007FFF <- 0000000055555555 = 0000000000007F00 -+ic 0000000000008000 <- 0000000055555555 = 0000000000008000 -+ic 00000000FFFFFFFF <- 0000000055555555 = 00000000FFFFFF00 -+ic 0000000080000000 <- 0000000055555555 = 0000000080000000 -+ic 000000007FFFFFFF <- 0000000055555555 = 000000007FFFFF00 -+ic AAAAAAAAAAAAAAAA <- 0000000055555555 = AAAAAAAAAAAAAA00 -+ic 8000000000000000 <- 0000000055555555 = 8000000000000000 -+ic FFFFFFFFFFFFFFFF <- 0000000055555555 = FFFFFFFFFFFFFF00 -+ic 5555555555555555 <- 0000000055555555 = 5555555555555500 -+icy 0000000000000000 <- 0000000055555555 = 0000000000000000 -+icy 0000000000000001 <- 0000000055555555 = 0000000000000000 -+icy 000000000000FFFF <- 0000000055555555 = 000000000000FF00 -+icy 0000000000007FFF <- 0000000055555555 = 0000000000007F00 -+icy 0000000000008000 <- 0000000055555555 = 0000000000008000 -+icy 00000000FFFFFFFF <- 0000000055555555 = 00000000FFFFFF00 -+icy 0000000080000000 <- 0000000055555555 = 0000000080000000 -+icy 000000007FFFFFFF <- 0000000055555555 = 000000007FFFFF00 -+icy AAAAAAAAAAAAAAAA <- 0000000055555555 = AAAAAAAAAAAAAA00 -+icy 8000000000000000 <- 0000000055555555 = 8000000000000000 -+icy FFFFFFFFFFFFFFFF <- 0000000055555555 = FFFFFFFFFFFFFF00 -+icy 5555555555555555 <- 0000000055555555 = 5555555555555500 -+ic 0000000000000000 <- 00000000FFFFFFFF = 0000000000000000 -+ic 0000000000000001 <- 00000000FFFFFFFF = 0000000000000000 -+ic 000000000000FFFF <- 00000000FFFFFFFF = 000000000000FF00 -+ic 0000000000007FFF <- 00000000FFFFFFFF = 0000000000007F00 -+ic 0000000000008000 <- 00000000FFFFFFFF = 0000000000008000 -+ic 00000000FFFFFFFF <- 00000000FFFFFFFF = 00000000FFFFFF00 -+ic 0000000080000000 <- 00000000FFFFFFFF = 0000000080000000 -+ic 000000007FFFFFFF <- 00000000FFFFFFFF = 000000007FFFFF00 -+ic AAAAAAAAAAAAAAAA <- 00000000FFFFFFFF = AAAAAAAAAAAAAA00 -+ic 8000000000000000 <- 00000000FFFFFFFF = 8000000000000000 -+ic FFFFFFFFFFFFFFFF <- 00000000FFFFFFFF = FFFFFFFFFFFFFF00 -+ic 5555555555555555 <- 00000000FFFFFFFF = 5555555555555500 -+icy 0000000000000000 <- 00000000FFFFFFFF = 0000000000000000 -+icy 0000000000000001 <- 00000000FFFFFFFF = 0000000000000000 -+icy 000000000000FFFF <- 00000000FFFFFFFF = 000000000000FF00 -+icy 0000000000007FFF <- 00000000FFFFFFFF = 0000000000007F00 -+icy 0000000000008000 <- 00000000FFFFFFFF = 0000000000008000 -+icy 00000000FFFFFFFF <- 00000000FFFFFFFF = 00000000FFFFFF00 -+icy 0000000080000000 <- 00000000FFFFFFFF = 0000000080000000 -+icy 000000007FFFFFFF <- 00000000FFFFFFFF = 000000007FFFFF00 -+icy AAAAAAAAAAAAAAAA <- 00000000FFFFFFFF = AAAAAAAAAAAAAA00 -+icy 8000000000000000 <- 00000000FFFFFFFF = 8000000000000000 -+icy FFFFFFFFFFFFFFFF <- 00000000FFFFFFFF = FFFFFFFFFFFFFF00 -+icy 5555555555555555 <- 00000000FFFFFFFF = 5555555555555500 -+ic 0000000000000000 <- 000000000000FFFF = 0000000000000000 -+ic 0000000000000001 <- 000000000000FFFF = 0000000000000000 -+ic 000000000000FFFF <- 000000000000FFFF = 000000000000FF00 -+ic 0000000000007FFF <- 000000000000FFFF = 0000000000007F00 -+ic 0000000000008000 <- 000000000000FFFF = 0000000000008000 -+ic 00000000FFFFFFFF <- 000000000000FFFF = 00000000FFFFFF00 -+ic 0000000080000000 <- 000000000000FFFF = 0000000080000000 -+ic 000000007FFFFFFF <- 000000000000FFFF = 000000007FFFFF00 -+ic AAAAAAAAAAAAAAAA <- 000000000000FFFF = AAAAAAAAAAAAAA00 -+ic 8000000000000000 <- 000000000000FFFF = 8000000000000000 -+ic FFFFFFFFFFFFFFFF <- 000000000000FFFF = FFFFFFFFFFFFFF00 -+ic 5555555555555555 <- 000000000000FFFF = 5555555555555500 -+icy 0000000000000000 <- 000000000000FFFF = 0000000000000000 -+icy 0000000000000001 <- 000000000000FFFF = 0000000000000000 -+icy 000000000000FFFF <- 000000000000FFFF = 000000000000FF00 -+icy 0000000000007FFF <- 000000000000FFFF = 0000000000007F00 -+icy 0000000000008000 <- 000000000000FFFF = 0000000000008000 -+icy 00000000FFFFFFFF <- 000000000000FFFF = 00000000FFFFFF00 -+icy 0000000080000000 <- 000000000000FFFF = 0000000080000000 -+icy 000000007FFFFFFF <- 000000000000FFFF = 000000007FFFFF00 -+icy AAAAAAAAAAAAAAAA <- 000000000000FFFF = AAAAAAAAAAAAAA00 -+icy 8000000000000000 <- 000000000000FFFF = 8000000000000000 -+icy FFFFFFFFFFFFFFFF <- 000000000000FFFF = FFFFFFFFFFFFFF00 -+icy 5555555555555555 <- 000000000000FFFF = 5555555555555500 -+ic 0000000000000000 <- 0000000000007FFF = 0000000000000000 -+ic 0000000000000001 <- 0000000000007FFF = 0000000000000000 -+ic 000000000000FFFF <- 0000000000007FFF = 000000000000FF00 -+ic 0000000000007FFF <- 0000000000007FFF = 0000000000007F00 -+ic 0000000000008000 <- 0000000000007FFF = 0000000000008000 -+ic 00000000FFFFFFFF <- 0000000000007FFF = 00000000FFFFFF00 -+ic 0000000080000000 <- 0000000000007FFF = 0000000080000000 -+ic 000000007FFFFFFF <- 0000000000007FFF = 000000007FFFFF00 -+ic AAAAAAAAAAAAAAAA <- 0000000000007FFF = AAAAAAAAAAAAAA00 -+ic 8000000000000000 <- 0000000000007FFF = 8000000000000000 -+ic FFFFFFFFFFFFFFFF <- 0000000000007FFF = FFFFFFFFFFFFFF00 -+ic 5555555555555555 <- 0000000000007FFF = 5555555555555500 -+icy 0000000000000000 <- 0000000000007FFF = 0000000000000000 -+icy 0000000000000001 <- 0000000000007FFF = 0000000000000000 -+icy 000000000000FFFF <- 0000000000007FFF = 000000000000FF00 -+icy 0000000000007FFF <- 0000000000007FFF = 0000000000007F00 -+icy 0000000000008000 <- 0000000000007FFF = 0000000000008000 -+icy 00000000FFFFFFFF <- 0000000000007FFF = 00000000FFFFFF00 -+icy 0000000080000000 <- 0000000000007FFF = 0000000080000000 -+icy 000000007FFFFFFF <- 0000000000007FFF = 000000007FFFFF00 -+icy AAAAAAAAAAAAAAAA <- 0000000000007FFF = AAAAAAAAAAAAAA00 -+icy 8000000000000000 <- 0000000000007FFF = 8000000000000000 -+icy FFFFFFFFFFFFFFFF <- 0000000000007FFF = FFFFFFFFFFFFFF00 -+icy 5555555555555555 <- 0000000000007FFF = 5555555555555500 -+ic 0000000000000000 <- 0000000000008000 = 0000000000000000 -+ic 0000000000000001 <- 0000000000008000 = 0000000000000000 -+ic 000000000000FFFF <- 0000000000008000 = 000000000000FF00 -+ic 0000000000007FFF <- 0000000000008000 = 0000000000007F00 -+ic 0000000000008000 <- 0000000000008000 = 0000000000008000 -+ic 00000000FFFFFFFF <- 0000000000008000 = 00000000FFFFFF00 -+ic 0000000080000000 <- 0000000000008000 = 0000000080000000 -+ic 000000007FFFFFFF <- 0000000000008000 = 000000007FFFFF00 -+ic AAAAAAAAAAAAAAAA <- 0000000000008000 = AAAAAAAAAAAAAA00 -+ic 8000000000000000 <- 0000000000008000 = 8000000000000000 -+ic FFFFFFFFFFFFFFFF <- 0000000000008000 = FFFFFFFFFFFFFF00 -+ic 5555555555555555 <- 0000000000008000 = 5555555555555500 -+icy 0000000000000000 <- 0000000000008000 = 0000000000000000 -+icy 0000000000000001 <- 0000000000008000 = 0000000000000000 -+icy 000000000000FFFF <- 0000000000008000 = 000000000000FF00 -+icy 0000000000007FFF <- 0000000000008000 = 0000000000007F00 -+icy 0000000000008000 <- 0000000000008000 = 0000000000008000 -+icy 00000000FFFFFFFF <- 0000000000008000 = 00000000FFFFFF00 -+icy 0000000080000000 <- 0000000000008000 = 0000000080000000 -+icy 000000007FFFFFFF <- 0000000000008000 = 000000007FFFFF00 -+icy AAAAAAAAAAAAAAAA <- 0000000000008000 = AAAAAAAAAAAAAA00 -+icy 8000000000000000 <- 0000000000008000 = 8000000000000000 -+icy FFFFFFFFFFFFFFFF <- 0000000000008000 = FFFFFFFFFFFFFF00 -+icy 5555555555555555 <- 0000000000008000 = 5555555555555500 -+ic 0000000000000000 <- 000000000000FFFF = 0000000000000000 -+ic 0000000000000001 <- 000000000000FFFF = 0000000000000000 -+ic 000000000000FFFF <- 000000000000FFFF = 000000000000FF00 -+ic 0000000000007FFF <- 000000000000FFFF = 0000000000007F00 -+ic 0000000000008000 <- 000000000000FFFF = 0000000000008000 -+ic 00000000FFFFFFFF <- 000000000000FFFF = 00000000FFFFFF00 -+ic 0000000080000000 <- 000000000000FFFF = 0000000080000000 -+ic 000000007FFFFFFF <- 000000000000FFFF = 000000007FFFFF00 -+ic AAAAAAAAAAAAAAAA <- 000000000000FFFF = AAAAAAAAAAAAAA00 -+ic 8000000000000000 <- 000000000000FFFF = 8000000000000000 -+ic FFFFFFFFFFFFFFFF <- 000000000000FFFF = FFFFFFFFFFFFFF00 -+ic 5555555555555555 <- 000000000000FFFF = 5555555555555500 -+icy 0000000000000000 <- 000000000000FFFF = 0000000000000000 -+icy 0000000000000001 <- 000000000000FFFF = 0000000000000000 -+icy 000000000000FFFF <- 000000000000FFFF = 000000000000FF00 -+icy 0000000000007FFF <- 000000000000FFFF = 0000000000007F00 -+icy 0000000000008000 <- 000000000000FFFF = 0000000000008000 -+icy 00000000FFFFFFFF <- 000000000000FFFF = 00000000FFFFFF00 -+icy 0000000080000000 <- 000000000000FFFF = 0000000080000000 -+icy 000000007FFFFFFF <- 000000000000FFFF = 000000007FFFFF00 -+icy AAAAAAAAAAAAAAAA <- 000000000000FFFF = AAAAAAAAAAAAAA00 -+icy 8000000000000000 <- 000000000000FFFF = 8000000000000000 -+icy FFFFFFFFFFFFFFFF <- 000000000000FFFF = FFFFFFFFFFFFFF00 -+icy 5555555555555555 <- 000000000000FFFF = 5555555555555500 -+iihh 0000000000000000 <- 0000000000000055 = 0055000000000000 -+iihh 0000000000000001 <- 0000000000000055 = 0055000000000001 -+iihh 000000000000FFFF <- 0000000000000055 = 005500000000FFFF -+iihh 0000000000007FFF <- 0000000000000055 = 0055000000007FFF -+iihh 0000000000008000 <- 0000000000000055 = 0055000000008000 -+iihh 00000000FFFFFFFF <- 0000000000000055 = 00550000FFFFFFFF -+iihh 0000000080000000 <- 0000000000000055 = 0055000080000000 -+iihh 000000007FFFFFFF <- 0000000000000055 = 005500007FFFFFFF -+iihh AAAAAAAAAAAAAAAA <- 0000000000000055 = 0055AAAAAAAAAAAA -+iihh 8000000000000000 <- 0000000000000055 = 0055000000000000 -+iihh FFFFFFFFFFFFFFFF <- 0000000000000055 = 0055FFFFFFFFFFFF -+iihh 5555555555555555 <- 0000000000000055 = 0055555555555555 -+iihl 0000000000000000 <- 0000000000000055 = 0000005500000000 -+iihl 0000000000000001 <- 0000000000000055 = 0000005500000001 -+iihl 000000000000FFFF <- 0000000000000055 = 000000550000FFFF -+iihl 0000000000007FFF <- 0000000000000055 = 0000005500007FFF -+iihl 0000000000008000 <- 0000000000000055 = 0000005500008000 -+iihl 00000000FFFFFFFF <- 0000000000000055 = 00000055FFFFFFFF -+iihl 0000000080000000 <- 0000000000000055 = 0000005580000000 -+iihl 000000007FFFFFFF <- 0000000000000055 = 000000557FFFFFFF -+iihl AAAAAAAAAAAAAAAA <- 0000000000000055 = AAAA0055AAAAAAAA -+iihl 8000000000000000 <- 0000000000000055 = 8000005500000000 -+iihl FFFFFFFFFFFFFFFF <- 0000000000000055 = FFFF0055FFFFFFFF -+iihl 5555555555555555 <- 0000000000000055 = 5555005555555555 -+iilh 0000000000000000 <- 0000000000000055 = 0000000000550000 -+iilh 0000000000000001 <- 0000000000000055 = 0000000000550001 -+iilh 000000000000FFFF <- 0000000000000055 = 000000000055FFFF -+iilh 0000000000007FFF <- 0000000000000055 = 0000000000557FFF -+iilh 0000000000008000 <- 0000000000000055 = 0000000000558000 -+iilh 00000000FFFFFFFF <- 0000000000000055 = 000000000055FFFF -+iilh 0000000080000000 <- 0000000000000055 = 0000000000550000 -+iilh 000000007FFFFFFF <- 0000000000000055 = 000000000055FFFF -+iilh AAAAAAAAAAAAAAAA <- 0000000000000055 = AAAAAAAA0055AAAA -+iilh 8000000000000000 <- 0000000000000055 = 8000000000550000 -+iilh FFFFFFFFFFFFFFFF <- 0000000000000055 = FFFFFFFF0055FFFF -+iilh 5555555555555555 <- 0000000000000055 = 5555555500555555 -+iill 0000000000000000 <- 0000000000000055 = 0000000000000055 -+iill 0000000000000001 <- 0000000000000055 = 0000000000000055 -+iill 000000000000FFFF <- 0000000000000055 = 0000000000000055 -+iill 0000000000007FFF <- 0000000000000055 = 0000000000000055 -+iill 0000000000008000 <- 0000000000000055 = 0000000000000055 -+iill 00000000FFFFFFFF <- 0000000000000055 = 00000000FFFF0055 -+iill 0000000080000000 <- 0000000000000055 = 0000000080000055 -+iill 000000007FFFFFFF <- 0000000000000055 = 000000007FFF0055 -+iill AAAAAAAAAAAAAAAA <- 0000000000000055 = AAAAAAAAAAAA0055 -+iill 8000000000000000 <- 0000000000000055 = 8000000000000055 -+iill FFFFFFFFFFFFFFFF <- 0000000000000055 = FFFFFFFFFFFF0055 -+iill 5555555555555555 <- 0000000000000055 = 5555555555550055 -+iihh 0000000000000000 <- 00000000000000AA = 00AA000000000000 -+iihh 0000000000000001 <- 00000000000000AA = 00AA000000000001 -+iihh 000000000000FFFF <- 00000000000000AA = 00AA00000000FFFF -+iihh 0000000000007FFF <- 00000000000000AA = 00AA000000007FFF -+iihh 0000000000008000 <- 00000000000000AA = 00AA000000008000 -+iihh 00000000FFFFFFFF <- 00000000000000AA = 00AA0000FFFFFFFF -+iihh 0000000080000000 <- 00000000000000AA = 00AA000080000000 -+iihh 000000007FFFFFFF <- 00000000000000AA = 00AA00007FFFFFFF -+iihh AAAAAAAAAAAAAAAA <- 00000000000000AA = 00AAAAAAAAAAAAAA -+iihh 8000000000000000 <- 00000000000000AA = 00AA000000000000 -+iihh FFFFFFFFFFFFFFFF <- 00000000000000AA = 00AAFFFFFFFFFFFF -+iihh 5555555555555555 <- 00000000000000AA = 00AA555555555555 -+iihl 0000000000000000 <- 00000000000000AA = 000000AA00000000 -+iihl 0000000000000001 <- 00000000000000AA = 000000AA00000001 -+iihl 000000000000FFFF <- 00000000000000AA = 000000AA0000FFFF -+iihl 0000000000007FFF <- 00000000000000AA = 000000AA00007FFF -+iihl 0000000000008000 <- 00000000000000AA = 000000AA00008000 -+iihl 00000000FFFFFFFF <- 00000000000000AA = 000000AAFFFFFFFF -+iihl 0000000080000000 <- 00000000000000AA = 000000AA80000000 -+iihl 000000007FFFFFFF <- 00000000000000AA = 000000AA7FFFFFFF -+iihl AAAAAAAAAAAAAAAA <- 00000000000000AA = AAAA00AAAAAAAAAA -+iihl 8000000000000000 <- 00000000000000AA = 800000AA00000000 -+iihl FFFFFFFFFFFFFFFF <- 00000000000000AA = FFFF00AAFFFFFFFF -+iihl 5555555555555555 <- 00000000000000AA = 555500AA55555555 -+iilh 0000000000000000 <- 00000000000000AA = 0000000000AA0000 -+iilh 0000000000000001 <- 00000000000000AA = 0000000000AA0001 -+iilh 000000000000FFFF <- 00000000000000AA = 0000000000AAFFFF -+iilh 0000000000007FFF <- 00000000000000AA = 0000000000AA7FFF -+iilh 0000000000008000 <- 00000000000000AA = 0000000000AA8000 -+iilh 00000000FFFFFFFF <- 00000000000000AA = 0000000000AAFFFF -+iilh 0000000080000000 <- 00000000000000AA = 0000000000AA0000 -+iilh 000000007FFFFFFF <- 00000000000000AA = 0000000000AAFFFF -+iilh AAAAAAAAAAAAAAAA <- 00000000000000AA = AAAAAAAA00AAAAAA -+iilh 8000000000000000 <- 00000000000000AA = 8000000000AA0000 -+iilh FFFFFFFFFFFFFFFF <- 00000000000000AA = FFFFFFFF00AAFFFF -+iilh 5555555555555555 <- 00000000000000AA = 5555555500AA5555 -+iill 0000000000000000 <- 00000000000000AA = 00000000000000AA -+iill 0000000000000001 <- 00000000000000AA = 00000000000000AA -+iill 000000000000FFFF <- 00000000000000AA = 00000000000000AA -+iill 0000000000007FFF <- 00000000000000AA = 00000000000000AA -+iill 0000000000008000 <- 00000000000000AA = 00000000000000AA -+iill 00000000FFFFFFFF <- 00000000000000AA = 00000000FFFF00AA -+iill 0000000080000000 <- 00000000000000AA = 00000000800000AA -+iill 000000007FFFFFFF <- 00000000000000AA = 000000007FFF00AA -+iill AAAAAAAAAAAAAAAA <- 00000000000000AA = AAAAAAAAAAAA00AA -+iill 8000000000000000 <- 00000000000000AA = 80000000000000AA -+iill FFFFFFFFFFFFFFFF <- 00000000000000AA = FFFFFFFFFFFF00AA -+iill 5555555555555555 <- 00000000000000AA = 55555555555500AA -+iihh 0000000000000000 <- 00000000000000FF = 00FF000000000000 -+iihh 0000000000000001 <- 00000000000000FF = 00FF000000000001 -+iihh 000000000000FFFF <- 00000000000000FF = 00FF00000000FFFF -+iihh 0000000000007FFF <- 00000000000000FF = 00FF000000007FFF -+iihh 0000000000008000 <- 00000000000000FF = 00FF000000008000 -+iihh 00000000FFFFFFFF <- 00000000000000FF = 00FF0000FFFFFFFF -+iihh 0000000080000000 <- 00000000000000FF = 00FF000080000000 -+iihh 000000007FFFFFFF <- 00000000000000FF = 00FF00007FFFFFFF -+iihh AAAAAAAAAAAAAAAA <- 00000000000000FF = 00FFAAAAAAAAAAAA -+iihh 8000000000000000 <- 00000000000000FF = 00FF000000000000 -+iihh FFFFFFFFFFFFFFFF <- 00000000000000FF = 00FFFFFFFFFFFFFF -+iihh 5555555555555555 <- 00000000000000FF = 00FF555555555555 -+iihl 0000000000000000 <- 00000000000000FF = 000000FF00000000 -+iihl 0000000000000001 <- 00000000000000FF = 000000FF00000001 -+iihl 000000000000FFFF <- 00000000000000FF = 000000FF0000FFFF -+iihl 0000000000007FFF <- 00000000000000FF = 000000FF00007FFF -+iihl 0000000000008000 <- 00000000000000FF = 000000FF00008000 -+iihl 00000000FFFFFFFF <- 00000000000000FF = 000000FFFFFFFFFF -+iihl 0000000080000000 <- 00000000000000FF = 000000FF80000000 -+iihl 000000007FFFFFFF <- 00000000000000FF = 000000FF7FFFFFFF -+iihl AAAAAAAAAAAAAAAA <- 00000000000000FF = AAAA00FFAAAAAAAA -+iihl 8000000000000000 <- 00000000000000FF = 800000FF00000000 -+iihl FFFFFFFFFFFFFFFF <- 00000000000000FF = FFFF00FFFFFFFFFF -+iihl 5555555555555555 <- 00000000000000FF = 555500FF55555555 -+iilh 0000000000000000 <- 00000000000000FF = 0000000000FF0000 -+iilh 0000000000000001 <- 00000000000000FF = 0000000000FF0001 -+iilh 000000000000FFFF <- 00000000000000FF = 0000000000FFFFFF -+iilh 0000000000007FFF <- 00000000000000FF = 0000000000FF7FFF -+iilh 0000000000008000 <- 00000000000000FF = 0000000000FF8000 -+iilh 00000000FFFFFFFF <- 00000000000000FF = 0000000000FFFFFF -+iilh 0000000080000000 <- 00000000000000FF = 0000000000FF0000 -+iilh 000000007FFFFFFF <- 00000000000000FF = 0000000000FFFFFF -+iilh AAAAAAAAAAAAAAAA <- 00000000000000FF = AAAAAAAA00FFAAAA -+iilh 8000000000000000 <- 00000000000000FF = 8000000000FF0000 -+iilh FFFFFFFFFFFFFFFF <- 00000000000000FF = FFFFFFFF00FFFFFF -+iilh 5555555555555555 <- 00000000000000FF = 5555555500FF5555 -+iill 0000000000000000 <- 00000000000000FF = 00000000000000FF -+iill 0000000000000001 <- 00000000000000FF = 00000000000000FF -+iill 000000000000FFFF <- 00000000000000FF = 00000000000000FF -+iill 0000000000007FFF <- 00000000000000FF = 00000000000000FF -+iill 0000000000008000 <- 00000000000000FF = 00000000000000FF -+iill 00000000FFFFFFFF <- 00000000000000FF = 00000000FFFF00FF -+iill 0000000080000000 <- 00000000000000FF = 00000000800000FF -+iill 000000007FFFFFFF <- 00000000000000FF = 000000007FFF00FF -+iill AAAAAAAAAAAAAAAA <- 00000000000000FF = AAAAAAAAAAAA00FF -+iill 8000000000000000 <- 00000000000000FF = 80000000000000FF -+iill FFFFFFFFFFFFFFFF <- 00000000000000FF = FFFFFFFFFFFF00FF -+iill 5555555555555555 <- 00000000000000FF = 55555555555500FF -+iihh 0000000000000000 <- 0000000000000000 = 0000000000000000 -+iihh 0000000000000001 <- 0000000000000000 = 0000000000000001 -+iihh 000000000000FFFF <- 0000000000000000 = 000000000000FFFF -+iihh 0000000000007FFF <- 0000000000000000 = 0000000000007FFF -+iihh 0000000000008000 <- 0000000000000000 = 0000000000008000 -+iihh 00000000FFFFFFFF <- 0000000000000000 = 00000000FFFFFFFF -+iihh 0000000080000000 <- 0000000000000000 = 0000000080000000 -+iihh 000000007FFFFFFF <- 0000000000000000 = 000000007FFFFFFF -+iihh AAAAAAAAAAAAAAAA <- 0000000000000000 = 0000AAAAAAAAAAAA -+iihh 8000000000000000 <- 0000000000000000 = 0000000000000000 -+iihh FFFFFFFFFFFFFFFF <- 0000000000000000 = 0000FFFFFFFFFFFF -+iihh 5555555555555555 <- 0000000000000000 = 0000555555555555 -+iihl 0000000000000000 <- 0000000000000000 = 0000000000000000 -+iihl 0000000000000001 <- 0000000000000000 = 0000000000000001 -+iihl 000000000000FFFF <- 0000000000000000 = 000000000000FFFF -+iihl 0000000000007FFF <- 0000000000000000 = 0000000000007FFF -+iihl 0000000000008000 <- 0000000000000000 = 0000000000008000 -+iihl 00000000FFFFFFFF <- 0000000000000000 = 00000000FFFFFFFF -+iihl 0000000080000000 <- 0000000000000000 = 0000000080000000 -+iihl 000000007FFFFFFF <- 0000000000000000 = 000000007FFFFFFF -+iihl AAAAAAAAAAAAAAAA <- 0000000000000000 = AAAA0000AAAAAAAA -+iihl 8000000000000000 <- 0000000000000000 = 8000000000000000 -+iihl FFFFFFFFFFFFFFFF <- 0000000000000000 = FFFF0000FFFFFFFF -+iihl 5555555555555555 <- 0000000000000000 = 5555000055555555 -+iilh 0000000000000000 <- 0000000000000000 = 0000000000000000 -+iilh 0000000000000001 <- 0000000000000000 = 0000000000000001 -+iilh 000000000000FFFF <- 0000000000000000 = 000000000000FFFF -+iilh 0000000000007FFF <- 0000000000000000 = 0000000000007FFF -+iilh 0000000000008000 <- 0000000000000000 = 0000000000008000 -+iilh 00000000FFFFFFFF <- 0000000000000000 = 000000000000FFFF -+iilh 0000000080000000 <- 0000000000000000 = 0000000000000000 -+iilh 000000007FFFFFFF <- 0000000000000000 = 000000000000FFFF -+iilh AAAAAAAAAAAAAAAA <- 0000000000000000 = AAAAAAAA0000AAAA -+iilh 8000000000000000 <- 0000000000000000 = 8000000000000000 -+iilh FFFFFFFFFFFFFFFF <- 0000000000000000 = FFFFFFFF0000FFFF -+iilh 5555555555555555 <- 0000000000000000 = 5555555500005555 -+iill 0000000000000000 <- 0000000000000000 = 0000000000000000 -+iill 0000000000000001 <- 0000000000000000 = 0000000000000000 -+iill 000000000000FFFF <- 0000000000000000 = 0000000000000000 -+iill 0000000000007FFF <- 0000000000000000 = 0000000000000000 -+iill 0000000000008000 <- 0000000000000000 = 0000000000000000 -+iill 00000000FFFFFFFF <- 0000000000000000 = 00000000FFFF0000 -+iill 0000000080000000 <- 0000000000000000 = 0000000080000000 -+iill 000000007FFFFFFF <- 0000000000000000 = 000000007FFF0000 -+iill AAAAAAAAAAAAAAAA <- 0000000000000000 = AAAAAAAAAAAA0000 -+iill 8000000000000000 <- 0000000000000000 = 8000000000000000 -+iill FFFFFFFFFFFFFFFF <- 0000000000000000 = FFFFFFFFFFFF0000 -+iill 5555555555555555 <- 0000000000000000 = 5555555555550000 -+iihh 0000000000000000 <- 000000000000FFFF = FFFF000000000000 -+iihh 0000000000000001 <- 000000000000FFFF = FFFF000000000001 -+iihh 000000000000FFFF <- 000000000000FFFF = FFFF00000000FFFF -+iihh 0000000000007FFF <- 000000000000FFFF = FFFF000000007FFF -+iihh 0000000000008000 <- 000000000000FFFF = FFFF000000008000 -+iihh 00000000FFFFFFFF <- 000000000000FFFF = FFFF0000FFFFFFFF -+iihh 0000000080000000 <- 000000000000FFFF = FFFF000080000000 -+iihh 000000007FFFFFFF <- 000000000000FFFF = FFFF00007FFFFFFF -+iihh AAAAAAAAAAAAAAAA <- 000000000000FFFF = FFFFAAAAAAAAAAAA -+iihh 8000000000000000 <- 000000000000FFFF = FFFF000000000000 -+iihh FFFFFFFFFFFFFFFF <- 000000000000FFFF = FFFFFFFFFFFFFFFF -+iihh 5555555555555555 <- 000000000000FFFF = FFFF555555555555 -+iihl 0000000000000000 <- 000000000000FFFF = 0000FFFF00000000 -+iihl 0000000000000001 <- 000000000000FFFF = 0000FFFF00000001 -+iihl 000000000000FFFF <- 000000000000FFFF = 0000FFFF0000FFFF -+iihl 0000000000007FFF <- 000000000000FFFF = 0000FFFF00007FFF -+iihl 0000000000008000 <- 000000000000FFFF = 0000FFFF00008000 -+iihl 00000000FFFFFFFF <- 000000000000FFFF = 0000FFFFFFFFFFFF -+iihl 0000000080000000 <- 000000000000FFFF = 0000FFFF80000000 -+iihl 000000007FFFFFFF <- 000000000000FFFF = 0000FFFF7FFFFFFF -+iihl AAAAAAAAAAAAAAAA <- 000000000000FFFF = AAAAFFFFAAAAAAAA -+iihl 8000000000000000 <- 000000000000FFFF = 8000FFFF00000000 -+iihl FFFFFFFFFFFFFFFF <- 000000000000FFFF = FFFFFFFFFFFFFFFF -+iihl 5555555555555555 <- 000000000000FFFF = 5555FFFF55555555 -+iilh 0000000000000000 <- 000000000000FFFF = 00000000FFFF0000 -+iilh 0000000000000001 <- 000000000000FFFF = 00000000FFFF0001 -+iilh 000000000000FFFF <- 000000000000FFFF = 00000000FFFFFFFF -+iilh 0000000000007FFF <- 000000000000FFFF = 00000000FFFF7FFF -+iilh 0000000000008000 <- 000000000000FFFF = 00000000FFFF8000 -+iilh 00000000FFFFFFFF <- 000000000000FFFF = 00000000FFFFFFFF -+iilh 0000000080000000 <- 000000000000FFFF = 00000000FFFF0000 -+iilh 000000007FFFFFFF <- 000000000000FFFF = 00000000FFFFFFFF -+iilh AAAAAAAAAAAAAAAA <- 000000000000FFFF = AAAAAAAAFFFFAAAA -+iilh 8000000000000000 <- 000000000000FFFF = 80000000FFFF0000 -+iilh FFFFFFFFFFFFFFFF <- 000000000000FFFF = FFFFFFFFFFFFFFFF -+iilh 5555555555555555 <- 000000000000FFFF = 55555555FFFF5555 -+iill 0000000000000000 <- 000000000000FFFF = 000000000000FFFF -+iill 0000000000000001 <- 000000000000FFFF = 000000000000FFFF -+iill 000000000000FFFF <- 000000000000FFFF = 000000000000FFFF -+iill 0000000000007FFF <- 000000000000FFFF = 000000000000FFFF -+iill 0000000000008000 <- 000000000000FFFF = 000000000000FFFF -+iill 00000000FFFFFFFF <- 000000000000FFFF = 00000000FFFFFFFF -+iill 0000000080000000 <- 000000000000FFFF = 000000008000FFFF -+iill 000000007FFFFFFF <- 000000000000FFFF = 000000007FFFFFFF -+iill AAAAAAAAAAAAAAAA <- 000000000000FFFF = AAAAAAAAAAAAFFFF -+iill 8000000000000000 <- 000000000000FFFF = 800000000000FFFF -+iill FFFFFFFFFFFFFFFF <- 000000000000FFFF = FFFFFFFFFFFFFFFF -+iill 5555555555555555 <- 000000000000FFFF = 555555555555FFFF -+iihh 0000000000000000 <- 000000000000AAAA = AAAA000000000000 -+iihh 0000000000000001 <- 000000000000AAAA = AAAA000000000001 -+iihh 000000000000FFFF <- 000000000000AAAA = AAAA00000000FFFF -+iihh 0000000000007FFF <- 000000000000AAAA = AAAA000000007FFF -+iihh 0000000000008000 <- 000000000000AAAA = AAAA000000008000 -+iihh 00000000FFFFFFFF <- 000000000000AAAA = AAAA0000FFFFFFFF -+iihh 0000000080000000 <- 000000000000AAAA = AAAA000080000000 -+iihh 000000007FFFFFFF <- 000000000000AAAA = AAAA00007FFFFFFF -+iihh AAAAAAAAAAAAAAAA <- 000000000000AAAA = AAAAAAAAAAAAAAAA -+iihh 8000000000000000 <- 000000000000AAAA = AAAA000000000000 -+iihh FFFFFFFFFFFFFFFF <- 000000000000AAAA = AAAAFFFFFFFFFFFF -+iihh 5555555555555555 <- 000000000000AAAA = AAAA555555555555 -+iihl 0000000000000000 <- 000000000000AAAA = 0000AAAA00000000 -+iihl 0000000000000001 <- 000000000000AAAA = 0000AAAA00000001 -+iihl 000000000000FFFF <- 000000000000AAAA = 0000AAAA0000FFFF -+iihl 0000000000007FFF <- 000000000000AAAA = 0000AAAA00007FFF -+iihl 0000000000008000 <- 000000000000AAAA = 0000AAAA00008000 -+iihl 00000000FFFFFFFF <- 000000000000AAAA = 0000AAAAFFFFFFFF -+iihl 0000000080000000 <- 000000000000AAAA = 0000AAAA80000000 -+iihl 000000007FFFFFFF <- 000000000000AAAA = 0000AAAA7FFFFFFF -+iihl AAAAAAAAAAAAAAAA <- 000000000000AAAA = AAAAAAAAAAAAAAAA -+iihl 8000000000000000 <- 000000000000AAAA = 8000AAAA00000000 -+iihl FFFFFFFFFFFFFFFF <- 000000000000AAAA = FFFFAAAAFFFFFFFF -+iihl 5555555555555555 <- 000000000000AAAA = 5555AAAA55555555 -+iilh 0000000000000000 <- 000000000000AAAA = 00000000AAAA0000 -+iilh 0000000000000001 <- 000000000000AAAA = 00000000AAAA0001 -+iilh 000000000000FFFF <- 000000000000AAAA = 00000000AAAAFFFF -+iilh 0000000000007FFF <- 000000000000AAAA = 00000000AAAA7FFF -+iilh 0000000000008000 <- 000000000000AAAA = 00000000AAAA8000 -+iilh 00000000FFFFFFFF <- 000000000000AAAA = 00000000AAAAFFFF -+iilh 0000000080000000 <- 000000000000AAAA = 00000000AAAA0000 -+iilh 000000007FFFFFFF <- 000000000000AAAA = 00000000AAAAFFFF -+iilh AAAAAAAAAAAAAAAA <- 000000000000AAAA = AAAAAAAAAAAAAAAA -+iilh 8000000000000000 <- 000000000000AAAA = 80000000AAAA0000 -+iilh FFFFFFFFFFFFFFFF <- 000000000000AAAA = FFFFFFFFAAAAFFFF -+iilh 5555555555555555 <- 000000000000AAAA = 55555555AAAA5555 -+iill 0000000000000000 <- 000000000000AAAA = 000000000000AAAA -+iill 0000000000000001 <- 000000000000AAAA = 000000000000AAAA -+iill 000000000000FFFF <- 000000000000AAAA = 000000000000AAAA -+iill 0000000000007FFF <- 000000000000AAAA = 000000000000AAAA -+iill 0000000000008000 <- 000000000000AAAA = 000000000000AAAA -+iill 00000000FFFFFFFF <- 000000000000AAAA = 00000000FFFFAAAA -+iill 0000000080000000 <- 000000000000AAAA = 000000008000AAAA -+iill 000000007FFFFFFF <- 000000000000AAAA = 000000007FFFAAAA -+iill AAAAAAAAAAAAAAAA <- 000000000000AAAA = AAAAAAAAAAAAAAAA -+iill 8000000000000000 <- 000000000000AAAA = 800000000000AAAA -+iill FFFFFFFFFFFFFFFF <- 000000000000AAAA = FFFFFFFFFFFFAAAA -+iill 5555555555555555 <- 000000000000AAAA = 555555555555AAAA -+iihh 0000000000000000 <- 0000000000005555 = 5555000000000000 -+iihh 0000000000000001 <- 0000000000005555 = 5555000000000001 -+iihh 000000000000FFFF <- 0000000000005555 = 555500000000FFFF -+iihh 0000000000007FFF <- 0000000000005555 = 5555000000007FFF -+iihh 0000000000008000 <- 0000000000005555 = 5555000000008000 -+iihh 00000000FFFFFFFF <- 0000000000005555 = 55550000FFFFFFFF -+iihh 0000000080000000 <- 0000000000005555 = 5555000080000000 -+iihh 000000007FFFFFFF <- 0000000000005555 = 555500007FFFFFFF -+iihh AAAAAAAAAAAAAAAA <- 0000000000005555 = 5555AAAAAAAAAAAA -+iihh 8000000000000000 <- 0000000000005555 = 5555000000000000 -+iihh FFFFFFFFFFFFFFFF <- 0000000000005555 = 5555FFFFFFFFFFFF -+iihh 5555555555555555 <- 0000000000005555 = 5555555555555555 -+iihl 0000000000000000 <- 0000000000005555 = 0000555500000000 -+iihl 0000000000000001 <- 0000000000005555 = 0000555500000001 -+iihl 000000000000FFFF <- 0000000000005555 = 000055550000FFFF -+iihl 0000000000007FFF <- 0000000000005555 = 0000555500007FFF -+iihl 0000000000008000 <- 0000000000005555 = 0000555500008000 -+iihl 00000000FFFFFFFF <- 0000000000005555 = 00005555FFFFFFFF -+iihl 0000000080000000 <- 0000000000005555 = 0000555580000000 -+iihl 000000007FFFFFFF <- 0000000000005555 = 000055557FFFFFFF -+iihl AAAAAAAAAAAAAAAA <- 0000000000005555 = AAAA5555AAAAAAAA -+iihl 8000000000000000 <- 0000000000005555 = 8000555500000000 -+iihl FFFFFFFFFFFFFFFF <- 0000000000005555 = FFFF5555FFFFFFFF -+iihl 5555555555555555 <- 0000000000005555 = 5555555555555555 -+iilh 0000000000000000 <- 0000000000005555 = 0000000055550000 -+iilh 0000000000000001 <- 0000000000005555 = 0000000055550001 -+iilh 000000000000FFFF <- 0000000000005555 = 000000005555FFFF -+iilh 0000000000007FFF <- 0000000000005555 = 0000000055557FFF -+iilh 0000000000008000 <- 0000000000005555 = 0000000055558000 -+iilh 00000000FFFFFFFF <- 0000000000005555 = 000000005555FFFF -+iilh 0000000080000000 <- 0000000000005555 = 0000000055550000 -+iilh 000000007FFFFFFF <- 0000000000005555 = 000000005555FFFF -+iilh AAAAAAAAAAAAAAAA <- 0000000000005555 = AAAAAAAA5555AAAA -+iilh 8000000000000000 <- 0000000000005555 = 8000000055550000 -+iilh FFFFFFFFFFFFFFFF <- 0000000000005555 = FFFFFFFF5555FFFF -+iilh 5555555555555555 <- 0000000000005555 = 5555555555555555 -+iill 0000000000000000 <- 0000000000005555 = 0000000000005555 -+iill 0000000000000001 <- 0000000000005555 = 0000000000005555 -+iill 000000000000FFFF <- 0000000000005555 = 0000000000005555 -+iill 0000000000007FFF <- 0000000000005555 = 0000000000005555 -+iill 0000000000008000 <- 0000000000005555 = 0000000000005555 -+iill 00000000FFFFFFFF <- 0000000000005555 = 00000000FFFF5555 -+iill 0000000080000000 <- 0000000000005555 = 0000000080005555 -+iill 000000007FFFFFFF <- 0000000000005555 = 000000007FFF5555 -+iill AAAAAAAAAAAAAAAA <- 0000000000005555 = AAAAAAAAAAAA5555 -+iill 8000000000000000 <- 0000000000005555 = 8000000000005555 -+iill FFFFFFFFFFFFFFFF <- 0000000000005555 = FFFFFFFFFFFF5555 -+iill 5555555555555555 <- 0000000000005555 = 5555555555555555 ---- none/tests/s390x/insert.vgtest -+++ none/tests/s390x/insert.vgtest -@@ -0,0 +1 @@ -+prog: insert ---- none/tests/s390x/lam_stam.c -+++ none/tests/s390x/lam_stam.c -@@ -0,0 +1,20 @@ -+/* LAM, STAM, load,store access multiple */ -+#include -+#include -+ -+char output[44]; -+char input[44] = "0123456789\n" -+ "0123456789\n" -+ "0123456789\n" -+ "0123456789\n"; -+ -+int main() -+{ -+ asm volatile( "larl 1,input\n\t" -+ "larl 2,output\n\t" -+ "lam 3,13,0(1)\n\t" -+ "stam 3,13,0(2)\n\t":::"1", "2"); -+ -+ write(1, output, sizeof output); -+ return 0; -+} ---- none/tests/s390x/lam_stam.stderr.exp -+++ none/tests/s390x/lam_stam.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/lam_stam.stdout.exp -+++ none/tests/s390x/lam_stam.stdout.exp -@@ -0,0 +1,4 @@ -+0123456789 -+0123456789 -+0123456789 -+0123456789 ---- none/tests/s390x/lam_stam.vgtest -+++ none/tests/s390x/lam_stam.vgtest -@@ -0,0 +1 @@ -+prog: lam_stam ---- none/tests/s390x/lpr.c -+++ none/tests/s390x/lpr.c -@@ -0,0 +1,95 @@ -+#include -+#include -+ -+int lpr(int org, int *new) -+{ -+ int _new, cc; -+ asm volatile( "lpr %0,%2\n\t" -+ "ipm %1\n\t" -+ "srl %1,28\n\t" -+ : "=d" (_new), "=d" (cc) -+ : "d" (org) -+ : "cc"); -+ *new = _new; -+ return cc; -+} -+ -+int lpgr(unsigned long org, unsigned long *new) -+{ -+ unsigned long _new; -+ int cc; -+ asm volatile( "lpgr %0,%2\n\t" -+ "ipm %1\n\t" -+ "srl %1,28\n\t" -+ : "=d" (_new), "=d" (cc) -+ : "d" (org) -+ : "cc"); -+ *new = _new; -+ return cc; -+} -+ -+int lpgfr(unsigned long org, unsigned long *new) -+{ -+ unsigned long _new; -+ int cc; -+ asm volatile( "lpgfr %0,%2\n\t" -+ "ipm %1\n\t" -+ "srl %1,28\n\t" -+ : "=d" (_new), "=d" (cc) -+ : "d" (org) -+ : "cc"); -+ *new = _new; -+ return cc; -+} -+ -+ -+void t32(int value) -+{ -+ int n,cc; -+ -+ cc = lpr(value, &n); -+ -+ printf("new: %d cc: %d\n", n, cc); -+} -+ -+void t64(unsigned long value) -+{ -+ int cc; -+ unsigned long n; -+ -+ cc = lpgr(value, &n); -+ -+ printf("new: %ld cc: %d\n", n, cc); -+} -+ -+void t3264(unsigned long value) -+{ -+ int cc; -+ unsigned long n; -+ -+ cc = lpgfr(value, &n); -+ -+ printf("new: %ld cc: %d\n", n, cc); -+} -+ -+ -+ -+int main() -+{ -+ printf("lpr\n"); -+ t32(0); t32(1); t32(-1); -+ t32(INT_MAX); t32(INT_MIN); t32(UINT_MAX); -+ -+ printf("lpgr\n"); -+ t64(0); t64(1); t64(-1); -+ t64(INT_MAX); t64(INT_MIN); t64(UINT_MAX); -+ t64(LONG_MAX); t64(LONG_MIN); t64(ULONG_MAX); -+ -+ printf("lpgfr\n"); -+ t3264(0); t3264(1); t64(-1); -+ t3264(INT_MAX); t3264(INT_MIN); t3264(UINT_MAX); -+ t3264(LONG_MAX); t3264(LONG_MIN); t3264(ULONG_MAX); -+ -+ return 0; -+} -+ ---- none/tests/s390x/lpr.stderr.exp -+++ none/tests/s390x/lpr.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/lpr.stdout.exp -+++ none/tests/s390x/lpr.stdout.exp -@@ -0,0 +1,27 @@ -+lpr -+new: 0 cc: 0 -+new: 1 cc: 2 -+new: 1 cc: 2 -+new: 2147483647 cc: 2 -+new: -2147483648 cc: 3 -+new: 1 cc: 2 -+lpgr -+new: 0 cc: 0 -+new: 1 cc: 2 -+new: 1 cc: 2 -+new: 2147483647 cc: 2 -+new: 2147483648 cc: 2 -+new: 4294967295 cc: 2 -+new: 9223372036854775807 cc: 2 -+new: -9223372036854775808 cc: 3 -+new: 1 cc: 2 -+lpgfr -+new: 0 cc: 0 -+new: 1 cc: 2 -+new: 1 cc: 2 -+new: 2147483647 cc: 2 -+new: 2147483648 cc: 2 -+new: 1 cc: 2 -+new: 1 cc: 2 -+new: 0 cc: 0 -+new: 1 cc: 2 ---- none/tests/s390x/lpr.vgtest -+++ none/tests/s390x/lpr.vgtest -@@ -0,0 +1 @@ -+prog: lpr ---- none/tests/s390x/Makefile.am -+++ none/tests/s390x/Makefile.am -@@ -0,0 +1,48 @@ -+include $(top_srcdir)/Makefile.tool-tests.am -+ -+dist_noinst_SCRIPTS = filter_stderr -+ -+INSN_TESTS = clc clcle cvb cvd icm lpr tcxb lam_stam xc mvst add sub mul and or xor insert div srst -+INSN_EI = flogr sub_EI add_EI and_EI or_EI xor_EI insert_EI -+INSN_GE = mul_GE add_GE -+ -+if S390_BUILDS_EI -+ INSN_TESTS += $(INSN_EI) -+endif -+ -+if S390_BUILDS_GE -+ INSN_TESTS += $(INSN_GE) -+endif -+ -+check_PROGRAMS = $(INSN_TESTS) \ -+ ex_sig \ -+ ex_clone -+ -+EXTRA_DIST = \ -+ $(addsuffix .stderr.exp,$(check_PROGRAMS)) \ -+ $(addsuffix .stdout.exp,$(check_PROGRAMS)) \ -+ $(addsuffix .vgtest,$(check_PROGRAMS)) \ -+ test.h mul.h -+ -+AM_CFLAGS += @FLAG_M64@ -+AM_CXXFLAGS += @FLAG_M64@ -+AM_CCASFLAGS += @FLAG_M64@ -+ -+ex_clone_LDFLAGS = -lpthread -+tcxb_CFLAGS = $(AM_CFLAGS) -std=gnu99 -+# some versions of binutils require the right march flag -+add_CFLAGS = $(AM_CFLAGS) -march=z990 -+and_CFLAGS = $(AM_CFLAGS) -march=z990 -+mul_CFLAGS = $(AM_CFLAGS) -march=z990 -+sub_CFLAGS = $(AM_CFLAGS) -march=z990 -+or_CFLAGS = $(AM_CFLAGS) -march=z990 -+xor_CFLAGS = $(AM_CFLAGS) -march=z990 -+insert_CFLAGS = $(AM_CFLAGS) -march=z990 -+mul_GE_CFLAGS = $(AM_CFLAGS) -march=z10 -+sub_EI_CFLAGS = $(AM_CFLAGS) -march=z9-109 -+add_EI_CFLAGS = $(AM_CFLAGS) -march=z9-109 -+add_GE_CFLAGS = $(AM_CFLAGS) -march=z10 -+and_EI_CFLAGS = $(AM_CFLAGS) -march=z9-109 -+or_EI_CFLAGS = $(AM_CFLAGS) -march=z9-109 -+xor_EI_CFLAGS = $(AM_CFLAGS) -march=z9-109 -+insert_EI_CFLAGS = $(AM_CFLAGS) -march=z9-109 ---- none/tests/s390x/mul.c -+++ none/tests/s390x/mul.c -@@ -0,0 +1,53 @@ -+#include -+#include "mul.h" -+ -+static void do_imm_insns(void) -+{ -+ immsweep(mhi, 0); -+ immsweep(mhi, -1); -+ immsweep(mhi, -32768); -+ immsweep(mhi, 32767); -+ immsweep(mghi, 0); -+ immsweep(mghi, -1); -+ immsweep(mghi, -32768); -+ immsweep(mghi, 32767); -+} -+ -+ -+static void do_regmem_insns(unsigned long m2) -+{ -+ memsweep(m, m2); -+ regsweep(mr, m2); -+ memsweep(mh, m2); -+ memsweep(mlg, m2); -+ regsweep(mlgr, m2); -+ memsweep(ml, m2); -+ regsweep(mlr, m2); -+ memsweep(ms, m2); -+ regsweep(msr, m2); -+ memsweep(msg, m2); -+ regsweep(msgr, m2); -+ memsweep(msgf, m2); -+ regsweep(msgfr, m2); -+ memsweep(msy, m2); -+} -+ -+int main() -+{ -+ do_regmem_insns(0x0ul); -+ do_regmem_insns(0x7ffffffffffffffful); -+ do_regmem_insns(0x8000000000000000ul); -+ do_regmem_insns(0xfffffffffffffffful); -+ do_regmem_insns(0x7fffffff00000000ul); -+ do_regmem_insns(0x8000000000000000ul); -+ do_regmem_insns(0xffffffff00000000ul); -+ do_regmem_insns(0x000000007ffffffful); -+ do_regmem_insns(0x0000000080000000ul); -+ do_regmem_insns(0x00000000fffffffful); -+ do_regmem_insns(0x000000000000fffful); -+ do_regmem_insns(0x0000000000007ffful); -+ do_regmem_insns(0x0000000000008000ul); -+ do_regmem_insns(0x000000000000fffful); -+ do_imm_insns(); -+ return 0; -+} ---- none/tests/s390x/mul_GE.c -+++ none/tests/s390x/mul_GE.c -@@ -0,0 +1,50 @@ -+#include -+#include "mul.h" -+ -+static void do_imm_insns(void) -+{ -+ immsweep(msfi, 0); -+ immsweep(msfi, -1); -+ immsweep(msfi, -32768); -+ immsweep(msfi, 32767); -+ immsweep(msfi, 32767); -+ immsweep(msfi, 32767); -+ immsweep(msfi, -2147483648); -+ immsweep(msfi, 2147483647); -+ immsweep(msgfi, 0); -+ immsweep(msgfi, -1); -+ immsweep(msgfi, -32768); -+ immsweep(msgfi, 32767); -+ immsweep(msgfi, 32767); -+ immsweep(msgfi, 32767); -+ immsweep(msgfi, -2147483648); -+ immsweep(msgfi, 2147483647); -+ -+} -+ -+ -+static void do_regmem_insns(unsigned long m2) -+{ -+ memsweep(mhy, m2); -+ memsweep(mfy, m2); -+} -+ -+int main() -+{ -+ do_regmem_insns(0x0ul); -+ do_regmem_insns(0x7ffffffffffffffful); -+ do_regmem_insns(0x8000000000000000ul); -+ do_regmem_insns(0xfffffffffffffffful); -+ do_regmem_insns(0x7fffffff00000000ul); -+ do_regmem_insns(0x8000000000000000ul); -+ do_regmem_insns(0xffffffff00000000ul); -+ do_regmem_insns(0x000000007ffffffful); -+ do_regmem_insns(0x0000000080000000ul); -+ do_regmem_insns(0x00000000fffffffful); -+ do_regmem_insns(0x000000000000fffful); -+ do_regmem_insns(0x0000000000007ffful); -+ do_regmem_insns(0x0000000000008000ul); -+ do_regmem_insns(0x000000000000fffful); -+ do_imm_insns(); -+ return 0; -+} ---- none/tests/s390x/mul_GE.stderr.exp -+++ none/tests/s390x/mul_GE.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/mul_GE.stdout.exp -+++ none/tests/s390x/mul_GE.stdout.exp -@@ -0,0 +1,484 @@ -+mhy 0000000000000000 * 0000000000000000 = 00000000000000000000000000000000 -+mhy 0000000000000001 * 0000000000000000 = 00000000000000000000000000000001 -+mhy 000000000000FFFF * 0000000000000000 = 0000000000000000000000000000FFFF -+mhy 0000000000007FFF * 0000000000000000 = 00000000000000000000000000007FFF -+mhy 0000000000008000 * 0000000000000000 = 00000000000000000000000000008000 -+mhy 00000000FFFFFFFF * 0000000000000000 = 000000000000000000000000FFFFFFFF -+mhy 0000000080000000 * 0000000000000000 = 00000000000000000000000080000000 -+mhy 000000007FFFFFFF * 0000000000000000 = 0000000000000000000000007FFFFFFF -+mhy FFFFFFFFFFFFFFFF * 0000000000000000 = FFFFFFFF00000000FFFFFFFFFFFFFFFF -+mhy 8000000000000000 * 0000000000000000 = 80000000000000008000000000000000 -+mhy 7FFFFFFFFFFFFFFF * 0000000000000000 = 7FFFFFFF000000007FFFFFFFFFFFFFFF -+mfy 0000000000000000 * 0000000000000000 = 00000000000000000000000000000000 -+mfy 0000000000000001 * 0000000000000000 = 00000000000000000000000000000000 -+mfy 000000000000FFFF * 0000000000000000 = 00000000000000000000000000000000 -+mfy 0000000000007FFF * 0000000000000000 = 00000000000000000000000000000000 -+mfy 0000000000008000 * 0000000000000000 = 00000000000000000000000000000000 -+mfy 00000000FFFFFFFF * 0000000000000000 = 00000000000000000000000000000000 -+mfy 0000000080000000 * 0000000000000000 = 00000000000000000000000000000000 -+mfy 000000007FFFFFFF * 0000000000000000 = 00000000000000000000000000000000 -+mfy FFFFFFFFFFFFFFFF * 0000000000000000 = FFFFFFFF00000000FFFFFFFF00000000 -+mfy 8000000000000000 * 0000000000000000 = 80000000000000008000000000000000 -+mfy 7FFFFFFFFFFFFFFF * 0000000000000000 = 7FFFFFFF000000007FFFFFFF00000000 -+mhy 0000000000000000 * 7FFFFFFFFFFFFFFF = 00000000000000000000000000000000 -+mhy 0000000000000001 * 7FFFFFFFFFFFFFFF = 0000000000007FFF0000000000000001 -+mhy 000000000000FFFF * 7FFFFFFFFFFFFFFF = 000000007FFE8001000000000000FFFF -+mhy 0000000000007FFF * 7FFFFFFFFFFFFFFF = 000000003FFF00010000000000007FFF -+mhy 0000000000008000 * 7FFFFFFFFFFFFFFF = 000000003FFF80000000000000008000 -+mhy 00000000FFFFFFFF * 7FFFFFFFFFFFFFFF = 00000000FFFF800100000000FFFFFFFF -+mhy 0000000080000000 * 7FFFFFFFFFFFFFFF = 00000000800000000000000080000000 -+mhy 000000007FFFFFFF * 7FFFFFFFFFFFFFFF = 000000007FFF8001000000007FFFFFFF -+mhy FFFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = FFFFFFFFFFFF8001FFFFFFFFFFFFFFFF -+mhy 8000000000000000 * 7FFFFFFFFFFFFFFF = 80000000000000008000000000000000 -+mhy 7FFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = 7FFFFFFFFFFF80017FFFFFFFFFFFFFFF -+mfy 0000000000000000 * 7FFFFFFFFFFFFFFF = 00000000000000000000000000000000 -+mfy 0000000000000001 * 7FFFFFFFFFFFFFFF = 0000000000000000000000007FFFFFFF -+mfy 000000000000FFFF * 7FFFFFFFFFFFFFFF = 0000000000007FFF000000007FFF0001 -+mfy 0000000000007FFF * 7FFFFFFFFFFFFFFF = 0000000000003FFF000000007FFF8001 -+mfy 0000000000008000 * 7FFFFFFFFFFFFFFF = 0000000000003FFF00000000FFFF8000 -+mfy 00000000FFFFFFFF * 7FFFFFFFFFFFFFFF = 00000000FFFFFFFF0000000080000001 -+mfy 0000000080000000 * 7FFFFFFFFFFFFFFF = 00000000C00000000000000080000000 -+mfy 000000007FFFFFFF * 7FFFFFFFFFFFFFFF = 000000003FFFFFFF0000000000000001 -+mfy FFFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFFFFFFFFFF80000001 -+mfy 8000000000000000 * 7FFFFFFFFFFFFFFF = 80000000000000008000000000000000 -+mfy 7FFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF7FFFFFFF80000001 -+mhy 0000000000000000 * 8000000000000000 = 00000000000000000000000000000000 -+mhy 0000000000000001 * 8000000000000000 = 00000000FFFF80000000000000000001 -+mhy 000000000000FFFF * 8000000000000000 = 0000000080008000000000000000FFFF -+mhy 0000000000007FFF * 8000000000000000 = 00000000C00080000000000000007FFF -+mhy 0000000000008000 * 8000000000000000 = 00000000C00000000000000000008000 -+mhy 00000000FFFFFFFF * 8000000000000000 = 000000000000800000000000FFFFFFFF -+mhy 0000000080000000 * 8000000000000000 = 00000000000000000000000080000000 -+mhy 000000007FFFFFFF * 8000000000000000 = 0000000000008000000000007FFFFFFF -+mhy FFFFFFFFFFFFFFFF * 8000000000000000 = FFFFFFFF00008000FFFFFFFFFFFFFFFF -+mhy 8000000000000000 * 8000000000000000 = 80000000000000008000000000000000 -+mhy 7FFFFFFFFFFFFFFF * 8000000000000000 = 7FFFFFFF000080007FFFFFFFFFFFFFFF -+mfy 0000000000000000 * 8000000000000000 = 00000000000000000000000000000000 -+mfy 0000000000000001 * 8000000000000000 = 00000000FFFFFFFF0000000080000000 -+mfy 000000000000FFFF * 8000000000000000 = 00000000FFFF80000000000080000000 -+mfy 0000000000007FFF * 8000000000000000 = 00000000FFFFC0000000000080000000 -+mfy 0000000000008000 * 8000000000000000 = 00000000FFFFC0000000000000000000 -+mfy 00000000FFFFFFFF * 8000000000000000 = 00000000000000000000000080000000 -+mfy 0000000080000000 * 8000000000000000 = 00000000400000000000000000000000 -+mfy 000000007FFFFFFF * 8000000000000000 = 00000000C00000000000000080000000 -+mfy FFFFFFFFFFFFFFFF * 8000000000000000 = FFFFFFFF00000000FFFFFFFF80000000 -+mfy 8000000000000000 * 8000000000000000 = 80000000000000008000000000000000 -+mfy 7FFFFFFFFFFFFFFF * 8000000000000000 = 7FFFFFFF000000007FFFFFFF80000000 -+mhy 0000000000000000 * FFFFFFFFFFFFFFFF = 00000000000000000000000000000000 -+mhy 0000000000000001 * FFFFFFFFFFFFFFFF = 00000000FFFFFFFF0000000000000001 -+mhy 000000000000FFFF * FFFFFFFFFFFFFFFF = 00000000FFFF0001000000000000FFFF -+mhy 0000000000007FFF * FFFFFFFFFFFFFFFF = 00000000FFFF80010000000000007FFF -+mhy 0000000000008000 * FFFFFFFFFFFFFFFF = 00000000FFFF80000000000000008000 -+mhy 00000000FFFFFFFF * FFFFFFFFFFFFFFFF = 000000000000000100000000FFFFFFFF -+mhy 0000000080000000 * FFFFFFFFFFFFFFFF = 00000000800000000000000080000000 -+mhy 000000007FFFFFFF * FFFFFFFFFFFFFFFF = 0000000080000001000000007FFFFFFF -+mhy FFFFFFFFFFFFFFFF * FFFFFFFFFFFFFFFF = FFFFFFFF00000001FFFFFFFFFFFFFFFF -+mhy 8000000000000000 * FFFFFFFFFFFFFFFF = 80000000000000008000000000000000 -+mhy 7FFFFFFFFFFFFFFF * FFFFFFFFFFFFFFFF = 7FFFFFFF000000017FFFFFFFFFFFFFFF -+mfy 0000000000000000 * FFFFFFFFFFFFFFFF = 00000000000000000000000000000000 -+mfy 0000000000000001 * FFFFFFFFFFFFFFFF = 00000000FFFFFFFF00000000FFFFFFFF -+mfy 000000000000FFFF * FFFFFFFFFFFFFFFF = 00000000FFFFFFFF00000000FFFF0001 -+mfy 0000000000007FFF * FFFFFFFFFFFFFFFF = 00000000FFFFFFFF00000000FFFF8001 -+mfy 0000000000008000 * FFFFFFFFFFFFFFFF = 00000000FFFFFFFF00000000FFFF8000 -+mfy 00000000FFFFFFFF * FFFFFFFFFFFFFFFF = 00000000000000000000000000000001 -+mfy 0000000080000000 * FFFFFFFFFFFFFFFF = 00000000000000000000000080000000 -+mfy 000000007FFFFFFF * FFFFFFFFFFFFFFFF = 00000000FFFFFFFF0000000080000001 -+mfy FFFFFFFFFFFFFFFF * FFFFFFFFFFFFFFFF = FFFFFFFF00000000FFFFFFFF00000001 -+mfy 8000000000000000 * FFFFFFFFFFFFFFFF = 80000000000000008000000000000000 -+mfy 7FFFFFFFFFFFFFFF * FFFFFFFFFFFFFFFF = 7FFFFFFF000000007FFFFFFF00000001 -+mhy 0000000000000000 * 7FFFFFFF00000000 = 00000000000000000000000000000000 -+mhy 0000000000000001 * 7FFFFFFF00000000 = 0000000000007FFF0000000000000001 -+mhy 000000000000FFFF * 7FFFFFFF00000000 = 000000007FFE8001000000000000FFFF -+mhy 0000000000007FFF * 7FFFFFFF00000000 = 000000003FFF00010000000000007FFF -+mhy 0000000000008000 * 7FFFFFFF00000000 = 000000003FFF80000000000000008000 -+mhy 00000000FFFFFFFF * 7FFFFFFF00000000 = 00000000FFFF800100000000FFFFFFFF -+mhy 0000000080000000 * 7FFFFFFF00000000 = 00000000800000000000000080000000 -+mhy 000000007FFFFFFF * 7FFFFFFF00000000 = 000000007FFF8001000000007FFFFFFF -+mhy FFFFFFFFFFFFFFFF * 7FFFFFFF00000000 = FFFFFFFFFFFF8001FFFFFFFFFFFFFFFF -+mhy 8000000000000000 * 7FFFFFFF00000000 = 80000000000000008000000000000000 -+mhy 7FFFFFFFFFFFFFFF * 7FFFFFFF00000000 = 7FFFFFFFFFFF80017FFFFFFFFFFFFFFF -+mfy 0000000000000000 * 7FFFFFFF00000000 = 00000000000000000000000000000000 -+mfy 0000000000000001 * 7FFFFFFF00000000 = 0000000000000000000000007FFFFFFF -+mfy 000000000000FFFF * 7FFFFFFF00000000 = 0000000000007FFF000000007FFF0001 -+mfy 0000000000007FFF * 7FFFFFFF00000000 = 0000000000003FFF000000007FFF8001 -+mfy 0000000000008000 * 7FFFFFFF00000000 = 0000000000003FFF00000000FFFF8000 -+mfy 00000000FFFFFFFF * 7FFFFFFF00000000 = 00000000FFFFFFFF0000000080000001 -+mfy 0000000080000000 * 7FFFFFFF00000000 = 00000000C00000000000000080000000 -+mfy 000000007FFFFFFF * 7FFFFFFF00000000 = 000000003FFFFFFF0000000000000001 -+mfy FFFFFFFFFFFFFFFF * 7FFFFFFF00000000 = FFFFFFFFFFFFFFFFFFFFFFFF80000001 -+mfy 8000000000000000 * 7FFFFFFF00000000 = 80000000000000008000000000000000 -+mfy 7FFFFFFFFFFFFFFF * 7FFFFFFF00000000 = 7FFFFFFFFFFFFFFF7FFFFFFF80000001 -+mhy 0000000000000000 * 8000000000000000 = 00000000000000000000000000000000 -+mhy 0000000000000001 * 8000000000000000 = 00000000FFFF80000000000000000001 -+mhy 000000000000FFFF * 8000000000000000 = 0000000080008000000000000000FFFF -+mhy 0000000000007FFF * 8000000000000000 = 00000000C00080000000000000007FFF -+mhy 0000000000008000 * 8000000000000000 = 00000000C00000000000000000008000 -+mhy 00000000FFFFFFFF * 8000000000000000 = 000000000000800000000000FFFFFFFF -+mhy 0000000080000000 * 8000000000000000 = 00000000000000000000000080000000 -+mhy 000000007FFFFFFF * 8000000000000000 = 0000000000008000000000007FFFFFFF -+mhy FFFFFFFFFFFFFFFF * 8000000000000000 = FFFFFFFF00008000FFFFFFFFFFFFFFFF -+mhy 8000000000000000 * 8000000000000000 = 80000000000000008000000000000000 -+mhy 7FFFFFFFFFFFFFFF * 8000000000000000 = 7FFFFFFF000080007FFFFFFFFFFFFFFF -+mfy 0000000000000000 * 8000000000000000 = 00000000000000000000000000000000 -+mfy 0000000000000001 * 8000000000000000 = 00000000FFFFFFFF0000000080000000 -+mfy 000000000000FFFF * 8000000000000000 = 00000000FFFF80000000000080000000 -+mfy 0000000000007FFF * 8000000000000000 = 00000000FFFFC0000000000080000000 -+mfy 0000000000008000 * 8000000000000000 = 00000000FFFFC0000000000000000000 -+mfy 00000000FFFFFFFF * 8000000000000000 = 00000000000000000000000080000000 -+mfy 0000000080000000 * 8000000000000000 = 00000000400000000000000000000000 -+mfy 000000007FFFFFFF * 8000000000000000 = 00000000C00000000000000080000000 -+mfy FFFFFFFFFFFFFFFF * 8000000000000000 = FFFFFFFF00000000FFFFFFFF80000000 -+mfy 8000000000000000 * 8000000000000000 = 80000000000000008000000000000000 -+mfy 7FFFFFFFFFFFFFFF * 8000000000000000 = 7FFFFFFF000000007FFFFFFF80000000 -+mhy 0000000000000000 * FFFFFFFF00000000 = 00000000000000000000000000000000 -+mhy 0000000000000001 * FFFFFFFF00000000 = 00000000FFFFFFFF0000000000000001 -+mhy 000000000000FFFF * FFFFFFFF00000000 = 00000000FFFF0001000000000000FFFF -+mhy 0000000000007FFF * FFFFFFFF00000000 = 00000000FFFF80010000000000007FFF -+mhy 0000000000008000 * FFFFFFFF00000000 = 00000000FFFF80000000000000008000 -+mhy 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8000000000000000 * 000000007FFFFFFF = 80000000000000008000000000000000 -+mhy 7FFFFFFFFFFFFFFF * 000000007FFFFFFF = 7FFFFFFF000000007FFFFFFFFFFFFFFF -+mfy 0000000000000000 * 000000007FFFFFFF = 00000000000000000000000000000000 -+mfy 0000000000000001 * 000000007FFFFFFF = 00000000000000000000000000000000 -+mfy 000000000000FFFF * 000000007FFFFFFF = 00000000000000000000000000000000 -+mfy 0000000000007FFF * 000000007FFFFFFF = 00000000000000000000000000000000 -+mfy 0000000000008000 * 000000007FFFFFFF = 00000000000000000000000000000000 -+mfy 00000000FFFFFFFF * 000000007FFFFFFF = 00000000000000000000000000000000 -+mfy 0000000080000000 * 000000007FFFFFFF = 00000000000000000000000000000000 -+mfy 000000007FFFFFFF * 000000007FFFFFFF = 00000000000000000000000000000000 -+mfy FFFFFFFFFFFFFFFF * 000000007FFFFFFF = FFFFFFFF00000000FFFFFFFF00000000 -+mfy 8000000000000000 * 000000007FFFFFFF = 80000000000000008000000000000000 -+mfy 7FFFFFFFFFFFFFFF * 000000007FFFFFFF = 7FFFFFFF000000007FFFFFFF00000000 -+mhy 0000000000000000 * 0000000080000000 = 00000000000000000000000000000000 -+mhy 0000000000000001 * 0000000080000000 = 00000000000000000000000000000001 -+mhy 000000000000FFFF * 0000000080000000 = 0000000000000000000000000000FFFF -+mhy 0000000000007FFF * 0000000080000000 = 00000000000000000000000000007FFF -+mhy 0000000000008000 * 0000000080000000 = 00000000000000000000000000008000 -+mhy 00000000FFFFFFFF * 0000000080000000 = 000000000000000000000000FFFFFFFF -+mhy 0000000080000000 * 0000000080000000 = 00000000000000000000000080000000 -+mhy 000000007FFFFFFF * 0000000080000000 = 0000000000000000000000007FFFFFFF -+mhy FFFFFFFFFFFFFFFF * 0000000080000000 = FFFFFFFF00000000FFFFFFFFFFFFFFFF -+mhy 8000000000000000 * 0000000080000000 = 80000000000000008000000000000000 -+mhy 7FFFFFFFFFFFFFFF * 0000000080000000 = 7FFFFFFF000000007FFFFFFFFFFFFFFF -+mfy 0000000000000000 * 0000000080000000 = 00000000000000000000000000000000 -+mfy 0000000000000001 * 0000000080000000 = 00000000000000000000000000000000 -+mfy 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FFFFFFFFFFFFFFFF * 000000000000FFFF = FFFFFFFF00000000FFFFFFFFFFFFFFFF -+mhy 8000000000000000 * 000000000000FFFF = 80000000000000008000000000000000 -+mhy 7FFFFFFFFFFFFFFF * 000000000000FFFF = 7FFFFFFF000000007FFFFFFFFFFFFFFF -+mfy 0000000000000000 * 000000000000FFFF = 00000000000000000000000000000000 -+mfy 0000000000000001 * 000000000000FFFF = 00000000000000000000000000000000 -+mfy 000000000000FFFF * 000000000000FFFF = 00000000000000000000000000000000 -+mfy 0000000000007FFF * 000000000000FFFF = 00000000000000000000000000000000 -+mfy 0000000000008000 * 000000000000FFFF = 00000000000000000000000000000000 -+mfy 00000000FFFFFFFF * 000000000000FFFF = 00000000000000000000000000000000 -+mfy 0000000080000000 * 000000000000FFFF = 00000000000000000000000000000000 -+mfy 000000007FFFFFFF * 000000000000FFFF = 00000000000000000000000000000000 -+mfy FFFFFFFFFFFFFFFF * 000000000000FFFF = FFFFFFFF00000000FFFFFFFF00000000 -+mfy 8000000000000000 * 000000000000FFFF = 80000000000000008000000000000000 -+mfy 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0000000000007FFF * 0000000000008000 = 00000000000000000000000000007FFF -+mhy 0000000000008000 * 0000000000008000 = 00000000000000000000000000008000 -+mhy 00000000FFFFFFFF * 0000000000008000 = 000000000000000000000000FFFFFFFF -+mhy 0000000080000000 * 0000000000008000 = 00000000000000000000000080000000 -+mhy 000000007FFFFFFF * 0000000000008000 = 0000000000000000000000007FFFFFFF -+mhy FFFFFFFFFFFFFFFF * 0000000000008000 = FFFFFFFF00000000FFFFFFFFFFFFFFFF -+mhy 8000000000000000 * 0000000000008000 = 80000000000000008000000000000000 -+mhy 7FFFFFFFFFFFFFFF * 0000000000008000 = 7FFFFFFF000000007FFFFFFFFFFFFFFF -+mfy 0000000000000000 * 0000000000008000 = 00000000000000000000000000000000 -+mfy 0000000000000001 * 0000000000008000 = 00000000000000000000000000000000 -+mfy 000000000000FFFF * 0000000000008000 = 00000000000000000000000000000000 -+mfy 0000000000007FFF * 0000000000008000 = 00000000000000000000000000000000 -+mfy 0000000000008000 * 0000000000008000 = 00000000000000000000000000000000 -+mfy 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8000000000000000 * 000000000000FFFF = 80000000000000008000000000000000 -+mfy 7FFFFFFFFFFFFFFF * 000000000000FFFF = 7FFFFFFF000000007FFFFFFF00000000 -+msfi 0000000000000000 * 0000000000000000 = 00000000000000000000000000000000 -+msfi 0000000000000001 * 0000000000000000 = 00000000000000000000000000000001 -+msfi 000000000000FFFF * 0000000000000000 = 0000000000000000000000000000FFFF -+msfi 0000000000007FFF * 0000000000000000 = 00000000000000000000000000007FFF -+msfi 0000000000008000 * 0000000000000000 = 00000000000000000000000000008000 -+msfi 00000000FFFFFFFF * 0000000000000000 = 000000000000000000000000FFFFFFFF -+msfi 0000000080000000 * 0000000000000000 = 00000000000000000000000080000000 -+msfi 000000007FFFFFFF * 0000000000000000 = 0000000000000000000000007FFFFFFF -+msfi FFFFFFFFFFFFFFFF * 0000000000000000 = FFFFFFFF00000000FFFFFFFFFFFFFFFF -+msfi 8000000000000000 * 0000000000000000 = 80000000000000008000000000000000 -+msfi 7FFFFFFFFFFFFFFF * 0000000000000000 = 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0000000000007FFF = 00000000800000000000000080000000 -+msfi 000000007FFFFFFF * 0000000000007FFF = 000000007FFF8001000000007FFFFFFF -+msfi FFFFFFFFFFFFFFFF * 0000000000007FFF = FFFFFFFFFFFF8001FFFFFFFFFFFFFFFF -+msfi 8000000000000000 * 0000000000007FFF = 80000000000000008000000000000000 -+msfi 7FFFFFFFFFFFFFFF * 0000000000007FFF = 7FFFFFFFFFFF80017FFFFFFFFFFFFFFF -+msfi 0000000000000000 * FFFFFFFF80000000 = 00000000000000000000000000000000 -+msfi 0000000000000001 * FFFFFFFF80000000 = 00000000800000000000000000000001 -+msfi 000000000000FFFF * FFFFFFFF80000000 = 0000000080000000000000000000FFFF -+msfi 0000000000007FFF * FFFFFFFF80000000 = 00000000800000000000000000007FFF -+msfi 0000000000008000 * FFFFFFFF80000000 = 00000000000000000000000000008000 -+msfi 00000000FFFFFFFF * FFFFFFFF80000000 = 000000008000000000000000FFFFFFFF -+msfi 0000000080000000 * FFFFFFFF80000000 = 00000000000000000000000080000000 -+msfi 000000007FFFFFFF * FFFFFFFF80000000 = 0000000080000000000000007FFFFFFF -+msfi FFFFFFFFFFFFFFFF * FFFFFFFF80000000 = FFFFFFFF80000000FFFFFFFFFFFFFFFF -+msfi 8000000000000000 * FFFFFFFF80000000 = 80000000000000008000000000000000 -+msfi 7FFFFFFFFFFFFFFF * FFFFFFFF80000000 = 7FFFFFFF800000007FFFFFFFFFFFFFFF -+msfi 0000000000000000 * 000000007FFFFFFF = 00000000000000000000000000000000 -+msfi 0000000000000001 * 000000007FFFFFFF = 000000007FFFFFFF0000000000000001 -+msfi 000000000000FFFF * 000000007FFFFFFF = 000000007FFF0001000000000000FFFF -+msfi 0000000000007FFF * 000000007FFFFFFF = 000000007FFF80010000000000007FFF -+msfi 0000000000008000 * 000000007FFFFFFF = 00000000FFFF80000000000000008000 -+msfi 00000000FFFFFFFF * 000000007FFFFFFF = 000000008000000100000000FFFFFFFF -+msfi 0000000080000000 * 000000007FFFFFFF = 00000000800000000000000080000000 -+msfi 000000007FFFFFFF * 000000007FFFFFFF = 0000000000000001000000007FFFFFFF -+msfi FFFFFFFFFFFFFFFF * 000000007FFFFFFF = FFFFFFFF80000001FFFFFFFFFFFFFFFF -+msfi 8000000000000000 * 000000007FFFFFFF = 80000000000000008000000000000000 -+msfi 7FFFFFFFFFFFFFFF * 000000007FFFFFFF = 7FFFFFFF800000017FFFFFFFFFFFFFFF -+msgfi 0000000000000000 * 0000000000000000 = 00000000000000000000000000000000 -+msgfi 0000000000000001 * 0000000000000000 = 00000000000000000000000000000001 -+msgfi 000000000000FFFF * 0000000000000000 = 0000000000000000000000000000FFFF -+msgfi 0000000000007FFF * 0000000000000000 = 00000000000000000000000000007FFF -+msgfi 0000000000008000 * 0000000000000000 = 00000000000000000000000000008000 -+msgfi 00000000FFFFFFFF * 0000000000000000 = 000000000000000000000000FFFFFFFF -+msgfi 0000000080000000 * 0000000000000000 = 00000000000000000000000080000000 -+msgfi 000000007FFFFFFF * 0000000000000000 = 0000000000000000000000007FFFFFFF -+msgfi FFFFFFFFFFFFFFFF * 0000000000000000 = 0000000000000000FFFFFFFFFFFFFFFF -+msgfi 8000000000000000 * 0000000000000000 = 00000000000000008000000000000000 -+msgfi 7FFFFFFFFFFFFFFF * 0000000000000000 = 00000000000000007FFFFFFFFFFFFFFF -+msgfi 0000000000000000 * FFFFFFFFFFFFFFFF = 00000000000000000000000000000000 -+msgfi 0000000000000001 * FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF0000000000000001 -+msgfi 000000000000FFFF * FFFFFFFFFFFFFFFF = FFFFFFFFFFFF0001000000000000FFFF -+msgfi 0000000000007FFF * FFFFFFFFFFFFFFFF = FFFFFFFFFFFF80010000000000007FFF -+msgfi 0000000000008000 * FFFFFFFFFFFFFFFF = FFFFFFFFFFFF80000000000000008000 -+msgfi 00000000FFFFFFFF * FFFFFFFFFFFFFFFF = FFFFFFFF0000000100000000FFFFFFFF -+msgfi 0000000080000000 * FFFFFFFFFFFFFFFF = FFFFFFFF800000000000000080000000 -+msgfi 000000007FFFFFFF * FFFFFFFFFFFFFFFF = FFFFFFFF80000001000000007FFFFFFF -+msgfi FFFFFFFFFFFFFFFF * FFFFFFFFFFFFFFFF = 0000000000000001FFFFFFFFFFFFFFFF -+msgfi 8000000000000000 * FFFFFFFFFFFFFFFF = 80000000000000008000000000000000 -+msgfi 7FFFFFFFFFFFFFFF * FFFFFFFFFFFFFFFF = 80000000000000017FFFFFFFFFFFFFFF -+msgfi 0000000000000000 * FFFFFFFFFFFF8000 = 00000000000000000000000000000000 -+msgfi 0000000000000001 * FFFFFFFFFFFF8000 = FFFFFFFFFFFF80000000000000000001 -+msgfi 000000000000FFFF * FFFFFFFFFFFF8000 = FFFFFFFF80008000000000000000FFFF -+msgfi 0000000000007FFF * FFFFFFFFFFFF8000 = FFFFFFFFC00080000000000000007FFF -+msgfi 0000000000008000 * FFFFFFFFFFFF8000 = FFFFFFFFC00000000000000000008000 -+msgfi 00000000FFFFFFFF * FFFFFFFFFFFF8000 = FFFF80000000800000000000FFFFFFFF -+msgfi 0000000080000000 * FFFFFFFFFFFF8000 = FFFFC000000000000000000080000000 -+msgfi 000000007FFFFFFF * FFFFFFFFFFFF8000 = FFFFC00000008000000000007FFFFFFF -+msgfi FFFFFFFFFFFFFFFF * FFFFFFFFFFFF8000 = 0000000000008000FFFFFFFFFFFFFFFF -+msgfi 8000000000000000 * FFFFFFFFFFFF8000 = 00000000000000008000000000000000 -+msgfi 7FFFFFFFFFFFFFFF * FFFFFFFFFFFF8000 = 00000000000080007FFFFFFFFFFFFFFF -+msgfi 0000000000000000 * 0000000000007FFF = 00000000000000000000000000000000 -+msgfi 0000000000000001 * 0000000000007FFF = 0000000000007FFF0000000000000001 -+msgfi 000000000000FFFF * 0000000000007FFF = 000000007FFE8001000000000000FFFF -+msgfi 0000000000007FFF * 0000000000007FFF = 000000003FFF00010000000000007FFF -+msgfi 0000000000008000 * 0000000000007FFF = 000000003FFF80000000000000008000 -+msgfi 00000000FFFFFFFF * 0000000000007FFF = 00007FFEFFFF800100000000FFFFFFFF -+msgfi 0000000080000000 * 0000000000007FFF = 00003FFF800000000000000080000000 -+msgfi 000000007FFFFFFF * 0000000000007FFF = 00003FFF7FFF8001000000007FFFFFFF -+msgfi FFFFFFFFFFFFFFFF * 0000000000007FFF = FFFFFFFFFFFF8001FFFFFFFFFFFFFFFF -+msgfi 8000000000000000 * 0000000000007FFF = 80000000000000008000000000000000 -+msgfi 7FFFFFFFFFFFFFFF * 0000000000007FFF = 7FFFFFFFFFFF80017FFFFFFFFFFFFFFF -+msgfi 0000000000000000 * 0000000000007FFF = 00000000000000000000000000000000 -+msgfi 0000000000000001 * 0000000000007FFF = 0000000000007FFF0000000000000001 -+msgfi 000000000000FFFF * 0000000000007FFF = 000000007FFE8001000000000000FFFF -+msgfi 0000000000007FFF * 0000000000007FFF = 000000003FFF00010000000000007FFF -+msgfi 0000000000008000 * 0000000000007FFF = 000000003FFF80000000000000008000 -+msgfi 00000000FFFFFFFF * 0000000000007FFF = 00007FFEFFFF800100000000FFFFFFFF -+msgfi 0000000080000000 * 0000000000007FFF = 00003FFF800000000000000080000000 -+msgfi 000000007FFFFFFF * 0000000000007FFF = 00003FFF7FFF8001000000007FFFFFFF -+msgfi FFFFFFFFFFFFFFFF * 0000000000007FFF = FFFFFFFFFFFF8001FFFFFFFFFFFFFFFF -+msgfi 8000000000000000 * 0000000000007FFF = 80000000000000008000000000000000 -+msgfi 7FFFFFFFFFFFFFFF * 0000000000007FFF = 7FFFFFFFFFFF80017FFFFFFFFFFFFFFF -+msgfi 0000000000000000 * 0000000000007FFF = 00000000000000000000000000000000 -+msgfi 0000000000000001 * 0000000000007FFF = 0000000000007FFF0000000000000001 -+msgfi 000000000000FFFF * 0000000000007FFF = 000000007FFE8001000000000000FFFF -+msgfi 0000000000007FFF * 0000000000007FFF = 000000003FFF00010000000000007FFF -+msgfi 0000000000008000 * 0000000000007FFF = 000000003FFF80000000000000008000 -+msgfi 00000000FFFFFFFF * 0000000000007FFF = 00007FFEFFFF800100000000FFFFFFFF -+msgfi 0000000080000000 * 0000000000007FFF = 00003FFF800000000000000080000000 -+msgfi 000000007FFFFFFF * 0000000000007FFF = 00003FFF7FFF8001000000007FFFFFFF -+msgfi FFFFFFFFFFFFFFFF * 0000000000007FFF = FFFFFFFFFFFF8001FFFFFFFFFFFFFFFF -+msgfi 8000000000000000 * 0000000000007FFF = 80000000000000008000000000000000 -+msgfi 7FFFFFFFFFFFFFFF * 0000000000007FFF = 7FFFFFFFFFFF80017FFFFFFFFFFFFFFF -+msgfi 0000000000000000 * FFFFFFFF80000000 = 00000000000000000000000000000000 -+msgfi 0000000000000001 * FFFFFFFF80000000 = FFFFFFFF800000000000000000000001 -+msgfi 000000000000FFFF * FFFFFFFF80000000 = FFFF800080000000000000000000FFFF -+msgfi 0000000000007FFF * FFFFFFFF80000000 = FFFFC000800000000000000000007FFF -+msgfi 0000000000008000 * FFFFFFFF80000000 = FFFFC000000000000000000000008000 -+msgfi 00000000FFFFFFFF * FFFFFFFF80000000 = 800000008000000000000000FFFFFFFF -+msgfi 0000000080000000 * FFFFFFFF80000000 = C0000000000000000000000080000000 -+msgfi 000000007FFFFFFF * FFFFFFFF80000000 = C000000080000000000000007FFFFFFF -+msgfi FFFFFFFFFFFFFFFF * FFFFFFFF80000000 = 0000000080000000FFFFFFFFFFFFFFFF -+msgfi 8000000000000000 * FFFFFFFF80000000 = 00000000000000008000000000000000 -+msgfi 7FFFFFFFFFFFFFFF * FFFFFFFF80000000 = 00000000800000007FFFFFFFFFFFFFFF -+msgfi 0000000000000000 * 000000007FFFFFFF = 00000000000000000000000000000000 -+msgfi 0000000000000001 * 000000007FFFFFFF = 000000007FFFFFFF0000000000000001 -+msgfi 000000000000FFFF * 000000007FFFFFFF = 00007FFF7FFF0001000000000000FFFF -+msgfi 0000000000007FFF * 000000007FFFFFFF = 00003FFF7FFF80010000000000007FFF -+msgfi 0000000000008000 * 000000007FFFFFFF = 00003FFFFFFF80000000000000008000 -+msgfi 00000000FFFFFFFF * 000000007FFFFFFF = 7FFFFFFE8000000100000000FFFFFFFF -+msgfi 0000000080000000 * 000000007FFFFFFF = 3FFFFFFF800000000000000080000000 -+msgfi 000000007FFFFFFF * 000000007FFFFFFF = 3FFFFFFF00000001000000007FFFFFFF -+msgfi FFFFFFFFFFFFFFFF * 000000007FFFFFFF = FFFFFFFF80000001FFFFFFFFFFFFFFFF -+msgfi 8000000000000000 * 000000007FFFFFFF = 80000000000000008000000000000000 -+msgfi 7FFFFFFFFFFFFFFF * 000000007FFFFFFF = 7FFFFFFF800000017FFFFFFFFFFFFFFF ---- none/tests/s390x/mul_GE.vgtest -+++ none/tests/s390x/mul_GE.vgtest -@@ -0,0 +1,2 @@ -+prog: mul_GE -+prereq: test -x mul_GE ---- none/tests/s390x/mul.h -+++ none/tests/s390x/mul.h -@@ -0,0 +1,92 @@ -+#include -+ -+#define MUL_REG_MEM(insn, m1, m2) \ -+({ \ -+ unsigned long tmp1 = m1; \ -+ unsigned long tmp2 = m1; \ -+ asm volatile( "lgr 2, %0\n" \ -+ "lgr 3, %1\n" \ -+ #insn " 2, %2\n" \ -+ "lgr %0,2\n" \ -+ "lgr %1,3\n" \ -+ : "+d" (tmp1), "+d" (tmp2) \ -+ : "Q" (m2) \ -+ : "2","3"); \ -+ printf(#insn " %16.16lX * %16.16lX = %16.16lX%16.16lX\n", m1, m2, tmp1, tmp2); \ -+}) -+ -+#define MUL_REG_REG(insn, m1, m2) \ -+({ \ -+ unsigned long tmp1 = m1; \ -+ unsigned long tmp2 = m1; \ -+ asm volatile( "lgr 2, %0\n" \ -+ "lgr 3, %1\n" \ -+ #insn " 2, %2\n" \ -+ "lgr %0,2\n" \ -+ "lgr %1,3\n" \ -+ : "+d" (tmp1), "+d" (tmp2) \ -+ : "d" (m2) \ -+ : "2","3"); \ -+ printf(#insn " %16.16lX * %16.16lX = %16.16lX%16.16lX\n", m1, m2, tmp1, tmp2); \ -+}) -+ -+#define MUL_REG_IMM(insn, m1, m2) \ -+({ \ -+ unsigned long tmp1 = m1; \ -+ unsigned long tmp2 = m1; \ -+ asm volatile( "lgr 2, %0\n" \ -+ "lgr 3, %1\n" \ -+ #insn " 2, " #m2 "\n" \ -+ "lgr %0,2\n" \ -+ "lgr %1,3\n" \ -+ : "+d" (tmp1), "+d" (tmp2) \ -+ :: "2","3"); \ -+ printf(#insn " %16.16lX * %16.16lX = %16.16lX%16.16lX\n", m1, (unsigned long) m2, tmp1, tmp2); \ -+}) -+ -+ -+#define memsweep(i, m2) \ -+({ \ -+ MUL_REG_MEM(i, 0ul, m2); \ -+ MUL_REG_MEM(i, 1ul, m2); \ -+ MUL_REG_MEM(i, 0xfffful, m2); \ -+ MUL_REG_MEM(i, 0x7ffful, m2); \ -+ MUL_REG_MEM(i, 0x8000ul, m2); \ -+ MUL_REG_MEM(i, 0xfffffffful, m2); \ -+ MUL_REG_MEM(i, 0x80000000ul, m2); \ -+ MUL_REG_MEM(i, 0x7ffffffful, m2); \ -+ MUL_REG_MEM(i, 0xfffffffffffffffful, m2); \ -+ MUL_REG_MEM(i, 0x8000000000000000ul, m2); \ -+ MUL_REG_MEM(i, 0x7ffffffffffffffful, m2); \ -+}) -+ -+#define regsweep(i, m2) \ -+({ \ -+ MUL_REG_REG(i, 0ul, m2); \ -+ MUL_REG_REG(i, 1ul, m2); \ -+ MUL_REG_REG(i, 0xfffful, m2); \ -+ MUL_REG_REG(i, 0x7ffful, m2); \ -+ MUL_REG_REG(i, 0x8000ul, m2); \ -+ MUL_REG_REG(i, 0xfffffffful, m2); \ -+ MUL_REG_REG(i, 0x80000000ul, m2); \ -+ MUL_REG_REG(i, 0x7ffffffful, m2); \ -+ MUL_REG_REG(i, 0xfffffffffffffffful, m2); \ -+ MUL_REG_REG(i, 0x8000000000000000ul, m2); \ -+ MUL_REG_REG(i, 0x7ffffffffffffffful, m2); \ -+}) -+ -+#define immsweep(i, m2) \ -+({ \ -+ MUL_REG_IMM(i, 0ul, m2); \ -+ MUL_REG_IMM(i, 1ul, m2); \ -+ MUL_REG_IMM(i, 0xfffful, m2); \ -+ MUL_REG_IMM(i, 0x7ffful, m2); \ -+ MUL_REG_IMM(i, 0x8000ul, m2); \ -+ MUL_REG_IMM(i, 0xfffffffful, m2); \ -+ MUL_REG_IMM(i, 0x80000000ul, m2); \ -+ MUL_REG_IMM(i, 0x7ffffffful, m2); \ -+ MUL_REG_IMM(i, 0xfffffffffffffffful, m2); \ -+ MUL_REG_IMM(i, 0x8000000000000000ul, m2); \ -+ MUL_REG_IMM(i, 0x7ffffffffffffffful, m2); \ -+}) -+ ---- none/tests/s390x/mul.stderr.exp -+++ none/tests/s390x/mul.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/mul.stdout.exp -+++ none/tests/s390x/mul.stdout.exp -@@ -0,0 +1,2244 @@ -+m 0000000000000000 * 0000000000000000 = 00000000000000000000000000000000 -+m 0000000000000001 * 0000000000000000 = 00000000000000000000000000000000 -+m 000000000000FFFF * 0000000000000000 = 00000000000000000000000000000000 -+m 0000000000007FFF * 0000000000000000 = 00000000000000000000000000000000 -+m 0000000000008000 * 0000000000000000 = 00000000000000000000000000000000 -+m 00000000FFFFFFFF * 0000000000000000 = 00000000000000000000000000000000 -+m 0000000080000000 * 0000000000000000 = 00000000000000000000000000000000 -+m 000000007FFFFFFF * 0000000000000000 = 00000000000000000000000000000000 -+m FFFFFFFFFFFFFFFF * 0000000000000000 = FFFFFFFF00000000FFFFFFFF00000000 -+m 8000000000000000 * 0000000000000000 = 80000000000000008000000000000000 -+m 7FFFFFFFFFFFFFFF * 0000000000000000 = 7FFFFFFF000000007FFFFFFF00000000 -+mr 0000000000000000 * 0000000000000000 = 00000000000000000000000000000000 -+mr 0000000000000001 * 0000000000000000 = 00000000000000000000000000000000 -+mr 000000000000FFFF * 0000000000000000 = 00000000000000000000000000000000 -+mr 0000000000007FFF * 0000000000000000 = 00000000000000000000000000000000 -+mr 0000000000008000 * 0000000000000000 = 00000000000000000000000000000000 -+mr 00000000FFFFFFFF * 0000000000000000 = 00000000000000000000000000000000 -+mr 0000000080000000 * 0000000000000000 = 00000000000000000000000000000000 -+mr 000000007FFFFFFF * 0000000000000000 = 00000000000000000000000000000000 -+mr FFFFFFFFFFFFFFFF * 0000000000000000 = FFFFFFFF00000000FFFFFFFF00000000 -+mr 8000000000000000 * 0000000000000000 = 80000000000000008000000000000000 -+mr 7FFFFFFFFFFFFFFF * 0000000000000000 = 7FFFFFFF000000007FFFFFFF00000000 -+mh 0000000000000000 * 0000000000000000 = 00000000000000000000000000000000 -+mh 0000000000000001 * 0000000000000000 = 00000000000000000000000000000001 -+mh 000000000000FFFF * 0000000000000000 = 0000000000000000000000000000FFFF -+mh 0000000000007FFF * 0000000000000000 = 00000000000000000000000000007FFF -+mh 0000000000008000 * 0000000000000000 = 00000000000000000000000000008000 -+mh 00000000FFFFFFFF * 0000000000000000 = 000000000000000000000000FFFFFFFF -+mh 0000000080000000 * 0000000000000000 = 00000000000000000000000080000000 -+mh 000000007FFFFFFF * 0000000000000000 = 0000000000000000000000007FFFFFFF -+mh FFFFFFFFFFFFFFFF * 0000000000000000 = FFFFFFFF00000000FFFFFFFFFFFFFFFF -+mh 8000000000000000 * 0000000000000000 = 80000000000000008000000000000000 -+mh 7FFFFFFFFFFFFFFF * 0000000000000000 = 7FFFFFFF000000007FFFFFFFFFFFFFFF -+mlg 0000000000000000 * 0000000000000000 = 00000000000000000000000000000000 -+mlg 0000000000000001 * 0000000000000000 = 00000000000000000000000000000000 -+mlg 000000000000FFFF * 0000000000000000 = 00000000000000000000000000000000 -+mlg 0000000000007FFF * 0000000000000000 = 00000000000000000000000000000000 -+mlg 0000000000008000 * 0000000000000000 = 00000000000000000000000000000000 -+mlg 00000000FFFFFFFF * 0000000000000000 = 00000000000000000000000000000000 -+mlg 0000000080000000 * 0000000000000000 = 00000000000000000000000000000000 -+mlg 000000007FFFFFFF * 0000000000000000 = 00000000000000000000000000000000 -+mlg FFFFFFFFFFFFFFFF * 0000000000000000 = 00000000000000000000000000000000 -+mlg 8000000000000000 * 0000000000000000 = 00000000000000000000000000000000 -+mlg 7FFFFFFFFFFFFFFF * 0000000000000000 = 00000000000000000000000000000000 -+mlgr 0000000000000000 * 0000000000000000 = 00000000000000000000000000000000 -+mlgr 0000000000000001 * 0000000000000000 = 00000000000000000000000000000000 -+mlgr 000000000000FFFF * 0000000000000000 = 00000000000000000000000000000000 -+mlgr 0000000000007FFF * 0000000000000000 = 00000000000000000000000000000000 -+mlgr 0000000000008000 * 0000000000000000 = 00000000000000000000000000000000 -+mlgr 00000000FFFFFFFF * 0000000000000000 = 00000000000000000000000000000000 -+mlgr 0000000080000000 * 0000000000000000 = 00000000000000000000000000000000 -+mlgr 000000007FFFFFFF * 0000000000000000 = 00000000000000000000000000000000 -+mlgr FFFFFFFFFFFFFFFF * 0000000000000000 = 00000000000000000000000000000000 -+mlgr 8000000000000000 * 0000000000000000 = 00000000000000000000000000000000 -+mlgr 7FFFFFFFFFFFFFFF * 0000000000000000 = 00000000000000000000000000000000 -+ml 0000000000000000 * 0000000000000000 = 00000000000000000000000000000000 -+ml 0000000000000001 * 0000000000000000 = 00000000000000000000000000000000 -+ml 000000000000FFFF * 0000000000000000 = 00000000000000000000000000000000 -+ml 0000000000007FFF * 0000000000000000 = 00000000000000000000000000000000 -+ml 0000000000008000 * 0000000000000000 = 00000000000000000000000000000000 -+ml 00000000FFFFFFFF * 0000000000000000 = 00000000000000000000000000000000 -+ml 0000000080000000 * 0000000000000000 = 00000000000000000000000000000000 -+ml 000000007FFFFFFF * 0000000000000000 = 00000000000000000000000000000000 -+ml FFFFFFFFFFFFFFFF * 0000000000000000 = FFFFFFFF00000000FFFFFFFF00000000 -+ml 8000000000000000 * 0000000000000000 = 80000000000000008000000000000000 -+ml 7FFFFFFFFFFFFFFF * 0000000000000000 = 7FFFFFFF000000007FFFFFFF00000000 -+mlr 0000000000000000 * 0000000000000000 = 00000000000000000000000000000000 -+mlr 0000000000000001 * 0000000000000000 = 00000000000000000000000000000000 -+mlr 000000000000FFFF * 0000000000000000 = 00000000000000000000000000000000 -+mlr 0000000000007FFF * 0000000000000000 = 00000000000000000000000000000000 -+mlr 0000000000008000 * 0000000000000000 = 00000000000000000000000000000000 -+mlr 00000000FFFFFFFF * 0000000000000000 = 00000000000000000000000000000000 -+mlr 0000000080000000 * 0000000000000000 = 00000000000000000000000000000000 -+mlr 000000007FFFFFFF * 0000000000000000 = 00000000000000000000000000000000 -+mlr FFFFFFFFFFFFFFFF * 0000000000000000 = FFFFFFFF00000000FFFFFFFF00000000 -+mlr 8000000000000000 * 0000000000000000 = 80000000000000008000000000000000 -+mlr 7FFFFFFFFFFFFFFF * 0000000000000000 = 7FFFFFFF000000007FFFFFFF00000000 -+ms 0000000000000000 * 0000000000000000 = 00000000000000000000000000000000 -+ms 0000000000000001 * 0000000000000000 = 00000000000000000000000000000001 -+ms 000000000000FFFF * 0000000000000000 = 0000000000000000000000000000FFFF -+ms 0000000000007FFF * 0000000000000000 = 00000000000000000000000000007FFF -+ms 0000000000008000 * 0000000000000000 = 00000000000000000000000000008000 -+ms 00000000FFFFFFFF * 0000000000000000 = 000000000000000000000000FFFFFFFF -+ms 0000000080000000 * 0000000000000000 = 00000000000000000000000080000000 -+ms 000000007FFFFFFF * 0000000000000000 = 0000000000000000000000007FFFFFFF -+ms FFFFFFFFFFFFFFFF * 0000000000000000 = FFFFFFFF00000000FFFFFFFFFFFFFFFF -+ms 8000000000000000 * 0000000000000000 = 80000000000000008000000000000000 -+ms 7FFFFFFFFFFFFFFF * 0000000000000000 = 7FFFFFFF000000007FFFFFFFFFFFFFFF -+msr 0000000000000000 * 0000000000000000 = 00000000000000000000000000000000 -+msr 0000000000000001 * 0000000000000000 = 00000000000000000000000000000001 -+msr 000000000000FFFF * 0000000000000000 = 0000000000000000000000000000FFFF -+msr 0000000000007FFF * 0000000000000000 = 00000000000000000000000000007FFF -+msr 0000000000008000 * 0000000000000000 = 00000000000000000000000000008000 -+msr 00000000FFFFFFFF * 0000000000000000 = 000000000000000000000000FFFFFFFF -+msr 0000000080000000 * 0000000000000000 = 00000000000000000000000080000000 -+msr 000000007FFFFFFF * 0000000000000000 = 0000000000000000000000007FFFFFFF -+msr FFFFFFFFFFFFFFFF * 0000000000000000 = FFFFFFFF00000000FFFFFFFFFFFFFFFF -+msr 8000000000000000 * 0000000000000000 = 80000000000000008000000000000000 -+msr 7FFFFFFFFFFFFFFF * 0000000000000000 = 7FFFFFFF000000007FFFFFFFFFFFFFFF -+msg 0000000000000000 * 0000000000000000 = 00000000000000000000000000000000 -+msg 0000000000000001 * 0000000000000000 = 00000000000000000000000000000001 -+msg 000000000000FFFF * 0000000000000000 = 0000000000000000000000000000FFFF -+msg 0000000000007FFF * 0000000000000000 = 00000000000000000000000000007FFF -+msg 0000000000008000 * 0000000000000000 = 00000000000000000000000000008000 -+msg 00000000FFFFFFFF * 0000000000000000 = 000000000000000000000000FFFFFFFF -+msg 0000000080000000 * 0000000000000000 = 00000000000000000000000080000000 -+msg 000000007FFFFFFF * 0000000000000000 = 0000000000000000000000007FFFFFFF -+msg FFFFFFFFFFFFFFFF * 0000000000000000 = 0000000000000000FFFFFFFFFFFFFFFF -+msg 8000000000000000 * 0000000000000000 = 00000000000000008000000000000000 -+msg 7FFFFFFFFFFFFFFF * 0000000000000000 = 00000000000000007FFFFFFFFFFFFFFF -+msgr 0000000000000000 * 0000000000000000 = 00000000000000000000000000000000 -+msgr 0000000000000001 * 0000000000000000 = 00000000000000000000000000000001 -+msgr 000000000000FFFF * 0000000000000000 = 0000000000000000000000000000FFFF -+msgr 0000000000007FFF * 0000000000000000 = 00000000000000000000000000007FFF -+msgr 0000000000008000 * 0000000000000000 = 00000000000000000000000000008000 -+msgr 00000000FFFFFFFF * 0000000000000000 = 000000000000000000000000FFFFFFFF -+msgr 0000000080000000 * 0000000000000000 = 00000000000000000000000080000000 -+msgr 000000007FFFFFFF * 0000000000000000 = 0000000000000000000000007FFFFFFF -+msgr FFFFFFFFFFFFFFFF * 0000000000000000 = 0000000000000000FFFFFFFFFFFFFFFF -+msgr 8000000000000000 * 0000000000000000 = 00000000000000008000000000000000 -+msgr 7FFFFFFFFFFFFFFF * 0000000000000000 = 00000000000000007FFFFFFFFFFFFFFF -+msgf 0000000000000000 * 0000000000000000 = 00000000000000000000000000000000 -+msgf 0000000000000001 * 0000000000000000 = 00000000000000000000000000000001 -+msgf 000000000000FFFF * 0000000000000000 = 0000000000000000000000000000FFFF -+msgf 0000000000007FFF * 0000000000000000 = 00000000000000000000000000007FFF -+msgf 0000000000008000 * 0000000000000000 = 00000000000000000000000000008000 -+msgf 00000000FFFFFFFF * 0000000000000000 = 000000000000000000000000FFFFFFFF -+msgf 0000000080000000 * 0000000000000000 = 00000000000000000000000080000000 -+msgf 000000007FFFFFFF * 0000000000000000 = 0000000000000000000000007FFFFFFF -+msgf FFFFFFFFFFFFFFFF * 0000000000000000 = 0000000000000000FFFFFFFFFFFFFFFF -+msgf 8000000000000000 * 0000000000000000 = 00000000000000008000000000000000 -+msgf 7FFFFFFFFFFFFFFF * 0000000000000000 = 00000000000000007FFFFFFFFFFFFFFF -+msgfr 0000000000000000 * 0000000000000000 = 00000000000000000000000000000000 -+msgfr 0000000000000001 * 0000000000000000 = 00000000000000000000000000000001 -+msgfr 000000000000FFFF * 0000000000000000 = 0000000000000000000000000000FFFF -+msgfr 0000000000007FFF * 0000000000000000 = 00000000000000000000000000007FFF -+msgfr 0000000000008000 * 0000000000000000 = 00000000000000000000000000008000 -+msgfr 00000000FFFFFFFF * 0000000000000000 = 000000000000000000000000FFFFFFFF -+msgfr 0000000080000000 * 0000000000000000 = 00000000000000000000000080000000 -+msgfr 000000007FFFFFFF * 0000000000000000 = 0000000000000000000000007FFFFFFF -+msgfr FFFFFFFFFFFFFFFF * 0000000000000000 = 0000000000000000FFFFFFFFFFFFFFFF -+msgfr 8000000000000000 * 0000000000000000 = 00000000000000008000000000000000 -+msgfr 7FFFFFFFFFFFFFFF * 0000000000000000 = 00000000000000007FFFFFFFFFFFFFFF -+msy 0000000000000000 * 0000000000000000 = 00000000000000000000000000000000 -+msy 0000000000000001 * 0000000000000000 = 00000000000000000000000000000001 -+msy 000000000000FFFF * 0000000000000000 = 0000000000000000000000000000FFFF -+msy 0000000000007FFF * 0000000000000000 = 00000000000000000000000000007FFF -+msy 0000000000008000 * 0000000000000000 = 00000000000000000000000000008000 -+msy 00000000FFFFFFFF * 0000000000000000 = 000000000000000000000000FFFFFFFF -+msy 0000000080000000 * 0000000000000000 = 00000000000000000000000080000000 -+msy 000000007FFFFFFF * 0000000000000000 = 0000000000000000000000007FFFFFFF -+msy FFFFFFFFFFFFFFFF * 0000000000000000 = FFFFFFFF00000000FFFFFFFFFFFFFFFF -+msy 8000000000000000 * 0000000000000000 = 80000000000000008000000000000000 -+msy 7FFFFFFFFFFFFFFF * 0000000000000000 = 7FFFFFFF000000007FFFFFFFFFFFFFFF -+m 0000000000000000 * 7FFFFFFFFFFFFFFF = 00000000000000000000000000000000 -+m 0000000000000001 * 7FFFFFFFFFFFFFFF = 0000000000000000000000007FFFFFFF -+m 000000000000FFFF * 7FFFFFFFFFFFFFFF = 0000000000007FFF000000007FFF0001 -+m 0000000000007FFF * 7FFFFFFFFFFFFFFF = 0000000000003FFF000000007FFF8001 -+m 0000000000008000 * 7FFFFFFFFFFFFFFF = 0000000000003FFF00000000FFFF8000 -+m 00000000FFFFFFFF * 7FFFFFFFFFFFFFFF = 00000000FFFFFFFF0000000080000001 -+m 0000000080000000 * 7FFFFFFFFFFFFFFF = 00000000C00000000000000080000000 -+m 000000007FFFFFFF * 7FFFFFFFFFFFFFFF = 000000003FFFFFFF0000000000000001 -+m FFFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFFFFFFFFFF80000001 -+m 8000000000000000 * 7FFFFFFFFFFFFFFF = 80000000000000008000000000000000 -+m 7FFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF7FFFFFFF80000001 -+mr 0000000000000000 * 7FFFFFFFFFFFFFFF = 00000000000000000000000000000000 -+mr 0000000000000001 * 7FFFFFFFFFFFFFFF = 00000000FFFFFFFF00000000FFFFFFFF -+mr 000000000000FFFF * 7FFFFFFFFFFFFFFF = 00000000FFFFFFFF00000000FFFF0001 -+mr 0000000000007FFF * 7FFFFFFFFFFFFFFF = 00000000FFFFFFFF00000000FFFF8001 -+mr 0000000000008000 * 7FFFFFFFFFFFFFFF = 00000000FFFFFFFF00000000FFFF8000 -+mr 00000000FFFFFFFF * 7FFFFFFFFFFFFFFF = 00000000000000000000000000000001 -+mr 0000000080000000 * 7FFFFFFFFFFFFFFF = 00000000000000000000000080000000 -+mr 000000007FFFFFFF * 7FFFFFFFFFFFFFFF = 00000000FFFFFFFF0000000080000001 -+mr FFFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = FFFFFFFF00000000FFFFFFFF00000001 -+mr 8000000000000000 * 7FFFFFFFFFFFFFFF = 80000000000000008000000000000000 -+mr 7FFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = 7FFFFFFF000000007FFFFFFF00000001 -+mh 0000000000000000 * 7FFFFFFFFFFFFFFF = 00000000000000000000000000000000 -+mh 0000000000000001 * 7FFFFFFFFFFFFFFF = 0000000000007FFF0000000000000001 -+mh 000000000000FFFF * 7FFFFFFFFFFFFFFF = 000000007FFE8001000000000000FFFF -+mh 0000000000007FFF * 7FFFFFFFFFFFFFFF = 000000003FFF00010000000000007FFF -+mh 0000000000008000 * 7FFFFFFFFFFFFFFF = 000000003FFF80000000000000008000 -+mh 00000000FFFFFFFF * 7FFFFFFFFFFFFFFF = 00000000FFFF800100000000FFFFFFFF -+mh 0000000080000000 * 7FFFFFFFFFFFFFFF = 00000000800000000000000080000000 -+mh 000000007FFFFFFF * 7FFFFFFFFFFFFFFF = 000000007FFF8001000000007FFFFFFF -+mh FFFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = FFFFFFFFFFFF8001FFFFFFFFFFFFFFFF -+mh 8000000000000000 * 7FFFFFFFFFFFFFFF = 80000000000000008000000000000000 -+mh 7FFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = 7FFFFFFFFFFF80017FFFFFFFFFFFFFFF -+mlg 0000000000000000 * 7FFFFFFFFFFFFFFF = 00000000000000000000000000000000 -+mlg 0000000000000001 * 7FFFFFFFFFFFFFFF = 00000000000000007FFFFFFFFFFFFFFF -+mlg 000000000000FFFF * 7FFFFFFFFFFFFFFF = 0000000000007FFF7FFFFFFFFFFF0001 -+mlg 0000000000007FFF * 7FFFFFFFFFFFFFFF = 0000000000003FFF7FFFFFFFFFFF8001 -+mlg 0000000000008000 * 7FFFFFFFFFFFFFFF = 0000000000003FFFFFFFFFFFFFFF8000 -+mlg 00000000FFFFFFFF * 7FFFFFFFFFFFFFFF = 000000007FFFFFFF7FFFFFFF00000001 -+mlg 0000000080000000 * 7FFFFFFFFFFFFFFF = 000000003FFFFFFFFFFFFFFF80000000 -+mlg 000000007FFFFFFF * 7FFFFFFFFFFFFFFF = 000000003FFFFFFF7FFFFFFF80000001 -+mlg FFFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE8000000000000001 -+mlg 8000000000000000 * 7FFFFFFFFFFFFFFF = 3FFFFFFFFFFFFFFF8000000000000000 -+mlg 7FFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = 3FFFFFFFFFFFFFFF0000000000000001 -+mlgr 0000000000000000 * 7FFFFFFFFFFFFFFF = 00000000000000000000000000000000 -+mlgr 0000000000000001 * 7FFFFFFFFFFFFFFF = 00000000000000007FFFFFFFFFFFFFFF -+mlgr 000000000000FFFF * 7FFFFFFFFFFFFFFF = 0000000000007FFF7FFFFFFFFFFF0001 -+mlgr 0000000000007FFF * 7FFFFFFFFFFFFFFF = 0000000000003FFF7FFFFFFFFFFF8001 -+mlgr 0000000000008000 * 7FFFFFFFFFFFFFFF = 0000000000003FFFFFFFFFFFFFFF8000 -+mlgr 00000000FFFFFFFF * 7FFFFFFFFFFFFFFF = 000000007FFFFFFF7FFFFFFF00000001 -+mlgr 0000000080000000 * 7FFFFFFFFFFFFFFF = 000000003FFFFFFFFFFFFFFF80000000 -+mlgr 000000007FFFFFFF * 7FFFFFFFFFFFFFFF = 000000003FFFFFFF7FFFFFFF80000001 -+mlgr FFFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE8000000000000001 -+mlgr 8000000000000000 * 7FFFFFFFFFFFFFFF = 3FFFFFFFFFFFFFFF8000000000000000 -+mlgr 7FFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = 3FFFFFFFFFFFFFFF0000000000000001 -+ml 0000000000000000 * 7FFFFFFFFFFFFFFF = 00000000000000000000000000000000 -+ml 0000000000000001 * 7FFFFFFFFFFFFFFF = 0000000000000000000000007FFFFFFF -+ml 000000000000FFFF * 7FFFFFFFFFFFFFFF = 0000000000007FFF000000007FFF0001 -+ml 0000000000007FFF * 7FFFFFFFFFFFFFFF = 0000000000003FFF000000007FFF8001 -+ml 0000000000008000 * 7FFFFFFFFFFFFFFF = 0000000000003FFF00000000FFFF8000 -+ml 00000000FFFFFFFF * 7FFFFFFFFFFFFFFF = 000000007FFFFFFE0000000080000001 -+ml 0000000080000000 * 7FFFFFFFFFFFFFFF = 000000003FFFFFFF0000000080000000 -+ml 000000007FFFFFFF * 7FFFFFFFFFFFFFFF = 000000003FFFFFFF0000000000000001 -+ml FFFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = FFFFFFFF7FFFFFFEFFFFFFFF80000001 -+ml 8000000000000000 * 7FFFFFFFFFFFFFFF = 80000000000000008000000000000000 -+ml 7FFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = 7FFFFFFF7FFFFFFE7FFFFFFF80000001 -+mlr 0000000000000000 * 7FFFFFFFFFFFFFFF = 00000000000000000000000000000000 -+mlr 0000000000000001 * 7FFFFFFFFFFFFFFF = 000000000000000000000000FFFFFFFF -+mlr 000000000000FFFF * 7FFFFFFFFFFFFFFF = 000000000000FFFE00000000FFFF0001 -+mlr 0000000000007FFF * 7FFFFFFFFFFFFFFF = 0000000000007FFE00000000FFFF8001 -+mlr 0000000000008000 * 7FFFFFFFFFFFFFFF = 0000000000007FFF00000000FFFF8000 -+mlr 00000000FFFFFFFF * 7FFFFFFFFFFFFFFF = 00000000FFFFFFFE0000000000000001 -+mlr 0000000080000000 * 7FFFFFFFFFFFFFFF = 000000007FFFFFFF0000000080000000 -+mlr 000000007FFFFFFF * 7FFFFFFFFFFFFFFF = 000000007FFFFFFE0000000080000001 -+mlr FFFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFEFFFFFFFF00000001 -+mlr 8000000000000000 * 7FFFFFFFFFFFFFFF = 80000000000000008000000000000000 -+mlr 7FFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFE7FFFFFFF00000001 -+ms 0000000000000000 * 7FFFFFFFFFFFFFFF = 00000000000000000000000000000000 -+ms 0000000000000001 * 7FFFFFFFFFFFFFFF = 000000007FFFFFFF0000000000000001 -+ms 000000000000FFFF * 7FFFFFFFFFFFFFFF = 000000007FFF0001000000000000FFFF -+ms 0000000000007FFF * 7FFFFFFFFFFFFFFF = 000000007FFF80010000000000007FFF -+ms 0000000000008000 * 7FFFFFFFFFFFFFFF = 00000000FFFF80000000000000008000 -+ms 00000000FFFFFFFF * 7FFFFFFFFFFFFFFF = 000000008000000100000000FFFFFFFF -+ms 0000000080000000 * 7FFFFFFFFFFFFFFF = 00000000800000000000000080000000 -+ms 000000007FFFFFFF * 7FFFFFFFFFFFFFFF = 0000000000000001000000007FFFFFFF -+ms FFFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = FFFFFFFF80000001FFFFFFFFFFFFFFFF -+ms 8000000000000000 * 7FFFFFFFFFFFFFFF = 80000000000000008000000000000000 -+ms 7FFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = 7FFFFFFF800000017FFFFFFFFFFFFFFF -+msr 0000000000000000 * 7FFFFFFFFFFFFFFF = 00000000000000000000000000000000 -+msr 0000000000000001 * 7FFFFFFFFFFFFFFF = 00000000FFFFFFFF0000000000000001 -+msr 000000000000FFFF * 7FFFFFFFFFFFFFFF = 00000000FFFF0001000000000000FFFF -+msr 0000000000007FFF * 7FFFFFFFFFFFFFFF = 00000000FFFF80010000000000007FFF -+msr 0000000000008000 * 7FFFFFFFFFFFFFFF = 00000000FFFF80000000000000008000 -+msr 00000000FFFFFFFF * 7FFFFFFFFFFFFFFF = 000000000000000100000000FFFFFFFF -+msr 0000000080000000 * 7FFFFFFFFFFFFFFF = 00000000800000000000000080000000 -+msr 000000007FFFFFFF * 7FFFFFFFFFFFFFFF = 0000000080000001000000007FFFFFFF -+msr FFFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = FFFFFFFF00000001FFFFFFFFFFFFFFFF -+msr 8000000000000000 * 7FFFFFFFFFFFFFFF = 80000000000000008000000000000000 -+msr 7FFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = 7FFFFFFF000000017FFFFFFFFFFFFFFF -+msg 0000000000000000 * 7FFFFFFFFFFFFFFF = 00000000000000000000000000000000 -+msg 0000000000000001 * 7FFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF0000000000000001 -+msg 000000000000FFFF * 7FFFFFFFFFFFFFFF = 7FFFFFFFFFFF0001000000000000FFFF -+msg 0000000000007FFF * 7FFFFFFFFFFFFFFF = 7FFFFFFFFFFF80010000000000007FFF -+msg 0000000000008000 * 7FFFFFFFFFFFFFFF = FFFFFFFFFFFF80000000000000008000 -+msg 00000000FFFFFFFF * 7FFFFFFFFFFFFFFF = 7FFFFFFF0000000100000000FFFFFFFF -+msg 0000000080000000 * 7FFFFFFFFFFFFFFF = FFFFFFFF800000000000000080000000 -+msg 000000007FFFFFFF * 7FFFFFFFFFFFFFFF = 7FFFFFFF80000001000000007FFFFFFF -+msg FFFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = 8000000000000001FFFFFFFFFFFFFFFF -+msg 8000000000000000 * 7FFFFFFFFFFFFFFF = 80000000000000008000000000000000 -+msg 7FFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = 00000000000000017FFFFFFFFFFFFFFF -+msgr 0000000000000000 * 7FFFFFFFFFFFFFFF = 00000000000000000000000000000000 -+msgr 0000000000000001 * 7FFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF0000000000000001 -+msgr 000000000000FFFF * 7FFFFFFFFFFFFFFF = 7FFFFFFFFFFF0001000000000000FFFF -+msgr 0000000000007FFF * 7FFFFFFFFFFFFFFF = 7FFFFFFFFFFF80010000000000007FFF -+msgr 0000000000008000 * 7FFFFFFFFFFFFFFF = FFFFFFFFFFFF80000000000000008000 -+msgr 00000000FFFFFFFF * 7FFFFFFFFFFFFFFF = 7FFFFFFF0000000100000000FFFFFFFF -+msgr 0000000080000000 * 7FFFFFFFFFFFFFFF = FFFFFFFF800000000000000080000000 -+msgr 000000007FFFFFFF * 7FFFFFFFFFFFFFFF = 7FFFFFFF80000001000000007FFFFFFF -+msgr FFFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = 8000000000000001FFFFFFFFFFFFFFFF -+msgr 8000000000000000 * 7FFFFFFFFFFFFFFF = 80000000000000008000000000000000 -+msgr 7FFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = 00000000000000017FFFFFFFFFFFFFFF -+msgf 0000000000000000 * 7FFFFFFFFFFFFFFF = 00000000000000000000000000000000 -+msgf 0000000000000001 * 7FFFFFFFFFFFFFFF = 000000007FFFFFFF0000000000000001 -+msgf 000000000000FFFF * 7FFFFFFFFFFFFFFF = 00007FFF7FFF0001000000000000FFFF -+msgf 0000000000007FFF * 7FFFFFFFFFFFFFFF = 00003FFF7FFF80010000000000007FFF -+msgf 0000000000008000 * 7FFFFFFFFFFFFFFF = 00003FFFFFFF80000000000000008000 -+msgf 00000000FFFFFFFF * 7FFFFFFFFFFFFFFF = 7FFFFFFE8000000100000000FFFFFFFF -+msgf 0000000080000000 * 7FFFFFFFFFFFFFFF = 3FFFFFFF800000000000000080000000 -+msgf 000000007FFFFFFF * 7FFFFFFFFFFFFFFF = 3FFFFFFF00000001000000007FFFFFFF -+msgf FFFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = FFFFFFFF80000001FFFFFFFFFFFFFFFF -+msgf 8000000000000000 * 7FFFFFFFFFFFFFFF = 80000000000000008000000000000000 -+msgf 7FFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = 7FFFFFFF800000017FFFFFFFFFFFFFFF -+msgfr 0000000000000000 * 7FFFFFFFFFFFFFFF = 00000000000000000000000000000000 -+msgfr 0000000000000001 * 7FFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF0000000000000001 -+msgfr 000000000000FFFF * 7FFFFFFFFFFFFFFF = FFFFFFFFFFFF0001000000000000FFFF -+msgfr 0000000000007FFF * 7FFFFFFFFFFFFFFF = FFFFFFFFFFFF80010000000000007FFF -+msgfr 0000000000008000 * 7FFFFFFFFFFFFFFF = FFFFFFFFFFFF80000000000000008000 -+msgfr 00000000FFFFFFFF * 7FFFFFFFFFFFFFFF = FFFFFFFF0000000100000000FFFFFFFF -+msgfr 0000000080000000 * 7FFFFFFFFFFFFFFF = FFFFFFFF800000000000000080000000 -+msgfr 000000007FFFFFFF * 7FFFFFFFFFFFFFFF = FFFFFFFF80000001000000007FFFFFFF -+msgfr FFFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = 0000000000000001FFFFFFFFFFFFFFFF -+msgfr 8000000000000000 * 7FFFFFFFFFFFFFFF = 80000000000000008000000000000000 -+msgfr 7FFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = 80000000000000017FFFFFFFFFFFFFFF -+msy 0000000000000000 * 7FFFFFFFFFFFFFFF = 00000000000000000000000000000000 -+msy 0000000000000001 * 7FFFFFFFFFFFFFFF = 000000007FFFFFFF0000000000000001 -+msy 000000000000FFFF * 7FFFFFFFFFFFFFFF = 000000007FFF0001000000000000FFFF -+msy 0000000000007FFF * 7FFFFFFFFFFFFFFF = 000000007FFF80010000000000007FFF -+msy 0000000000008000 * 7FFFFFFFFFFFFFFF = 00000000FFFF80000000000000008000 -+msy 00000000FFFFFFFF * 7FFFFFFFFFFFFFFF = 000000008000000100000000FFFFFFFF -+msy 0000000080000000 * 7FFFFFFFFFFFFFFF = 00000000800000000000000080000000 -+msy 000000007FFFFFFF * 7FFFFFFFFFFFFFFF = 0000000000000001000000007FFFFFFF -+msy FFFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = FFFFFFFF80000001FFFFFFFFFFFFFFFF -+msy 8000000000000000 * 7FFFFFFFFFFFFFFF = 80000000000000008000000000000000 -+msy 7FFFFFFFFFFFFFFF * 7FFFFFFFFFFFFFFF = 7FFFFFFF800000017FFFFFFFFFFFFFFF -+m 0000000000000000 * 8000000000000000 = 00000000000000000000000000000000 -+m 0000000000000001 * 8000000000000000 = 00000000FFFFFFFF0000000080000000 -+m 000000000000FFFF * 8000000000000000 = 00000000FFFF80000000000080000000 -+m 0000000000007FFF * 8000000000000000 = 00000000FFFFC0000000000080000000 -+m 0000000000008000 * 8000000000000000 = 00000000FFFFC0000000000000000000 -+m 00000000FFFFFFFF * 8000000000000000 = 00000000000000000000000080000000 -+m 0000000080000000 * 8000000000000000 = 00000000400000000000000000000000 -+m 000000007FFFFFFF * 8000000000000000 = 00000000C00000000000000080000000 -+m FFFFFFFFFFFFFFFF * 8000000000000000 = FFFFFFFF00000000FFFFFFFF80000000 -+m 8000000000000000 * 8000000000000000 = 80000000000000008000000000000000 -+m 7FFFFFFFFFFFFFFF * 8000000000000000 = 7FFFFFFF000000007FFFFFFF80000000 -+mr 0000000000000000 * 8000000000000000 = 00000000000000000000000000000000 -+mr 0000000000000001 * 8000000000000000 = 00000000000000000000000000000000 -+mr 000000000000FFFF * 8000000000000000 = 00000000000000000000000000000000 -+mr 0000000000007FFF * 8000000000000000 = 00000000000000000000000000000000 -+mr 0000000000008000 * 8000000000000000 = 00000000000000000000000000000000 -+mr 00000000FFFFFFFF * 8000000000000000 = 00000000000000000000000000000000 -+mr 0000000080000000 * 8000000000000000 = 00000000000000000000000000000000 -+mr 000000007FFFFFFF * 8000000000000000 = 00000000000000000000000000000000 -+mr FFFFFFFFFFFFFFFF * 8000000000000000 = FFFFFFFF00000000FFFFFFFF00000000 -+mr 8000000000000000 * 8000000000000000 = 80000000000000008000000000000000 -+mr 7FFFFFFFFFFFFFFF * 8000000000000000 = 7FFFFFFF000000007FFFFFFF00000000 -+mh 0000000000000000 * 8000000000000000 = 00000000000000000000000000000000 -+mh 0000000000000001 * 8000000000000000 = 00000000FFFF80000000000000000001 -+mh 000000000000FFFF * 8000000000000000 = 0000000080008000000000000000FFFF -+mh 0000000000007FFF * 8000000000000000 = 00000000C00080000000000000007FFF -+mh 0000000000008000 * 8000000000000000 = 00000000C00000000000000000008000 -+mh 00000000FFFFFFFF * 8000000000000000 = 000000000000800000000000FFFFFFFF -+mh 0000000080000000 * 8000000000000000 = 00000000000000000000000080000000 -+mh 000000007FFFFFFF * 8000000000000000 = 0000000000008000000000007FFFFFFF -+mh FFFFFFFFFFFFFFFF * 8000000000000000 = FFFFFFFF00008000FFFFFFFFFFFFFFFF -+mh 8000000000000000 * 8000000000000000 = 80000000000000008000000000000000 -+mh 7FFFFFFFFFFFFFFF * 8000000000000000 = 7FFFFFFF000080007FFFFFFFFFFFFFFF -+mlg 0000000000000000 * 8000000000000000 = 00000000000000000000000000000000 -+mlg 0000000000000001 * 8000000000000000 = 00000000000000008000000000000000 -+mlg 000000000000FFFF * 8000000000000000 = 0000000000007FFF8000000000000000 -+mlg 0000000000007FFF * 8000000000000000 = 0000000000003FFF8000000000000000 -+mlg 0000000000008000 * 8000000000000000 = 00000000000040000000000000000000 -+mlg 00000000FFFFFFFF * 8000000000000000 = 000000007FFFFFFF8000000000000000 -+mlg 0000000080000000 * 8000000000000000 = 00000000400000000000000000000000 -+mlg 000000007FFFFFFF * 8000000000000000 = 000000003FFFFFFF8000000000000000 -+mlg FFFFFFFFFFFFFFFF * 8000000000000000 = 7FFFFFFFFFFFFFFF8000000000000000 -+mlg 8000000000000000 * 8000000000000000 = 40000000000000000000000000000000 -+mlg 7FFFFFFFFFFFFFFF * 8000000000000000 = 3FFFFFFFFFFFFFFF8000000000000000 -+mlgr 0000000000000000 * 8000000000000000 = 00000000000000000000000000000000 -+mlgr 0000000000000001 * 8000000000000000 = 00000000000000008000000000000000 -+mlgr 000000000000FFFF * 8000000000000000 = 0000000000007FFF8000000000000000 -+mlgr 0000000000007FFF * 8000000000000000 = 0000000000003FFF8000000000000000 -+mlgr 0000000000008000 * 8000000000000000 = 00000000000040000000000000000000 -+mlgr 00000000FFFFFFFF * 8000000000000000 = 000000007FFFFFFF8000000000000000 -+mlgr 0000000080000000 * 8000000000000000 = 00000000400000000000000000000000 -+mlgr 000000007FFFFFFF * 8000000000000000 = 000000003FFFFFFF8000000000000000 -+mlgr FFFFFFFFFFFFFFFF * 8000000000000000 = 7FFFFFFFFFFFFFFF8000000000000000 -+mlgr 8000000000000000 * 8000000000000000 = 40000000000000000000000000000000 -+mlgr 7FFFFFFFFFFFFFFF * 8000000000000000 = 3FFFFFFFFFFFFFFF8000000000000000 -+ml 0000000000000000 * 8000000000000000 = 00000000000000000000000000000000 -+ml 0000000000000001 * 8000000000000000 = 00000000000000000000000080000000 -+ml 000000000000FFFF * 8000000000000000 = 0000000000007FFF0000000080000000 -+ml 0000000000007FFF * 8000000000000000 = 0000000000003FFF0000000080000000 -+ml 0000000000008000 * 8000000000000000 = 00000000000040000000000000000000 -+ml 00000000FFFFFFFF * 8000000000000000 = 000000007FFFFFFF0000000080000000 -+ml 0000000080000000 * 8000000000000000 = 00000000400000000000000000000000 -+ml 000000007FFFFFFF * 8000000000000000 = 000000003FFFFFFF0000000080000000 -+ml FFFFFFFFFFFFFFFF * 8000000000000000 = FFFFFFFF7FFFFFFFFFFFFFFF80000000 -+ml 8000000000000000 * 8000000000000000 = 80000000000000008000000000000000 -+ml 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8000000000000000 * 000000000000FFFF = 80000000000000008000000000000000 -+mlr 7FFFFFFFFFFFFFFF * 000000000000FFFF = 7FFFFFFF0000FFFE7FFFFFFFFFFF0001 -+ms 0000000000000000 * 000000000000FFFF = 00000000000000000000000000000000 -+ms 0000000000000001 * 000000000000FFFF = 00000000000000000000000000000001 -+ms 000000000000FFFF * 000000000000FFFF = 0000000000000000000000000000FFFF -+ms 0000000000007FFF * 000000000000FFFF = 00000000000000000000000000007FFF -+ms 0000000000008000 * 000000000000FFFF = 00000000000000000000000000008000 -+ms 00000000FFFFFFFF * 000000000000FFFF = 000000000000000000000000FFFFFFFF -+ms 0000000080000000 * 000000000000FFFF = 00000000000000000000000080000000 -+ms 000000007FFFFFFF * 000000000000FFFF = 0000000000000000000000007FFFFFFF -+ms FFFFFFFFFFFFFFFF * 000000000000FFFF = FFFFFFFF00000000FFFFFFFFFFFFFFFF -+ms 8000000000000000 * 000000000000FFFF = 80000000000000008000000000000000 -+ms 7FFFFFFFFFFFFFFF * 000000000000FFFF = 7FFFFFFF000000007FFFFFFFFFFFFFFF -+msr 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000000000000FFFF * 000000000000FFFF = 00000000FFFE0001000000000000FFFF -+msg 0000000000007FFF * 000000000000FFFF = 000000007FFE80010000000000007FFF -+msg 0000000000008000 * 000000000000FFFF = 000000007FFF80000000000000008000 -+msg 00000000FFFFFFFF * 000000000000FFFF = 0000FFFEFFFF000100000000FFFFFFFF -+msg 0000000080000000 * 000000000000FFFF = 00007FFF800000000000000080000000 -+msg 000000007FFFFFFF * 000000000000FFFF = 00007FFF7FFF0001000000007FFFFFFF -+msg FFFFFFFFFFFFFFFF * 000000000000FFFF = FFFFFFFFFFFF0001FFFFFFFFFFFFFFFF -+msg 8000000000000000 * 000000000000FFFF = 80000000000000008000000000000000 -+msg 7FFFFFFFFFFFFFFF * 000000000000FFFF = 7FFFFFFFFFFF00017FFFFFFFFFFFFFFF -+msgr 0000000000000000 * 000000000000FFFF = 00000000000000000000000000000000 -+msgr 0000000000000001 * 000000000000FFFF = 000000000000FFFF0000000000000001 -+msgr 000000000000FFFF * 000000000000FFFF = 00000000FFFE0001000000000000FFFF -+msgr 0000000000007FFF * 000000000000FFFF = 000000007FFE80010000000000007FFF -+msgr 0000000000008000 * 000000000000FFFF = 000000007FFF80000000000000008000 -+msgr 00000000FFFFFFFF * 000000000000FFFF = 0000FFFEFFFF000100000000FFFFFFFF -+msgr 0000000080000000 * 000000000000FFFF = 00007FFF800000000000000080000000 -+msgr 000000007FFFFFFF * 000000000000FFFF = 00007FFF7FFF0001000000007FFFFFFF -+msgr FFFFFFFFFFFFFFFF * 000000000000FFFF = FFFFFFFFFFFF0001FFFFFFFFFFFFFFFF -+msgr 8000000000000000 * 000000000000FFFF = 80000000000000008000000000000000 -+msgr 7FFFFFFFFFFFFFFF * 000000000000FFFF = 7FFFFFFFFFFF00017FFFFFFFFFFFFFFF -+msgf 0000000000000000 * 000000000000FFFF = 00000000000000000000000000000000 -+msgf 0000000000000001 * 000000000000FFFF = 00000000000000000000000000000001 -+msgf 000000000000FFFF * 000000000000FFFF = 0000000000000000000000000000FFFF -+msgf 0000000000007FFF * 000000000000FFFF = 00000000000000000000000000007FFF -+msgf 0000000000008000 * 000000000000FFFF = 00000000000000000000000000008000 -+msgf 00000000FFFFFFFF * 000000000000FFFF = 000000000000000000000000FFFFFFFF -+msgf 0000000080000000 * 000000000000FFFF = 00000000000000000000000080000000 -+msgf 000000007FFFFFFF * 000000000000FFFF = 0000000000000000000000007FFFFFFF -+msgf FFFFFFFFFFFFFFFF * 000000000000FFFF = 0000000000000000FFFFFFFFFFFFFFFF -+msgf 8000000000000000 * 000000000000FFFF = 00000000000000008000000000000000 -+msgf 7FFFFFFFFFFFFFFF * 000000000000FFFF = 00000000000000007FFFFFFFFFFFFFFF -+msgfr 0000000000000000 * 000000000000FFFF = 00000000000000000000000000000000 -+msgfr 0000000000000001 * 000000000000FFFF = 000000000000FFFF0000000000000001 -+msgfr 000000000000FFFF * 000000000000FFFF = 00000000FFFE0001000000000000FFFF -+msgfr 0000000000007FFF * 000000000000FFFF = 000000007FFE80010000000000007FFF -+msgfr 0000000000008000 * 000000000000FFFF = 000000007FFF80000000000000008000 -+msgfr 00000000FFFFFFFF * 000000000000FFFF = 0000FFFEFFFF000100000000FFFFFFFF -+msgfr 0000000080000000 * 000000000000FFFF = 00007FFF800000000000000080000000 -+msgfr 000000007FFFFFFF * 000000000000FFFF = 00007FFF7FFF0001000000007FFFFFFF -+msgfr FFFFFFFFFFFFFFFF * 000000000000FFFF = FFFFFFFFFFFF0001FFFFFFFFFFFFFFFF -+msgfr 8000000000000000 * 000000000000FFFF = 80000000000000008000000000000000 -+msgfr 7FFFFFFFFFFFFFFF * 000000000000FFFF = 7FFFFFFFFFFF00017FFFFFFFFFFFFFFF -+msy 0000000000000000 * 000000000000FFFF = 00000000000000000000000000000000 -+msy 0000000000000001 * 000000000000FFFF = 00000000000000000000000000000001 -+msy 000000000000FFFF * 000000000000FFFF = 0000000000000000000000000000FFFF -+msy 0000000000007FFF * 000000000000FFFF = 00000000000000000000000000007FFF -+msy 0000000000008000 * 000000000000FFFF = 00000000000000000000000000008000 -+msy 00000000FFFFFFFF * 000000000000FFFF = 000000000000000000000000FFFFFFFF -+msy 0000000080000000 * 000000000000FFFF = 00000000000000000000000080000000 -+msy 000000007FFFFFFF * 000000000000FFFF = 0000000000000000000000007FFFFFFF -+msy FFFFFFFFFFFFFFFF * 000000000000FFFF = FFFFFFFF00000000FFFFFFFFFFFFFFFF -+msy 8000000000000000 * 000000000000FFFF = 80000000000000008000000000000000 -+msy 7FFFFFFFFFFFFFFF * 000000000000FFFF = 7FFFFFFF000000007FFFFFFFFFFFFFFF -+mhi 0000000000000000 * 0000000000000000 = 00000000000000000000000000000000 -+mhi 0000000000000001 * 0000000000000000 = 00000000000000000000000000000001 -+mhi 000000000000FFFF * 0000000000000000 = 0000000000000000000000000000FFFF -+mhi 0000000000007FFF * 0000000000000000 = 00000000000000000000000000007FFF -+mhi 0000000000008000 * 0000000000000000 = 00000000000000000000000000008000 -+mhi 00000000FFFFFFFF * 0000000000000000 = 000000000000000000000000FFFFFFFF -+mhi 0000000080000000 * 0000000000000000 = 00000000000000000000000080000000 -+mhi 000000007FFFFFFF * 0000000000000000 = 0000000000000000000000007FFFFFFF -+mhi FFFFFFFFFFFFFFFF * 0000000000000000 = FFFFFFFF00000000FFFFFFFFFFFFFFFF -+mhi 8000000000000000 * 0000000000000000 = 80000000000000008000000000000000 -+mhi 7FFFFFFFFFFFFFFF * 0000000000000000 = 7FFFFFFF000000007FFFFFFFFFFFFFFF -+mhi 0000000000000000 * FFFFFFFFFFFFFFFF = 00000000000000000000000000000000 -+mhi 0000000000000001 * FFFFFFFFFFFFFFFF = 00000000FFFFFFFF0000000000000001 -+mhi 000000000000FFFF * FFFFFFFFFFFFFFFF = 00000000FFFF0001000000000000FFFF -+mhi 0000000000007FFF * FFFFFFFFFFFFFFFF = 00000000FFFF80010000000000007FFF -+mhi 0000000000008000 * FFFFFFFFFFFFFFFF = 00000000FFFF80000000000000008000 -+mhi 00000000FFFFFFFF * FFFFFFFFFFFFFFFF = 000000000000000100000000FFFFFFFF -+mhi 0000000080000000 * FFFFFFFFFFFFFFFF = 00000000800000000000000080000000 -+mhi 000000007FFFFFFF * FFFFFFFFFFFFFFFF = 0000000080000001000000007FFFFFFF -+mhi FFFFFFFFFFFFFFFF * FFFFFFFFFFFFFFFF = FFFFFFFF00000001FFFFFFFFFFFFFFFF -+mhi 8000000000000000 * FFFFFFFFFFFFFFFF = 80000000000000008000000000000000 -+mhi 7FFFFFFFFFFFFFFF * FFFFFFFFFFFFFFFF = 7FFFFFFF000000017FFFFFFFFFFFFFFF -+mhi 0000000000000000 * FFFFFFFFFFFF8000 = 00000000000000000000000000000000 -+mhi 0000000000000001 * FFFFFFFFFFFF8000 = 00000000FFFF80000000000000000001 -+mhi 000000000000FFFF * FFFFFFFFFFFF8000 = 0000000080008000000000000000FFFF -+mhi 0000000000007FFF * FFFFFFFFFFFF8000 = 00000000C00080000000000000007FFF -+mhi 0000000000008000 * FFFFFFFFFFFF8000 = 00000000C00000000000000000008000 -+mhi 00000000FFFFFFFF * FFFFFFFFFFFF8000 = 000000000000800000000000FFFFFFFF -+mhi 0000000080000000 * FFFFFFFFFFFF8000 = 00000000000000000000000080000000 -+mhi 000000007FFFFFFF * FFFFFFFFFFFF8000 = 0000000000008000000000007FFFFFFF -+mhi FFFFFFFFFFFFFFFF * FFFFFFFFFFFF8000 = FFFFFFFF00008000FFFFFFFFFFFFFFFF -+mhi 8000000000000000 * FFFFFFFFFFFF8000 = 80000000000000008000000000000000 -+mhi 7FFFFFFFFFFFFFFF * FFFFFFFFFFFF8000 = 7FFFFFFF000080007FFFFFFFFFFFFFFF -+mhi 0000000000000000 * 0000000000007FFF = 00000000000000000000000000000000 -+mhi 0000000000000001 * 0000000000007FFF = 0000000000007FFF0000000000000001 -+mhi 000000000000FFFF * 0000000000007FFF = 000000007FFE8001000000000000FFFF -+mhi 0000000000007FFF * 0000000000007FFF = 000000003FFF00010000000000007FFF -+mhi 0000000000008000 * 0000000000007FFF = 000000003FFF80000000000000008000 -+mhi 00000000FFFFFFFF * 0000000000007FFF = 00000000FFFF800100000000FFFFFFFF -+mhi 0000000080000000 * 0000000000007FFF = 00000000800000000000000080000000 -+mhi 000000007FFFFFFF * 0000000000007FFF = 000000007FFF8001000000007FFFFFFF -+mhi FFFFFFFFFFFFFFFF * 0000000000007FFF = FFFFFFFFFFFF8001FFFFFFFFFFFFFFFF -+mhi 8000000000000000 * 0000000000007FFF = 80000000000000008000000000000000 -+mhi 7FFFFFFFFFFFFFFF * 0000000000007FFF = 7FFFFFFFFFFF80017FFFFFFFFFFFFFFF -+mghi 0000000000000000 * 0000000000000000 = 00000000000000000000000000000000 -+mghi 0000000000000001 * 0000000000000000 = 00000000000000000000000000000001 -+mghi 000000000000FFFF * 0000000000000000 = 0000000000000000000000000000FFFF -+mghi 0000000000007FFF * 0000000000000000 = 00000000000000000000000000007FFF -+mghi 0000000000008000 * 0000000000000000 = 00000000000000000000000000008000 -+mghi 00000000FFFFFFFF * 0000000000000000 = 000000000000000000000000FFFFFFFF -+mghi 0000000080000000 * 0000000000000000 = 00000000000000000000000080000000 -+mghi 000000007FFFFFFF * 0000000000000000 = 0000000000000000000000007FFFFFFF -+mghi FFFFFFFFFFFFFFFF * 0000000000000000 = 0000000000000000FFFFFFFFFFFFFFFF -+mghi 8000000000000000 * 0000000000000000 = 00000000000000008000000000000000 -+mghi 7FFFFFFFFFFFFFFF * 0000000000000000 = 00000000000000007FFFFFFFFFFFFFFF -+mghi 0000000000000000 * FFFFFFFFFFFFFFFF = 00000000000000000000000000000000 -+mghi 0000000000000001 * FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF0000000000000001 -+mghi 000000000000FFFF * FFFFFFFFFFFFFFFF = FFFFFFFFFFFF0001000000000000FFFF -+mghi 0000000000007FFF * FFFFFFFFFFFFFFFF = FFFFFFFFFFFF80010000000000007FFF -+mghi 0000000000008000 * FFFFFFFFFFFFFFFF = FFFFFFFFFFFF80000000000000008000 -+mghi 00000000FFFFFFFF * FFFFFFFFFFFFFFFF = FFFFFFFF0000000100000000FFFFFFFF -+mghi 0000000080000000 * FFFFFFFFFFFFFFFF = FFFFFFFF800000000000000080000000 -+mghi 000000007FFFFFFF * FFFFFFFFFFFFFFFF = FFFFFFFF80000001000000007FFFFFFF -+mghi FFFFFFFFFFFFFFFF * FFFFFFFFFFFFFFFF = 0000000000000001FFFFFFFFFFFFFFFF -+mghi 8000000000000000 * FFFFFFFFFFFFFFFF = 80000000000000008000000000000000 -+mghi 7FFFFFFFFFFFFFFF * FFFFFFFFFFFFFFFF = 80000000000000017FFFFFFFFFFFFFFF -+mghi 0000000000000000 * FFFFFFFFFFFF8000 = 00000000000000000000000000000000 -+mghi 0000000000000001 * FFFFFFFFFFFF8000 = FFFFFFFFFFFF80000000000000000001 -+mghi 000000000000FFFF * FFFFFFFFFFFF8000 = FFFFFFFF80008000000000000000FFFF -+mghi 0000000000007FFF * FFFFFFFFFFFF8000 = FFFFFFFFC00080000000000000007FFF -+mghi 0000000000008000 * FFFFFFFFFFFF8000 = FFFFFFFFC00000000000000000008000 -+mghi 00000000FFFFFFFF * FFFFFFFFFFFF8000 = FFFF80000000800000000000FFFFFFFF -+mghi 0000000080000000 * FFFFFFFFFFFF8000 = FFFFC000000000000000000080000000 -+mghi 000000007FFFFFFF * FFFFFFFFFFFF8000 = FFFFC00000008000000000007FFFFFFF -+mghi FFFFFFFFFFFFFFFF * FFFFFFFFFFFF8000 = 0000000000008000FFFFFFFFFFFFFFFF -+mghi 8000000000000000 * FFFFFFFFFFFF8000 = 00000000000000008000000000000000 -+mghi 7FFFFFFFFFFFFFFF * FFFFFFFFFFFF8000 = 00000000000080007FFFFFFFFFFFFFFF -+mghi 0000000000000000 * 0000000000007FFF = 00000000000000000000000000000000 -+mghi 0000000000000001 * 0000000000007FFF = 0000000000007FFF0000000000000001 -+mghi 000000000000FFFF * 0000000000007FFF = 000000007FFE8001000000000000FFFF -+mghi 0000000000007FFF * 0000000000007FFF = 000000003FFF00010000000000007FFF -+mghi 0000000000008000 * 0000000000007FFF = 000000003FFF80000000000000008000 -+mghi 00000000FFFFFFFF * 0000000000007FFF = 00007FFEFFFF800100000000FFFFFFFF -+mghi 0000000080000000 * 0000000000007FFF = 00003FFF800000000000000080000000 -+mghi 000000007FFFFFFF * 0000000000007FFF = 00003FFF7FFF8001000000007FFFFFFF -+mghi FFFFFFFFFFFFFFFF * 0000000000007FFF = FFFFFFFFFFFF8001FFFFFFFFFFFFFFFF -+mghi 8000000000000000 * 0000000000007FFF = 80000000000000008000000000000000 -+mghi 7FFFFFFFFFFFFFFF * 0000000000007FFF = 7FFFFFFFFFFF80017FFFFFFFFFFFFFFF ---- none/tests/s390x/mul.vgtest -+++ none/tests/s390x/mul.vgtest -@@ -0,0 +1 @@ -+prog: mul ---- none/tests/s390x/mvst.c -+++ none/tests/s390x/mvst.c -@@ -0,0 +1,51 @@ -+#include "test.h" -+ -+char buffer[23] ="0123456789abcdef\0XXXXX"; -+char bigbuf[512]= -+ "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" -+ "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" -+ "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" -+ "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" -+ "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" -+ "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" -+ "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" -+ "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcde\0"; -+ -+char target[512]; -+ -+int mvst(void *targetp, void *source) -+{ -+ asm volatile( -+ " lhi 0, 0\n" -+ " mvst %0, %1\n" -+ ::"a" (targetp),"a" (source): "0", "memory", "cc"); -+ return get_cc(); -+} -+ -+int mvst_full(void *targetp, void *source) -+{ -+ asm volatile( -+ " lhi 0, 0\n" -+ "0: mvst %0, %1\n" -+ " jo 0b\n" -+ ::"a" (targetp),"a" (source): "0", "memory", "cc"); -+ return get_cc(); -+} -+ -+ -+int main() -+{ -+ short t; -+ char s; -+ printf("CC:%d\n", mvst(target, buffer)); -+ printf("%s\n", target); -+ printf("CC:%d\n",mvst_full(target, bigbuf)); -+ printf("%s\n", target); -+ t = 0x6161; -+ s = 0; -+ printf("%s\n", (char *) &t); -+ printf("CC:%d\n",mvst(&t,&s)); -+ printf("%s\n", (char *) &t); -+ return 0; -+} -+ ---- none/tests/s390x/mvst.stderr.exp -+++ none/tests/s390x/mvst.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/mvst.stdout.exp -+++ none/tests/s390x/mvst.stdout.exp -@@ -0,0 +1,7 @@ -+CC:1 -+0123456789abcdef -+CC:1 -+0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcde -+aa -+CC:1 -+ ---- none/tests/s390x/mvst.vgtest -+++ none/tests/s390x/mvst.vgtest -@@ -0,0 +1 @@ -+prog: mvst ---- none/tests/s390x/or.c -+++ none/tests/s390x/or.c -@@ -0,0 +1,79 @@ -+#include -+#include "or.h" -+ -+static void do_imm_insns(void) -+{ -+ memimmsweep(oi, 0); -+ memimmsweep(oi, 255); -+ memimmsweep(oi, 128); -+ memimmsweep(oi, 0xaa); -+ memimmsweep(oi, 0x55); -+ memimmsweep(oiy, 0); -+ memimmsweep(oiy, 255); -+ memimmsweep(oiy, 128); -+ memimmsweep(oiy, 0xaa); -+ memimmsweep(oiy, 0x55); -+ immsweep(oihh, 0x55); -+ immsweep(oihl, 0x55); -+ immsweep(oilh, 0x55); -+ immsweep(oill, 0x55); -+ immsweep(oihh, 0xaa); -+ immsweep(oihl, 0xaa); -+ immsweep(oilh, 0xaa); -+ immsweep(oill, 0xaa); -+ immsweep(oihh, 0xff); -+ immsweep(oihl, 0xff); -+ immsweep(oilh, 0xff); -+ immsweep(oill, 0xff); -+ immsweep(oihh, 0x0); -+ immsweep(oihl, 0x0); -+ immsweep(oilh, 0x0); -+ immsweep(oill, 0x0); -+ immsweep(oihh, 0xffff); -+ immsweep(oihl, 0xffff); -+ immsweep(oilh, 0xffff); -+ immsweep(oill, 0xffff); -+ immsweep(oihh, 0xaaaa); -+ immsweep(oihl, 0xaaaa); -+ immsweep(oilh, 0xaaaa); -+ immsweep(oill, 0xaaaa); -+ immsweep(oihh, 0x5555); -+ immsweep(oihl, 0x5555); -+ immsweep(oilh, 0x5555); -+ immsweep(oill, 0x5555); -+} -+ -+ -+static void do_regmem_insns(unsigned long s2) -+{ -+ memsweep(o, s2); -+ memsweep(og, s2); -+ regsweep(or, s2); -+ regsweep(ogr, s2); -+ memsweep(oy, s2); -+} -+ -+int main() -+{ -+ do_regmem_insns(0x0ul); -+ do_regmem_insns(0x5555555555555555ul); -+ do_regmem_insns(0xaaaaaaaaaaaaaaaaul); -+ do_regmem_insns(0x8000000000000000ul); -+ do_regmem_insns(0xfffffffffffffffful); -+ do_regmem_insns(0x7fffffff00000000ul); -+ do_regmem_insns(0x8000000000000000ul); -+ do_regmem_insns(0xaaaaaaaa00000000ul); -+ do_regmem_insns(0xffffffff00000000ul); -+ do_regmem_insns(0x000000007ffffffful); -+ do_regmem_insns(0x0000000080000000ul); -+ do_regmem_insns(0x0000000055555555ul); -+ do_regmem_insns(0x00000000fffffffful); -+ do_regmem_insns(0x000000000000fffful); -+ do_regmem_insns(0x0000000000007ffful); -+ do_regmem_insns(0x0000000000008000ul); -+ do_regmem_insns(0x000000000000fffful); -+ -+ do_imm_insns(); -+ -+ return 0; -+} ---- none/tests/s390x/or_EI.c -+++ none/tests/s390x/or_EI.c -@@ -0,0 +1,40 @@ -+#include -+#include "or.h" -+ -+static void do_imm_insns(void) -+{ -+ immsweep(oihf, 0); -+ immsweep(oihf, 0xff); -+ immsweep(oihf, 0x55); -+ immsweep(oihf, 0xaa); -+ immsweep(oihf, 0xffff); -+ immsweep(oihf, 0x5555); -+ immsweep(oihf, 0xaaaa); -+ immsweep(oihf, 0xffff0000); -+ immsweep(oihf, 0x55550000); -+ immsweep(oihf, 0xaaaa0000); -+ immsweep(oihf, 0xffffffff); -+ immsweep(oihf, 0x55555555); -+ immsweep(oihf, 0xaaaaaaaa); -+ immsweep(oilf, 0); -+ immsweep(oilf, 0xff); -+ immsweep(oilf, 0x55); -+ immsweep(oilf, 0xaa); -+ immsweep(oilf, 0xffff); -+ immsweep(oilf, 0x5555); -+ immsweep(oilf, 0xaaaa); -+ immsweep(oilf, 0xffff0000); -+ immsweep(oilf, 0x55550000); -+ immsweep(oilf, 0xaaaa0000); -+ immsweep(oilf, 0xffffffff); -+ immsweep(oilf, 0x55555555); -+ immsweep(oilf, 0xaaaaaaaa); -+} -+ -+ -+int main() -+{ -+ do_imm_insns(); -+ -+ return 0; -+} ---- none/tests/s390x/or_EI.stderr.exp -+++ none/tests/s390x/or_EI.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/or_EI.stdout.exp -+++ none/tests/s390x/or_EI.stdout.exp -@@ -0,0 +1,312 @@ -+oihf 0000000000000000 | 0000000000000000 = 0000000000000000 (cc=0) -+oihf 0000000000000001 | 0000000000000000 = 0000000000000001 (cc=0) -+oihf 000000000000FFFF | 0000000000000000 = 000000000000FFFF (cc=0) -+oihf 0000000000007FFF | 0000000000000000 = 0000000000007FFF (cc=0) -+oihf 0000000000008000 | 0000000000000000 = 0000000000008000 (cc=0) -+oihf 00000000FFFFFFFF | 0000000000000000 = 00000000FFFFFFFF (cc=0) -+oihf 0000000080000000 | 0000000000000000 = 0000000080000000 (cc=0) -+oihf 000000007FFFFFFF | 0000000000000000 = 000000007FFFFFFF (cc=0) -+oihf AAAAAAAAAAAAAAAA | 0000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+oihf 8000000000000000 | 0000000000000000 = 8000000000000000 (cc=1) -+oihf FFFFFFFFFFFFFFFF | 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+oihf 5555555555555555 | 0000000000000000 = 5555555555555555 (cc=1) -+oihf 0000000000000000 | 00000000000000FF = 000000FF00000000 (cc=1) -+oihf 0000000000000001 | 00000000000000FF = 000000FF00000001 (cc=1) -+oihf 000000000000FFFF | 00000000000000FF = 000000FF0000FFFF (cc=1) -+oihf 0000000000007FFF | 00000000000000FF = 000000FF00007FFF (cc=1) -+oihf 0000000000008000 | 00000000000000FF = 000000FF00008000 (cc=1) -+oihf 00000000FFFFFFFF | 00000000000000FF = 000000FFFFFFFFFF (cc=1) -+oihf 0000000080000000 | 00000000000000FF = 000000FF80000000 (cc=1) -+oihf 000000007FFFFFFF | 00000000000000FF = 000000FF7FFFFFFF (cc=1) -+oihf AAAAAAAAAAAAAAAA | 00000000000000FF = AAAAAAFFAAAAAAAA (cc=1) -+oihf 8000000000000000 | 00000000000000FF = 800000FF00000000 (cc=1) -+oihf FFFFFFFFFFFFFFFF | 00000000000000FF = FFFFFFFFFFFFFFFF (cc=1) -+oihf 5555555555555555 | 00000000000000FF = 555555FF55555555 (cc=1) -+oihf 0000000000000000 | 0000000000000055 = 0000005500000000 (cc=1) -+oihf 0000000000000001 | 0000000000000055 = 0000005500000001 (cc=1) -+oihf 000000000000FFFF | 0000000000000055 = 000000550000FFFF (cc=1) -+oihf 0000000000007FFF | 0000000000000055 = 0000005500007FFF (cc=1) -+oihf 0000000000008000 | 0000000000000055 = 0000005500008000 (cc=1) -+oihf 00000000FFFFFFFF | 0000000000000055 = 00000055FFFFFFFF (cc=1) -+oihf 0000000080000000 | 0000000000000055 = 0000005580000000 (cc=1) -+oihf 000000007FFFFFFF | 0000000000000055 = 000000557FFFFFFF (cc=1) -+oihf AAAAAAAAAAAAAAAA | 0000000000000055 = AAAAAAFFAAAAAAAA (cc=1) -+oihf 8000000000000000 | 0000000000000055 = 8000005500000000 (cc=1) -+oihf FFFFFFFFFFFFFFFF | 0000000000000055 = FFFFFFFFFFFFFFFF (cc=1) -+oihf 5555555555555555 | 0000000000000055 = 5555555555555555 (cc=1) -+oihf 0000000000000000 | 00000000000000AA = 000000AA00000000 (cc=1) -+oihf 0000000000000001 | 00000000000000AA = 000000AA00000001 (cc=1) -+oihf 000000000000FFFF | 00000000000000AA = 000000AA0000FFFF (cc=1) -+oihf 0000000000007FFF | 00000000000000AA = 000000AA00007FFF (cc=1) -+oihf 0000000000008000 | 00000000000000AA = 000000AA00008000 (cc=1) -+oihf 00000000FFFFFFFF | 00000000000000AA = 000000AAFFFFFFFF (cc=1) -+oihf 0000000080000000 | 00000000000000AA = 000000AA80000000 (cc=1) -+oihf 000000007FFFFFFF | 00000000000000AA = 000000AA7FFFFFFF (cc=1) -+oihf AAAAAAAAAAAAAAAA | 00000000000000AA = AAAAAAAAAAAAAAAA (cc=1) -+oihf 8000000000000000 | 00000000000000AA = 800000AA00000000 (cc=1) -+oihf FFFFFFFFFFFFFFFF | 00000000000000AA = FFFFFFFFFFFFFFFF (cc=1) -+oihf 5555555555555555 | 00000000000000AA = 555555FF55555555 (cc=1) -+oihf 0000000000000000 | 000000000000FFFF = 0000FFFF00000000 (cc=1) -+oihf 0000000000000001 | 000000000000FFFF = 0000FFFF00000001 (cc=1) -+oihf 000000000000FFFF | 000000000000FFFF = 0000FFFF0000FFFF (cc=1) -+oihf 0000000000007FFF | 000000000000FFFF = 0000FFFF00007FFF (cc=1) -+oihf 0000000000008000 | 000000000000FFFF = 0000FFFF00008000 (cc=1) -+oihf 00000000FFFFFFFF | 000000000000FFFF = 0000FFFFFFFFFFFF (cc=1) -+oihf 0000000080000000 | 000000000000FFFF = 0000FFFF80000000 (cc=1) -+oihf 000000007FFFFFFF | 000000000000FFFF = 0000FFFF7FFFFFFF (cc=1) -+oihf AAAAAAAAAAAAAAAA | 000000000000FFFF = AAAAFFFFAAAAAAAA (cc=1) -+oihf 8000000000000000 | 000000000000FFFF = 8000FFFF00000000 (cc=1) -+oihf FFFFFFFFFFFFFFFF | 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+oihf 5555555555555555 | 000000000000FFFF = 5555FFFF55555555 (cc=1) -+oihf 0000000000000000 | 0000000000005555 = 0000555500000000 (cc=1) -+oihf 0000000000000001 | 0000000000005555 = 0000555500000001 (cc=1) -+oihf 000000000000FFFF | 0000000000005555 = 000055550000FFFF (cc=1) -+oihf 0000000000007FFF | 0000000000005555 = 0000555500007FFF (cc=1) -+oihf 0000000000008000 | 0000000000005555 = 0000555500008000 (cc=1) -+oihf 00000000FFFFFFFF | 0000000000005555 = 00005555FFFFFFFF (cc=1) -+oihf 0000000080000000 | 0000000000005555 = 0000555580000000 (cc=1) -+oihf 000000007FFFFFFF | 0000000000005555 = 000055557FFFFFFF (cc=1) -+oihf AAAAAAAAAAAAAAAA | 0000000000005555 = AAAAFFFFAAAAAAAA (cc=1) -+oihf 8000000000000000 | 0000000000005555 = 8000555500000000 (cc=1) -+oihf FFFFFFFFFFFFFFFF | 0000000000005555 = FFFFFFFFFFFFFFFF (cc=1) -+oihf 5555555555555555 | 0000000000005555 = 5555555555555555 (cc=1) -+oihf 0000000000000000 | 000000000000AAAA = 0000AAAA00000000 (cc=1) -+oihf 0000000000000001 | 000000000000AAAA = 0000AAAA00000001 (cc=1) -+oihf 000000000000FFFF | 000000000000AAAA = 0000AAAA0000FFFF (cc=1) -+oihf 0000000000007FFF | 000000000000AAAA = 0000AAAA00007FFF (cc=1) -+oihf 0000000000008000 | 000000000000AAAA = 0000AAAA00008000 (cc=1) -+oihf 00000000FFFFFFFF | 000000000000AAAA = 0000AAAAFFFFFFFF (cc=1) -+oihf 0000000080000000 | 000000000000AAAA = 0000AAAA80000000 (cc=1) -+oihf 000000007FFFFFFF | 000000000000AAAA = 0000AAAA7FFFFFFF (cc=1) -+oihf AAAAAAAAAAAAAAAA | 000000000000AAAA = AAAAAAAAAAAAAAAA (cc=1) -+oihf 8000000000000000 | 000000000000AAAA = 8000AAAA00000000 (cc=1) -+oihf FFFFFFFFFFFFFFFF | 000000000000AAAA = FFFFFFFFFFFFFFFF (cc=1) -+oihf 5555555555555555 | 000000000000AAAA = 5555FFFF55555555 (cc=1) -+oihf 0000000000000000 | 00000000FFFF0000 = FFFF000000000000 (cc=1) -+oihf 0000000000000001 | 00000000FFFF0000 = FFFF000000000001 (cc=1) -+oihf 000000000000FFFF | 00000000FFFF0000 = FFFF00000000FFFF (cc=1) -+oihf 0000000000007FFF | 00000000FFFF0000 = FFFF000000007FFF (cc=1) -+oihf 0000000000008000 | 00000000FFFF0000 = FFFF000000008000 (cc=1) -+oihf 00000000FFFFFFFF | 00000000FFFF0000 = FFFF0000FFFFFFFF (cc=1) -+oihf 0000000080000000 | 00000000FFFF0000 = FFFF000080000000 (cc=1) -+oihf 000000007FFFFFFF | 00000000FFFF0000 = FFFF00007FFFFFFF (cc=1) -+oihf AAAAAAAAAAAAAAAA | 00000000FFFF0000 = FFFFAAAAAAAAAAAA (cc=1) -+oihf 8000000000000000 | 00000000FFFF0000 = FFFF000000000000 (cc=1) -+oihf FFFFFFFFFFFFFFFF | 00000000FFFF0000 = FFFFFFFFFFFFFFFF (cc=1) -+oihf 5555555555555555 | 00000000FFFF0000 = FFFF555555555555 (cc=1) -+oihf 0000000000000000 | 0000000055550000 = 5555000000000000 (cc=1) -+oihf 0000000000000001 | 0000000055550000 = 5555000000000001 (cc=1) -+oihf 000000000000FFFF | 0000000055550000 = 555500000000FFFF (cc=1) -+oihf 0000000000007FFF | 0000000055550000 = 5555000000007FFF (cc=1) -+oihf 0000000000008000 | 0000000055550000 = 5555000000008000 (cc=1) -+oihf 00000000FFFFFFFF | 0000000055550000 = 55550000FFFFFFFF (cc=1) -+oihf 0000000080000000 | 0000000055550000 = 5555000080000000 (cc=1) -+oihf 000000007FFFFFFF | 0000000055550000 = 555500007FFFFFFF (cc=1) -+oihf AAAAAAAAAAAAAAAA | 0000000055550000 = FFFFAAAAAAAAAAAA (cc=1) -+oihf 8000000000000000 | 0000000055550000 = D555000000000000 (cc=1) -+oihf FFFFFFFFFFFFFFFF | 0000000055550000 = FFFFFFFFFFFFFFFF (cc=1) -+oihf 5555555555555555 | 0000000055550000 = 5555555555555555 (cc=1) -+oihf 0000000000000000 | 00000000AAAA0000 = AAAA000000000000 (cc=1) -+oihf 0000000000000001 | 00000000AAAA0000 = AAAA000000000001 (cc=1) -+oihf 000000000000FFFF | 00000000AAAA0000 = AAAA00000000FFFF (cc=1) -+oihf 0000000000007FFF | 00000000AAAA0000 = AAAA000000007FFF (cc=1) -+oihf 0000000000008000 | 00000000AAAA0000 = AAAA000000008000 (cc=1) -+oihf 00000000FFFFFFFF | 00000000AAAA0000 = AAAA0000FFFFFFFF (cc=1) -+oihf 0000000080000000 | 00000000AAAA0000 = AAAA000080000000 (cc=1) -+oihf 000000007FFFFFFF | 00000000AAAA0000 = AAAA00007FFFFFFF (cc=1) -+oihf AAAAAAAAAAAAAAAA | 00000000AAAA0000 = AAAAAAAAAAAAAAAA (cc=1) -+oihf 8000000000000000 | 00000000AAAA0000 = AAAA000000000000 (cc=1) -+oihf FFFFFFFFFFFFFFFF | 00000000AAAA0000 = FFFFFFFFFFFFFFFF (cc=1) -+oihf 5555555555555555 | 00000000AAAA0000 = FFFF555555555555 (cc=1) -+oihf 0000000000000000 | 00000000FFFFFFFF = FFFFFFFF00000000 (cc=1) -+oihf 0000000000000001 | 00000000FFFFFFFF = FFFFFFFF00000001 (cc=1) -+oihf 000000000000FFFF | 00000000FFFFFFFF = FFFFFFFF0000FFFF (cc=1) -+oihf 0000000000007FFF | 00000000FFFFFFFF = FFFFFFFF00007FFF (cc=1) -+oihf 0000000000008000 | 00000000FFFFFFFF = FFFFFFFF00008000 (cc=1) -+oihf 00000000FFFFFFFF | 00000000FFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+oihf 0000000080000000 | 00000000FFFFFFFF = FFFFFFFF80000000 (cc=1) -+oihf 000000007FFFFFFF | 00000000FFFFFFFF = FFFFFFFF7FFFFFFF (cc=1) -+oihf AAAAAAAAAAAAAAAA | 00000000FFFFFFFF = FFFFFFFFAAAAAAAA (cc=1) -+oihf 8000000000000000 | 00000000FFFFFFFF = FFFFFFFF00000000 (cc=1) -+oihf FFFFFFFFFFFFFFFF | 00000000FFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+oihf 5555555555555555 | 00000000FFFFFFFF = FFFFFFFF55555555 (cc=1) -+oihf 0000000000000000 | 0000000055555555 = 5555555500000000 (cc=1) -+oihf 0000000000000001 | 0000000055555555 = 5555555500000001 (cc=1) -+oihf 000000000000FFFF | 0000000055555555 = 555555550000FFFF (cc=1) -+oihf 0000000000007FFF | 0000000055555555 = 5555555500007FFF (cc=1) -+oihf 0000000000008000 | 0000000055555555 = 5555555500008000 (cc=1) -+oihf 00000000FFFFFFFF | 0000000055555555 = 55555555FFFFFFFF (cc=1) -+oihf 0000000080000000 | 0000000055555555 = 5555555580000000 (cc=1) -+oihf 000000007FFFFFFF | 0000000055555555 = 555555557FFFFFFF (cc=1) -+oihf AAAAAAAAAAAAAAAA | 0000000055555555 = FFFFFFFFAAAAAAAA (cc=1) -+oihf 8000000000000000 | 0000000055555555 = D555555500000000 (cc=1) -+oihf FFFFFFFFFFFFFFFF | 0000000055555555 = FFFFFFFFFFFFFFFF (cc=1) -+oihf 5555555555555555 | 0000000055555555 = 5555555555555555 (cc=1) -+oihf 0000000000000000 | 00000000AAAAAAAA = AAAAAAAA00000000 (cc=1) -+oihf 0000000000000001 | 00000000AAAAAAAA = AAAAAAAA00000001 (cc=1) -+oihf 000000000000FFFF | 00000000AAAAAAAA = AAAAAAAA0000FFFF (cc=1) -+oihf 0000000000007FFF | 00000000AAAAAAAA = AAAAAAAA00007FFF (cc=1) -+oihf 0000000000008000 | 00000000AAAAAAAA = AAAAAAAA00008000 (cc=1) -+oihf 00000000FFFFFFFF | 00000000AAAAAAAA = AAAAAAAAFFFFFFFF (cc=1) -+oihf 0000000080000000 | 00000000AAAAAAAA = AAAAAAAA80000000 (cc=1) -+oihf 000000007FFFFFFF | 00000000AAAAAAAA = AAAAAAAA7FFFFFFF (cc=1) -+oihf AAAAAAAAAAAAAAAA | 00000000AAAAAAAA = AAAAAAAAAAAAAAAA (cc=1) -+oihf 8000000000000000 | 00000000AAAAAAAA = AAAAAAAA00000000 (cc=1) -+oihf FFFFFFFFFFFFFFFF | 00000000AAAAAAAA = FFFFFFFFFFFFFFFF (cc=1) -+oihf 5555555555555555 | 00000000AAAAAAAA = FFFFFFFF55555555 (cc=1) -+oilf 0000000000000000 | 0000000000000000 = 0000000000000000 (cc=0) -+oilf 0000000000000001 | 0000000000000000 = 0000000000000001 (cc=1) -+oilf 000000000000FFFF | 0000000000000000 = 000000000000FFFF (cc=1) -+oilf 0000000000007FFF | 0000000000000000 = 0000000000007FFF (cc=1) -+oilf 0000000000008000 | 0000000000000000 = 0000000000008000 (cc=1) -+oilf 00000000FFFFFFFF | 0000000000000000 = 00000000FFFFFFFF (cc=1) -+oilf 0000000080000000 | 0000000000000000 = 0000000080000000 (cc=1) -+oilf 000000007FFFFFFF | 0000000000000000 = 000000007FFFFFFF (cc=1) -+oilf AAAAAAAAAAAAAAAA | 0000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+oilf 8000000000000000 | 0000000000000000 = 8000000000000000 (cc=0) -+oilf FFFFFFFFFFFFFFFF | 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+oilf 5555555555555555 | 0000000000000000 = 5555555555555555 (cc=1) -+oilf 0000000000000000 | 00000000000000FF = 00000000000000FF (cc=1) -+oilf 0000000000000001 | 00000000000000FF = 00000000000000FF (cc=1) -+oilf 000000000000FFFF | 00000000000000FF = 000000000000FFFF (cc=1) -+oilf 0000000000007FFF | 00000000000000FF = 0000000000007FFF (cc=1) -+oilf 0000000000008000 | 00000000000000FF = 00000000000080FF (cc=1) -+oilf 00000000FFFFFFFF | 00000000000000FF = 00000000FFFFFFFF (cc=1) -+oilf 0000000080000000 | 00000000000000FF = 00000000800000FF (cc=1) -+oilf 000000007FFFFFFF | 00000000000000FF = 000000007FFFFFFF (cc=1) -+oilf AAAAAAAAAAAAAAAA | 00000000000000FF = AAAAAAAAAAAAAAFF (cc=1) -+oilf 8000000000000000 | 00000000000000FF = 80000000000000FF (cc=1) -+oilf FFFFFFFFFFFFFFFF | 00000000000000FF = FFFFFFFFFFFFFFFF (cc=1) -+oilf 5555555555555555 | 00000000000000FF = 55555555555555FF (cc=1) -+oilf 0000000000000000 | 0000000000000055 = 0000000000000055 (cc=1) -+oilf 0000000000000001 | 0000000000000055 = 0000000000000055 (cc=1) -+oilf 000000000000FFFF | 0000000000000055 = 000000000000FFFF (cc=1) -+oilf 0000000000007FFF | 0000000000000055 = 0000000000007FFF (cc=1) -+oilf 0000000000008000 | 0000000000000055 = 0000000000008055 (cc=1) -+oilf 00000000FFFFFFFF | 0000000000000055 = 00000000FFFFFFFF (cc=1) -+oilf 0000000080000000 | 0000000000000055 = 0000000080000055 (cc=1) -+oilf 000000007FFFFFFF | 0000000000000055 = 000000007FFFFFFF (cc=1) -+oilf AAAAAAAAAAAAAAAA | 0000000000000055 = AAAAAAAAAAAAAAFF (cc=1) -+oilf 8000000000000000 | 0000000000000055 = 8000000000000055 (cc=1) -+oilf FFFFFFFFFFFFFFFF | 0000000000000055 = FFFFFFFFFFFFFFFF (cc=1) -+oilf 5555555555555555 | 0000000000000055 = 5555555555555555 (cc=1) -+oilf 0000000000000000 | 00000000000000AA = 00000000000000AA (cc=1) -+oilf 0000000000000001 | 00000000000000AA = 00000000000000AB (cc=1) -+oilf 000000000000FFFF | 00000000000000AA = 000000000000FFFF (cc=1) -+oilf 0000000000007FFF | 00000000000000AA = 0000000000007FFF (cc=1) -+oilf 0000000000008000 | 00000000000000AA = 00000000000080AA (cc=1) -+oilf 00000000FFFFFFFF | 00000000000000AA = 00000000FFFFFFFF (cc=1) -+oilf 0000000080000000 | 00000000000000AA = 00000000800000AA (cc=1) -+oilf 000000007FFFFFFF | 00000000000000AA = 000000007FFFFFFF (cc=1) -+oilf AAAAAAAAAAAAAAAA | 00000000000000AA = AAAAAAAAAAAAAAAA (cc=1) -+oilf 8000000000000000 | 00000000000000AA = 80000000000000AA (cc=1) -+oilf FFFFFFFFFFFFFFFF | 00000000000000AA = FFFFFFFFFFFFFFFF (cc=1) -+oilf 5555555555555555 | 00000000000000AA = 55555555555555FF (cc=1) -+oilf 0000000000000000 | 000000000000FFFF = 000000000000FFFF (cc=1) -+oilf 0000000000000001 | 000000000000FFFF = 000000000000FFFF (cc=1) -+oilf 000000000000FFFF | 000000000000FFFF = 000000000000FFFF (cc=1) -+oilf 0000000000007FFF | 000000000000FFFF = 000000000000FFFF (cc=1) -+oilf 0000000000008000 | 000000000000FFFF = 000000000000FFFF (cc=1) -+oilf 00000000FFFFFFFF | 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+oilf 0000000080000000 | 000000000000FFFF = 000000008000FFFF (cc=1) -+oilf 000000007FFFFFFF | 000000000000FFFF = 000000007FFFFFFF (cc=1) -+oilf AAAAAAAAAAAAAAAA | 000000000000FFFF = AAAAAAAAAAAAFFFF (cc=1) -+oilf 8000000000000000 | 000000000000FFFF = 800000000000FFFF (cc=1) -+oilf FFFFFFFFFFFFFFFF | 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+oilf 5555555555555555 | 000000000000FFFF = 555555555555FFFF (cc=1) -+oilf 0000000000000000 | 0000000000005555 = 0000000000005555 (cc=1) -+oilf 0000000000000001 | 0000000000005555 = 0000000000005555 (cc=1) -+oilf 000000000000FFFF | 0000000000005555 = 000000000000FFFF (cc=1) -+oilf 0000000000007FFF | 0000000000005555 = 0000000000007FFF (cc=1) -+oilf 0000000000008000 | 0000000000005555 = 000000000000D555 (cc=1) -+oilf 00000000FFFFFFFF | 0000000000005555 = 00000000FFFFFFFF (cc=1) -+oilf 0000000080000000 | 0000000000005555 = 0000000080005555 (cc=1) -+oilf 000000007FFFFFFF | 0000000000005555 = 000000007FFFFFFF (cc=1) -+oilf AAAAAAAAAAAAAAAA | 0000000000005555 = AAAAAAAAAAAAFFFF (cc=1) -+oilf 8000000000000000 | 0000000000005555 = 8000000000005555 (cc=1) -+oilf FFFFFFFFFFFFFFFF | 0000000000005555 = FFFFFFFFFFFFFFFF (cc=1) -+oilf 5555555555555555 | 0000000000005555 = 5555555555555555 (cc=1) -+oilf 0000000000000000 | 000000000000AAAA = 000000000000AAAA (cc=1) -+oilf 0000000000000001 | 000000000000AAAA = 000000000000AAAB (cc=1) -+oilf 000000000000FFFF | 000000000000AAAA = 000000000000FFFF (cc=1) -+oilf 0000000000007FFF | 000000000000AAAA = 000000000000FFFF (cc=1) -+oilf 0000000000008000 | 000000000000AAAA = 000000000000AAAA (cc=1) -+oilf 00000000FFFFFFFF | 000000000000AAAA = 00000000FFFFFFFF (cc=1) -+oilf 0000000080000000 | 000000000000AAAA = 000000008000AAAA (cc=1) -+oilf 000000007FFFFFFF | 000000000000AAAA = 000000007FFFFFFF (cc=1) -+oilf AAAAAAAAAAAAAAAA | 000000000000AAAA = AAAAAAAAAAAAAAAA (cc=1) -+oilf 8000000000000000 | 000000000000AAAA = 800000000000AAAA (cc=1) -+oilf FFFFFFFFFFFFFFFF | 000000000000AAAA = FFFFFFFFFFFFFFFF (cc=1) -+oilf 5555555555555555 | 000000000000AAAA = 555555555555FFFF (cc=1) -+oilf 0000000000000000 | 00000000FFFF0000 = 00000000FFFF0000 (cc=1) -+oilf 0000000000000001 | 00000000FFFF0000 = 00000000FFFF0001 (cc=1) -+oilf 000000000000FFFF | 00000000FFFF0000 = 00000000FFFFFFFF (cc=1) -+oilf 0000000000007FFF | 00000000FFFF0000 = 00000000FFFF7FFF (cc=1) -+oilf 0000000000008000 | 00000000FFFF0000 = 00000000FFFF8000 (cc=1) -+oilf 00000000FFFFFFFF | 00000000FFFF0000 = 00000000FFFFFFFF (cc=1) -+oilf 0000000080000000 | 00000000FFFF0000 = 00000000FFFF0000 (cc=1) -+oilf 000000007FFFFFFF | 00000000FFFF0000 = 00000000FFFFFFFF (cc=1) -+oilf AAAAAAAAAAAAAAAA | 00000000FFFF0000 = AAAAAAAAFFFFAAAA (cc=1) -+oilf 8000000000000000 | 00000000FFFF0000 = 80000000FFFF0000 (cc=1) -+oilf FFFFFFFFFFFFFFFF | 00000000FFFF0000 = FFFFFFFFFFFFFFFF (cc=1) -+oilf 5555555555555555 | 00000000FFFF0000 = 55555555FFFF5555 (cc=1) -+oilf 0000000000000000 | 0000000055550000 = 0000000055550000 (cc=1) -+oilf 0000000000000001 | 0000000055550000 = 0000000055550001 (cc=1) -+oilf 000000000000FFFF | 0000000055550000 = 000000005555FFFF (cc=1) -+oilf 0000000000007FFF | 0000000055550000 = 0000000055557FFF (cc=1) -+oilf 0000000000008000 | 0000000055550000 = 0000000055558000 (cc=1) -+oilf 00000000FFFFFFFF | 0000000055550000 = 00000000FFFFFFFF (cc=1) -+oilf 0000000080000000 | 0000000055550000 = 00000000D5550000 (cc=1) -+oilf 000000007FFFFFFF | 0000000055550000 = 000000007FFFFFFF (cc=1) -+oilf AAAAAAAAAAAAAAAA | 0000000055550000 = AAAAAAAAFFFFAAAA (cc=1) -+oilf 8000000000000000 | 0000000055550000 = 8000000055550000 (cc=1) -+oilf FFFFFFFFFFFFFFFF | 0000000055550000 = FFFFFFFFFFFFFFFF (cc=1) -+oilf 5555555555555555 | 0000000055550000 = 5555555555555555 (cc=1) -+oilf 0000000000000000 | 00000000AAAA0000 = 00000000AAAA0000 (cc=1) -+oilf 0000000000000001 | 00000000AAAA0000 = 00000000AAAA0001 (cc=1) -+oilf 000000000000FFFF | 00000000AAAA0000 = 00000000AAAAFFFF (cc=1) -+oilf 0000000000007FFF | 00000000AAAA0000 = 00000000AAAA7FFF (cc=1) -+oilf 0000000000008000 | 00000000AAAA0000 = 00000000AAAA8000 (cc=1) -+oilf 00000000FFFFFFFF | 00000000AAAA0000 = 00000000FFFFFFFF (cc=1) -+oilf 0000000080000000 | 00000000AAAA0000 = 00000000AAAA0000 (cc=1) -+oilf 000000007FFFFFFF | 00000000AAAA0000 = 00000000FFFFFFFF (cc=1) -+oilf AAAAAAAAAAAAAAAA | 00000000AAAA0000 = AAAAAAAAAAAAAAAA (cc=1) -+oilf 8000000000000000 | 00000000AAAA0000 = 80000000AAAA0000 (cc=1) -+oilf FFFFFFFFFFFFFFFF | 00000000AAAA0000 = FFFFFFFFFFFFFFFF (cc=1) -+oilf 5555555555555555 | 00000000AAAA0000 = 55555555FFFF5555 (cc=1) -+oilf 0000000000000000 | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+oilf 0000000000000001 | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+oilf 000000000000FFFF | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+oilf 0000000000007FFF | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+oilf 0000000000008000 | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+oilf 00000000FFFFFFFF | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+oilf 0000000080000000 | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+oilf 000000007FFFFFFF | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+oilf AAAAAAAAAAAAAAAA | 00000000FFFFFFFF = AAAAAAAAFFFFFFFF (cc=1) -+oilf 8000000000000000 | 00000000FFFFFFFF = 80000000FFFFFFFF (cc=1) -+oilf FFFFFFFFFFFFFFFF | 00000000FFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+oilf 5555555555555555 | 00000000FFFFFFFF = 55555555FFFFFFFF (cc=1) -+oilf 0000000000000000 | 0000000055555555 = 0000000055555555 (cc=1) -+oilf 0000000000000001 | 0000000055555555 = 0000000055555555 (cc=1) -+oilf 000000000000FFFF | 0000000055555555 = 000000005555FFFF (cc=1) -+oilf 0000000000007FFF | 0000000055555555 = 0000000055557FFF (cc=1) -+oilf 0000000000008000 | 0000000055555555 = 000000005555D555 (cc=1) -+oilf 00000000FFFFFFFF | 0000000055555555 = 00000000FFFFFFFF (cc=1) -+oilf 0000000080000000 | 0000000055555555 = 00000000D5555555 (cc=1) -+oilf 000000007FFFFFFF | 0000000055555555 = 000000007FFFFFFF (cc=1) -+oilf AAAAAAAAAAAAAAAA | 0000000055555555 = AAAAAAAAFFFFFFFF (cc=1) -+oilf 8000000000000000 | 0000000055555555 = 8000000055555555 (cc=1) -+oilf FFFFFFFFFFFFFFFF | 0000000055555555 = FFFFFFFFFFFFFFFF (cc=1) -+oilf 5555555555555555 | 0000000055555555 = 5555555555555555 (cc=1) -+oilf 0000000000000000 | 00000000AAAAAAAA = 00000000AAAAAAAA (cc=1) -+oilf 0000000000000001 | 00000000AAAAAAAA = 00000000AAAAAAAB (cc=1) -+oilf 000000000000FFFF | 00000000AAAAAAAA = 00000000AAAAFFFF (cc=1) -+oilf 0000000000007FFF | 00000000AAAAAAAA = 00000000AAAAFFFF (cc=1) -+oilf 0000000000008000 | 00000000AAAAAAAA = 00000000AAAAAAAA (cc=1) -+oilf 00000000FFFFFFFF | 00000000AAAAAAAA = 00000000FFFFFFFF (cc=1) -+oilf 0000000080000000 | 00000000AAAAAAAA = 00000000AAAAAAAA (cc=1) -+oilf 000000007FFFFFFF | 00000000AAAAAAAA = 00000000FFFFFFFF (cc=1) -+oilf AAAAAAAAAAAAAAAA | 00000000AAAAAAAA = AAAAAAAAAAAAAAAA (cc=1) -+oilf 8000000000000000 | 00000000AAAAAAAA = 80000000AAAAAAAA (cc=1) -+oilf FFFFFFFFFFFFFFFF | 00000000AAAAAAAA = FFFFFFFFFFFFFFFF (cc=1) -+oilf 5555555555555555 | 00000000AAAAAAAA = 55555555FFFFFFFF (cc=1) ---- none/tests/s390x/or_EI.vgtest -+++ none/tests/s390x/or_EI.vgtest -@@ -0,0 +1,2 @@ -+prog: or_EI -+prereq: test -x or_EI ---- none/tests/s390x/or.h -+++ none/tests/s390x/or.h -@@ -0,0 +1,120 @@ -+#include -+ -+#define OR_REG_MEM(insn, s1, s2) \ -+({ \ -+ unsigned long tmp = s1; \ -+ int cc; \ -+ asm volatile( #insn " %0, %3\n" \ -+ "ipm %1\n" \ -+ "srl %1,28\n" \ -+ : "+d" (tmp), "=d" (cc) \ -+ : "d" (tmp), "Q" (s2) \ -+ : "0", "cc"); \ -+ printf(#insn " %16.16lX | %16.16lX = %16.16lX (cc=%d)\n", s1, s2, tmp, cc); \ -+}) -+ -+#define OR_REG_REG(insn, s1, s2) \ -+({ \ -+ unsigned long tmp = s1; \ -+ int cc; \ -+ asm volatile( #insn " %0, %3\n" \ -+ "ipm %1\n" \ -+ "srl %1,28\n" \ -+ : "+d" (tmp), "=d" (cc) \ -+ : "d" (tmp), "d" (s2) \ -+ : "0", "cc"); \ -+ printf(#insn " %16.16lX | %16.16lX = %16.16lX (cc=%d)\n", s1, s2, tmp, cc); \ -+}) -+ -+#define OR_REG_IMM(insn, s1, s2) \ -+({ \ -+ unsigned long tmp = s1; \ -+ int cc; \ -+ asm volatile( #insn " %0," #s2 "\n" \ -+ "ipm %1\n" \ -+ "srl %1,28\n" \ -+ : "+d" (tmp), "=d" (cc) \ -+ : "d" (tmp) \ -+ : "0", "cc"); \ -+ printf(#insn " %16.16lX | %16.16lX = %16.16lX (cc=%d)\n", s1, (unsigned long) s2, tmp, cc); \ -+}) -+ -+#define OR_MEM_IMM(insn, s1, s2) \ -+({ \ -+ unsigned long tmp = s1; \ -+ int cc; \ -+ asm volatile( #insn " %0," #s2 "\n" \ -+ "ipm %1\n" \ -+ "srl %1,28\n" \ -+ : "+Q" (tmp), "=d" (cc) \ -+ : "Q" (tmp) \ -+ : "0", "cc"); \ -+ printf(#insn " %16.16lX | %16.16lX = %16.16lX (cc=%d)\n", s1, (unsigned long) s2, tmp, cc); \ -+}) -+ -+ -+#define memsweep(i, s2) \ -+({ \ -+ OR_REG_MEM(i, 0ul, s2); \ -+ OR_REG_MEM(i, 1ul, s2); \ -+ OR_REG_MEM(i, 0xfffful, s2); \ -+ OR_REG_MEM(i, 0x7ffful, s2); \ -+ OR_REG_MEM(i, 0x8000ul, s2); \ -+ OR_REG_MEM(i, 0xfffffffful, s2); \ -+ OR_REG_MEM(i, 0x80000000ul, s2); \ -+ OR_REG_MEM(i, 0x7ffffffful, s2); \ -+ OR_REG_MEM(i, 0xaaaaaaaaaaaaaaaaul, s2); \ -+ OR_REG_MEM(i, 0x8000000000000000ul, s2); \ -+ OR_REG_MEM(i, 0xfffffffffffffffful, s2); \ -+ OR_REG_MEM(i, 0x5555555555555555ul, s2); \ -+}) -+ -+#define regsweep(i, s2) \ -+({ \ -+ OR_REG_REG(i, 0ul, s2); \ -+ OR_REG_REG(i, 1ul, s2); \ -+ OR_REG_REG(i, 0xfffful, s2); \ -+ OR_REG_REG(i, 0x7ffful, s2); \ -+ OR_REG_REG(i, 0x8000ul, s2); \ -+ OR_REG_REG(i, 0xfffffffful, s2); \ -+ OR_REG_REG(i, 0x80000000ul, s2); \ -+ OR_REG_REG(i, 0x7ffffffful, s2); \ -+ OR_REG_REG(i, 0xaaaaaaaaaaaaaaaaul, s2); \ -+ OR_REG_REG(i, 0x8000000000000000ul, s2); \ -+ OR_REG_REG(i, 0xfffffffffffffffful, s2); \ -+ OR_REG_REG(i, 0x5555555555555555ul, s2); \ -+}) -+ -+#define immsweep(i, s2) \ -+({ \ -+ OR_REG_IMM(i, 0ul, s2); \ -+ OR_REG_IMM(i, 1ul, s2); \ -+ OR_REG_IMM(i, 0xfffful, s2); \ -+ OR_REG_IMM(i, 0x7ffful, s2); \ -+ OR_REG_IMM(i, 0x8000ul, s2); \ -+ OR_REG_IMM(i, 0xfffffffful, s2); \ -+ OR_REG_IMM(i, 0x80000000ul, s2); \ -+ OR_REG_IMM(i, 0x7ffffffful, s2); \ -+ OR_REG_IMM(i, 0xaaaaaaaaaaaaaaaaul, s2); \ -+ OR_REG_IMM(i, 0x8000000000000000ul, s2); \ -+ OR_REG_IMM(i, 0xfffffffffffffffful, s2); \ -+ OR_REG_IMM(i, 0x5555555555555555ul, s2); \ -+}) -+ -+#define memimmsweep(i, s2) \ -+({ \ -+ OR_MEM_IMM(i, 0ul, s2); \ -+ OR_MEM_IMM(i, 1ul, s2); \ -+ OR_MEM_IMM(i, 0xfffful, s2); \ -+ OR_MEM_IMM(i, 0x7ffful, s2); \ -+ OR_MEM_IMM(i, 0x8000ul, s2); \ -+ OR_MEM_IMM(i, 0xfffffffful, s2); \ -+ OR_MEM_IMM(i, 0x80000000ul, s2); \ -+ OR_MEM_IMM(i, 0x7ffffffful, s2); \ -+ OR_MEM_IMM(i, 0xaaaaaaaaaaaaaaaaul, s2); \ -+ OR_MEM_IMM(i, 0x8000000000000000ul, s2); \ -+ OR_MEM_IMM(i, 0xfffffffffffffffful, s2); \ -+ OR_MEM_IMM(i, 0x5555555555555555ul, s2); \ -+}) -+ -+ ---- none/tests/s390x/or.stderr.exp -+++ none/tests/s390x/or.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/or.stdout.exp -+++ none/tests/s390x/or.stdout.exp -@@ -0,0 +1,1476 @@ -+o 0000000000000000 | 0000000000000000 = 0000000000000000 (cc=0) -+o 0000000000000001 | 0000000000000000 = 0000000000000001 (cc=1) -+o 000000000000FFFF | 0000000000000000 = 000000000000FFFF (cc=1) -+o 0000000000007FFF | 0000000000000000 = 0000000000007FFF (cc=1) -+o 0000000000008000 | 0000000000000000 = 0000000000008000 (cc=1) -+o 00000000FFFFFFFF | 0000000000000000 = 00000000FFFFFFFF (cc=1) -+o 0000000080000000 | 0000000000000000 = 0000000080000000 (cc=1) -+o 000000007FFFFFFF | 0000000000000000 = 000000007FFFFFFF (cc=1) -+o AAAAAAAAAAAAAAAA | 0000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+o 8000000000000000 | 0000000000000000 = 8000000000000000 (cc=0) -+o FFFFFFFFFFFFFFFF | 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+o 5555555555555555 | 0000000000000000 = 5555555555555555 (cc=1) -+og 0000000000000000 | 0000000000000000 = 0000000000000000 (cc=0) -+og 0000000000000001 | 0000000000000000 = 0000000000000001 (cc=1) -+og 000000000000FFFF | 0000000000000000 = 000000000000FFFF (cc=1) -+og 0000000000007FFF | 0000000000000000 = 0000000000007FFF (cc=1) -+og 0000000000008000 | 0000000000000000 = 0000000000008000 (cc=1) -+og 00000000FFFFFFFF | 0000000000000000 = 00000000FFFFFFFF (cc=1) -+og 0000000080000000 | 0000000000000000 = 0000000080000000 (cc=1) -+og 000000007FFFFFFF | 0000000000000000 = 000000007FFFFFFF (cc=1) -+og AAAAAAAAAAAAAAAA | 0000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+og 8000000000000000 | 0000000000000000 = 8000000000000000 (cc=1) -+og FFFFFFFFFFFFFFFF | 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+og 5555555555555555 | 0000000000000000 = 5555555555555555 (cc=1) -+or 0000000000000000 | 0000000000000000 = 0000000000000000 (cc=0) -+or 0000000000000001 | 0000000000000000 = 0000000000000001 (cc=1) -+or 000000000000FFFF | 0000000000000000 = 000000000000FFFF (cc=1) -+or 0000000000007FFF | 0000000000000000 = 0000000000007FFF (cc=1) -+or 0000000000008000 | 0000000000000000 = 0000000000008000 (cc=1) -+or 00000000FFFFFFFF | 0000000000000000 = 00000000FFFFFFFF (cc=1) -+or 0000000080000000 | 0000000000000000 = 0000000080000000 (cc=1) -+or 000000007FFFFFFF | 0000000000000000 = 000000007FFFFFFF (cc=1) -+or AAAAAAAAAAAAAAAA | 0000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+or 8000000000000000 | 0000000000000000 = 8000000000000000 (cc=0) -+or FFFFFFFFFFFFFFFF | 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+or 5555555555555555 | 0000000000000000 = 5555555555555555 (cc=1) -+ogr 0000000000000000 | 0000000000000000 = 0000000000000000 (cc=0) -+ogr 0000000000000001 | 0000000000000000 = 0000000000000001 (cc=1) -+ogr 000000000000FFFF | 0000000000000000 = 000000000000FFFF (cc=1) -+ogr 0000000000007FFF | 0000000000000000 = 0000000000007FFF (cc=1) -+ogr 0000000000008000 | 0000000000000000 = 0000000000008000 (cc=1) -+ogr 00000000FFFFFFFF | 0000000000000000 = 00000000FFFFFFFF (cc=1) -+ogr 0000000080000000 | 0000000000000000 = 0000000080000000 (cc=1) -+ogr 000000007FFFFFFF | 0000000000000000 = 000000007FFFFFFF (cc=1) -+ogr AAAAAAAAAAAAAAAA | 0000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+ogr 8000000000000000 | 0000000000000000 = 8000000000000000 (cc=1) -+ogr FFFFFFFFFFFFFFFF | 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+ogr 5555555555555555 | 0000000000000000 = 5555555555555555 (cc=1) -+oy 0000000000000000 | 0000000000000000 = 0000000000000000 (cc=0) -+oy 0000000000000001 | 0000000000000000 = 0000000000000001 (cc=1) -+oy 000000000000FFFF | 0000000000000000 = 000000000000FFFF (cc=1) -+oy 0000000000007FFF | 0000000000000000 = 0000000000007FFF (cc=1) -+oy 0000000000008000 | 0000000000000000 = 0000000000008000 (cc=1) -+oy 00000000FFFFFFFF | 0000000000000000 = 00000000FFFFFFFF (cc=1) -+oy 0000000080000000 | 0000000000000000 = 0000000080000000 (cc=1) -+oy 000000007FFFFFFF | 0000000000000000 = 000000007FFFFFFF (cc=1) -+oy AAAAAAAAAAAAAAAA | 0000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+oy 8000000000000000 | 0000000000000000 = 8000000000000000 (cc=0) -+oy FFFFFFFFFFFFFFFF | 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+oy 5555555555555555 | 0000000000000000 = 5555555555555555 (cc=1) -+o 0000000000000000 | 5555555555555555 = 0000000055555555 (cc=1) -+o 0000000000000001 | 5555555555555555 = 0000000055555555 (cc=1) -+o 000000000000FFFF | 5555555555555555 = 000000005555FFFF (cc=1) -+o 0000000000007FFF | 5555555555555555 = 0000000055557FFF (cc=1) -+o 0000000000008000 | 5555555555555555 = 000000005555D555 (cc=1) -+o 00000000FFFFFFFF | 5555555555555555 = 00000000FFFFFFFF (cc=1) -+o 0000000080000000 | 5555555555555555 = 00000000D5555555 (cc=1) -+o 000000007FFFFFFF | 5555555555555555 = 000000007FFFFFFF (cc=1) -+o AAAAAAAAAAAAAAAA | 5555555555555555 = AAAAAAAAFFFFFFFF (cc=1) -+o 8000000000000000 | 5555555555555555 = 8000000055555555 (cc=1) -+o FFFFFFFFFFFFFFFF | 5555555555555555 = FFFFFFFFFFFFFFFF (cc=1) -+o 5555555555555555 | 5555555555555555 = 5555555555555555 (cc=1) -+og 0000000000000000 | 5555555555555555 = 5555555555555555 (cc=1) -+og 0000000000000001 | 5555555555555555 = 5555555555555555 (cc=1) -+og 000000000000FFFF | 5555555555555555 = 555555555555FFFF (cc=1) -+og 0000000000007FFF | 5555555555555555 = 5555555555557FFF (cc=1) -+og 0000000000008000 | 5555555555555555 = 555555555555D555 (cc=1) -+og 00000000FFFFFFFF | 5555555555555555 = 55555555FFFFFFFF (cc=1) -+og 0000000080000000 | 5555555555555555 = 55555555D5555555 (cc=1) -+og 000000007FFFFFFF | 5555555555555555 = 555555557FFFFFFF (cc=1) -+og AAAAAAAAAAAAAAAA | 5555555555555555 = FFFFFFFFFFFFFFFF (cc=1) -+og 8000000000000000 | 5555555555555555 = D555555555555555 (cc=1) -+og FFFFFFFFFFFFFFFF | 5555555555555555 = FFFFFFFFFFFFFFFF (cc=1) -+og 5555555555555555 | 5555555555555555 = 5555555555555555 (cc=1) -+or 0000000000000000 | 5555555555555555 = 0000000055555555 (cc=1) -+or 0000000000000001 | 5555555555555555 = 0000000055555555 (cc=1) -+or 000000000000FFFF | 5555555555555555 = 000000005555FFFF (cc=1) -+or 0000000000007FFF | 5555555555555555 = 0000000055557FFF (cc=1) -+or 0000000000008000 | 5555555555555555 = 000000005555D555 (cc=1) -+or 00000000FFFFFFFF | 5555555555555555 = 00000000FFFFFFFF (cc=1) -+or 0000000080000000 | 5555555555555555 = 00000000D5555555 (cc=1) -+or 000000007FFFFFFF | 5555555555555555 = 000000007FFFFFFF (cc=1) -+or AAAAAAAAAAAAAAAA | 5555555555555555 = AAAAAAAAFFFFFFFF (cc=1) -+or 8000000000000000 | 5555555555555555 = 8000000055555555 (cc=1) -+or FFFFFFFFFFFFFFFF | 5555555555555555 = FFFFFFFFFFFFFFFF (cc=1) -+or 5555555555555555 | 5555555555555555 = 5555555555555555 (cc=1) -+ogr 0000000000000000 | 5555555555555555 = 5555555555555555 (cc=1) -+ogr 0000000000000001 | 5555555555555555 = 5555555555555555 (cc=1) -+ogr 000000000000FFFF | 5555555555555555 = 555555555555FFFF (cc=1) -+ogr 0000000000007FFF | 5555555555555555 = 5555555555557FFF (cc=1) -+ogr 0000000000008000 | 5555555555555555 = 555555555555D555 (cc=1) -+ogr 00000000FFFFFFFF | 5555555555555555 = 55555555FFFFFFFF (cc=1) -+ogr 0000000080000000 | 5555555555555555 = 55555555D5555555 (cc=1) -+ogr 000000007FFFFFFF | 5555555555555555 = 555555557FFFFFFF (cc=1) -+ogr AAAAAAAAAAAAAAAA | 5555555555555555 = FFFFFFFFFFFFFFFF (cc=1) -+ogr 8000000000000000 | 5555555555555555 = D555555555555555 (cc=1) -+ogr FFFFFFFFFFFFFFFF | 5555555555555555 = FFFFFFFFFFFFFFFF (cc=1) -+ogr 5555555555555555 | 5555555555555555 = 5555555555555555 (cc=1) -+oy 0000000000000000 | 5555555555555555 = 0000000055555555 (cc=1) -+oy 0000000000000001 | 5555555555555555 = 0000000055555555 (cc=1) -+oy 000000000000FFFF | 5555555555555555 = 000000005555FFFF (cc=1) -+oy 0000000000007FFF | 5555555555555555 = 0000000055557FFF (cc=1) -+oy 0000000000008000 | 5555555555555555 = 000000005555D555 (cc=1) -+oy 00000000FFFFFFFF | 5555555555555555 = 00000000FFFFFFFF (cc=1) -+oy 0000000080000000 | 5555555555555555 = 00000000D5555555 (cc=1) -+oy 000000007FFFFFFF | 5555555555555555 = 000000007FFFFFFF (cc=1) -+oy AAAAAAAAAAAAAAAA | 5555555555555555 = AAAAAAAAFFFFFFFF (cc=1) -+oy 8000000000000000 | 5555555555555555 = 8000000055555555 (cc=1) -+oy FFFFFFFFFFFFFFFF | 5555555555555555 = FFFFFFFFFFFFFFFF (cc=1) -+oy 5555555555555555 | 5555555555555555 = 5555555555555555 (cc=1) -+o 0000000000000000 | AAAAAAAAAAAAAAAA = 00000000AAAAAAAA (cc=1) -+o 0000000000000001 | AAAAAAAAAAAAAAAA = 00000000AAAAAAAB (cc=1) -+o 000000000000FFFF | AAAAAAAAAAAAAAAA = 00000000AAAAFFFF (cc=1) -+o 0000000000007FFF | AAAAAAAAAAAAAAAA = 00000000AAAAFFFF (cc=1) -+o 0000000000008000 | AAAAAAAAAAAAAAAA = 00000000AAAAAAAA (cc=1) -+o 00000000FFFFFFFF | AAAAAAAAAAAAAAAA = 00000000FFFFFFFF (cc=1) -+o 0000000080000000 | AAAAAAAAAAAAAAAA = 00000000AAAAAAAA (cc=1) -+o 000000007FFFFFFF | AAAAAAAAAAAAAAAA = 00000000FFFFFFFF (cc=1) -+o AAAAAAAAAAAAAAAA | AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAA (cc=1) -+o 8000000000000000 | AAAAAAAAAAAAAAAA = 80000000AAAAAAAA (cc=1) -+o FFFFFFFFFFFFFFFF | AAAAAAAAAAAAAAAA = FFFFFFFFFFFFFFFF (cc=1) -+o 5555555555555555 | AAAAAAAAAAAAAAAA = 55555555FFFFFFFF (cc=1) -+og 0000000000000000 | AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAA (cc=1) -+og 0000000000000001 | AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAB (cc=1) -+og 000000000000FFFF | AAAAAAAAAAAAAAAA = AAAAAAAAAAAAFFFF (cc=1) -+og 0000000000007FFF | AAAAAAAAAAAAAAAA = AAAAAAAAAAAAFFFF (cc=1) -+og 0000000000008000 | AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAA (cc=1) -+og 00000000FFFFFFFF | AAAAAAAAAAAAAAAA = AAAAAAAAFFFFFFFF (cc=1) -+og 0000000080000000 | AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAA (cc=1) -+og 000000007FFFFFFF | AAAAAAAAAAAAAAAA = AAAAAAAAFFFFFFFF (cc=1) -+og AAAAAAAAAAAAAAAA | AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAA (cc=1) -+og 8000000000000000 | AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAA (cc=1) -+og FFFFFFFFFFFFFFFF | AAAAAAAAAAAAAAAA = FFFFFFFFFFFFFFFF (cc=1) -+og 5555555555555555 | AAAAAAAAAAAAAAAA = FFFFFFFFFFFFFFFF (cc=1) -+or 0000000000000000 | AAAAAAAAAAAAAAAA = 00000000AAAAAAAA (cc=1) -+or 0000000000000001 | AAAAAAAAAAAAAAAA = 00000000AAAAAAAB (cc=1) -+or 000000000000FFFF | AAAAAAAAAAAAAAAA = 00000000AAAAFFFF (cc=1) -+or 0000000000007FFF | AAAAAAAAAAAAAAAA = 00000000AAAAFFFF (cc=1) -+or 0000000000008000 | AAAAAAAAAAAAAAAA = 00000000AAAAAAAA (cc=1) -+or 00000000FFFFFFFF | AAAAAAAAAAAAAAAA = 00000000FFFFFFFF (cc=1) -+or 0000000080000000 | AAAAAAAAAAAAAAAA = 00000000AAAAAAAA (cc=1) -+or 000000007FFFFFFF | AAAAAAAAAAAAAAAA = 00000000FFFFFFFF (cc=1) -+or AAAAAAAAAAAAAAAA | AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAA (cc=1) -+or 8000000000000000 | AAAAAAAAAAAAAAAA = 80000000AAAAAAAA (cc=1) -+or FFFFFFFFFFFFFFFF | AAAAAAAAAAAAAAAA = FFFFFFFFFFFFFFFF (cc=1) -+or 5555555555555555 | AAAAAAAAAAAAAAAA = 55555555FFFFFFFF (cc=1) -+ogr 0000000000000000 | AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAA (cc=1) -+ogr 0000000000000001 | AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAB (cc=1) -+ogr 000000000000FFFF | AAAAAAAAAAAAAAAA = AAAAAAAAAAAAFFFF (cc=1) -+ogr 0000000000007FFF | AAAAAAAAAAAAAAAA = AAAAAAAAAAAAFFFF (cc=1) -+ogr 0000000000008000 | AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAA (cc=1) -+ogr 00000000FFFFFFFF | AAAAAAAAAAAAAAAA = AAAAAAAAFFFFFFFF (cc=1) -+ogr 0000000080000000 | AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAA (cc=1) -+ogr 000000007FFFFFFF | AAAAAAAAAAAAAAAA = AAAAAAAAFFFFFFFF (cc=1) -+ogr AAAAAAAAAAAAAAAA | AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAA (cc=1) -+ogr 8000000000000000 | AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAA (cc=1) -+ogr FFFFFFFFFFFFFFFF | AAAAAAAAAAAAAAAA = FFFFFFFFFFFFFFFF (cc=1) -+ogr 5555555555555555 | AAAAAAAAAAAAAAAA = FFFFFFFFFFFFFFFF (cc=1) -+oy 0000000000000000 | AAAAAAAAAAAAAAAA = 00000000AAAAAAAA (cc=1) -+oy 0000000000000001 | AAAAAAAAAAAAAAAA = 00000000AAAAAAAB (cc=1) -+oy 000000000000FFFF | AAAAAAAAAAAAAAAA = 00000000AAAAFFFF (cc=1) -+oy 0000000000007FFF | AAAAAAAAAAAAAAAA = 00000000AAAAFFFF (cc=1) -+oy 0000000000008000 | AAAAAAAAAAAAAAAA = 00000000AAAAAAAA (cc=1) -+oy 00000000FFFFFFFF | AAAAAAAAAAAAAAAA = 00000000FFFFFFFF (cc=1) -+oy 0000000080000000 | AAAAAAAAAAAAAAAA = 00000000AAAAAAAA (cc=1) -+oy 000000007FFFFFFF | AAAAAAAAAAAAAAAA = 00000000FFFFFFFF (cc=1) -+oy AAAAAAAAAAAAAAAA | AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAA (cc=1) -+oy 8000000000000000 | AAAAAAAAAAAAAAAA = 80000000AAAAAAAA (cc=1) -+oy FFFFFFFFFFFFFFFF | AAAAAAAAAAAAAAAA = FFFFFFFFFFFFFFFF (cc=1) -+oy 5555555555555555 | AAAAAAAAAAAAAAAA = 55555555FFFFFFFF (cc=1) -+o 0000000000000000 | 8000000000000000 = 0000000080000000 (cc=1) -+o 0000000000000001 | 8000000000000000 = 0000000080000001 (cc=1) -+o 000000000000FFFF | 8000000000000000 = 000000008000FFFF (cc=1) -+o 0000000000007FFF | 8000000000000000 = 0000000080007FFF (cc=1) -+o 0000000000008000 | 8000000000000000 = 0000000080008000 (cc=1) -+o 00000000FFFFFFFF | 8000000000000000 = 00000000FFFFFFFF (cc=1) -+o 0000000080000000 | 8000000000000000 = 0000000080000000 (cc=1) -+o 000000007FFFFFFF | 8000000000000000 = 00000000FFFFFFFF (cc=1) -+o AAAAAAAAAAAAAAAA | 8000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+o 8000000000000000 | 8000000000000000 = 8000000080000000 (cc=1) -+o FFFFFFFFFFFFFFFF | 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+o 5555555555555555 | 8000000000000000 = 55555555D5555555 (cc=1) -+og 0000000000000000 | 8000000000000000 = 8000000000000000 (cc=1) -+og 0000000000000001 | 8000000000000000 = 8000000000000001 (cc=1) -+og 000000000000FFFF | 8000000000000000 = 800000000000FFFF (cc=1) -+og 0000000000007FFF | 8000000000000000 = 8000000000007FFF (cc=1) -+og 0000000000008000 | 8000000000000000 = 8000000000008000 (cc=1) -+og 00000000FFFFFFFF | 8000000000000000 = 80000000FFFFFFFF (cc=1) -+og 0000000080000000 | 8000000000000000 = 8000000080000000 (cc=1) -+og 000000007FFFFFFF | 8000000000000000 = 800000007FFFFFFF (cc=1) -+og AAAAAAAAAAAAAAAA | 8000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+og 8000000000000000 | 8000000000000000 = 8000000000000000 (cc=1) -+og FFFFFFFFFFFFFFFF | 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+og 5555555555555555 | 8000000000000000 = D555555555555555 (cc=1) -+or 0000000000000000 | 8000000000000000 = 0000000000000000 (cc=0) -+or 0000000000000001 | 8000000000000000 = 0000000000000001 (cc=1) -+or 000000000000FFFF | 8000000000000000 = 000000000000FFFF (cc=1) -+or 0000000000007FFF | 8000000000000000 = 0000000000007FFF (cc=1) -+or 0000000000008000 | 8000000000000000 = 0000000000008000 (cc=1) -+or 00000000FFFFFFFF | 8000000000000000 = 00000000FFFFFFFF (cc=1) -+or 0000000080000000 | 8000000000000000 = 0000000080000000 (cc=1) -+or 000000007FFFFFFF | 8000000000000000 = 000000007FFFFFFF (cc=1) -+or AAAAAAAAAAAAAAAA | 8000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+or 8000000000000000 | 8000000000000000 = 8000000000000000 (cc=0) -+or FFFFFFFFFFFFFFFF | 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+or 5555555555555555 | 8000000000000000 = 5555555555555555 (cc=1) -+ogr 0000000000000000 | 8000000000000000 = 8000000000000000 (cc=1) -+ogr 0000000000000001 | 8000000000000000 = 8000000000000001 (cc=1) -+ogr 000000000000FFFF | 8000000000000000 = 800000000000FFFF (cc=1) -+ogr 0000000000007FFF | 8000000000000000 = 8000000000007FFF (cc=1) -+ogr 0000000000008000 | 8000000000000000 = 8000000000008000 (cc=1) -+ogr 00000000FFFFFFFF | 8000000000000000 = 80000000FFFFFFFF (cc=1) -+ogr 0000000080000000 | 8000000000000000 = 8000000080000000 (cc=1) -+ogr 000000007FFFFFFF | 8000000000000000 = 800000007FFFFFFF (cc=1) -+ogr AAAAAAAAAAAAAAAA | 8000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+ogr 8000000000000000 | 8000000000000000 = 8000000000000000 (cc=1) -+ogr FFFFFFFFFFFFFFFF | 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+ogr 5555555555555555 | 8000000000000000 = D555555555555555 (cc=1) -+oy 0000000000000000 | 8000000000000000 = 0000000080000000 (cc=1) -+oy 0000000000000001 | 8000000000000000 = 0000000080000001 (cc=1) -+oy 000000000000FFFF | 8000000000000000 = 000000008000FFFF (cc=1) -+oy 0000000000007FFF | 8000000000000000 = 0000000080007FFF (cc=1) -+oy 0000000000008000 | 8000000000000000 = 0000000080008000 (cc=1) -+oy 00000000FFFFFFFF | 8000000000000000 = 00000000FFFFFFFF (cc=1) -+oy 0000000080000000 | 8000000000000000 = 0000000080000000 (cc=1) -+oy 000000007FFFFFFF | 8000000000000000 = 00000000FFFFFFFF (cc=1) -+oy AAAAAAAAAAAAAAAA | 8000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+oy 8000000000000000 | 8000000000000000 = 8000000080000000 (cc=1) -+oy FFFFFFFFFFFFFFFF | 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+oy 5555555555555555 | 8000000000000000 = 55555555D5555555 (cc=1) -+o 0000000000000000 | FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+o 0000000000000001 | FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+o 000000000000FFFF | FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+o 0000000000007FFF | FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+o 0000000000008000 | FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+o 00000000FFFFFFFF | FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+o 0000000080000000 | FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+o 000000007FFFFFFF | FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+o AAAAAAAAAAAAAAAA | FFFFFFFFFFFFFFFF = AAAAAAAAFFFFFFFF (cc=1) -+o 8000000000000000 | FFFFFFFFFFFFFFFF = 80000000FFFFFFFF (cc=1) -+o FFFFFFFFFFFFFFFF | FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+o 5555555555555555 | FFFFFFFFFFFFFFFF = 55555555FFFFFFFF (cc=1) -+og 0000000000000000 | FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+og 0000000000000001 | FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+og 000000000000FFFF | FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+og 0000000000007FFF | FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+og 0000000000008000 | FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+og 00000000FFFFFFFF | FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+og 0000000080000000 | FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+og 000000007FFFFFFF | FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+og AAAAAAAAAAAAAAAA | FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+og 8000000000000000 | FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+og FFFFFFFFFFFFFFFF | FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+og 5555555555555555 | FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+or 0000000000000000 | FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+or 0000000000000001 | FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+or 000000000000FFFF | FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+or 0000000000007FFF | FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+or 0000000000008000 | FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+or 00000000FFFFFFFF | FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+or 0000000080000000 | FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+or 000000007FFFFFFF | FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+or AAAAAAAAAAAAAAAA | FFFFFFFFFFFFFFFF = AAAAAAAAFFFFFFFF (cc=1) -+or 8000000000000000 | FFFFFFFFFFFFFFFF = 80000000FFFFFFFF (cc=1) -+or FFFFFFFFFFFFFFFF | FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+or 5555555555555555 | FFFFFFFFFFFFFFFF = 55555555FFFFFFFF (cc=1) -+ogr 0000000000000000 | FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+ogr 0000000000000001 | FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+ogr 000000000000FFFF | FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+ogr 0000000000007FFF | FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+ogr 0000000000008000 | FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+ogr 00000000FFFFFFFF | FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+ogr 0000000080000000 | FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+ogr 000000007FFFFFFF | FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+ogr AAAAAAAAAAAAAAAA | FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+ogr 8000000000000000 | FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+ogr FFFFFFFFFFFFFFFF | FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+ogr 5555555555555555 | FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+oy 0000000000000000 | FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+oy 0000000000000001 | FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+oy 000000000000FFFF | FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+oy 0000000000007FFF | FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+oy 0000000000008000 | FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+oy 00000000FFFFFFFF | FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+oy 0000000080000000 | FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+oy 000000007FFFFFFF | FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+oy AAAAAAAAAAAAAAAA | FFFFFFFFFFFFFFFF = AAAAAAAAFFFFFFFF (cc=1) -+oy 8000000000000000 | FFFFFFFFFFFFFFFF = 80000000FFFFFFFF (cc=1) -+oy FFFFFFFFFFFFFFFF | FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+oy 5555555555555555 | FFFFFFFFFFFFFFFF = 55555555FFFFFFFF (cc=1) -+o 0000000000000000 | 7FFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+o 0000000000000001 | 7FFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+o 000000000000FFFF | 7FFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+o 0000000000007FFF | 7FFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+o 0000000000008000 | 7FFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+o 00000000FFFFFFFF | 7FFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+o 0000000080000000 | 7FFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+o 000000007FFFFFFF | 7FFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+o AAAAAAAAAAAAAAAA | 7FFFFFFF00000000 = AAAAAAAAFFFFFFFF (cc=1) -+o 8000000000000000 | 7FFFFFFF00000000 = 800000007FFFFFFF (cc=1) -+o FFFFFFFFFFFFFFFF | 7FFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+o 5555555555555555 | 7FFFFFFF00000000 = 555555557FFFFFFF (cc=1) -+og 0000000000000000 | 7FFFFFFF00000000 = 7FFFFFFF00000000 (cc=1) -+og 0000000000000001 | 7FFFFFFF00000000 = 7FFFFFFF00000001 (cc=1) -+og 000000000000FFFF | 7FFFFFFF00000000 = 7FFFFFFF0000FFFF (cc=1) -+og 0000000000007FFF | 7FFFFFFF00000000 = 7FFFFFFF00007FFF (cc=1) -+og 0000000000008000 | 7FFFFFFF00000000 = 7FFFFFFF00008000 (cc=1) -+og 00000000FFFFFFFF | 7FFFFFFF00000000 = 7FFFFFFFFFFFFFFF (cc=1) -+og 0000000080000000 | 7FFFFFFF00000000 = 7FFFFFFF80000000 (cc=1) -+og 000000007FFFFFFF | 7FFFFFFF00000000 = 7FFFFFFF7FFFFFFF (cc=1) -+og AAAAAAAAAAAAAAAA | 7FFFFFFF00000000 = FFFFFFFFAAAAAAAA (cc=1) -+og 8000000000000000 | 7FFFFFFF00000000 = FFFFFFFF00000000 (cc=1) -+og FFFFFFFFFFFFFFFF | 7FFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+og 5555555555555555 | 7FFFFFFF00000000 = 7FFFFFFF55555555 (cc=1) -+or 0000000000000000 | 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+or 0000000000000001 | 7FFFFFFF00000000 = 0000000000000001 (cc=1) -+or 000000000000FFFF | 7FFFFFFF00000000 = 000000000000FFFF (cc=1) -+or 0000000000007FFF | 7FFFFFFF00000000 = 0000000000007FFF (cc=1) -+or 0000000000008000 | 7FFFFFFF00000000 = 0000000000008000 (cc=1) -+or 00000000FFFFFFFF | 7FFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+or 0000000080000000 | 7FFFFFFF00000000 = 0000000080000000 (cc=1) -+or 000000007FFFFFFF | 7FFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+or AAAAAAAAAAAAAAAA | 7FFFFFFF00000000 = AAAAAAAAAAAAAAAA (cc=1) -+or 8000000000000000 | 7FFFFFFF00000000 = 8000000000000000 (cc=0) -+or FFFFFFFFFFFFFFFF | 7FFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+or 5555555555555555 | 7FFFFFFF00000000 = 5555555555555555 (cc=1) -+ogr 0000000000000000 | 7FFFFFFF00000000 = 7FFFFFFF00000000 (cc=1) -+ogr 0000000000000001 | 7FFFFFFF00000000 = 7FFFFFFF00000001 (cc=1) -+ogr 000000000000FFFF | 7FFFFFFF00000000 = 7FFFFFFF0000FFFF (cc=1) -+ogr 0000000000007FFF | 7FFFFFFF00000000 = 7FFFFFFF00007FFF (cc=1) -+ogr 0000000000008000 | 7FFFFFFF00000000 = 7FFFFFFF00008000 (cc=1) -+ogr 00000000FFFFFFFF | 7FFFFFFF00000000 = 7FFFFFFFFFFFFFFF (cc=1) -+ogr 0000000080000000 | 7FFFFFFF00000000 = 7FFFFFFF80000000 (cc=1) -+ogr 000000007FFFFFFF | 7FFFFFFF00000000 = 7FFFFFFF7FFFFFFF (cc=1) -+ogr AAAAAAAAAAAAAAAA | 7FFFFFFF00000000 = FFFFFFFFAAAAAAAA (cc=1) -+ogr 8000000000000000 | 7FFFFFFF00000000 = FFFFFFFF00000000 (cc=1) -+ogr FFFFFFFFFFFFFFFF | 7FFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+ogr 5555555555555555 | 7FFFFFFF00000000 = 7FFFFFFF55555555 (cc=1) -+oy 0000000000000000 | 7FFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+oy 0000000000000001 | 7FFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+oy 000000000000FFFF | 7FFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+oy 0000000000007FFF | 7FFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+oy 0000000000008000 | 7FFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+oy 00000000FFFFFFFF | 7FFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+oy 0000000080000000 | 7FFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+oy 000000007FFFFFFF | 7FFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+oy AAAAAAAAAAAAAAAA | 7FFFFFFF00000000 = AAAAAAAAFFFFFFFF (cc=1) -+oy 8000000000000000 | 7FFFFFFF00000000 = 800000007FFFFFFF (cc=1) -+oy FFFFFFFFFFFFFFFF | 7FFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+oy 5555555555555555 | 7FFFFFFF00000000 = 555555557FFFFFFF (cc=1) -+o 0000000000000000 | 8000000000000000 = 0000000080000000 (cc=1) -+o 0000000000000001 | 8000000000000000 = 0000000080000001 (cc=1) -+o 000000000000FFFF | 8000000000000000 = 000000008000FFFF (cc=1) -+o 0000000000007FFF | 8000000000000000 = 0000000080007FFF (cc=1) -+o 0000000000008000 | 8000000000000000 = 0000000080008000 (cc=1) -+o 00000000FFFFFFFF | 8000000000000000 = 00000000FFFFFFFF (cc=1) -+o 0000000080000000 | 8000000000000000 = 0000000080000000 (cc=1) -+o 000000007FFFFFFF | 8000000000000000 = 00000000FFFFFFFF (cc=1) -+o AAAAAAAAAAAAAAAA | 8000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+o 8000000000000000 | 8000000000000000 = 8000000080000000 (cc=1) -+o FFFFFFFFFFFFFFFF | 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+o 5555555555555555 | 8000000000000000 = 55555555D5555555 (cc=1) -+og 0000000000000000 | 8000000000000000 = 8000000000000000 (cc=1) -+og 0000000000000001 | 8000000000000000 = 8000000000000001 (cc=1) -+og 000000000000FFFF | 8000000000000000 = 800000000000FFFF (cc=1) -+og 0000000000007FFF | 8000000000000000 = 8000000000007FFF (cc=1) -+og 0000000000008000 | 8000000000000000 = 8000000000008000 (cc=1) -+og 00000000FFFFFFFF | 8000000000000000 = 80000000FFFFFFFF (cc=1) -+og 0000000080000000 | 8000000000000000 = 8000000080000000 (cc=1) -+og 000000007FFFFFFF | 8000000000000000 = 800000007FFFFFFF (cc=1) -+og AAAAAAAAAAAAAAAA | 8000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+og 8000000000000000 | 8000000000000000 = 8000000000000000 (cc=1) -+og FFFFFFFFFFFFFFFF | 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+og 5555555555555555 | 8000000000000000 = D555555555555555 (cc=1) -+or 0000000000000000 | 8000000000000000 = 0000000000000000 (cc=0) -+or 0000000000000001 | 8000000000000000 = 0000000000000001 (cc=1) -+or 000000000000FFFF | 8000000000000000 = 000000000000FFFF (cc=1) -+or 0000000000007FFF | 8000000000000000 = 0000000000007FFF (cc=1) -+or 0000000000008000 | 8000000000000000 = 0000000000008000 (cc=1) -+or 00000000FFFFFFFF | 8000000000000000 = 00000000FFFFFFFF (cc=1) -+or 0000000080000000 | 8000000000000000 = 0000000080000000 (cc=1) -+or 000000007FFFFFFF | 8000000000000000 = 000000007FFFFFFF (cc=1) -+or AAAAAAAAAAAAAAAA | 8000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+or 8000000000000000 | 8000000000000000 = 8000000000000000 (cc=0) -+or FFFFFFFFFFFFFFFF | 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+or 5555555555555555 | 8000000000000000 = 5555555555555555 (cc=1) -+ogr 0000000000000000 | 8000000000000000 = 8000000000000000 (cc=1) -+ogr 0000000000000001 | 8000000000000000 = 8000000000000001 (cc=1) -+ogr 000000000000FFFF | 8000000000000000 = 800000000000FFFF (cc=1) -+ogr 0000000000007FFF | 8000000000000000 = 8000000000007FFF (cc=1) -+ogr 0000000000008000 | 8000000000000000 = 8000000000008000 (cc=1) -+ogr 00000000FFFFFFFF | 8000000000000000 = 80000000FFFFFFFF (cc=1) -+ogr 0000000080000000 | 8000000000000000 = 8000000080000000 (cc=1) -+ogr 000000007FFFFFFF | 8000000000000000 = 800000007FFFFFFF (cc=1) -+ogr AAAAAAAAAAAAAAAA | 8000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+ogr 8000000000000000 | 8000000000000000 = 8000000000000000 (cc=1) -+ogr FFFFFFFFFFFFFFFF | 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+ogr 5555555555555555 | 8000000000000000 = D555555555555555 (cc=1) -+oy 0000000000000000 | 8000000000000000 = 0000000080000000 (cc=1) -+oy 0000000000000001 | 8000000000000000 = 0000000080000001 (cc=1) -+oy 000000000000FFFF | 8000000000000000 = 000000008000FFFF (cc=1) -+oy 0000000000007FFF | 8000000000000000 = 0000000080007FFF (cc=1) -+oy 0000000000008000 | 8000000000000000 = 0000000080008000 (cc=1) -+oy 00000000FFFFFFFF | 8000000000000000 = 00000000FFFFFFFF (cc=1) -+oy 0000000080000000 | 8000000000000000 = 0000000080000000 (cc=1) -+oy 000000007FFFFFFF | 8000000000000000 = 00000000FFFFFFFF (cc=1) -+oy AAAAAAAAAAAAAAAA | 8000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+oy 8000000000000000 | 8000000000000000 = 8000000080000000 (cc=1) -+oy FFFFFFFFFFFFFFFF | 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+oy 5555555555555555 | 8000000000000000 = 55555555D5555555 (cc=1) -+o 0000000000000000 | AAAAAAAA00000000 = 00000000AAAAAAAA (cc=1) -+o 0000000000000001 | AAAAAAAA00000000 = 00000000AAAAAAAB (cc=1) -+o 000000000000FFFF | AAAAAAAA00000000 = 00000000AAAAFFFF (cc=1) -+o 0000000000007FFF | AAAAAAAA00000000 = 00000000AAAAFFFF (cc=1) -+o 0000000000008000 | AAAAAAAA00000000 = 00000000AAAAAAAA (cc=1) -+o 00000000FFFFFFFF | AAAAAAAA00000000 = 00000000FFFFFFFF (cc=1) -+o 0000000080000000 | AAAAAAAA00000000 = 00000000AAAAAAAA (cc=1) -+o 000000007FFFFFFF | AAAAAAAA00000000 = 00000000FFFFFFFF (cc=1) -+o AAAAAAAAAAAAAAAA | AAAAAAAA00000000 = AAAAAAAAAAAAAAAA (cc=1) -+o 8000000000000000 | AAAAAAAA00000000 = 80000000AAAAAAAA (cc=1) -+o FFFFFFFFFFFFFFFF | AAAAAAAA00000000 = FFFFFFFFFFFFFFFF (cc=1) -+o 5555555555555555 | AAAAAAAA00000000 = 55555555FFFFFFFF (cc=1) -+og 0000000000000000 | AAAAAAAA00000000 = AAAAAAAA00000000 (cc=1) -+og 0000000000000001 | AAAAAAAA00000000 = AAAAAAAA00000001 (cc=1) -+og 000000000000FFFF | AAAAAAAA00000000 = AAAAAAAA0000FFFF (cc=1) -+og 0000000000007FFF | AAAAAAAA00000000 = AAAAAAAA00007FFF (cc=1) -+og 0000000000008000 | AAAAAAAA00000000 = AAAAAAAA00008000 (cc=1) -+og 00000000FFFFFFFF | AAAAAAAA00000000 = AAAAAAAAFFFFFFFF (cc=1) -+og 0000000080000000 | AAAAAAAA00000000 = AAAAAAAA80000000 (cc=1) -+og 000000007FFFFFFF | AAAAAAAA00000000 = AAAAAAAA7FFFFFFF (cc=1) -+og AAAAAAAAAAAAAAAA | AAAAAAAA00000000 = AAAAAAAAAAAAAAAA (cc=1) -+og 8000000000000000 | AAAAAAAA00000000 = AAAAAAAA00000000 (cc=1) -+og FFFFFFFFFFFFFFFF | AAAAAAAA00000000 = FFFFFFFFFFFFFFFF (cc=1) -+og 5555555555555555 | AAAAAAAA00000000 = FFFFFFFF55555555 (cc=1) -+or 0000000000000000 | AAAAAAAA00000000 = 0000000000000000 (cc=0) -+or 0000000000000001 | AAAAAAAA00000000 = 0000000000000001 (cc=1) -+or 000000000000FFFF | AAAAAAAA00000000 = 000000000000FFFF (cc=1) -+or 0000000000007FFF | AAAAAAAA00000000 = 0000000000007FFF (cc=1) -+or 0000000000008000 | AAAAAAAA00000000 = 0000000000008000 (cc=1) -+or 00000000FFFFFFFF | AAAAAAAA00000000 = 00000000FFFFFFFF (cc=1) -+or 0000000080000000 | AAAAAAAA00000000 = 0000000080000000 (cc=1) -+or 000000007FFFFFFF | AAAAAAAA00000000 = 000000007FFFFFFF (cc=1) -+or AAAAAAAAAAAAAAAA | AAAAAAAA00000000 = AAAAAAAAAAAAAAAA (cc=1) -+or 8000000000000000 | AAAAAAAA00000000 = 8000000000000000 (cc=0) -+or FFFFFFFFFFFFFFFF | AAAAAAAA00000000 = FFFFFFFFFFFFFFFF (cc=1) -+or 5555555555555555 | AAAAAAAA00000000 = 5555555555555555 (cc=1) -+ogr 0000000000000000 | AAAAAAAA00000000 = AAAAAAAA00000000 (cc=1) -+ogr 0000000000000001 | AAAAAAAA00000000 = AAAAAAAA00000001 (cc=1) -+ogr 000000000000FFFF | AAAAAAAA00000000 = AAAAAAAA0000FFFF (cc=1) -+ogr 0000000000007FFF | AAAAAAAA00000000 = AAAAAAAA00007FFF (cc=1) -+ogr 0000000000008000 | AAAAAAAA00000000 = AAAAAAAA00008000 (cc=1) -+ogr 00000000FFFFFFFF | AAAAAAAA00000000 = AAAAAAAAFFFFFFFF (cc=1) -+ogr 0000000080000000 | AAAAAAAA00000000 = AAAAAAAA80000000 (cc=1) -+ogr 000000007FFFFFFF | AAAAAAAA00000000 = AAAAAAAA7FFFFFFF (cc=1) -+ogr AAAAAAAAAAAAAAAA | AAAAAAAA00000000 = AAAAAAAAAAAAAAAA (cc=1) -+ogr 8000000000000000 | AAAAAAAA00000000 = AAAAAAAA00000000 (cc=1) -+ogr FFFFFFFFFFFFFFFF | AAAAAAAA00000000 = FFFFFFFFFFFFFFFF (cc=1) -+ogr 5555555555555555 | AAAAAAAA00000000 = FFFFFFFF55555555 (cc=1) -+oy 0000000000000000 | AAAAAAAA00000000 = 00000000AAAAAAAA (cc=1) -+oy 0000000000000001 | AAAAAAAA00000000 = 00000000AAAAAAAB (cc=1) -+oy 000000000000FFFF | AAAAAAAA00000000 = 00000000AAAAFFFF (cc=1) -+oy 0000000000007FFF | AAAAAAAA00000000 = 00000000AAAAFFFF (cc=1) -+oy 0000000000008000 | AAAAAAAA00000000 = 00000000AAAAAAAA (cc=1) -+oy 00000000FFFFFFFF | AAAAAAAA00000000 = 00000000FFFFFFFF (cc=1) -+oy 0000000080000000 | AAAAAAAA00000000 = 00000000AAAAAAAA (cc=1) -+oy 000000007FFFFFFF | AAAAAAAA00000000 = 00000000FFFFFFFF (cc=1) -+oy AAAAAAAAAAAAAAAA | AAAAAAAA00000000 = AAAAAAAAAAAAAAAA (cc=1) -+oy 8000000000000000 | AAAAAAAA00000000 = 80000000AAAAAAAA (cc=1) -+oy FFFFFFFFFFFFFFFF | AAAAAAAA00000000 = FFFFFFFFFFFFFFFF (cc=1) -+oy 5555555555555555 | AAAAAAAA00000000 = 55555555FFFFFFFF (cc=1) -+o 0000000000000000 | FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+o 0000000000000001 | FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+o 000000000000FFFF | FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+o 0000000000007FFF | FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+o 0000000000008000 | FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+o 00000000FFFFFFFF | FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+o 0000000080000000 | FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+o 000000007FFFFFFF | FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+o AAAAAAAAAAAAAAAA | FFFFFFFF00000000 = AAAAAAAAFFFFFFFF (cc=1) -+o 8000000000000000 | FFFFFFFF00000000 = 80000000FFFFFFFF (cc=1) -+o FFFFFFFFFFFFFFFF | FFFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+o 5555555555555555 | FFFFFFFF00000000 = 55555555FFFFFFFF (cc=1) -+og 0000000000000000 | FFFFFFFF00000000 = FFFFFFFF00000000 (cc=1) -+og 0000000000000001 | FFFFFFFF00000000 = FFFFFFFF00000001 (cc=1) -+og 000000000000FFFF | FFFFFFFF00000000 = FFFFFFFF0000FFFF (cc=1) -+og 0000000000007FFF | FFFFFFFF00000000 = FFFFFFFF00007FFF (cc=1) -+og 0000000000008000 | FFFFFFFF00000000 = FFFFFFFF00008000 (cc=1) -+og 00000000FFFFFFFF | FFFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+og 0000000080000000 | FFFFFFFF00000000 = FFFFFFFF80000000 (cc=1) -+og 000000007FFFFFFF | FFFFFFFF00000000 = FFFFFFFF7FFFFFFF (cc=1) -+og AAAAAAAAAAAAAAAA | FFFFFFFF00000000 = FFFFFFFFAAAAAAAA (cc=1) -+og 8000000000000000 | FFFFFFFF00000000 = FFFFFFFF00000000 (cc=1) -+og FFFFFFFFFFFFFFFF | FFFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+og 5555555555555555 | FFFFFFFF00000000 = FFFFFFFF55555555 (cc=1) -+or 0000000000000000 | FFFFFFFF00000000 = 0000000000000000 (cc=0) -+or 0000000000000001 | FFFFFFFF00000000 = 0000000000000001 (cc=1) -+or 000000000000FFFF | FFFFFFFF00000000 = 000000000000FFFF (cc=1) -+or 0000000000007FFF | FFFFFFFF00000000 = 0000000000007FFF (cc=1) -+or 0000000000008000 | FFFFFFFF00000000 = 0000000000008000 (cc=1) -+or 00000000FFFFFFFF | FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+or 0000000080000000 | FFFFFFFF00000000 = 0000000080000000 (cc=1) -+or 000000007FFFFFFF | FFFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+or AAAAAAAAAAAAAAAA | FFFFFFFF00000000 = AAAAAAAAAAAAAAAA (cc=1) -+or 8000000000000000 | FFFFFFFF00000000 = 8000000000000000 (cc=0) -+or FFFFFFFFFFFFFFFF | FFFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+or 5555555555555555 | FFFFFFFF00000000 = 5555555555555555 (cc=1) -+ogr 0000000000000000 | FFFFFFFF00000000 = FFFFFFFF00000000 (cc=1) -+ogr 0000000000000001 | FFFFFFFF00000000 = FFFFFFFF00000001 (cc=1) -+ogr 000000000000FFFF | FFFFFFFF00000000 = FFFFFFFF0000FFFF (cc=1) -+ogr 0000000000007FFF | FFFFFFFF00000000 = FFFFFFFF00007FFF (cc=1) -+ogr 0000000000008000 | FFFFFFFF00000000 = FFFFFFFF00008000 (cc=1) -+ogr 00000000FFFFFFFF | FFFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+ogr 0000000080000000 | FFFFFFFF00000000 = FFFFFFFF80000000 (cc=1) -+ogr 000000007FFFFFFF | FFFFFFFF00000000 = FFFFFFFF7FFFFFFF (cc=1) -+ogr AAAAAAAAAAAAAAAA | FFFFFFFF00000000 = FFFFFFFFAAAAAAAA (cc=1) -+ogr 8000000000000000 | FFFFFFFF00000000 = FFFFFFFF00000000 (cc=1) -+ogr FFFFFFFFFFFFFFFF | FFFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+ogr 5555555555555555 | FFFFFFFF00000000 = FFFFFFFF55555555 (cc=1) -+oy 0000000000000000 | FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+oy 0000000000000001 | FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+oy 000000000000FFFF | FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+oy 0000000000007FFF | FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+oy 0000000000008000 | FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+oy 00000000FFFFFFFF | FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+oy 0000000080000000 | FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+oy 000000007FFFFFFF | FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+oy AAAAAAAAAAAAAAAA | FFFFFFFF00000000 = AAAAAAAAFFFFFFFF (cc=1) -+oy 8000000000000000 | FFFFFFFF00000000 = 80000000FFFFFFFF (cc=1) -+oy FFFFFFFFFFFFFFFF | FFFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+oy 5555555555555555 | FFFFFFFF00000000 = 55555555FFFFFFFF (cc=1) -+o 0000000000000000 | 000000007FFFFFFF = 0000000000000000 (cc=0) -+o 0000000000000001 | 000000007FFFFFFF = 0000000000000001 (cc=1) -+o 000000000000FFFF | 000000007FFFFFFF = 000000000000FFFF (cc=1) -+o 0000000000007FFF | 000000007FFFFFFF = 0000000000007FFF (cc=1) -+o 0000000000008000 | 000000007FFFFFFF = 0000000000008000 (cc=1) -+o 00000000FFFFFFFF | 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+o 0000000080000000 | 000000007FFFFFFF = 0000000080000000 (cc=1) -+o 000000007FFFFFFF | 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+o AAAAAAAAAAAAAAAA | 000000007FFFFFFF = AAAAAAAAAAAAAAAA (cc=1) -+o 8000000000000000 | 000000007FFFFFFF = 8000000000000000 (cc=0) -+o FFFFFFFFFFFFFFFF | 000000007FFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+o 5555555555555555 | 000000007FFFFFFF = 5555555555555555 (cc=1) -+og 0000000000000000 | 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+og 0000000000000001 | 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+og 000000000000FFFF | 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+og 0000000000007FFF | 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+og 0000000000008000 | 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+og 00000000FFFFFFFF | 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+og 0000000080000000 | 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+og 000000007FFFFFFF | 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+og AAAAAAAAAAAAAAAA | 000000007FFFFFFF = AAAAAAAAFFFFFFFF (cc=1) -+og 8000000000000000 | 000000007FFFFFFF = 800000007FFFFFFF (cc=1) -+og FFFFFFFFFFFFFFFF | 000000007FFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+og 5555555555555555 | 000000007FFFFFFF = 555555557FFFFFFF (cc=1) -+or 0000000000000000 | 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+or 0000000000000001 | 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+or 000000000000FFFF | 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+or 0000000000007FFF | 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+or 0000000000008000 | 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+or 00000000FFFFFFFF | 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+or 0000000080000000 | 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+or 000000007FFFFFFF | 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+or AAAAAAAAAAAAAAAA | 000000007FFFFFFF = AAAAAAAAFFFFFFFF (cc=1) -+or 8000000000000000 | 000000007FFFFFFF = 800000007FFFFFFF (cc=1) -+or FFFFFFFFFFFFFFFF | 000000007FFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+or 5555555555555555 | 000000007FFFFFFF = 555555557FFFFFFF (cc=1) -+ogr 0000000000000000 | 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+ogr 0000000000000001 | 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+ogr 000000000000FFFF | 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+ogr 0000000000007FFF | 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+ogr 0000000000008000 | 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+ogr 00000000FFFFFFFF | 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+ogr 0000000080000000 | 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+ogr 000000007FFFFFFF | 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+ogr AAAAAAAAAAAAAAAA | 000000007FFFFFFF = AAAAAAAAFFFFFFFF (cc=1) -+ogr 8000000000000000 | 000000007FFFFFFF = 800000007FFFFFFF (cc=1) -+ogr FFFFFFFFFFFFFFFF | 000000007FFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+ogr 5555555555555555 | 000000007FFFFFFF = 555555557FFFFFFF (cc=1) -+oy 0000000000000000 | 000000007FFFFFFF = 0000000000000000 (cc=0) -+oy 0000000000000001 | 000000007FFFFFFF = 0000000000000001 (cc=1) -+oy 000000000000FFFF | 000000007FFFFFFF = 000000000000FFFF (cc=1) -+oy 0000000000007FFF | 000000007FFFFFFF = 0000000000007FFF (cc=1) -+oy 0000000000008000 | 000000007FFFFFFF = 0000000000008000 (cc=1) -+oy 00000000FFFFFFFF | 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+oy 0000000080000000 | 000000007FFFFFFF = 0000000080000000 (cc=1) -+oy 000000007FFFFFFF | 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+oy AAAAAAAAAAAAAAAA | 000000007FFFFFFF = AAAAAAAAAAAAAAAA (cc=1) -+oy 8000000000000000 | 000000007FFFFFFF = 8000000000000000 (cc=0) -+oy FFFFFFFFFFFFFFFF | 000000007FFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+oy 5555555555555555 | 000000007FFFFFFF = 5555555555555555 (cc=1) -+o 0000000000000000 | 0000000080000000 = 0000000000000000 (cc=0) -+o 0000000000000001 | 0000000080000000 = 0000000000000001 (cc=1) -+o 000000000000FFFF | 0000000080000000 = 000000000000FFFF (cc=1) -+o 0000000000007FFF | 0000000080000000 = 0000000000007FFF (cc=1) -+o 0000000000008000 | 0000000080000000 = 0000000000008000 (cc=1) -+o 00000000FFFFFFFF | 0000000080000000 = 00000000FFFFFFFF (cc=1) -+o 0000000080000000 | 0000000080000000 = 0000000080000000 (cc=1) -+o 000000007FFFFFFF | 0000000080000000 = 000000007FFFFFFF (cc=1) -+o AAAAAAAAAAAAAAAA | 0000000080000000 = AAAAAAAAAAAAAAAA (cc=1) -+o 8000000000000000 | 0000000080000000 = 8000000000000000 (cc=0) -+o FFFFFFFFFFFFFFFF | 0000000080000000 = FFFFFFFFFFFFFFFF (cc=1) -+o 5555555555555555 | 0000000080000000 = 5555555555555555 (cc=1) -+og 0000000000000000 | 0000000080000000 = 0000000080000000 (cc=1) -+og 0000000000000001 | 0000000080000000 = 0000000080000001 (cc=1) -+og 000000000000FFFF | 0000000080000000 = 000000008000FFFF (cc=1) -+og 0000000000007FFF | 0000000080000000 = 0000000080007FFF (cc=1) -+og 0000000000008000 | 0000000080000000 = 0000000080008000 (cc=1) -+og 00000000FFFFFFFF | 0000000080000000 = 00000000FFFFFFFF (cc=1) -+og 0000000080000000 | 0000000080000000 = 0000000080000000 (cc=1) -+og 000000007FFFFFFF | 0000000080000000 = 00000000FFFFFFFF (cc=1) -+og AAAAAAAAAAAAAAAA | 0000000080000000 = AAAAAAAAAAAAAAAA (cc=1) -+og 8000000000000000 | 0000000080000000 = 8000000080000000 (cc=1) -+og FFFFFFFFFFFFFFFF | 0000000080000000 = FFFFFFFFFFFFFFFF (cc=1) -+og 5555555555555555 | 0000000080000000 = 55555555D5555555 (cc=1) -+or 0000000000000000 | 0000000080000000 = 0000000080000000 (cc=1) -+or 0000000000000001 | 0000000080000000 = 0000000080000001 (cc=1) -+or 000000000000FFFF | 0000000080000000 = 000000008000FFFF (cc=1) -+or 0000000000007FFF | 0000000080000000 = 0000000080007FFF (cc=1) -+or 0000000000008000 | 0000000080000000 = 0000000080008000 (cc=1) -+or 00000000FFFFFFFF | 0000000080000000 = 00000000FFFFFFFF (cc=1) -+or 0000000080000000 | 0000000080000000 = 0000000080000000 (cc=1) -+or 000000007FFFFFFF | 0000000080000000 = 00000000FFFFFFFF (cc=1) -+or AAAAAAAAAAAAAAAA | 0000000080000000 = AAAAAAAAAAAAAAAA (cc=1) -+or 8000000000000000 | 0000000080000000 = 8000000080000000 (cc=1) -+or FFFFFFFFFFFFFFFF | 0000000080000000 = FFFFFFFFFFFFFFFF (cc=1) -+or 5555555555555555 | 0000000080000000 = 55555555D5555555 (cc=1) -+ogr 0000000000000000 | 0000000080000000 = 0000000080000000 (cc=1) -+ogr 0000000000000001 | 0000000080000000 = 0000000080000001 (cc=1) -+ogr 000000000000FFFF | 0000000080000000 = 000000008000FFFF (cc=1) -+ogr 0000000000007FFF | 0000000080000000 = 0000000080007FFF (cc=1) -+ogr 0000000000008000 | 0000000080000000 = 0000000080008000 (cc=1) -+ogr 00000000FFFFFFFF | 0000000080000000 = 00000000FFFFFFFF (cc=1) -+ogr 0000000080000000 | 0000000080000000 = 0000000080000000 (cc=1) -+ogr 000000007FFFFFFF | 0000000080000000 = 00000000FFFFFFFF (cc=1) -+ogr AAAAAAAAAAAAAAAA | 0000000080000000 = AAAAAAAAAAAAAAAA (cc=1) -+ogr 8000000000000000 | 0000000080000000 = 8000000080000000 (cc=1) -+ogr FFFFFFFFFFFFFFFF | 0000000080000000 = FFFFFFFFFFFFFFFF (cc=1) -+ogr 5555555555555555 | 0000000080000000 = 55555555D5555555 (cc=1) -+oy 0000000000000000 | 0000000080000000 = 0000000000000000 (cc=0) -+oy 0000000000000001 | 0000000080000000 = 0000000000000001 (cc=1) -+oy 000000000000FFFF | 0000000080000000 = 000000000000FFFF (cc=1) -+oy 0000000000007FFF | 0000000080000000 = 0000000000007FFF (cc=1) -+oy 0000000000008000 | 0000000080000000 = 0000000000008000 (cc=1) -+oy 00000000FFFFFFFF | 0000000080000000 = 00000000FFFFFFFF (cc=1) -+oy 0000000080000000 | 0000000080000000 = 0000000080000000 (cc=1) -+oy 000000007FFFFFFF | 0000000080000000 = 000000007FFFFFFF (cc=1) -+oy AAAAAAAAAAAAAAAA | 0000000080000000 = AAAAAAAAAAAAAAAA (cc=1) -+oy 8000000000000000 | 0000000080000000 = 8000000000000000 (cc=0) -+oy FFFFFFFFFFFFFFFF | 0000000080000000 = FFFFFFFFFFFFFFFF (cc=1) -+oy 5555555555555555 | 0000000080000000 = 5555555555555555 (cc=1) -+o 0000000000000000 | 0000000055555555 = 0000000000000000 (cc=0) -+o 0000000000000001 | 0000000055555555 = 0000000000000001 (cc=1) -+o 000000000000FFFF | 0000000055555555 = 000000000000FFFF (cc=1) -+o 0000000000007FFF | 0000000055555555 = 0000000000007FFF (cc=1) -+o 0000000000008000 | 0000000055555555 = 0000000000008000 (cc=1) -+o 00000000FFFFFFFF | 0000000055555555 = 00000000FFFFFFFF (cc=1) -+o 0000000080000000 | 0000000055555555 = 0000000080000000 (cc=1) -+o 000000007FFFFFFF | 0000000055555555 = 000000007FFFFFFF (cc=1) -+o AAAAAAAAAAAAAAAA | 0000000055555555 = AAAAAAAAAAAAAAAA (cc=1) -+o 8000000000000000 | 0000000055555555 = 8000000000000000 (cc=0) -+o FFFFFFFFFFFFFFFF | 0000000055555555 = FFFFFFFFFFFFFFFF (cc=1) -+o 5555555555555555 | 0000000055555555 = 5555555555555555 (cc=1) -+og 0000000000000000 | 0000000055555555 = 0000000055555555 (cc=1) -+og 0000000000000001 | 0000000055555555 = 0000000055555555 (cc=1) -+og 000000000000FFFF | 0000000055555555 = 000000005555FFFF (cc=1) -+og 0000000000007FFF | 0000000055555555 = 0000000055557FFF (cc=1) -+og 0000000000008000 | 0000000055555555 = 000000005555D555 (cc=1) -+og 00000000FFFFFFFF | 0000000055555555 = 00000000FFFFFFFF (cc=1) -+og 0000000080000000 | 0000000055555555 = 00000000D5555555 (cc=1) -+og 000000007FFFFFFF | 0000000055555555 = 000000007FFFFFFF (cc=1) -+og AAAAAAAAAAAAAAAA | 0000000055555555 = AAAAAAAAFFFFFFFF (cc=1) -+og 8000000000000000 | 0000000055555555 = 8000000055555555 (cc=1) -+og FFFFFFFFFFFFFFFF | 0000000055555555 = FFFFFFFFFFFFFFFF (cc=1) -+og 5555555555555555 | 0000000055555555 = 5555555555555555 (cc=1) -+or 0000000000000000 | 0000000055555555 = 0000000055555555 (cc=1) -+or 0000000000000001 | 0000000055555555 = 0000000055555555 (cc=1) -+or 000000000000FFFF | 0000000055555555 = 000000005555FFFF (cc=1) -+or 0000000000007FFF | 0000000055555555 = 0000000055557FFF (cc=1) -+or 0000000000008000 | 0000000055555555 = 000000005555D555 (cc=1) -+or 00000000FFFFFFFF | 0000000055555555 = 00000000FFFFFFFF (cc=1) -+or 0000000080000000 | 0000000055555555 = 00000000D5555555 (cc=1) -+or 000000007FFFFFFF | 0000000055555555 = 000000007FFFFFFF (cc=1) -+or AAAAAAAAAAAAAAAA | 0000000055555555 = AAAAAAAAFFFFFFFF (cc=1) -+or 8000000000000000 | 0000000055555555 = 8000000055555555 (cc=1) -+or FFFFFFFFFFFFFFFF | 0000000055555555 = FFFFFFFFFFFFFFFF (cc=1) -+or 5555555555555555 | 0000000055555555 = 5555555555555555 (cc=1) -+ogr 0000000000000000 | 0000000055555555 = 0000000055555555 (cc=1) -+ogr 0000000000000001 | 0000000055555555 = 0000000055555555 (cc=1) -+ogr 000000000000FFFF | 0000000055555555 = 000000005555FFFF (cc=1) -+ogr 0000000000007FFF | 0000000055555555 = 0000000055557FFF (cc=1) -+ogr 0000000000008000 | 0000000055555555 = 000000005555D555 (cc=1) -+ogr 00000000FFFFFFFF | 0000000055555555 = 00000000FFFFFFFF (cc=1) -+ogr 0000000080000000 | 0000000055555555 = 00000000D5555555 (cc=1) -+ogr 000000007FFFFFFF | 0000000055555555 = 000000007FFFFFFF (cc=1) -+ogr AAAAAAAAAAAAAAAA | 0000000055555555 = AAAAAAAAFFFFFFFF (cc=1) -+ogr 8000000000000000 | 0000000055555555 = 8000000055555555 (cc=1) -+ogr FFFFFFFFFFFFFFFF | 0000000055555555 = FFFFFFFFFFFFFFFF (cc=1) -+ogr 5555555555555555 | 0000000055555555 = 5555555555555555 (cc=1) -+oy 0000000000000000 | 0000000055555555 = 0000000000000000 (cc=0) -+oy 0000000000000001 | 0000000055555555 = 0000000000000001 (cc=1) -+oy 000000000000FFFF | 0000000055555555 = 000000000000FFFF (cc=1) -+oy 0000000000007FFF | 0000000055555555 = 0000000000007FFF (cc=1) -+oy 0000000000008000 | 0000000055555555 = 0000000000008000 (cc=1) -+oy 00000000FFFFFFFF | 0000000055555555 = 00000000FFFFFFFF (cc=1) -+oy 0000000080000000 | 0000000055555555 = 0000000080000000 (cc=1) -+oy 000000007FFFFFFF | 0000000055555555 = 000000007FFFFFFF (cc=1) -+oy AAAAAAAAAAAAAAAA | 0000000055555555 = AAAAAAAAAAAAAAAA (cc=1) -+oy 8000000000000000 | 0000000055555555 = 8000000000000000 (cc=0) -+oy FFFFFFFFFFFFFFFF | 0000000055555555 = FFFFFFFFFFFFFFFF (cc=1) -+oy 5555555555555555 | 0000000055555555 = 5555555555555555 (cc=1) -+o 0000000000000000 | 00000000FFFFFFFF = 0000000000000000 (cc=0) -+o 0000000000000001 | 00000000FFFFFFFF = 0000000000000001 (cc=1) -+o 000000000000FFFF | 00000000FFFFFFFF = 000000000000FFFF (cc=1) -+o 0000000000007FFF | 00000000FFFFFFFF = 0000000000007FFF (cc=1) -+o 0000000000008000 | 00000000FFFFFFFF = 0000000000008000 (cc=1) -+o 00000000FFFFFFFF | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+o 0000000080000000 | 00000000FFFFFFFF = 0000000080000000 (cc=1) -+o 000000007FFFFFFF | 00000000FFFFFFFF = 000000007FFFFFFF (cc=1) -+o AAAAAAAAAAAAAAAA | 00000000FFFFFFFF = AAAAAAAAAAAAAAAA (cc=1) -+o 8000000000000000 | 00000000FFFFFFFF = 8000000000000000 (cc=0) -+o FFFFFFFFFFFFFFFF | 00000000FFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+o 5555555555555555 | 00000000FFFFFFFF = 5555555555555555 (cc=1) -+og 0000000000000000 | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+og 0000000000000001 | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+og 000000000000FFFF | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+og 0000000000007FFF | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+og 0000000000008000 | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+og 00000000FFFFFFFF | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+og 0000000080000000 | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+og 000000007FFFFFFF | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+og AAAAAAAAAAAAAAAA | 00000000FFFFFFFF = AAAAAAAAFFFFFFFF (cc=1) -+og 8000000000000000 | 00000000FFFFFFFF = 80000000FFFFFFFF (cc=1) -+og FFFFFFFFFFFFFFFF | 00000000FFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+og 5555555555555555 | 00000000FFFFFFFF = 55555555FFFFFFFF (cc=1) -+or 0000000000000000 | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+or 0000000000000001 | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+or 000000000000FFFF | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+or 0000000000007FFF | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+or 0000000000008000 | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+or 00000000FFFFFFFF | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+or 0000000080000000 | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+or 000000007FFFFFFF | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+or AAAAAAAAAAAAAAAA | 00000000FFFFFFFF = AAAAAAAAFFFFFFFF (cc=1) -+or 8000000000000000 | 00000000FFFFFFFF = 80000000FFFFFFFF (cc=1) -+or FFFFFFFFFFFFFFFF | 00000000FFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+or 5555555555555555 | 00000000FFFFFFFF = 55555555FFFFFFFF (cc=1) -+ogr 0000000000000000 | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+ogr 0000000000000001 | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+ogr 000000000000FFFF | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+ogr 0000000000007FFF | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+ogr 0000000000008000 | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+ogr 00000000FFFFFFFF | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+ogr 0000000080000000 | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+ogr 000000007FFFFFFF | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+ogr AAAAAAAAAAAAAAAA | 00000000FFFFFFFF = AAAAAAAAFFFFFFFF (cc=1) -+ogr 8000000000000000 | 00000000FFFFFFFF = 80000000FFFFFFFF (cc=1) -+ogr FFFFFFFFFFFFFFFF | 00000000FFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+ogr 5555555555555555 | 00000000FFFFFFFF = 55555555FFFFFFFF (cc=1) -+oy 0000000000000000 | 00000000FFFFFFFF = 0000000000000000 (cc=0) -+oy 0000000000000001 | 00000000FFFFFFFF = 0000000000000001 (cc=1) -+oy 000000000000FFFF | 00000000FFFFFFFF = 000000000000FFFF (cc=1) -+oy 0000000000007FFF | 00000000FFFFFFFF = 0000000000007FFF (cc=1) -+oy 0000000000008000 | 00000000FFFFFFFF = 0000000000008000 (cc=1) -+oy 00000000FFFFFFFF | 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+oy 0000000080000000 | 00000000FFFFFFFF = 0000000080000000 (cc=1) -+oy 000000007FFFFFFF | 00000000FFFFFFFF = 000000007FFFFFFF (cc=1) -+oy AAAAAAAAAAAAAAAA | 00000000FFFFFFFF = AAAAAAAAAAAAAAAA (cc=1) -+oy 8000000000000000 | 00000000FFFFFFFF = 8000000000000000 (cc=0) -+oy FFFFFFFFFFFFFFFF | 00000000FFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+oy 5555555555555555 | 00000000FFFFFFFF = 5555555555555555 (cc=1) -+o 0000000000000000 | 000000000000FFFF = 0000000000000000 (cc=0) -+o 0000000000000001 | 000000000000FFFF = 0000000000000001 (cc=1) -+o 000000000000FFFF | 000000000000FFFF = 000000000000FFFF (cc=1) -+o 0000000000007FFF | 000000000000FFFF = 0000000000007FFF (cc=1) -+o 0000000000008000 | 000000000000FFFF = 0000000000008000 (cc=1) -+o 00000000FFFFFFFF | 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+o 0000000080000000 | 000000000000FFFF = 0000000080000000 (cc=1) -+o 000000007FFFFFFF | 000000000000FFFF = 000000007FFFFFFF (cc=1) -+o AAAAAAAAAAAAAAAA | 000000000000FFFF = AAAAAAAAAAAAAAAA (cc=1) -+o 8000000000000000 | 000000000000FFFF = 8000000000000000 (cc=0) -+o FFFFFFFFFFFFFFFF | 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+o 5555555555555555 | 000000000000FFFF = 5555555555555555 (cc=1) -+og 0000000000000000 | 000000000000FFFF = 000000000000FFFF (cc=1) -+og 0000000000000001 | 000000000000FFFF = 000000000000FFFF (cc=1) -+og 000000000000FFFF | 000000000000FFFF = 000000000000FFFF (cc=1) -+og 0000000000007FFF | 000000000000FFFF = 000000000000FFFF (cc=1) -+og 0000000000008000 | 000000000000FFFF = 000000000000FFFF (cc=1) -+og 00000000FFFFFFFF | 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+og 0000000080000000 | 000000000000FFFF = 000000008000FFFF (cc=1) -+og 000000007FFFFFFF | 000000000000FFFF = 000000007FFFFFFF (cc=1) -+og AAAAAAAAAAAAAAAA | 000000000000FFFF = AAAAAAAAAAAAFFFF (cc=1) -+og 8000000000000000 | 000000000000FFFF = 800000000000FFFF (cc=1) -+og FFFFFFFFFFFFFFFF | 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+og 5555555555555555 | 000000000000FFFF = 555555555555FFFF (cc=1) -+or 0000000000000000 | 000000000000FFFF = 000000000000FFFF (cc=1) -+or 0000000000000001 | 000000000000FFFF = 000000000000FFFF (cc=1) -+or 000000000000FFFF | 000000000000FFFF = 000000000000FFFF (cc=1) -+or 0000000000007FFF | 000000000000FFFF = 000000000000FFFF (cc=1) -+or 0000000000008000 | 000000000000FFFF = 000000000000FFFF (cc=1) -+or 00000000FFFFFFFF | 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+or 0000000080000000 | 000000000000FFFF = 000000008000FFFF (cc=1) -+or 000000007FFFFFFF | 000000000000FFFF = 000000007FFFFFFF (cc=1) -+or AAAAAAAAAAAAAAAA | 000000000000FFFF = AAAAAAAAAAAAFFFF (cc=1) -+or 8000000000000000 | 000000000000FFFF = 800000000000FFFF (cc=1) -+or FFFFFFFFFFFFFFFF | 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+or 5555555555555555 | 000000000000FFFF = 555555555555FFFF (cc=1) -+ogr 0000000000000000 | 000000000000FFFF = 000000000000FFFF (cc=1) -+ogr 0000000000000001 | 000000000000FFFF = 000000000000FFFF (cc=1) -+ogr 000000000000FFFF | 000000000000FFFF = 000000000000FFFF (cc=1) -+ogr 0000000000007FFF | 000000000000FFFF = 000000000000FFFF (cc=1) -+ogr 0000000000008000 | 000000000000FFFF = 000000000000FFFF (cc=1) -+ogr 00000000FFFFFFFF | 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+ogr 0000000080000000 | 000000000000FFFF = 000000008000FFFF (cc=1) -+ogr 000000007FFFFFFF | 000000000000FFFF = 000000007FFFFFFF (cc=1) -+ogr AAAAAAAAAAAAAAAA | 000000000000FFFF = AAAAAAAAAAAAFFFF (cc=1) -+ogr 8000000000000000 | 000000000000FFFF = 800000000000FFFF (cc=1) -+ogr FFFFFFFFFFFFFFFF | 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+ogr 5555555555555555 | 000000000000FFFF = 555555555555FFFF (cc=1) -+oy 0000000000000000 | 000000000000FFFF = 0000000000000000 (cc=0) -+oy 0000000000000001 | 000000000000FFFF = 0000000000000001 (cc=1) -+oy 000000000000FFFF | 000000000000FFFF = 000000000000FFFF (cc=1) -+oy 0000000000007FFF | 000000000000FFFF = 0000000000007FFF (cc=1) -+oy 0000000000008000 | 000000000000FFFF = 0000000000008000 (cc=1) -+oy 00000000FFFFFFFF | 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+oy 0000000080000000 | 000000000000FFFF = 0000000080000000 (cc=1) -+oy 000000007FFFFFFF | 000000000000FFFF = 000000007FFFFFFF (cc=1) -+oy AAAAAAAAAAAAAAAA | 000000000000FFFF = AAAAAAAAAAAAAAAA (cc=1) -+oy 8000000000000000 | 000000000000FFFF = 8000000000000000 (cc=0) -+oy FFFFFFFFFFFFFFFF | 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+oy 5555555555555555 | 000000000000FFFF = 5555555555555555 (cc=1) -+o 0000000000000000 | 0000000000007FFF = 0000000000000000 (cc=0) -+o 0000000000000001 | 0000000000007FFF = 0000000000000001 (cc=1) -+o 000000000000FFFF | 0000000000007FFF = 000000000000FFFF (cc=1) -+o 0000000000007FFF | 0000000000007FFF = 0000000000007FFF (cc=1) -+o 0000000000008000 | 0000000000007FFF = 0000000000008000 (cc=1) -+o 00000000FFFFFFFF | 0000000000007FFF = 00000000FFFFFFFF (cc=1) -+o 0000000080000000 | 0000000000007FFF = 0000000080000000 (cc=1) -+o 000000007FFFFFFF | 0000000000007FFF = 000000007FFFFFFF (cc=1) -+o AAAAAAAAAAAAAAAA | 0000000000007FFF = AAAAAAAAAAAAAAAA (cc=1) -+o 8000000000000000 | 0000000000007FFF = 8000000000000000 (cc=0) -+o FFFFFFFFFFFFFFFF | 0000000000007FFF = FFFFFFFFFFFFFFFF (cc=1) -+o 5555555555555555 | 0000000000007FFF = 5555555555555555 (cc=1) -+og 0000000000000000 | 0000000000007FFF = 0000000000007FFF (cc=1) -+og 0000000000000001 | 0000000000007FFF = 0000000000007FFF (cc=1) -+og 000000000000FFFF | 0000000000007FFF = 000000000000FFFF (cc=1) -+og 0000000000007FFF | 0000000000007FFF = 0000000000007FFF (cc=1) -+og 0000000000008000 | 0000000000007FFF = 000000000000FFFF (cc=1) -+og 00000000FFFFFFFF | 0000000000007FFF = 00000000FFFFFFFF (cc=1) -+og 0000000080000000 | 0000000000007FFF = 0000000080007FFF (cc=1) -+og 000000007FFFFFFF | 0000000000007FFF = 000000007FFFFFFF (cc=1) -+og AAAAAAAAAAAAAAAA | 0000000000007FFF = AAAAAAAAAAAAFFFF (cc=1) -+og 8000000000000000 | 0000000000007FFF = 8000000000007FFF (cc=1) -+og FFFFFFFFFFFFFFFF | 0000000000007FFF = FFFFFFFFFFFFFFFF (cc=1) -+og 5555555555555555 | 0000000000007FFF = 5555555555557FFF (cc=1) -+or 0000000000000000 | 0000000000007FFF = 0000000000007FFF (cc=1) -+or 0000000000000001 | 0000000000007FFF = 0000000000007FFF (cc=1) -+or 000000000000FFFF | 0000000000007FFF = 000000000000FFFF (cc=1) -+or 0000000000007FFF | 0000000000007FFF = 0000000000007FFF (cc=1) -+or 0000000000008000 | 0000000000007FFF = 000000000000FFFF (cc=1) -+or 00000000FFFFFFFF | 0000000000007FFF = 00000000FFFFFFFF (cc=1) -+or 0000000080000000 | 0000000000007FFF = 0000000080007FFF (cc=1) -+or 000000007FFFFFFF | 0000000000007FFF = 000000007FFFFFFF (cc=1) -+or AAAAAAAAAAAAAAAA | 0000000000007FFF = AAAAAAAAAAAAFFFF (cc=1) -+or 8000000000000000 | 0000000000007FFF = 8000000000007FFF (cc=1) -+or FFFFFFFFFFFFFFFF | 0000000000007FFF = FFFFFFFFFFFFFFFF (cc=1) -+or 5555555555555555 | 0000000000007FFF = 5555555555557FFF (cc=1) -+ogr 0000000000000000 | 0000000000007FFF = 0000000000007FFF (cc=1) -+ogr 0000000000000001 | 0000000000007FFF = 0000000000007FFF (cc=1) -+ogr 000000000000FFFF | 0000000000007FFF = 000000000000FFFF (cc=1) -+ogr 0000000000007FFF | 0000000000007FFF = 0000000000007FFF (cc=1) -+ogr 0000000000008000 | 0000000000007FFF = 000000000000FFFF (cc=1) -+ogr 00000000FFFFFFFF | 0000000000007FFF = 00000000FFFFFFFF (cc=1) -+ogr 0000000080000000 | 0000000000007FFF = 0000000080007FFF (cc=1) -+ogr 000000007FFFFFFF | 0000000000007FFF = 000000007FFFFFFF (cc=1) -+ogr AAAAAAAAAAAAAAAA | 0000000000007FFF = AAAAAAAAAAAAFFFF (cc=1) -+ogr 8000000000000000 | 0000000000007FFF = 8000000000007FFF (cc=1) -+ogr FFFFFFFFFFFFFFFF | 0000000000007FFF = FFFFFFFFFFFFFFFF (cc=1) -+ogr 5555555555555555 | 0000000000007FFF = 5555555555557FFF (cc=1) -+oy 0000000000000000 | 0000000000007FFF = 0000000000000000 (cc=0) -+oy 0000000000000001 | 0000000000007FFF = 0000000000000001 (cc=1) -+oy 000000000000FFFF | 0000000000007FFF = 000000000000FFFF (cc=1) -+oy 0000000000007FFF | 0000000000007FFF = 0000000000007FFF (cc=1) -+oy 0000000000008000 | 0000000000007FFF = 0000000000008000 (cc=1) -+oy 00000000FFFFFFFF | 0000000000007FFF = 00000000FFFFFFFF (cc=1) -+oy 0000000080000000 | 0000000000007FFF = 0000000080000000 (cc=1) -+oy 000000007FFFFFFF | 0000000000007FFF = 000000007FFFFFFF (cc=1) -+oy AAAAAAAAAAAAAAAA | 0000000000007FFF = AAAAAAAAAAAAAAAA (cc=1) -+oy 8000000000000000 | 0000000000007FFF = 8000000000000000 (cc=0) -+oy FFFFFFFFFFFFFFFF | 0000000000007FFF = FFFFFFFFFFFFFFFF (cc=1) -+oy 5555555555555555 | 0000000000007FFF = 5555555555555555 (cc=1) -+o 0000000000000000 | 0000000000008000 = 0000000000000000 (cc=0) -+o 0000000000000001 | 0000000000008000 = 0000000000000001 (cc=1) -+o 000000000000FFFF | 0000000000008000 = 000000000000FFFF (cc=1) -+o 0000000000007FFF | 0000000000008000 = 0000000000007FFF (cc=1) -+o 0000000000008000 | 0000000000008000 = 0000000000008000 (cc=1) -+o 00000000FFFFFFFF | 0000000000008000 = 00000000FFFFFFFF (cc=1) -+o 0000000080000000 | 0000000000008000 = 0000000080000000 (cc=1) -+o 000000007FFFFFFF | 0000000000008000 = 000000007FFFFFFF (cc=1) -+o AAAAAAAAAAAAAAAA | 0000000000008000 = AAAAAAAAAAAAAAAA (cc=1) -+o 8000000000000000 | 0000000000008000 = 8000000000000000 (cc=0) -+o FFFFFFFFFFFFFFFF | 0000000000008000 = FFFFFFFFFFFFFFFF (cc=1) -+o 5555555555555555 | 0000000000008000 = 5555555555555555 (cc=1) -+og 0000000000000000 | 0000000000008000 = 0000000000008000 (cc=1) -+og 0000000000000001 | 0000000000008000 = 0000000000008001 (cc=1) -+og 000000000000FFFF | 0000000000008000 = 000000000000FFFF (cc=1) -+og 0000000000007FFF | 0000000000008000 = 000000000000FFFF (cc=1) -+og 0000000000008000 | 0000000000008000 = 0000000000008000 (cc=1) -+og 00000000FFFFFFFF | 0000000000008000 = 00000000FFFFFFFF (cc=1) -+og 0000000080000000 | 0000000000008000 = 0000000080008000 (cc=1) -+og 000000007FFFFFFF | 0000000000008000 = 000000007FFFFFFF (cc=1) -+og AAAAAAAAAAAAAAAA | 0000000000008000 = AAAAAAAAAAAAAAAA (cc=1) -+og 8000000000000000 | 0000000000008000 = 8000000000008000 (cc=1) -+og FFFFFFFFFFFFFFFF | 0000000000008000 = FFFFFFFFFFFFFFFF (cc=1) -+og 5555555555555555 | 0000000000008000 = 555555555555D555 (cc=1) -+or 0000000000000000 | 0000000000008000 = 0000000000008000 (cc=1) -+or 0000000000000001 | 0000000000008000 = 0000000000008001 (cc=1) -+or 000000000000FFFF | 0000000000008000 = 000000000000FFFF (cc=1) -+or 0000000000007FFF | 0000000000008000 = 000000000000FFFF (cc=1) -+or 0000000000008000 | 0000000000008000 = 0000000000008000 (cc=1) -+or 00000000FFFFFFFF | 0000000000008000 = 00000000FFFFFFFF (cc=1) -+or 0000000080000000 | 0000000000008000 = 0000000080008000 (cc=1) -+or 000000007FFFFFFF | 0000000000008000 = 000000007FFFFFFF (cc=1) -+or AAAAAAAAAAAAAAAA | 0000000000008000 = AAAAAAAAAAAAAAAA (cc=1) -+or 8000000000000000 | 0000000000008000 = 8000000000008000 (cc=1) -+or FFFFFFFFFFFFFFFF | 0000000000008000 = FFFFFFFFFFFFFFFF (cc=1) -+or 5555555555555555 | 0000000000008000 = 555555555555D555 (cc=1) -+ogr 0000000000000000 | 0000000000008000 = 0000000000008000 (cc=1) -+ogr 0000000000000001 | 0000000000008000 = 0000000000008001 (cc=1) -+ogr 000000000000FFFF | 0000000000008000 = 000000000000FFFF (cc=1) -+ogr 0000000000007FFF | 0000000000008000 = 000000000000FFFF (cc=1) -+ogr 0000000000008000 | 0000000000008000 = 0000000000008000 (cc=1) -+ogr 00000000FFFFFFFF | 0000000000008000 = 00000000FFFFFFFF (cc=1) -+ogr 0000000080000000 | 0000000000008000 = 0000000080008000 (cc=1) -+ogr 000000007FFFFFFF | 0000000000008000 = 000000007FFFFFFF (cc=1) -+ogr AAAAAAAAAAAAAAAA | 0000000000008000 = AAAAAAAAAAAAAAAA (cc=1) -+ogr 8000000000000000 | 0000000000008000 = 8000000000008000 (cc=1) -+ogr FFFFFFFFFFFFFFFF | 0000000000008000 = FFFFFFFFFFFFFFFF (cc=1) -+ogr 5555555555555555 | 0000000000008000 = 555555555555D555 (cc=1) -+oy 0000000000000000 | 0000000000008000 = 0000000000000000 (cc=0) -+oy 0000000000000001 | 0000000000008000 = 0000000000000001 (cc=1) -+oy 000000000000FFFF | 0000000000008000 = 000000000000FFFF (cc=1) -+oy 0000000000007FFF | 0000000000008000 = 0000000000007FFF (cc=1) -+oy 0000000000008000 | 0000000000008000 = 0000000000008000 (cc=1) -+oy 00000000FFFFFFFF | 0000000000008000 = 00000000FFFFFFFF (cc=1) -+oy 0000000080000000 | 0000000000008000 = 0000000080000000 (cc=1) -+oy 000000007FFFFFFF | 0000000000008000 = 000000007FFFFFFF (cc=1) -+oy AAAAAAAAAAAAAAAA | 0000000000008000 = AAAAAAAAAAAAAAAA (cc=1) -+oy 8000000000000000 | 0000000000008000 = 8000000000000000 (cc=0) -+oy FFFFFFFFFFFFFFFF | 0000000000008000 = FFFFFFFFFFFFFFFF (cc=1) -+oy 5555555555555555 | 0000000000008000 = 5555555555555555 (cc=1) -+o 0000000000000000 | 000000000000FFFF = 0000000000000000 (cc=0) -+o 0000000000000001 | 000000000000FFFF = 0000000000000001 (cc=1) -+o 000000000000FFFF | 000000000000FFFF = 000000000000FFFF (cc=1) -+o 0000000000007FFF | 000000000000FFFF = 0000000000007FFF (cc=1) -+o 0000000000008000 | 000000000000FFFF = 0000000000008000 (cc=1) -+o 00000000FFFFFFFF | 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+o 0000000080000000 | 000000000000FFFF = 0000000080000000 (cc=1) -+o 000000007FFFFFFF | 000000000000FFFF = 000000007FFFFFFF (cc=1) -+o AAAAAAAAAAAAAAAA | 000000000000FFFF = AAAAAAAAAAAAAAAA (cc=1) -+o 8000000000000000 | 000000000000FFFF = 8000000000000000 (cc=0) -+o FFFFFFFFFFFFFFFF | 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+o 5555555555555555 | 000000000000FFFF = 5555555555555555 (cc=1) -+og 0000000000000000 | 000000000000FFFF = 000000000000FFFF (cc=1) -+og 0000000000000001 | 000000000000FFFF = 000000000000FFFF (cc=1) -+og 000000000000FFFF | 000000000000FFFF = 000000000000FFFF (cc=1) -+og 0000000000007FFF | 000000000000FFFF = 000000000000FFFF (cc=1) -+og 0000000000008000 | 000000000000FFFF = 000000000000FFFF (cc=1) -+og 00000000FFFFFFFF | 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+og 0000000080000000 | 000000000000FFFF = 000000008000FFFF (cc=1) -+og 000000007FFFFFFF | 000000000000FFFF = 000000007FFFFFFF (cc=1) -+og AAAAAAAAAAAAAAAA | 000000000000FFFF = AAAAAAAAAAAAFFFF (cc=1) -+og 8000000000000000 | 000000000000FFFF = 800000000000FFFF (cc=1) -+og FFFFFFFFFFFFFFFF | 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+og 5555555555555555 | 000000000000FFFF = 555555555555FFFF (cc=1) -+or 0000000000000000 | 000000000000FFFF = 000000000000FFFF (cc=1) -+or 0000000000000001 | 000000000000FFFF = 000000000000FFFF (cc=1) -+or 000000000000FFFF | 000000000000FFFF = 000000000000FFFF (cc=1) -+or 0000000000007FFF | 000000000000FFFF = 000000000000FFFF (cc=1) -+or 0000000000008000 | 000000000000FFFF = 000000000000FFFF (cc=1) -+or 00000000FFFFFFFF | 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+or 0000000080000000 | 000000000000FFFF = 000000008000FFFF (cc=1) -+or 000000007FFFFFFF | 000000000000FFFF = 000000007FFFFFFF (cc=1) -+or AAAAAAAAAAAAAAAA | 000000000000FFFF = AAAAAAAAAAAAFFFF (cc=1) -+or 8000000000000000 | 000000000000FFFF = 800000000000FFFF (cc=1) -+or FFFFFFFFFFFFFFFF | 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+or 5555555555555555 | 000000000000FFFF = 555555555555FFFF (cc=1) -+ogr 0000000000000000 | 000000000000FFFF = 000000000000FFFF (cc=1) -+ogr 0000000000000001 | 000000000000FFFF = 000000000000FFFF (cc=1) -+ogr 000000000000FFFF | 000000000000FFFF = 000000000000FFFF (cc=1) -+ogr 0000000000007FFF | 000000000000FFFF = 000000000000FFFF (cc=1) -+ogr 0000000000008000 | 000000000000FFFF = 000000000000FFFF (cc=1) -+ogr 00000000FFFFFFFF | 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+ogr 0000000080000000 | 000000000000FFFF = 000000008000FFFF (cc=1) -+ogr 000000007FFFFFFF | 000000000000FFFF = 000000007FFFFFFF (cc=1) -+ogr AAAAAAAAAAAAAAAA | 000000000000FFFF = AAAAAAAAAAAAFFFF (cc=1) -+ogr 8000000000000000 | 000000000000FFFF = 800000000000FFFF (cc=1) -+ogr FFFFFFFFFFFFFFFF | 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+ogr 5555555555555555 | 000000000000FFFF = 555555555555FFFF (cc=1) -+oy 0000000000000000 | 000000000000FFFF = 0000000000000000 (cc=0) -+oy 0000000000000001 | 000000000000FFFF = 0000000000000001 (cc=1) -+oy 000000000000FFFF | 000000000000FFFF = 000000000000FFFF (cc=1) -+oy 0000000000007FFF | 000000000000FFFF = 0000000000007FFF (cc=1) -+oy 0000000000008000 | 000000000000FFFF = 0000000000008000 (cc=1) -+oy 00000000FFFFFFFF | 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+oy 0000000080000000 | 000000000000FFFF = 0000000080000000 (cc=1) -+oy 000000007FFFFFFF | 000000000000FFFF = 000000007FFFFFFF (cc=1) -+oy AAAAAAAAAAAAAAAA | 000000000000FFFF = AAAAAAAAAAAAAAAA (cc=1) -+oy 8000000000000000 | 000000000000FFFF = 8000000000000000 (cc=0) -+oy FFFFFFFFFFFFFFFF | 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+oy 5555555555555555 | 000000000000FFFF = 5555555555555555 (cc=1) -+oi 0000000000000000 | 0000000000000000 = 0000000000000000 (cc=0) -+oi 0000000000000001 | 0000000000000000 = 0000000000000001 (cc=0) -+oi 000000000000FFFF | 0000000000000000 = 000000000000FFFF (cc=0) -+oi 0000000000007FFF | 0000000000000000 = 0000000000007FFF (cc=0) -+oi 0000000000008000 | 0000000000000000 = 0000000000008000 (cc=0) -+oi 00000000FFFFFFFF | 0000000000000000 = 00000000FFFFFFFF (cc=0) -+oi 0000000080000000 | 0000000000000000 = 0000000080000000 (cc=0) -+oi 000000007FFFFFFF | 0000000000000000 = 000000007FFFFFFF (cc=0) -+oi AAAAAAAAAAAAAAAA | 0000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+oi 8000000000000000 | 0000000000000000 = 8000000000000000 (cc=1) -+oi FFFFFFFFFFFFFFFF | 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+oi 5555555555555555 | 0000000000000000 = 5555555555555555 (cc=1) -+oi 0000000000000000 | 00000000000000FF = FF00000000000000 (cc=1) -+oi 0000000000000001 | 00000000000000FF = FF00000000000001 (cc=1) -+oi 000000000000FFFF | 00000000000000FF = FF0000000000FFFF (cc=1) -+oi 0000000000007FFF | 00000000000000FF = FF00000000007FFF (cc=1) -+oi 0000000000008000 | 00000000000000FF = FF00000000008000 (cc=1) -+oi 00000000FFFFFFFF | 00000000000000FF = FF000000FFFFFFFF (cc=1) -+oi 0000000080000000 | 00000000000000FF = FF00000080000000 (cc=1) -+oi 000000007FFFFFFF | 00000000000000FF = FF0000007FFFFFFF (cc=1) -+oi AAAAAAAAAAAAAAAA | 00000000000000FF = FFAAAAAAAAAAAAAA (cc=1) -+oi 8000000000000000 | 00000000000000FF = FF00000000000000 (cc=1) -+oi FFFFFFFFFFFFFFFF | 00000000000000FF = FFFFFFFFFFFFFFFF (cc=1) -+oi 5555555555555555 | 00000000000000FF = FF55555555555555 (cc=1) -+oi 0000000000000000 | 0000000000000080 = 8000000000000000 (cc=1) -+oi 0000000000000001 | 0000000000000080 = 8000000000000001 (cc=1) -+oi 000000000000FFFF | 0000000000000080 = 800000000000FFFF (cc=1) -+oi 0000000000007FFF | 0000000000000080 = 8000000000007FFF (cc=1) -+oi 0000000000008000 | 0000000000000080 = 8000000000008000 (cc=1) -+oi 00000000FFFFFFFF | 0000000000000080 = 80000000FFFFFFFF (cc=1) -+oi 0000000080000000 | 0000000000000080 = 8000000080000000 (cc=1) -+oi 000000007FFFFFFF | 0000000000000080 = 800000007FFFFFFF (cc=1) -+oi AAAAAAAAAAAAAAAA | 0000000000000080 = AAAAAAAAAAAAAAAA (cc=1) -+oi 8000000000000000 | 0000000000000080 = 8000000000000000 (cc=1) -+oi FFFFFFFFFFFFFFFF | 0000000000000080 = FFFFFFFFFFFFFFFF (cc=1) -+oi 5555555555555555 | 0000000000000080 = D555555555555555 (cc=1) -+oi 0000000000000000 | 00000000000000AA = AA00000000000000 (cc=1) -+oi 0000000000000001 | 00000000000000AA = AA00000000000001 (cc=1) -+oi 000000000000FFFF | 00000000000000AA = AA0000000000FFFF (cc=1) -+oi 0000000000007FFF | 00000000000000AA = AA00000000007FFF (cc=1) -+oi 0000000000008000 | 00000000000000AA = AA00000000008000 (cc=1) -+oi 00000000FFFFFFFF | 00000000000000AA = AA000000FFFFFFFF (cc=1) -+oi 0000000080000000 | 00000000000000AA = AA00000080000000 (cc=1) -+oi 000000007FFFFFFF | 00000000000000AA = AA0000007FFFFFFF (cc=1) -+oi AAAAAAAAAAAAAAAA | 00000000000000AA = AAAAAAAAAAAAAAAA (cc=1) -+oi 8000000000000000 | 00000000000000AA = AA00000000000000 (cc=1) -+oi FFFFFFFFFFFFFFFF | 00000000000000AA = FFFFFFFFFFFFFFFF (cc=1) -+oi 5555555555555555 | 00000000000000AA = FF55555555555555 (cc=1) -+oi 0000000000000000 | 0000000000000055 = 5500000000000000 (cc=1) -+oi 0000000000000001 | 0000000000000055 = 5500000000000001 (cc=1) -+oi 000000000000FFFF | 0000000000000055 = 550000000000FFFF (cc=1) -+oi 0000000000007FFF | 0000000000000055 = 5500000000007FFF (cc=1) -+oi 0000000000008000 | 0000000000000055 = 5500000000008000 (cc=1) -+oi 00000000FFFFFFFF | 0000000000000055 = 55000000FFFFFFFF (cc=1) -+oi 0000000080000000 | 0000000000000055 = 5500000080000000 (cc=1) -+oi 000000007FFFFFFF | 0000000000000055 = 550000007FFFFFFF (cc=1) -+oi AAAAAAAAAAAAAAAA | 0000000000000055 = FFAAAAAAAAAAAAAA (cc=1) -+oi 8000000000000000 | 0000000000000055 = D500000000000000 (cc=1) -+oi FFFFFFFFFFFFFFFF | 0000000000000055 = FFFFFFFFFFFFFFFF (cc=1) -+oi 5555555555555555 | 0000000000000055 = 5555555555555555 (cc=1) -+oiy 0000000000000000 | 0000000000000000 = 0000000000000000 (cc=0) -+oiy 0000000000000001 | 0000000000000000 = 0000000000000001 (cc=0) -+oiy 000000000000FFFF | 0000000000000000 = 000000000000FFFF (cc=0) -+oiy 0000000000007FFF | 0000000000000000 = 0000000000007FFF (cc=0) -+oiy 0000000000008000 | 0000000000000000 = 0000000000008000 (cc=0) -+oiy 00000000FFFFFFFF | 0000000000000000 = 00000000FFFFFFFF (cc=0) -+oiy 0000000080000000 | 0000000000000000 = 0000000080000000 (cc=0) -+oiy 000000007FFFFFFF | 0000000000000000 = 000000007FFFFFFF (cc=0) -+oiy AAAAAAAAAAAAAAAA | 0000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+oiy 8000000000000000 | 0000000000000000 = 8000000000000000 (cc=1) -+oiy FFFFFFFFFFFFFFFF | 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+oiy 5555555555555555 | 0000000000000000 = 5555555555555555 (cc=1) -+oiy 0000000000000000 | 00000000000000FF = FF00000000000000 (cc=1) -+oiy 0000000000000001 | 00000000000000FF = FF00000000000001 (cc=1) -+oiy 000000000000FFFF | 00000000000000FF = FF0000000000FFFF (cc=1) -+oiy 0000000000007FFF | 00000000000000FF = FF00000000007FFF (cc=1) -+oiy 0000000000008000 | 00000000000000FF = FF00000000008000 (cc=1) -+oiy 00000000FFFFFFFF | 00000000000000FF = FF000000FFFFFFFF (cc=1) -+oiy 0000000080000000 | 00000000000000FF = FF00000080000000 (cc=1) -+oiy 000000007FFFFFFF | 00000000000000FF = FF0000007FFFFFFF (cc=1) -+oiy AAAAAAAAAAAAAAAA | 00000000000000FF = FFAAAAAAAAAAAAAA (cc=1) -+oiy 8000000000000000 | 00000000000000FF = FF00000000000000 (cc=1) -+oiy FFFFFFFFFFFFFFFF | 00000000000000FF = FFFFFFFFFFFFFFFF (cc=1) -+oiy 5555555555555555 | 00000000000000FF = FF55555555555555 (cc=1) -+oiy 0000000000000000 | 0000000000000080 = 8000000000000000 (cc=1) -+oiy 0000000000000001 | 0000000000000080 = 8000000000000001 (cc=1) -+oiy 000000000000FFFF | 0000000000000080 = 800000000000FFFF (cc=1) -+oiy 0000000000007FFF | 0000000000000080 = 8000000000007FFF (cc=1) -+oiy 0000000000008000 | 0000000000000080 = 8000000000008000 (cc=1) -+oiy 00000000FFFFFFFF | 0000000000000080 = 80000000FFFFFFFF (cc=1) -+oiy 0000000080000000 | 0000000000000080 = 8000000080000000 (cc=1) -+oiy 000000007FFFFFFF | 0000000000000080 = 800000007FFFFFFF (cc=1) -+oiy AAAAAAAAAAAAAAAA | 0000000000000080 = AAAAAAAAAAAAAAAA (cc=1) -+oiy 8000000000000000 | 0000000000000080 = 8000000000000000 (cc=1) -+oiy FFFFFFFFFFFFFFFF | 0000000000000080 = FFFFFFFFFFFFFFFF (cc=1) -+oiy 5555555555555555 | 0000000000000080 = D555555555555555 (cc=1) -+oiy 0000000000000000 | 00000000000000AA = AA00000000000000 (cc=1) -+oiy 0000000000000001 | 00000000000000AA = AA00000000000001 (cc=1) -+oiy 000000000000FFFF | 00000000000000AA = AA0000000000FFFF (cc=1) -+oiy 0000000000007FFF | 00000000000000AA = AA00000000007FFF (cc=1) -+oiy 0000000000008000 | 00000000000000AA = AA00000000008000 (cc=1) -+oiy 00000000FFFFFFFF | 00000000000000AA = AA000000FFFFFFFF (cc=1) -+oiy 0000000080000000 | 00000000000000AA = AA00000080000000 (cc=1) -+oiy 000000007FFFFFFF | 00000000000000AA = AA0000007FFFFFFF (cc=1) -+oiy AAAAAAAAAAAAAAAA | 00000000000000AA = AAAAAAAAAAAAAAAA (cc=1) -+oiy 8000000000000000 | 00000000000000AA = AA00000000000000 (cc=1) -+oiy FFFFFFFFFFFFFFFF | 00000000000000AA = FFFFFFFFFFFFFFFF (cc=1) -+oiy 5555555555555555 | 00000000000000AA = FF55555555555555 (cc=1) -+oiy 0000000000000000 | 0000000000000055 = 5500000000000000 (cc=1) -+oiy 0000000000000001 | 0000000000000055 = 5500000000000001 (cc=1) -+oiy 000000000000FFFF | 0000000000000055 = 550000000000FFFF (cc=1) -+oiy 0000000000007FFF | 0000000000000055 = 5500000000007FFF (cc=1) -+oiy 0000000000008000 | 0000000000000055 = 5500000000008000 (cc=1) -+oiy 00000000FFFFFFFF | 0000000000000055 = 55000000FFFFFFFF (cc=1) -+oiy 0000000080000000 | 0000000000000055 = 5500000080000000 (cc=1) -+oiy 000000007FFFFFFF | 0000000000000055 = 550000007FFFFFFF (cc=1) -+oiy AAAAAAAAAAAAAAAA | 0000000000000055 = FFAAAAAAAAAAAAAA (cc=1) -+oiy 8000000000000000 | 0000000000000055 = D500000000000000 (cc=1) -+oiy FFFFFFFFFFFFFFFF | 0000000000000055 = FFFFFFFFFFFFFFFF (cc=1) -+oiy 5555555555555555 | 0000000000000055 = 5555555555555555 (cc=1) -+oihh 0000000000000000 | 0000000000000055 = 0055000000000000 (cc=1) -+oihh 0000000000000001 | 0000000000000055 = 0055000000000001 (cc=1) -+oihh 000000000000FFFF | 0000000000000055 = 005500000000FFFF (cc=1) -+oihh 0000000000007FFF | 0000000000000055 = 0055000000007FFF (cc=1) -+oihh 0000000000008000 | 0000000000000055 = 0055000000008000 (cc=1) -+oihh 00000000FFFFFFFF | 0000000000000055 = 00550000FFFFFFFF (cc=1) -+oihh 0000000080000000 | 0000000000000055 = 0055000080000000 (cc=1) -+oihh 000000007FFFFFFF | 0000000000000055 = 005500007FFFFFFF (cc=1) -+oihh AAAAAAAAAAAAAAAA | 0000000000000055 = AAFFAAAAAAAAAAAA (cc=1) -+oihh 8000000000000000 | 0000000000000055 = 8055000000000000 (cc=1) -+oihh FFFFFFFFFFFFFFFF | 0000000000000055 = FFFFFFFFFFFFFFFF (cc=1) -+oihh 5555555555555555 | 0000000000000055 = 5555555555555555 (cc=1) -+oihl 0000000000000000 | 0000000000000055 = 0000005500000000 (cc=1) -+oihl 0000000000000001 | 0000000000000055 = 0000005500000001 (cc=1) -+oihl 000000000000FFFF | 0000000000000055 = 000000550000FFFF (cc=1) -+oihl 0000000000007FFF | 0000000000000055 = 0000005500007FFF (cc=1) -+oihl 0000000000008000 | 0000000000000055 = 0000005500008000 (cc=1) -+oihl 00000000FFFFFFFF | 0000000000000055 = 00000055FFFFFFFF (cc=1) -+oihl 0000000080000000 | 0000000000000055 = 0000005580000000 (cc=1) -+oihl 000000007FFFFFFF | 0000000000000055 = 000000557FFFFFFF (cc=1) -+oihl AAAAAAAAAAAAAAAA | 0000000000000055 = AAAAAAFFAAAAAAAA (cc=1) -+oihl 8000000000000000 | 0000000000000055 = 8000005500000000 (cc=1) -+oihl FFFFFFFFFFFFFFFF | 0000000000000055 = FFFFFFFFFFFFFFFF (cc=1) -+oihl 5555555555555555 | 0000000000000055 = 5555555555555555 (cc=1) -+oilh 0000000000000000 | 0000000000000055 = 0000000000550000 (cc=1) -+oilh 0000000000000001 | 0000000000000055 = 0000000000550001 (cc=1) -+oilh 000000000000FFFF | 0000000000000055 = 000000000055FFFF (cc=1) -+oilh 0000000000007FFF | 0000000000000055 = 0000000000557FFF (cc=1) -+oilh 0000000000008000 | 0000000000000055 = 0000000000558000 (cc=1) -+oilh 00000000FFFFFFFF | 0000000000000055 = 00000000FFFFFFFF (cc=1) -+oilh 0000000080000000 | 0000000000000055 = 0000000080550000 (cc=1) -+oilh 000000007FFFFFFF | 0000000000000055 = 000000007FFFFFFF (cc=1) -+oilh AAAAAAAAAAAAAAAA | 0000000000000055 = AAAAAAAAAAFFAAAA (cc=1) -+oilh 8000000000000000 | 0000000000000055 = 8000000000550000 (cc=1) -+oilh FFFFFFFFFFFFFFFF | 0000000000000055 = FFFFFFFFFFFFFFFF (cc=1) -+oilh 5555555555555555 | 0000000000000055 = 5555555555555555 (cc=1) -+oill 0000000000000000 | 0000000000000055 = 0000000000000055 (cc=1) -+oill 0000000000000001 | 0000000000000055 = 0000000000000055 (cc=1) -+oill 000000000000FFFF | 0000000000000055 = 000000000000FFFF (cc=1) -+oill 0000000000007FFF | 0000000000000055 = 0000000000007FFF (cc=1) -+oill 0000000000008000 | 0000000000000055 = 0000000000008055 (cc=1) -+oill 00000000FFFFFFFF | 0000000000000055 = 00000000FFFFFFFF (cc=1) -+oill 0000000080000000 | 0000000000000055 = 0000000080000055 (cc=1) -+oill 000000007FFFFFFF | 0000000000000055 = 000000007FFFFFFF (cc=1) -+oill AAAAAAAAAAAAAAAA | 0000000000000055 = AAAAAAAAAAAAAAFF (cc=1) -+oill 8000000000000000 | 0000000000000055 = 8000000000000055 (cc=1) -+oill FFFFFFFFFFFFFFFF | 0000000000000055 = FFFFFFFFFFFFFFFF (cc=1) -+oill 5555555555555555 | 0000000000000055 = 5555555555555555 (cc=1) -+oihh 0000000000000000 | 00000000000000AA = 00AA000000000000 (cc=1) -+oihh 0000000000000001 | 00000000000000AA = 00AA000000000001 (cc=1) -+oihh 000000000000FFFF | 00000000000000AA = 00AA00000000FFFF (cc=1) -+oihh 0000000000007FFF | 00000000000000AA = 00AA000000007FFF (cc=1) -+oihh 0000000000008000 | 00000000000000AA = 00AA000000008000 (cc=1) -+oihh 00000000FFFFFFFF | 00000000000000AA = 00AA0000FFFFFFFF (cc=1) -+oihh 0000000080000000 | 00000000000000AA = 00AA000080000000 (cc=1) -+oihh 000000007FFFFFFF | 00000000000000AA = 00AA00007FFFFFFF (cc=1) -+oihh AAAAAAAAAAAAAAAA | 00000000000000AA = AAAAAAAAAAAAAAAA (cc=1) -+oihh 8000000000000000 | 00000000000000AA = 80AA000000000000 (cc=1) -+oihh FFFFFFFFFFFFFFFF | 00000000000000AA = FFFFFFFFFFFFFFFF (cc=1) -+oihh 5555555555555555 | 00000000000000AA = 55FF555555555555 (cc=1) -+oihl 0000000000000000 | 00000000000000AA = 000000AA00000000 (cc=1) -+oihl 0000000000000001 | 00000000000000AA = 000000AA00000001 (cc=1) -+oihl 000000000000FFFF | 00000000000000AA = 000000AA0000FFFF (cc=1) -+oihl 0000000000007FFF | 00000000000000AA = 000000AA00007FFF (cc=1) -+oihl 0000000000008000 | 00000000000000AA = 000000AA00008000 (cc=1) -+oihl 00000000FFFFFFFF | 00000000000000AA = 000000AAFFFFFFFF (cc=1) -+oihl 0000000080000000 | 00000000000000AA = 000000AA80000000 (cc=1) -+oihl 000000007FFFFFFF | 00000000000000AA = 000000AA7FFFFFFF (cc=1) -+oihl AAAAAAAAAAAAAAAA | 00000000000000AA = AAAAAAAAAAAAAAAA (cc=1) -+oihl 8000000000000000 | 00000000000000AA = 800000AA00000000 (cc=1) -+oihl FFFFFFFFFFFFFFFF | 00000000000000AA = FFFFFFFFFFFFFFFF (cc=1) -+oihl 5555555555555555 | 00000000000000AA = 555555FF55555555 (cc=1) -+oilh 0000000000000000 | 00000000000000AA = 0000000000AA0000 (cc=1) -+oilh 0000000000000001 | 00000000000000AA = 0000000000AA0001 (cc=1) -+oilh 000000000000FFFF | 00000000000000AA = 0000000000AAFFFF (cc=1) -+oilh 0000000000007FFF | 00000000000000AA = 0000000000AA7FFF (cc=1) -+oilh 0000000000008000 | 00000000000000AA = 0000000000AA8000 (cc=1) -+oilh 00000000FFFFFFFF | 00000000000000AA = 00000000FFFFFFFF (cc=1) -+oilh 0000000080000000 | 00000000000000AA = 0000000080AA0000 (cc=1) -+oilh 000000007FFFFFFF | 00000000000000AA = 000000007FFFFFFF (cc=1) -+oilh AAAAAAAAAAAAAAAA | 00000000000000AA = AAAAAAAAAAAAAAAA (cc=1) -+oilh 8000000000000000 | 00000000000000AA = 8000000000AA0000 (cc=1) -+oilh FFFFFFFFFFFFFFFF | 00000000000000AA = FFFFFFFFFFFFFFFF (cc=1) -+oilh 5555555555555555 | 00000000000000AA = 5555555555FF5555 (cc=1) -+oill 0000000000000000 | 00000000000000AA = 00000000000000AA (cc=1) -+oill 0000000000000001 | 00000000000000AA = 00000000000000AB (cc=1) -+oill 000000000000FFFF | 00000000000000AA = 000000000000FFFF (cc=1) -+oill 0000000000007FFF | 00000000000000AA = 0000000000007FFF (cc=1) -+oill 0000000000008000 | 00000000000000AA = 00000000000080AA (cc=1) -+oill 00000000FFFFFFFF | 00000000000000AA = 00000000FFFFFFFF (cc=1) -+oill 0000000080000000 | 00000000000000AA = 00000000800000AA (cc=1) -+oill 000000007FFFFFFF | 00000000000000AA = 000000007FFFFFFF (cc=1) -+oill AAAAAAAAAAAAAAAA | 00000000000000AA = AAAAAAAAAAAAAAAA (cc=1) -+oill 8000000000000000 | 00000000000000AA = 80000000000000AA (cc=1) -+oill FFFFFFFFFFFFFFFF | 00000000000000AA = FFFFFFFFFFFFFFFF (cc=1) -+oill 5555555555555555 | 00000000000000AA = 55555555555555FF (cc=1) -+oihh 0000000000000000 | 00000000000000FF = 00FF000000000000 (cc=1) -+oihh 0000000000000001 | 00000000000000FF = 00FF000000000001 (cc=1) -+oihh 000000000000FFFF | 00000000000000FF = 00FF00000000FFFF (cc=1) -+oihh 0000000000007FFF | 00000000000000FF = 00FF000000007FFF (cc=1) -+oihh 0000000000008000 | 00000000000000FF = 00FF000000008000 (cc=1) -+oihh 00000000FFFFFFFF | 00000000000000FF = 00FF0000FFFFFFFF (cc=1) -+oihh 0000000080000000 | 00000000000000FF = 00FF000080000000 (cc=1) -+oihh 000000007FFFFFFF | 00000000000000FF = 00FF00007FFFFFFF (cc=1) -+oihh AAAAAAAAAAAAAAAA | 00000000000000FF = AAFFAAAAAAAAAAAA (cc=1) -+oihh 8000000000000000 | 00000000000000FF = 80FF000000000000 (cc=1) -+oihh FFFFFFFFFFFFFFFF | 00000000000000FF = FFFFFFFFFFFFFFFF (cc=1) -+oihh 5555555555555555 | 00000000000000FF = 55FF555555555555 (cc=1) -+oihl 0000000000000000 | 00000000000000FF = 000000FF00000000 (cc=1) -+oihl 0000000000000001 | 00000000000000FF = 000000FF00000001 (cc=1) -+oihl 000000000000FFFF | 00000000000000FF = 000000FF0000FFFF (cc=1) -+oihl 0000000000007FFF | 00000000000000FF = 000000FF00007FFF (cc=1) -+oihl 0000000000008000 | 00000000000000FF = 000000FF00008000 (cc=1) -+oihl 00000000FFFFFFFF | 00000000000000FF = 000000FFFFFFFFFF (cc=1) -+oihl 0000000080000000 | 00000000000000FF = 000000FF80000000 (cc=1) -+oihl 000000007FFFFFFF | 00000000000000FF = 000000FF7FFFFFFF (cc=1) -+oihl AAAAAAAAAAAAAAAA | 00000000000000FF = AAAAAAFFAAAAAAAA (cc=1) -+oihl 8000000000000000 | 00000000000000FF = 800000FF00000000 (cc=1) -+oihl FFFFFFFFFFFFFFFF | 00000000000000FF = FFFFFFFFFFFFFFFF (cc=1) -+oihl 5555555555555555 | 00000000000000FF = 555555FF55555555 (cc=1) -+oilh 0000000000000000 | 00000000000000FF = 0000000000FF0000 (cc=1) -+oilh 0000000000000001 | 00000000000000FF = 0000000000FF0001 (cc=1) -+oilh 000000000000FFFF | 00000000000000FF = 0000000000FFFFFF (cc=1) -+oilh 0000000000007FFF | 00000000000000FF = 0000000000FF7FFF (cc=1) -+oilh 0000000000008000 | 00000000000000FF = 0000000000FF8000 (cc=1) -+oilh 00000000FFFFFFFF | 00000000000000FF = 00000000FFFFFFFF (cc=1) -+oilh 0000000080000000 | 00000000000000FF = 0000000080FF0000 (cc=1) -+oilh 000000007FFFFFFF | 00000000000000FF = 000000007FFFFFFF (cc=1) -+oilh AAAAAAAAAAAAAAAA | 00000000000000FF = AAAAAAAAAAFFAAAA (cc=1) -+oilh 8000000000000000 | 00000000000000FF = 8000000000FF0000 (cc=1) -+oilh FFFFFFFFFFFFFFFF | 00000000000000FF = FFFFFFFFFFFFFFFF (cc=1) -+oilh 5555555555555555 | 00000000000000FF = 5555555555FF5555 (cc=1) -+oill 0000000000000000 | 00000000000000FF = 00000000000000FF (cc=1) -+oill 0000000000000001 | 00000000000000FF = 00000000000000FF (cc=1) -+oill 000000000000FFFF | 00000000000000FF = 000000000000FFFF (cc=1) -+oill 0000000000007FFF | 00000000000000FF = 0000000000007FFF (cc=1) -+oill 0000000000008000 | 00000000000000FF = 00000000000080FF (cc=1) -+oill 00000000FFFFFFFF | 00000000000000FF = 00000000FFFFFFFF (cc=1) -+oill 0000000080000000 | 00000000000000FF = 00000000800000FF (cc=1) -+oill 000000007FFFFFFF | 00000000000000FF = 000000007FFFFFFF (cc=1) -+oill AAAAAAAAAAAAAAAA | 00000000000000FF = AAAAAAAAAAAAAAFF (cc=1) -+oill 8000000000000000 | 00000000000000FF = 80000000000000FF (cc=1) -+oill FFFFFFFFFFFFFFFF | 00000000000000FF = FFFFFFFFFFFFFFFF (cc=1) -+oill 5555555555555555 | 00000000000000FF = 55555555555555FF (cc=1) -+oihh 0000000000000000 | 0000000000000000 = 0000000000000000 (cc=0) -+oihh 0000000000000001 | 0000000000000000 = 0000000000000001 (cc=0) -+oihh 000000000000FFFF | 0000000000000000 = 000000000000FFFF (cc=0) -+oihh 0000000000007FFF | 0000000000000000 = 0000000000007FFF (cc=0) -+oihh 0000000000008000 | 0000000000000000 = 0000000000008000 (cc=0) -+oihh 00000000FFFFFFFF | 0000000000000000 = 00000000FFFFFFFF (cc=0) -+oihh 0000000080000000 | 0000000000000000 = 0000000080000000 (cc=0) -+oihh 000000007FFFFFFF | 0000000000000000 = 000000007FFFFFFF (cc=0) -+oihh AAAAAAAAAAAAAAAA | 0000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+oihh 8000000000000000 | 0000000000000000 = 8000000000000000 (cc=1) -+oihh FFFFFFFFFFFFFFFF | 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+oihh 5555555555555555 | 0000000000000000 = 5555555555555555 (cc=1) -+oihl 0000000000000000 | 0000000000000000 = 0000000000000000 (cc=0) -+oihl 0000000000000001 | 0000000000000000 = 0000000000000001 (cc=0) -+oihl 000000000000FFFF | 0000000000000000 = 000000000000FFFF (cc=0) -+oihl 0000000000007FFF | 0000000000000000 = 0000000000007FFF (cc=0) -+oihl 0000000000008000 | 0000000000000000 = 0000000000008000 (cc=0) -+oihl 00000000FFFFFFFF | 0000000000000000 = 00000000FFFFFFFF (cc=0) -+oihl 0000000080000000 | 0000000000000000 = 0000000080000000 (cc=0) -+oihl 000000007FFFFFFF | 0000000000000000 = 000000007FFFFFFF (cc=0) -+oihl AAAAAAAAAAAAAAAA | 0000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+oihl 8000000000000000 | 0000000000000000 = 8000000000000000 (cc=0) -+oihl FFFFFFFFFFFFFFFF | 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+oihl 5555555555555555 | 0000000000000000 = 5555555555555555 (cc=1) -+oilh 0000000000000000 | 0000000000000000 = 0000000000000000 (cc=0) -+oilh 0000000000000001 | 0000000000000000 = 0000000000000001 (cc=0) -+oilh 000000000000FFFF | 0000000000000000 = 000000000000FFFF (cc=0) -+oilh 0000000000007FFF | 0000000000000000 = 0000000000007FFF (cc=0) -+oilh 0000000000008000 | 0000000000000000 = 0000000000008000 (cc=0) -+oilh 00000000FFFFFFFF | 0000000000000000 = 00000000FFFFFFFF (cc=1) -+oilh 0000000080000000 | 0000000000000000 = 0000000080000000 (cc=1) -+oilh 000000007FFFFFFF | 0000000000000000 = 000000007FFFFFFF (cc=1) -+oilh AAAAAAAAAAAAAAAA | 0000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+oilh 8000000000000000 | 0000000000000000 = 8000000000000000 (cc=0) -+oilh FFFFFFFFFFFFFFFF | 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+oilh 5555555555555555 | 0000000000000000 = 5555555555555555 (cc=1) -+oill 0000000000000000 | 0000000000000000 = 0000000000000000 (cc=0) -+oill 0000000000000001 | 0000000000000000 = 0000000000000001 (cc=1) -+oill 000000000000FFFF | 0000000000000000 = 000000000000FFFF (cc=1) -+oill 0000000000007FFF | 0000000000000000 = 0000000000007FFF (cc=1) -+oill 0000000000008000 | 0000000000000000 = 0000000000008000 (cc=1) -+oill 00000000FFFFFFFF | 0000000000000000 = 00000000FFFFFFFF (cc=1) -+oill 0000000080000000 | 0000000000000000 = 0000000080000000 (cc=0) -+oill 000000007FFFFFFF | 0000000000000000 = 000000007FFFFFFF (cc=1) -+oill AAAAAAAAAAAAAAAA | 0000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+oill 8000000000000000 | 0000000000000000 = 8000000000000000 (cc=0) -+oill FFFFFFFFFFFFFFFF | 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+oill 5555555555555555 | 0000000000000000 = 5555555555555555 (cc=1) -+oihh 0000000000000000 | 000000000000FFFF = FFFF000000000000 (cc=1) -+oihh 0000000000000001 | 000000000000FFFF = FFFF000000000001 (cc=1) -+oihh 000000000000FFFF | 000000000000FFFF = FFFF00000000FFFF (cc=1) -+oihh 0000000000007FFF | 000000000000FFFF = FFFF000000007FFF (cc=1) -+oihh 0000000000008000 | 000000000000FFFF = FFFF000000008000 (cc=1) -+oihh 00000000FFFFFFFF | 000000000000FFFF = FFFF0000FFFFFFFF (cc=1) -+oihh 0000000080000000 | 000000000000FFFF = FFFF000080000000 (cc=1) -+oihh 000000007FFFFFFF | 000000000000FFFF = FFFF00007FFFFFFF (cc=1) -+oihh AAAAAAAAAAAAAAAA | 000000000000FFFF = FFFFAAAAAAAAAAAA (cc=1) -+oihh 8000000000000000 | 000000000000FFFF = FFFF000000000000 (cc=1) -+oihh FFFFFFFFFFFFFFFF | 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+oihh 5555555555555555 | 000000000000FFFF = FFFF555555555555 (cc=1) -+oihl 0000000000000000 | 000000000000FFFF = 0000FFFF00000000 (cc=1) -+oihl 0000000000000001 | 000000000000FFFF = 0000FFFF00000001 (cc=1) -+oihl 000000000000FFFF | 000000000000FFFF = 0000FFFF0000FFFF (cc=1) -+oihl 0000000000007FFF | 000000000000FFFF = 0000FFFF00007FFF (cc=1) -+oihl 0000000000008000 | 000000000000FFFF = 0000FFFF00008000 (cc=1) -+oihl 00000000FFFFFFFF | 000000000000FFFF = 0000FFFFFFFFFFFF (cc=1) -+oihl 0000000080000000 | 000000000000FFFF = 0000FFFF80000000 (cc=1) -+oihl 000000007FFFFFFF | 000000000000FFFF = 0000FFFF7FFFFFFF (cc=1) -+oihl AAAAAAAAAAAAAAAA | 000000000000FFFF = AAAAFFFFAAAAAAAA (cc=1) -+oihl 8000000000000000 | 000000000000FFFF = 8000FFFF00000000 (cc=1) -+oihl FFFFFFFFFFFFFFFF | 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+oihl 5555555555555555 | 000000000000FFFF = 5555FFFF55555555 (cc=1) -+oilh 0000000000000000 | 000000000000FFFF = 00000000FFFF0000 (cc=1) -+oilh 0000000000000001 | 000000000000FFFF = 00000000FFFF0001 (cc=1) -+oilh 000000000000FFFF | 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+oilh 0000000000007FFF | 000000000000FFFF = 00000000FFFF7FFF (cc=1) -+oilh 0000000000008000 | 000000000000FFFF = 00000000FFFF8000 (cc=1) -+oilh 00000000FFFFFFFF | 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+oilh 0000000080000000 | 000000000000FFFF = 00000000FFFF0000 (cc=1) -+oilh 000000007FFFFFFF | 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+oilh AAAAAAAAAAAAAAAA | 000000000000FFFF = AAAAAAAAFFFFAAAA (cc=1) -+oilh 8000000000000000 | 000000000000FFFF = 80000000FFFF0000 (cc=1) -+oilh FFFFFFFFFFFFFFFF | 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+oilh 5555555555555555 | 000000000000FFFF = 55555555FFFF5555 (cc=1) -+oill 0000000000000000 | 000000000000FFFF = 000000000000FFFF (cc=1) -+oill 0000000000000001 | 000000000000FFFF = 000000000000FFFF (cc=1) -+oill 000000000000FFFF | 000000000000FFFF = 000000000000FFFF (cc=1) -+oill 0000000000007FFF | 000000000000FFFF = 000000000000FFFF (cc=1) -+oill 0000000000008000 | 000000000000FFFF = 000000000000FFFF (cc=1) -+oill 00000000FFFFFFFF | 000000000000FFFF = 00000000FFFFFFFF (cc=1) -+oill 0000000080000000 | 000000000000FFFF = 000000008000FFFF (cc=1) -+oill 000000007FFFFFFF | 000000000000FFFF = 000000007FFFFFFF (cc=1) -+oill AAAAAAAAAAAAAAAA | 000000000000FFFF = AAAAAAAAAAAAFFFF (cc=1) -+oill 8000000000000000 | 000000000000FFFF = 800000000000FFFF (cc=1) -+oill FFFFFFFFFFFFFFFF | 000000000000FFFF = FFFFFFFFFFFFFFFF (cc=1) -+oill 5555555555555555 | 000000000000FFFF = 555555555555FFFF (cc=1) -+oihh 0000000000000000 | 000000000000AAAA = AAAA000000000000 (cc=1) -+oihh 0000000000000001 | 000000000000AAAA = AAAA000000000001 (cc=1) -+oihh 000000000000FFFF | 000000000000AAAA = AAAA00000000FFFF (cc=1) -+oihh 0000000000007FFF | 000000000000AAAA = AAAA000000007FFF (cc=1) -+oihh 0000000000008000 | 000000000000AAAA = AAAA000000008000 (cc=1) -+oihh 00000000FFFFFFFF | 000000000000AAAA = AAAA0000FFFFFFFF (cc=1) -+oihh 0000000080000000 | 000000000000AAAA = AAAA000080000000 (cc=1) -+oihh 000000007FFFFFFF | 000000000000AAAA = AAAA00007FFFFFFF (cc=1) -+oihh AAAAAAAAAAAAAAAA | 000000000000AAAA = AAAAAAAAAAAAAAAA (cc=1) -+oihh 8000000000000000 | 000000000000AAAA = AAAA000000000000 (cc=1) -+oihh FFFFFFFFFFFFFFFF | 000000000000AAAA = FFFFFFFFFFFFFFFF (cc=1) -+oihh 5555555555555555 | 000000000000AAAA = FFFF555555555555 (cc=1) -+oihl 0000000000000000 | 000000000000AAAA = 0000AAAA00000000 (cc=1) -+oihl 0000000000000001 | 000000000000AAAA = 0000AAAA00000001 (cc=1) -+oihl 000000000000FFFF | 000000000000AAAA = 0000AAAA0000FFFF (cc=1) -+oihl 0000000000007FFF | 000000000000AAAA = 0000AAAA00007FFF (cc=1) -+oihl 0000000000008000 | 000000000000AAAA = 0000AAAA00008000 (cc=1) -+oihl 00000000FFFFFFFF | 000000000000AAAA = 0000AAAAFFFFFFFF (cc=1) -+oihl 0000000080000000 | 000000000000AAAA = 0000AAAA80000000 (cc=1) -+oihl 000000007FFFFFFF | 000000000000AAAA = 0000AAAA7FFFFFFF (cc=1) -+oihl AAAAAAAAAAAAAAAA | 000000000000AAAA = AAAAAAAAAAAAAAAA (cc=1) -+oihl 8000000000000000 | 000000000000AAAA = 8000AAAA00000000 (cc=1) -+oihl FFFFFFFFFFFFFFFF | 000000000000AAAA = FFFFFFFFFFFFFFFF (cc=1) -+oihl 5555555555555555 | 000000000000AAAA = 5555FFFF55555555 (cc=1) -+oilh 0000000000000000 | 000000000000AAAA = 00000000AAAA0000 (cc=1) -+oilh 0000000000000001 | 000000000000AAAA = 00000000AAAA0001 (cc=1) -+oilh 000000000000FFFF | 000000000000AAAA = 00000000AAAAFFFF (cc=1) -+oilh 0000000000007FFF | 000000000000AAAA = 00000000AAAA7FFF (cc=1) -+oilh 0000000000008000 | 000000000000AAAA = 00000000AAAA8000 (cc=1) -+oilh 00000000FFFFFFFF | 000000000000AAAA = 00000000FFFFFFFF (cc=1) -+oilh 0000000080000000 | 000000000000AAAA = 00000000AAAA0000 (cc=1) -+oilh 000000007FFFFFFF | 000000000000AAAA = 00000000FFFFFFFF (cc=1) -+oilh AAAAAAAAAAAAAAAA | 000000000000AAAA = AAAAAAAAAAAAAAAA (cc=1) -+oilh 8000000000000000 | 000000000000AAAA = 80000000AAAA0000 (cc=1) -+oilh FFFFFFFFFFFFFFFF | 000000000000AAAA = FFFFFFFFFFFFFFFF (cc=1) -+oilh 5555555555555555 | 000000000000AAAA = 55555555FFFF5555 (cc=1) -+oill 0000000000000000 | 000000000000AAAA = 000000000000AAAA (cc=1) -+oill 0000000000000001 | 000000000000AAAA = 000000000000AAAB (cc=1) -+oill 000000000000FFFF | 000000000000AAAA = 000000000000FFFF (cc=1) -+oill 0000000000007FFF | 000000000000AAAA = 000000000000FFFF (cc=1) -+oill 0000000000008000 | 000000000000AAAA = 000000000000AAAA (cc=1) -+oill 00000000FFFFFFFF | 000000000000AAAA = 00000000FFFFFFFF (cc=1) -+oill 0000000080000000 | 000000000000AAAA = 000000008000AAAA (cc=1) -+oill 000000007FFFFFFF | 000000000000AAAA = 000000007FFFFFFF (cc=1) -+oill AAAAAAAAAAAAAAAA | 000000000000AAAA = AAAAAAAAAAAAAAAA (cc=1) -+oill 8000000000000000 | 000000000000AAAA = 800000000000AAAA (cc=1) -+oill FFFFFFFFFFFFFFFF | 000000000000AAAA = FFFFFFFFFFFFFFFF (cc=1) -+oill 5555555555555555 | 000000000000AAAA = 555555555555FFFF (cc=1) -+oihh 0000000000000000 | 0000000000005555 = 5555000000000000 (cc=1) -+oihh 0000000000000001 | 0000000000005555 = 5555000000000001 (cc=1) -+oihh 000000000000FFFF | 0000000000005555 = 555500000000FFFF (cc=1) -+oihh 0000000000007FFF | 0000000000005555 = 5555000000007FFF (cc=1) -+oihh 0000000000008000 | 0000000000005555 = 5555000000008000 (cc=1) -+oihh 00000000FFFFFFFF | 0000000000005555 = 55550000FFFFFFFF (cc=1) -+oihh 0000000080000000 | 0000000000005555 = 5555000080000000 (cc=1) -+oihh 000000007FFFFFFF | 0000000000005555 = 555500007FFFFFFF (cc=1) -+oihh AAAAAAAAAAAAAAAA | 0000000000005555 = FFFFAAAAAAAAAAAA (cc=1) -+oihh 8000000000000000 | 0000000000005555 = D555000000000000 (cc=1) -+oihh FFFFFFFFFFFFFFFF | 0000000000005555 = FFFFFFFFFFFFFFFF (cc=1) -+oihh 5555555555555555 | 0000000000005555 = 5555555555555555 (cc=1) -+oihl 0000000000000000 | 0000000000005555 = 0000555500000000 (cc=1) -+oihl 0000000000000001 | 0000000000005555 = 0000555500000001 (cc=1) -+oihl 000000000000FFFF | 0000000000005555 = 000055550000FFFF (cc=1) -+oihl 0000000000007FFF | 0000000000005555 = 0000555500007FFF (cc=1) -+oihl 0000000000008000 | 0000000000005555 = 0000555500008000 (cc=1) -+oihl 00000000FFFFFFFF | 0000000000005555 = 00005555FFFFFFFF (cc=1) -+oihl 0000000080000000 | 0000000000005555 = 0000555580000000 (cc=1) -+oihl 000000007FFFFFFF | 0000000000005555 = 000055557FFFFFFF (cc=1) -+oihl AAAAAAAAAAAAAAAA | 0000000000005555 = AAAAFFFFAAAAAAAA (cc=1) -+oihl 8000000000000000 | 0000000000005555 = 8000555500000000 (cc=1) -+oihl FFFFFFFFFFFFFFFF | 0000000000005555 = FFFFFFFFFFFFFFFF (cc=1) -+oihl 5555555555555555 | 0000000000005555 = 5555555555555555 (cc=1) -+oilh 0000000000000000 | 0000000000005555 = 0000000055550000 (cc=1) -+oilh 0000000000000001 | 0000000000005555 = 0000000055550001 (cc=1) -+oilh 000000000000FFFF | 0000000000005555 = 000000005555FFFF (cc=1) -+oilh 0000000000007FFF | 0000000000005555 = 0000000055557FFF (cc=1) -+oilh 0000000000008000 | 0000000000005555 = 0000000055558000 (cc=1) -+oilh 00000000FFFFFFFF | 0000000000005555 = 00000000FFFFFFFF (cc=1) -+oilh 0000000080000000 | 0000000000005555 = 00000000D5550000 (cc=1) -+oilh 000000007FFFFFFF | 0000000000005555 = 000000007FFFFFFF (cc=1) -+oilh AAAAAAAAAAAAAAAA | 0000000000005555 = AAAAAAAAFFFFAAAA (cc=1) -+oilh 8000000000000000 | 0000000000005555 = 8000000055550000 (cc=1) -+oilh FFFFFFFFFFFFFFFF | 0000000000005555 = FFFFFFFFFFFFFFFF (cc=1) -+oilh 5555555555555555 | 0000000000005555 = 5555555555555555 (cc=1) -+oill 0000000000000000 | 0000000000005555 = 0000000000005555 (cc=1) -+oill 0000000000000001 | 0000000000005555 = 0000000000005555 (cc=1) -+oill 000000000000FFFF | 0000000000005555 = 000000000000FFFF (cc=1) -+oill 0000000000007FFF | 0000000000005555 = 0000000000007FFF (cc=1) -+oill 0000000000008000 | 0000000000005555 = 000000000000D555 (cc=1) -+oill 00000000FFFFFFFF | 0000000000005555 = 00000000FFFFFFFF (cc=1) -+oill 0000000080000000 | 0000000000005555 = 0000000080005555 (cc=1) -+oill 000000007FFFFFFF | 0000000000005555 = 000000007FFFFFFF (cc=1) -+oill AAAAAAAAAAAAAAAA | 0000000000005555 = AAAAAAAAAAAAFFFF (cc=1) -+oill 8000000000000000 | 0000000000005555 = 8000000000005555 (cc=1) -+oill FFFFFFFFFFFFFFFF | 0000000000005555 = FFFFFFFFFFFFFFFF (cc=1) -+oill 5555555555555555 | 0000000000005555 = 5555555555555555 (cc=1) ---- none/tests/s390x/or.vgtest -+++ none/tests/s390x/or.vgtest -@@ -0,0 +1 @@ -+prog: or ---- none/tests/s390x/srst.c -+++ none/tests/s390x/srst.c -@@ -0,0 +1,93 @@ -+#include "test.h" -+char buffer[24] ="0123456789abcdefghijklmn"; -+char *buflong = "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789_.,}[]" -+ "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789_.,}[]" -+ "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789_.,}[]" -+ "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789_.,}[]" -+ "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789_.,}[]" -+ "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789_.,}[]" -+ "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRS%UVWXYZ0123456789_.,}[]"; -+ -+static char * srst3(char *__next, char *__start, char __what, int *__cc) -+{ -+ register unsigned long what asm ("0") = __what; -+ register char *next asm ("2") = __next; -+ register char *start asm ("4") = __start; -+ int cc; -+ -+ asm volatile( "0: srst 2,4\n" -+ "jo 0b\n" -+ "ipm %2\n" -+ "srl %2,28\n" -+ :"+d" (start), "+d" (next), "=d" (cc) :"d" (what): "cc"); -+ *__cc = cc; -+ return next; -+} -+ -+static char * srst2(char *__start, char __what, int *__cc) -+{ -+ register unsigned long what asm ("0") = __what; -+ register char *start asm ("4") = __start; -+ int cc; -+ -+ asm volatile( "0: srst 0,4\n" -+ "jo 0b\n" -+ "ipm %2\n" -+ "srl %2,28\n" -+ :"+d" (start), "+d" (what), "=d" (cc) :: "cc"); -+ *__cc = cc; -+ return (char *) what; -+} -+ -+int main() -+{ -+ char *buf; -+ int cc; -+ -+ -+ /* len=0 and start== next should not fault */ -+ srst3((char *)0x12345678,(char *)0x12345678,'0', &cc); -+ printf("(cc=%d)\n", cc); -+ -+ buf = srst3(&buffer[23], &buffer[23], '0', &cc); -+ dump_field(buf, 1); -+ printf("(cc=%d)\n", cc); -+ -+ buf = srst3(&buffer[23], &buffer[0], '0', &cc); -+ dump_field(buf, 1); -+ printf("(cc=%d)\n", cc); -+ -+ buf = srst3(&buffer[23], &buffer[0], 'a', &cc); -+ dump_field(buf, 1); -+ printf("(cc=%d)\n", cc); -+ -+ buf = srst3(&buffer[23], &buffer[0], 'm', &cc); -+ dump_field(buf, 1); -+ printf("(cc=%d)\n", cc); -+ -+ buf = srst3(&buffer[23], &buffer[0], 'n', &cc); -+ dump_field(buf, 1); -+ printf("(cc=%d)\n", cc); -+ -+ buf = srst2(&buffer[0], '0', &cc); -+ dump_field(buf, 1); -+ printf("(cc=%d)\n", cc); -+ -+ buf = srst2(&buffer[0], 'a', &cc); -+ dump_field(buf, 1); -+ printf("(cc=%d)\n", cc); -+ -+ buf = srst2(&buffer[0], 'm', &cc); -+ dump_field(buf, 1); -+ printf("(cc=%d)\n", cc); -+ -+ buf = srst2(&buffer[0], 'n', &cc); -+ dump_field(buf, 1); -+ printf("(cc=%d)\n", cc); -+ -+ buf = srst3(buflong + 469, buflong, '%', &cc); -+ dump_field(buf, 1); -+ printf("(cc=%d)\n", cc); -+ return 0; -+} -+ ---- none/tests/s390x/srst.stderr.exp -+++ none/tests/s390x/srst.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/srst.stdout.exp -+++ none/tests/s390x/srst.stdout.exp -@@ -0,0 +1,11 @@ -+(cc=2) -+6E (cc=2) -+30 (cc=1) -+61 (cc=1) -+6D (cc=1) -+6E (cc=2) -+30 (cc=1) -+61 (cc=1) -+6D (cc=1) -+6E (cc=1) -+25 (cc=1) ---- none/tests/s390x/srst.vgtest -+++ none/tests/s390x/srst.vgtest -@@ -0,0 +1 @@ -+prog: srst ---- none/tests/s390x/sub.c -+++ none/tests/s390x/sub.c -@@ -0,0 +1,51 @@ -+#include -+#include "sub.h" -+ -+static void do_regmem_insns(unsigned long s2) -+{ -+ memsweep(s, s2, 0); -+ memsweep(sh, s2, 0); -+ memsweep(sg, s2, 0); -+ memsweep(sgf, s2, 0); -+ memsweep(sl, s2, 0); -+ memsweep(slg, s2, 0); -+ memsweep(sgf, s2, 0); -+ memsweep(slgf, s2, 0); -+ regsweep(sr, s2, 0); -+ regsweep(sgr, s2, 0); -+ regsweep(sgfr, s2, 0); -+ regsweep(slr, s2, 0); -+ regsweep(slgr, s2, 0); -+ regsweep(slgfr, s2, 0); -+ memsweep(slb, s2, 0); -+ memsweep(slbg, s2, 0); -+ regsweep(slbr, s2, 0); -+ regsweep(slbgr, s2, 0); -+ memsweep(slb, s2, 1); -+ memsweep(slbg, s2, 1); -+ regsweep(slbr, s2, 1); -+ regsweep(slbgr, s2, 1); -+ memsweep(shy, s2, 0); -+ memsweep(sly, s2, 0); -+ memsweep(sy, s2, 0); -+} -+ -+int main() -+{ -+ do_regmem_insns(0x0ul); -+ do_regmem_insns(0x7ffffffffffffffful); -+ do_regmem_insns(0x8000000000000000ul); -+ do_regmem_insns(0xfffffffffffffffful); -+ do_regmem_insns(0x7fffffff00000000ul); -+ do_regmem_insns(0x8000000000000000ul); -+ do_regmem_insns(0xffffffff00000000ul); -+ do_regmem_insns(0x000000007ffffffful); -+ do_regmem_insns(0x0000000080000000ul); -+ do_regmem_insns(0x00000000fffffffful); -+ do_regmem_insns(0x000000000000fffful); -+ do_regmem_insns(0x0000000000007ffful); -+ do_regmem_insns(0x0000000000008000ul); -+ do_regmem_insns(0x000000000000fffful); -+ -+ return 0; -+} ---- none/tests/s390x/sub_EI.c -+++ none/tests/s390x/sub_EI.c -@@ -0,0 +1,28 @@ -+#include -+#include "sub.h" -+ -+static void do_imm_insns(void) -+{ -+ immsweep(slfi, 0, 0); -+ immsweep(slfi, 65535, 0); -+ immsweep(slfi, 32768, 0); -+ immsweep(slfi, 32767, 0); -+ immsweep(slfi, 4294967295, 0); -+ immsweep(slfi, 2147483648, 0); -+ immsweep(slfi, 2147483647, 0); -+ immsweep(slgfi, 0, 0); -+ immsweep(slgfi, 65535, 0); -+ immsweep(slgfi, 32768, 0); -+ immsweep(slgfi, 32767, 0); -+ immsweep(slgfi, 4294967295, 0); -+ immsweep(slgfi, 2147483648, 0); -+ immsweep(slgfi, 2147483647, 0); -+ -+} -+ -+int main() -+{ -+ do_imm_insns(); -+ -+ return 0; -+} ---- none/tests/s390x/sub_EI.stderr.exp -+++ none/tests/s390x/sub_EI.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/sub_EI.stdout.exp -+++ none/tests/s390x/sub_EI.stdout.exp -@@ -0,0 +1,154 @@ -+slfi 0000000000000000 - 0000000000000000 - 1 = 0000000000000000 (cc=2) -+slfi 0000000000000001 - 0000000000000000 - 1 = 0000000000000001 (cc=3) -+slfi 000000000000FFFF - 0000000000000000 - 1 = 000000000000FFFF (cc=3) -+slfi 0000000000007FFF - 0000000000000000 - 1 = 0000000000007FFF (cc=3) -+slfi 0000000000008000 - 0000000000000000 - 1 = 0000000000008000 (cc=3) -+slfi 00000000FFFFFFFF - 0000000000000000 - 1 = 00000000FFFFFFFF (cc=3) -+slfi 0000000080000000 - 0000000000000000 - 1 = 0000000080000000 (cc=3) -+slfi 000000007FFFFFFF - 0000000000000000 - 1 = 000000007FFFFFFF (cc=3) -+slfi FFFFFFFFFFFFFFFF - 0000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=3) -+slfi 8000000000000000 - 0000000000000000 - 1 = 8000000000000000 (cc=2) -+slfi 7FFFFFFFFFFFFFFF - 0000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slfi 0000000000000000 - 000000000000FFFF - 1 = 00000000FFFF0001 (cc=1) -+slfi 0000000000000001 - 000000000000FFFF - 1 = 00000000FFFF0002 (cc=1) -+slfi 000000000000FFFF - 000000000000FFFF - 1 = 0000000000000000 (cc=2) -+slfi 0000000000007FFF - 000000000000FFFF - 1 = 00000000FFFF8000 (cc=1) -+slfi 0000000000008000 - 000000000000FFFF - 1 = 00000000FFFF8001 (cc=1) -+slfi 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFF0000 (cc=3) -+slfi 0000000080000000 - 000000000000FFFF - 1 = 000000007FFF0001 (cc=3) -+slfi 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFF0000 (cc=3) -+slfi FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFF0000 (cc=3) -+slfi 8000000000000000 - 000000000000FFFF - 1 = 80000000FFFF0001 (cc=1) -+slfi 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFF0000 (cc=3) -+slfi 0000000000000000 - 0000000000008000 - 1 = 00000000FFFF8000 (cc=1) -+slfi 0000000000000001 - 0000000000008000 - 1 = 00000000FFFF8001 (cc=1) -+slfi 000000000000FFFF - 0000000000008000 - 1 = 0000000000007FFF (cc=3) -+slfi 0000000000007FFF - 0000000000008000 - 1 = 00000000FFFFFFFF (cc=1) -+slfi 0000000000008000 - 0000000000008000 - 1 = 0000000000000000 (cc=2) -+slfi 00000000FFFFFFFF - 0000000000008000 - 1 = 00000000FFFF7FFF (cc=3) -+slfi 0000000080000000 - 0000000000008000 - 1 = 000000007FFF8000 (cc=3) -+slfi 000000007FFFFFFF - 0000000000008000 - 1 = 000000007FFF7FFF (cc=3) -+slfi FFFFFFFFFFFFFFFF - 0000000000008000 - 1 = FFFFFFFFFFFF7FFF (cc=3) -+slfi 8000000000000000 - 0000000000008000 - 1 = 80000000FFFF8000 (cc=1) -+slfi 7FFFFFFFFFFFFFFF - 0000000000008000 - 1 = 7FFFFFFFFFFF7FFF (cc=3) -+slfi 0000000000000000 - 0000000000007FFF - 1 = 00000000FFFF8001 (cc=1) -+slfi 0000000000000001 - 0000000000007FFF - 1 = 00000000FFFF8002 (cc=1) -+slfi 000000000000FFFF - 0000000000007FFF - 1 = 0000000000008000 (cc=3) -+slfi 0000000000007FFF - 0000000000007FFF - 1 = 0000000000000000 (cc=2) -+slfi 0000000000008000 - 0000000000007FFF - 1 = 0000000000000001 (cc=3) -+slfi 00000000FFFFFFFF - 0000000000007FFF - 1 = 00000000FFFF8000 (cc=3) -+slfi 0000000080000000 - 0000000000007FFF - 1 = 000000007FFF8001 (cc=3) -+slfi 000000007FFFFFFF - 0000000000007FFF - 1 = 000000007FFF8000 (cc=3) -+slfi FFFFFFFFFFFFFFFF - 0000000000007FFF - 1 = FFFFFFFFFFFF8000 (cc=3) -+slfi 8000000000000000 - 0000000000007FFF - 1 = 80000000FFFF8001 (cc=1) -+slfi 7FFFFFFFFFFFFFFF - 0000000000007FFF - 1 = 7FFFFFFFFFFF8000 (cc=3) -+slfi 0000000000000000 - 00000000FFFFFFFF - 1 = 0000000000000001 (cc=1) -+slfi 0000000000000001 - 00000000FFFFFFFF - 1 = 0000000000000002 (cc=1) -+slfi 000000000000FFFF - 00000000FFFFFFFF - 1 = 0000000000010000 (cc=1) -+slfi 0000000000007FFF - 00000000FFFFFFFF - 1 = 0000000000008000 (cc=1) -+slfi 0000000000008000 - 00000000FFFFFFFF - 1 = 0000000000008001 (cc=1) -+slfi 00000000FFFFFFFF - 00000000FFFFFFFF - 1 = 0000000000000000 (cc=2) -+slfi 0000000080000000 - 00000000FFFFFFFF - 1 = 0000000080000001 (cc=1) -+slfi 000000007FFFFFFF - 00000000FFFFFFFF - 1 = 0000000080000000 (cc=1) -+slfi FFFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFF00000000 (cc=2) -+slfi 8000000000000000 - 00000000FFFFFFFF - 1 = 8000000000000001 (cc=1) -+slfi 7FFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = 7FFFFFFF00000000 (cc=2) -+slfi 0000000000000000 - 0000000080000000 - 1 = 0000000080000000 (cc=1) -+slfi 0000000000000001 - 0000000080000000 - 1 = 0000000080000001 (cc=1) -+slfi 000000000000FFFF - 0000000080000000 - 1 = 000000008000FFFF (cc=1) -+slfi 0000000000007FFF - 0000000080000000 - 1 = 0000000080007FFF (cc=1) -+slfi 0000000000008000 - 0000000080000000 - 1 = 0000000080008000 (cc=1) -+slfi 00000000FFFFFFFF - 0000000080000000 - 1 = 000000007FFFFFFF (cc=3) -+slfi 0000000080000000 - 0000000080000000 - 1 = 0000000000000000 (cc=2) -+slfi 000000007FFFFFFF - 0000000080000000 - 1 = 00000000FFFFFFFF (cc=1) -+slfi FFFFFFFFFFFFFFFF - 0000000080000000 - 1 = FFFFFFFF7FFFFFFF (cc=3) -+slfi 8000000000000000 - 0000000080000000 - 1 = 8000000080000000 (cc=1) -+slfi 7FFFFFFFFFFFFFFF - 0000000080000000 - 1 = 7FFFFFFF7FFFFFFF (cc=3) -+slfi 0000000000000000 - 000000007FFFFFFF - 1 = 0000000080000001 (cc=1) -+slfi 0000000000000001 - 000000007FFFFFFF - 1 = 0000000080000002 (cc=1) -+slfi 000000000000FFFF - 000000007FFFFFFF - 1 = 0000000080010000 (cc=1) -+slfi 0000000000007FFF - 000000007FFFFFFF - 1 = 0000000080008000 (cc=1) -+slfi 0000000000008000 - 000000007FFFFFFF - 1 = 0000000080008001 (cc=1) -+slfi 00000000FFFFFFFF - 000000007FFFFFFF - 1 = 0000000080000000 (cc=3) -+slfi 0000000080000000 - 000000007FFFFFFF - 1 = 0000000000000001 (cc=3) -+slfi 000000007FFFFFFF - 000000007FFFFFFF - 1 = 0000000000000000 (cc=2) -+slfi FFFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = FFFFFFFF80000000 (cc=3) -+slfi 8000000000000000 - 000000007FFFFFFF - 1 = 8000000080000001 (cc=1) -+slfi 7FFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = 7FFFFFFF80000000 (cc=3) -+slgfi 0000000000000000 - 0000000000000000 - 1 = 0000000000000000 (cc=2) -+slgfi 0000000000000001 - 0000000000000000 - 1 = 0000000000000001 (cc=3) -+slgfi 000000000000FFFF - 0000000000000000 - 1 = 000000000000FFFF (cc=3) -+slgfi 0000000000007FFF - 0000000000000000 - 1 = 0000000000007FFF (cc=3) -+slgfi 0000000000008000 - 0000000000000000 - 1 = 0000000000008000 (cc=3) -+slgfi 00000000FFFFFFFF - 0000000000000000 - 1 = 00000000FFFFFFFF (cc=3) -+slgfi 0000000080000000 - 0000000000000000 - 1 = 0000000080000000 (cc=3) -+slgfi 000000007FFFFFFF - 0000000000000000 - 1 = 000000007FFFFFFF (cc=3) -+slgfi FFFFFFFFFFFFFFFF - 0000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=3) -+slgfi 8000000000000000 - 0000000000000000 - 1 = 8000000000000000 (cc=3) -+slgfi 7FFFFFFFFFFFFFFF - 0000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slgfi 0000000000000000 - 000000000000FFFF - 1 = FFFFFFFFFFFF0001 (cc=1) -+slgfi 0000000000000001 - 000000000000FFFF - 1 = FFFFFFFFFFFF0002 (cc=1) -+slgfi 000000000000FFFF - 000000000000FFFF - 1 = 0000000000000000 (cc=2) -+slgfi 0000000000007FFF - 000000000000FFFF - 1 = FFFFFFFFFFFF8000 (cc=1) -+slgfi 0000000000008000 - 000000000000FFFF - 1 = FFFFFFFFFFFF8001 (cc=1) -+slgfi 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFF0000 (cc=3) -+slgfi 0000000080000000 - 000000000000FFFF - 1 = 000000007FFF0001 (cc=3) -+slgfi 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFF0000 (cc=3) -+slgfi FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFF0000 (cc=3) -+slgfi 8000000000000000 - 000000000000FFFF - 1 = 7FFFFFFFFFFF0001 (cc=3) -+slgfi 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFF0000 (cc=3) -+slgfi 0000000000000000 - 0000000000008000 - 1 = FFFFFFFFFFFF8000 (cc=1) -+slgfi 0000000000000001 - 0000000000008000 - 1 = FFFFFFFFFFFF8001 (cc=1) -+slgfi 000000000000FFFF - 0000000000008000 - 1 = 0000000000007FFF (cc=3) -+slgfi 0000000000007FFF - 0000000000008000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slgfi 0000000000008000 - 0000000000008000 - 1 = 0000000000000000 (cc=2) -+slgfi 00000000FFFFFFFF - 0000000000008000 - 1 = 00000000FFFF7FFF (cc=3) -+slgfi 0000000080000000 - 0000000000008000 - 1 = 000000007FFF8000 (cc=3) -+slgfi 000000007FFFFFFF - 0000000000008000 - 1 = 000000007FFF7FFF (cc=3) -+slgfi FFFFFFFFFFFFFFFF - 0000000000008000 - 1 = FFFFFFFFFFFF7FFF (cc=3) -+slgfi 8000000000000000 - 0000000000008000 - 1 = 7FFFFFFFFFFF8000 (cc=3) -+slgfi 7FFFFFFFFFFFFFFF - 0000000000008000 - 1 = 7FFFFFFFFFFF7FFF (cc=3) -+slgfi 0000000000000000 - 0000000000007FFF - 1 = FFFFFFFFFFFF8001 (cc=1) -+slgfi 0000000000000001 - 0000000000007FFF - 1 = FFFFFFFFFFFF8002 (cc=1) -+slgfi 000000000000FFFF - 0000000000007FFF - 1 = 0000000000008000 (cc=3) -+slgfi 0000000000007FFF - 0000000000007FFF - 1 = 0000000000000000 (cc=2) -+slgfi 0000000000008000 - 0000000000007FFF - 1 = 0000000000000001 (cc=3) -+slgfi 00000000FFFFFFFF - 0000000000007FFF - 1 = 00000000FFFF8000 (cc=3) -+slgfi 0000000080000000 - 0000000000007FFF - 1 = 000000007FFF8001 (cc=3) -+slgfi 000000007FFFFFFF - 0000000000007FFF - 1 = 000000007FFF8000 (cc=3) -+slgfi FFFFFFFFFFFFFFFF - 0000000000007FFF - 1 = FFFFFFFFFFFF8000 (cc=3) -+slgfi 8000000000000000 - 0000000000007FFF - 1 = 7FFFFFFFFFFF8001 (cc=3) -+slgfi 7FFFFFFFFFFFFFFF - 0000000000007FFF - 1 = 7FFFFFFFFFFF8000 (cc=3) -+slgfi 0000000000000000 - 00000000FFFFFFFF - 1 = FFFFFFFF00000001 (cc=1) -+slgfi 0000000000000001 - 00000000FFFFFFFF - 1 = FFFFFFFF00000002 (cc=1) -+slgfi 000000000000FFFF - 00000000FFFFFFFF - 1 = FFFFFFFF00010000 (cc=1) -+slgfi 0000000000007FFF - 00000000FFFFFFFF - 1 = FFFFFFFF00008000 (cc=1) -+slgfi 0000000000008000 - 00000000FFFFFFFF - 1 = FFFFFFFF00008001 (cc=1) -+slgfi 00000000FFFFFFFF - 00000000FFFFFFFF - 1 = 0000000000000000 (cc=2) -+slgfi 0000000080000000 - 00000000FFFFFFFF - 1 = FFFFFFFF80000001 (cc=1) -+slgfi 000000007FFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFF80000000 (cc=1) -+slgfi FFFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFF00000000 (cc=3) -+slgfi 8000000000000000 - 00000000FFFFFFFF - 1 = 7FFFFFFF00000001 (cc=3) -+slgfi 7FFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = 7FFFFFFF00000000 (cc=3) -+slgfi 0000000000000000 - 0000000080000000 - 1 = FFFFFFFF80000000 (cc=1) -+slgfi 0000000000000001 - 0000000080000000 - 1 = FFFFFFFF80000001 (cc=1) -+slgfi 000000000000FFFF - 0000000080000000 - 1 = FFFFFFFF8000FFFF (cc=1) -+slgfi 0000000000007FFF - 0000000080000000 - 1 = FFFFFFFF80007FFF (cc=1) -+slgfi 0000000000008000 - 0000000080000000 - 1 = FFFFFFFF80008000 (cc=1) -+slgfi 00000000FFFFFFFF - 0000000080000000 - 1 = 000000007FFFFFFF (cc=3) -+slgfi 0000000080000000 - 0000000080000000 - 1 = 0000000000000000 (cc=2) -+slgfi 000000007FFFFFFF - 0000000080000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slgfi FFFFFFFFFFFFFFFF - 0000000080000000 - 1 = FFFFFFFF7FFFFFFF (cc=3) -+slgfi 8000000000000000 - 0000000080000000 - 1 = 7FFFFFFF80000000 (cc=3) -+slgfi 7FFFFFFFFFFFFFFF - 0000000080000000 - 1 = 7FFFFFFF7FFFFFFF (cc=3) -+slgfi 0000000000000000 - 000000007FFFFFFF - 1 = FFFFFFFF80000001 (cc=1) -+slgfi 0000000000000001 - 000000007FFFFFFF - 1 = FFFFFFFF80000002 (cc=1) -+slgfi 000000000000FFFF - 000000007FFFFFFF - 1 = FFFFFFFF80010000 (cc=1) -+slgfi 0000000000007FFF - 000000007FFFFFFF - 1 = FFFFFFFF80008000 (cc=1) -+slgfi 0000000000008000 - 000000007FFFFFFF - 1 = FFFFFFFF80008001 (cc=1) -+slgfi 00000000FFFFFFFF - 000000007FFFFFFF - 1 = 0000000080000000 (cc=3) -+slgfi 0000000080000000 - 000000007FFFFFFF - 1 = 0000000000000001 (cc=3) -+slgfi 000000007FFFFFFF - 000000007FFFFFFF - 1 = 0000000000000000 (cc=2) -+slgfi FFFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = FFFFFFFF80000000 (cc=3) -+slgfi 8000000000000000 - 000000007FFFFFFF - 1 = 7FFFFFFF80000001 (cc=3) -+slgfi 7FFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = 7FFFFFFF80000000 (cc=3) ---- none/tests/s390x/sub_EI.vgtest -+++ none/tests/s390x/sub_EI.vgtest -@@ -0,0 +1,2 @@ -+prog: sub_EI -+prereq: test -x sub_EI ---- none/tests/s390x/sub.h -+++ none/tests/s390x/sub.h -@@ -0,0 +1,92 @@ -+#include -+ -+#define SUB_REG_MEM(insn, s1, s2, NOBORROW) \ -+({ \ -+ unsigned long tmp = s1; \ -+ int cc; \ -+ asm volatile( "lghi 0," #NOBORROW "\n" \ -+ "aghi 0, 0\n" \ -+ #insn " %0, %3\n" \ -+ "ipm %1\n" \ -+ "srl %1,28\n" \ -+ : "+d" (tmp), "=d" (cc) \ -+ : "d" (tmp), "Q" (s2) \ -+ : "0", "cc"); \ -+ printf(#insn " %16.16lX - %16.16lX - %d = %16.16lX (cc=%d)\n", s1, s2, !NOBORROW, tmp, cc); \ -+}) -+ -+#define SUB_REG_REG(insn, s1, s2, NOBORROW) \ -+({ \ -+ unsigned long tmp = s1; \ -+ int cc; \ -+ asm volatile( "lghi 0," #NOBORROW "\n" \ -+ "aghi 0, 0\n" \ -+ #insn " %0, %3\n" \ -+ "ipm %1\n" \ -+ "srl %1,28\n" \ -+ : "+d" (tmp), "=d" (cc) \ -+ : "d" (tmp), "d" (s2) \ -+ : "0", "cc"); \ -+ printf(#insn " %16.16lX - %16.16lX - %d = %16.16lX (cc=%d)\n", s1, s2, !NOBORROW, tmp, cc); \ -+}) -+ -+#define SUB_REG_IMM(insn, s1, s2, NOBORROW) \ -+({ \ -+ unsigned long tmp = s1; \ -+ int cc; \ -+ asm volatile( "lghi 0," #NOBORROW "\n" \ -+ "aghi 0, 0\n" \ -+ #insn " %0," #s2 "\n" \ -+ "ipm %1\n" \ -+ "srl %1,28\n" \ -+ : "+d" (tmp), "=d" (cc) \ -+ : "d" (tmp) \ -+ : "0", "cc"); \ -+ printf(#insn " %16.16lX - %16.16lX - %d = %16.16lX (cc=%d)\n", s1, (unsigned long) s2, !NOBORROW, tmp, cc); \ -+}) -+ -+#define memsweep(i, s2, carryset) \ -+({ \ -+ SUB_REG_MEM(i, 0ul, s2, carryset); \ -+ SUB_REG_MEM(i, 1ul, s2, carryset); \ -+ SUB_REG_MEM(i, 0xfffful, s2, carryset); \ -+ SUB_REG_MEM(i, 0x7ffful, s2, carryset); \ -+ SUB_REG_MEM(i, 0x8000ul, s2, carryset); \ -+ SUB_REG_MEM(i, 0xfffffffful, s2, carryset); \ -+ SUB_REG_MEM(i, 0x80000000ul, s2, carryset); \ -+ SUB_REG_MEM(i, 0x7ffffffful, s2, carryset); \ -+ SUB_REG_MEM(i, 0xfffffffffffffffful, s2, carryset); \ -+ SUB_REG_MEM(i, 0x8000000000000000ul, s2, carryset); \ -+ SUB_REG_MEM(i, 0x7ffffffffffffffful, s2, carryset); \ -+}) -+ -+#define regsweep(i, s2, carryset) \ -+({ \ -+ SUB_REG_REG(i, 0ul, s2, carryset); \ -+ SUB_REG_REG(i, 1ul, s2, carryset); \ -+ SUB_REG_REG(i, 0xfffful, s2, carryset); \ -+ SUB_REG_REG(i, 0x7ffful, s2, carryset); \ -+ SUB_REG_REG(i, 0x8000ul, s2, carryset); \ -+ SUB_REG_REG(i, 0xfffffffful, s2, carryset); \ -+ SUB_REG_REG(i, 0x80000000ul, s2, carryset); \ -+ SUB_REG_REG(i, 0x7ffffffful, s2, carryset); \ -+ SUB_REG_REG(i, 0xfffffffffffffffful, s2, carryset); \ -+ SUB_REG_REG(i, 0x8000000000000000ul, s2, carryset); \ -+ SUB_REG_REG(i, 0x7ffffffffffffffful, s2, carryset); \ -+}) -+ -+#define immsweep(i, s2, carryset) \ -+({ \ -+ SUB_REG_IMM(i, 0ul, s2, carryset); \ -+ SUB_REG_IMM(i, 1ul, s2, carryset); \ -+ SUB_REG_IMM(i, 0xfffful, s2, carryset); \ -+ SUB_REG_IMM(i, 0x7ffful, s2, carryset); \ -+ SUB_REG_IMM(i, 0x8000ul, s2, carryset); \ -+ SUB_REG_IMM(i, 0xfffffffful, s2, carryset); \ -+ SUB_REG_IMM(i, 0x80000000ul, s2, carryset); \ -+ SUB_REG_IMM(i, 0x7ffffffful, s2, carryset); \ -+ SUB_REG_IMM(i, 0xfffffffffffffffful, s2, carryset); \ -+ SUB_REG_IMM(i, 0x8000000000000000ul, s2, carryset); \ -+ SUB_REG_IMM(i, 0x7ffffffffffffffful, s2, carryset); \ -+}) -+ ---- none/tests/s390x/sub.stderr.exp -+++ none/tests/s390x/sub.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/sub.stdout.exp -+++ none/tests/s390x/sub.stdout.exp -@@ -0,0 +1,3850 @@ -+s 0000000000000000 - 0000000000000000 - 1 = 0000000000000000 (cc=0) -+s 0000000000000001 - 0000000000000000 - 1 = 0000000000000001 (cc=2) -+s 000000000000FFFF - 0000000000000000 - 1 = 000000000000FFFF (cc=2) -+s 0000000000007FFF - 0000000000000000 - 1 = 0000000000007FFF (cc=2) -+s 0000000000008000 - 0000000000000000 - 1 = 0000000000008000 (cc=2) -+s 00000000FFFFFFFF - 0000000000000000 - 1 = 00000000FFFFFFFF (cc=1) -+s 0000000080000000 - 0000000000000000 - 1 = 0000000080000000 (cc=1) -+s 000000007FFFFFFF - 0000000000000000 - 1 = 000000007FFFFFFF (cc=2) -+s FFFFFFFFFFFFFFFF - 0000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+s 8000000000000000 - 0000000000000000 - 1 = 8000000000000000 (cc=0) -+s 7FFFFFFFFFFFFFFF - 0000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sh 0000000000000000 - 0000000000000000 - 1 = 0000000000000000 (cc=0) -+sh 0000000000000001 - 0000000000000000 - 1 = 0000000000000001 (cc=2) -+sh 000000000000FFFF - 0000000000000000 - 1 = 000000000000FFFF (cc=2) -+sh 0000000000007FFF - 0000000000000000 - 1 = 0000000000007FFF (cc=2) -+sh 0000000000008000 - 0000000000000000 - 1 = 0000000000008000 (cc=2) -+sh 00000000FFFFFFFF - 0000000000000000 - 1 = 00000000FFFFFFFF (cc=1) -+sh 0000000080000000 - 0000000000000000 - 1 = 0000000080000000 (cc=1) -+sh 000000007FFFFFFF - 0000000000000000 - 1 = 000000007FFFFFFF (cc=2) -+sh FFFFFFFFFFFFFFFF - 0000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sh 8000000000000000 - 0000000000000000 - 1 = 8000000000000000 (cc=0) -+sh 7FFFFFFFFFFFFFFF - 0000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sg 0000000000000000 - 0000000000000000 - 1 = 0000000000000000 (cc=0) -+sg 0000000000000001 - 0000000000000000 - 1 = 0000000000000001 (cc=2) -+sg 000000000000FFFF - 0000000000000000 - 1 = 000000000000FFFF (cc=2) -+sg 0000000000007FFF - 0000000000000000 - 1 = 0000000000007FFF (cc=2) -+sg 0000000000008000 - 0000000000000000 - 1 = 0000000000008000 (cc=2) -+sg 00000000FFFFFFFF - 0000000000000000 - 1 = 00000000FFFFFFFF (cc=2) -+sg 0000000080000000 - 0000000000000000 - 1 = 0000000080000000 (cc=2) -+sg 000000007FFFFFFF - 0000000000000000 - 1 = 000000007FFFFFFF (cc=2) -+sg FFFFFFFFFFFFFFFF - 0000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sg 8000000000000000 - 0000000000000000 - 1 = 8000000000000000 (cc=1) -+sg 7FFFFFFFFFFFFFFF - 0000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=2) -+sgf 0000000000000000 - 0000000000000000 - 1 = 0000000000000000 (cc=0) -+sgf 0000000000000001 - 0000000000000000 - 1 = 0000000000000001 (cc=2) -+sgf 000000000000FFFF - 0000000000000000 - 1 = 000000000000FFFF (cc=2) -+sgf 0000000000007FFF - 0000000000000000 - 1 = 0000000000007FFF (cc=2) -+sgf 0000000000008000 - 0000000000000000 - 1 = 0000000000008000 (cc=2) -+sgf 00000000FFFFFFFF - 0000000000000000 - 1 = 00000000FFFFFFFF (cc=2) -+sgf 0000000080000000 - 0000000000000000 - 1 = 0000000080000000 (cc=2) -+sgf 000000007FFFFFFF - 0000000000000000 - 1 = 000000007FFFFFFF (cc=2) -+sgf FFFFFFFFFFFFFFFF - 0000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sgf 8000000000000000 - 0000000000000000 - 1 = 8000000000000000 (cc=1) -+sgf 7FFFFFFFFFFFFFFF - 0000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=2) -+sl 0000000000000000 - 0000000000000000 - 1 = 0000000000000000 (cc=2) -+sl 0000000000000001 - 0000000000000000 - 1 = 0000000000000001 (cc=3) -+sl 000000000000FFFF - 0000000000000000 - 1 = 000000000000FFFF (cc=3) -+sl 0000000000007FFF - 0000000000000000 - 1 = 0000000000007FFF (cc=3) -+sl 0000000000008000 - 0000000000000000 - 1 = 0000000000008000 (cc=3) -+sl 00000000FFFFFFFF - 0000000000000000 - 1 = 00000000FFFFFFFF (cc=3) -+sl 0000000080000000 - 0000000000000000 - 1 = 0000000080000000 (cc=3) -+sl 000000007FFFFFFF - 0000000000000000 - 1 = 000000007FFFFFFF (cc=3) -+sl FFFFFFFFFFFFFFFF - 0000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=3) -+sl 8000000000000000 - 0000000000000000 - 1 = 8000000000000000 (cc=2) -+sl 7FFFFFFFFFFFFFFF - 0000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slg 0000000000000000 - 0000000000000000 - 1 = 0000000000000000 (cc=2) -+slg 0000000000000001 - 0000000000000000 - 1 = 0000000000000001 (cc=3) -+slg 000000000000FFFF - 0000000000000000 - 1 = 000000000000FFFF (cc=3) -+slg 0000000000007FFF - 0000000000000000 - 1 = 0000000000007FFF (cc=3) -+slg 0000000000008000 - 0000000000000000 - 1 = 0000000000008000 (cc=3) -+slg 00000000FFFFFFFF - 0000000000000000 - 1 = 00000000FFFFFFFF (cc=3) -+slg 0000000080000000 - 0000000000000000 - 1 = 0000000080000000 (cc=3) -+slg 000000007FFFFFFF - 0000000000000000 - 1 = 000000007FFFFFFF (cc=3) -+slg FFFFFFFFFFFFFFFF - 0000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=3) -+slg 8000000000000000 - 0000000000000000 - 1 = 8000000000000000 (cc=3) -+slg 7FFFFFFFFFFFFFFF - 0000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+sgf 0000000000000000 - 0000000000000000 - 1 = 0000000000000000 (cc=0) -+sgf 0000000000000001 - 0000000000000000 - 1 = 0000000000000001 (cc=2) -+sgf 000000000000FFFF - 0000000000000000 - 1 = 000000000000FFFF (cc=2) -+sgf 0000000000007FFF - 0000000000000000 - 1 = 0000000000007FFF (cc=2) -+sgf 0000000000008000 - 0000000000000000 - 1 = 0000000000008000 (cc=2) -+sgf 00000000FFFFFFFF - 0000000000000000 - 1 = 00000000FFFFFFFF (cc=2) -+sgf 0000000080000000 - 0000000000000000 - 1 = 0000000080000000 (cc=2) -+sgf 000000007FFFFFFF - 0000000000000000 - 1 = 000000007FFFFFFF (cc=2) -+sgf FFFFFFFFFFFFFFFF - 0000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sgf 8000000000000000 - 0000000000000000 - 1 = 8000000000000000 (cc=1) -+sgf 7FFFFFFFFFFFFFFF - 0000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=2) -+slgf 0000000000000000 - 0000000000000000 - 1 = 0000000000000000 (cc=2) -+slgf 0000000000000001 - 0000000000000000 - 1 = 0000000000000001 (cc=3) -+slgf 000000000000FFFF - 0000000000000000 - 1 = 000000000000FFFF (cc=3) -+slgf 0000000000007FFF - 0000000000000000 - 1 = 0000000000007FFF (cc=3) -+slgf 0000000000008000 - 0000000000000000 - 1 = 0000000000008000 (cc=3) -+slgf 00000000FFFFFFFF - 0000000000000000 - 1 = 00000000FFFFFFFF (cc=3) -+slgf 0000000080000000 - 0000000000000000 - 1 = 0000000080000000 (cc=3) -+slgf 000000007FFFFFFF - 0000000000000000 - 1 = 000000007FFFFFFF (cc=3) -+slgf FFFFFFFFFFFFFFFF - 0000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=3) -+slgf 8000000000000000 - 0000000000000000 - 1 = 8000000000000000 (cc=3) -+slgf 7FFFFFFFFFFFFFFF - 0000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+sr 0000000000000000 - 0000000000000000 - 1 = 0000000000000000 (cc=0) -+sr 0000000000000001 - 0000000000000000 - 1 = 0000000000000001 (cc=2) -+sr 000000000000FFFF - 0000000000000000 - 1 = 000000000000FFFF (cc=2) -+sr 0000000000007FFF - 0000000000000000 - 1 = 0000000000007FFF (cc=2) -+sr 0000000000008000 - 0000000000000000 - 1 = 0000000000008000 (cc=2) -+sr 00000000FFFFFFFF - 0000000000000000 - 1 = 00000000FFFFFFFF (cc=1) -+sr 0000000080000000 - 0000000000000000 - 1 = 0000000080000000 (cc=1) -+sr 000000007FFFFFFF - 0000000000000000 - 1 = 000000007FFFFFFF (cc=2) -+sr FFFFFFFFFFFFFFFF - 0000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sr 8000000000000000 - 0000000000000000 - 1 = 8000000000000000 (cc=0) -+sr 7FFFFFFFFFFFFFFF - 0000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sgr 0000000000000000 - 0000000000000000 - 1 = 0000000000000000 (cc=0) -+sgr 0000000000000001 - 0000000000000000 - 1 = 0000000000000001 (cc=2) -+sgr 000000000000FFFF - 0000000000000000 - 1 = 000000000000FFFF (cc=2) -+sgr 0000000000007FFF - 0000000000000000 - 1 = 0000000000007FFF (cc=2) -+sgr 0000000000008000 - 0000000000000000 - 1 = 0000000000008000 (cc=2) -+sgr 00000000FFFFFFFF - 0000000000000000 - 1 = 00000000FFFFFFFF (cc=2) -+sgr 0000000080000000 - 0000000000000000 - 1 = 0000000080000000 (cc=2) -+sgr 000000007FFFFFFF - 0000000000000000 - 1 = 000000007FFFFFFF (cc=2) -+sgr FFFFFFFFFFFFFFFF - 0000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sgr 8000000000000000 - 0000000000000000 - 1 = 8000000000000000 (cc=1) -+sgr 7FFFFFFFFFFFFFFF - 0000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=2) -+sgfr 0000000000000000 - 0000000000000000 - 1 = 0000000000000000 (cc=0) -+sgfr 0000000000000001 - 0000000000000000 - 1 = 0000000000000001 (cc=2) -+sgfr 000000000000FFFF - 0000000000000000 - 1 = 000000000000FFFF (cc=2) -+sgfr 0000000000007FFF - 0000000000000000 - 1 = 0000000000007FFF (cc=2) -+sgfr 0000000000008000 - 0000000000000000 - 1 = 0000000000008000 (cc=2) -+sgfr 00000000FFFFFFFF - 0000000000000000 - 1 = 00000000FFFFFFFF (cc=2) -+sgfr 0000000080000000 - 0000000000000000 - 1 = 0000000080000000 (cc=2) -+sgfr 000000007FFFFFFF - 0000000000000000 - 1 = 000000007FFFFFFF (cc=2) -+sgfr FFFFFFFFFFFFFFFF - 0000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sgfr 8000000000000000 - 0000000000000000 - 1 = 8000000000000000 (cc=1) -+sgfr 7FFFFFFFFFFFFFFF - 0000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=2) -+slr 0000000000000000 - 0000000000000000 - 1 = 0000000000000000 (cc=2) -+slr 0000000000000001 - 0000000000000000 - 1 = 0000000000000001 (cc=3) -+slr 000000000000FFFF - 0000000000000000 - 1 = 000000000000FFFF (cc=3) -+slr 0000000000007FFF - 0000000000000000 - 1 = 0000000000007FFF (cc=3) -+slr 0000000000008000 - 0000000000000000 - 1 = 0000000000008000 (cc=3) -+slr 00000000FFFFFFFF - 0000000000000000 - 1 = 00000000FFFFFFFF (cc=3) -+slr 0000000080000000 - 0000000000000000 - 1 = 0000000080000000 (cc=3) -+slr 000000007FFFFFFF - 0000000000000000 - 1 = 000000007FFFFFFF (cc=3) -+slr FFFFFFFFFFFFFFFF - 0000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=3) -+slr 8000000000000000 - 0000000000000000 - 1 = 8000000000000000 (cc=2) -+slr 7FFFFFFFFFFFFFFF - 0000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slgr 0000000000000000 - 0000000000000000 - 1 = 0000000000000000 (cc=2) -+slgr 0000000000000001 - 0000000000000000 - 1 = 0000000000000001 (cc=3) -+slgr 000000000000FFFF - 0000000000000000 - 1 = 000000000000FFFF (cc=3) -+slgr 0000000000007FFF - 0000000000000000 - 1 = 0000000000007FFF (cc=3) -+slgr 0000000000008000 - 0000000000000000 - 1 = 0000000000008000 (cc=3) -+slgr 00000000FFFFFFFF - 0000000000000000 - 1 = 00000000FFFFFFFF (cc=3) -+slgr 0000000080000000 - 0000000000000000 - 1 = 0000000080000000 (cc=3) -+slgr 000000007FFFFFFF - 0000000000000000 - 1 = 000000007FFFFFFF (cc=3) -+slgr FFFFFFFFFFFFFFFF - 0000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=3) -+slgr 8000000000000000 - 0000000000000000 - 1 = 8000000000000000 (cc=3) -+slgr 7FFFFFFFFFFFFFFF - 0000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slgfr 0000000000000000 - 0000000000000000 - 1 = 0000000000000000 (cc=2) -+slgfr 0000000000000001 - 0000000000000000 - 1 = 0000000000000001 (cc=3) -+slgfr 000000000000FFFF - 0000000000000000 - 1 = 000000000000FFFF (cc=3) -+slgfr 0000000000007FFF - 0000000000000000 - 1 = 0000000000007FFF (cc=3) -+slgfr 0000000000008000 - 0000000000000000 - 1 = 0000000000008000 (cc=3) -+slgfr 00000000FFFFFFFF - 0000000000000000 - 1 = 00000000FFFFFFFF (cc=3) -+slgfr 0000000080000000 - 0000000000000000 - 1 = 0000000080000000 (cc=3) -+slgfr 000000007FFFFFFF - 0000000000000000 - 1 = 000000007FFFFFFF (cc=3) -+slgfr FFFFFFFFFFFFFFFF - 0000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=3) -+slgfr 8000000000000000 - 0000000000000000 - 1 = 8000000000000000 (cc=3) -+slgfr 7FFFFFFFFFFFFFFF - 0000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slb 0000000000000000 - 0000000000000000 - 1 = 00000000FFFFFFFF (cc=1) -+slb 0000000000000001 - 0000000000000000 - 1 = 0000000000000000 (cc=2) -+slb 000000000000FFFF - 0000000000000000 - 1 = 000000000000FFFE (cc=3) -+slb 0000000000007FFF - 0000000000000000 - 1 = 0000000000007FFE (cc=3) -+slb 0000000000008000 - 0000000000000000 - 1 = 0000000000007FFF (cc=3) -+slb 00000000FFFFFFFF - 0000000000000000 - 1 = 00000000FFFFFFFE (cc=3) -+slb 0000000080000000 - 0000000000000000 - 1 = 000000007FFFFFFF (cc=3) -+slb 000000007FFFFFFF - 0000000000000000 - 1 = 000000007FFFFFFE (cc=3) -+slb FFFFFFFFFFFFFFFF - 0000000000000000 - 1 = FFFFFFFFFFFFFFFE (cc=3) -+slb 8000000000000000 - 0000000000000000 - 1 = 80000000FFFFFFFF (cc=1) -+slb 7FFFFFFFFFFFFFFF - 0000000000000000 - 1 = 7FFFFFFFFFFFFFFE (cc=3) -+slbg 0000000000000000 - 0000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slbg 0000000000000001 - 0000000000000000 - 1 = 0000000000000000 (cc=2) -+slbg 000000000000FFFF - 0000000000000000 - 1 = 000000000000FFFE (cc=3) -+slbg 0000000000007FFF - 0000000000000000 - 1 = 0000000000007FFE (cc=3) -+slbg 0000000000008000 - 0000000000000000 - 1 = 0000000000007FFF (cc=3) -+slbg 00000000FFFFFFFF - 0000000000000000 - 1 = 00000000FFFFFFFE (cc=3) -+slbg 0000000080000000 - 0000000000000000 - 1 = 000000007FFFFFFF (cc=3) -+slbg 000000007FFFFFFF - 0000000000000000 - 1 = 000000007FFFFFFE (cc=3) -+slbg FFFFFFFFFFFFFFFF - 0000000000000000 - 1 = FFFFFFFFFFFFFFFE (cc=3) -+slbg 8000000000000000 - 0000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slbg 7FFFFFFFFFFFFFFF - 0000000000000000 - 1 = 7FFFFFFFFFFFFFFE (cc=3) -+slbr 0000000000000000 - 0000000000000000 - 1 = 00000000FFFFFFFF (cc=1) -+slbr 0000000000000001 - 0000000000000000 - 1 = 0000000000000000 (cc=2) -+slbr 000000000000FFFF - 0000000000000000 - 1 = 000000000000FFFE (cc=3) -+slbr 0000000000007FFF - 0000000000000000 - 1 = 0000000000007FFE (cc=3) -+slbr 0000000000008000 - 0000000000000000 - 1 = 0000000000007FFF (cc=3) -+slbr 00000000FFFFFFFF - 0000000000000000 - 1 = 00000000FFFFFFFE (cc=3) -+slbr 0000000080000000 - 0000000000000000 - 1 = 000000007FFFFFFF (cc=3) -+slbr 000000007FFFFFFF - 0000000000000000 - 1 = 000000007FFFFFFE (cc=3) -+slbr FFFFFFFFFFFFFFFF - 0000000000000000 - 1 = FFFFFFFFFFFFFFFE (cc=3) -+slbr 8000000000000000 - 0000000000000000 - 1 = 80000000FFFFFFFF (cc=1) -+slbr 7FFFFFFFFFFFFFFF - 0000000000000000 - 1 = 7FFFFFFFFFFFFFFE (cc=3) -+slbgr 0000000000000000 - 0000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slbgr 0000000000000001 - 0000000000000000 - 1 = 0000000000000000 (cc=2) -+slbgr 000000000000FFFF - 0000000000000000 - 1 = 000000000000FFFE (cc=3) -+slbgr 0000000000007FFF - 0000000000000000 - 1 = 0000000000007FFE (cc=3) -+slbgr 0000000000008000 - 0000000000000000 - 1 = 0000000000007FFF (cc=3) -+slbgr 00000000FFFFFFFF - 0000000000000000 - 1 = 00000000FFFFFFFE (cc=3) -+slbgr 0000000080000000 - 0000000000000000 - 1 = 000000007FFFFFFF (cc=3) -+slbgr 000000007FFFFFFF - 0000000000000000 - 1 = 000000007FFFFFFE (cc=3) -+slbgr FFFFFFFFFFFFFFFF - 0000000000000000 - 1 = FFFFFFFFFFFFFFFE (cc=3) -+slbgr 8000000000000000 - 0000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slbgr 7FFFFFFFFFFFFFFF - 0000000000000000 - 1 = 7FFFFFFFFFFFFFFE (cc=3) -+slb 0000000000000000 - 0000000000000000 - 0 = 0000000000000000 (cc=2) -+slb 0000000000000001 - 0000000000000000 - 0 = 0000000000000001 (cc=3) -+slb 000000000000FFFF - 0000000000000000 - 0 = 000000000000FFFF (cc=3) -+slb 0000000000007FFF - 0000000000000000 - 0 = 0000000000007FFF (cc=3) -+slb 0000000000008000 - 0000000000000000 - 0 = 0000000000008000 (cc=3) -+slb 00000000FFFFFFFF - 0000000000000000 - 0 = 00000000FFFFFFFF (cc=3) -+slb 0000000080000000 - 0000000000000000 - 0 = 0000000080000000 (cc=3) -+slb 000000007FFFFFFF - 0000000000000000 - 0 = 000000007FFFFFFF (cc=3) -+slb FFFFFFFFFFFFFFFF - 0000000000000000 - 0 = FFFFFFFFFFFFFFFF (cc=3) -+slb 8000000000000000 - 0000000000000000 - 0 = 8000000000000000 (cc=2) -+slb 7FFFFFFFFFFFFFFF - 0000000000000000 - 0 = 7FFFFFFFFFFFFFFF (cc=3) -+slbg 0000000000000000 - 0000000000000000 - 0 = 0000000000000000 (cc=2) -+slbg 0000000000000001 - 0000000000000000 - 0 = 0000000000000001 (cc=3) -+slbg 000000000000FFFF - 0000000000000000 - 0 = 000000000000FFFF (cc=3) -+slbg 0000000000007FFF - 0000000000000000 - 0 = 0000000000007FFF (cc=3) -+slbg 0000000000008000 - 0000000000000000 - 0 = 0000000000008000 (cc=3) -+slbg 00000000FFFFFFFF - 0000000000000000 - 0 = 00000000FFFFFFFF (cc=3) -+slbg 0000000080000000 - 0000000000000000 - 0 = 0000000080000000 (cc=3) -+slbg 000000007FFFFFFF - 0000000000000000 - 0 = 000000007FFFFFFF (cc=3) -+slbg FFFFFFFFFFFFFFFF - 0000000000000000 - 0 = FFFFFFFFFFFFFFFF (cc=3) -+slbg 8000000000000000 - 0000000000000000 - 0 = 8000000000000000 (cc=3) -+slbg 7FFFFFFFFFFFFFFF - 0000000000000000 - 0 = 7FFFFFFFFFFFFFFF (cc=3) -+slbr 0000000000000000 - 0000000000000000 - 0 = 0000000000000000 (cc=2) -+slbr 0000000000000001 - 0000000000000000 - 0 = 0000000000000001 (cc=3) -+slbr 000000000000FFFF - 0000000000000000 - 0 = 000000000000FFFF (cc=3) -+slbr 0000000000007FFF - 0000000000000000 - 0 = 0000000000007FFF (cc=3) -+slbr 0000000000008000 - 0000000000000000 - 0 = 0000000000008000 (cc=3) -+slbr 00000000FFFFFFFF - 0000000000000000 - 0 = 00000000FFFFFFFF (cc=3) -+slbr 0000000080000000 - 0000000000000000 - 0 = 0000000080000000 (cc=3) -+slbr 000000007FFFFFFF - 0000000000000000 - 0 = 000000007FFFFFFF (cc=3) -+slbr FFFFFFFFFFFFFFFF - 0000000000000000 - 0 = FFFFFFFFFFFFFFFF (cc=3) -+slbr 8000000000000000 - 0000000000000000 - 0 = 8000000000000000 (cc=2) -+slbr 7FFFFFFFFFFFFFFF - 0000000000000000 - 0 = 7FFFFFFFFFFFFFFF (cc=3) -+slbgr 0000000000000000 - 0000000000000000 - 0 = 0000000000000000 (cc=2) -+slbgr 0000000000000001 - 0000000000000000 - 0 = 0000000000000001 (cc=3) -+slbgr 000000000000FFFF - 0000000000000000 - 0 = 000000000000FFFF (cc=3) -+slbgr 0000000000007FFF - 0000000000000000 - 0 = 0000000000007FFF (cc=3) -+slbgr 0000000000008000 - 0000000000000000 - 0 = 0000000000008000 (cc=3) -+slbgr 00000000FFFFFFFF - 0000000000000000 - 0 = 00000000FFFFFFFF (cc=3) -+slbgr 0000000080000000 - 0000000000000000 - 0 = 0000000080000000 (cc=3) -+slbgr 000000007FFFFFFF - 0000000000000000 - 0 = 000000007FFFFFFF (cc=3) -+slbgr FFFFFFFFFFFFFFFF - 0000000000000000 - 0 = FFFFFFFFFFFFFFFF (cc=3) -+slbgr 8000000000000000 - 0000000000000000 - 0 = 8000000000000000 (cc=3) -+slbgr 7FFFFFFFFFFFFFFF - 0000000000000000 - 0 = 7FFFFFFFFFFFFFFF (cc=3) -+shy 0000000000000000 - 0000000000000000 - 1 = 0000000000000000 (cc=0) -+shy 0000000000000001 - 0000000000000000 - 1 = 0000000000000001 (cc=2) -+shy 000000000000FFFF - 0000000000000000 - 1 = 000000000000FFFF (cc=2) -+shy 0000000000007FFF - 0000000000000000 - 1 = 0000000000007FFF (cc=2) -+shy 0000000000008000 - 0000000000000000 - 1 = 0000000000008000 (cc=2) -+shy 00000000FFFFFFFF - 0000000000000000 - 1 = 00000000FFFFFFFF (cc=1) -+shy 0000000080000000 - 0000000000000000 - 1 = 0000000080000000 (cc=1) -+shy 000000007FFFFFFF - 0000000000000000 - 1 = 000000007FFFFFFF (cc=2) -+shy FFFFFFFFFFFFFFFF - 0000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+shy 8000000000000000 - 0000000000000000 - 1 = 8000000000000000 (cc=0) -+shy 7FFFFFFFFFFFFFFF - 0000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sly 0000000000000000 - 0000000000000000 - 1 = 0000000000000000 (cc=2) -+sly 0000000000000001 - 0000000000000000 - 1 = 0000000000000001 (cc=3) -+sly 000000000000FFFF - 0000000000000000 - 1 = 000000000000FFFF (cc=3) -+sly 0000000000007FFF - 0000000000000000 - 1 = 0000000000007FFF (cc=3) -+sly 0000000000008000 - 0000000000000000 - 1 = 0000000000008000 (cc=3) -+sly 00000000FFFFFFFF - 0000000000000000 - 1 = 00000000FFFFFFFF (cc=3) -+sly 0000000080000000 - 0000000000000000 - 1 = 0000000080000000 (cc=3) -+sly 000000007FFFFFFF - 0000000000000000 - 1 = 000000007FFFFFFF (cc=3) -+sly FFFFFFFFFFFFFFFF - 0000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=3) -+sly 8000000000000000 - 0000000000000000 - 1 = 8000000000000000 (cc=2) -+sly 7FFFFFFFFFFFFFFF - 0000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+sy 0000000000000000 - 0000000000000000 - 1 = 0000000000000000 (cc=0) -+sy 0000000000000001 - 0000000000000000 - 1 = 0000000000000001 (cc=2) -+sy 000000000000FFFF - 0000000000000000 - 1 = 000000000000FFFF (cc=2) -+sy 0000000000007FFF - 0000000000000000 - 1 = 0000000000007FFF (cc=2) -+sy 0000000000008000 - 0000000000000000 - 1 = 0000000000008000 (cc=2) -+sy 00000000FFFFFFFF - 0000000000000000 - 1 = 00000000FFFFFFFF (cc=1) -+sy 0000000080000000 - 0000000000000000 - 1 = 0000000080000000 (cc=1) -+sy 000000007FFFFFFF - 0000000000000000 - 1 = 000000007FFFFFFF (cc=2) -+sy FFFFFFFFFFFFFFFF - 0000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sy 8000000000000000 - 0000000000000000 - 1 = 8000000000000000 (cc=0) -+sy 7FFFFFFFFFFFFFFF - 0000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+s 0000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 0000000080000001 (cc=1) -+s 0000000000000001 - 7FFFFFFFFFFFFFFF - 1 = 0000000080000002 (cc=1) -+s 000000000000FFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000080010000 (cc=1) -+s 0000000000007FFF - 7FFFFFFFFFFFFFFF - 1 = 0000000080008000 (cc=1) -+s 0000000000008000 - 7FFFFFFFFFFFFFFF - 1 = 0000000080008001 (cc=1) -+s 00000000FFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=1) -+s 0000000080000000 - 7FFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=3) -+s 000000007FFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=0) -+s FFFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF80000000 (cc=1) -+s 8000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 8000000080000001 (cc=1) -+s 7FFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 7FFFFFFF80000000 (cc=1) -+sh 0000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 00000000FFFF8001 (cc=1) -+sh 0000000000000001 - 7FFFFFFFFFFFFFFF - 1 = 00000000FFFF8002 (cc=1) -+sh 000000000000FFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000000008000 (cc=2) -+sh 0000000000007FFF - 7FFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=0) -+sh 0000000000008000 - 7FFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=2) -+sh 00000000FFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 00000000FFFF8000 (cc=1) -+sh 0000000080000000 - 7FFFFFFFFFFFFFFF - 1 = 000000007FFF8001 (cc=3) -+sh 000000007FFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 000000007FFF8000 (cc=2) -+sh FFFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFFFFFF8000 (cc=1) -+sh 8000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 80000000FFFF8001 (cc=1) -+sh 7FFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 7FFFFFFFFFFF8000 (cc=1) -+sg 0000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 8000000000000001 (cc=1) -+sg 0000000000000001 - 7FFFFFFFFFFFFFFF - 1 = 8000000000000002 (cc=1) -+sg 000000000000FFFF - 7FFFFFFFFFFFFFFF - 1 = 8000000000010000 (cc=1) -+sg 0000000000007FFF - 7FFFFFFFFFFFFFFF - 1 = 8000000000008000 (cc=1) -+sg 0000000000008000 - 7FFFFFFFFFFFFFFF - 1 = 8000000000008001 (cc=1) -+sg 00000000FFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 8000000100000000 (cc=1) -+sg 0000000080000000 - 7FFFFFFFFFFFFFFF - 1 = 8000000080000001 (cc=1) -+sg 000000007FFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 8000000080000000 (cc=1) -+sg FFFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 8000000000000000 (cc=1) -+sg 8000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=3) -+sg 7FFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=0) -+sgf 0000000000000000 - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF80000001 (cc=1) -+sgf 0000000000000001 - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF80000002 (cc=1) -+sgf 000000000000FFFF - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF80010000 (cc=1) -+sgf 0000000000007FFF - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF80008000 (cc=1) -+sgf 0000000000008000 - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF80008001 (cc=1) -+sgf 00000000FFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=2) -+sgf 0000000080000000 - 7FFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=2) -+sgf 000000007FFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=0) -+sgf FFFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF80000000 (cc=1) -+sgf 8000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 7FFFFFFF80000001 (cc=3) -+sgf 7FFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 7FFFFFFF80000000 (cc=2) -+sl 0000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 0000000080000001 (cc=1) -+sl 0000000000000001 - 7FFFFFFFFFFFFFFF - 1 = 0000000080000002 (cc=1) -+sl 000000000000FFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000080010000 (cc=1) -+sl 0000000000007FFF - 7FFFFFFFFFFFFFFF - 1 = 0000000080008000 (cc=1) -+sl 0000000000008000 - 7FFFFFFFFFFFFFFF - 1 = 0000000080008001 (cc=1) -+sl 00000000FFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=3) -+sl 0000000080000000 - 7FFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=3) -+sl 000000007FFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=2) -+sl FFFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF80000000 (cc=3) -+sl 8000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 8000000080000001 (cc=1) -+sl 7FFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 7FFFFFFF80000000 (cc=3) -+slg 0000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 8000000000000001 (cc=1) -+slg 0000000000000001 - 7FFFFFFFFFFFFFFF - 1 = 8000000000000002 (cc=1) -+slg 000000000000FFFF - 7FFFFFFFFFFFFFFF - 1 = 8000000000010000 (cc=1) -+slg 0000000000007FFF - 7FFFFFFFFFFFFFFF - 1 = 8000000000008000 (cc=1) -+slg 0000000000008000 - 7FFFFFFFFFFFFFFF - 1 = 8000000000008001 (cc=1) -+slg 00000000FFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 8000000100000000 (cc=1) -+slg 0000000080000000 - 7FFFFFFFFFFFFFFF - 1 = 8000000080000001 (cc=1) -+slg 000000007FFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 8000000080000000 (cc=1) -+slg FFFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 8000000000000000 (cc=3) -+slg 8000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=3) -+slg 7FFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=2) -+sgf 0000000000000000 - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF80000001 (cc=1) -+sgf 0000000000000001 - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF80000002 (cc=1) -+sgf 000000000000FFFF - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF80010000 (cc=1) -+sgf 0000000000007FFF - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF80008000 (cc=1) -+sgf 0000000000008000 - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF80008001 (cc=1) -+sgf 00000000FFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=2) -+sgf 0000000080000000 - 7FFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=2) -+sgf 000000007FFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=0) -+sgf FFFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF80000000 (cc=1) -+sgf 8000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 7FFFFFFF80000001 (cc=3) -+sgf 7FFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 7FFFFFFF80000000 (cc=2) -+slgf 0000000000000000 - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF80000001 (cc=1) -+slgf 0000000000000001 - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF80000002 (cc=1) -+slgf 000000000000FFFF - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF80010000 (cc=1) -+slgf 0000000000007FFF - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF80008000 (cc=1) -+slgf 0000000000008000 - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF80008001 (cc=1) -+slgf 00000000FFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=3) -+slgf 0000000080000000 - 7FFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=3) -+slgf 000000007FFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=2) -+slgf FFFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF80000000 (cc=3) -+slgf 8000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 7FFFFFFF80000001 (cc=3) -+slgf 7FFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 7FFFFFFF80000000 (cc=3) -+sr 0000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=2) -+sr 0000000000000001 - 7FFFFFFFFFFFFFFF - 1 = 0000000000000002 (cc=2) -+sr 000000000000FFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000000010000 (cc=2) -+sr 0000000000007FFF - 7FFFFFFFFFFFFFFF - 1 = 0000000000008000 (cc=2) -+sr 0000000000008000 - 7FFFFFFFFFFFFFFF - 1 = 0000000000008001 (cc=2) -+sr 00000000FFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=0) -+sr 0000000080000000 - 7FFFFFFFFFFFFFFF - 1 = 0000000080000001 (cc=1) -+sr 000000007FFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=3) -+sr FFFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF00000000 (cc=0) -+sr 8000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 8000000000000001 (cc=2) -+sr 7FFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 7FFFFFFF00000000 (cc=0) -+sgr 0000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 8000000000000001 (cc=1) -+sgr 0000000000000001 - 7FFFFFFFFFFFFFFF - 1 = 8000000000000002 (cc=1) -+sgr 000000000000FFFF - 7FFFFFFFFFFFFFFF - 1 = 8000000000010000 (cc=1) -+sgr 0000000000007FFF - 7FFFFFFFFFFFFFFF - 1 = 8000000000008000 (cc=1) -+sgr 0000000000008000 - 7FFFFFFFFFFFFFFF - 1 = 8000000000008001 (cc=1) -+sgr 00000000FFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 8000000100000000 (cc=1) -+sgr 0000000080000000 - 7FFFFFFFFFFFFFFF - 1 = 8000000080000001 (cc=1) -+sgr 000000007FFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 8000000080000000 (cc=1) -+sgr FFFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 8000000000000000 (cc=1) -+sgr 8000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=3) -+sgr 7FFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=0) -+sgfr 0000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=2) -+sgfr 0000000000000001 - 7FFFFFFFFFFFFFFF - 1 = 0000000000000002 (cc=2) -+sgfr 000000000000FFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000000010000 (cc=2) -+sgfr 0000000000007FFF - 7FFFFFFFFFFFFFFF - 1 = 0000000000008000 (cc=2) -+sgfr 0000000000008000 - 7FFFFFFFFFFFFFFF - 1 = 0000000000008001 (cc=2) -+sgfr 00000000FFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000100000000 (cc=2) -+sgfr 0000000080000000 - 7FFFFFFFFFFFFFFF - 1 = 0000000080000001 (cc=2) -+sgfr 000000007FFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=2) -+sgfr FFFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=0) -+sgfr 8000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 8000000000000001 (cc=1) -+sgfr 7FFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 8000000000000000 (cc=3) -+slr 0000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=1) -+slr 0000000000000001 - 7FFFFFFFFFFFFFFF - 1 = 0000000000000002 (cc=1) -+slr 000000000000FFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000000010000 (cc=1) -+slr 0000000000007FFF - 7FFFFFFFFFFFFFFF - 1 = 0000000000008000 (cc=1) -+slr 0000000000008000 - 7FFFFFFFFFFFFFFF - 1 = 0000000000008001 (cc=1) -+slr 00000000FFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=2) -+slr 0000000080000000 - 7FFFFFFFFFFFFFFF - 1 = 0000000080000001 (cc=1) -+slr 000000007FFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=1) -+slr FFFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF00000000 (cc=2) -+slr 8000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 8000000000000001 (cc=1) -+slr 7FFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 7FFFFFFF00000000 (cc=2) -+slgr 0000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 8000000000000001 (cc=1) -+slgr 0000000000000001 - 7FFFFFFFFFFFFFFF - 1 = 8000000000000002 (cc=1) -+slgr 000000000000FFFF - 7FFFFFFFFFFFFFFF - 1 = 8000000000010000 (cc=1) -+slgr 0000000000007FFF - 7FFFFFFFFFFFFFFF - 1 = 8000000000008000 (cc=1) -+slgr 0000000000008000 - 7FFFFFFFFFFFFFFF - 1 = 8000000000008001 (cc=1) -+slgr 00000000FFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 8000000100000000 (cc=1) -+slgr 0000000080000000 - 7FFFFFFFFFFFFFFF - 1 = 8000000080000001 (cc=1) -+slgr 000000007FFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 8000000080000000 (cc=1) -+slgr FFFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 8000000000000000 (cc=3) -+slgr 8000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=3) -+slgr 7FFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=2) -+slgfr 0000000000000000 - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF00000001 (cc=1) -+slgfr 0000000000000001 - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF00000002 (cc=1) -+slgfr 000000000000FFFF - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF00010000 (cc=1) -+slgfr 0000000000007FFF - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF00008000 (cc=1) -+slgfr 0000000000008000 - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF00008001 (cc=1) -+slgfr 00000000FFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=2) -+slgfr 0000000080000000 - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF80000001 (cc=1) -+slgfr 000000007FFFFFFF - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF80000000 (cc=1) -+slgfr FFFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF00000000 (cc=3) -+slgfr 8000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 7FFFFFFF00000001 (cc=3) -+slgfr 7FFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 7FFFFFFF00000000 (cc=3) -+slb 0000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=1) -+slb 0000000000000001 - 7FFFFFFFFFFFFFFF - 1 = 0000000080000001 (cc=1) -+slb 000000000000FFFF - 7FFFFFFFFFFFFFFF - 1 = 000000008000FFFF (cc=1) -+slb 0000000000007FFF - 7FFFFFFFFFFFFFFF - 1 = 0000000080007FFF (cc=1) -+slb 0000000000008000 - 7FFFFFFFFFFFFFFF - 1 = 0000000080008000 (cc=1) -+slb 00000000FFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 000000007FFFFFFF (cc=3) -+slb 0000000080000000 - 7FFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=2) -+slb 000000007FFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 00000000FFFFFFFF (cc=1) -+slb FFFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF7FFFFFFF (cc=3) -+slb 8000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 8000000080000000 (cc=1) -+slb 7FFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 7FFFFFFF7FFFFFFF (cc=3) -+slbg 0000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 8000000000000000 (cc=1) -+slbg 0000000000000001 - 7FFFFFFFFFFFFFFF - 1 = 8000000000000001 (cc=1) -+slbg 000000000000FFFF - 7FFFFFFFFFFFFFFF - 1 = 800000000000FFFF (cc=1) -+slbg 0000000000007FFF - 7FFFFFFFFFFFFFFF - 1 = 8000000000007FFF (cc=1) -+slbg 0000000000008000 - 7FFFFFFFFFFFFFFF - 1 = 8000000000008000 (cc=1) -+slbg 00000000FFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 80000000FFFFFFFF (cc=1) -+slbg 0000000080000000 - 7FFFFFFFFFFFFFFF - 1 = 8000000080000000 (cc=1) -+slbg 000000007FFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 800000007FFFFFFF (cc=1) -+slbg FFFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slbg 8000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=2) -+slbg 7FFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slbr 0000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=0) -+slbr 0000000000000001 - 7FFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=1) -+slbr 000000000000FFFF - 7FFFFFFFFFFFFFFF - 1 = 000000000000FFFF (cc=1) -+slbr 0000000000007FFF - 7FFFFFFFFFFFFFFF - 1 = 0000000000007FFF (cc=1) -+slbr 0000000000008000 - 7FFFFFFFFFFFFFFF - 1 = 0000000000008000 (cc=1) -+slbr 00000000FFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 00000000FFFFFFFF (cc=1) -+slbr 0000000080000000 - 7FFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=1) -+slbr 000000007FFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 000000007FFFFFFF (cc=1) -+slbr FFFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slbr 8000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 8000000000000000 (cc=0) -+slbr 7FFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+slbgr 0000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 8000000000000000 (cc=1) -+slbgr 0000000000000001 - 7FFFFFFFFFFFFFFF - 1 = 8000000000000001 (cc=1) -+slbgr 000000000000FFFF - 7FFFFFFFFFFFFFFF - 1 = 800000000000FFFF (cc=1) -+slbgr 0000000000007FFF - 7FFFFFFFFFFFFFFF - 1 = 8000000000007FFF (cc=1) -+slbgr 0000000000008000 - 7FFFFFFFFFFFFFFF - 1 = 8000000000008000 (cc=1) -+slbgr 00000000FFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 80000000FFFFFFFF (cc=1) -+slbgr 0000000080000000 - 7FFFFFFFFFFFFFFF - 1 = 8000000080000000 (cc=1) -+slbgr 000000007FFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 800000007FFFFFFF (cc=1) -+slbgr FFFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slbgr 8000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=2) -+slbgr 7FFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slb 0000000000000000 - 7FFFFFFFFFFFFFFF - 0 = 0000000080000001 (cc=1) -+slb 0000000000000001 - 7FFFFFFFFFFFFFFF - 0 = 0000000080000002 (cc=1) -+slb 000000000000FFFF - 7FFFFFFFFFFFFFFF - 0 = 0000000080010000 (cc=1) -+slb 0000000000007FFF - 7FFFFFFFFFFFFFFF - 0 = 0000000080008000 (cc=1) -+slb 0000000000008000 - 7FFFFFFFFFFFFFFF - 0 = 0000000080008001 (cc=1) -+slb 00000000FFFFFFFF - 7FFFFFFFFFFFFFFF - 0 = 0000000080000000 (cc=3) -+slb 0000000080000000 - 7FFFFFFFFFFFFFFF - 0 = 0000000000000001 (cc=3) -+slb 000000007FFFFFFF - 7FFFFFFFFFFFFFFF - 0 = 0000000000000000 (cc=2) -+slb FFFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 0 = FFFFFFFF80000000 (cc=3) -+slb 8000000000000000 - 7FFFFFFFFFFFFFFF - 0 = 8000000080000001 (cc=1) -+slb 7FFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 0 = 7FFFFFFF80000000 (cc=3) -+slbg 0000000000000000 - 7FFFFFFFFFFFFFFF - 0 = 8000000000000001 (cc=1) -+slbg 0000000000000001 - 7FFFFFFFFFFFFFFF - 0 = 8000000000000002 (cc=1) -+slbg 000000000000FFFF - 7FFFFFFFFFFFFFFF - 0 = 8000000000010000 (cc=1) -+slbg 0000000000007FFF - 7FFFFFFFFFFFFFFF - 0 = 8000000000008000 (cc=1) -+slbg 0000000000008000 - 7FFFFFFFFFFFFFFF - 0 = 8000000000008001 (cc=1) -+slbg 00000000FFFFFFFF - 7FFFFFFFFFFFFFFF - 0 = 8000000100000000 (cc=1) -+slbg 0000000080000000 - 7FFFFFFFFFFFFFFF - 0 = 8000000080000001 (cc=1) -+slbg 000000007FFFFFFF - 7FFFFFFFFFFFFFFF - 0 = 8000000080000000 (cc=1) -+slbg FFFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 0 = 8000000000000000 (cc=3) -+slbg 8000000000000000 - 7FFFFFFFFFFFFFFF - 0 = 0000000000000001 (cc=3) -+slbg 7FFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 0 = 0000000000000000 (cc=2) -+slbr 0000000000000000 - 7FFFFFFFFFFFFFFF - 0 = 0000000000000001 (cc=1) -+slbr 0000000000000001 - 7FFFFFFFFFFFFFFF - 0 = 0000000000000002 (cc=1) -+slbr 000000000000FFFF - 7FFFFFFFFFFFFFFF - 0 = 0000000000010000 (cc=1) -+slbr 0000000000007FFF - 7FFFFFFFFFFFFFFF - 0 = 0000000000008000 (cc=1) -+slbr 0000000000008000 - 7FFFFFFFFFFFFFFF - 0 = 0000000000008001 (cc=1) -+slbr 00000000FFFFFFFF - 7FFFFFFFFFFFFFFF - 0 = 0000000000000000 (cc=2) -+slbr 0000000080000000 - 7FFFFFFFFFFFFFFF - 0 = 0000000080000001 (cc=1) -+slbr 000000007FFFFFFF - 7FFFFFFFFFFFFFFF - 0 = 0000000080000000 (cc=1) -+slbr FFFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 0 = FFFFFFFF00000000 (cc=2) -+slbr 8000000000000000 - 7FFFFFFFFFFFFFFF - 0 = 8000000000000001 (cc=1) -+slbr 7FFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 0 = 7FFFFFFF00000000 (cc=2) -+slbgr 0000000000000000 - 7FFFFFFFFFFFFFFF - 0 = 8000000000000001 (cc=1) -+slbgr 0000000000000001 - 7FFFFFFFFFFFFFFF - 0 = 8000000000000002 (cc=1) -+slbgr 000000000000FFFF - 7FFFFFFFFFFFFFFF - 0 = 8000000000010000 (cc=1) -+slbgr 0000000000007FFF - 7FFFFFFFFFFFFFFF - 0 = 8000000000008000 (cc=1) -+slbgr 0000000000008000 - 7FFFFFFFFFFFFFFF - 0 = 8000000000008001 (cc=1) -+slbgr 00000000FFFFFFFF - 7FFFFFFFFFFFFFFF - 0 = 8000000100000000 (cc=1) -+slbgr 0000000080000000 - 7FFFFFFFFFFFFFFF - 0 = 8000000080000001 (cc=1) -+slbgr 000000007FFFFFFF - 7FFFFFFFFFFFFFFF - 0 = 8000000080000000 (cc=1) -+slbgr FFFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 0 = 8000000000000000 (cc=3) -+slbgr 8000000000000000 - 7FFFFFFFFFFFFFFF - 0 = 0000000000000001 (cc=3) -+slbgr 7FFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 0 = 0000000000000000 (cc=2) -+shy 0000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 00000000FFFF8001 (cc=1) -+shy 0000000000000001 - 7FFFFFFFFFFFFFFF - 1 = 00000000FFFF8002 (cc=1) -+shy 000000000000FFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000000008000 (cc=2) -+shy 0000000000007FFF - 7FFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=0) -+shy 0000000000008000 - 7FFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=2) -+shy 00000000FFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 00000000FFFF8000 (cc=1) -+shy 0000000080000000 - 7FFFFFFFFFFFFFFF - 1 = 000000007FFF8001 (cc=3) -+shy 000000007FFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 000000007FFF8000 (cc=2) -+shy FFFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFFFFFF8000 (cc=1) -+shy 8000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 80000000FFFF8001 (cc=1) -+shy 7FFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 7FFFFFFFFFFF8000 (cc=1) -+sly 0000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 0000000080000001 (cc=1) -+sly 0000000000000001 - 7FFFFFFFFFFFFFFF - 1 = 0000000080000002 (cc=1) -+sly 000000000000FFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000080010000 (cc=1) -+sly 0000000000007FFF - 7FFFFFFFFFFFFFFF - 1 = 0000000080008000 (cc=1) -+sly 0000000000008000 - 7FFFFFFFFFFFFFFF - 1 = 0000000080008001 (cc=1) -+sly 00000000FFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=3) -+sly 0000000080000000 - 7FFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=3) -+sly 000000007FFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=2) -+sly FFFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF80000000 (cc=3) -+sly 8000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 8000000080000001 (cc=1) -+sly 7FFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 7FFFFFFF80000000 (cc=3) -+sy 0000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 0000000080000001 (cc=1) -+sy 0000000000000001 - 7FFFFFFFFFFFFFFF - 1 = 0000000080000002 (cc=1) -+sy 000000000000FFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000080010000 (cc=1) -+sy 0000000000007FFF - 7FFFFFFFFFFFFFFF - 1 = 0000000080008000 (cc=1) -+sy 0000000000008000 - 7FFFFFFFFFFFFFFF - 1 = 0000000080008001 (cc=1) -+sy 00000000FFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=1) -+sy 0000000080000000 - 7FFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=3) -+sy 000000007FFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=0) -+sy FFFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = FFFFFFFF80000000 (cc=1) -+sy 8000000000000000 - 7FFFFFFFFFFFFFFF - 1 = 8000000080000001 (cc=1) -+sy 7FFFFFFFFFFFFFFF - 7FFFFFFFFFFFFFFF - 1 = 7FFFFFFF80000000 (cc=1) -+s 0000000000000000 - 8000000000000000 - 1 = 0000000080000000 (cc=3) -+s 0000000000000001 - 8000000000000000 - 1 = 0000000080000001 (cc=3) -+s 000000000000FFFF - 8000000000000000 - 1 = 000000008000FFFF (cc=3) -+s 0000000000007FFF - 8000000000000000 - 1 = 0000000080007FFF (cc=3) -+s 0000000000008000 - 8000000000000000 - 1 = 0000000080008000 (cc=3) -+s 00000000FFFFFFFF - 8000000000000000 - 1 = 000000007FFFFFFF (cc=2) -+s 0000000080000000 - 8000000000000000 - 1 = 0000000000000000 (cc=0) -+s 000000007FFFFFFF - 8000000000000000 - 1 = 00000000FFFFFFFF (cc=3) -+s FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFF7FFFFFFF (cc=2) -+s 8000000000000000 - 8000000000000000 - 1 = 8000000080000000 (cc=3) -+s 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFF7FFFFFFF (cc=2) -+sh 0000000000000000 - 8000000000000000 - 1 = 0000000000008000 (cc=2) -+sh 0000000000000001 - 8000000000000000 - 1 = 0000000000008001 (cc=2) -+sh 000000000000FFFF - 8000000000000000 - 1 = 0000000000017FFF (cc=2) -+sh 0000000000007FFF - 8000000000000000 - 1 = 000000000000FFFF (cc=2) -+sh 0000000000008000 - 8000000000000000 - 1 = 0000000000010000 (cc=2) -+sh 00000000FFFFFFFF - 8000000000000000 - 1 = 0000000000007FFF (cc=2) -+sh 0000000080000000 - 8000000000000000 - 1 = 0000000080008000 (cc=1) -+sh 000000007FFFFFFF - 8000000000000000 - 1 = 0000000080007FFF (cc=3) -+sh FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFF00007FFF (cc=2) -+sh 8000000000000000 - 8000000000000000 - 1 = 8000000000008000 (cc=2) -+sh 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFF00007FFF (cc=2) -+sg 0000000000000000 - 8000000000000000 - 1 = 8000000000000000 (cc=3) -+sg 0000000000000001 - 8000000000000000 - 1 = 8000000000000001 (cc=3) -+sg 000000000000FFFF - 8000000000000000 - 1 = 800000000000FFFF (cc=3) -+sg 0000000000007FFF - 8000000000000000 - 1 = 8000000000007FFF (cc=3) -+sg 0000000000008000 - 8000000000000000 - 1 = 8000000000008000 (cc=3) -+sg 00000000FFFFFFFF - 8000000000000000 - 1 = 80000000FFFFFFFF (cc=3) -+sg 0000000080000000 - 8000000000000000 - 1 = 8000000080000000 (cc=3) -+sg 000000007FFFFFFF - 8000000000000000 - 1 = 800000007FFFFFFF (cc=3) -+sg FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=2) -+sg 8000000000000000 - 8000000000000000 - 1 = 0000000000000000 (cc=0) -+sg 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=3) -+sgf 0000000000000000 - 8000000000000000 - 1 = 0000000080000000 (cc=2) -+sgf 0000000000000001 - 8000000000000000 - 1 = 0000000080000001 (cc=2) -+sgf 000000000000FFFF - 8000000000000000 - 1 = 000000008000FFFF (cc=2) -+sgf 0000000000007FFF - 8000000000000000 - 1 = 0000000080007FFF (cc=2) -+sgf 0000000000008000 - 8000000000000000 - 1 = 0000000080008000 (cc=2) -+sgf 00000000FFFFFFFF - 8000000000000000 - 1 = 000000017FFFFFFF (cc=2) -+sgf 0000000080000000 - 8000000000000000 - 1 = 0000000100000000 (cc=2) -+sgf 000000007FFFFFFF - 8000000000000000 - 1 = 00000000FFFFFFFF (cc=2) -+sgf FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = 000000007FFFFFFF (cc=2) -+sgf 8000000000000000 - 8000000000000000 - 1 = 8000000080000000 (cc=1) -+sgf 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 800000007FFFFFFF (cc=3) -+sl 0000000000000000 - 8000000000000000 - 1 = 0000000080000000 (cc=1) -+sl 0000000000000001 - 8000000000000000 - 1 = 0000000080000001 (cc=1) -+sl 000000000000FFFF - 8000000000000000 - 1 = 000000008000FFFF (cc=1) -+sl 0000000000007FFF - 8000000000000000 - 1 = 0000000080007FFF (cc=1) -+sl 0000000000008000 - 8000000000000000 - 1 = 0000000080008000 (cc=1) -+sl 00000000FFFFFFFF - 8000000000000000 - 1 = 000000007FFFFFFF (cc=3) -+sl 0000000080000000 - 8000000000000000 - 1 = 0000000000000000 (cc=2) -+sl 000000007FFFFFFF - 8000000000000000 - 1 = 00000000FFFFFFFF (cc=1) -+sl FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFF7FFFFFFF (cc=3) -+sl 8000000000000000 - 8000000000000000 - 1 = 8000000080000000 (cc=1) -+sl 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFF7FFFFFFF (cc=3) -+slg 0000000000000000 - 8000000000000000 - 1 = 8000000000000000 (cc=1) -+slg 0000000000000001 - 8000000000000000 - 1 = 8000000000000001 (cc=1) -+slg 000000000000FFFF - 8000000000000000 - 1 = 800000000000FFFF (cc=1) -+slg 0000000000007FFF - 8000000000000000 - 1 = 8000000000007FFF (cc=1) -+slg 0000000000008000 - 8000000000000000 - 1 = 8000000000008000 (cc=1) -+slg 00000000FFFFFFFF - 8000000000000000 - 1 = 80000000FFFFFFFF (cc=1) -+slg 0000000080000000 - 8000000000000000 - 1 = 8000000080000000 (cc=1) -+slg 000000007FFFFFFF - 8000000000000000 - 1 = 800000007FFFFFFF (cc=1) -+slg FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slg 8000000000000000 - 8000000000000000 - 1 = 0000000000000000 (cc=2) -+slg 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sgf 0000000000000000 - 8000000000000000 - 1 = 0000000080000000 (cc=2) -+sgf 0000000000000001 - 8000000000000000 - 1 = 0000000080000001 (cc=2) -+sgf 000000000000FFFF - 8000000000000000 - 1 = 000000008000FFFF (cc=2) -+sgf 0000000000007FFF - 8000000000000000 - 1 = 0000000080007FFF (cc=2) -+sgf 0000000000008000 - 8000000000000000 - 1 = 0000000080008000 (cc=2) -+sgf 00000000FFFFFFFF - 8000000000000000 - 1 = 000000017FFFFFFF (cc=2) -+sgf 0000000080000000 - 8000000000000000 - 1 = 0000000100000000 (cc=2) -+sgf 000000007FFFFFFF - 8000000000000000 - 1 = 00000000FFFFFFFF (cc=2) -+sgf FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = 000000007FFFFFFF (cc=2) -+sgf 8000000000000000 - 8000000000000000 - 1 = 8000000080000000 (cc=1) -+sgf 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 800000007FFFFFFF (cc=3) -+slgf 0000000000000000 - 8000000000000000 - 1 = FFFFFFFF80000000 (cc=1) -+slgf 0000000000000001 - 8000000000000000 - 1 = FFFFFFFF80000001 (cc=1) -+slgf 000000000000FFFF - 8000000000000000 - 1 = FFFFFFFF8000FFFF (cc=1) -+slgf 0000000000007FFF - 8000000000000000 - 1 = FFFFFFFF80007FFF (cc=1) -+slgf 0000000000008000 - 8000000000000000 - 1 = FFFFFFFF80008000 (cc=1) -+slgf 00000000FFFFFFFF - 8000000000000000 - 1 = 000000007FFFFFFF (cc=3) -+slgf 0000000080000000 - 8000000000000000 - 1 = 0000000000000000 (cc=2) -+slgf 000000007FFFFFFF - 8000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slgf FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFF7FFFFFFF (cc=3) -+slgf 8000000000000000 - 8000000000000000 - 1 = 7FFFFFFF80000000 (cc=3) -+slgf 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFF7FFFFFFF (cc=3) -+sr 0000000000000000 - 8000000000000000 - 1 = 0000000000000000 (cc=0) -+sr 0000000000000001 - 8000000000000000 - 1 = 0000000000000001 (cc=2) -+sr 000000000000FFFF - 8000000000000000 - 1 = 000000000000FFFF (cc=2) -+sr 0000000000007FFF - 8000000000000000 - 1 = 0000000000007FFF (cc=2) -+sr 0000000000008000 - 8000000000000000 - 1 = 0000000000008000 (cc=2) -+sr 00000000FFFFFFFF - 8000000000000000 - 1 = 00000000FFFFFFFF (cc=1) -+sr 0000000080000000 - 8000000000000000 - 1 = 0000000080000000 (cc=1) -+sr 000000007FFFFFFF - 8000000000000000 - 1 = 000000007FFFFFFF (cc=2) -+sr FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sr 8000000000000000 - 8000000000000000 - 1 = 8000000000000000 (cc=0) -+sr 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sgr 0000000000000000 - 8000000000000000 - 1 = 8000000000000000 (cc=3) -+sgr 0000000000000001 - 8000000000000000 - 1 = 8000000000000001 (cc=3) -+sgr 000000000000FFFF - 8000000000000000 - 1 = 800000000000FFFF (cc=3) -+sgr 0000000000007FFF - 8000000000000000 - 1 = 8000000000007FFF (cc=3) -+sgr 0000000000008000 - 8000000000000000 - 1 = 8000000000008000 (cc=3) -+sgr 00000000FFFFFFFF - 8000000000000000 - 1 = 80000000FFFFFFFF (cc=3) -+sgr 0000000080000000 - 8000000000000000 - 1 = 8000000080000000 (cc=3) -+sgr 000000007FFFFFFF - 8000000000000000 - 1 = 800000007FFFFFFF (cc=3) -+sgr FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=2) -+sgr 8000000000000000 - 8000000000000000 - 1 = 0000000000000000 (cc=0) -+sgr 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=3) -+sgfr 0000000000000000 - 8000000000000000 - 1 = 0000000000000000 (cc=0) -+sgfr 0000000000000001 - 8000000000000000 - 1 = 0000000000000001 (cc=2) -+sgfr 000000000000FFFF - 8000000000000000 - 1 = 000000000000FFFF (cc=2) -+sgfr 0000000000007FFF - 8000000000000000 - 1 = 0000000000007FFF (cc=2) -+sgfr 0000000000008000 - 8000000000000000 - 1 = 0000000000008000 (cc=2) -+sgfr 00000000FFFFFFFF - 8000000000000000 - 1 = 00000000FFFFFFFF (cc=2) -+sgfr 0000000080000000 - 8000000000000000 - 1 = 0000000080000000 (cc=2) -+sgfr 000000007FFFFFFF - 8000000000000000 - 1 = 000000007FFFFFFF (cc=2) -+sgfr FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sgfr 8000000000000000 - 8000000000000000 - 1 = 8000000000000000 (cc=1) -+sgfr 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=2) -+slr 0000000000000000 - 8000000000000000 - 1 = 0000000000000000 (cc=2) -+slr 0000000000000001 - 8000000000000000 - 1 = 0000000000000001 (cc=3) -+slr 000000000000FFFF - 8000000000000000 - 1 = 000000000000FFFF (cc=3) -+slr 0000000000007FFF - 8000000000000000 - 1 = 0000000000007FFF (cc=3) -+slr 0000000000008000 - 8000000000000000 - 1 = 0000000000008000 (cc=3) -+slr 00000000FFFFFFFF - 8000000000000000 - 1 = 00000000FFFFFFFF (cc=3) -+slr 0000000080000000 - 8000000000000000 - 1 = 0000000080000000 (cc=3) -+slr 000000007FFFFFFF - 8000000000000000 - 1 = 000000007FFFFFFF (cc=3) -+slr FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=3) -+slr 8000000000000000 - 8000000000000000 - 1 = 8000000000000000 (cc=2) -+slr 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slgr 0000000000000000 - 8000000000000000 - 1 = 8000000000000000 (cc=1) -+slgr 0000000000000001 - 8000000000000000 - 1 = 8000000000000001 (cc=1) -+slgr 000000000000FFFF - 8000000000000000 - 1 = 800000000000FFFF (cc=1) -+slgr 0000000000007FFF - 8000000000000000 - 1 = 8000000000007FFF (cc=1) -+slgr 0000000000008000 - 8000000000000000 - 1 = 8000000000008000 (cc=1) -+slgr 00000000FFFFFFFF - 8000000000000000 - 1 = 80000000FFFFFFFF (cc=1) -+slgr 0000000080000000 - 8000000000000000 - 1 = 8000000080000000 (cc=1) -+slgr 000000007FFFFFFF - 8000000000000000 - 1 = 800000007FFFFFFF (cc=1) -+slgr FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slgr 8000000000000000 - 8000000000000000 - 1 = 0000000000000000 (cc=2) -+slgr 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slgfr 0000000000000000 - 8000000000000000 - 1 = 0000000000000000 (cc=2) -+slgfr 0000000000000001 - 8000000000000000 - 1 = 0000000000000001 (cc=3) -+slgfr 000000000000FFFF - 8000000000000000 - 1 = 000000000000FFFF (cc=3) -+slgfr 0000000000007FFF - 8000000000000000 - 1 = 0000000000007FFF (cc=3) -+slgfr 0000000000008000 - 8000000000000000 - 1 = 0000000000008000 (cc=3) -+slgfr 00000000FFFFFFFF - 8000000000000000 - 1 = 00000000FFFFFFFF (cc=3) -+slgfr 0000000080000000 - 8000000000000000 - 1 = 0000000080000000 (cc=3) -+slgfr 000000007FFFFFFF - 8000000000000000 - 1 = 000000007FFFFFFF (cc=3) -+slgfr FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=3) -+slgfr 8000000000000000 - 8000000000000000 - 1 = 8000000000000000 (cc=3) -+slgfr 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slb 0000000000000000 - 8000000000000000 - 1 = 000000007FFFFFFF (cc=1) -+slb 0000000000000001 - 8000000000000000 - 1 = 0000000080000000 (cc=1) -+slb 000000000000FFFF - 8000000000000000 - 1 = 000000008000FFFE (cc=1) -+slb 0000000000007FFF - 8000000000000000 - 1 = 0000000080007FFE (cc=1) -+slb 0000000000008000 - 8000000000000000 - 1 = 0000000080007FFF (cc=1) -+slb 00000000FFFFFFFF - 8000000000000000 - 1 = 000000007FFFFFFE (cc=3) -+slb 0000000080000000 - 8000000000000000 - 1 = 00000000FFFFFFFF (cc=1) -+slb 000000007FFFFFFF - 8000000000000000 - 1 = 00000000FFFFFFFE (cc=1) -+slb FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFF7FFFFFFE (cc=3) -+slb 8000000000000000 - 8000000000000000 - 1 = 800000007FFFFFFF (cc=1) -+slb 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFF7FFFFFFE (cc=3) -+slbg 0000000000000000 - 8000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+slbg 0000000000000001 - 8000000000000000 - 1 = 8000000000000000 (cc=1) -+slbg 000000000000FFFF - 8000000000000000 - 1 = 800000000000FFFE (cc=1) -+slbg 0000000000007FFF - 8000000000000000 - 1 = 8000000000007FFE (cc=1) -+slbg 0000000000008000 - 8000000000000000 - 1 = 8000000000007FFF (cc=1) -+slbg 00000000FFFFFFFF - 8000000000000000 - 1 = 80000000FFFFFFFE (cc=1) -+slbg 0000000080000000 - 8000000000000000 - 1 = 800000007FFFFFFF (cc=1) -+slbg 000000007FFFFFFF - 8000000000000000 - 1 = 800000007FFFFFFE (cc=1) -+slbg FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFFFFFFFFFE (cc=3) -+slbg 8000000000000000 - 8000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slbg 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFFFFFFFFFE (cc=1) -+slbr 0000000000000000 - 8000000000000000 - 1 = 00000000FFFFFFFF (cc=1) -+slbr 0000000000000001 - 8000000000000000 - 1 = 0000000000000000 (cc=2) -+slbr 000000000000FFFF - 8000000000000000 - 1 = 000000000000FFFE (cc=3) -+slbr 0000000000007FFF - 8000000000000000 - 1 = 0000000000007FFE (cc=3) -+slbr 0000000000008000 - 8000000000000000 - 1 = 0000000000007FFF (cc=3) -+slbr 00000000FFFFFFFF - 8000000000000000 - 1 = 00000000FFFFFFFE (cc=3) -+slbr 0000000080000000 - 8000000000000000 - 1 = 000000007FFFFFFF (cc=3) -+slbr 000000007FFFFFFF - 8000000000000000 - 1 = 000000007FFFFFFE (cc=3) -+slbr FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFFFFFFFFFE (cc=3) -+slbr 8000000000000000 - 8000000000000000 - 1 = 80000000FFFFFFFF (cc=1) -+slbr 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFFFFFFFFFE (cc=3) -+slbgr 0000000000000000 - 8000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+slbgr 0000000000000001 - 8000000000000000 - 1 = 8000000000000000 (cc=1) -+slbgr 000000000000FFFF - 8000000000000000 - 1 = 800000000000FFFE (cc=1) -+slbgr 0000000000007FFF - 8000000000000000 - 1 = 8000000000007FFE (cc=1) -+slbgr 0000000000008000 - 8000000000000000 - 1 = 8000000000007FFF (cc=1) -+slbgr 00000000FFFFFFFF - 8000000000000000 - 1 = 80000000FFFFFFFE (cc=1) -+slbgr 0000000080000000 - 8000000000000000 - 1 = 800000007FFFFFFF (cc=1) -+slbgr 000000007FFFFFFF - 8000000000000000 - 1 = 800000007FFFFFFE (cc=1) -+slbgr FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFFFFFFFFFE (cc=3) -+slbgr 8000000000000000 - 8000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slbgr 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFFFFFFFFFE (cc=1) -+slb 0000000000000000 - 8000000000000000 - 0 = 0000000080000000 (cc=1) -+slb 0000000000000001 - 8000000000000000 - 0 = 0000000080000001 (cc=1) -+slb 000000000000FFFF - 8000000000000000 - 0 = 000000008000FFFF (cc=1) -+slb 0000000000007FFF - 8000000000000000 - 0 = 0000000080007FFF (cc=1) -+slb 0000000000008000 - 8000000000000000 - 0 = 0000000080008000 (cc=1) -+slb 00000000FFFFFFFF - 8000000000000000 - 0 = 000000007FFFFFFF (cc=3) -+slb 0000000080000000 - 8000000000000000 - 0 = 0000000000000000 (cc=2) -+slb 000000007FFFFFFF - 8000000000000000 - 0 = 00000000FFFFFFFF (cc=1) -+slb FFFFFFFFFFFFFFFF - 8000000000000000 - 0 = FFFFFFFF7FFFFFFF (cc=3) -+slb 8000000000000000 - 8000000000000000 - 0 = 8000000080000000 (cc=1) -+slb 7FFFFFFFFFFFFFFF - 8000000000000000 - 0 = 7FFFFFFF7FFFFFFF (cc=3) -+slbg 0000000000000000 - 8000000000000000 - 0 = 8000000000000000 (cc=1) -+slbg 0000000000000001 - 8000000000000000 - 0 = 8000000000000001 (cc=1) -+slbg 000000000000FFFF - 8000000000000000 - 0 = 800000000000FFFF (cc=1) -+slbg 0000000000007FFF - 8000000000000000 - 0 = 8000000000007FFF (cc=1) -+slbg 0000000000008000 - 8000000000000000 - 0 = 8000000000008000 (cc=1) -+slbg 00000000FFFFFFFF - 8000000000000000 - 0 = 80000000FFFFFFFF (cc=1) -+slbg 0000000080000000 - 8000000000000000 - 0 = 8000000080000000 (cc=1) -+slbg 000000007FFFFFFF - 8000000000000000 - 0 = 800000007FFFFFFF (cc=1) -+slbg FFFFFFFFFFFFFFFF - 8000000000000000 - 0 = 7FFFFFFFFFFFFFFF (cc=3) -+slbg 8000000000000000 - 8000000000000000 - 0 = 0000000000000000 (cc=2) -+slbg 7FFFFFFFFFFFFFFF - 8000000000000000 - 0 = FFFFFFFFFFFFFFFF (cc=1) -+slbr 0000000000000000 - 8000000000000000 - 0 = 0000000000000000 (cc=2) -+slbr 0000000000000001 - 8000000000000000 - 0 = 0000000000000001 (cc=3) -+slbr 000000000000FFFF - 8000000000000000 - 0 = 000000000000FFFF (cc=3) -+slbr 0000000000007FFF - 8000000000000000 - 0 = 0000000000007FFF (cc=3) -+slbr 0000000000008000 - 8000000000000000 - 0 = 0000000000008000 (cc=3) -+slbr 00000000FFFFFFFF - 8000000000000000 - 0 = 00000000FFFFFFFF (cc=3) -+slbr 0000000080000000 - 8000000000000000 - 0 = 0000000080000000 (cc=3) -+slbr 000000007FFFFFFF - 8000000000000000 - 0 = 000000007FFFFFFF (cc=3) -+slbr FFFFFFFFFFFFFFFF - 8000000000000000 - 0 = FFFFFFFFFFFFFFFF (cc=3) -+slbr 8000000000000000 - 8000000000000000 - 0 = 8000000000000000 (cc=2) -+slbr 7FFFFFFFFFFFFFFF - 8000000000000000 - 0 = 7FFFFFFFFFFFFFFF (cc=3) -+slbgr 0000000000000000 - 8000000000000000 - 0 = 8000000000000000 (cc=1) -+slbgr 0000000000000001 - 8000000000000000 - 0 = 8000000000000001 (cc=1) -+slbgr 000000000000FFFF - 8000000000000000 - 0 = 800000000000FFFF (cc=1) -+slbgr 0000000000007FFF - 8000000000000000 - 0 = 8000000000007FFF (cc=1) -+slbgr 0000000000008000 - 8000000000000000 - 0 = 8000000000008000 (cc=1) -+slbgr 00000000FFFFFFFF - 8000000000000000 - 0 = 80000000FFFFFFFF (cc=1) -+slbgr 0000000080000000 - 8000000000000000 - 0 = 8000000080000000 (cc=1) -+slbgr 000000007FFFFFFF - 8000000000000000 - 0 = 800000007FFFFFFF (cc=1) -+slbgr FFFFFFFFFFFFFFFF - 8000000000000000 - 0 = 7FFFFFFFFFFFFFFF (cc=3) -+slbgr 8000000000000000 - 8000000000000000 - 0 = 0000000000000000 (cc=2) -+slbgr 7FFFFFFFFFFFFFFF - 8000000000000000 - 0 = FFFFFFFFFFFFFFFF (cc=1) -+shy 0000000000000000 - 8000000000000000 - 1 = 0000000000008000 (cc=2) -+shy 0000000000000001 - 8000000000000000 - 1 = 0000000000008001 (cc=2) -+shy 000000000000FFFF - 8000000000000000 - 1 = 0000000000017FFF (cc=2) -+shy 0000000000007FFF - 8000000000000000 - 1 = 000000000000FFFF (cc=2) -+shy 0000000000008000 - 8000000000000000 - 1 = 0000000000010000 (cc=2) -+shy 00000000FFFFFFFF - 8000000000000000 - 1 = 0000000000007FFF (cc=2) -+shy 0000000080000000 - 8000000000000000 - 1 = 0000000080008000 (cc=1) -+shy 000000007FFFFFFF - 8000000000000000 - 1 = 0000000080007FFF (cc=3) -+shy FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFF00007FFF (cc=2) -+shy 8000000000000000 - 8000000000000000 - 1 = 8000000000008000 (cc=2) -+shy 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFF00007FFF (cc=2) -+sly 0000000000000000 - 8000000000000000 - 1 = 0000000080000000 (cc=1) -+sly 0000000000000001 - 8000000000000000 - 1 = 0000000080000001 (cc=1) -+sly 000000000000FFFF - 8000000000000000 - 1 = 000000008000FFFF (cc=1) -+sly 0000000000007FFF - 8000000000000000 - 1 = 0000000080007FFF (cc=1) -+sly 0000000000008000 - 8000000000000000 - 1 = 0000000080008000 (cc=1) -+sly 00000000FFFFFFFF - 8000000000000000 - 1 = 000000007FFFFFFF (cc=3) -+sly 0000000080000000 - 8000000000000000 - 1 = 0000000000000000 (cc=2) -+sly 000000007FFFFFFF - 8000000000000000 - 1 = 00000000FFFFFFFF (cc=1) -+sly FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFF7FFFFFFF (cc=3) -+sly 8000000000000000 - 8000000000000000 - 1 = 8000000080000000 (cc=1) -+sly 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFF7FFFFFFF (cc=3) -+sy 0000000000000000 - 8000000000000000 - 1 = 0000000080000000 (cc=3) -+sy 0000000000000001 - 8000000000000000 - 1 = 0000000080000001 (cc=3) -+sy 000000000000FFFF - 8000000000000000 - 1 = 000000008000FFFF (cc=3) -+sy 0000000000007FFF - 8000000000000000 - 1 = 0000000080007FFF (cc=3) -+sy 0000000000008000 - 8000000000000000 - 1 = 0000000080008000 (cc=3) -+sy 00000000FFFFFFFF - 8000000000000000 - 1 = 000000007FFFFFFF (cc=2) -+sy 0000000080000000 - 8000000000000000 - 1 = 0000000000000000 (cc=0) -+sy 000000007FFFFFFF - 8000000000000000 - 1 = 00000000FFFFFFFF (cc=3) -+sy FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFF7FFFFFFF (cc=2) -+sy 8000000000000000 - 8000000000000000 - 1 = 8000000080000000 (cc=3) -+sy 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFF7FFFFFFF (cc=2) -+s 0000000000000000 - FFFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=2) -+s 0000000000000001 - FFFFFFFFFFFFFFFF - 1 = 0000000000000002 (cc=2) -+s 000000000000FFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000010000 (cc=2) -+s 0000000000007FFF - FFFFFFFFFFFFFFFF - 1 = 0000000000008000 (cc=2) -+s 0000000000008000 - FFFFFFFFFFFFFFFF - 1 = 0000000000008001 (cc=2) -+s 00000000FFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=0) -+s 0000000080000000 - FFFFFFFFFFFFFFFF - 1 = 0000000080000001 (cc=1) -+s 000000007FFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=3) -+s FFFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = FFFFFFFF00000000 (cc=0) -+s 8000000000000000 - FFFFFFFFFFFFFFFF - 1 = 8000000000000001 (cc=2) -+s 7FFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 7FFFFFFF00000000 (cc=0) -+sh 0000000000000000 - FFFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=2) -+sh 0000000000000001 - FFFFFFFFFFFFFFFF - 1 = 0000000000000002 (cc=2) -+sh 000000000000FFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000010000 (cc=2) -+sh 0000000000007FFF - FFFFFFFFFFFFFFFF - 1 = 0000000000008000 (cc=2) -+sh 0000000000008000 - FFFFFFFFFFFFFFFF - 1 = 0000000000008001 (cc=2) -+sh 00000000FFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=0) -+sh 0000000080000000 - FFFFFFFFFFFFFFFF - 1 = 0000000080000001 (cc=1) -+sh 000000007FFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=3) -+sh FFFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = FFFFFFFF00000000 (cc=0) -+sh 8000000000000000 - FFFFFFFFFFFFFFFF - 1 = 8000000000000001 (cc=2) -+sh 7FFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 7FFFFFFF00000000 (cc=0) -+sg 0000000000000000 - FFFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=2) -+sg 0000000000000001 - FFFFFFFFFFFFFFFF - 1 = 0000000000000002 (cc=2) -+sg 000000000000FFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000010000 (cc=2) -+sg 0000000000007FFF - FFFFFFFFFFFFFFFF - 1 = 0000000000008000 (cc=2) -+sg 0000000000008000 - FFFFFFFFFFFFFFFF - 1 = 0000000000008001 (cc=2) -+sg 00000000FFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000100000000 (cc=2) -+sg 0000000080000000 - FFFFFFFFFFFFFFFF - 1 = 0000000080000001 (cc=2) -+sg 000000007FFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=2) -+sg FFFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=0) -+sg 8000000000000000 - FFFFFFFFFFFFFFFF - 1 = 8000000000000001 (cc=1) -+sg 7FFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 8000000000000000 (cc=3) -+sgf 0000000000000000 - FFFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=2) -+sgf 0000000000000001 - FFFFFFFFFFFFFFFF - 1 = 0000000000000002 (cc=2) -+sgf 000000000000FFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000010000 (cc=2) -+sgf 0000000000007FFF - FFFFFFFFFFFFFFFF - 1 = 0000000000008000 (cc=2) -+sgf 0000000000008000 - FFFFFFFFFFFFFFFF - 1 = 0000000000008001 (cc=2) -+sgf 00000000FFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000100000000 (cc=2) -+sgf 0000000080000000 - FFFFFFFFFFFFFFFF - 1 = 0000000080000001 (cc=2) -+sgf 000000007FFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=2) -+sgf FFFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=0) -+sgf 8000000000000000 - FFFFFFFFFFFFFFFF - 1 = 8000000000000001 (cc=1) -+sgf 7FFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 8000000000000000 (cc=3) -+sl 0000000000000000 - FFFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=1) -+sl 0000000000000001 - FFFFFFFFFFFFFFFF - 1 = 0000000000000002 (cc=1) -+sl 000000000000FFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000010000 (cc=1) -+sl 0000000000007FFF - FFFFFFFFFFFFFFFF - 1 = 0000000000008000 (cc=1) -+sl 0000000000008000 - FFFFFFFFFFFFFFFF - 1 = 0000000000008001 (cc=1) -+sl 00000000FFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=2) -+sl 0000000080000000 - FFFFFFFFFFFFFFFF - 1 = 0000000080000001 (cc=1) -+sl 000000007FFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=1) -+sl FFFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = FFFFFFFF00000000 (cc=2) -+sl 8000000000000000 - FFFFFFFFFFFFFFFF - 1 = 8000000000000001 (cc=1) -+sl 7FFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 7FFFFFFF00000000 (cc=2) -+slg 0000000000000000 - FFFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=1) -+slg 0000000000000001 - FFFFFFFFFFFFFFFF - 1 = 0000000000000002 (cc=1) -+slg 000000000000FFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000010000 (cc=1) -+slg 0000000000007FFF - FFFFFFFFFFFFFFFF - 1 = 0000000000008000 (cc=1) -+slg 0000000000008000 - FFFFFFFFFFFFFFFF - 1 = 0000000000008001 (cc=1) -+slg 00000000FFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000100000000 (cc=1) -+slg 0000000080000000 - FFFFFFFFFFFFFFFF - 1 = 0000000080000001 (cc=1) -+slg 000000007FFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=1) -+slg FFFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=2) -+slg 8000000000000000 - FFFFFFFFFFFFFFFF - 1 = 8000000000000001 (cc=1) -+slg 7FFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 8000000000000000 (cc=1) -+sgf 0000000000000000 - FFFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=2) -+sgf 0000000000000001 - FFFFFFFFFFFFFFFF - 1 = 0000000000000002 (cc=2) -+sgf 000000000000FFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000010000 (cc=2) -+sgf 0000000000007FFF - FFFFFFFFFFFFFFFF - 1 = 0000000000008000 (cc=2) -+sgf 0000000000008000 - FFFFFFFFFFFFFFFF - 1 = 0000000000008001 (cc=2) -+sgf 00000000FFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000100000000 (cc=2) -+sgf 0000000080000000 - FFFFFFFFFFFFFFFF - 1 = 0000000080000001 (cc=2) -+sgf 000000007FFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=2) -+sgf FFFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=0) -+sgf 8000000000000000 - FFFFFFFFFFFFFFFF - 1 = 8000000000000001 (cc=1) -+sgf 7FFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 8000000000000000 (cc=3) -+slgf 0000000000000000 - FFFFFFFFFFFFFFFF - 1 = FFFFFFFF00000001 (cc=1) -+slgf 0000000000000001 - FFFFFFFFFFFFFFFF - 1 = FFFFFFFF00000002 (cc=1) -+slgf 000000000000FFFF - FFFFFFFFFFFFFFFF - 1 = FFFFFFFF00010000 (cc=1) -+slgf 0000000000007FFF - FFFFFFFFFFFFFFFF - 1 = FFFFFFFF00008000 (cc=1) -+slgf 0000000000008000 - FFFFFFFFFFFFFFFF - 1 = FFFFFFFF00008001 (cc=1) -+slgf 00000000FFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=2) -+slgf 0000000080000000 - FFFFFFFFFFFFFFFF - 1 = FFFFFFFF80000001 (cc=1) -+slgf 000000007FFFFFFF - FFFFFFFFFFFFFFFF - 1 = FFFFFFFF80000000 (cc=1) -+slgf FFFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = FFFFFFFF00000000 (cc=3) -+slgf 8000000000000000 - FFFFFFFFFFFFFFFF - 1 = 7FFFFFFF00000001 (cc=3) -+slgf 7FFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 7FFFFFFF00000000 (cc=3) -+sr 0000000000000000 - FFFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=2) -+sr 0000000000000001 - FFFFFFFFFFFFFFFF - 1 = 0000000000000002 (cc=2) -+sr 000000000000FFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000010000 (cc=2) -+sr 0000000000007FFF - FFFFFFFFFFFFFFFF - 1 = 0000000000008000 (cc=2) -+sr 0000000000008000 - FFFFFFFFFFFFFFFF - 1 = 0000000000008001 (cc=2) -+sr 00000000FFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=0) -+sr 0000000080000000 - FFFFFFFFFFFFFFFF - 1 = 0000000080000001 (cc=1) -+sr 000000007FFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=3) -+sr FFFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = FFFFFFFF00000000 (cc=0) -+sr 8000000000000000 - FFFFFFFFFFFFFFFF - 1 = 8000000000000001 (cc=2) -+sr 7FFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 7FFFFFFF00000000 (cc=0) -+sgr 0000000000000000 - FFFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=2) -+sgr 0000000000000001 - FFFFFFFFFFFFFFFF - 1 = 0000000000000002 (cc=2) -+sgr 000000000000FFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000010000 (cc=2) -+sgr 0000000000007FFF - FFFFFFFFFFFFFFFF - 1 = 0000000000008000 (cc=2) -+sgr 0000000000008000 - FFFFFFFFFFFFFFFF - 1 = 0000000000008001 (cc=2) -+sgr 00000000FFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000100000000 (cc=2) -+sgr 0000000080000000 - FFFFFFFFFFFFFFFF - 1 = 0000000080000001 (cc=2) -+sgr 000000007FFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=2) -+sgr FFFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=0) -+sgr 8000000000000000 - FFFFFFFFFFFFFFFF - 1 = 8000000000000001 (cc=1) -+sgr 7FFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 8000000000000000 (cc=3) -+sgfr 0000000000000000 - FFFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=2) -+sgfr 0000000000000001 - FFFFFFFFFFFFFFFF - 1 = 0000000000000002 (cc=2) -+sgfr 000000000000FFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000010000 (cc=2) -+sgfr 0000000000007FFF - FFFFFFFFFFFFFFFF - 1 = 0000000000008000 (cc=2) -+sgfr 0000000000008000 - FFFFFFFFFFFFFFFF - 1 = 0000000000008001 (cc=2) -+sgfr 00000000FFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000100000000 (cc=2) -+sgfr 0000000080000000 - FFFFFFFFFFFFFFFF - 1 = 0000000080000001 (cc=2) -+sgfr 000000007FFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=2) -+sgfr FFFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=0) -+sgfr 8000000000000000 - FFFFFFFFFFFFFFFF - 1 = 8000000000000001 (cc=1) -+sgfr 7FFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 8000000000000000 (cc=3) -+slr 0000000000000000 - FFFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=1) -+slr 0000000000000001 - FFFFFFFFFFFFFFFF - 1 = 0000000000000002 (cc=1) -+slr 000000000000FFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000010000 (cc=1) -+slr 0000000000007FFF - FFFFFFFFFFFFFFFF - 1 = 0000000000008000 (cc=1) -+slr 0000000000008000 - FFFFFFFFFFFFFFFF - 1 = 0000000000008001 (cc=1) -+slr 00000000FFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=2) -+slr 0000000080000000 - FFFFFFFFFFFFFFFF - 1 = 0000000080000001 (cc=1) -+slr 000000007FFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=1) -+slr FFFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = FFFFFFFF00000000 (cc=2) -+slr 8000000000000000 - FFFFFFFFFFFFFFFF - 1 = 8000000000000001 (cc=1) -+slr 7FFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 7FFFFFFF00000000 (cc=2) -+slgr 0000000000000000 - FFFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=1) -+slgr 0000000000000001 - FFFFFFFFFFFFFFFF - 1 = 0000000000000002 (cc=1) -+slgr 000000000000FFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000010000 (cc=1) -+slgr 0000000000007FFF - FFFFFFFFFFFFFFFF - 1 = 0000000000008000 (cc=1) -+slgr 0000000000008000 - FFFFFFFFFFFFFFFF - 1 = 0000000000008001 (cc=1) -+slgr 00000000FFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000100000000 (cc=1) -+slgr 0000000080000000 - FFFFFFFFFFFFFFFF - 1 = 0000000080000001 (cc=1) -+slgr 000000007FFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=1) -+slgr FFFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=2) -+slgr 8000000000000000 - FFFFFFFFFFFFFFFF - 1 = 8000000000000001 (cc=1) -+slgr 7FFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 8000000000000000 (cc=1) -+slgfr 0000000000000000 - FFFFFFFFFFFFFFFF - 1 = FFFFFFFF00000001 (cc=1) -+slgfr 0000000000000001 - FFFFFFFFFFFFFFFF - 1 = FFFFFFFF00000002 (cc=1) -+slgfr 000000000000FFFF - FFFFFFFFFFFFFFFF - 1 = FFFFFFFF00010000 (cc=1) -+slgfr 0000000000007FFF - FFFFFFFFFFFFFFFF - 1 = FFFFFFFF00008000 (cc=1) -+slgfr 0000000000008000 - FFFFFFFFFFFFFFFF - 1 = FFFFFFFF00008001 (cc=1) -+slgfr 00000000FFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=2) -+slgfr 0000000080000000 - FFFFFFFFFFFFFFFF - 1 = FFFFFFFF80000001 (cc=1) -+slgfr 000000007FFFFFFF - FFFFFFFFFFFFFFFF - 1 = FFFFFFFF80000000 (cc=1) -+slgfr FFFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = FFFFFFFF00000000 (cc=3) -+slgfr 8000000000000000 - FFFFFFFFFFFFFFFF - 1 = 7FFFFFFF00000001 (cc=3) -+slgfr 7FFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 7FFFFFFF00000000 (cc=3) -+slb 0000000000000000 - FFFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=0) -+slb 0000000000000001 - FFFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=1) -+slb 000000000000FFFF - FFFFFFFFFFFFFFFF - 1 = 000000000000FFFF (cc=1) -+slb 0000000000007FFF - FFFFFFFFFFFFFFFF - 1 = 0000000000007FFF (cc=1) -+slb 0000000000008000 - FFFFFFFFFFFFFFFF - 1 = 0000000000008000 (cc=1) -+slb 00000000FFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 00000000FFFFFFFF (cc=1) -+slb 0000000080000000 - FFFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=1) -+slb 000000007FFFFFFF - FFFFFFFFFFFFFFFF - 1 = 000000007FFFFFFF (cc=1) -+slb FFFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slb 8000000000000000 - FFFFFFFFFFFFFFFF - 1 = 8000000000000000 (cc=0) -+slb 7FFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+slbg 0000000000000000 - FFFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=0) -+slbg 0000000000000001 - FFFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=1) -+slbg 000000000000FFFF - FFFFFFFFFFFFFFFF - 1 = 000000000000FFFF (cc=1) -+slbg 0000000000007FFF - FFFFFFFFFFFFFFFF - 1 = 0000000000007FFF (cc=1) -+slbg 0000000000008000 - FFFFFFFFFFFFFFFF - 1 = 0000000000008000 (cc=1) -+slbg 00000000FFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 00000000FFFFFFFF (cc=1) -+slbg 0000000080000000 - FFFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=1) -+slbg 000000007FFFFFFF - FFFFFFFFFFFFFFFF - 1 = 000000007FFFFFFF (cc=1) -+slbg FFFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slbg 8000000000000000 - FFFFFFFFFFFFFFFF - 1 = 8000000000000000 (cc=1) -+slbg 7FFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+slbr 0000000000000000 - FFFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=0) -+slbr 0000000000000001 - FFFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=1) -+slbr 000000000000FFFF - FFFFFFFFFFFFFFFF - 1 = 000000000000FFFF (cc=1) -+slbr 0000000000007FFF - FFFFFFFFFFFFFFFF - 1 = 0000000000007FFF (cc=1) -+slbr 0000000000008000 - FFFFFFFFFFFFFFFF - 1 = 0000000000008000 (cc=1) -+slbr 00000000FFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 00000000FFFFFFFF (cc=1) -+slbr 0000000080000000 - FFFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=1) -+slbr 000000007FFFFFFF - FFFFFFFFFFFFFFFF - 1 = 000000007FFFFFFF (cc=1) -+slbr FFFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slbr 8000000000000000 - FFFFFFFFFFFFFFFF - 1 = 8000000000000000 (cc=0) -+slbr 7FFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+slbgr 0000000000000000 - FFFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=0) -+slbgr 0000000000000001 - FFFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=1) -+slbgr 000000000000FFFF - FFFFFFFFFFFFFFFF - 1 = 000000000000FFFF (cc=1) -+slbgr 0000000000007FFF - FFFFFFFFFFFFFFFF - 1 = 0000000000007FFF (cc=1) -+slbgr 0000000000008000 - FFFFFFFFFFFFFFFF - 1 = 0000000000008000 (cc=1) -+slbgr 00000000FFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 00000000FFFFFFFF (cc=1) -+slbgr 0000000080000000 - FFFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=1) -+slbgr 000000007FFFFFFF - FFFFFFFFFFFFFFFF - 1 = 000000007FFFFFFF (cc=1) -+slbgr FFFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slbgr 8000000000000000 - FFFFFFFFFFFFFFFF - 1 = 8000000000000000 (cc=1) -+slbgr 7FFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+slb 0000000000000000 - FFFFFFFFFFFFFFFF - 0 = 0000000000000001 (cc=1) -+slb 0000000000000001 - FFFFFFFFFFFFFFFF - 0 = 0000000000000002 (cc=1) -+slb 000000000000FFFF - FFFFFFFFFFFFFFFF - 0 = 0000000000010000 (cc=1) -+slb 0000000000007FFF - FFFFFFFFFFFFFFFF - 0 = 0000000000008000 (cc=1) -+slb 0000000000008000 - FFFFFFFFFFFFFFFF - 0 = 0000000000008001 (cc=1) -+slb 00000000FFFFFFFF - FFFFFFFFFFFFFFFF - 0 = 0000000000000000 (cc=2) -+slb 0000000080000000 - FFFFFFFFFFFFFFFF - 0 = 0000000080000001 (cc=1) -+slb 000000007FFFFFFF - FFFFFFFFFFFFFFFF - 0 = 0000000080000000 (cc=1) -+slb FFFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 0 = FFFFFFFF00000000 (cc=2) -+slb 8000000000000000 - FFFFFFFFFFFFFFFF - 0 = 8000000000000001 (cc=1) -+slb 7FFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 0 = 7FFFFFFF00000000 (cc=2) -+slbg 0000000000000000 - FFFFFFFFFFFFFFFF - 0 = 0000000000000001 (cc=1) -+slbg 0000000000000001 - FFFFFFFFFFFFFFFF - 0 = 0000000000000002 (cc=1) -+slbg 000000000000FFFF - FFFFFFFFFFFFFFFF - 0 = 0000000000010000 (cc=1) -+slbg 0000000000007FFF - FFFFFFFFFFFFFFFF - 0 = 0000000000008000 (cc=1) -+slbg 0000000000008000 - FFFFFFFFFFFFFFFF - 0 = 0000000000008001 (cc=1) -+slbg 00000000FFFFFFFF - FFFFFFFFFFFFFFFF - 0 = 0000000100000000 (cc=1) -+slbg 0000000080000000 - FFFFFFFFFFFFFFFF - 0 = 0000000080000001 (cc=1) -+slbg 000000007FFFFFFF - FFFFFFFFFFFFFFFF - 0 = 0000000080000000 (cc=1) -+slbg FFFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 0 = 0000000000000000 (cc=2) -+slbg 8000000000000000 - FFFFFFFFFFFFFFFF - 0 = 8000000000000001 (cc=1) -+slbg 7FFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 0 = 8000000000000000 (cc=1) -+slbr 0000000000000000 - FFFFFFFFFFFFFFFF - 0 = 0000000000000001 (cc=1) -+slbr 0000000000000001 - FFFFFFFFFFFFFFFF - 0 = 0000000000000002 (cc=1) -+slbr 000000000000FFFF - FFFFFFFFFFFFFFFF - 0 = 0000000000010000 (cc=1) -+slbr 0000000000007FFF - FFFFFFFFFFFFFFFF - 0 = 0000000000008000 (cc=1) -+slbr 0000000000008000 - FFFFFFFFFFFFFFFF - 0 = 0000000000008001 (cc=1) -+slbr 00000000FFFFFFFF - FFFFFFFFFFFFFFFF - 0 = 0000000000000000 (cc=2) -+slbr 0000000080000000 - FFFFFFFFFFFFFFFF - 0 = 0000000080000001 (cc=1) -+slbr 000000007FFFFFFF - FFFFFFFFFFFFFFFF - 0 = 0000000080000000 (cc=1) -+slbr FFFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 0 = FFFFFFFF00000000 (cc=2) -+slbr 8000000000000000 - FFFFFFFFFFFFFFFF - 0 = 8000000000000001 (cc=1) -+slbr 7FFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 0 = 7FFFFFFF00000000 (cc=2) -+slbgr 0000000000000000 - FFFFFFFFFFFFFFFF - 0 = 0000000000000001 (cc=1) -+slbgr 0000000000000001 - FFFFFFFFFFFFFFFF - 0 = 0000000000000002 (cc=1) -+slbgr 000000000000FFFF - FFFFFFFFFFFFFFFF - 0 = 0000000000010000 (cc=1) -+slbgr 0000000000007FFF - FFFFFFFFFFFFFFFF - 0 = 0000000000008000 (cc=1) -+slbgr 0000000000008000 - FFFFFFFFFFFFFFFF - 0 = 0000000000008001 (cc=1) -+slbgr 00000000FFFFFFFF - FFFFFFFFFFFFFFFF - 0 = 0000000100000000 (cc=1) -+slbgr 0000000080000000 - FFFFFFFFFFFFFFFF - 0 = 0000000080000001 (cc=1) -+slbgr 000000007FFFFFFF - FFFFFFFFFFFFFFFF - 0 = 0000000080000000 (cc=1) -+slbgr FFFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 0 = 0000000000000000 (cc=2) -+slbgr 8000000000000000 - FFFFFFFFFFFFFFFF - 0 = 8000000000000001 (cc=1) -+slbgr 7FFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 0 = 8000000000000000 (cc=1) -+shy 0000000000000000 - FFFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=2) -+shy 0000000000000001 - FFFFFFFFFFFFFFFF - 1 = 0000000000000002 (cc=2) -+shy 000000000000FFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000010000 (cc=2) -+shy 0000000000007FFF - FFFFFFFFFFFFFFFF - 1 = 0000000000008000 (cc=2) -+shy 0000000000008000 - FFFFFFFFFFFFFFFF - 1 = 0000000000008001 (cc=2) -+shy 00000000FFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=0) -+shy 0000000080000000 - FFFFFFFFFFFFFFFF - 1 = 0000000080000001 (cc=1) -+shy 000000007FFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=3) -+shy FFFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = FFFFFFFF00000000 (cc=0) -+shy 8000000000000000 - FFFFFFFFFFFFFFFF - 1 = 8000000000000001 (cc=2) -+shy 7FFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 7FFFFFFF00000000 (cc=0) -+sly 0000000000000000 - FFFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=1) -+sly 0000000000000001 - FFFFFFFFFFFFFFFF - 1 = 0000000000000002 (cc=1) -+sly 000000000000FFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000010000 (cc=1) -+sly 0000000000007FFF - FFFFFFFFFFFFFFFF - 1 = 0000000000008000 (cc=1) -+sly 0000000000008000 - FFFFFFFFFFFFFFFF - 1 = 0000000000008001 (cc=1) -+sly 00000000FFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=2) -+sly 0000000080000000 - FFFFFFFFFFFFFFFF - 1 = 0000000080000001 (cc=1) -+sly 000000007FFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=1) -+sly FFFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = FFFFFFFF00000000 (cc=2) -+sly 8000000000000000 - FFFFFFFFFFFFFFFF - 1 = 8000000000000001 (cc=1) -+sly 7FFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 7FFFFFFF00000000 (cc=2) -+sy 0000000000000000 - FFFFFFFFFFFFFFFF - 1 = 0000000000000001 (cc=2) -+sy 0000000000000001 - FFFFFFFFFFFFFFFF - 1 = 0000000000000002 (cc=2) -+sy 000000000000FFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000010000 (cc=2) -+sy 0000000000007FFF - FFFFFFFFFFFFFFFF - 1 = 0000000000008000 (cc=2) -+sy 0000000000008000 - FFFFFFFFFFFFFFFF - 1 = 0000000000008001 (cc=2) -+sy 00000000FFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000000000000 (cc=0) -+sy 0000000080000000 - FFFFFFFFFFFFFFFF - 1 = 0000000080000001 (cc=1) -+sy 000000007FFFFFFF - FFFFFFFFFFFFFFFF - 1 = 0000000080000000 (cc=3) -+sy FFFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = FFFFFFFF00000000 (cc=0) -+sy 8000000000000000 - FFFFFFFFFFFFFFFF - 1 = 8000000000000001 (cc=2) -+sy 7FFFFFFFFFFFFFFF - FFFFFFFFFFFFFFFF - 1 = 7FFFFFFF00000000 (cc=0) -+s 0000000000000000 - 7FFFFFFF00000000 - 1 = 0000000080000001 (cc=1) -+s 0000000000000001 - 7FFFFFFF00000000 - 1 = 0000000080000002 (cc=1) -+s 000000000000FFFF - 7FFFFFFF00000000 - 1 = 0000000080010000 (cc=1) -+s 0000000000007FFF - 7FFFFFFF00000000 - 1 = 0000000080008000 (cc=1) -+s 0000000000008000 - 7FFFFFFF00000000 - 1 = 0000000080008001 (cc=1) -+s 00000000FFFFFFFF - 7FFFFFFF00000000 - 1 = 0000000080000000 (cc=1) -+s 0000000080000000 - 7FFFFFFF00000000 - 1 = 0000000000000001 (cc=3) -+s 000000007FFFFFFF - 7FFFFFFF00000000 - 1 = 0000000000000000 (cc=0) -+s FFFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = FFFFFFFF80000000 (cc=1) -+s 8000000000000000 - 7FFFFFFF00000000 - 1 = 8000000080000001 (cc=1) -+s 7FFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = 7FFFFFFF80000000 (cc=1) -+sh 0000000000000000 - 7FFFFFFF00000000 - 1 = 00000000FFFF8001 (cc=1) -+sh 0000000000000001 - 7FFFFFFF00000000 - 1 = 00000000FFFF8002 (cc=1) -+sh 000000000000FFFF - 7FFFFFFF00000000 - 1 = 0000000000008000 (cc=2) -+sh 0000000000007FFF - 7FFFFFFF00000000 - 1 = 0000000000000000 (cc=0) -+sh 0000000000008000 - 7FFFFFFF00000000 - 1 = 0000000000000001 (cc=2) -+sh 00000000FFFFFFFF - 7FFFFFFF00000000 - 1 = 00000000FFFF8000 (cc=1) -+sh 0000000080000000 - 7FFFFFFF00000000 - 1 = 000000007FFF8001 (cc=3) -+sh 000000007FFFFFFF - 7FFFFFFF00000000 - 1 = 000000007FFF8000 (cc=2) -+sh FFFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = FFFFFFFFFFFF8000 (cc=1) -+sh 8000000000000000 - 7FFFFFFF00000000 - 1 = 80000000FFFF8001 (cc=1) -+sh 7FFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = 7FFFFFFFFFFF8000 (cc=1) -+sg 0000000000000000 - 7FFFFFFF00000000 - 1 = 8000000100000000 (cc=1) -+sg 0000000000000001 - 7FFFFFFF00000000 - 1 = 8000000100000001 (cc=1) -+sg 000000000000FFFF - 7FFFFFFF00000000 - 1 = 800000010000FFFF (cc=1) -+sg 0000000000007FFF - 7FFFFFFF00000000 - 1 = 8000000100007FFF (cc=1) -+sg 0000000000008000 - 7FFFFFFF00000000 - 1 = 8000000100008000 (cc=1) -+sg 00000000FFFFFFFF - 7FFFFFFF00000000 - 1 = 80000001FFFFFFFF (cc=1) -+sg 0000000080000000 - 7FFFFFFF00000000 - 1 = 8000000180000000 (cc=1) -+sg 000000007FFFFFFF - 7FFFFFFF00000000 - 1 = 800000017FFFFFFF (cc=1) -+sg FFFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = 80000000FFFFFFFF (cc=1) -+sg 8000000000000000 - 7FFFFFFF00000000 - 1 = 0000000100000000 (cc=3) -+sg 7FFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = 00000000FFFFFFFF (cc=2) -+sgf 0000000000000000 - 7FFFFFFF00000000 - 1 = FFFFFFFF80000001 (cc=1) -+sgf 0000000000000001 - 7FFFFFFF00000000 - 1 = FFFFFFFF80000002 (cc=1) -+sgf 000000000000FFFF - 7FFFFFFF00000000 - 1 = FFFFFFFF80010000 (cc=1) -+sgf 0000000000007FFF - 7FFFFFFF00000000 - 1 = FFFFFFFF80008000 (cc=1) -+sgf 0000000000008000 - 7FFFFFFF00000000 - 1 = FFFFFFFF80008001 (cc=1) -+sgf 00000000FFFFFFFF - 7FFFFFFF00000000 - 1 = 0000000080000000 (cc=2) -+sgf 0000000080000000 - 7FFFFFFF00000000 - 1 = 0000000000000001 (cc=2) -+sgf 000000007FFFFFFF - 7FFFFFFF00000000 - 1 = 0000000000000000 (cc=0) -+sgf FFFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = FFFFFFFF80000000 (cc=1) -+sgf 8000000000000000 - 7FFFFFFF00000000 - 1 = 7FFFFFFF80000001 (cc=3) -+sgf 7FFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = 7FFFFFFF80000000 (cc=2) -+sl 0000000000000000 - 7FFFFFFF00000000 - 1 = 0000000080000001 (cc=1) -+sl 0000000000000001 - 7FFFFFFF00000000 - 1 = 0000000080000002 (cc=1) -+sl 000000000000FFFF - 7FFFFFFF00000000 - 1 = 0000000080010000 (cc=1) -+sl 0000000000007FFF - 7FFFFFFF00000000 - 1 = 0000000080008000 (cc=1) -+sl 0000000000008000 - 7FFFFFFF00000000 - 1 = 0000000080008001 (cc=1) -+sl 00000000FFFFFFFF - 7FFFFFFF00000000 - 1 = 0000000080000000 (cc=3) -+sl 0000000080000000 - 7FFFFFFF00000000 - 1 = 0000000000000001 (cc=3) -+sl 000000007FFFFFFF - 7FFFFFFF00000000 - 1 = 0000000000000000 (cc=2) -+sl FFFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = FFFFFFFF80000000 (cc=3) -+sl 8000000000000000 - 7FFFFFFF00000000 - 1 = 8000000080000001 (cc=1) -+sl 7FFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = 7FFFFFFF80000000 (cc=3) -+slg 0000000000000000 - 7FFFFFFF00000000 - 1 = 8000000100000000 (cc=1) -+slg 0000000000000001 - 7FFFFFFF00000000 - 1 = 8000000100000001 (cc=1) -+slg 000000000000FFFF - 7FFFFFFF00000000 - 1 = 800000010000FFFF (cc=1) -+slg 0000000000007FFF - 7FFFFFFF00000000 - 1 = 8000000100007FFF (cc=1) -+slg 0000000000008000 - 7FFFFFFF00000000 - 1 = 8000000100008000 (cc=1) -+slg 00000000FFFFFFFF - 7FFFFFFF00000000 - 1 = 80000001FFFFFFFF (cc=1) -+slg 0000000080000000 - 7FFFFFFF00000000 - 1 = 8000000180000000 (cc=1) -+slg 000000007FFFFFFF - 7FFFFFFF00000000 - 1 = 800000017FFFFFFF (cc=1) -+slg FFFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = 80000000FFFFFFFF (cc=3) -+slg 8000000000000000 - 7FFFFFFF00000000 - 1 = 0000000100000000 (cc=3) -+slg 7FFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = 00000000FFFFFFFF (cc=3) -+sgf 0000000000000000 - 7FFFFFFF00000000 - 1 = FFFFFFFF80000001 (cc=1) -+sgf 0000000000000001 - 7FFFFFFF00000000 - 1 = FFFFFFFF80000002 (cc=1) -+sgf 000000000000FFFF - 7FFFFFFF00000000 - 1 = FFFFFFFF80010000 (cc=1) -+sgf 0000000000007FFF - 7FFFFFFF00000000 - 1 = FFFFFFFF80008000 (cc=1) -+sgf 0000000000008000 - 7FFFFFFF00000000 - 1 = FFFFFFFF80008001 (cc=1) -+sgf 00000000FFFFFFFF - 7FFFFFFF00000000 - 1 = 0000000080000000 (cc=2) -+sgf 0000000080000000 - 7FFFFFFF00000000 - 1 = 0000000000000001 (cc=2) -+sgf 000000007FFFFFFF - 7FFFFFFF00000000 - 1 = 0000000000000000 (cc=0) -+sgf FFFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = FFFFFFFF80000000 (cc=1) -+sgf 8000000000000000 - 7FFFFFFF00000000 - 1 = 7FFFFFFF80000001 (cc=3) -+sgf 7FFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = 7FFFFFFF80000000 (cc=2) -+slgf 0000000000000000 - 7FFFFFFF00000000 - 1 = FFFFFFFF80000001 (cc=1) -+slgf 0000000000000001 - 7FFFFFFF00000000 - 1 = FFFFFFFF80000002 (cc=1) -+slgf 000000000000FFFF - 7FFFFFFF00000000 - 1 = FFFFFFFF80010000 (cc=1) -+slgf 0000000000007FFF - 7FFFFFFF00000000 - 1 = FFFFFFFF80008000 (cc=1) -+slgf 0000000000008000 - 7FFFFFFF00000000 - 1 = FFFFFFFF80008001 (cc=1) -+slgf 00000000FFFFFFFF - 7FFFFFFF00000000 - 1 = 0000000080000000 (cc=3) -+slgf 0000000080000000 - 7FFFFFFF00000000 - 1 = 0000000000000001 (cc=3) -+slgf 000000007FFFFFFF - 7FFFFFFF00000000 - 1 = 0000000000000000 (cc=2) -+slgf FFFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = FFFFFFFF80000000 (cc=3) -+slgf 8000000000000000 - 7FFFFFFF00000000 - 1 = 7FFFFFFF80000001 (cc=3) -+slgf 7FFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = 7FFFFFFF80000000 (cc=3) -+sr 0000000000000000 - 7FFFFFFF00000000 - 1 = 0000000000000000 (cc=0) -+sr 0000000000000001 - 7FFFFFFF00000000 - 1 = 0000000000000001 (cc=2) -+sr 000000000000FFFF - 7FFFFFFF00000000 - 1 = 000000000000FFFF (cc=2) -+sr 0000000000007FFF - 7FFFFFFF00000000 - 1 = 0000000000007FFF (cc=2) -+sr 0000000000008000 - 7FFFFFFF00000000 - 1 = 0000000000008000 (cc=2) -+sr 00000000FFFFFFFF - 7FFFFFFF00000000 - 1 = 00000000FFFFFFFF (cc=1) -+sr 0000000080000000 - 7FFFFFFF00000000 - 1 = 0000000080000000 (cc=1) -+sr 000000007FFFFFFF - 7FFFFFFF00000000 - 1 = 000000007FFFFFFF (cc=2) -+sr FFFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sr 8000000000000000 - 7FFFFFFF00000000 - 1 = 8000000000000000 (cc=0) -+sr 7FFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sgr 0000000000000000 - 7FFFFFFF00000000 - 1 = 8000000100000000 (cc=1) -+sgr 0000000000000001 - 7FFFFFFF00000000 - 1 = 8000000100000001 (cc=1) -+sgr 000000000000FFFF - 7FFFFFFF00000000 - 1 = 800000010000FFFF (cc=1) -+sgr 0000000000007FFF - 7FFFFFFF00000000 - 1 = 8000000100007FFF (cc=1) -+sgr 0000000000008000 - 7FFFFFFF00000000 - 1 = 8000000100008000 (cc=1) -+sgr 00000000FFFFFFFF - 7FFFFFFF00000000 - 1 = 80000001FFFFFFFF (cc=1) -+sgr 0000000080000000 - 7FFFFFFF00000000 - 1 = 8000000180000000 (cc=1) -+sgr 000000007FFFFFFF - 7FFFFFFF00000000 - 1 = 800000017FFFFFFF (cc=1) -+sgr FFFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = 80000000FFFFFFFF (cc=1) -+sgr 8000000000000000 - 7FFFFFFF00000000 - 1 = 0000000100000000 (cc=3) -+sgr 7FFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = 00000000FFFFFFFF (cc=2) -+sgfr 0000000000000000 - 7FFFFFFF00000000 - 1 = 0000000000000000 (cc=0) -+sgfr 0000000000000001 - 7FFFFFFF00000000 - 1 = 0000000000000001 (cc=2) -+sgfr 000000000000FFFF - 7FFFFFFF00000000 - 1 = 000000000000FFFF (cc=2) -+sgfr 0000000000007FFF - 7FFFFFFF00000000 - 1 = 0000000000007FFF (cc=2) -+sgfr 0000000000008000 - 7FFFFFFF00000000 - 1 = 0000000000008000 (cc=2) -+sgfr 00000000FFFFFFFF - 7FFFFFFF00000000 - 1 = 00000000FFFFFFFF (cc=2) -+sgfr 0000000080000000 - 7FFFFFFF00000000 - 1 = 0000000080000000 (cc=2) -+sgfr 000000007FFFFFFF - 7FFFFFFF00000000 - 1 = 000000007FFFFFFF (cc=2) -+sgfr FFFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sgfr 8000000000000000 - 7FFFFFFF00000000 - 1 = 8000000000000000 (cc=1) -+sgfr 7FFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = 7FFFFFFFFFFFFFFF (cc=2) -+slr 0000000000000000 - 7FFFFFFF00000000 - 1 = 0000000000000000 (cc=2) -+slr 0000000000000001 - 7FFFFFFF00000000 - 1 = 0000000000000001 (cc=3) -+slr 000000000000FFFF - 7FFFFFFF00000000 - 1 = 000000000000FFFF (cc=3) -+slr 0000000000007FFF - 7FFFFFFF00000000 - 1 = 0000000000007FFF (cc=3) -+slr 0000000000008000 - 7FFFFFFF00000000 - 1 = 0000000000008000 (cc=3) -+slr 00000000FFFFFFFF - 7FFFFFFF00000000 - 1 = 00000000FFFFFFFF (cc=3) -+slr 0000000080000000 - 7FFFFFFF00000000 - 1 = 0000000080000000 (cc=3) -+slr 000000007FFFFFFF - 7FFFFFFF00000000 - 1 = 000000007FFFFFFF (cc=3) -+slr FFFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = FFFFFFFFFFFFFFFF (cc=3) -+slr 8000000000000000 - 7FFFFFFF00000000 - 1 = 8000000000000000 (cc=2) -+slr 7FFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slgr 0000000000000000 - 7FFFFFFF00000000 - 1 = 8000000100000000 (cc=1) -+slgr 0000000000000001 - 7FFFFFFF00000000 - 1 = 8000000100000001 (cc=1) -+slgr 000000000000FFFF - 7FFFFFFF00000000 - 1 = 800000010000FFFF (cc=1) -+slgr 0000000000007FFF - 7FFFFFFF00000000 - 1 = 8000000100007FFF (cc=1) -+slgr 0000000000008000 - 7FFFFFFF00000000 - 1 = 8000000100008000 (cc=1) -+slgr 00000000FFFFFFFF - 7FFFFFFF00000000 - 1 = 80000001FFFFFFFF (cc=1) -+slgr 0000000080000000 - 7FFFFFFF00000000 - 1 = 8000000180000000 (cc=1) -+slgr 000000007FFFFFFF - 7FFFFFFF00000000 - 1 = 800000017FFFFFFF (cc=1) -+slgr FFFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = 80000000FFFFFFFF (cc=3) -+slgr 8000000000000000 - 7FFFFFFF00000000 - 1 = 0000000100000000 (cc=3) -+slgr 7FFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = 00000000FFFFFFFF (cc=3) -+slgfr 0000000000000000 - 7FFFFFFF00000000 - 1 = 0000000000000000 (cc=2) -+slgfr 0000000000000001 - 7FFFFFFF00000000 - 1 = 0000000000000001 (cc=3) -+slgfr 000000000000FFFF - 7FFFFFFF00000000 - 1 = 000000000000FFFF (cc=3) -+slgfr 0000000000007FFF - 7FFFFFFF00000000 - 1 = 0000000000007FFF (cc=3) -+slgfr 0000000000008000 - 7FFFFFFF00000000 - 1 = 0000000000008000 (cc=3) -+slgfr 00000000FFFFFFFF - 7FFFFFFF00000000 - 1 = 00000000FFFFFFFF (cc=3) -+slgfr 0000000080000000 - 7FFFFFFF00000000 - 1 = 0000000080000000 (cc=3) -+slgfr 000000007FFFFFFF - 7FFFFFFF00000000 - 1 = 000000007FFFFFFF (cc=3) -+slgfr FFFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = FFFFFFFFFFFFFFFF (cc=3) -+slgfr 8000000000000000 - 7FFFFFFF00000000 - 1 = 8000000000000000 (cc=3) -+slgfr 7FFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slb 0000000000000000 - 7FFFFFFF00000000 - 1 = 0000000080000000 (cc=1) -+slb 0000000000000001 - 7FFFFFFF00000000 - 1 = 0000000080000001 (cc=1) -+slb 000000000000FFFF - 7FFFFFFF00000000 - 1 = 000000008000FFFF (cc=1) -+slb 0000000000007FFF - 7FFFFFFF00000000 - 1 = 0000000080007FFF (cc=1) -+slb 0000000000008000 - 7FFFFFFF00000000 - 1 = 0000000080008000 (cc=1) -+slb 00000000FFFFFFFF - 7FFFFFFF00000000 - 1 = 000000007FFFFFFF (cc=3) -+slb 0000000080000000 - 7FFFFFFF00000000 - 1 = 0000000000000000 (cc=2) -+slb 000000007FFFFFFF - 7FFFFFFF00000000 - 1 = 00000000FFFFFFFF (cc=1) -+slb FFFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = FFFFFFFF7FFFFFFF (cc=3) -+slb 8000000000000000 - 7FFFFFFF00000000 - 1 = 8000000080000000 (cc=1) -+slb 7FFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = 7FFFFFFF7FFFFFFF (cc=3) -+slbg 0000000000000000 - 7FFFFFFF00000000 - 1 = 80000000FFFFFFFF (cc=1) -+slbg 0000000000000001 - 7FFFFFFF00000000 - 1 = 8000000100000000 (cc=1) -+slbg 000000000000FFFF - 7FFFFFFF00000000 - 1 = 800000010000FFFE (cc=1) -+slbg 0000000000007FFF - 7FFFFFFF00000000 - 1 = 8000000100007FFE (cc=1) -+slbg 0000000000008000 - 7FFFFFFF00000000 - 1 = 8000000100007FFF (cc=1) -+slbg 00000000FFFFFFFF - 7FFFFFFF00000000 - 1 = 80000001FFFFFFFE (cc=1) -+slbg 0000000080000000 - 7FFFFFFF00000000 - 1 = 800000017FFFFFFF (cc=1) -+slbg 000000007FFFFFFF - 7FFFFFFF00000000 - 1 = 800000017FFFFFFE (cc=1) -+slbg FFFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = 80000000FFFFFFFE (cc=3) -+slbg 8000000000000000 - 7FFFFFFF00000000 - 1 = 00000000FFFFFFFF (cc=3) -+slbg 7FFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = 00000000FFFFFFFE (cc=3) -+slbr 0000000000000000 - 7FFFFFFF00000000 - 1 = 00000000FFFFFFFF (cc=1) -+slbr 0000000000000001 - 7FFFFFFF00000000 - 1 = 0000000000000000 (cc=2) -+slbr 000000000000FFFF - 7FFFFFFF00000000 - 1 = 000000000000FFFE (cc=3) -+slbr 0000000000007FFF - 7FFFFFFF00000000 - 1 = 0000000000007FFE (cc=3) -+slbr 0000000000008000 - 7FFFFFFF00000000 - 1 = 0000000000007FFF (cc=3) -+slbr 00000000FFFFFFFF - 7FFFFFFF00000000 - 1 = 00000000FFFFFFFE (cc=3) -+slbr 0000000080000000 - 7FFFFFFF00000000 - 1 = 000000007FFFFFFF (cc=3) -+slbr 000000007FFFFFFF - 7FFFFFFF00000000 - 1 = 000000007FFFFFFE (cc=3) -+slbr FFFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = FFFFFFFFFFFFFFFE (cc=3) -+slbr 8000000000000000 - 7FFFFFFF00000000 - 1 = 80000000FFFFFFFF (cc=1) -+slbr 7FFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = 7FFFFFFFFFFFFFFE (cc=3) -+slbgr 0000000000000000 - 7FFFFFFF00000000 - 1 = 80000000FFFFFFFF (cc=1) -+slbgr 0000000000000001 - 7FFFFFFF00000000 - 1 = 8000000100000000 (cc=1) -+slbgr 000000000000FFFF - 7FFFFFFF00000000 - 1 = 800000010000FFFE (cc=1) -+slbgr 0000000000007FFF - 7FFFFFFF00000000 - 1 = 8000000100007FFE (cc=1) -+slbgr 0000000000008000 - 7FFFFFFF00000000 - 1 = 8000000100007FFF (cc=1) -+slbgr 00000000FFFFFFFF - 7FFFFFFF00000000 - 1 = 80000001FFFFFFFE (cc=1) -+slbgr 0000000080000000 - 7FFFFFFF00000000 - 1 = 800000017FFFFFFF (cc=1) -+slbgr 000000007FFFFFFF - 7FFFFFFF00000000 - 1 = 800000017FFFFFFE (cc=1) -+slbgr FFFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = 80000000FFFFFFFE (cc=3) -+slbgr 8000000000000000 - 7FFFFFFF00000000 - 1 = 00000000FFFFFFFF (cc=3) -+slbgr 7FFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = 00000000FFFFFFFE (cc=3) -+slb 0000000000000000 - 7FFFFFFF00000000 - 0 = 0000000080000001 (cc=1) -+slb 0000000000000001 - 7FFFFFFF00000000 - 0 = 0000000080000002 (cc=1) -+slb 000000000000FFFF - 7FFFFFFF00000000 - 0 = 0000000080010000 (cc=1) -+slb 0000000000007FFF - 7FFFFFFF00000000 - 0 = 0000000080008000 (cc=1) -+slb 0000000000008000 - 7FFFFFFF00000000 - 0 = 0000000080008001 (cc=1) -+slb 00000000FFFFFFFF - 7FFFFFFF00000000 - 0 = 0000000080000000 (cc=3) -+slb 0000000080000000 - 7FFFFFFF00000000 - 0 = 0000000000000001 (cc=3) -+slb 000000007FFFFFFF - 7FFFFFFF00000000 - 0 = 0000000000000000 (cc=2) -+slb FFFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 0 = FFFFFFFF80000000 (cc=3) -+slb 8000000000000000 - 7FFFFFFF00000000 - 0 = 8000000080000001 (cc=1) -+slb 7FFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 0 = 7FFFFFFF80000000 (cc=3) -+slbg 0000000000000000 - 7FFFFFFF00000000 - 0 = 8000000100000000 (cc=1) -+slbg 0000000000000001 - 7FFFFFFF00000000 - 0 = 8000000100000001 (cc=1) -+slbg 000000000000FFFF - 7FFFFFFF00000000 - 0 = 800000010000FFFF (cc=1) -+slbg 0000000000007FFF - 7FFFFFFF00000000 - 0 = 8000000100007FFF (cc=1) -+slbg 0000000000008000 - 7FFFFFFF00000000 - 0 = 8000000100008000 (cc=1) -+slbg 00000000FFFFFFFF - 7FFFFFFF00000000 - 0 = 80000001FFFFFFFF (cc=1) -+slbg 0000000080000000 - 7FFFFFFF00000000 - 0 = 8000000180000000 (cc=1) -+slbg 000000007FFFFFFF - 7FFFFFFF00000000 - 0 = 800000017FFFFFFF (cc=1) -+slbg FFFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 0 = 80000000FFFFFFFF (cc=3) -+slbg 8000000000000000 - 7FFFFFFF00000000 - 0 = 0000000100000000 (cc=3) -+slbg 7FFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 0 = 00000000FFFFFFFF (cc=3) -+slbr 0000000000000000 - 7FFFFFFF00000000 - 0 = 0000000000000000 (cc=2) -+slbr 0000000000000001 - 7FFFFFFF00000000 - 0 = 0000000000000001 (cc=3) -+slbr 000000000000FFFF - 7FFFFFFF00000000 - 0 = 000000000000FFFF (cc=3) -+slbr 0000000000007FFF - 7FFFFFFF00000000 - 0 = 0000000000007FFF (cc=3) -+slbr 0000000000008000 - 7FFFFFFF00000000 - 0 = 0000000000008000 (cc=3) -+slbr 00000000FFFFFFFF - 7FFFFFFF00000000 - 0 = 00000000FFFFFFFF (cc=3) -+slbr 0000000080000000 - 7FFFFFFF00000000 - 0 = 0000000080000000 (cc=3) -+slbr 000000007FFFFFFF - 7FFFFFFF00000000 - 0 = 000000007FFFFFFF (cc=3) -+slbr FFFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 0 = FFFFFFFFFFFFFFFF (cc=3) -+slbr 8000000000000000 - 7FFFFFFF00000000 - 0 = 8000000000000000 (cc=2) -+slbr 7FFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 0 = 7FFFFFFFFFFFFFFF (cc=3) -+slbgr 0000000000000000 - 7FFFFFFF00000000 - 0 = 8000000100000000 (cc=1) -+slbgr 0000000000000001 - 7FFFFFFF00000000 - 0 = 8000000100000001 (cc=1) -+slbgr 000000000000FFFF - 7FFFFFFF00000000 - 0 = 800000010000FFFF (cc=1) -+slbgr 0000000000007FFF - 7FFFFFFF00000000 - 0 = 8000000100007FFF (cc=1) -+slbgr 0000000000008000 - 7FFFFFFF00000000 - 0 = 8000000100008000 (cc=1) -+slbgr 00000000FFFFFFFF - 7FFFFFFF00000000 - 0 = 80000001FFFFFFFF (cc=1) -+slbgr 0000000080000000 - 7FFFFFFF00000000 - 0 = 8000000180000000 (cc=1) -+slbgr 000000007FFFFFFF - 7FFFFFFF00000000 - 0 = 800000017FFFFFFF (cc=1) -+slbgr FFFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 0 = 80000000FFFFFFFF (cc=3) -+slbgr 8000000000000000 - 7FFFFFFF00000000 - 0 = 0000000100000000 (cc=3) -+slbgr 7FFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 0 = 00000000FFFFFFFF (cc=3) -+shy 0000000000000000 - 7FFFFFFF00000000 - 1 = 00000000FFFF8001 (cc=1) -+shy 0000000000000001 - 7FFFFFFF00000000 - 1 = 00000000FFFF8002 (cc=1) -+shy 000000000000FFFF - 7FFFFFFF00000000 - 1 = 0000000000008000 (cc=2) -+shy 0000000000007FFF - 7FFFFFFF00000000 - 1 = 0000000000000000 (cc=0) -+shy 0000000000008000 - 7FFFFFFF00000000 - 1 = 0000000000000001 (cc=2) -+shy 00000000FFFFFFFF - 7FFFFFFF00000000 - 1 = 00000000FFFF8000 (cc=1) -+shy 0000000080000000 - 7FFFFFFF00000000 - 1 = 000000007FFF8001 (cc=3) -+shy 000000007FFFFFFF - 7FFFFFFF00000000 - 1 = 000000007FFF8000 (cc=2) -+shy FFFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = FFFFFFFFFFFF8000 (cc=1) -+shy 8000000000000000 - 7FFFFFFF00000000 - 1 = 80000000FFFF8001 (cc=1) -+shy 7FFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = 7FFFFFFFFFFF8000 (cc=1) -+sly 0000000000000000 - 7FFFFFFF00000000 - 1 = 0000000080000001 (cc=1) -+sly 0000000000000001 - 7FFFFFFF00000000 - 1 = 0000000080000002 (cc=1) -+sly 000000000000FFFF - 7FFFFFFF00000000 - 1 = 0000000080010000 (cc=1) -+sly 0000000000007FFF - 7FFFFFFF00000000 - 1 = 0000000080008000 (cc=1) -+sly 0000000000008000 - 7FFFFFFF00000000 - 1 = 0000000080008001 (cc=1) -+sly 00000000FFFFFFFF - 7FFFFFFF00000000 - 1 = 0000000080000000 (cc=3) -+sly 0000000080000000 - 7FFFFFFF00000000 - 1 = 0000000000000001 (cc=3) -+sly 000000007FFFFFFF - 7FFFFFFF00000000 - 1 = 0000000000000000 (cc=2) -+sly FFFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = FFFFFFFF80000000 (cc=3) -+sly 8000000000000000 - 7FFFFFFF00000000 - 1 = 8000000080000001 (cc=1) -+sly 7FFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = 7FFFFFFF80000000 (cc=3) -+sy 0000000000000000 - 7FFFFFFF00000000 - 1 = 0000000080000001 (cc=1) -+sy 0000000000000001 - 7FFFFFFF00000000 - 1 = 0000000080000002 (cc=1) -+sy 000000000000FFFF - 7FFFFFFF00000000 - 1 = 0000000080010000 (cc=1) -+sy 0000000000007FFF - 7FFFFFFF00000000 - 1 = 0000000080008000 (cc=1) -+sy 0000000000008000 - 7FFFFFFF00000000 - 1 = 0000000080008001 (cc=1) -+sy 00000000FFFFFFFF - 7FFFFFFF00000000 - 1 = 0000000080000000 (cc=1) -+sy 0000000080000000 - 7FFFFFFF00000000 - 1 = 0000000000000001 (cc=3) -+sy 000000007FFFFFFF - 7FFFFFFF00000000 - 1 = 0000000000000000 (cc=0) -+sy FFFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = FFFFFFFF80000000 (cc=1) -+sy 8000000000000000 - 7FFFFFFF00000000 - 1 = 8000000080000001 (cc=1) -+sy 7FFFFFFFFFFFFFFF - 7FFFFFFF00000000 - 1 = 7FFFFFFF80000000 (cc=1) -+s 0000000000000000 - 8000000000000000 - 1 = 0000000080000000 (cc=3) -+s 0000000000000001 - 8000000000000000 - 1 = 0000000080000001 (cc=3) -+s 000000000000FFFF - 8000000000000000 - 1 = 000000008000FFFF (cc=3) -+s 0000000000007FFF - 8000000000000000 - 1 = 0000000080007FFF (cc=3) -+s 0000000000008000 - 8000000000000000 - 1 = 0000000080008000 (cc=3) -+s 00000000FFFFFFFF - 8000000000000000 - 1 = 000000007FFFFFFF (cc=2) -+s 0000000080000000 - 8000000000000000 - 1 = 0000000000000000 (cc=0) -+s 000000007FFFFFFF - 8000000000000000 - 1 = 00000000FFFFFFFF (cc=3) -+s FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFF7FFFFFFF (cc=2) -+s 8000000000000000 - 8000000000000000 - 1 = 8000000080000000 (cc=3) -+s 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFF7FFFFFFF (cc=2) -+sh 0000000000000000 - 8000000000000000 - 1 = 0000000000008000 (cc=2) -+sh 0000000000000001 - 8000000000000000 - 1 = 0000000000008001 (cc=2) -+sh 000000000000FFFF - 8000000000000000 - 1 = 0000000000017FFF (cc=2) -+sh 0000000000007FFF - 8000000000000000 - 1 = 000000000000FFFF (cc=2) -+sh 0000000000008000 - 8000000000000000 - 1 = 0000000000010000 (cc=2) -+sh 00000000FFFFFFFF - 8000000000000000 - 1 = 0000000000007FFF (cc=2) -+sh 0000000080000000 - 8000000000000000 - 1 = 0000000080008000 (cc=1) -+sh 000000007FFFFFFF - 8000000000000000 - 1 = 0000000080007FFF (cc=3) -+sh FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFF00007FFF (cc=2) -+sh 8000000000000000 - 8000000000000000 - 1 = 8000000000008000 (cc=2) -+sh 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFF00007FFF (cc=2) -+sg 0000000000000000 - 8000000000000000 - 1 = 8000000000000000 (cc=3) -+sg 0000000000000001 - 8000000000000000 - 1 = 8000000000000001 (cc=3) -+sg 000000000000FFFF - 8000000000000000 - 1 = 800000000000FFFF (cc=3) -+sg 0000000000007FFF - 8000000000000000 - 1 = 8000000000007FFF (cc=3) -+sg 0000000000008000 - 8000000000000000 - 1 = 8000000000008000 (cc=3) -+sg 00000000FFFFFFFF - 8000000000000000 - 1 = 80000000FFFFFFFF (cc=3) -+sg 0000000080000000 - 8000000000000000 - 1 = 8000000080000000 (cc=3) -+sg 000000007FFFFFFF - 8000000000000000 - 1 = 800000007FFFFFFF (cc=3) -+sg FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=2) -+sg 8000000000000000 - 8000000000000000 - 1 = 0000000000000000 (cc=0) -+sg 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=3) -+sgf 0000000000000000 - 8000000000000000 - 1 = 0000000080000000 (cc=2) -+sgf 0000000000000001 - 8000000000000000 - 1 = 0000000080000001 (cc=2) -+sgf 000000000000FFFF - 8000000000000000 - 1 = 000000008000FFFF (cc=2) -+sgf 0000000000007FFF - 8000000000000000 - 1 = 0000000080007FFF (cc=2) -+sgf 0000000000008000 - 8000000000000000 - 1 = 0000000080008000 (cc=2) -+sgf 00000000FFFFFFFF - 8000000000000000 - 1 = 000000017FFFFFFF (cc=2) -+sgf 0000000080000000 - 8000000000000000 - 1 = 0000000100000000 (cc=2) -+sgf 000000007FFFFFFF - 8000000000000000 - 1 = 00000000FFFFFFFF (cc=2) -+sgf FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = 000000007FFFFFFF (cc=2) -+sgf 8000000000000000 - 8000000000000000 - 1 = 8000000080000000 (cc=1) -+sgf 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 800000007FFFFFFF (cc=3) -+sl 0000000000000000 - 8000000000000000 - 1 = 0000000080000000 (cc=1) -+sl 0000000000000001 - 8000000000000000 - 1 = 0000000080000001 (cc=1) -+sl 000000000000FFFF - 8000000000000000 - 1 = 000000008000FFFF (cc=1) -+sl 0000000000007FFF - 8000000000000000 - 1 = 0000000080007FFF (cc=1) -+sl 0000000000008000 - 8000000000000000 - 1 = 0000000080008000 (cc=1) -+sl 00000000FFFFFFFF - 8000000000000000 - 1 = 000000007FFFFFFF (cc=3) -+sl 0000000080000000 - 8000000000000000 - 1 = 0000000000000000 (cc=2) -+sl 000000007FFFFFFF - 8000000000000000 - 1 = 00000000FFFFFFFF (cc=1) -+sl FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFF7FFFFFFF (cc=3) -+sl 8000000000000000 - 8000000000000000 - 1 = 8000000080000000 (cc=1) -+sl 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFF7FFFFFFF (cc=3) -+slg 0000000000000000 - 8000000000000000 - 1 = 8000000000000000 (cc=1) -+slg 0000000000000001 - 8000000000000000 - 1 = 8000000000000001 (cc=1) -+slg 000000000000FFFF - 8000000000000000 - 1 = 800000000000FFFF (cc=1) -+slg 0000000000007FFF - 8000000000000000 - 1 = 8000000000007FFF (cc=1) -+slg 0000000000008000 - 8000000000000000 - 1 = 8000000000008000 (cc=1) -+slg 00000000FFFFFFFF - 8000000000000000 - 1 = 80000000FFFFFFFF (cc=1) -+slg 0000000080000000 - 8000000000000000 - 1 = 8000000080000000 (cc=1) -+slg 000000007FFFFFFF - 8000000000000000 - 1 = 800000007FFFFFFF (cc=1) -+slg FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slg 8000000000000000 - 8000000000000000 - 1 = 0000000000000000 (cc=2) -+slg 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sgf 0000000000000000 - 8000000000000000 - 1 = 0000000080000000 (cc=2) -+sgf 0000000000000001 - 8000000000000000 - 1 = 0000000080000001 (cc=2) -+sgf 000000000000FFFF - 8000000000000000 - 1 = 000000008000FFFF (cc=2) -+sgf 0000000000007FFF - 8000000000000000 - 1 = 0000000080007FFF (cc=2) -+sgf 0000000000008000 - 8000000000000000 - 1 = 0000000080008000 (cc=2) -+sgf 00000000FFFFFFFF - 8000000000000000 - 1 = 000000017FFFFFFF (cc=2) -+sgf 0000000080000000 - 8000000000000000 - 1 = 0000000100000000 (cc=2) -+sgf 000000007FFFFFFF - 8000000000000000 - 1 = 00000000FFFFFFFF (cc=2) -+sgf FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = 000000007FFFFFFF (cc=2) -+sgf 8000000000000000 - 8000000000000000 - 1 = 8000000080000000 (cc=1) -+sgf 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 800000007FFFFFFF (cc=3) -+slgf 0000000000000000 - 8000000000000000 - 1 = FFFFFFFF80000000 (cc=1) -+slgf 0000000000000001 - 8000000000000000 - 1 = FFFFFFFF80000001 (cc=1) -+slgf 000000000000FFFF - 8000000000000000 - 1 = FFFFFFFF8000FFFF (cc=1) -+slgf 0000000000007FFF - 8000000000000000 - 1 = FFFFFFFF80007FFF (cc=1) -+slgf 0000000000008000 - 8000000000000000 - 1 = FFFFFFFF80008000 (cc=1) -+slgf 00000000FFFFFFFF - 8000000000000000 - 1 = 000000007FFFFFFF (cc=3) -+slgf 0000000080000000 - 8000000000000000 - 1 = 0000000000000000 (cc=2) -+slgf 000000007FFFFFFF - 8000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slgf FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFF7FFFFFFF (cc=3) -+slgf 8000000000000000 - 8000000000000000 - 1 = 7FFFFFFF80000000 (cc=3) -+slgf 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFF7FFFFFFF (cc=3) -+sr 0000000000000000 - 8000000000000000 - 1 = 0000000000000000 (cc=0) -+sr 0000000000000001 - 8000000000000000 - 1 = 0000000000000001 (cc=2) -+sr 000000000000FFFF - 8000000000000000 - 1 = 000000000000FFFF (cc=2) -+sr 0000000000007FFF - 8000000000000000 - 1 = 0000000000007FFF (cc=2) -+sr 0000000000008000 - 8000000000000000 - 1 = 0000000000008000 (cc=2) -+sr 00000000FFFFFFFF - 8000000000000000 - 1 = 00000000FFFFFFFF (cc=1) -+sr 0000000080000000 - 8000000000000000 - 1 = 0000000080000000 (cc=1) -+sr 000000007FFFFFFF - 8000000000000000 - 1 = 000000007FFFFFFF (cc=2) -+sr FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sr 8000000000000000 - 8000000000000000 - 1 = 8000000000000000 (cc=0) -+sr 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sgr 0000000000000000 - 8000000000000000 - 1 = 8000000000000000 (cc=3) -+sgr 0000000000000001 - 8000000000000000 - 1 = 8000000000000001 (cc=3) -+sgr 000000000000FFFF - 8000000000000000 - 1 = 800000000000FFFF (cc=3) -+sgr 0000000000007FFF - 8000000000000000 - 1 = 8000000000007FFF (cc=3) -+sgr 0000000000008000 - 8000000000000000 - 1 = 8000000000008000 (cc=3) -+sgr 00000000FFFFFFFF - 8000000000000000 - 1 = 80000000FFFFFFFF (cc=3) -+sgr 0000000080000000 - 8000000000000000 - 1 = 8000000080000000 (cc=3) -+sgr 000000007FFFFFFF - 8000000000000000 - 1 = 800000007FFFFFFF (cc=3) -+sgr FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=2) -+sgr 8000000000000000 - 8000000000000000 - 1 = 0000000000000000 (cc=0) -+sgr 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=3) -+sgfr 0000000000000000 - 8000000000000000 - 1 = 0000000000000000 (cc=0) -+sgfr 0000000000000001 - 8000000000000000 - 1 = 0000000000000001 (cc=2) -+sgfr 000000000000FFFF - 8000000000000000 - 1 = 000000000000FFFF (cc=2) -+sgfr 0000000000007FFF - 8000000000000000 - 1 = 0000000000007FFF (cc=2) -+sgfr 0000000000008000 - 8000000000000000 - 1 = 0000000000008000 (cc=2) -+sgfr 00000000FFFFFFFF - 8000000000000000 - 1 = 00000000FFFFFFFF (cc=2) -+sgfr 0000000080000000 - 8000000000000000 - 1 = 0000000080000000 (cc=2) -+sgfr 000000007FFFFFFF - 8000000000000000 - 1 = 000000007FFFFFFF (cc=2) -+sgfr FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sgfr 8000000000000000 - 8000000000000000 - 1 = 8000000000000000 (cc=1) -+sgfr 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=2) -+slr 0000000000000000 - 8000000000000000 - 1 = 0000000000000000 (cc=2) -+slr 0000000000000001 - 8000000000000000 - 1 = 0000000000000001 (cc=3) -+slr 000000000000FFFF - 8000000000000000 - 1 = 000000000000FFFF (cc=3) -+slr 0000000000007FFF - 8000000000000000 - 1 = 0000000000007FFF (cc=3) -+slr 0000000000008000 - 8000000000000000 - 1 = 0000000000008000 (cc=3) -+slr 00000000FFFFFFFF - 8000000000000000 - 1 = 00000000FFFFFFFF (cc=3) -+slr 0000000080000000 - 8000000000000000 - 1 = 0000000080000000 (cc=3) -+slr 000000007FFFFFFF - 8000000000000000 - 1 = 000000007FFFFFFF (cc=3) -+slr FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=3) -+slr 8000000000000000 - 8000000000000000 - 1 = 8000000000000000 (cc=2) -+slr 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slgr 0000000000000000 - 8000000000000000 - 1 = 8000000000000000 (cc=1) -+slgr 0000000000000001 - 8000000000000000 - 1 = 8000000000000001 (cc=1) -+slgr 000000000000FFFF - 8000000000000000 - 1 = 800000000000FFFF (cc=1) -+slgr 0000000000007FFF - 8000000000000000 - 1 = 8000000000007FFF (cc=1) -+slgr 0000000000008000 - 8000000000000000 - 1 = 8000000000008000 (cc=1) -+slgr 00000000FFFFFFFF - 8000000000000000 - 1 = 80000000FFFFFFFF (cc=1) -+slgr 0000000080000000 - 8000000000000000 - 1 = 8000000080000000 (cc=1) -+slgr 000000007FFFFFFF - 8000000000000000 - 1 = 800000007FFFFFFF (cc=1) -+slgr FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slgr 8000000000000000 - 8000000000000000 - 1 = 0000000000000000 (cc=2) -+slgr 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slgfr 0000000000000000 - 8000000000000000 - 1 = 0000000000000000 (cc=2) -+slgfr 0000000000000001 - 8000000000000000 - 1 = 0000000000000001 (cc=3) -+slgfr 000000000000FFFF - 8000000000000000 - 1 = 000000000000FFFF (cc=3) -+slgfr 0000000000007FFF - 8000000000000000 - 1 = 0000000000007FFF (cc=3) -+slgfr 0000000000008000 - 8000000000000000 - 1 = 0000000000008000 (cc=3) -+slgfr 00000000FFFFFFFF - 8000000000000000 - 1 = 00000000FFFFFFFF (cc=3) -+slgfr 0000000080000000 - 8000000000000000 - 1 = 0000000080000000 (cc=3) -+slgfr 000000007FFFFFFF - 8000000000000000 - 1 = 000000007FFFFFFF (cc=3) -+slgfr FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=3) -+slgfr 8000000000000000 - 8000000000000000 - 1 = 8000000000000000 (cc=3) -+slgfr 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slb 0000000000000000 - 8000000000000000 - 1 = 000000007FFFFFFF (cc=1) -+slb 0000000000000001 - 8000000000000000 - 1 = 0000000080000000 (cc=1) -+slb 000000000000FFFF - 8000000000000000 - 1 = 000000008000FFFE (cc=1) -+slb 0000000000007FFF - 8000000000000000 - 1 = 0000000080007FFE (cc=1) -+slb 0000000000008000 - 8000000000000000 - 1 = 0000000080007FFF (cc=1) -+slb 00000000FFFFFFFF - 8000000000000000 - 1 = 000000007FFFFFFE (cc=3) -+slb 0000000080000000 - 8000000000000000 - 1 = 00000000FFFFFFFF (cc=1) -+slb 000000007FFFFFFF - 8000000000000000 - 1 = 00000000FFFFFFFE (cc=1) -+slb FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFF7FFFFFFE (cc=3) -+slb 8000000000000000 - 8000000000000000 - 1 = 800000007FFFFFFF (cc=1) -+slb 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFF7FFFFFFE (cc=3) -+slbg 0000000000000000 - 8000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+slbg 0000000000000001 - 8000000000000000 - 1 = 8000000000000000 (cc=1) -+slbg 000000000000FFFF - 8000000000000000 - 1 = 800000000000FFFE (cc=1) -+slbg 0000000000007FFF - 8000000000000000 - 1 = 8000000000007FFE (cc=1) -+slbg 0000000000008000 - 8000000000000000 - 1 = 8000000000007FFF (cc=1) -+slbg 00000000FFFFFFFF - 8000000000000000 - 1 = 80000000FFFFFFFE (cc=1) -+slbg 0000000080000000 - 8000000000000000 - 1 = 800000007FFFFFFF (cc=1) -+slbg 000000007FFFFFFF - 8000000000000000 - 1 = 800000007FFFFFFE (cc=1) -+slbg FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFFFFFFFFFE (cc=3) -+slbg 8000000000000000 - 8000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slbg 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFFFFFFFFFE (cc=1) -+slbr 0000000000000000 - 8000000000000000 - 1 = 00000000FFFFFFFF (cc=1) -+slbr 0000000000000001 - 8000000000000000 - 1 = 0000000000000000 (cc=2) -+slbr 000000000000FFFF - 8000000000000000 - 1 = 000000000000FFFE (cc=3) -+slbr 0000000000007FFF - 8000000000000000 - 1 = 0000000000007FFE (cc=3) -+slbr 0000000000008000 - 8000000000000000 - 1 = 0000000000007FFF (cc=3) -+slbr 00000000FFFFFFFF - 8000000000000000 - 1 = 00000000FFFFFFFE (cc=3) -+slbr 0000000080000000 - 8000000000000000 - 1 = 000000007FFFFFFF (cc=3) -+slbr 000000007FFFFFFF - 8000000000000000 - 1 = 000000007FFFFFFE (cc=3) -+slbr FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFFFFFFFFFE (cc=3) -+slbr 8000000000000000 - 8000000000000000 - 1 = 80000000FFFFFFFF (cc=1) -+slbr 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFFFFFFFFFE (cc=3) -+slbgr 0000000000000000 - 8000000000000000 - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+slbgr 0000000000000001 - 8000000000000000 - 1 = 8000000000000000 (cc=1) -+slbgr 000000000000FFFF - 8000000000000000 - 1 = 800000000000FFFE (cc=1) -+slbgr 0000000000007FFF - 8000000000000000 - 1 = 8000000000007FFE (cc=1) -+slbgr 0000000000008000 - 8000000000000000 - 1 = 8000000000007FFF (cc=1) -+slbgr 00000000FFFFFFFF - 8000000000000000 - 1 = 80000000FFFFFFFE (cc=1) -+slbgr 0000000080000000 - 8000000000000000 - 1 = 800000007FFFFFFF (cc=1) -+slbgr 000000007FFFFFFF - 8000000000000000 - 1 = 800000007FFFFFFE (cc=1) -+slbgr FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFFFFFFFFFE (cc=3) -+slbgr 8000000000000000 - 8000000000000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slbgr 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFFFFFFFFFE (cc=1) -+slb 0000000000000000 - 8000000000000000 - 0 = 0000000080000000 (cc=1) -+slb 0000000000000001 - 8000000000000000 - 0 = 0000000080000001 (cc=1) -+slb 000000000000FFFF - 8000000000000000 - 0 = 000000008000FFFF (cc=1) -+slb 0000000000007FFF - 8000000000000000 - 0 = 0000000080007FFF (cc=1) -+slb 0000000000008000 - 8000000000000000 - 0 = 0000000080008000 (cc=1) -+slb 00000000FFFFFFFF - 8000000000000000 - 0 = 000000007FFFFFFF (cc=3) -+slb 0000000080000000 - 8000000000000000 - 0 = 0000000000000000 (cc=2) -+slb 000000007FFFFFFF - 8000000000000000 - 0 = 00000000FFFFFFFF (cc=1) -+slb FFFFFFFFFFFFFFFF - 8000000000000000 - 0 = FFFFFFFF7FFFFFFF (cc=3) -+slb 8000000000000000 - 8000000000000000 - 0 = 8000000080000000 (cc=1) -+slb 7FFFFFFFFFFFFFFF - 8000000000000000 - 0 = 7FFFFFFF7FFFFFFF (cc=3) -+slbg 0000000000000000 - 8000000000000000 - 0 = 8000000000000000 (cc=1) -+slbg 0000000000000001 - 8000000000000000 - 0 = 8000000000000001 (cc=1) -+slbg 000000000000FFFF - 8000000000000000 - 0 = 800000000000FFFF (cc=1) -+slbg 0000000000007FFF - 8000000000000000 - 0 = 8000000000007FFF (cc=1) -+slbg 0000000000008000 - 8000000000000000 - 0 = 8000000000008000 (cc=1) -+slbg 00000000FFFFFFFF - 8000000000000000 - 0 = 80000000FFFFFFFF (cc=1) -+slbg 0000000080000000 - 8000000000000000 - 0 = 8000000080000000 (cc=1) -+slbg 000000007FFFFFFF - 8000000000000000 - 0 = 800000007FFFFFFF (cc=1) -+slbg FFFFFFFFFFFFFFFF - 8000000000000000 - 0 = 7FFFFFFFFFFFFFFF (cc=3) -+slbg 8000000000000000 - 8000000000000000 - 0 = 0000000000000000 (cc=2) -+slbg 7FFFFFFFFFFFFFFF - 8000000000000000 - 0 = FFFFFFFFFFFFFFFF (cc=1) -+slbr 0000000000000000 - 8000000000000000 - 0 = 0000000000000000 (cc=2) -+slbr 0000000000000001 - 8000000000000000 - 0 = 0000000000000001 (cc=3) -+slbr 000000000000FFFF - 8000000000000000 - 0 = 000000000000FFFF (cc=3) -+slbr 0000000000007FFF - 8000000000000000 - 0 = 0000000000007FFF (cc=3) -+slbr 0000000000008000 - 8000000000000000 - 0 = 0000000000008000 (cc=3) -+slbr 00000000FFFFFFFF - 8000000000000000 - 0 = 00000000FFFFFFFF (cc=3) -+slbr 0000000080000000 - 8000000000000000 - 0 = 0000000080000000 (cc=3) -+slbr 000000007FFFFFFF - 8000000000000000 - 0 = 000000007FFFFFFF (cc=3) -+slbr FFFFFFFFFFFFFFFF - 8000000000000000 - 0 = FFFFFFFFFFFFFFFF (cc=3) -+slbr 8000000000000000 - 8000000000000000 - 0 = 8000000000000000 (cc=2) -+slbr 7FFFFFFFFFFFFFFF - 8000000000000000 - 0 = 7FFFFFFFFFFFFFFF (cc=3) -+slbgr 0000000000000000 - 8000000000000000 - 0 = 8000000000000000 (cc=1) -+slbgr 0000000000000001 - 8000000000000000 - 0 = 8000000000000001 (cc=1) -+slbgr 000000000000FFFF - 8000000000000000 - 0 = 800000000000FFFF (cc=1) -+slbgr 0000000000007FFF - 8000000000000000 - 0 = 8000000000007FFF (cc=1) -+slbgr 0000000000008000 - 8000000000000000 - 0 = 8000000000008000 (cc=1) -+slbgr 00000000FFFFFFFF - 8000000000000000 - 0 = 80000000FFFFFFFF (cc=1) -+slbgr 0000000080000000 - 8000000000000000 - 0 = 8000000080000000 (cc=1) -+slbgr 000000007FFFFFFF - 8000000000000000 - 0 = 800000007FFFFFFF (cc=1) -+slbgr FFFFFFFFFFFFFFFF - 8000000000000000 - 0 = 7FFFFFFFFFFFFFFF (cc=3) -+slbgr 8000000000000000 - 8000000000000000 - 0 = 0000000000000000 (cc=2) -+slbgr 7FFFFFFFFFFFFFFF - 8000000000000000 - 0 = FFFFFFFFFFFFFFFF (cc=1) -+shy 0000000000000000 - 8000000000000000 - 1 = 0000000000008000 (cc=2) -+shy 0000000000000001 - 8000000000000000 - 1 = 0000000000008001 (cc=2) -+shy 000000000000FFFF - 8000000000000000 - 1 = 0000000000017FFF (cc=2) -+shy 0000000000007FFF - 8000000000000000 - 1 = 000000000000FFFF (cc=2) -+shy 0000000000008000 - 8000000000000000 - 1 = 0000000000010000 (cc=2) -+shy 00000000FFFFFFFF - 8000000000000000 - 1 = 0000000000007FFF (cc=2) -+shy 0000000080000000 - 8000000000000000 - 1 = 0000000080008000 (cc=1) -+shy 000000007FFFFFFF - 8000000000000000 - 1 = 0000000080007FFF (cc=3) -+shy FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFF00007FFF (cc=2) -+shy 8000000000000000 - 8000000000000000 - 1 = 8000000000008000 (cc=2) -+shy 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFF00007FFF (cc=2) -+sly 0000000000000000 - 8000000000000000 - 1 = 0000000080000000 (cc=1) -+sly 0000000000000001 - 8000000000000000 - 1 = 0000000080000001 (cc=1) -+sly 000000000000FFFF - 8000000000000000 - 1 = 000000008000FFFF (cc=1) -+sly 0000000000007FFF - 8000000000000000 - 1 = 0000000080007FFF (cc=1) -+sly 0000000000008000 - 8000000000000000 - 1 = 0000000080008000 (cc=1) -+sly 00000000FFFFFFFF - 8000000000000000 - 1 = 000000007FFFFFFF (cc=3) -+sly 0000000080000000 - 8000000000000000 - 1 = 0000000000000000 (cc=2) -+sly 000000007FFFFFFF - 8000000000000000 - 1 = 00000000FFFFFFFF (cc=1) -+sly FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFF7FFFFFFF (cc=3) -+sly 8000000000000000 - 8000000000000000 - 1 = 8000000080000000 (cc=1) -+sly 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFF7FFFFFFF (cc=3) -+sy 0000000000000000 - 8000000000000000 - 1 = 0000000080000000 (cc=3) -+sy 0000000000000001 - 8000000000000000 - 1 = 0000000080000001 (cc=3) -+sy 000000000000FFFF - 8000000000000000 - 1 = 000000008000FFFF (cc=3) -+sy 0000000000007FFF - 8000000000000000 - 1 = 0000000080007FFF (cc=3) -+sy 0000000000008000 - 8000000000000000 - 1 = 0000000080008000 (cc=3) -+sy 00000000FFFFFFFF - 8000000000000000 - 1 = 000000007FFFFFFF (cc=2) -+sy 0000000080000000 - 8000000000000000 - 1 = 0000000000000000 (cc=0) -+sy 000000007FFFFFFF - 8000000000000000 - 1 = 00000000FFFFFFFF (cc=3) -+sy FFFFFFFFFFFFFFFF - 8000000000000000 - 1 = FFFFFFFF7FFFFFFF (cc=2) -+sy 8000000000000000 - 8000000000000000 - 1 = 8000000080000000 (cc=3) -+sy 7FFFFFFFFFFFFFFF - 8000000000000000 - 1 = 7FFFFFFF7FFFFFFF (cc=2) -+s 0000000000000000 - FFFFFFFF00000000 - 1 = 0000000000000001 (cc=2) -+s 0000000000000001 - FFFFFFFF00000000 - 1 = 0000000000000002 (cc=2) -+s 000000000000FFFF - FFFFFFFF00000000 - 1 = 0000000000010000 (cc=2) -+s 0000000000007FFF - FFFFFFFF00000000 - 1 = 0000000000008000 (cc=2) -+s 0000000000008000 - FFFFFFFF00000000 - 1 = 0000000000008001 (cc=2) -+s 00000000FFFFFFFF - FFFFFFFF00000000 - 1 = 0000000000000000 (cc=0) -+s 0000000080000000 - FFFFFFFF00000000 - 1 = 0000000080000001 (cc=1) -+s 000000007FFFFFFF - FFFFFFFF00000000 - 1 = 0000000080000000 (cc=3) -+s FFFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = FFFFFFFF00000000 (cc=0) -+s 8000000000000000 - FFFFFFFF00000000 - 1 = 8000000000000001 (cc=2) -+s 7FFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 7FFFFFFF00000000 (cc=0) -+sh 0000000000000000 - FFFFFFFF00000000 - 1 = 0000000000000001 (cc=2) -+sh 0000000000000001 - FFFFFFFF00000000 - 1 = 0000000000000002 (cc=2) -+sh 000000000000FFFF - FFFFFFFF00000000 - 1 = 0000000000010000 (cc=2) -+sh 0000000000007FFF - FFFFFFFF00000000 - 1 = 0000000000008000 (cc=2) -+sh 0000000000008000 - FFFFFFFF00000000 - 1 = 0000000000008001 (cc=2) -+sh 00000000FFFFFFFF - FFFFFFFF00000000 - 1 = 0000000000000000 (cc=0) -+sh 0000000080000000 - FFFFFFFF00000000 - 1 = 0000000080000001 (cc=1) -+sh 000000007FFFFFFF - FFFFFFFF00000000 - 1 = 0000000080000000 (cc=3) -+sh FFFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = FFFFFFFF00000000 (cc=0) -+sh 8000000000000000 - FFFFFFFF00000000 - 1 = 8000000000000001 (cc=2) -+sh 7FFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 7FFFFFFF00000000 (cc=0) -+sg 0000000000000000 - FFFFFFFF00000000 - 1 = 0000000100000000 (cc=2) -+sg 0000000000000001 - FFFFFFFF00000000 - 1 = 0000000100000001 (cc=2) -+sg 000000000000FFFF - FFFFFFFF00000000 - 1 = 000000010000FFFF (cc=2) -+sg 0000000000007FFF - FFFFFFFF00000000 - 1 = 0000000100007FFF (cc=2) -+sg 0000000000008000 - FFFFFFFF00000000 - 1 = 0000000100008000 (cc=2) -+sg 00000000FFFFFFFF - FFFFFFFF00000000 - 1 = 00000001FFFFFFFF (cc=2) -+sg 0000000080000000 - FFFFFFFF00000000 - 1 = 0000000180000000 (cc=2) -+sg 000000007FFFFFFF - FFFFFFFF00000000 - 1 = 000000017FFFFFFF (cc=2) -+sg FFFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 00000000FFFFFFFF (cc=2) -+sg 8000000000000000 - FFFFFFFF00000000 - 1 = 8000000100000000 (cc=1) -+sg 7FFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 80000000FFFFFFFF (cc=3) -+sgf 0000000000000000 - FFFFFFFF00000000 - 1 = 0000000000000001 (cc=2) -+sgf 0000000000000001 - FFFFFFFF00000000 - 1 = 0000000000000002 (cc=2) -+sgf 000000000000FFFF - FFFFFFFF00000000 - 1 = 0000000000010000 (cc=2) -+sgf 0000000000007FFF - FFFFFFFF00000000 - 1 = 0000000000008000 (cc=2) -+sgf 0000000000008000 - FFFFFFFF00000000 - 1 = 0000000000008001 (cc=2) -+sgf 00000000FFFFFFFF - FFFFFFFF00000000 - 1 = 0000000100000000 (cc=2) -+sgf 0000000080000000 - FFFFFFFF00000000 - 1 = 0000000080000001 (cc=2) -+sgf 000000007FFFFFFF - FFFFFFFF00000000 - 1 = 0000000080000000 (cc=2) -+sgf FFFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 0000000000000000 (cc=0) -+sgf 8000000000000000 - FFFFFFFF00000000 - 1 = 8000000000000001 (cc=1) -+sgf 7FFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 8000000000000000 (cc=3) -+sl 0000000000000000 - FFFFFFFF00000000 - 1 = 0000000000000001 (cc=1) -+sl 0000000000000001 - FFFFFFFF00000000 - 1 = 0000000000000002 (cc=1) -+sl 000000000000FFFF - FFFFFFFF00000000 - 1 = 0000000000010000 (cc=1) -+sl 0000000000007FFF - FFFFFFFF00000000 - 1 = 0000000000008000 (cc=1) -+sl 0000000000008000 - FFFFFFFF00000000 - 1 = 0000000000008001 (cc=1) -+sl 00000000FFFFFFFF - FFFFFFFF00000000 - 1 = 0000000000000000 (cc=2) -+sl 0000000080000000 - FFFFFFFF00000000 - 1 = 0000000080000001 (cc=1) -+sl 000000007FFFFFFF - FFFFFFFF00000000 - 1 = 0000000080000000 (cc=1) -+sl FFFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = FFFFFFFF00000000 (cc=2) -+sl 8000000000000000 - FFFFFFFF00000000 - 1 = 8000000000000001 (cc=1) -+sl 7FFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 7FFFFFFF00000000 (cc=2) -+slg 0000000000000000 - FFFFFFFF00000000 - 1 = 0000000100000000 (cc=1) -+slg 0000000000000001 - FFFFFFFF00000000 - 1 = 0000000100000001 (cc=1) -+slg 000000000000FFFF - FFFFFFFF00000000 - 1 = 000000010000FFFF (cc=1) -+slg 0000000000007FFF - FFFFFFFF00000000 - 1 = 0000000100007FFF (cc=1) -+slg 0000000000008000 - FFFFFFFF00000000 - 1 = 0000000100008000 (cc=1) -+slg 00000000FFFFFFFF - FFFFFFFF00000000 - 1 = 00000001FFFFFFFF (cc=1) -+slg 0000000080000000 - FFFFFFFF00000000 - 1 = 0000000180000000 (cc=1) -+slg 000000007FFFFFFF - FFFFFFFF00000000 - 1 = 000000017FFFFFFF (cc=1) -+slg FFFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 00000000FFFFFFFF (cc=3) -+slg 8000000000000000 - FFFFFFFF00000000 - 1 = 8000000100000000 (cc=1) -+slg 7FFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 80000000FFFFFFFF (cc=1) -+sgf 0000000000000000 - FFFFFFFF00000000 - 1 = 0000000000000001 (cc=2) -+sgf 0000000000000001 - FFFFFFFF00000000 - 1 = 0000000000000002 (cc=2) -+sgf 000000000000FFFF - FFFFFFFF00000000 - 1 = 0000000000010000 (cc=2) -+sgf 0000000000007FFF - FFFFFFFF00000000 - 1 = 0000000000008000 (cc=2) -+sgf 0000000000008000 - FFFFFFFF00000000 - 1 = 0000000000008001 (cc=2) -+sgf 00000000FFFFFFFF - FFFFFFFF00000000 - 1 = 0000000100000000 (cc=2) -+sgf 0000000080000000 - FFFFFFFF00000000 - 1 = 0000000080000001 (cc=2) -+sgf 000000007FFFFFFF - FFFFFFFF00000000 - 1 = 0000000080000000 (cc=2) -+sgf FFFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 0000000000000000 (cc=0) -+sgf 8000000000000000 - FFFFFFFF00000000 - 1 = 8000000000000001 (cc=1) -+sgf 7FFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 8000000000000000 (cc=3) -+slgf 0000000000000000 - FFFFFFFF00000000 - 1 = FFFFFFFF00000001 (cc=1) -+slgf 0000000000000001 - FFFFFFFF00000000 - 1 = FFFFFFFF00000002 (cc=1) -+slgf 000000000000FFFF - FFFFFFFF00000000 - 1 = FFFFFFFF00010000 (cc=1) -+slgf 0000000000007FFF - FFFFFFFF00000000 - 1 = FFFFFFFF00008000 (cc=1) -+slgf 0000000000008000 - FFFFFFFF00000000 - 1 = FFFFFFFF00008001 (cc=1) -+slgf 00000000FFFFFFFF - FFFFFFFF00000000 - 1 = 0000000000000000 (cc=2) -+slgf 0000000080000000 - FFFFFFFF00000000 - 1 = FFFFFFFF80000001 (cc=1) -+slgf 000000007FFFFFFF - FFFFFFFF00000000 - 1 = FFFFFFFF80000000 (cc=1) -+slgf FFFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = FFFFFFFF00000000 (cc=3) -+slgf 8000000000000000 - FFFFFFFF00000000 - 1 = 7FFFFFFF00000001 (cc=3) -+slgf 7FFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 7FFFFFFF00000000 (cc=3) -+sr 0000000000000000 - FFFFFFFF00000000 - 1 = 0000000000000000 (cc=0) -+sr 0000000000000001 - FFFFFFFF00000000 - 1 = 0000000000000001 (cc=2) -+sr 000000000000FFFF - FFFFFFFF00000000 - 1 = 000000000000FFFF (cc=2) -+sr 0000000000007FFF - FFFFFFFF00000000 - 1 = 0000000000007FFF (cc=2) -+sr 0000000000008000 - FFFFFFFF00000000 - 1 = 0000000000008000 (cc=2) -+sr 00000000FFFFFFFF - FFFFFFFF00000000 - 1 = 00000000FFFFFFFF (cc=1) -+sr 0000000080000000 - FFFFFFFF00000000 - 1 = 0000000080000000 (cc=1) -+sr 000000007FFFFFFF - FFFFFFFF00000000 - 1 = 000000007FFFFFFF (cc=2) -+sr FFFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sr 8000000000000000 - FFFFFFFF00000000 - 1 = 8000000000000000 (cc=0) -+sr 7FFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sgr 0000000000000000 - FFFFFFFF00000000 - 1 = 0000000100000000 (cc=2) -+sgr 0000000000000001 - FFFFFFFF00000000 - 1 = 0000000100000001 (cc=2) -+sgr 000000000000FFFF - FFFFFFFF00000000 - 1 = 000000010000FFFF (cc=2) -+sgr 0000000000007FFF - FFFFFFFF00000000 - 1 = 0000000100007FFF (cc=2) -+sgr 0000000000008000 - FFFFFFFF00000000 - 1 = 0000000100008000 (cc=2) -+sgr 00000000FFFFFFFF - FFFFFFFF00000000 - 1 = 00000001FFFFFFFF (cc=2) -+sgr 0000000080000000 - FFFFFFFF00000000 - 1 = 0000000180000000 (cc=2) -+sgr 000000007FFFFFFF - FFFFFFFF00000000 - 1 = 000000017FFFFFFF (cc=2) -+sgr FFFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 00000000FFFFFFFF (cc=2) -+sgr 8000000000000000 - FFFFFFFF00000000 - 1 = 8000000100000000 (cc=1) -+sgr 7FFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 80000000FFFFFFFF (cc=3) -+sgfr 0000000000000000 - FFFFFFFF00000000 - 1 = 0000000000000000 (cc=0) -+sgfr 0000000000000001 - FFFFFFFF00000000 - 1 = 0000000000000001 (cc=2) -+sgfr 000000000000FFFF - FFFFFFFF00000000 - 1 = 000000000000FFFF (cc=2) -+sgfr 0000000000007FFF - FFFFFFFF00000000 - 1 = 0000000000007FFF (cc=2) -+sgfr 0000000000008000 - FFFFFFFF00000000 - 1 = 0000000000008000 (cc=2) -+sgfr 00000000FFFFFFFF - FFFFFFFF00000000 - 1 = 00000000FFFFFFFF (cc=2) -+sgfr 0000000080000000 - FFFFFFFF00000000 - 1 = 0000000080000000 (cc=2) -+sgfr 000000007FFFFFFF - FFFFFFFF00000000 - 1 = 000000007FFFFFFF (cc=2) -+sgfr FFFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sgfr 8000000000000000 - FFFFFFFF00000000 - 1 = 8000000000000000 (cc=1) -+sgfr 7FFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 7FFFFFFFFFFFFFFF (cc=2) -+slr 0000000000000000 - FFFFFFFF00000000 - 1 = 0000000000000000 (cc=2) -+slr 0000000000000001 - FFFFFFFF00000000 - 1 = 0000000000000001 (cc=3) -+slr 000000000000FFFF - FFFFFFFF00000000 - 1 = 000000000000FFFF (cc=3) -+slr 0000000000007FFF - FFFFFFFF00000000 - 1 = 0000000000007FFF (cc=3) -+slr 0000000000008000 - FFFFFFFF00000000 - 1 = 0000000000008000 (cc=3) -+slr 00000000FFFFFFFF - FFFFFFFF00000000 - 1 = 00000000FFFFFFFF (cc=3) -+slr 0000000080000000 - FFFFFFFF00000000 - 1 = 0000000080000000 (cc=3) -+slr 000000007FFFFFFF - FFFFFFFF00000000 - 1 = 000000007FFFFFFF (cc=3) -+slr FFFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = FFFFFFFFFFFFFFFF (cc=3) -+slr 8000000000000000 - FFFFFFFF00000000 - 1 = 8000000000000000 (cc=2) -+slr 7FFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slgr 0000000000000000 - FFFFFFFF00000000 - 1 = 0000000100000000 (cc=1) -+slgr 0000000000000001 - FFFFFFFF00000000 - 1 = 0000000100000001 (cc=1) -+slgr 000000000000FFFF - FFFFFFFF00000000 - 1 = 000000010000FFFF (cc=1) -+slgr 0000000000007FFF - FFFFFFFF00000000 - 1 = 0000000100007FFF (cc=1) -+slgr 0000000000008000 - FFFFFFFF00000000 - 1 = 0000000100008000 (cc=1) -+slgr 00000000FFFFFFFF - FFFFFFFF00000000 - 1 = 00000001FFFFFFFF (cc=1) -+slgr 0000000080000000 - FFFFFFFF00000000 - 1 = 0000000180000000 (cc=1) -+slgr 000000007FFFFFFF - FFFFFFFF00000000 - 1 = 000000017FFFFFFF (cc=1) -+slgr FFFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 00000000FFFFFFFF (cc=3) -+slgr 8000000000000000 - FFFFFFFF00000000 - 1 = 8000000100000000 (cc=1) -+slgr 7FFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 80000000FFFFFFFF (cc=1) -+slgfr 0000000000000000 - FFFFFFFF00000000 - 1 = 0000000000000000 (cc=2) -+slgfr 0000000000000001 - FFFFFFFF00000000 - 1 = 0000000000000001 (cc=3) -+slgfr 000000000000FFFF - FFFFFFFF00000000 - 1 = 000000000000FFFF (cc=3) -+slgfr 0000000000007FFF - FFFFFFFF00000000 - 1 = 0000000000007FFF (cc=3) -+slgfr 0000000000008000 - FFFFFFFF00000000 - 1 = 0000000000008000 (cc=3) -+slgfr 00000000FFFFFFFF - FFFFFFFF00000000 - 1 = 00000000FFFFFFFF (cc=3) -+slgfr 0000000080000000 - FFFFFFFF00000000 - 1 = 0000000080000000 (cc=3) -+slgfr 000000007FFFFFFF - FFFFFFFF00000000 - 1 = 000000007FFFFFFF (cc=3) -+slgfr FFFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = FFFFFFFFFFFFFFFF (cc=3) -+slgfr 8000000000000000 - FFFFFFFF00000000 - 1 = 8000000000000000 (cc=3) -+slgfr 7FFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slb 0000000000000000 - FFFFFFFF00000000 - 1 = 0000000000000000 (cc=0) -+slb 0000000000000001 - FFFFFFFF00000000 - 1 = 0000000000000001 (cc=1) -+slb 000000000000FFFF - FFFFFFFF00000000 - 1 = 000000000000FFFF (cc=1) -+slb 0000000000007FFF - FFFFFFFF00000000 - 1 = 0000000000007FFF (cc=1) -+slb 0000000000008000 - FFFFFFFF00000000 - 1 = 0000000000008000 (cc=1) -+slb 00000000FFFFFFFF - FFFFFFFF00000000 - 1 = 00000000FFFFFFFF (cc=1) -+slb 0000000080000000 - FFFFFFFF00000000 - 1 = 0000000080000000 (cc=1) -+slb 000000007FFFFFFF - FFFFFFFF00000000 - 1 = 000000007FFFFFFF (cc=1) -+slb FFFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slb 8000000000000000 - FFFFFFFF00000000 - 1 = 8000000000000000 (cc=0) -+slb 7FFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+slbg 0000000000000000 - FFFFFFFF00000000 - 1 = 00000000FFFFFFFF (cc=1) -+slbg 0000000000000001 - FFFFFFFF00000000 - 1 = 0000000100000000 (cc=1) -+slbg 000000000000FFFF - FFFFFFFF00000000 - 1 = 000000010000FFFE (cc=1) -+slbg 0000000000007FFF - FFFFFFFF00000000 - 1 = 0000000100007FFE (cc=1) -+slbg 0000000000008000 - FFFFFFFF00000000 - 1 = 0000000100007FFF (cc=1) -+slbg 00000000FFFFFFFF - FFFFFFFF00000000 - 1 = 00000001FFFFFFFE (cc=1) -+slbg 0000000080000000 - FFFFFFFF00000000 - 1 = 000000017FFFFFFF (cc=1) -+slbg 000000007FFFFFFF - FFFFFFFF00000000 - 1 = 000000017FFFFFFE (cc=1) -+slbg FFFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 00000000FFFFFFFE (cc=3) -+slbg 8000000000000000 - FFFFFFFF00000000 - 1 = 80000000FFFFFFFF (cc=1) -+slbg 7FFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 80000000FFFFFFFE (cc=1) -+slbr 0000000000000000 - FFFFFFFF00000000 - 1 = 00000000FFFFFFFF (cc=1) -+slbr 0000000000000001 - FFFFFFFF00000000 - 1 = 0000000000000000 (cc=2) -+slbr 000000000000FFFF - FFFFFFFF00000000 - 1 = 000000000000FFFE (cc=3) -+slbr 0000000000007FFF - FFFFFFFF00000000 - 1 = 0000000000007FFE (cc=3) -+slbr 0000000000008000 - FFFFFFFF00000000 - 1 = 0000000000007FFF (cc=3) -+slbr 00000000FFFFFFFF - FFFFFFFF00000000 - 1 = 00000000FFFFFFFE (cc=3) -+slbr 0000000080000000 - FFFFFFFF00000000 - 1 = 000000007FFFFFFF (cc=3) -+slbr 000000007FFFFFFF - FFFFFFFF00000000 - 1 = 000000007FFFFFFE (cc=3) -+slbr FFFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = FFFFFFFFFFFFFFFE (cc=3) -+slbr 8000000000000000 - FFFFFFFF00000000 - 1 = 80000000FFFFFFFF (cc=1) -+slbr 7FFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 7FFFFFFFFFFFFFFE (cc=3) -+slbgr 0000000000000000 - FFFFFFFF00000000 - 1 = 00000000FFFFFFFF (cc=1) -+slbgr 0000000000000001 - FFFFFFFF00000000 - 1 = 0000000100000000 (cc=1) -+slbgr 000000000000FFFF - FFFFFFFF00000000 - 1 = 000000010000FFFE (cc=1) -+slbgr 0000000000007FFF - FFFFFFFF00000000 - 1 = 0000000100007FFE (cc=1) -+slbgr 0000000000008000 - FFFFFFFF00000000 - 1 = 0000000100007FFF (cc=1) -+slbgr 00000000FFFFFFFF - FFFFFFFF00000000 - 1 = 00000001FFFFFFFE (cc=1) -+slbgr 0000000080000000 - FFFFFFFF00000000 - 1 = 000000017FFFFFFF (cc=1) -+slbgr 000000007FFFFFFF - FFFFFFFF00000000 - 1 = 000000017FFFFFFE (cc=1) -+slbgr FFFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 00000000FFFFFFFE (cc=3) -+slbgr 8000000000000000 - FFFFFFFF00000000 - 1 = 80000000FFFFFFFF (cc=1) -+slbgr 7FFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 80000000FFFFFFFE (cc=1) -+slb 0000000000000000 - FFFFFFFF00000000 - 0 = 0000000000000001 (cc=1) -+slb 0000000000000001 - FFFFFFFF00000000 - 0 = 0000000000000002 (cc=1) -+slb 000000000000FFFF - FFFFFFFF00000000 - 0 = 0000000000010000 (cc=1) -+slb 0000000000007FFF - FFFFFFFF00000000 - 0 = 0000000000008000 (cc=1) -+slb 0000000000008000 - FFFFFFFF00000000 - 0 = 0000000000008001 (cc=1) -+slb 00000000FFFFFFFF - FFFFFFFF00000000 - 0 = 0000000000000000 (cc=2) -+slb 0000000080000000 - FFFFFFFF00000000 - 0 = 0000000080000001 (cc=1) -+slb 000000007FFFFFFF - FFFFFFFF00000000 - 0 = 0000000080000000 (cc=1) -+slb FFFFFFFFFFFFFFFF - FFFFFFFF00000000 - 0 = FFFFFFFF00000000 (cc=2) -+slb 8000000000000000 - FFFFFFFF00000000 - 0 = 8000000000000001 (cc=1) -+slb 7FFFFFFFFFFFFFFF - FFFFFFFF00000000 - 0 = 7FFFFFFF00000000 (cc=2) -+slbg 0000000000000000 - FFFFFFFF00000000 - 0 = 0000000100000000 (cc=1) -+slbg 0000000000000001 - FFFFFFFF00000000 - 0 = 0000000100000001 (cc=1) -+slbg 000000000000FFFF - FFFFFFFF00000000 - 0 = 000000010000FFFF (cc=1) -+slbg 0000000000007FFF - FFFFFFFF00000000 - 0 = 0000000100007FFF (cc=1) -+slbg 0000000000008000 - FFFFFFFF00000000 - 0 = 0000000100008000 (cc=1) -+slbg 00000000FFFFFFFF - FFFFFFFF00000000 - 0 = 00000001FFFFFFFF (cc=1) -+slbg 0000000080000000 - FFFFFFFF00000000 - 0 = 0000000180000000 (cc=1) -+slbg 000000007FFFFFFF - FFFFFFFF00000000 - 0 = 000000017FFFFFFF (cc=1) -+slbg FFFFFFFFFFFFFFFF - FFFFFFFF00000000 - 0 = 00000000FFFFFFFF (cc=3) -+slbg 8000000000000000 - FFFFFFFF00000000 - 0 = 8000000100000000 (cc=1) -+slbg 7FFFFFFFFFFFFFFF - FFFFFFFF00000000 - 0 = 80000000FFFFFFFF (cc=1) -+slbr 0000000000000000 - FFFFFFFF00000000 - 0 = 0000000000000000 (cc=2) -+slbr 0000000000000001 - FFFFFFFF00000000 - 0 = 0000000000000001 (cc=3) -+slbr 000000000000FFFF - FFFFFFFF00000000 - 0 = 000000000000FFFF (cc=3) -+slbr 0000000000007FFF - FFFFFFFF00000000 - 0 = 0000000000007FFF (cc=3) -+slbr 0000000000008000 - FFFFFFFF00000000 - 0 = 0000000000008000 (cc=3) -+slbr 00000000FFFFFFFF - FFFFFFFF00000000 - 0 = 00000000FFFFFFFF (cc=3) -+slbr 0000000080000000 - FFFFFFFF00000000 - 0 = 0000000080000000 (cc=3) -+slbr 000000007FFFFFFF - FFFFFFFF00000000 - 0 = 000000007FFFFFFF (cc=3) -+slbr FFFFFFFFFFFFFFFF - FFFFFFFF00000000 - 0 = FFFFFFFFFFFFFFFF (cc=3) -+slbr 8000000000000000 - FFFFFFFF00000000 - 0 = 8000000000000000 (cc=2) -+slbr 7FFFFFFFFFFFFFFF - FFFFFFFF00000000 - 0 = 7FFFFFFFFFFFFFFF (cc=3) -+slbgr 0000000000000000 - FFFFFFFF00000000 - 0 = 0000000100000000 (cc=1) -+slbgr 0000000000000001 - FFFFFFFF00000000 - 0 = 0000000100000001 (cc=1) -+slbgr 000000000000FFFF - FFFFFFFF00000000 - 0 = 000000010000FFFF (cc=1) -+slbgr 0000000000007FFF - FFFFFFFF00000000 - 0 = 0000000100007FFF (cc=1) -+slbgr 0000000000008000 - FFFFFFFF00000000 - 0 = 0000000100008000 (cc=1) -+slbgr 00000000FFFFFFFF - FFFFFFFF00000000 - 0 = 00000001FFFFFFFF (cc=1) -+slbgr 0000000080000000 - FFFFFFFF00000000 - 0 = 0000000180000000 (cc=1) -+slbgr 000000007FFFFFFF - FFFFFFFF00000000 - 0 = 000000017FFFFFFF (cc=1) -+slbgr FFFFFFFFFFFFFFFF - FFFFFFFF00000000 - 0 = 00000000FFFFFFFF (cc=3) -+slbgr 8000000000000000 - FFFFFFFF00000000 - 0 = 8000000100000000 (cc=1) -+slbgr 7FFFFFFFFFFFFFFF - FFFFFFFF00000000 - 0 = 80000000FFFFFFFF (cc=1) -+shy 0000000000000000 - FFFFFFFF00000000 - 1 = 0000000000000001 (cc=2) -+shy 0000000000000001 - FFFFFFFF00000000 - 1 = 0000000000000002 (cc=2) -+shy 000000000000FFFF - FFFFFFFF00000000 - 1 = 0000000000010000 (cc=2) -+shy 0000000000007FFF - FFFFFFFF00000000 - 1 = 0000000000008000 (cc=2) -+shy 0000000000008000 - FFFFFFFF00000000 - 1 = 0000000000008001 (cc=2) -+shy 00000000FFFFFFFF - FFFFFFFF00000000 - 1 = 0000000000000000 (cc=0) -+shy 0000000080000000 - FFFFFFFF00000000 - 1 = 0000000080000001 (cc=1) -+shy 000000007FFFFFFF - FFFFFFFF00000000 - 1 = 0000000080000000 (cc=3) -+shy FFFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = FFFFFFFF00000000 (cc=0) -+shy 8000000000000000 - FFFFFFFF00000000 - 1 = 8000000000000001 (cc=2) -+shy 7FFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 7FFFFFFF00000000 (cc=0) -+sly 0000000000000000 - FFFFFFFF00000000 - 1 = 0000000000000001 (cc=1) -+sly 0000000000000001 - FFFFFFFF00000000 - 1 = 0000000000000002 (cc=1) -+sly 000000000000FFFF - FFFFFFFF00000000 - 1 = 0000000000010000 (cc=1) -+sly 0000000000007FFF - FFFFFFFF00000000 - 1 = 0000000000008000 (cc=1) -+sly 0000000000008000 - FFFFFFFF00000000 - 1 = 0000000000008001 (cc=1) -+sly 00000000FFFFFFFF - FFFFFFFF00000000 - 1 = 0000000000000000 (cc=2) -+sly 0000000080000000 - FFFFFFFF00000000 - 1 = 0000000080000001 (cc=1) -+sly 000000007FFFFFFF - FFFFFFFF00000000 - 1 = 0000000080000000 (cc=1) -+sly FFFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = FFFFFFFF00000000 (cc=2) -+sly 8000000000000000 - FFFFFFFF00000000 - 1 = 8000000000000001 (cc=1) -+sly 7FFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 7FFFFFFF00000000 (cc=2) -+sy 0000000000000000 - FFFFFFFF00000000 - 1 = 0000000000000001 (cc=2) -+sy 0000000000000001 - FFFFFFFF00000000 - 1 = 0000000000000002 (cc=2) -+sy 000000000000FFFF - FFFFFFFF00000000 - 1 = 0000000000010000 (cc=2) -+sy 0000000000007FFF - FFFFFFFF00000000 - 1 = 0000000000008000 (cc=2) -+sy 0000000000008000 - FFFFFFFF00000000 - 1 = 0000000000008001 (cc=2) -+sy 00000000FFFFFFFF - FFFFFFFF00000000 - 1 = 0000000000000000 (cc=0) -+sy 0000000080000000 - FFFFFFFF00000000 - 1 = 0000000080000001 (cc=1) -+sy 000000007FFFFFFF - FFFFFFFF00000000 - 1 = 0000000080000000 (cc=3) -+sy FFFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = FFFFFFFF00000000 (cc=0) -+sy 8000000000000000 - FFFFFFFF00000000 - 1 = 8000000000000001 (cc=2) -+sy 7FFFFFFFFFFFFFFF - FFFFFFFF00000000 - 1 = 7FFFFFFF00000000 (cc=0) -+s 0000000000000000 - 000000007FFFFFFF - 1 = 0000000000000000 (cc=0) -+s 0000000000000001 - 000000007FFFFFFF - 1 = 0000000000000001 (cc=2) -+s 000000000000FFFF - 000000007FFFFFFF - 1 = 000000000000FFFF (cc=2) -+s 0000000000007FFF - 000000007FFFFFFF - 1 = 0000000000007FFF (cc=2) -+s 0000000000008000 - 000000007FFFFFFF - 1 = 0000000000008000 (cc=2) -+s 00000000FFFFFFFF - 000000007FFFFFFF - 1 = 00000000FFFFFFFF (cc=1) -+s 0000000080000000 - 000000007FFFFFFF - 1 = 0000000080000000 (cc=1) -+s 000000007FFFFFFF - 000000007FFFFFFF - 1 = 000000007FFFFFFF (cc=2) -+s FFFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+s 8000000000000000 - 000000007FFFFFFF - 1 = 8000000000000000 (cc=0) -+s 7FFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sh 0000000000000000 - 000000007FFFFFFF - 1 = 0000000000000000 (cc=0) -+sh 0000000000000001 - 000000007FFFFFFF - 1 = 0000000000000001 (cc=2) -+sh 000000000000FFFF - 000000007FFFFFFF - 1 = 000000000000FFFF (cc=2) -+sh 0000000000007FFF - 000000007FFFFFFF - 1 = 0000000000007FFF (cc=2) -+sh 0000000000008000 - 000000007FFFFFFF - 1 = 0000000000008000 (cc=2) -+sh 00000000FFFFFFFF - 000000007FFFFFFF - 1 = 00000000FFFFFFFF (cc=1) -+sh 0000000080000000 - 000000007FFFFFFF - 1 = 0000000080000000 (cc=1) -+sh 000000007FFFFFFF - 000000007FFFFFFF - 1 = 000000007FFFFFFF (cc=2) -+sh FFFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sh 8000000000000000 - 000000007FFFFFFF - 1 = 8000000000000000 (cc=0) -+sh 7FFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sg 0000000000000000 - 000000007FFFFFFF - 1 = FFFFFFFF80000001 (cc=1) -+sg 0000000000000001 - 000000007FFFFFFF - 1 = FFFFFFFF80000002 (cc=1) -+sg 000000000000FFFF - 000000007FFFFFFF - 1 = FFFFFFFF80010000 (cc=1) -+sg 0000000000007FFF - 000000007FFFFFFF - 1 = FFFFFFFF80008000 (cc=1) -+sg 0000000000008000 - 000000007FFFFFFF - 1 = FFFFFFFF80008001 (cc=1) -+sg 00000000FFFFFFFF - 000000007FFFFFFF - 1 = 0000000080000000 (cc=2) -+sg 0000000080000000 - 000000007FFFFFFF - 1 = 0000000000000001 (cc=2) -+sg 000000007FFFFFFF - 000000007FFFFFFF - 1 = 0000000000000000 (cc=0) -+sg FFFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = FFFFFFFF80000000 (cc=1) -+sg 8000000000000000 - 000000007FFFFFFF - 1 = 7FFFFFFF80000001 (cc=3) -+sg 7FFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = 7FFFFFFF80000000 (cc=2) -+sgf 0000000000000000 - 000000007FFFFFFF - 1 = 0000000000000000 (cc=0) -+sgf 0000000000000001 - 000000007FFFFFFF - 1 = 0000000000000001 (cc=2) -+sgf 000000000000FFFF - 000000007FFFFFFF - 1 = 000000000000FFFF (cc=2) -+sgf 0000000000007FFF - 000000007FFFFFFF - 1 = 0000000000007FFF (cc=2) -+sgf 0000000000008000 - 000000007FFFFFFF - 1 = 0000000000008000 (cc=2) -+sgf 00000000FFFFFFFF - 000000007FFFFFFF - 1 = 00000000FFFFFFFF (cc=2) -+sgf 0000000080000000 - 000000007FFFFFFF - 1 = 0000000080000000 (cc=2) -+sgf 000000007FFFFFFF - 000000007FFFFFFF - 1 = 000000007FFFFFFF (cc=2) -+sgf FFFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sgf 8000000000000000 - 000000007FFFFFFF - 1 = 8000000000000000 (cc=1) -+sgf 7FFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = 7FFFFFFFFFFFFFFF (cc=2) -+sl 0000000000000000 - 000000007FFFFFFF - 1 = 0000000000000000 (cc=2) -+sl 0000000000000001 - 000000007FFFFFFF - 1 = 0000000000000001 (cc=3) -+sl 000000000000FFFF - 000000007FFFFFFF - 1 = 000000000000FFFF (cc=3) -+sl 0000000000007FFF - 000000007FFFFFFF - 1 = 0000000000007FFF (cc=3) -+sl 0000000000008000 - 000000007FFFFFFF - 1 = 0000000000008000 (cc=3) -+sl 00000000FFFFFFFF - 000000007FFFFFFF - 1 = 00000000FFFFFFFF (cc=3) -+sl 0000000080000000 - 000000007FFFFFFF - 1 = 0000000080000000 (cc=3) -+sl 000000007FFFFFFF - 000000007FFFFFFF - 1 = 000000007FFFFFFF (cc=3) -+sl FFFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=3) -+sl 8000000000000000 - 000000007FFFFFFF - 1 = 8000000000000000 (cc=2) -+sl 7FFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slg 0000000000000000 - 000000007FFFFFFF - 1 = FFFFFFFF80000001 (cc=1) -+slg 0000000000000001 - 000000007FFFFFFF - 1 = FFFFFFFF80000002 (cc=1) -+slg 000000000000FFFF - 000000007FFFFFFF - 1 = FFFFFFFF80010000 (cc=1) -+slg 0000000000007FFF - 000000007FFFFFFF - 1 = FFFFFFFF80008000 (cc=1) -+slg 0000000000008000 - 000000007FFFFFFF - 1 = FFFFFFFF80008001 (cc=1) -+slg 00000000FFFFFFFF - 000000007FFFFFFF - 1 = 0000000080000000 (cc=3) -+slg 0000000080000000 - 000000007FFFFFFF - 1 = 0000000000000001 (cc=3) -+slg 000000007FFFFFFF - 000000007FFFFFFF - 1 = 0000000000000000 (cc=2) -+slg FFFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = FFFFFFFF80000000 (cc=3) -+slg 8000000000000000 - 000000007FFFFFFF - 1 = 7FFFFFFF80000001 (cc=3) -+slg 7FFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = 7FFFFFFF80000000 (cc=3) -+sgf 0000000000000000 - 000000007FFFFFFF - 1 = 0000000000000000 (cc=0) -+sgf 0000000000000001 - 000000007FFFFFFF - 1 = 0000000000000001 (cc=2) -+sgf 000000000000FFFF - 000000007FFFFFFF - 1 = 000000000000FFFF (cc=2) -+sgf 0000000000007FFF - 000000007FFFFFFF - 1 = 0000000000007FFF (cc=2) -+sgf 0000000000008000 - 000000007FFFFFFF - 1 = 0000000000008000 (cc=2) -+sgf 00000000FFFFFFFF - 000000007FFFFFFF - 1 = 00000000FFFFFFFF (cc=2) -+sgf 0000000080000000 - 000000007FFFFFFF - 1 = 0000000080000000 (cc=2) -+sgf 000000007FFFFFFF - 000000007FFFFFFF - 1 = 000000007FFFFFFF (cc=2) -+sgf FFFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sgf 8000000000000000 - 000000007FFFFFFF - 1 = 8000000000000000 (cc=1) -+sgf 7FFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = 7FFFFFFFFFFFFFFF (cc=2) -+slgf 0000000000000000 - 000000007FFFFFFF - 1 = 0000000000000000 (cc=2) -+slgf 0000000000000001 - 000000007FFFFFFF - 1 = 0000000000000001 (cc=3) -+slgf 000000000000FFFF - 000000007FFFFFFF - 1 = 000000000000FFFF (cc=3) -+slgf 0000000000007FFF - 000000007FFFFFFF - 1 = 0000000000007FFF (cc=3) -+slgf 0000000000008000 - 000000007FFFFFFF - 1 = 0000000000008000 (cc=3) -+slgf 00000000FFFFFFFF - 000000007FFFFFFF - 1 = 00000000FFFFFFFF (cc=3) -+slgf 0000000080000000 - 000000007FFFFFFF - 1 = 0000000080000000 (cc=3) -+slgf 000000007FFFFFFF - 000000007FFFFFFF - 1 = 000000007FFFFFFF (cc=3) -+slgf FFFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=3) -+slgf 8000000000000000 - 000000007FFFFFFF - 1 = 8000000000000000 (cc=3) -+slgf 7FFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+sr 0000000000000000 - 000000007FFFFFFF - 1 = 0000000080000001 (cc=1) -+sr 0000000000000001 - 000000007FFFFFFF - 1 = 0000000080000002 (cc=1) -+sr 000000000000FFFF - 000000007FFFFFFF - 1 = 0000000080010000 (cc=1) -+sr 0000000000007FFF - 000000007FFFFFFF - 1 = 0000000080008000 (cc=1) -+sr 0000000000008000 - 000000007FFFFFFF - 1 = 0000000080008001 (cc=1) -+sr 00000000FFFFFFFF - 000000007FFFFFFF - 1 = 0000000080000000 (cc=1) -+sr 0000000080000000 - 000000007FFFFFFF - 1 = 0000000000000001 (cc=3) -+sr 000000007FFFFFFF - 000000007FFFFFFF - 1 = 0000000000000000 (cc=0) -+sr FFFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = FFFFFFFF80000000 (cc=1) -+sr 8000000000000000 - 000000007FFFFFFF - 1 = 8000000080000001 (cc=1) -+sr 7FFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = 7FFFFFFF80000000 (cc=1) -+sgr 0000000000000000 - 000000007FFFFFFF - 1 = FFFFFFFF80000001 (cc=1) -+sgr 0000000000000001 - 000000007FFFFFFF - 1 = FFFFFFFF80000002 (cc=1) -+sgr 000000000000FFFF - 000000007FFFFFFF - 1 = FFFFFFFF80010000 (cc=1) -+sgr 0000000000007FFF - 000000007FFFFFFF - 1 = FFFFFFFF80008000 (cc=1) -+sgr 0000000000008000 - 000000007FFFFFFF - 1 = FFFFFFFF80008001 (cc=1) -+sgr 00000000FFFFFFFF - 000000007FFFFFFF - 1 = 0000000080000000 (cc=2) -+sgr 0000000080000000 - 000000007FFFFFFF - 1 = 0000000000000001 (cc=2) -+sgr 000000007FFFFFFF - 000000007FFFFFFF - 1 = 0000000000000000 (cc=0) -+sgr FFFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = FFFFFFFF80000000 (cc=1) -+sgr 8000000000000000 - 000000007FFFFFFF - 1 = 7FFFFFFF80000001 (cc=3) -+sgr 7FFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = 7FFFFFFF80000000 (cc=2) -+sgfr 0000000000000000 - 000000007FFFFFFF - 1 = FFFFFFFF80000001 (cc=1) -+sgfr 0000000000000001 - 000000007FFFFFFF - 1 = FFFFFFFF80000002 (cc=1) -+sgfr 000000000000FFFF - 000000007FFFFFFF - 1 = FFFFFFFF80010000 (cc=1) -+sgfr 0000000000007FFF - 000000007FFFFFFF - 1 = FFFFFFFF80008000 (cc=1) -+sgfr 0000000000008000 - 000000007FFFFFFF - 1 = FFFFFFFF80008001 (cc=1) -+sgfr 00000000FFFFFFFF - 000000007FFFFFFF - 1 = 0000000080000000 (cc=2) -+sgfr 0000000080000000 - 000000007FFFFFFF - 1 = 0000000000000001 (cc=2) -+sgfr 000000007FFFFFFF - 000000007FFFFFFF - 1 = 0000000000000000 (cc=0) -+sgfr FFFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = FFFFFFFF80000000 (cc=1) -+sgfr 8000000000000000 - 000000007FFFFFFF - 1 = 7FFFFFFF80000001 (cc=3) -+sgfr 7FFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = 7FFFFFFF80000000 (cc=2) -+slr 0000000000000000 - 000000007FFFFFFF - 1 = 0000000080000001 (cc=1) -+slr 0000000000000001 - 000000007FFFFFFF - 1 = 0000000080000002 (cc=1) -+slr 000000000000FFFF - 000000007FFFFFFF - 1 = 0000000080010000 (cc=1) -+slr 0000000000007FFF - 000000007FFFFFFF - 1 = 0000000080008000 (cc=1) -+slr 0000000000008000 - 000000007FFFFFFF - 1 = 0000000080008001 (cc=1) -+slr 00000000FFFFFFFF - 000000007FFFFFFF - 1 = 0000000080000000 (cc=3) -+slr 0000000080000000 - 000000007FFFFFFF - 1 = 0000000000000001 (cc=3) -+slr 000000007FFFFFFF - 000000007FFFFFFF - 1 = 0000000000000000 (cc=2) -+slr FFFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = FFFFFFFF80000000 (cc=3) -+slr 8000000000000000 - 000000007FFFFFFF - 1 = 8000000080000001 (cc=1) -+slr 7FFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = 7FFFFFFF80000000 (cc=3) -+slgr 0000000000000000 - 000000007FFFFFFF - 1 = FFFFFFFF80000001 (cc=1) -+slgr 0000000000000001 - 000000007FFFFFFF - 1 = FFFFFFFF80000002 (cc=1) -+slgr 000000000000FFFF - 000000007FFFFFFF - 1 = FFFFFFFF80010000 (cc=1) -+slgr 0000000000007FFF - 000000007FFFFFFF - 1 = FFFFFFFF80008000 (cc=1) -+slgr 0000000000008000 - 000000007FFFFFFF - 1 = FFFFFFFF80008001 (cc=1) -+slgr 00000000FFFFFFFF - 000000007FFFFFFF - 1 = 0000000080000000 (cc=3) -+slgr 0000000080000000 - 000000007FFFFFFF - 1 = 0000000000000001 (cc=3) -+slgr 000000007FFFFFFF - 000000007FFFFFFF - 1 = 0000000000000000 (cc=2) -+slgr FFFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = FFFFFFFF80000000 (cc=3) -+slgr 8000000000000000 - 000000007FFFFFFF - 1 = 7FFFFFFF80000001 (cc=3) -+slgr 7FFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = 7FFFFFFF80000000 (cc=3) -+slgfr 0000000000000000 - 000000007FFFFFFF - 1 = FFFFFFFF80000001 (cc=1) -+slgfr 0000000000000001 - 000000007FFFFFFF - 1 = FFFFFFFF80000002 (cc=1) -+slgfr 000000000000FFFF - 000000007FFFFFFF - 1 = FFFFFFFF80010000 (cc=1) -+slgfr 0000000000007FFF - 000000007FFFFFFF - 1 = FFFFFFFF80008000 (cc=1) -+slgfr 0000000000008000 - 000000007FFFFFFF - 1 = FFFFFFFF80008001 (cc=1) -+slgfr 00000000FFFFFFFF - 000000007FFFFFFF - 1 = 0000000080000000 (cc=3) -+slgfr 0000000080000000 - 000000007FFFFFFF - 1 = 0000000000000001 (cc=3) -+slgfr 000000007FFFFFFF - 000000007FFFFFFF - 1 = 0000000000000000 (cc=2) -+slgfr FFFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = FFFFFFFF80000000 (cc=3) -+slgfr 8000000000000000 - 000000007FFFFFFF - 1 = 7FFFFFFF80000001 (cc=3) -+slgfr 7FFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = 7FFFFFFF80000000 (cc=3) -+slb 0000000000000000 - 000000007FFFFFFF - 1 = 00000000FFFFFFFF (cc=1) -+slb 0000000000000001 - 000000007FFFFFFF - 1 = 0000000000000000 (cc=2) -+slb 000000000000FFFF - 000000007FFFFFFF - 1 = 000000000000FFFE (cc=3) -+slb 0000000000007FFF - 000000007FFFFFFF - 1 = 0000000000007FFE (cc=3) -+slb 0000000000008000 - 000000007FFFFFFF - 1 = 0000000000007FFF (cc=3) -+slb 00000000FFFFFFFF - 000000007FFFFFFF - 1 = 00000000FFFFFFFE (cc=3) -+slb 0000000080000000 - 000000007FFFFFFF - 1 = 000000007FFFFFFF (cc=3) -+slb 000000007FFFFFFF - 000000007FFFFFFF - 1 = 000000007FFFFFFE (cc=3) -+slb FFFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = FFFFFFFFFFFFFFFE (cc=3) -+slb 8000000000000000 - 000000007FFFFFFF - 1 = 80000000FFFFFFFF (cc=1) -+slb 7FFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = 7FFFFFFFFFFFFFFE (cc=3) -+slbg 0000000000000000 - 000000007FFFFFFF - 1 = FFFFFFFF80000000 (cc=1) -+slbg 0000000000000001 - 000000007FFFFFFF - 1 = FFFFFFFF80000001 (cc=1) -+slbg 000000000000FFFF - 000000007FFFFFFF - 1 = FFFFFFFF8000FFFF (cc=1) -+slbg 0000000000007FFF - 000000007FFFFFFF - 1 = FFFFFFFF80007FFF (cc=1) -+slbg 0000000000008000 - 000000007FFFFFFF - 1 = FFFFFFFF80008000 (cc=1) -+slbg 00000000FFFFFFFF - 000000007FFFFFFF - 1 = 000000007FFFFFFF (cc=3) -+slbg 0000000080000000 - 000000007FFFFFFF - 1 = 0000000000000000 (cc=2) -+slbg 000000007FFFFFFF - 000000007FFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slbg FFFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = FFFFFFFF7FFFFFFF (cc=3) -+slbg 8000000000000000 - 000000007FFFFFFF - 1 = 7FFFFFFF80000000 (cc=3) -+slbg 7FFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = 7FFFFFFF7FFFFFFF (cc=3) -+slbr 0000000000000000 - 000000007FFFFFFF - 1 = 0000000080000000 (cc=1) -+slbr 0000000000000001 - 000000007FFFFFFF - 1 = 0000000080000001 (cc=1) -+slbr 000000000000FFFF - 000000007FFFFFFF - 1 = 000000008000FFFF (cc=1) -+slbr 0000000000007FFF - 000000007FFFFFFF - 1 = 0000000080007FFF (cc=1) -+slbr 0000000000008000 - 000000007FFFFFFF - 1 = 0000000080008000 (cc=1) -+slbr 00000000FFFFFFFF - 000000007FFFFFFF - 1 = 000000007FFFFFFF (cc=3) -+slbr 0000000080000000 - 000000007FFFFFFF - 1 = 0000000000000000 (cc=2) -+slbr 000000007FFFFFFF - 000000007FFFFFFF - 1 = 00000000FFFFFFFF (cc=1) -+slbr FFFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = FFFFFFFF7FFFFFFF (cc=3) -+slbr 8000000000000000 - 000000007FFFFFFF - 1 = 8000000080000000 (cc=1) -+slbr 7FFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = 7FFFFFFF7FFFFFFF (cc=3) -+slbgr 0000000000000000 - 000000007FFFFFFF - 1 = FFFFFFFF80000000 (cc=1) -+slbgr 0000000000000001 - 000000007FFFFFFF - 1 = FFFFFFFF80000001 (cc=1) -+slbgr 000000000000FFFF - 000000007FFFFFFF - 1 = FFFFFFFF8000FFFF (cc=1) -+slbgr 0000000000007FFF - 000000007FFFFFFF - 1 = FFFFFFFF80007FFF (cc=1) -+slbgr 0000000000008000 - 000000007FFFFFFF - 1 = FFFFFFFF80008000 (cc=1) -+slbgr 00000000FFFFFFFF - 000000007FFFFFFF - 1 = 000000007FFFFFFF (cc=3) -+slbgr 0000000080000000 - 000000007FFFFFFF - 1 = 0000000000000000 (cc=2) -+slbgr 000000007FFFFFFF - 000000007FFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slbgr FFFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = FFFFFFFF7FFFFFFF (cc=3) -+slbgr 8000000000000000 - 000000007FFFFFFF - 1 = 7FFFFFFF80000000 (cc=3) -+slbgr 7FFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = 7FFFFFFF7FFFFFFF (cc=3) -+slb 0000000000000000 - 000000007FFFFFFF - 0 = 0000000000000000 (cc=2) -+slb 0000000000000001 - 000000007FFFFFFF - 0 = 0000000000000001 (cc=3) -+slb 000000000000FFFF - 000000007FFFFFFF - 0 = 000000000000FFFF (cc=3) -+slb 0000000000007FFF - 000000007FFFFFFF - 0 = 0000000000007FFF (cc=3) -+slb 0000000000008000 - 000000007FFFFFFF - 0 = 0000000000008000 (cc=3) -+slb 00000000FFFFFFFF - 000000007FFFFFFF - 0 = 00000000FFFFFFFF (cc=3) -+slb 0000000080000000 - 000000007FFFFFFF - 0 = 0000000080000000 (cc=3) -+slb 000000007FFFFFFF - 000000007FFFFFFF - 0 = 000000007FFFFFFF (cc=3) -+slb FFFFFFFFFFFFFFFF - 000000007FFFFFFF - 0 = FFFFFFFFFFFFFFFF (cc=3) -+slb 8000000000000000 - 000000007FFFFFFF - 0 = 8000000000000000 (cc=2) -+slb 7FFFFFFFFFFFFFFF - 000000007FFFFFFF - 0 = 7FFFFFFFFFFFFFFF (cc=3) -+slbg 0000000000000000 - 000000007FFFFFFF - 0 = FFFFFFFF80000001 (cc=1) -+slbg 0000000000000001 - 000000007FFFFFFF - 0 = FFFFFFFF80000002 (cc=1) -+slbg 000000000000FFFF - 000000007FFFFFFF - 0 = FFFFFFFF80010000 (cc=1) -+slbg 0000000000007FFF - 000000007FFFFFFF - 0 = FFFFFFFF80008000 (cc=1) -+slbg 0000000000008000 - 000000007FFFFFFF - 0 = FFFFFFFF80008001 (cc=1) -+slbg 00000000FFFFFFFF - 000000007FFFFFFF - 0 = 0000000080000000 (cc=3) -+slbg 0000000080000000 - 000000007FFFFFFF - 0 = 0000000000000001 (cc=3) -+slbg 000000007FFFFFFF - 000000007FFFFFFF - 0 = 0000000000000000 (cc=2) -+slbg FFFFFFFFFFFFFFFF - 000000007FFFFFFF - 0 = FFFFFFFF80000000 (cc=3) -+slbg 8000000000000000 - 000000007FFFFFFF - 0 = 7FFFFFFF80000001 (cc=3) -+slbg 7FFFFFFFFFFFFFFF - 000000007FFFFFFF - 0 = 7FFFFFFF80000000 (cc=3) -+slbr 0000000000000000 - 000000007FFFFFFF - 0 = 0000000080000001 (cc=1) -+slbr 0000000000000001 - 000000007FFFFFFF - 0 = 0000000080000002 (cc=1) -+slbr 000000000000FFFF - 000000007FFFFFFF - 0 = 0000000080010000 (cc=1) -+slbr 0000000000007FFF - 000000007FFFFFFF - 0 = 0000000080008000 (cc=1) -+slbr 0000000000008000 - 000000007FFFFFFF - 0 = 0000000080008001 (cc=1) -+slbr 00000000FFFFFFFF - 000000007FFFFFFF - 0 = 0000000080000000 (cc=3) -+slbr 0000000080000000 - 000000007FFFFFFF - 0 = 0000000000000001 (cc=3) -+slbr 000000007FFFFFFF - 000000007FFFFFFF - 0 = 0000000000000000 (cc=2) -+slbr FFFFFFFFFFFFFFFF - 000000007FFFFFFF - 0 = FFFFFFFF80000000 (cc=3) -+slbr 8000000000000000 - 000000007FFFFFFF - 0 = 8000000080000001 (cc=1) -+slbr 7FFFFFFFFFFFFFFF - 000000007FFFFFFF - 0 = 7FFFFFFF80000000 (cc=3) -+slbgr 0000000000000000 - 000000007FFFFFFF - 0 = FFFFFFFF80000001 (cc=1) -+slbgr 0000000000000001 - 000000007FFFFFFF - 0 = FFFFFFFF80000002 (cc=1) -+slbgr 000000000000FFFF - 000000007FFFFFFF - 0 = FFFFFFFF80010000 (cc=1) -+slbgr 0000000000007FFF - 000000007FFFFFFF - 0 = FFFFFFFF80008000 (cc=1) -+slbgr 0000000000008000 - 000000007FFFFFFF - 0 = FFFFFFFF80008001 (cc=1) -+slbgr 00000000FFFFFFFF - 000000007FFFFFFF - 0 = 0000000080000000 (cc=3) -+slbgr 0000000080000000 - 000000007FFFFFFF - 0 = 0000000000000001 (cc=3) -+slbgr 000000007FFFFFFF - 000000007FFFFFFF - 0 = 0000000000000000 (cc=2) -+slbgr FFFFFFFFFFFFFFFF - 000000007FFFFFFF - 0 = FFFFFFFF80000000 (cc=3) -+slbgr 8000000000000000 - 000000007FFFFFFF - 0 = 7FFFFFFF80000001 (cc=3) -+slbgr 7FFFFFFFFFFFFFFF - 000000007FFFFFFF - 0 = 7FFFFFFF80000000 (cc=3) -+shy 0000000000000000 - 000000007FFFFFFF - 1 = 0000000000000000 (cc=0) -+shy 0000000000000001 - 000000007FFFFFFF - 1 = 0000000000000001 (cc=2) -+shy 000000000000FFFF - 000000007FFFFFFF - 1 = 000000000000FFFF (cc=2) -+shy 0000000000007FFF - 000000007FFFFFFF - 1 = 0000000000007FFF (cc=2) -+shy 0000000000008000 - 000000007FFFFFFF - 1 = 0000000000008000 (cc=2) -+shy 00000000FFFFFFFF - 000000007FFFFFFF - 1 = 00000000FFFFFFFF (cc=1) -+shy 0000000080000000 - 000000007FFFFFFF - 1 = 0000000080000000 (cc=1) -+shy 000000007FFFFFFF - 000000007FFFFFFF - 1 = 000000007FFFFFFF (cc=2) -+shy FFFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+shy 8000000000000000 - 000000007FFFFFFF - 1 = 8000000000000000 (cc=0) -+shy 7FFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sly 0000000000000000 - 000000007FFFFFFF - 1 = 0000000000000000 (cc=2) -+sly 0000000000000001 - 000000007FFFFFFF - 1 = 0000000000000001 (cc=3) -+sly 000000000000FFFF - 000000007FFFFFFF - 1 = 000000000000FFFF (cc=3) -+sly 0000000000007FFF - 000000007FFFFFFF - 1 = 0000000000007FFF (cc=3) -+sly 0000000000008000 - 000000007FFFFFFF - 1 = 0000000000008000 (cc=3) -+sly 00000000FFFFFFFF - 000000007FFFFFFF - 1 = 00000000FFFFFFFF (cc=3) -+sly 0000000080000000 - 000000007FFFFFFF - 1 = 0000000080000000 (cc=3) -+sly 000000007FFFFFFF - 000000007FFFFFFF - 1 = 000000007FFFFFFF (cc=3) -+sly FFFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=3) -+sly 8000000000000000 - 000000007FFFFFFF - 1 = 8000000000000000 (cc=2) -+sly 7FFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+sy 0000000000000000 - 000000007FFFFFFF - 1 = 0000000000000000 (cc=0) -+sy 0000000000000001 - 000000007FFFFFFF - 1 = 0000000000000001 (cc=2) -+sy 000000000000FFFF - 000000007FFFFFFF - 1 = 000000000000FFFF (cc=2) -+sy 0000000000007FFF - 000000007FFFFFFF - 1 = 0000000000007FFF (cc=2) -+sy 0000000000008000 - 000000007FFFFFFF - 1 = 0000000000008000 (cc=2) -+sy 00000000FFFFFFFF - 000000007FFFFFFF - 1 = 00000000FFFFFFFF (cc=1) -+sy 0000000080000000 - 000000007FFFFFFF - 1 = 0000000080000000 (cc=1) -+sy 000000007FFFFFFF - 000000007FFFFFFF - 1 = 000000007FFFFFFF (cc=2) -+sy FFFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sy 8000000000000000 - 000000007FFFFFFF - 1 = 8000000000000000 (cc=0) -+sy 7FFFFFFFFFFFFFFF - 000000007FFFFFFF - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+s 0000000000000000 - 0000000080000000 - 1 = 0000000000000000 (cc=0) -+s 0000000000000001 - 0000000080000000 - 1 = 0000000000000001 (cc=2) -+s 000000000000FFFF - 0000000080000000 - 1 = 000000000000FFFF (cc=2) -+s 0000000000007FFF - 0000000080000000 - 1 = 0000000000007FFF (cc=2) -+s 0000000000008000 - 0000000080000000 - 1 = 0000000000008000 (cc=2) -+s 00000000FFFFFFFF - 0000000080000000 - 1 = 00000000FFFFFFFF (cc=1) -+s 0000000080000000 - 0000000080000000 - 1 = 0000000080000000 (cc=1) -+s 000000007FFFFFFF - 0000000080000000 - 1 = 000000007FFFFFFF (cc=2) -+s FFFFFFFFFFFFFFFF - 0000000080000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+s 8000000000000000 - 0000000080000000 - 1 = 8000000000000000 (cc=0) -+s 7FFFFFFFFFFFFFFF - 0000000080000000 - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sh 0000000000000000 - 0000000080000000 - 1 = 0000000000000000 (cc=0) -+sh 0000000000000001 - 0000000080000000 - 1 = 0000000000000001 (cc=2) -+sh 000000000000FFFF - 0000000080000000 - 1 = 000000000000FFFF (cc=2) -+sh 0000000000007FFF - 0000000080000000 - 1 = 0000000000007FFF (cc=2) -+sh 0000000000008000 - 0000000080000000 - 1 = 0000000000008000 (cc=2) -+sh 00000000FFFFFFFF - 0000000080000000 - 1 = 00000000FFFFFFFF (cc=1) -+sh 0000000080000000 - 0000000080000000 - 1 = 0000000080000000 (cc=1) -+sh 000000007FFFFFFF - 0000000080000000 - 1 = 000000007FFFFFFF (cc=2) -+sh FFFFFFFFFFFFFFFF - 0000000080000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sh 8000000000000000 - 0000000080000000 - 1 = 8000000000000000 (cc=0) -+sh 7FFFFFFFFFFFFFFF - 0000000080000000 - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sg 0000000000000000 - 0000000080000000 - 1 = FFFFFFFF80000000 (cc=1) -+sg 0000000000000001 - 0000000080000000 - 1 = FFFFFFFF80000001 (cc=1) -+sg 000000000000FFFF - 0000000080000000 - 1 = FFFFFFFF8000FFFF (cc=1) -+sg 0000000000007FFF - 0000000080000000 - 1 = FFFFFFFF80007FFF (cc=1) -+sg 0000000000008000 - 0000000080000000 - 1 = FFFFFFFF80008000 (cc=1) -+sg 00000000FFFFFFFF - 0000000080000000 - 1 = 000000007FFFFFFF (cc=2) -+sg 0000000080000000 - 0000000080000000 - 1 = 0000000000000000 (cc=0) -+sg 000000007FFFFFFF - 0000000080000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sg FFFFFFFFFFFFFFFF - 0000000080000000 - 1 = FFFFFFFF7FFFFFFF (cc=1) -+sg 8000000000000000 - 0000000080000000 - 1 = 7FFFFFFF80000000 (cc=3) -+sg 7FFFFFFFFFFFFFFF - 0000000080000000 - 1 = 7FFFFFFF7FFFFFFF (cc=2) -+sgf 0000000000000000 - 0000000080000000 - 1 = 0000000000000000 (cc=0) -+sgf 0000000000000001 - 0000000080000000 - 1 = 0000000000000001 (cc=2) -+sgf 000000000000FFFF - 0000000080000000 - 1 = 000000000000FFFF (cc=2) -+sgf 0000000000007FFF - 0000000080000000 - 1 = 0000000000007FFF (cc=2) -+sgf 0000000000008000 - 0000000080000000 - 1 = 0000000000008000 (cc=2) -+sgf 00000000FFFFFFFF - 0000000080000000 - 1 = 00000000FFFFFFFF (cc=2) -+sgf 0000000080000000 - 0000000080000000 - 1 = 0000000080000000 (cc=2) -+sgf 000000007FFFFFFF - 0000000080000000 - 1 = 000000007FFFFFFF (cc=2) -+sgf FFFFFFFFFFFFFFFF - 0000000080000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sgf 8000000000000000 - 0000000080000000 - 1 = 8000000000000000 (cc=1) -+sgf 7FFFFFFFFFFFFFFF - 0000000080000000 - 1 = 7FFFFFFFFFFFFFFF (cc=2) -+sl 0000000000000000 - 0000000080000000 - 1 = 0000000000000000 (cc=2) -+sl 0000000000000001 - 0000000080000000 - 1 = 0000000000000001 (cc=3) -+sl 000000000000FFFF - 0000000080000000 - 1 = 000000000000FFFF (cc=3) -+sl 0000000000007FFF - 0000000080000000 - 1 = 0000000000007FFF (cc=3) -+sl 0000000000008000 - 0000000080000000 - 1 = 0000000000008000 (cc=3) -+sl 00000000FFFFFFFF - 0000000080000000 - 1 = 00000000FFFFFFFF (cc=3) -+sl 0000000080000000 - 0000000080000000 - 1 = 0000000080000000 (cc=3) -+sl 000000007FFFFFFF - 0000000080000000 - 1 = 000000007FFFFFFF (cc=3) -+sl FFFFFFFFFFFFFFFF - 0000000080000000 - 1 = FFFFFFFFFFFFFFFF (cc=3) -+sl 8000000000000000 - 0000000080000000 - 1 = 8000000000000000 (cc=2) -+sl 7FFFFFFFFFFFFFFF - 0000000080000000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slg 0000000000000000 - 0000000080000000 - 1 = FFFFFFFF80000000 (cc=1) -+slg 0000000000000001 - 0000000080000000 - 1 = FFFFFFFF80000001 (cc=1) -+slg 000000000000FFFF - 0000000080000000 - 1 = FFFFFFFF8000FFFF (cc=1) -+slg 0000000000007FFF - 0000000080000000 - 1 = FFFFFFFF80007FFF (cc=1) -+slg 0000000000008000 - 0000000080000000 - 1 = FFFFFFFF80008000 (cc=1) -+slg 00000000FFFFFFFF - 0000000080000000 - 1 = 000000007FFFFFFF (cc=3) -+slg 0000000080000000 - 0000000080000000 - 1 = 0000000000000000 (cc=2) -+slg 000000007FFFFFFF - 0000000080000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slg FFFFFFFFFFFFFFFF - 0000000080000000 - 1 = FFFFFFFF7FFFFFFF (cc=3) -+slg 8000000000000000 - 0000000080000000 - 1 = 7FFFFFFF80000000 (cc=3) -+slg 7FFFFFFFFFFFFFFF - 0000000080000000 - 1 = 7FFFFFFF7FFFFFFF (cc=3) -+sgf 0000000000000000 - 0000000080000000 - 1 = 0000000000000000 (cc=0) -+sgf 0000000000000001 - 0000000080000000 - 1 = 0000000000000001 (cc=2) -+sgf 000000000000FFFF - 0000000080000000 - 1 = 000000000000FFFF (cc=2) -+sgf 0000000000007FFF - 0000000080000000 - 1 = 0000000000007FFF (cc=2) -+sgf 0000000000008000 - 0000000080000000 - 1 = 0000000000008000 (cc=2) -+sgf 00000000FFFFFFFF - 0000000080000000 - 1 = 00000000FFFFFFFF (cc=2) -+sgf 0000000080000000 - 0000000080000000 - 1 = 0000000080000000 (cc=2) -+sgf 000000007FFFFFFF - 0000000080000000 - 1 = 000000007FFFFFFF (cc=2) -+sgf FFFFFFFFFFFFFFFF - 0000000080000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sgf 8000000000000000 - 0000000080000000 - 1 = 8000000000000000 (cc=1) -+sgf 7FFFFFFFFFFFFFFF - 0000000080000000 - 1 = 7FFFFFFFFFFFFFFF (cc=2) -+slgf 0000000000000000 - 0000000080000000 - 1 = 0000000000000000 (cc=2) -+slgf 0000000000000001 - 0000000080000000 - 1 = 0000000000000001 (cc=3) -+slgf 000000000000FFFF - 0000000080000000 - 1 = 000000000000FFFF (cc=3) -+slgf 0000000000007FFF - 0000000080000000 - 1 = 0000000000007FFF (cc=3) -+slgf 0000000000008000 - 0000000080000000 - 1 = 0000000000008000 (cc=3) -+slgf 00000000FFFFFFFF - 0000000080000000 - 1 = 00000000FFFFFFFF (cc=3) -+slgf 0000000080000000 - 0000000080000000 - 1 = 0000000080000000 (cc=3) -+slgf 000000007FFFFFFF - 0000000080000000 - 1 = 000000007FFFFFFF (cc=3) -+slgf FFFFFFFFFFFFFFFF - 0000000080000000 - 1 = FFFFFFFFFFFFFFFF (cc=3) -+slgf 8000000000000000 - 0000000080000000 - 1 = 8000000000000000 (cc=3) -+slgf 7FFFFFFFFFFFFFFF - 0000000080000000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+sr 0000000000000000 - 0000000080000000 - 1 = 0000000080000000 (cc=3) -+sr 0000000000000001 - 0000000080000000 - 1 = 0000000080000001 (cc=3) -+sr 000000000000FFFF - 0000000080000000 - 1 = 000000008000FFFF (cc=3) -+sr 0000000000007FFF - 0000000080000000 - 1 = 0000000080007FFF (cc=3) -+sr 0000000000008000 - 0000000080000000 - 1 = 0000000080008000 (cc=3) -+sr 00000000FFFFFFFF - 0000000080000000 - 1 = 000000007FFFFFFF (cc=2) -+sr 0000000080000000 - 0000000080000000 - 1 = 0000000000000000 (cc=0) -+sr 000000007FFFFFFF - 0000000080000000 - 1 = 00000000FFFFFFFF (cc=3) -+sr FFFFFFFFFFFFFFFF - 0000000080000000 - 1 = FFFFFFFF7FFFFFFF (cc=2) -+sr 8000000000000000 - 0000000080000000 - 1 = 8000000080000000 (cc=3) -+sr 7FFFFFFFFFFFFFFF - 0000000080000000 - 1 = 7FFFFFFF7FFFFFFF (cc=2) -+sgr 0000000000000000 - 0000000080000000 - 1 = FFFFFFFF80000000 (cc=1) -+sgr 0000000000000001 - 0000000080000000 - 1 = FFFFFFFF80000001 (cc=1) -+sgr 000000000000FFFF - 0000000080000000 - 1 = FFFFFFFF8000FFFF (cc=1) -+sgr 0000000000007FFF - 0000000080000000 - 1 = FFFFFFFF80007FFF (cc=1) -+sgr 0000000000008000 - 0000000080000000 - 1 = FFFFFFFF80008000 (cc=1) -+sgr 00000000FFFFFFFF - 0000000080000000 - 1 = 000000007FFFFFFF (cc=2) -+sgr 0000000080000000 - 0000000080000000 - 1 = 0000000000000000 (cc=0) -+sgr 000000007FFFFFFF - 0000000080000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sgr FFFFFFFFFFFFFFFF - 0000000080000000 - 1 = FFFFFFFF7FFFFFFF (cc=1) -+sgr 8000000000000000 - 0000000080000000 - 1 = 7FFFFFFF80000000 (cc=3) -+sgr 7FFFFFFFFFFFFFFF - 0000000080000000 - 1 = 7FFFFFFF7FFFFFFF (cc=2) -+sgfr 0000000000000000 - 0000000080000000 - 1 = 0000000080000000 (cc=2) -+sgfr 0000000000000001 - 0000000080000000 - 1 = 0000000080000001 (cc=2) -+sgfr 000000000000FFFF - 0000000080000000 - 1 = 000000008000FFFF (cc=2) -+sgfr 0000000000007FFF - 0000000080000000 - 1 = 0000000080007FFF (cc=2) -+sgfr 0000000000008000 - 0000000080000000 - 1 = 0000000080008000 (cc=2) -+sgfr 00000000FFFFFFFF - 0000000080000000 - 1 = 000000017FFFFFFF (cc=2) -+sgfr 0000000080000000 - 0000000080000000 - 1 = 0000000100000000 (cc=2) -+sgfr 000000007FFFFFFF - 0000000080000000 - 1 = 00000000FFFFFFFF (cc=2) -+sgfr FFFFFFFFFFFFFFFF - 0000000080000000 - 1 = 000000007FFFFFFF (cc=2) -+sgfr 8000000000000000 - 0000000080000000 - 1 = 8000000080000000 (cc=1) -+sgfr 7FFFFFFFFFFFFFFF - 0000000080000000 - 1 = 800000007FFFFFFF (cc=3) -+slr 0000000000000000 - 0000000080000000 - 1 = 0000000080000000 (cc=1) -+slr 0000000000000001 - 0000000080000000 - 1 = 0000000080000001 (cc=1) -+slr 000000000000FFFF - 0000000080000000 - 1 = 000000008000FFFF (cc=1) -+slr 0000000000007FFF - 0000000080000000 - 1 = 0000000080007FFF (cc=1) -+slr 0000000000008000 - 0000000080000000 - 1 = 0000000080008000 (cc=1) -+slr 00000000FFFFFFFF - 0000000080000000 - 1 = 000000007FFFFFFF (cc=3) -+slr 0000000080000000 - 0000000080000000 - 1 = 0000000000000000 (cc=2) -+slr 000000007FFFFFFF - 0000000080000000 - 1 = 00000000FFFFFFFF (cc=1) -+slr FFFFFFFFFFFFFFFF - 0000000080000000 - 1 = FFFFFFFF7FFFFFFF (cc=3) -+slr 8000000000000000 - 0000000080000000 - 1 = 8000000080000000 (cc=1) -+slr 7FFFFFFFFFFFFFFF - 0000000080000000 - 1 = 7FFFFFFF7FFFFFFF (cc=3) -+slgr 0000000000000000 - 0000000080000000 - 1 = FFFFFFFF80000000 (cc=1) -+slgr 0000000000000001 - 0000000080000000 - 1 = FFFFFFFF80000001 (cc=1) -+slgr 000000000000FFFF - 0000000080000000 - 1 = FFFFFFFF8000FFFF (cc=1) -+slgr 0000000000007FFF - 0000000080000000 - 1 = FFFFFFFF80007FFF (cc=1) -+slgr 0000000000008000 - 0000000080000000 - 1 = FFFFFFFF80008000 (cc=1) -+slgr 00000000FFFFFFFF - 0000000080000000 - 1 = 000000007FFFFFFF (cc=3) -+slgr 0000000080000000 - 0000000080000000 - 1 = 0000000000000000 (cc=2) -+slgr 000000007FFFFFFF - 0000000080000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slgr FFFFFFFFFFFFFFFF - 0000000080000000 - 1 = FFFFFFFF7FFFFFFF (cc=3) -+slgr 8000000000000000 - 0000000080000000 - 1 = 7FFFFFFF80000000 (cc=3) -+slgr 7FFFFFFFFFFFFFFF - 0000000080000000 - 1 = 7FFFFFFF7FFFFFFF (cc=3) -+slgfr 0000000000000000 - 0000000080000000 - 1 = FFFFFFFF80000000 (cc=1) -+slgfr 0000000000000001 - 0000000080000000 - 1 = FFFFFFFF80000001 (cc=1) -+slgfr 000000000000FFFF - 0000000080000000 - 1 = FFFFFFFF8000FFFF (cc=1) -+slgfr 0000000000007FFF - 0000000080000000 - 1 = FFFFFFFF80007FFF (cc=1) -+slgfr 0000000000008000 - 0000000080000000 - 1 = FFFFFFFF80008000 (cc=1) -+slgfr 00000000FFFFFFFF - 0000000080000000 - 1 = 000000007FFFFFFF (cc=3) -+slgfr 0000000080000000 - 0000000080000000 - 1 = 0000000000000000 (cc=2) -+slgfr 000000007FFFFFFF - 0000000080000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slgfr FFFFFFFFFFFFFFFF - 0000000080000000 - 1 = FFFFFFFF7FFFFFFF (cc=3) -+slgfr 8000000000000000 - 0000000080000000 - 1 = 7FFFFFFF80000000 (cc=3) -+slgfr 7FFFFFFFFFFFFFFF - 0000000080000000 - 1 = 7FFFFFFF7FFFFFFF (cc=3) -+slb 0000000000000000 - 0000000080000000 - 1 = 00000000FFFFFFFF (cc=1) -+slb 0000000000000001 - 0000000080000000 - 1 = 0000000000000000 (cc=2) -+slb 000000000000FFFF - 0000000080000000 - 1 = 000000000000FFFE (cc=3) -+slb 0000000000007FFF - 0000000080000000 - 1 = 0000000000007FFE (cc=3) -+slb 0000000000008000 - 0000000080000000 - 1 = 0000000000007FFF (cc=3) -+slb 00000000FFFFFFFF - 0000000080000000 - 1 = 00000000FFFFFFFE (cc=3) -+slb 0000000080000000 - 0000000080000000 - 1 = 000000007FFFFFFF (cc=3) -+slb 000000007FFFFFFF - 0000000080000000 - 1 = 000000007FFFFFFE (cc=3) -+slb FFFFFFFFFFFFFFFF - 0000000080000000 - 1 = FFFFFFFFFFFFFFFE (cc=3) -+slb 8000000000000000 - 0000000080000000 - 1 = 80000000FFFFFFFF (cc=1) -+slb 7FFFFFFFFFFFFFFF - 0000000080000000 - 1 = 7FFFFFFFFFFFFFFE (cc=3) -+slbg 0000000000000000 - 0000000080000000 - 1 = FFFFFFFF7FFFFFFF (cc=1) -+slbg 0000000000000001 - 0000000080000000 - 1 = FFFFFFFF80000000 (cc=1) -+slbg 000000000000FFFF - 0000000080000000 - 1 = FFFFFFFF8000FFFE (cc=1) -+slbg 0000000000007FFF - 0000000080000000 - 1 = FFFFFFFF80007FFE (cc=1) -+slbg 0000000000008000 - 0000000080000000 - 1 = FFFFFFFF80007FFF (cc=1) -+slbg 00000000FFFFFFFF - 0000000080000000 - 1 = 000000007FFFFFFE (cc=3) -+slbg 0000000080000000 - 0000000080000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slbg 000000007FFFFFFF - 0000000080000000 - 1 = FFFFFFFFFFFFFFFE (cc=1) -+slbg FFFFFFFFFFFFFFFF - 0000000080000000 - 1 = FFFFFFFF7FFFFFFE (cc=3) -+slbg 8000000000000000 - 0000000080000000 - 1 = 7FFFFFFF7FFFFFFF (cc=3) -+slbg 7FFFFFFFFFFFFFFF - 0000000080000000 - 1 = 7FFFFFFF7FFFFFFE (cc=3) -+slbr 0000000000000000 - 0000000080000000 - 1 = 000000007FFFFFFF (cc=1) -+slbr 0000000000000001 - 0000000080000000 - 1 = 0000000080000000 (cc=1) -+slbr 000000000000FFFF - 0000000080000000 - 1 = 000000008000FFFE (cc=1) -+slbr 0000000000007FFF - 0000000080000000 - 1 = 0000000080007FFE (cc=1) -+slbr 0000000000008000 - 0000000080000000 - 1 = 0000000080007FFF (cc=1) -+slbr 00000000FFFFFFFF - 0000000080000000 - 1 = 000000007FFFFFFE (cc=3) -+slbr 0000000080000000 - 0000000080000000 - 1 = 00000000FFFFFFFF (cc=1) -+slbr 000000007FFFFFFF - 0000000080000000 - 1 = 00000000FFFFFFFE (cc=1) -+slbr FFFFFFFFFFFFFFFF - 0000000080000000 - 1 = FFFFFFFF7FFFFFFE (cc=3) -+slbr 8000000000000000 - 0000000080000000 - 1 = 800000007FFFFFFF (cc=1) -+slbr 7FFFFFFFFFFFFFFF - 0000000080000000 - 1 = 7FFFFFFF7FFFFFFE (cc=3) -+slbgr 0000000000000000 - 0000000080000000 - 1 = FFFFFFFF7FFFFFFF (cc=1) -+slbgr 0000000000000001 - 0000000080000000 - 1 = FFFFFFFF80000000 (cc=1) -+slbgr 000000000000FFFF - 0000000080000000 - 1 = FFFFFFFF8000FFFE (cc=1) -+slbgr 0000000000007FFF - 0000000080000000 - 1 = FFFFFFFF80007FFE (cc=1) -+slbgr 0000000000008000 - 0000000080000000 - 1 = FFFFFFFF80007FFF (cc=1) -+slbgr 00000000FFFFFFFF - 0000000080000000 - 1 = 000000007FFFFFFE (cc=3) -+slbgr 0000000080000000 - 0000000080000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slbgr 000000007FFFFFFF - 0000000080000000 - 1 = FFFFFFFFFFFFFFFE (cc=1) -+slbgr FFFFFFFFFFFFFFFF - 0000000080000000 - 1 = FFFFFFFF7FFFFFFE (cc=3) -+slbgr 8000000000000000 - 0000000080000000 - 1 = 7FFFFFFF7FFFFFFF (cc=3) -+slbgr 7FFFFFFFFFFFFFFF - 0000000080000000 - 1 = 7FFFFFFF7FFFFFFE (cc=3) -+slb 0000000000000000 - 0000000080000000 - 0 = 0000000000000000 (cc=2) -+slb 0000000000000001 - 0000000080000000 - 0 = 0000000000000001 (cc=3) -+slb 000000000000FFFF - 0000000080000000 - 0 = 000000000000FFFF (cc=3) -+slb 0000000000007FFF - 0000000080000000 - 0 = 0000000000007FFF (cc=3) -+slb 0000000000008000 - 0000000080000000 - 0 = 0000000000008000 (cc=3) -+slb 00000000FFFFFFFF - 0000000080000000 - 0 = 00000000FFFFFFFF (cc=3) -+slb 0000000080000000 - 0000000080000000 - 0 = 0000000080000000 (cc=3) -+slb 000000007FFFFFFF - 0000000080000000 - 0 = 000000007FFFFFFF (cc=3) -+slb FFFFFFFFFFFFFFFF - 0000000080000000 - 0 = FFFFFFFFFFFFFFFF (cc=3) -+slb 8000000000000000 - 0000000080000000 - 0 = 8000000000000000 (cc=2) -+slb 7FFFFFFFFFFFFFFF - 0000000080000000 - 0 = 7FFFFFFFFFFFFFFF (cc=3) -+slbg 0000000000000000 - 0000000080000000 - 0 = FFFFFFFF80000000 (cc=1) -+slbg 0000000000000001 - 0000000080000000 - 0 = FFFFFFFF80000001 (cc=1) -+slbg 000000000000FFFF - 0000000080000000 - 0 = FFFFFFFF8000FFFF (cc=1) -+slbg 0000000000007FFF - 0000000080000000 - 0 = FFFFFFFF80007FFF (cc=1) -+slbg 0000000000008000 - 0000000080000000 - 0 = FFFFFFFF80008000 (cc=1) -+slbg 00000000FFFFFFFF - 0000000080000000 - 0 = 000000007FFFFFFF (cc=3) -+slbg 0000000080000000 - 0000000080000000 - 0 = 0000000000000000 (cc=2) -+slbg 000000007FFFFFFF - 0000000080000000 - 0 = FFFFFFFFFFFFFFFF (cc=1) -+slbg FFFFFFFFFFFFFFFF - 0000000080000000 - 0 = FFFFFFFF7FFFFFFF (cc=3) -+slbg 8000000000000000 - 0000000080000000 - 0 = 7FFFFFFF80000000 (cc=3) -+slbg 7FFFFFFFFFFFFFFF - 0000000080000000 - 0 = 7FFFFFFF7FFFFFFF (cc=3) -+slbr 0000000000000000 - 0000000080000000 - 0 = 0000000080000000 (cc=1) -+slbr 0000000000000001 - 0000000080000000 - 0 = 0000000080000001 (cc=1) -+slbr 000000000000FFFF - 0000000080000000 - 0 = 000000008000FFFF (cc=1) -+slbr 0000000000007FFF - 0000000080000000 - 0 = 0000000080007FFF (cc=1) -+slbr 0000000000008000 - 0000000080000000 - 0 = 0000000080008000 (cc=1) -+slbr 00000000FFFFFFFF - 0000000080000000 - 0 = 000000007FFFFFFF (cc=3) -+slbr 0000000080000000 - 0000000080000000 - 0 = 0000000000000000 (cc=2) -+slbr 000000007FFFFFFF - 0000000080000000 - 0 = 00000000FFFFFFFF (cc=1) -+slbr FFFFFFFFFFFFFFFF - 0000000080000000 - 0 = FFFFFFFF7FFFFFFF (cc=3) -+slbr 8000000000000000 - 0000000080000000 - 0 = 8000000080000000 (cc=1) -+slbr 7FFFFFFFFFFFFFFF - 0000000080000000 - 0 = 7FFFFFFF7FFFFFFF (cc=3) -+slbgr 0000000000000000 - 0000000080000000 - 0 = FFFFFFFF80000000 (cc=1) -+slbgr 0000000000000001 - 0000000080000000 - 0 = FFFFFFFF80000001 (cc=1) -+slbgr 000000000000FFFF - 0000000080000000 - 0 = FFFFFFFF8000FFFF (cc=1) -+slbgr 0000000000007FFF - 0000000080000000 - 0 = FFFFFFFF80007FFF (cc=1) -+slbgr 0000000000008000 - 0000000080000000 - 0 = FFFFFFFF80008000 (cc=1) -+slbgr 00000000FFFFFFFF - 0000000080000000 - 0 = 000000007FFFFFFF (cc=3) -+slbgr 0000000080000000 - 0000000080000000 - 0 = 0000000000000000 (cc=2) -+slbgr 000000007FFFFFFF - 0000000080000000 - 0 = FFFFFFFFFFFFFFFF (cc=1) -+slbgr FFFFFFFFFFFFFFFF - 0000000080000000 - 0 = FFFFFFFF7FFFFFFF (cc=3) -+slbgr 8000000000000000 - 0000000080000000 - 0 = 7FFFFFFF80000000 (cc=3) -+slbgr 7FFFFFFFFFFFFFFF - 0000000080000000 - 0 = 7FFFFFFF7FFFFFFF (cc=3) -+shy 0000000000000000 - 0000000080000000 - 1 = 0000000000000000 (cc=0) -+shy 0000000000000001 - 0000000080000000 - 1 = 0000000000000001 (cc=2) -+shy 000000000000FFFF - 0000000080000000 - 1 = 000000000000FFFF (cc=2) -+shy 0000000000007FFF - 0000000080000000 - 1 = 0000000000007FFF (cc=2) -+shy 0000000000008000 - 0000000080000000 - 1 = 0000000000008000 (cc=2) -+shy 00000000FFFFFFFF - 0000000080000000 - 1 = 00000000FFFFFFFF (cc=1) -+shy 0000000080000000 - 0000000080000000 - 1 = 0000000080000000 (cc=1) -+shy 000000007FFFFFFF - 0000000080000000 - 1 = 000000007FFFFFFF (cc=2) -+shy FFFFFFFFFFFFFFFF - 0000000080000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+shy 8000000000000000 - 0000000080000000 - 1 = 8000000000000000 (cc=0) -+shy 7FFFFFFFFFFFFFFF - 0000000080000000 - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sly 0000000000000000 - 0000000080000000 - 1 = 0000000000000000 (cc=2) -+sly 0000000000000001 - 0000000080000000 - 1 = 0000000000000001 (cc=3) -+sly 000000000000FFFF - 0000000080000000 - 1 = 000000000000FFFF (cc=3) -+sly 0000000000007FFF - 0000000080000000 - 1 = 0000000000007FFF (cc=3) -+sly 0000000000008000 - 0000000080000000 - 1 = 0000000000008000 (cc=3) -+sly 00000000FFFFFFFF - 0000000080000000 - 1 = 00000000FFFFFFFF (cc=3) -+sly 0000000080000000 - 0000000080000000 - 1 = 0000000080000000 (cc=3) -+sly 000000007FFFFFFF - 0000000080000000 - 1 = 000000007FFFFFFF (cc=3) -+sly FFFFFFFFFFFFFFFF - 0000000080000000 - 1 = FFFFFFFFFFFFFFFF (cc=3) -+sly 8000000000000000 - 0000000080000000 - 1 = 8000000000000000 (cc=2) -+sly 7FFFFFFFFFFFFFFF - 0000000080000000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+sy 0000000000000000 - 0000000080000000 - 1 = 0000000000000000 (cc=0) -+sy 0000000000000001 - 0000000080000000 - 1 = 0000000000000001 (cc=2) -+sy 000000000000FFFF - 0000000080000000 - 1 = 000000000000FFFF (cc=2) -+sy 0000000000007FFF - 0000000080000000 - 1 = 0000000000007FFF (cc=2) -+sy 0000000000008000 - 0000000080000000 - 1 = 0000000000008000 (cc=2) -+sy 00000000FFFFFFFF - 0000000080000000 - 1 = 00000000FFFFFFFF (cc=1) -+sy 0000000080000000 - 0000000080000000 - 1 = 0000000080000000 (cc=1) -+sy 000000007FFFFFFF - 0000000080000000 - 1 = 000000007FFFFFFF (cc=2) -+sy FFFFFFFFFFFFFFFF - 0000000080000000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sy 8000000000000000 - 0000000080000000 - 1 = 8000000000000000 (cc=0) -+sy 7FFFFFFFFFFFFFFF - 0000000080000000 - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+s 0000000000000000 - 00000000FFFFFFFF - 1 = 0000000000000000 (cc=0) -+s 0000000000000001 - 00000000FFFFFFFF - 1 = 0000000000000001 (cc=2) -+s 000000000000FFFF - 00000000FFFFFFFF - 1 = 000000000000FFFF (cc=2) -+s 0000000000007FFF - 00000000FFFFFFFF - 1 = 0000000000007FFF (cc=2) -+s 0000000000008000 - 00000000FFFFFFFF - 1 = 0000000000008000 (cc=2) -+s 00000000FFFFFFFF - 00000000FFFFFFFF - 1 = 00000000FFFFFFFF (cc=1) -+s 0000000080000000 - 00000000FFFFFFFF - 1 = 0000000080000000 (cc=1) -+s 000000007FFFFFFF - 00000000FFFFFFFF - 1 = 000000007FFFFFFF (cc=2) -+s FFFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+s 8000000000000000 - 00000000FFFFFFFF - 1 = 8000000000000000 (cc=0) -+s 7FFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sh 0000000000000000 - 00000000FFFFFFFF - 1 = 0000000000000000 (cc=0) -+sh 0000000000000001 - 00000000FFFFFFFF - 1 = 0000000000000001 (cc=2) -+sh 000000000000FFFF - 00000000FFFFFFFF - 1 = 000000000000FFFF (cc=2) -+sh 0000000000007FFF - 00000000FFFFFFFF - 1 = 0000000000007FFF (cc=2) -+sh 0000000000008000 - 00000000FFFFFFFF - 1 = 0000000000008000 (cc=2) -+sh 00000000FFFFFFFF - 00000000FFFFFFFF - 1 = 00000000FFFFFFFF (cc=1) -+sh 0000000080000000 - 00000000FFFFFFFF - 1 = 0000000080000000 (cc=1) -+sh 000000007FFFFFFF - 00000000FFFFFFFF - 1 = 000000007FFFFFFF (cc=2) -+sh FFFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sh 8000000000000000 - 00000000FFFFFFFF - 1 = 8000000000000000 (cc=0) -+sh 7FFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sg 0000000000000000 - 00000000FFFFFFFF - 1 = FFFFFFFF00000001 (cc=1) -+sg 0000000000000001 - 00000000FFFFFFFF - 1 = FFFFFFFF00000002 (cc=1) -+sg 000000000000FFFF - 00000000FFFFFFFF - 1 = FFFFFFFF00010000 (cc=1) -+sg 0000000000007FFF - 00000000FFFFFFFF - 1 = FFFFFFFF00008000 (cc=1) -+sg 0000000000008000 - 00000000FFFFFFFF - 1 = FFFFFFFF00008001 (cc=1) -+sg 00000000FFFFFFFF - 00000000FFFFFFFF - 1 = 0000000000000000 (cc=0) -+sg 0000000080000000 - 00000000FFFFFFFF - 1 = FFFFFFFF80000001 (cc=1) -+sg 000000007FFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFF80000000 (cc=1) -+sg FFFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFF00000000 (cc=1) -+sg 8000000000000000 - 00000000FFFFFFFF - 1 = 7FFFFFFF00000001 (cc=3) -+sg 7FFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = 7FFFFFFF00000000 (cc=2) -+sgf 0000000000000000 - 00000000FFFFFFFF - 1 = 0000000000000000 (cc=0) -+sgf 0000000000000001 - 00000000FFFFFFFF - 1 = 0000000000000001 (cc=2) -+sgf 000000000000FFFF - 00000000FFFFFFFF - 1 = 000000000000FFFF (cc=2) -+sgf 0000000000007FFF - 00000000FFFFFFFF - 1 = 0000000000007FFF (cc=2) -+sgf 0000000000008000 - 00000000FFFFFFFF - 1 = 0000000000008000 (cc=2) -+sgf 00000000FFFFFFFF - 00000000FFFFFFFF - 1 = 00000000FFFFFFFF (cc=2) -+sgf 0000000080000000 - 00000000FFFFFFFF - 1 = 0000000080000000 (cc=2) -+sgf 000000007FFFFFFF - 00000000FFFFFFFF - 1 = 000000007FFFFFFF (cc=2) -+sgf FFFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sgf 8000000000000000 - 00000000FFFFFFFF - 1 = 8000000000000000 (cc=1) -+sgf 7FFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = 7FFFFFFFFFFFFFFF (cc=2) -+sl 0000000000000000 - 00000000FFFFFFFF - 1 = 0000000000000000 (cc=2) -+sl 0000000000000001 - 00000000FFFFFFFF - 1 = 0000000000000001 (cc=3) -+sl 000000000000FFFF - 00000000FFFFFFFF - 1 = 000000000000FFFF (cc=3) -+sl 0000000000007FFF - 00000000FFFFFFFF - 1 = 0000000000007FFF (cc=3) -+sl 0000000000008000 - 00000000FFFFFFFF - 1 = 0000000000008000 (cc=3) -+sl 00000000FFFFFFFF - 00000000FFFFFFFF - 1 = 00000000FFFFFFFF (cc=3) -+sl 0000000080000000 - 00000000FFFFFFFF - 1 = 0000000080000000 (cc=3) -+sl 000000007FFFFFFF - 00000000FFFFFFFF - 1 = 000000007FFFFFFF (cc=3) -+sl FFFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=3) -+sl 8000000000000000 - 00000000FFFFFFFF - 1 = 8000000000000000 (cc=2) -+sl 7FFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slg 0000000000000000 - 00000000FFFFFFFF - 1 = FFFFFFFF00000001 (cc=1) -+slg 0000000000000001 - 00000000FFFFFFFF - 1 = FFFFFFFF00000002 (cc=1) -+slg 000000000000FFFF - 00000000FFFFFFFF - 1 = FFFFFFFF00010000 (cc=1) -+slg 0000000000007FFF - 00000000FFFFFFFF - 1 = FFFFFFFF00008000 (cc=1) -+slg 0000000000008000 - 00000000FFFFFFFF - 1 = FFFFFFFF00008001 (cc=1) -+slg 00000000FFFFFFFF - 00000000FFFFFFFF - 1 = 0000000000000000 (cc=2) -+slg 0000000080000000 - 00000000FFFFFFFF - 1 = FFFFFFFF80000001 (cc=1) -+slg 000000007FFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFF80000000 (cc=1) -+slg FFFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFF00000000 (cc=3) -+slg 8000000000000000 - 00000000FFFFFFFF - 1 = 7FFFFFFF00000001 (cc=3) -+slg 7FFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = 7FFFFFFF00000000 (cc=3) -+sgf 0000000000000000 - 00000000FFFFFFFF - 1 = 0000000000000000 (cc=0) -+sgf 0000000000000001 - 00000000FFFFFFFF - 1 = 0000000000000001 (cc=2) -+sgf 000000000000FFFF - 00000000FFFFFFFF - 1 = 000000000000FFFF (cc=2) -+sgf 0000000000007FFF - 00000000FFFFFFFF - 1 = 0000000000007FFF (cc=2) -+sgf 0000000000008000 - 00000000FFFFFFFF - 1 = 0000000000008000 (cc=2) -+sgf 00000000FFFFFFFF - 00000000FFFFFFFF - 1 = 00000000FFFFFFFF (cc=2) -+sgf 0000000080000000 - 00000000FFFFFFFF - 1 = 0000000080000000 (cc=2) -+sgf 000000007FFFFFFF - 00000000FFFFFFFF - 1 = 000000007FFFFFFF (cc=2) -+sgf FFFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sgf 8000000000000000 - 00000000FFFFFFFF - 1 = 8000000000000000 (cc=1) -+sgf 7FFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = 7FFFFFFFFFFFFFFF (cc=2) -+slgf 0000000000000000 - 00000000FFFFFFFF - 1 = 0000000000000000 (cc=2) -+slgf 0000000000000001 - 00000000FFFFFFFF - 1 = 0000000000000001 (cc=3) -+slgf 000000000000FFFF - 00000000FFFFFFFF - 1 = 000000000000FFFF (cc=3) -+slgf 0000000000007FFF - 00000000FFFFFFFF - 1 = 0000000000007FFF (cc=3) -+slgf 0000000000008000 - 00000000FFFFFFFF - 1 = 0000000000008000 (cc=3) -+slgf 00000000FFFFFFFF - 00000000FFFFFFFF - 1 = 00000000FFFFFFFF (cc=3) -+slgf 0000000080000000 - 00000000FFFFFFFF - 1 = 0000000080000000 (cc=3) -+slgf 000000007FFFFFFF - 00000000FFFFFFFF - 1 = 000000007FFFFFFF (cc=3) -+slgf FFFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=3) -+slgf 8000000000000000 - 00000000FFFFFFFF - 1 = 8000000000000000 (cc=3) -+slgf 7FFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+sr 0000000000000000 - 00000000FFFFFFFF - 1 = 0000000000000001 (cc=2) -+sr 0000000000000001 - 00000000FFFFFFFF - 1 = 0000000000000002 (cc=2) -+sr 000000000000FFFF - 00000000FFFFFFFF - 1 = 0000000000010000 (cc=2) -+sr 0000000000007FFF - 00000000FFFFFFFF - 1 = 0000000000008000 (cc=2) -+sr 0000000000008000 - 00000000FFFFFFFF - 1 = 0000000000008001 (cc=2) -+sr 00000000FFFFFFFF - 00000000FFFFFFFF - 1 = 0000000000000000 (cc=0) -+sr 0000000080000000 - 00000000FFFFFFFF - 1 = 0000000080000001 (cc=1) -+sr 000000007FFFFFFF - 00000000FFFFFFFF - 1 = 0000000080000000 (cc=3) -+sr FFFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFF00000000 (cc=0) -+sr 8000000000000000 - 00000000FFFFFFFF - 1 = 8000000000000001 (cc=2) -+sr 7FFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = 7FFFFFFF00000000 (cc=0) -+sgr 0000000000000000 - 00000000FFFFFFFF - 1 = FFFFFFFF00000001 (cc=1) -+sgr 0000000000000001 - 00000000FFFFFFFF - 1 = FFFFFFFF00000002 (cc=1) -+sgr 000000000000FFFF - 00000000FFFFFFFF - 1 = FFFFFFFF00010000 (cc=1) -+sgr 0000000000007FFF - 00000000FFFFFFFF - 1 = FFFFFFFF00008000 (cc=1) -+sgr 0000000000008000 - 00000000FFFFFFFF - 1 = FFFFFFFF00008001 (cc=1) -+sgr 00000000FFFFFFFF - 00000000FFFFFFFF - 1 = 0000000000000000 (cc=0) -+sgr 0000000080000000 - 00000000FFFFFFFF - 1 = FFFFFFFF80000001 (cc=1) -+sgr 000000007FFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFF80000000 (cc=1) -+sgr FFFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFF00000000 (cc=1) -+sgr 8000000000000000 - 00000000FFFFFFFF - 1 = 7FFFFFFF00000001 (cc=3) -+sgr 7FFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = 7FFFFFFF00000000 (cc=2) -+sgfr 0000000000000000 - 00000000FFFFFFFF - 1 = 0000000000000001 (cc=2) -+sgfr 0000000000000001 - 00000000FFFFFFFF - 1 = 0000000000000002 (cc=2) -+sgfr 000000000000FFFF - 00000000FFFFFFFF - 1 = 0000000000010000 (cc=2) -+sgfr 0000000000007FFF - 00000000FFFFFFFF - 1 = 0000000000008000 (cc=2) -+sgfr 0000000000008000 - 00000000FFFFFFFF - 1 = 0000000000008001 (cc=2) -+sgfr 00000000FFFFFFFF - 00000000FFFFFFFF - 1 = 0000000100000000 (cc=2) -+sgfr 0000000080000000 - 00000000FFFFFFFF - 1 = 0000000080000001 (cc=2) -+sgfr 000000007FFFFFFF - 00000000FFFFFFFF - 1 = 0000000080000000 (cc=2) -+sgfr FFFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = 0000000000000000 (cc=0) -+sgfr 8000000000000000 - 00000000FFFFFFFF - 1 = 8000000000000001 (cc=1) -+sgfr 7FFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = 8000000000000000 (cc=3) -+slr 0000000000000000 - 00000000FFFFFFFF - 1 = 0000000000000001 (cc=1) -+slr 0000000000000001 - 00000000FFFFFFFF - 1 = 0000000000000002 (cc=1) -+slr 000000000000FFFF - 00000000FFFFFFFF - 1 = 0000000000010000 (cc=1) -+slr 0000000000007FFF - 00000000FFFFFFFF - 1 = 0000000000008000 (cc=1) -+slr 0000000000008000 - 00000000FFFFFFFF - 1 = 0000000000008001 (cc=1) -+slr 00000000FFFFFFFF - 00000000FFFFFFFF - 1 = 0000000000000000 (cc=2) -+slr 0000000080000000 - 00000000FFFFFFFF - 1 = 0000000080000001 (cc=1) -+slr 000000007FFFFFFF - 00000000FFFFFFFF - 1 = 0000000080000000 (cc=1) -+slr FFFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFF00000000 (cc=2) -+slr 8000000000000000 - 00000000FFFFFFFF - 1 = 8000000000000001 (cc=1) -+slr 7FFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = 7FFFFFFF00000000 (cc=2) -+slgr 0000000000000000 - 00000000FFFFFFFF - 1 = FFFFFFFF00000001 (cc=1) -+slgr 0000000000000001 - 00000000FFFFFFFF - 1 = FFFFFFFF00000002 (cc=1) -+slgr 000000000000FFFF - 00000000FFFFFFFF - 1 = FFFFFFFF00010000 (cc=1) -+slgr 0000000000007FFF - 00000000FFFFFFFF - 1 = FFFFFFFF00008000 (cc=1) -+slgr 0000000000008000 - 00000000FFFFFFFF - 1 = FFFFFFFF00008001 (cc=1) -+slgr 00000000FFFFFFFF - 00000000FFFFFFFF - 1 = 0000000000000000 (cc=2) -+slgr 0000000080000000 - 00000000FFFFFFFF - 1 = FFFFFFFF80000001 (cc=1) -+slgr 000000007FFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFF80000000 (cc=1) -+slgr FFFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFF00000000 (cc=3) -+slgr 8000000000000000 - 00000000FFFFFFFF - 1 = 7FFFFFFF00000001 (cc=3) -+slgr 7FFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = 7FFFFFFF00000000 (cc=3) -+slgfr 0000000000000000 - 00000000FFFFFFFF - 1 = FFFFFFFF00000001 (cc=1) -+slgfr 0000000000000001 - 00000000FFFFFFFF - 1 = FFFFFFFF00000002 (cc=1) -+slgfr 000000000000FFFF - 00000000FFFFFFFF - 1 = FFFFFFFF00010000 (cc=1) -+slgfr 0000000000007FFF - 00000000FFFFFFFF - 1 = FFFFFFFF00008000 (cc=1) -+slgfr 0000000000008000 - 00000000FFFFFFFF - 1 = FFFFFFFF00008001 (cc=1) -+slgfr 00000000FFFFFFFF - 00000000FFFFFFFF - 1 = 0000000000000000 (cc=2) -+slgfr 0000000080000000 - 00000000FFFFFFFF - 1 = FFFFFFFF80000001 (cc=1) -+slgfr 000000007FFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFF80000000 (cc=1) -+slgfr FFFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFF00000000 (cc=3) -+slgfr 8000000000000000 - 00000000FFFFFFFF - 1 = 7FFFFFFF00000001 (cc=3) -+slgfr 7FFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = 7FFFFFFF00000000 (cc=3) -+slb 0000000000000000 - 00000000FFFFFFFF - 1 = 00000000FFFFFFFF (cc=1) -+slb 0000000000000001 - 00000000FFFFFFFF - 1 = 0000000000000000 (cc=2) -+slb 000000000000FFFF - 00000000FFFFFFFF - 1 = 000000000000FFFE (cc=3) -+slb 0000000000007FFF - 00000000FFFFFFFF - 1 = 0000000000007FFE (cc=3) -+slb 0000000000008000 - 00000000FFFFFFFF - 1 = 0000000000007FFF (cc=3) -+slb 00000000FFFFFFFF - 00000000FFFFFFFF - 1 = 00000000FFFFFFFE (cc=3) -+slb 0000000080000000 - 00000000FFFFFFFF - 1 = 000000007FFFFFFF (cc=3) -+slb 000000007FFFFFFF - 00000000FFFFFFFF - 1 = 000000007FFFFFFE (cc=3) -+slb FFFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFFFFFFFFFE (cc=3) -+slb 8000000000000000 - 00000000FFFFFFFF - 1 = 80000000FFFFFFFF (cc=1) -+slb 7FFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = 7FFFFFFFFFFFFFFE (cc=3) -+slbg 0000000000000000 - 00000000FFFFFFFF - 1 = FFFFFFFF00000000 (cc=1) -+slbg 0000000000000001 - 00000000FFFFFFFF - 1 = FFFFFFFF00000001 (cc=1) -+slbg 000000000000FFFF - 00000000FFFFFFFF - 1 = FFFFFFFF0000FFFF (cc=1) -+slbg 0000000000007FFF - 00000000FFFFFFFF - 1 = FFFFFFFF00007FFF (cc=1) -+slbg 0000000000008000 - 00000000FFFFFFFF - 1 = FFFFFFFF00008000 (cc=1) -+slbg 00000000FFFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slbg 0000000080000000 - 00000000FFFFFFFF - 1 = FFFFFFFF80000000 (cc=1) -+slbg 000000007FFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFF7FFFFFFF (cc=1) -+slbg FFFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFEFFFFFFFF (cc=3) -+slbg 8000000000000000 - 00000000FFFFFFFF - 1 = 7FFFFFFF00000000 (cc=3) -+slbg 7FFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = 7FFFFFFEFFFFFFFF (cc=3) -+slbr 0000000000000000 - 00000000FFFFFFFF - 1 = 0000000000000000 (cc=0) -+slbr 0000000000000001 - 00000000FFFFFFFF - 1 = 0000000000000001 (cc=1) -+slbr 000000000000FFFF - 00000000FFFFFFFF - 1 = 000000000000FFFF (cc=1) -+slbr 0000000000007FFF - 00000000FFFFFFFF - 1 = 0000000000007FFF (cc=1) -+slbr 0000000000008000 - 00000000FFFFFFFF - 1 = 0000000000008000 (cc=1) -+slbr 00000000FFFFFFFF - 00000000FFFFFFFF - 1 = 00000000FFFFFFFF (cc=1) -+slbr 0000000080000000 - 00000000FFFFFFFF - 1 = 0000000080000000 (cc=1) -+slbr 000000007FFFFFFF - 00000000FFFFFFFF - 1 = 000000007FFFFFFF (cc=1) -+slbr FFFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slbr 8000000000000000 - 00000000FFFFFFFF - 1 = 8000000000000000 (cc=0) -+slbr 7FFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+slbgr 0000000000000000 - 00000000FFFFFFFF - 1 = FFFFFFFF00000000 (cc=1) -+slbgr 0000000000000001 - 00000000FFFFFFFF - 1 = FFFFFFFF00000001 (cc=1) -+slbgr 000000000000FFFF - 00000000FFFFFFFF - 1 = FFFFFFFF0000FFFF (cc=1) -+slbgr 0000000000007FFF - 00000000FFFFFFFF - 1 = FFFFFFFF00007FFF (cc=1) -+slbgr 0000000000008000 - 00000000FFFFFFFF - 1 = FFFFFFFF00008000 (cc=1) -+slbgr 00000000FFFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slbgr 0000000080000000 - 00000000FFFFFFFF - 1 = FFFFFFFF80000000 (cc=1) -+slbgr 000000007FFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFF7FFFFFFF (cc=1) -+slbgr FFFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFEFFFFFFFF (cc=3) -+slbgr 8000000000000000 - 00000000FFFFFFFF - 1 = 7FFFFFFF00000000 (cc=3) -+slbgr 7FFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = 7FFFFFFEFFFFFFFF (cc=3) -+slb 0000000000000000 - 00000000FFFFFFFF - 0 = 0000000000000000 (cc=2) -+slb 0000000000000001 - 00000000FFFFFFFF - 0 = 0000000000000001 (cc=3) -+slb 000000000000FFFF - 00000000FFFFFFFF - 0 = 000000000000FFFF (cc=3) -+slb 0000000000007FFF - 00000000FFFFFFFF - 0 = 0000000000007FFF (cc=3) -+slb 0000000000008000 - 00000000FFFFFFFF - 0 = 0000000000008000 (cc=3) -+slb 00000000FFFFFFFF - 00000000FFFFFFFF - 0 = 00000000FFFFFFFF (cc=3) -+slb 0000000080000000 - 00000000FFFFFFFF - 0 = 0000000080000000 (cc=3) -+slb 000000007FFFFFFF - 00000000FFFFFFFF - 0 = 000000007FFFFFFF (cc=3) -+slb FFFFFFFFFFFFFFFF - 00000000FFFFFFFF - 0 = FFFFFFFFFFFFFFFF (cc=3) -+slb 8000000000000000 - 00000000FFFFFFFF - 0 = 8000000000000000 (cc=2) -+slb 7FFFFFFFFFFFFFFF - 00000000FFFFFFFF - 0 = 7FFFFFFFFFFFFFFF (cc=3) -+slbg 0000000000000000 - 00000000FFFFFFFF - 0 = FFFFFFFF00000001 (cc=1) -+slbg 0000000000000001 - 00000000FFFFFFFF - 0 = FFFFFFFF00000002 (cc=1) -+slbg 000000000000FFFF - 00000000FFFFFFFF - 0 = FFFFFFFF00010000 (cc=1) -+slbg 0000000000007FFF - 00000000FFFFFFFF - 0 = FFFFFFFF00008000 (cc=1) -+slbg 0000000000008000 - 00000000FFFFFFFF - 0 = FFFFFFFF00008001 (cc=1) -+slbg 00000000FFFFFFFF - 00000000FFFFFFFF - 0 = 0000000000000000 (cc=2) -+slbg 0000000080000000 - 00000000FFFFFFFF - 0 = FFFFFFFF80000001 (cc=1) -+slbg 000000007FFFFFFF - 00000000FFFFFFFF - 0 = FFFFFFFF80000000 (cc=1) -+slbg FFFFFFFFFFFFFFFF - 00000000FFFFFFFF - 0 = FFFFFFFF00000000 (cc=3) -+slbg 8000000000000000 - 00000000FFFFFFFF - 0 = 7FFFFFFF00000001 (cc=3) -+slbg 7FFFFFFFFFFFFFFF - 00000000FFFFFFFF - 0 = 7FFFFFFF00000000 (cc=3) -+slbr 0000000000000000 - 00000000FFFFFFFF - 0 = 0000000000000001 (cc=1) -+slbr 0000000000000001 - 00000000FFFFFFFF - 0 = 0000000000000002 (cc=1) -+slbr 000000000000FFFF - 00000000FFFFFFFF - 0 = 0000000000010000 (cc=1) -+slbr 0000000000007FFF - 00000000FFFFFFFF - 0 = 0000000000008000 (cc=1) -+slbr 0000000000008000 - 00000000FFFFFFFF - 0 = 0000000000008001 (cc=1) -+slbr 00000000FFFFFFFF - 00000000FFFFFFFF - 0 = 0000000000000000 (cc=2) -+slbr 0000000080000000 - 00000000FFFFFFFF - 0 = 0000000080000001 (cc=1) -+slbr 000000007FFFFFFF - 00000000FFFFFFFF - 0 = 0000000080000000 (cc=1) -+slbr FFFFFFFFFFFFFFFF - 00000000FFFFFFFF - 0 = FFFFFFFF00000000 (cc=2) -+slbr 8000000000000000 - 00000000FFFFFFFF - 0 = 8000000000000001 (cc=1) -+slbr 7FFFFFFFFFFFFFFF - 00000000FFFFFFFF - 0 = 7FFFFFFF00000000 (cc=2) -+slbgr 0000000000000000 - 00000000FFFFFFFF - 0 = FFFFFFFF00000001 (cc=1) -+slbgr 0000000000000001 - 00000000FFFFFFFF - 0 = FFFFFFFF00000002 (cc=1) -+slbgr 000000000000FFFF - 00000000FFFFFFFF - 0 = FFFFFFFF00010000 (cc=1) -+slbgr 0000000000007FFF - 00000000FFFFFFFF - 0 = FFFFFFFF00008000 (cc=1) -+slbgr 0000000000008000 - 00000000FFFFFFFF - 0 = FFFFFFFF00008001 (cc=1) -+slbgr 00000000FFFFFFFF - 00000000FFFFFFFF - 0 = 0000000000000000 (cc=2) -+slbgr 0000000080000000 - 00000000FFFFFFFF - 0 = FFFFFFFF80000001 (cc=1) -+slbgr 000000007FFFFFFF - 00000000FFFFFFFF - 0 = FFFFFFFF80000000 (cc=1) -+slbgr FFFFFFFFFFFFFFFF - 00000000FFFFFFFF - 0 = FFFFFFFF00000000 (cc=3) -+slbgr 8000000000000000 - 00000000FFFFFFFF - 0 = 7FFFFFFF00000001 (cc=3) -+slbgr 7FFFFFFFFFFFFFFF - 00000000FFFFFFFF - 0 = 7FFFFFFF00000000 (cc=3) -+shy 0000000000000000 - 00000000FFFFFFFF - 1 = 0000000000000000 (cc=0) -+shy 0000000000000001 - 00000000FFFFFFFF - 1 = 0000000000000001 (cc=2) -+shy 000000000000FFFF - 00000000FFFFFFFF - 1 = 000000000000FFFF (cc=2) -+shy 0000000000007FFF - 00000000FFFFFFFF - 1 = 0000000000007FFF (cc=2) -+shy 0000000000008000 - 00000000FFFFFFFF - 1 = 0000000000008000 (cc=2) -+shy 00000000FFFFFFFF - 00000000FFFFFFFF - 1 = 00000000FFFFFFFF (cc=1) -+shy 0000000080000000 - 00000000FFFFFFFF - 1 = 0000000080000000 (cc=1) -+shy 000000007FFFFFFF - 00000000FFFFFFFF - 1 = 000000007FFFFFFF (cc=2) -+shy FFFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+shy 8000000000000000 - 00000000FFFFFFFF - 1 = 8000000000000000 (cc=0) -+shy 7FFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sly 0000000000000000 - 00000000FFFFFFFF - 1 = 0000000000000000 (cc=2) -+sly 0000000000000001 - 00000000FFFFFFFF - 1 = 0000000000000001 (cc=3) -+sly 000000000000FFFF - 00000000FFFFFFFF - 1 = 000000000000FFFF (cc=3) -+sly 0000000000007FFF - 00000000FFFFFFFF - 1 = 0000000000007FFF (cc=3) -+sly 0000000000008000 - 00000000FFFFFFFF - 1 = 0000000000008000 (cc=3) -+sly 00000000FFFFFFFF - 00000000FFFFFFFF - 1 = 00000000FFFFFFFF (cc=3) -+sly 0000000080000000 - 00000000FFFFFFFF - 1 = 0000000080000000 (cc=3) -+sly 000000007FFFFFFF - 00000000FFFFFFFF - 1 = 000000007FFFFFFF (cc=3) -+sly FFFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=3) -+sly 8000000000000000 - 00000000FFFFFFFF - 1 = 8000000000000000 (cc=2) -+sly 7FFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+sy 0000000000000000 - 00000000FFFFFFFF - 1 = 0000000000000000 (cc=0) -+sy 0000000000000001 - 00000000FFFFFFFF - 1 = 0000000000000001 (cc=2) -+sy 000000000000FFFF - 00000000FFFFFFFF - 1 = 000000000000FFFF (cc=2) -+sy 0000000000007FFF - 00000000FFFFFFFF - 1 = 0000000000007FFF (cc=2) -+sy 0000000000008000 - 00000000FFFFFFFF - 1 = 0000000000008000 (cc=2) -+sy 00000000FFFFFFFF - 00000000FFFFFFFF - 1 = 00000000FFFFFFFF (cc=1) -+sy 0000000080000000 - 00000000FFFFFFFF - 1 = 0000000080000000 (cc=1) -+sy 000000007FFFFFFF - 00000000FFFFFFFF - 1 = 000000007FFFFFFF (cc=2) -+sy FFFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sy 8000000000000000 - 00000000FFFFFFFF - 1 = 8000000000000000 (cc=0) -+sy 7FFFFFFFFFFFFFFF - 00000000FFFFFFFF - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+s 0000000000000000 - 000000000000FFFF - 1 = 0000000000000000 (cc=0) -+s 0000000000000001 - 000000000000FFFF - 1 = 0000000000000001 (cc=2) -+s 000000000000FFFF - 000000000000FFFF - 1 = 000000000000FFFF (cc=2) -+s 0000000000007FFF - 000000000000FFFF - 1 = 0000000000007FFF (cc=2) -+s 0000000000008000 - 000000000000FFFF - 1 = 0000000000008000 (cc=2) -+s 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFFFFFF (cc=1) -+s 0000000080000000 - 000000000000FFFF - 1 = 0000000080000000 (cc=1) -+s 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFFFFFF (cc=2) -+s FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+s 8000000000000000 - 000000000000FFFF - 1 = 8000000000000000 (cc=0) -+s 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sh 0000000000000000 - 000000000000FFFF - 1 = 0000000000000000 (cc=0) -+sh 0000000000000001 - 000000000000FFFF - 1 = 0000000000000001 (cc=2) -+sh 000000000000FFFF - 000000000000FFFF - 1 = 000000000000FFFF (cc=2) -+sh 0000000000007FFF - 000000000000FFFF - 1 = 0000000000007FFF (cc=2) -+sh 0000000000008000 - 000000000000FFFF - 1 = 0000000000008000 (cc=2) -+sh 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFFFFFF (cc=1) -+sh 0000000080000000 - 000000000000FFFF - 1 = 0000000080000000 (cc=1) -+sh 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFFFFFF (cc=2) -+sh FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sh 8000000000000000 - 000000000000FFFF - 1 = 8000000000000000 (cc=0) -+sh 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sg 0000000000000000 - 000000000000FFFF - 1 = FFFFFFFFFFFF0001 (cc=1) -+sg 0000000000000001 - 000000000000FFFF - 1 = FFFFFFFFFFFF0002 (cc=1) -+sg 000000000000FFFF - 000000000000FFFF - 1 = 0000000000000000 (cc=0) -+sg 0000000000007FFF - 000000000000FFFF - 1 = FFFFFFFFFFFF8000 (cc=1) -+sg 0000000000008000 - 000000000000FFFF - 1 = FFFFFFFFFFFF8001 (cc=1) -+sg 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFF0000 (cc=2) -+sg 0000000080000000 - 000000000000FFFF - 1 = 000000007FFF0001 (cc=2) -+sg 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFF0000 (cc=2) -+sg FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFF0000 (cc=1) -+sg 8000000000000000 - 000000000000FFFF - 1 = 7FFFFFFFFFFF0001 (cc=3) -+sg 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFF0000 (cc=2) -+sgf 0000000000000000 - 000000000000FFFF - 1 = 0000000000000000 (cc=0) -+sgf 0000000000000001 - 000000000000FFFF - 1 = 0000000000000001 (cc=2) -+sgf 000000000000FFFF - 000000000000FFFF - 1 = 000000000000FFFF (cc=2) -+sgf 0000000000007FFF - 000000000000FFFF - 1 = 0000000000007FFF (cc=2) -+sgf 0000000000008000 - 000000000000FFFF - 1 = 0000000000008000 (cc=2) -+sgf 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFFFFFF (cc=2) -+sgf 0000000080000000 - 000000000000FFFF - 1 = 0000000080000000 (cc=2) -+sgf 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFFFFFF (cc=2) -+sgf FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sgf 8000000000000000 - 000000000000FFFF - 1 = 8000000000000000 (cc=1) -+sgf 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFFFFFF (cc=2) -+sl 0000000000000000 - 000000000000FFFF - 1 = 0000000000000000 (cc=2) -+sl 0000000000000001 - 000000000000FFFF - 1 = 0000000000000001 (cc=3) -+sl 000000000000FFFF - 000000000000FFFF - 1 = 000000000000FFFF (cc=3) -+sl 0000000000007FFF - 000000000000FFFF - 1 = 0000000000007FFF (cc=3) -+sl 0000000000008000 - 000000000000FFFF - 1 = 0000000000008000 (cc=3) -+sl 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFFFFFF (cc=3) -+sl 0000000080000000 - 000000000000FFFF - 1 = 0000000080000000 (cc=3) -+sl 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFFFFFF (cc=3) -+sl FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFFFFFF (cc=3) -+sl 8000000000000000 - 000000000000FFFF - 1 = 8000000000000000 (cc=2) -+sl 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slg 0000000000000000 - 000000000000FFFF - 1 = FFFFFFFFFFFF0001 (cc=1) -+slg 0000000000000001 - 000000000000FFFF - 1 = FFFFFFFFFFFF0002 (cc=1) -+slg 000000000000FFFF - 000000000000FFFF - 1 = 0000000000000000 (cc=2) -+slg 0000000000007FFF - 000000000000FFFF - 1 = FFFFFFFFFFFF8000 (cc=1) -+slg 0000000000008000 - 000000000000FFFF - 1 = FFFFFFFFFFFF8001 (cc=1) -+slg 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFF0000 (cc=3) -+slg 0000000080000000 - 000000000000FFFF - 1 = 000000007FFF0001 (cc=3) -+slg 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFF0000 (cc=3) -+slg FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFF0000 (cc=3) -+slg 8000000000000000 - 000000000000FFFF - 1 = 7FFFFFFFFFFF0001 (cc=3) -+slg 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFF0000 (cc=3) -+sgf 0000000000000000 - 000000000000FFFF - 1 = 0000000000000000 (cc=0) -+sgf 0000000000000001 - 000000000000FFFF - 1 = 0000000000000001 (cc=2) -+sgf 000000000000FFFF - 000000000000FFFF - 1 = 000000000000FFFF (cc=2) -+sgf 0000000000007FFF - 000000000000FFFF - 1 = 0000000000007FFF (cc=2) -+sgf 0000000000008000 - 000000000000FFFF - 1 = 0000000000008000 (cc=2) -+sgf 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFFFFFF (cc=2) -+sgf 0000000080000000 - 000000000000FFFF - 1 = 0000000080000000 (cc=2) -+sgf 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFFFFFF (cc=2) -+sgf FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sgf 8000000000000000 - 000000000000FFFF - 1 = 8000000000000000 (cc=1) -+sgf 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFFFFFF (cc=2) -+slgf 0000000000000000 - 000000000000FFFF - 1 = 0000000000000000 (cc=2) -+slgf 0000000000000001 - 000000000000FFFF - 1 = 0000000000000001 (cc=3) -+slgf 000000000000FFFF - 000000000000FFFF - 1 = 000000000000FFFF (cc=3) -+slgf 0000000000007FFF - 000000000000FFFF - 1 = 0000000000007FFF (cc=3) -+slgf 0000000000008000 - 000000000000FFFF - 1 = 0000000000008000 (cc=3) -+slgf 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFFFFFF (cc=3) -+slgf 0000000080000000 - 000000000000FFFF - 1 = 0000000080000000 (cc=3) -+slgf 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFFFFFF (cc=3) -+slgf FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFFFFFF (cc=3) -+slgf 8000000000000000 - 000000000000FFFF - 1 = 8000000000000000 (cc=3) -+slgf 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+sr 0000000000000000 - 000000000000FFFF - 1 = 00000000FFFF0001 (cc=1) -+sr 0000000000000001 - 000000000000FFFF - 1 = 00000000FFFF0002 (cc=1) -+sr 000000000000FFFF - 000000000000FFFF - 1 = 0000000000000000 (cc=0) -+sr 0000000000007FFF - 000000000000FFFF - 1 = 00000000FFFF8000 (cc=1) -+sr 0000000000008000 - 000000000000FFFF - 1 = 00000000FFFF8001 (cc=1) -+sr 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFF0000 (cc=1) -+sr 0000000080000000 - 000000000000FFFF - 1 = 000000007FFF0001 (cc=3) -+sr 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFF0000 (cc=2) -+sr FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFF0000 (cc=1) -+sr 8000000000000000 - 000000000000FFFF - 1 = 80000000FFFF0001 (cc=1) -+sr 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFF0000 (cc=1) -+sgr 0000000000000000 - 000000000000FFFF - 1 = FFFFFFFFFFFF0001 (cc=1) -+sgr 0000000000000001 - 000000000000FFFF - 1 = FFFFFFFFFFFF0002 (cc=1) -+sgr 000000000000FFFF - 000000000000FFFF - 1 = 0000000000000000 (cc=0) -+sgr 0000000000007FFF - 000000000000FFFF - 1 = FFFFFFFFFFFF8000 (cc=1) -+sgr 0000000000008000 - 000000000000FFFF - 1 = FFFFFFFFFFFF8001 (cc=1) -+sgr 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFF0000 (cc=2) -+sgr 0000000080000000 - 000000000000FFFF - 1 = 000000007FFF0001 (cc=2) -+sgr 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFF0000 (cc=2) -+sgr FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFF0000 (cc=1) -+sgr 8000000000000000 - 000000000000FFFF - 1 = 7FFFFFFFFFFF0001 (cc=3) -+sgr 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFF0000 (cc=2) -+sgfr 0000000000000000 - 000000000000FFFF - 1 = FFFFFFFFFFFF0001 (cc=1) -+sgfr 0000000000000001 - 000000000000FFFF - 1 = FFFFFFFFFFFF0002 (cc=1) -+sgfr 000000000000FFFF - 000000000000FFFF - 1 = 0000000000000000 (cc=0) -+sgfr 0000000000007FFF - 000000000000FFFF - 1 = FFFFFFFFFFFF8000 (cc=1) -+sgfr 0000000000008000 - 000000000000FFFF - 1 = FFFFFFFFFFFF8001 (cc=1) -+sgfr 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFF0000 (cc=2) -+sgfr 0000000080000000 - 000000000000FFFF - 1 = 000000007FFF0001 (cc=2) -+sgfr 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFF0000 (cc=2) -+sgfr FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFF0000 (cc=1) -+sgfr 8000000000000000 - 000000000000FFFF - 1 = 7FFFFFFFFFFF0001 (cc=3) -+sgfr 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFF0000 (cc=2) -+slr 0000000000000000 - 000000000000FFFF - 1 = 00000000FFFF0001 (cc=1) -+slr 0000000000000001 - 000000000000FFFF - 1 = 00000000FFFF0002 (cc=1) -+slr 000000000000FFFF - 000000000000FFFF - 1 = 0000000000000000 (cc=2) -+slr 0000000000007FFF - 000000000000FFFF - 1 = 00000000FFFF8000 (cc=1) -+slr 0000000000008000 - 000000000000FFFF - 1 = 00000000FFFF8001 (cc=1) -+slr 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFF0000 (cc=3) -+slr 0000000080000000 - 000000000000FFFF - 1 = 000000007FFF0001 (cc=3) -+slr 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFF0000 (cc=3) -+slr FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFF0000 (cc=3) -+slr 8000000000000000 - 000000000000FFFF - 1 = 80000000FFFF0001 (cc=1) -+slr 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFF0000 (cc=3) -+slgr 0000000000000000 - 000000000000FFFF - 1 = FFFFFFFFFFFF0001 (cc=1) -+slgr 0000000000000001 - 000000000000FFFF - 1 = FFFFFFFFFFFF0002 (cc=1) -+slgr 000000000000FFFF - 000000000000FFFF - 1 = 0000000000000000 (cc=2) -+slgr 0000000000007FFF - 000000000000FFFF - 1 = FFFFFFFFFFFF8000 (cc=1) -+slgr 0000000000008000 - 000000000000FFFF - 1 = FFFFFFFFFFFF8001 (cc=1) -+slgr 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFF0000 (cc=3) -+slgr 0000000080000000 - 000000000000FFFF - 1 = 000000007FFF0001 (cc=3) -+slgr 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFF0000 (cc=3) -+slgr FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFF0000 (cc=3) -+slgr 8000000000000000 - 000000000000FFFF - 1 = 7FFFFFFFFFFF0001 (cc=3) -+slgr 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFF0000 (cc=3) -+slgfr 0000000000000000 - 000000000000FFFF - 1 = FFFFFFFFFFFF0001 (cc=1) -+slgfr 0000000000000001 - 000000000000FFFF - 1 = FFFFFFFFFFFF0002 (cc=1) -+slgfr 000000000000FFFF - 000000000000FFFF - 1 = 0000000000000000 (cc=2) -+slgfr 0000000000007FFF - 000000000000FFFF - 1 = FFFFFFFFFFFF8000 (cc=1) -+slgfr 0000000000008000 - 000000000000FFFF - 1 = FFFFFFFFFFFF8001 (cc=1) -+slgfr 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFF0000 (cc=3) -+slgfr 0000000080000000 - 000000000000FFFF - 1 = 000000007FFF0001 (cc=3) -+slgfr 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFF0000 (cc=3) -+slgfr FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFF0000 (cc=3) -+slgfr 8000000000000000 - 000000000000FFFF - 1 = 7FFFFFFFFFFF0001 (cc=3) -+slgfr 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFF0000 (cc=3) -+slb 0000000000000000 - 000000000000FFFF - 1 = 00000000FFFFFFFF (cc=1) -+slb 0000000000000001 - 000000000000FFFF - 1 = 0000000000000000 (cc=2) -+slb 000000000000FFFF - 000000000000FFFF - 1 = 000000000000FFFE (cc=3) -+slb 0000000000007FFF - 000000000000FFFF - 1 = 0000000000007FFE (cc=3) -+slb 0000000000008000 - 000000000000FFFF - 1 = 0000000000007FFF (cc=3) -+slb 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFFFFFE (cc=3) -+slb 0000000080000000 - 000000000000FFFF - 1 = 000000007FFFFFFF (cc=3) -+slb 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFFFFFE (cc=3) -+slb FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFFFFFE (cc=3) -+slb 8000000000000000 - 000000000000FFFF - 1 = 80000000FFFFFFFF (cc=1) -+slb 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFFFFFE (cc=3) -+slbg 0000000000000000 - 000000000000FFFF - 1 = FFFFFFFFFFFF0000 (cc=1) -+slbg 0000000000000001 - 000000000000FFFF - 1 = FFFFFFFFFFFF0001 (cc=1) -+slbg 000000000000FFFF - 000000000000FFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slbg 0000000000007FFF - 000000000000FFFF - 1 = FFFFFFFFFFFF7FFF (cc=1) -+slbg 0000000000008000 - 000000000000FFFF - 1 = FFFFFFFFFFFF8000 (cc=1) -+slbg 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFEFFFF (cc=3) -+slbg 0000000080000000 - 000000000000FFFF - 1 = 000000007FFF0000 (cc=3) -+slbg 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFEFFFF (cc=3) -+slbg FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFEFFFF (cc=3) -+slbg 8000000000000000 - 000000000000FFFF - 1 = 7FFFFFFFFFFF0000 (cc=3) -+slbg 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFEFFFF (cc=3) -+slbr 0000000000000000 - 000000000000FFFF - 1 = 00000000FFFF0000 (cc=1) -+slbr 0000000000000001 - 000000000000FFFF - 1 = 00000000FFFF0001 (cc=1) -+slbr 000000000000FFFF - 000000000000FFFF - 1 = 00000000FFFFFFFF (cc=1) -+slbr 0000000000007FFF - 000000000000FFFF - 1 = 00000000FFFF7FFF (cc=1) -+slbr 0000000000008000 - 000000000000FFFF - 1 = 00000000FFFF8000 (cc=1) -+slbr 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFEFFFF (cc=3) -+slbr 0000000080000000 - 000000000000FFFF - 1 = 000000007FFF0000 (cc=3) -+slbr 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFEFFFF (cc=3) -+slbr FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFEFFFF (cc=3) -+slbr 8000000000000000 - 000000000000FFFF - 1 = 80000000FFFF0000 (cc=1) -+slbr 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFEFFFF (cc=3) -+slbgr 0000000000000000 - 000000000000FFFF - 1 = FFFFFFFFFFFF0000 (cc=1) -+slbgr 0000000000000001 - 000000000000FFFF - 1 = FFFFFFFFFFFF0001 (cc=1) -+slbgr 000000000000FFFF - 000000000000FFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slbgr 0000000000007FFF - 000000000000FFFF - 1 = FFFFFFFFFFFF7FFF (cc=1) -+slbgr 0000000000008000 - 000000000000FFFF - 1 = FFFFFFFFFFFF8000 (cc=1) -+slbgr 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFEFFFF (cc=3) -+slbgr 0000000080000000 - 000000000000FFFF - 1 = 000000007FFF0000 (cc=3) -+slbgr 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFEFFFF (cc=3) -+slbgr FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFEFFFF (cc=3) -+slbgr 8000000000000000 - 000000000000FFFF - 1 = 7FFFFFFFFFFF0000 (cc=3) -+slbgr 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFEFFFF (cc=3) -+slb 0000000000000000 - 000000000000FFFF - 0 = 0000000000000000 (cc=2) -+slb 0000000000000001 - 000000000000FFFF - 0 = 0000000000000001 (cc=3) -+slb 000000000000FFFF - 000000000000FFFF - 0 = 000000000000FFFF (cc=3) -+slb 0000000000007FFF - 000000000000FFFF - 0 = 0000000000007FFF (cc=3) -+slb 0000000000008000 - 000000000000FFFF - 0 = 0000000000008000 (cc=3) -+slb 00000000FFFFFFFF - 000000000000FFFF - 0 = 00000000FFFFFFFF (cc=3) -+slb 0000000080000000 - 000000000000FFFF - 0 = 0000000080000000 (cc=3) -+slb 000000007FFFFFFF - 000000000000FFFF - 0 = 000000007FFFFFFF (cc=3) -+slb FFFFFFFFFFFFFFFF - 000000000000FFFF - 0 = FFFFFFFFFFFFFFFF (cc=3) -+slb 8000000000000000 - 000000000000FFFF - 0 = 8000000000000000 (cc=2) -+slb 7FFFFFFFFFFFFFFF - 000000000000FFFF - 0 = 7FFFFFFFFFFFFFFF (cc=3) -+slbg 0000000000000000 - 000000000000FFFF - 0 = FFFFFFFFFFFF0001 (cc=1) -+slbg 0000000000000001 - 000000000000FFFF - 0 = FFFFFFFFFFFF0002 (cc=1) -+slbg 000000000000FFFF - 000000000000FFFF - 0 = 0000000000000000 (cc=2) -+slbg 0000000000007FFF - 000000000000FFFF - 0 = FFFFFFFFFFFF8000 (cc=1) -+slbg 0000000000008000 - 000000000000FFFF - 0 = FFFFFFFFFFFF8001 (cc=1) -+slbg 00000000FFFFFFFF - 000000000000FFFF - 0 = 00000000FFFF0000 (cc=3) -+slbg 0000000080000000 - 000000000000FFFF - 0 = 000000007FFF0001 (cc=3) -+slbg 000000007FFFFFFF - 000000000000FFFF - 0 = 000000007FFF0000 (cc=3) -+slbg FFFFFFFFFFFFFFFF - 000000000000FFFF - 0 = FFFFFFFFFFFF0000 (cc=3) -+slbg 8000000000000000 - 000000000000FFFF - 0 = 7FFFFFFFFFFF0001 (cc=3) -+slbg 7FFFFFFFFFFFFFFF - 000000000000FFFF - 0 = 7FFFFFFFFFFF0000 (cc=3) -+slbr 0000000000000000 - 000000000000FFFF - 0 = 00000000FFFF0001 (cc=1) -+slbr 0000000000000001 - 000000000000FFFF - 0 = 00000000FFFF0002 (cc=1) -+slbr 000000000000FFFF - 000000000000FFFF - 0 = 0000000000000000 (cc=2) -+slbr 0000000000007FFF - 000000000000FFFF - 0 = 00000000FFFF8000 (cc=1) -+slbr 0000000000008000 - 000000000000FFFF - 0 = 00000000FFFF8001 (cc=1) -+slbr 00000000FFFFFFFF - 000000000000FFFF - 0 = 00000000FFFF0000 (cc=3) -+slbr 0000000080000000 - 000000000000FFFF - 0 = 000000007FFF0001 (cc=3) -+slbr 000000007FFFFFFF - 000000000000FFFF - 0 = 000000007FFF0000 (cc=3) -+slbr FFFFFFFFFFFFFFFF - 000000000000FFFF - 0 = FFFFFFFFFFFF0000 (cc=3) -+slbr 8000000000000000 - 000000000000FFFF - 0 = 80000000FFFF0001 (cc=1) -+slbr 7FFFFFFFFFFFFFFF - 000000000000FFFF - 0 = 7FFFFFFFFFFF0000 (cc=3) -+slbgr 0000000000000000 - 000000000000FFFF - 0 = FFFFFFFFFFFF0001 (cc=1) -+slbgr 0000000000000001 - 000000000000FFFF - 0 = FFFFFFFFFFFF0002 (cc=1) -+slbgr 000000000000FFFF - 000000000000FFFF - 0 = 0000000000000000 (cc=2) -+slbgr 0000000000007FFF - 000000000000FFFF - 0 = FFFFFFFFFFFF8000 (cc=1) -+slbgr 0000000000008000 - 000000000000FFFF - 0 = FFFFFFFFFFFF8001 (cc=1) -+slbgr 00000000FFFFFFFF - 000000000000FFFF - 0 = 00000000FFFF0000 (cc=3) -+slbgr 0000000080000000 - 000000000000FFFF - 0 = 000000007FFF0001 (cc=3) -+slbgr 000000007FFFFFFF - 000000000000FFFF - 0 = 000000007FFF0000 (cc=3) -+slbgr FFFFFFFFFFFFFFFF - 000000000000FFFF - 0 = FFFFFFFFFFFF0000 (cc=3) -+slbgr 8000000000000000 - 000000000000FFFF - 0 = 7FFFFFFFFFFF0001 (cc=3) -+slbgr 7FFFFFFFFFFFFFFF - 000000000000FFFF - 0 = 7FFFFFFFFFFF0000 (cc=3) -+shy 0000000000000000 - 000000000000FFFF - 1 = 0000000000000000 (cc=0) -+shy 0000000000000001 - 000000000000FFFF - 1 = 0000000000000001 (cc=2) -+shy 000000000000FFFF - 000000000000FFFF - 1 = 000000000000FFFF (cc=2) -+shy 0000000000007FFF - 000000000000FFFF - 1 = 0000000000007FFF (cc=2) -+shy 0000000000008000 - 000000000000FFFF - 1 = 0000000000008000 (cc=2) -+shy 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFFFFFF (cc=1) -+shy 0000000080000000 - 000000000000FFFF - 1 = 0000000080000000 (cc=1) -+shy 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFFFFFF (cc=2) -+shy FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+shy 8000000000000000 - 000000000000FFFF - 1 = 8000000000000000 (cc=0) -+shy 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sly 0000000000000000 - 000000000000FFFF - 1 = 0000000000000000 (cc=2) -+sly 0000000000000001 - 000000000000FFFF - 1 = 0000000000000001 (cc=3) -+sly 000000000000FFFF - 000000000000FFFF - 1 = 000000000000FFFF (cc=3) -+sly 0000000000007FFF - 000000000000FFFF - 1 = 0000000000007FFF (cc=3) -+sly 0000000000008000 - 000000000000FFFF - 1 = 0000000000008000 (cc=3) -+sly 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFFFFFF (cc=3) -+sly 0000000080000000 - 000000000000FFFF - 1 = 0000000080000000 (cc=3) -+sly 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFFFFFF (cc=3) -+sly FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFFFFFF (cc=3) -+sly 8000000000000000 - 000000000000FFFF - 1 = 8000000000000000 (cc=2) -+sly 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+sy 0000000000000000 - 000000000000FFFF - 1 = 0000000000000000 (cc=0) -+sy 0000000000000001 - 000000000000FFFF - 1 = 0000000000000001 (cc=2) -+sy 000000000000FFFF - 000000000000FFFF - 1 = 000000000000FFFF (cc=2) -+sy 0000000000007FFF - 000000000000FFFF - 1 = 0000000000007FFF (cc=2) -+sy 0000000000008000 - 000000000000FFFF - 1 = 0000000000008000 (cc=2) -+sy 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFFFFFF (cc=1) -+sy 0000000080000000 - 000000000000FFFF - 1 = 0000000080000000 (cc=1) -+sy 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFFFFFF (cc=2) -+sy FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sy 8000000000000000 - 000000000000FFFF - 1 = 8000000000000000 (cc=0) -+sy 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+s 0000000000000000 - 0000000000007FFF - 1 = 0000000000000000 (cc=0) -+s 0000000000000001 - 0000000000007FFF - 1 = 0000000000000001 (cc=2) -+s 000000000000FFFF - 0000000000007FFF - 1 = 000000000000FFFF (cc=2) -+s 0000000000007FFF - 0000000000007FFF - 1 = 0000000000007FFF (cc=2) -+s 0000000000008000 - 0000000000007FFF - 1 = 0000000000008000 (cc=2) -+s 00000000FFFFFFFF - 0000000000007FFF - 1 = 00000000FFFFFFFF (cc=1) -+s 0000000080000000 - 0000000000007FFF - 1 = 0000000080000000 (cc=1) -+s 000000007FFFFFFF - 0000000000007FFF - 1 = 000000007FFFFFFF (cc=2) -+s FFFFFFFFFFFFFFFF - 0000000000007FFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+s 8000000000000000 - 0000000000007FFF - 1 = 8000000000000000 (cc=0) -+s 7FFFFFFFFFFFFFFF - 0000000000007FFF - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sh 0000000000000000 - 0000000000007FFF - 1 = 0000000000000000 (cc=0) -+sh 0000000000000001 - 0000000000007FFF - 1 = 0000000000000001 (cc=2) -+sh 000000000000FFFF - 0000000000007FFF - 1 = 000000000000FFFF (cc=2) -+sh 0000000000007FFF - 0000000000007FFF - 1 = 0000000000007FFF (cc=2) -+sh 0000000000008000 - 0000000000007FFF - 1 = 0000000000008000 (cc=2) -+sh 00000000FFFFFFFF - 0000000000007FFF - 1 = 00000000FFFFFFFF (cc=1) -+sh 0000000080000000 - 0000000000007FFF - 1 = 0000000080000000 (cc=1) -+sh 000000007FFFFFFF - 0000000000007FFF - 1 = 000000007FFFFFFF (cc=2) -+sh FFFFFFFFFFFFFFFF - 0000000000007FFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sh 8000000000000000 - 0000000000007FFF - 1 = 8000000000000000 (cc=0) -+sh 7FFFFFFFFFFFFFFF - 0000000000007FFF - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sg 0000000000000000 - 0000000000007FFF - 1 = FFFFFFFFFFFF8001 (cc=1) -+sg 0000000000000001 - 0000000000007FFF - 1 = FFFFFFFFFFFF8002 (cc=1) -+sg 000000000000FFFF - 0000000000007FFF - 1 = 0000000000008000 (cc=2) -+sg 0000000000007FFF - 0000000000007FFF - 1 = 0000000000000000 (cc=0) -+sg 0000000000008000 - 0000000000007FFF - 1 = 0000000000000001 (cc=2) -+sg 00000000FFFFFFFF - 0000000000007FFF - 1 = 00000000FFFF8000 (cc=2) -+sg 0000000080000000 - 0000000000007FFF - 1 = 000000007FFF8001 (cc=2) -+sg 000000007FFFFFFF - 0000000000007FFF - 1 = 000000007FFF8000 (cc=2) -+sg FFFFFFFFFFFFFFFF - 0000000000007FFF - 1 = FFFFFFFFFFFF8000 (cc=1) -+sg 8000000000000000 - 0000000000007FFF - 1 = 7FFFFFFFFFFF8001 (cc=3) -+sg 7FFFFFFFFFFFFFFF - 0000000000007FFF - 1 = 7FFFFFFFFFFF8000 (cc=2) -+sgf 0000000000000000 - 0000000000007FFF - 1 = 0000000000000000 (cc=0) -+sgf 0000000000000001 - 0000000000007FFF - 1 = 0000000000000001 (cc=2) -+sgf 000000000000FFFF - 0000000000007FFF - 1 = 000000000000FFFF (cc=2) -+sgf 0000000000007FFF - 0000000000007FFF - 1 = 0000000000007FFF (cc=2) -+sgf 0000000000008000 - 0000000000007FFF - 1 = 0000000000008000 (cc=2) -+sgf 00000000FFFFFFFF - 0000000000007FFF - 1 = 00000000FFFFFFFF (cc=2) -+sgf 0000000080000000 - 0000000000007FFF - 1 = 0000000080000000 (cc=2) -+sgf 000000007FFFFFFF - 0000000000007FFF - 1 = 000000007FFFFFFF (cc=2) -+sgf FFFFFFFFFFFFFFFF - 0000000000007FFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sgf 8000000000000000 - 0000000000007FFF - 1 = 8000000000000000 (cc=1) -+sgf 7FFFFFFFFFFFFFFF - 0000000000007FFF - 1 = 7FFFFFFFFFFFFFFF (cc=2) -+sl 0000000000000000 - 0000000000007FFF - 1 = 0000000000000000 (cc=2) -+sl 0000000000000001 - 0000000000007FFF - 1 = 0000000000000001 (cc=3) -+sl 000000000000FFFF - 0000000000007FFF - 1 = 000000000000FFFF (cc=3) -+sl 0000000000007FFF - 0000000000007FFF - 1 = 0000000000007FFF (cc=3) -+sl 0000000000008000 - 0000000000007FFF - 1 = 0000000000008000 (cc=3) -+sl 00000000FFFFFFFF - 0000000000007FFF - 1 = 00000000FFFFFFFF (cc=3) -+sl 0000000080000000 - 0000000000007FFF - 1 = 0000000080000000 (cc=3) -+sl 000000007FFFFFFF - 0000000000007FFF - 1 = 000000007FFFFFFF (cc=3) -+sl FFFFFFFFFFFFFFFF - 0000000000007FFF - 1 = FFFFFFFFFFFFFFFF (cc=3) -+sl 8000000000000000 - 0000000000007FFF - 1 = 8000000000000000 (cc=2) -+sl 7FFFFFFFFFFFFFFF - 0000000000007FFF - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slg 0000000000000000 - 0000000000007FFF - 1 = FFFFFFFFFFFF8001 (cc=1) -+slg 0000000000000001 - 0000000000007FFF - 1 = FFFFFFFFFFFF8002 (cc=1) -+slg 000000000000FFFF - 0000000000007FFF - 1 = 0000000000008000 (cc=3) -+slg 0000000000007FFF - 0000000000007FFF - 1 = 0000000000000000 (cc=2) -+slg 0000000000008000 - 0000000000007FFF - 1 = 0000000000000001 (cc=3) -+slg 00000000FFFFFFFF - 0000000000007FFF - 1 = 00000000FFFF8000 (cc=3) -+slg 0000000080000000 - 0000000000007FFF - 1 = 000000007FFF8001 (cc=3) -+slg 000000007FFFFFFF - 0000000000007FFF - 1 = 000000007FFF8000 (cc=3) -+slg FFFFFFFFFFFFFFFF - 0000000000007FFF - 1 = FFFFFFFFFFFF8000 (cc=3) -+slg 8000000000000000 - 0000000000007FFF - 1 = 7FFFFFFFFFFF8001 (cc=3) -+slg 7FFFFFFFFFFFFFFF - 0000000000007FFF - 1 = 7FFFFFFFFFFF8000 (cc=3) -+sgf 0000000000000000 - 0000000000007FFF - 1 = 0000000000000000 (cc=0) -+sgf 0000000000000001 - 0000000000007FFF - 1 = 0000000000000001 (cc=2) -+sgf 000000000000FFFF - 0000000000007FFF - 1 = 000000000000FFFF (cc=2) -+sgf 0000000000007FFF - 0000000000007FFF - 1 = 0000000000007FFF (cc=2) -+sgf 0000000000008000 - 0000000000007FFF - 1 = 0000000000008000 (cc=2) -+sgf 00000000FFFFFFFF - 0000000000007FFF - 1 = 00000000FFFFFFFF (cc=2) -+sgf 0000000080000000 - 0000000000007FFF - 1 = 0000000080000000 (cc=2) -+sgf 000000007FFFFFFF - 0000000000007FFF - 1 = 000000007FFFFFFF (cc=2) -+sgf FFFFFFFFFFFFFFFF - 0000000000007FFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sgf 8000000000000000 - 0000000000007FFF - 1 = 8000000000000000 (cc=1) -+sgf 7FFFFFFFFFFFFFFF - 0000000000007FFF - 1 = 7FFFFFFFFFFFFFFF (cc=2) -+slgf 0000000000000000 - 0000000000007FFF - 1 = 0000000000000000 (cc=2) -+slgf 0000000000000001 - 0000000000007FFF - 1 = 0000000000000001 (cc=3) -+slgf 000000000000FFFF - 0000000000007FFF - 1 = 000000000000FFFF (cc=3) -+slgf 0000000000007FFF - 0000000000007FFF - 1 = 0000000000007FFF (cc=3) -+slgf 0000000000008000 - 0000000000007FFF - 1 = 0000000000008000 (cc=3) -+slgf 00000000FFFFFFFF - 0000000000007FFF - 1 = 00000000FFFFFFFF (cc=3) -+slgf 0000000080000000 - 0000000000007FFF - 1 = 0000000080000000 (cc=3) -+slgf 000000007FFFFFFF - 0000000000007FFF - 1 = 000000007FFFFFFF (cc=3) -+slgf FFFFFFFFFFFFFFFF - 0000000000007FFF - 1 = FFFFFFFFFFFFFFFF (cc=3) -+slgf 8000000000000000 - 0000000000007FFF - 1 = 8000000000000000 (cc=3) -+slgf 7FFFFFFFFFFFFFFF - 0000000000007FFF - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+sr 0000000000000000 - 0000000000007FFF - 1 = 00000000FFFF8001 (cc=1) -+sr 0000000000000001 - 0000000000007FFF - 1 = 00000000FFFF8002 (cc=1) -+sr 000000000000FFFF - 0000000000007FFF - 1 = 0000000000008000 (cc=2) -+sr 0000000000007FFF - 0000000000007FFF - 1 = 0000000000000000 (cc=0) -+sr 0000000000008000 - 0000000000007FFF - 1 = 0000000000000001 (cc=2) -+sr 00000000FFFFFFFF - 0000000000007FFF - 1 = 00000000FFFF8000 (cc=1) -+sr 0000000080000000 - 0000000000007FFF - 1 = 000000007FFF8001 (cc=3) -+sr 000000007FFFFFFF - 0000000000007FFF - 1 = 000000007FFF8000 (cc=2) -+sr FFFFFFFFFFFFFFFF - 0000000000007FFF - 1 = FFFFFFFFFFFF8000 (cc=1) -+sr 8000000000000000 - 0000000000007FFF - 1 = 80000000FFFF8001 (cc=1) -+sr 7FFFFFFFFFFFFFFF - 0000000000007FFF - 1 = 7FFFFFFFFFFF8000 (cc=1) -+sgr 0000000000000000 - 0000000000007FFF - 1 = FFFFFFFFFFFF8001 (cc=1) -+sgr 0000000000000001 - 0000000000007FFF - 1 = FFFFFFFFFFFF8002 (cc=1) -+sgr 000000000000FFFF - 0000000000007FFF - 1 = 0000000000008000 (cc=2) -+sgr 0000000000007FFF - 0000000000007FFF - 1 = 0000000000000000 (cc=0) -+sgr 0000000000008000 - 0000000000007FFF - 1 = 0000000000000001 (cc=2) -+sgr 00000000FFFFFFFF - 0000000000007FFF - 1 = 00000000FFFF8000 (cc=2) -+sgr 0000000080000000 - 0000000000007FFF - 1 = 000000007FFF8001 (cc=2) -+sgr 000000007FFFFFFF - 0000000000007FFF - 1 = 000000007FFF8000 (cc=2) -+sgr FFFFFFFFFFFFFFFF - 0000000000007FFF - 1 = FFFFFFFFFFFF8000 (cc=1) -+sgr 8000000000000000 - 0000000000007FFF - 1 = 7FFFFFFFFFFF8001 (cc=3) -+sgr 7FFFFFFFFFFFFFFF - 0000000000007FFF - 1 = 7FFFFFFFFFFF8000 (cc=2) -+sgfr 0000000000000000 - 0000000000007FFF - 1 = FFFFFFFFFFFF8001 (cc=1) -+sgfr 0000000000000001 - 0000000000007FFF - 1 = FFFFFFFFFFFF8002 (cc=1) -+sgfr 000000000000FFFF - 0000000000007FFF - 1 = 0000000000008000 (cc=2) -+sgfr 0000000000007FFF - 0000000000007FFF - 1 = 0000000000000000 (cc=0) -+sgfr 0000000000008000 - 0000000000007FFF - 1 = 0000000000000001 (cc=2) -+sgfr 00000000FFFFFFFF - 0000000000007FFF - 1 = 00000000FFFF8000 (cc=2) -+sgfr 0000000080000000 - 0000000000007FFF - 1 = 000000007FFF8001 (cc=2) -+sgfr 000000007FFFFFFF - 0000000000007FFF - 1 = 000000007FFF8000 (cc=2) -+sgfr FFFFFFFFFFFFFFFF - 0000000000007FFF - 1 = FFFFFFFFFFFF8000 (cc=1) -+sgfr 8000000000000000 - 0000000000007FFF - 1 = 7FFFFFFFFFFF8001 (cc=3) -+sgfr 7FFFFFFFFFFFFFFF - 0000000000007FFF - 1 = 7FFFFFFFFFFF8000 (cc=2) -+slr 0000000000000000 - 0000000000007FFF - 1 = 00000000FFFF8001 (cc=1) -+slr 0000000000000001 - 0000000000007FFF - 1 = 00000000FFFF8002 (cc=1) -+slr 000000000000FFFF - 0000000000007FFF - 1 = 0000000000008000 (cc=3) -+slr 0000000000007FFF - 0000000000007FFF - 1 = 0000000000000000 (cc=2) -+slr 0000000000008000 - 0000000000007FFF - 1 = 0000000000000001 (cc=3) -+slr 00000000FFFFFFFF - 0000000000007FFF - 1 = 00000000FFFF8000 (cc=3) -+slr 0000000080000000 - 0000000000007FFF - 1 = 000000007FFF8001 (cc=3) -+slr 000000007FFFFFFF - 0000000000007FFF - 1 = 000000007FFF8000 (cc=3) -+slr FFFFFFFFFFFFFFFF - 0000000000007FFF - 1 = FFFFFFFFFFFF8000 (cc=3) -+slr 8000000000000000 - 0000000000007FFF - 1 = 80000000FFFF8001 (cc=1) -+slr 7FFFFFFFFFFFFFFF - 0000000000007FFF - 1 = 7FFFFFFFFFFF8000 (cc=3) -+slgr 0000000000000000 - 0000000000007FFF - 1 = FFFFFFFFFFFF8001 (cc=1) -+slgr 0000000000000001 - 0000000000007FFF - 1 = FFFFFFFFFFFF8002 (cc=1) -+slgr 000000000000FFFF - 0000000000007FFF - 1 = 0000000000008000 (cc=3) -+slgr 0000000000007FFF - 0000000000007FFF - 1 = 0000000000000000 (cc=2) -+slgr 0000000000008000 - 0000000000007FFF - 1 = 0000000000000001 (cc=3) -+slgr 00000000FFFFFFFF - 0000000000007FFF - 1 = 00000000FFFF8000 (cc=3) -+slgr 0000000080000000 - 0000000000007FFF - 1 = 000000007FFF8001 (cc=3) -+slgr 000000007FFFFFFF - 0000000000007FFF - 1 = 000000007FFF8000 (cc=3) -+slgr FFFFFFFFFFFFFFFF - 0000000000007FFF - 1 = FFFFFFFFFFFF8000 (cc=3) -+slgr 8000000000000000 - 0000000000007FFF - 1 = 7FFFFFFFFFFF8001 (cc=3) -+slgr 7FFFFFFFFFFFFFFF - 0000000000007FFF - 1 = 7FFFFFFFFFFF8000 (cc=3) -+slgfr 0000000000000000 - 0000000000007FFF - 1 = FFFFFFFFFFFF8001 (cc=1) -+slgfr 0000000000000001 - 0000000000007FFF - 1 = FFFFFFFFFFFF8002 (cc=1) -+slgfr 000000000000FFFF - 0000000000007FFF - 1 = 0000000000008000 (cc=3) -+slgfr 0000000000007FFF - 0000000000007FFF - 1 = 0000000000000000 (cc=2) -+slgfr 0000000000008000 - 0000000000007FFF - 1 = 0000000000000001 (cc=3) -+slgfr 00000000FFFFFFFF - 0000000000007FFF - 1 = 00000000FFFF8000 (cc=3) -+slgfr 0000000080000000 - 0000000000007FFF - 1 = 000000007FFF8001 (cc=3) -+slgfr 000000007FFFFFFF - 0000000000007FFF - 1 = 000000007FFF8000 (cc=3) -+slgfr FFFFFFFFFFFFFFFF - 0000000000007FFF - 1 = FFFFFFFFFFFF8000 (cc=3) -+slgfr 8000000000000000 - 0000000000007FFF - 1 = 7FFFFFFFFFFF8001 (cc=3) -+slgfr 7FFFFFFFFFFFFFFF - 0000000000007FFF - 1 = 7FFFFFFFFFFF8000 (cc=3) -+slb 0000000000000000 - 0000000000007FFF - 1 = 00000000FFFFFFFF (cc=1) -+slb 0000000000000001 - 0000000000007FFF - 1 = 0000000000000000 (cc=2) -+slb 000000000000FFFF - 0000000000007FFF - 1 = 000000000000FFFE (cc=3) -+slb 0000000000007FFF - 0000000000007FFF - 1 = 0000000000007FFE (cc=3) -+slb 0000000000008000 - 0000000000007FFF - 1 = 0000000000007FFF (cc=3) -+slb 00000000FFFFFFFF - 0000000000007FFF - 1 = 00000000FFFFFFFE (cc=3) -+slb 0000000080000000 - 0000000000007FFF - 1 = 000000007FFFFFFF (cc=3) -+slb 000000007FFFFFFF - 0000000000007FFF - 1 = 000000007FFFFFFE (cc=3) -+slb FFFFFFFFFFFFFFFF - 0000000000007FFF - 1 = FFFFFFFFFFFFFFFE (cc=3) -+slb 8000000000000000 - 0000000000007FFF - 1 = 80000000FFFFFFFF (cc=1) -+slb 7FFFFFFFFFFFFFFF - 0000000000007FFF - 1 = 7FFFFFFFFFFFFFFE (cc=3) -+slbg 0000000000000000 - 0000000000007FFF - 1 = FFFFFFFFFFFF8000 (cc=1) -+slbg 0000000000000001 - 0000000000007FFF - 1 = FFFFFFFFFFFF8001 (cc=1) -+slbg 000000000000FFFF - 0000000000007FFF - 1 = 0000000000007FFF (cc=3) -+slbg 0000000000007FFF - 0000000000007FFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slbg 0000000000008000 - 0000000000007FFF - 1 = 0000000000000000 (cc=2) -+slbg 00000000FFFFFFFF - 0000000000007FFF - 1 = 00000000FFFF7FFF (cc=3) -+slbg 0000000080000000 - 0000000000007FFF - 1 = 000000007FFF8000 (cc=3) -+slbg 000000007FFFFFFF - 0000000000007FFF - 1 = 000000007FFF7FFF (cc=3) -+slbg FFFFFFFFFFFFFFFF - 0000000000007FFF - 1 = FFFFFFFFFFFF7FFF (cc=3) -+slbg 8000000000000000 - 0000000000007FFF - 1 = 7FFFFFFFFFFF8000 (cc=3) -+slbg 7FFFFFFFFFFFFFFF - 0000000000007FFF - 1 = 7FFFFFFFFFFF7FFF (cc=3) -+slbr 0000000000000000 - 0000000000007FFF - 1 = 00000000FFFF8000 (cc=1) -+slbr 0000000000000001 - 0000000000007FFF - 1 = 00000000FFFF8001 (cc=1) -+slbr 000000000000FFFF - 0000000000007FFF - 1 = 0000000000007FFF (cc=3) -+slbr 0000000000007FFF - 0000000000007FFF - 1 = 00000000FFFFFFFF (cc=1) -+slbr 0000000000008000 - 0000000000007FFF - 1 = 0000000000000000 (cc=2) -+slbr 00000000FFFFFFFF - 0000000000007FFF - 1 = 00000000FFFF7FFF (cc=3) -+slbr 0000000080000000 - 0000000000007FFF - 1 = 000000007FFF8000 (cc=3) -+slbr 000000007FFFFFFF - 0000000000007FFF - 1 = 000000007FFF7FFF (cc=3) -+slbr FFFFFFFFFFFFFFFF - 0000000000007FFF - 1 = FFFFFFFFFFFF7FFF (cc=3) -+slbr 8000000000000000 - 0000000000007FFF - 1 = 80000000FFFF8000 (cc=1) -+slbr 7FFFFFFFFFFFFFFF - 0000000000007FFF - 1 = 7FFFFFFFFFFF7FFF (cc=3) -+slbgr 0000000000000000 - 0000000000007FFF - 1 = FFFFFFFFFFFF8000 (cc=1) -+slbgr 0000000000000001 - 0000000000007FFF - 1 = FFFFFFFFFFFF8001 (cc=1) -+slbgr 000000000000FFFF - 0000000000007FFF - 1 = 0000000000007FFF (cc=3) -+slbgr 0000000000007FFF - 0000000000007FFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slbgr 0000000000008000 - 0000000000007FFF - 1 = 0000000000000000 (cc=2) -+slbgr 00000000FFFFFFFF - 0000000000007FFF - 1 = 00000000FFFF7FFF (cc=3) -+slbgr 0000000080000000 - 0000000000007FFF - 1 = 000000007FFF8000 (cc=3) -+slbgr 000000007FFFFFFF - 0000000000007FFF - 1 = 000000007FFF7FFF (cc=3) -+slbgr FFFFFFFFFFFFFFFF - 0000000000007FFF - 1 = FFFFFFFFFFFF7FFF (cc=3) -+slbgr 8000000000000000 - 0000000000007FFF - 1 = 7FFFFFFFFFFF8000 (cc=3) -+slbgr 7FFFFFFFFFFFFFFF - 0000000000007FFF - 1 = 7FFFFFFFFFFF7FFF (cc=3) -+slb 0000000000000000 - 0000000000007FFF - 0 = 0000000000000000 (cc=2) -+slb 0000000000000001 - 0000000000007FFF - 0 = 0000000000000001 (cc=3) -+slb 000000000000FFFF - 0000000000007FFF - 0 = 000000000000FFFF (cc=3) -+slb 0000000000007FFF - 0000000000007FFF - 0 = 0000000000007FFF (cc=3) -+slb 0000000000008000 - 0000000000007FFF - 0 = 0000000000008000 (cc=3) -+slb 00000000FFFFFFFF - 0000000000007FFF - 0 = 00000000FFFFFFFF (cc=3) -+slb 0000000080000000 - 0000000000007FFF - 0 = 0000000080000000 (cc=3) -+slb 000000007FFFFFFF - 0000000000007FFF - 0 = 000000007FFFFFFF (cc=3) -+slb FFFFFFFFFFFFFFFF - 0000000000007FFF - 0 = FFFFFFFFFFFFFFFF (cc=3) -+slb 8000000000000000 - 0000000000007FFF - 0 = 8000000000000000 (cc=2) -+slb 7FFFFFFFFFFFFFFF - 0000000000007FFF - 0 = 7FFFFFFFFFFFFFFF (cc=3) -+slbg 0000000000000000 - 0000000000007FFF - 0 = FFFFFFFFFFFF8001 (cc=1) -+slbg 0000000000000001 - 0000000000007FFF - 0 = FFFFFFFFFFFF8002 (cc=1) -+slbg 000000000000FFFF - 0000000000007FFF - 0 = 0000000000008000 (cc=3) -+slbg 0000000000007FFF - 0000000000007FFF - 0 = 0000000000000000 (cc=2) -+slbg 0000000000008000 - 0000000000007FFF - 0 = 0000000000000001 (cc=3) -+slbg 00000000FFFFFFFF - 0000000000007FFF - 0 = 00000000FFFF8000 (cc=3) -+slbg 0000000080000000 - 0000000000007FFF - 0 = 000000007FFF8001 (cc=3) -+slbg 000000007FFFFFFF - 0000000000007FFF - 0 = 000000007FFF8000 (cc=3) -+slbg FFFFFFFFFFFFFFFF - 0000000000007FFF - 0 = FFFFFFFFFFFF8000 (cc=3) -+slbg 8000000000000000 - 0000000000007FFF - 0 = 7FFFFFFFFFFF8001 (cc=3) -+slbg 7FFFFFFFFFFFFFFF - 0000000000007FFF - 0 = 7FFFFFFFFFFF8000 (cc=3) -+slbr 0000000000000000 - 0000000000007FFF - 0 = 00000000FFFF8001 (cc=1) -+slbr 0000000000000001 - 0000000000007FFF - 0 = 00000000FFFF8002 (cc=1) -+slbr 000000000000FFFF - 0000000000007FFF - 0 = 0000000000008000 (cc=3) -+slbr 0000000000007FFF - 0000000000007FFF - 0 = 0000000000000000 (cc=2) -+slbr 0000000000008000 - 0000000000007FFF - 0 = 0000000000000001 (cc=3) -+slbr 00000000FFFFFFFF - 0000000000007FFF - 0 = 00000000FFFF8000 (cc=3) -+slbr 0000000080000000 - 0000000000007FFF - 0 = 000000007FFF8001 (cc=3) -+slbr 000000007FFFFFFF - 0000000000007FFF - 0 = 000000007FFF8000 (cc=3) -+slbr FFFFFFFFFFFFFFFF - 0000000000007FFF - 0 = FFFFFFFFFFFF8000 (cc=3) -+slbr 8000000000000000 - 0000000000007FFF - 0 = 80000000FFFF8001 (cc=1) -+slbr 7FFFFFFFFFFFFFFF - 0000000000007FFF - 0 = 7FFFFFFFFFFF8000 (cc=3) -+slbgr 0000000000000000 - 0000000000007FFF - 0 = FFFFFFFFFFFF8001 (cc=1) -+slbgr 0000000000000001 - 0000000000007FFF - 0 = FFFFFFFFFFFF8002 (cc=1) -+slbgr 000000000000FFFF - 0000000000007FFF - 0 = 0000000000008000 (cc=3) -+slbgr 0000000000007FFF - 0000000000007FFF - 0 = 0000000000000000 (cc=2) -+slbgr 0000000000008000 - 0000000000007FFF - 0 = 0000000000000001 (cc=3) -+slbgr 00000000FFFFFFFF - 0000000000007FFF - 0 = 00000000FFFF8000 (cc=3) -+slbgr 0000000080000000 - 0000000000007FFF - 0 = 000000007FFF8001 (cc=3) -+slbgr 000000007FFFFFFF - 0000000000007FFF - 0 = 000000007FFF8000 (cc=3) -+slbgr FFFFFFFFFFFFFFFF - 0000000000007FFF - 0 = FFFFFFFFFFFF8000 (cc=3) -+slbgr 8000000000000000 - 0000000000007FFF - 0 = 7FFFFFFFFFFF8001 (cc=3) -+slbgr 7FFFFFFFFFFFFFFF - 0000000000007FFF - 0 = 7FFFFFFFFFFF8000 (cc=3) -+shy 0000000000000000 - 0000000000007FFF - 1 = 0000000000000000 (cc=0) -+shy 0000000000000001 - 0000000000007FFF - 1 = 0000000000000001 (cc=2) -+shy 000000000000FFFF - 0000000000007FFF - 1 = 000000000000FFFF (cc=2) -+shy 0000000000007FFF - 0000000000007FFF - 1 = 0000000000007FFF (cc=2) -+shy 0000000000008000 - 0000000000007FFF - 1 = 0000000000008000 (cc=2) -+shy 00000000FFFFFFFF - 0000000000007FFF - 1 = 00000000FFFFFFFF (cc=1) -+shy 0000000080000000 - 0000000000007FFF - 1 = 0000000080000000 (cc=1) -+shy 000000007FFFFFFF - 0000000000007FFF - 1 = 000000007FFFFFFF (cc=2) -+shy FFFFFFFFFFFFFFFF - 0000000000007FFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+shy 8000000000000000 - 0000000000007FFF - 1 = 8000000000000000 (cc=0) -+shy 7FFFFFFFFFFFFFFF - 0000000000007FFF - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sly 0000000000000000 - 0000000000007FFF - 1 = 0000000000000000 (cc=2) -+sly 0000000000000001 - 0000000000007FFF - 1 = 0000000000000001 (cc=3) -+sly 000000000000FFFF - 0000000000007FFF - 1 = 000000000000FFFF (cc=3) -+sly 0000000000007FFF - 0000000000007FFF - 1 = 0000000000007FFF (cc=3) -+sly 0000000000008000 - 0000000000007FFF - 1 = 0000000000008000 (cc=3) -+sly 00000000FFFFFFFF - 0000000000007FFF - 1 = 00000000FFFFFFFF (cc=3) -+sly 0000000080000000 - 0000000000007FFF - 1 = 0000000080000000 (cc=3) -+sly 000000007FFFFFFF - 0000000000007FFF - 1 = 000000007FFFFFFF (cc=3) -+sly FFFFFFFFFFFFFFFF - 0000000000007FFF - 1 = FFFFFFFFFFFFFFFF (cc=3) -+sly 8000000000000000 - 0000000000007FFF - 1 = 8000000000000000 (cc=2) -+sly 7FFFFFFFFFFFFFFF - 0000000000007FFF - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+sy 0000000000000000 - 0000000000007FFF - 1 = 0000000000000000 (cc=0) -+sy 0000000000000001 - 0000000000007FFF - 1 = 0000000000000001 (cc=2) -+sy 000000000000FFFF - 0000000000007FFF - 1 = 000000000000FFFF (cc=2) -+sy 0000000000007FFF - 0000000000007FFF - 1 = 0000000000007FFF (cc=2) -+sy 0000000000008000 - 0000000000007FFF - 1 = 0000000000008000 (cc=2) -+sy 00000000FFFFFFFF - 0000000000007FFF - 1 = 00000000FFFFFFFF (cc=1) -+sy 0000000080000000 - 0000000000007FFF - 1 = 0000000080000000 (cc=1) -+sy 000000007FFFFFFF - 0000000000007FFF - 1 = 000000007FFFFFFF (cc=2) -+sy FFFFFFFFFFFFFFFF - 0000000000007FFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sy 8000000000000000 - 0000000000007FFF - 1 = 8000000000000000 (cc=0) -+sy 7FFFFFFFFFFFFFFF - 0000000000007FFF - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+s 0000000000000000 - 0000000000008000 - 1 = 0000000000000000 (cc=0) -+s 0000000000000001 - 0000000000008000 - 1 = 0000000000000001 (cc=2) -+s 000000000000FFFF - 0000000000008000 - 1 = 000000000000FFFF (cc=2) -+s 0000000000007FFF - 0000000000008000 - 1 = 0000000000007FFF (cc=2) -+s 0000000000008000 - 0000000000008000 - 1 = 0000000000008000 (cc=2) -+s 00000000FFFFFFFF - 0000000000008000 - 1 = 00000000FFFFFFFF (cc=1) -+s 0000000080000000 - 0000000000008000 - 1 = 0000000080000000 (cc=1) -+s 000000007FFFFFFF - 0000000000008000 - 1 = 000000007FFFFFFF (cc=2) -+s FFFFFFFFFFFFFFFF - 0000000000008000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+s 8000000000000000 - 0000000000008000 - 1 = 8000000000000000 (cc=0) -+s 7FFFFFFFFFFFFFFF - 0000000000008000 - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sh 0000000000000000 - 0000000000008000 - 1 = 0000000000000000 (cc=0) -+sh 0000000000000001 - 0000000000008000 - 1 = 0000000000000001 (cc=2) -+sh 000000000000FFFF - 0000000000008000 - 1 = 000000000000FFFF (cc=2) -+sh 0000000000007FFF - 0000000000008000 - 1 = 0000000000007FFF (cc=2) -+sh 0000000000008000 - 0000000000008000 - 1 = 0000000000008000 (cc=2) -+sh 00000000FFFFFFFF - 0000000000008000 - 1 = 00000000FFFFFFFF (cc=1) -+sh 0000000080000000 - 0000000000008000 - 1 = 0000000080000000 (cc=1) -+sh 000000007FFFFFFF - 0000000000008000 - 1 = 000000007FFFFFFF (cc=2) -+sh FFFFFFFFFFFFFFFF - 0000000000008000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sh 8000000000000000 - 0000000000008000 - 1 = 8000000000000000 (cc=0) -+sh 7FFFFFFFFFFFFFFF - 0000000000008000 - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sg 0000000000000000 - 0000000000008000 - 1 = FFFFFFFFFFFF8000 (cc=1) -+sg 0000000000000001 - 0000000000008000 - 1 = FFFFFFFFFFFF8001 (cc=1) -+sg 000000000000FFFF - 0000000000008000 - 1 = 0000000000007FFF (cc=2) -+sg 0000000000007FFF - 0000000000008000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sg 0000000000008000 - 0000000000008000 - 1 = 0000000000000000 (cc=0) -+sg 00000000FFFFFFFF - 0000000000008000 - 1 = 00000000FFFF7FFF (cc=2) -+sg 0000000080000000 - 0000000000008000 - 1 = 000000007FFF8000 (cc=2) -+sg 000000007FFFFFFF - 0000000000008000 - 1 = 000000007FFF7FFF (cc=2) -+sg FFFFFFFFFFFFFFFF - 0000000000008000 - 1 = FFFFFFFFFFFF7FFF (cc=1) -+sg 8000000000000000 - 0000000000008000 - 1 = 7FFFFFFFFFFF8000 (cc=3) -+sg 7FFFFFFFFFFFFFFF - 0000000000008000 - 1 = 7FFFFFFFFFFF7FFF (cc=2) -+sgf 0000000000000000 - 0000000000008000 - 1 = 0000000000000000 (cc=0) -+sgf 0000000000000001 - 0000000000008000 - 1 = 0000000000000001 (cc=2) -+sgf 000000000000FFFF - 0000000000008000 - 1 = 000000000000FFFF (cc=2) -+sgf 0000000000007FFF - 0000000000008000 - 1 = 0000000000007FFF (cc=2) -+sgf 0000000000008000 - 0000000000008000 - 1 = 0000000000008000 (cc=2) -+sgf 00000000FFFFFFFF - 0000000000008000 - 1 = 00000000FFFFFFFF (cc=2) -+sgf 0000000080000000 - 0000000000008000 - 1 = 0000000080000000 (cc=2) -+sgf 000000007FFFFFFF - 0000000000008000 - 1 = 000000007FFFFFFF (cc=2) -+sgf FFFFFFFFFFFFFFFF - 0000000000008000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sgf 8000000000000000 - 0000000000008000 - 1 = 8000000000000000 (cc=1) -+sgf 7FFFFFFFFFFFFFFF - 0000000000008000 - 1 = 7FFFFFFFFFFFFFFF (cc=2) -+sl 0000000000000000 - 0000000000008000 - 1 = 0000000000000000 (cc=2) -+sl 0000000000000001 - 0000000000008000 - 1 = 0000000000000001 (cc=3) -+sl 000000000000FFFF - 0000000000008000 - 1 = 000000000000FFFF (cc=3) -+sl 0000000000007FFF - 0000000000008000 - 1 = 0000000000007FFF (cc=3) -+sl 0000000000008000 - 0000000000008000 - 1 = 0000000000008000 (cc=3) -+sl 00000000FFFFFFFF - 0000000000008000 - 1 = 00000000FFFFFFFF (cc=3) -+sl 0000000080000000 - 0000000000008000 - 1 = 0000000080000000 (cc=3) -+sl 000000007FFFFFFF - 0000000000008000 - 1 = 000000007FFFFFFF (cc=3) -+sl FFFFFFFFFFFFFFFF - 0000000000008000 - 1 = FFFFFFFFFFFFFFFF (cc=3) -+sl 8000000000000000 - 0000000000008000 - 1 = 8000000000000000 (cc=2) -+sl 7FFFFFFFFFFFFFFF - 0000000000008000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slg 0000000000000000 - 0000000000008000 - 1 = FFFFFFFFFFFF8000 (cc=1) -+slg 0000000000000001 - 0000000000008000 - 1 = FFFFFFFFFFFF8001 (cc=1) -+slg 000000000000FFFF - 0000000000008000 - 1 = 0000000000007FFF (cc=3) -+slg 0000000000007FFF - 0000000000008000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slg 0000000000008000 - 0000000000008000 - 1 = 0000000000000000 (cc=2) -+slg 00000000FFFFFFFF - 0000000000008000 - 1 = 00000000FFFF7FFF (cc=3) -+slg 0000000080000000 - 0000000000008000 - 1 = 000000007FFF8000 (cc=3) -+slg 000000007FFFFFFF - 0000000000008000 - 1 = 000000007FFF7FFF (cc=3) -+slg FFFFFFFFFFFFFFFF - 0000000000008000 - 1 = FFFFFFFFFFFF7FFF (cc=3) -+slg 8000000000000000 - 0000000000008000 - 1 = 7FFFFFFFFFFF8000 (cc=3) -+slg 7FFFFFFFFFFFFFFF - 0000000000008000 - 1 = 7FFFFFFFFFFF7FFF (cc=3) -+sgf 0000000000000000 - 0000000000008000 - 1 = 0000000000000000 (cc=0) -+sgf 0000000000000001 - 0000000000008000 - 1 = 0000000000000001 (cc=2) -+sgf 000000000000FFFF - 0000000000008000 - 1 = 000000000000FFFF (cc=2) -+sgf 0000000000007FFF - 0000000000008000 - 1 = 0000000000007FFF (cc=2) -+sgf 0000000000008000 - 0000000000008000 - 1 = 0000000000008000 (cc=2) -+sgf 00000000FFFFFFFF - 0000000000008000 - 1 = 00000000FFFFFFFF (cc=2) -+sgf 0000000080000000 - 0000000000008000 - 1 = 0000000080000000 (cc=2) -+sgf 000000007FFFFFFF - 0000000000008000 - 1 = 000000007FFFFFFF (cc=2) -+sgf FFFFFFFFFFFFFFFF - 0000000000008000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sgf 8000000000000000 - 0000000000008000 - 1 = 8000000000000000 (cc=1) -+sgf 7FFFFFFFFFFFFFFF - 0000000000008000 - 1 = 7FFFFFFFFFFFFFFF (cc=2) -+slgf 0000000000000000 - 0000000000008000 - 1 = 0000000000000000 (cc=2) -+slgf 0000000000000001 - 0000000000008000 - 1 = 0000000000000001 (cc=3) -+slgf 000000000000FFFF - 0000000000008000 - 1 = 000000000000FFFF (cc=3) -+slgf 0000000000007FFF - 0000000000008000 - 1 = 0000000000007FFF (cc=3) -+slgf 0000000000008000 - 0000000000008000 - 1 = 0000000000008000 (cc=3) -+slgf 00000000FFFFFFFF - 0000000000008000 - 1 = 00000000FFFFFFFF (cc=3) -+slgf 0000000080000000 - 0000000000008000 - 1 = 0000000080000000 (cc=3) -+slgf 000000007FFFFFFF - 0000000000008000 - 1 = 000000007FFFFFFF (cc=3) -+slgf FFFFFFFFFFFFFFFF - 0000000000008000 - 1 = FFFFFFFFFFFFFFFF (cc=3) -+slgf 8000000000000000 - 0000000000008000 - 1 = 8000000000000000 (cc=3) -+slgf 7FFFFFFFFFFFFFFF - 0000000000008000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+sr 0000000000000000 - 0000000000008000 - 1 = 00000000FFFF8000 (cc=1) -+sr 0000000000000001 - 0000000000008000 - 1 = 00000000FFFF8001 (cc=1) -+sr 000000000000FFFF - 0000000000008000 - 1 = 0000000000007FFF (cc=2) -+sr 0000000000007FFF - 0000000000008000 - 1 = 00000000FFFFFFFF (cc=1) -+sr 0000000000008000 - 0000000000008000 - 1 = 0000000000000000 (cc=0) -+sr 00000000FFFFFFFF - 0000000000008000 - 1 = 00000000FFFF7FFF (cc=1) -+sr 0000000080000000 - 0000000000008000 - 1 = 000000007FFF8000 (cc=3) -+sr 000000007FFFFFFF - 0000000000008000 - 1 = 000000007FFF7FFF (cc=2) -+sr FFFFFFFFFFFFFFFF - 0000000000008000 - 1 = FFFFFFFFFFFF7FFF (cc=1) -+sr 8000000000000000 - 0000000000008000 - 1 = 80000000FFFF8000 (cc=1) -+sr 7FFFFFFFFFFFFFFF - 0000000000008000 - 1 = 7FFFFFFFFFFF7FFF (cc=1) -+sgr 0000000000000000 - 0000000000008000 - 1 = FFFFFFFFFFFF8000 (cc=1) -+sgr 0000000000000001 - 0000000000008000 - 1 = FFFFFFFFFFFF8001 (cc=1) -+sgr 000000000000FFFF - 0000000000008000 - 1 = 0000000000007FFF (cc=2) -+sgr 0000000000007FFF - 0000000000008000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sgr 0000000000008000 - 0000000000008000 - 1 = 0000000000000000 (cc=0) -+sgr 00000000FFFFFFFF - 0000000000008000 - 1 = 00000000FFFF7FFF (cc=2) -+sgr 0000000080000000 - 0000000000008000 - 1 = 000000007FFF8000 (cc=2) -+sgr 000000007FFFFFFF - 0000000000008000 - 1 = 000000007FFF7FFF (cc=2) -+sgr FFFFFFFFFFFFFFFF - 0000000000008000 - 1 = FFFFFFFFFFFF7FFF (cc=1) -+sgr 8000000000000000 - 0000000000008000 - 1 = 7FFFFFFFFFFF8000 (cc=3) -+sgr 7FFFFFFFFFFFFFFF - 0000000000008000 - 1 = 7FFFFFFFFFFF7FFF (cc=2) -+sgfr 0000000000000000 - 0000000000008000 - 1 = FFFFFFFFFFFF8000 (cc=1) -+sgfr 0000000000000001 - 0000000000008000 - 1 = FFFFFFFFFFFF8001 (cc=1) -+sgfr 000000000000FFFF - 0000000000008000 - 1 = 0000000000007FFF (cc=2) -+sgfr 0000000000007FFF - 0000000000008000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sgfr 0000000000008000 - 0000000000008000 - 1 = 0000000000000000 (cc=0) -+sgfr 00000000FFFFFFFF - 0000000000008000 - 1 = 00000000FFFF7FFF (cc=2) -+sgfr 0000000080000000 - 0000000000008000 - 1 = 000000007FFF8000 (cc=2) -+sgfr 000000007FFFFFFF - 0000000000008000 - 1 = 000000007FFF7FFF (cc=2) -+sgfr FFFFFFFFFFFFFFFF - 0000000000008000 - 1 = FFFFFFFFFFFF7FFF (cc=1) -+sgfr 8000000000000000 - 0000000000008000 - 1 = 7FFFFFFFFFFF8000 (cc=3) -+sgfr 7FFFFFFFFFFFFFFF - 0000000000008000 - 1 = 7FFFFFFFFFFF7FFF (cc=2) -+slr 0000000000000000 - 0000000000008000 - 1 = 00000000FFFF8000 (cc=1) -+slr 0000000000000001 - 0000000000008000 - 1 = 00000000FFFF8001 (cc=1) -+slr 000000000000FFFF - 0000000000008000 - 1 = 0000000000007FFF (cc=3) -+slr 0000000000007FFF - 0000000000008000 - 1 = 00000000FFFFFFFF (cc=1) -+slr 0000000000008000 - 0000000000008000 - 1 = 0000000000000000 (cc=2) -+slr 00000000FFFFFFFF - 0000000000008000 - 1 = 00000000FFFF7FFF (cc=3) -+slr 0000000080000000 - 0000000000008000 - 1 = 000000007FFF8000 (cc=3) -+slr 000000007FFFFFFF - 0000000000008000 - 1 = 000000007FFF7FFF (cc=3) -+slr FFFFFFFFFFFFFFFF - 0000000000008000 - 1 = FFFFFFFFFFFF7FFF (cc=3) -+slr 8000000000000000 - 0000000000008000 - 1 = 80000000FFFF8000 (cc=1) -+slr 7FFFFFFFFFFFFFFF - 0000000000008000 - 1 = 7FFFFFFFFFFF7FFF (cc=3) -+slgr 0000000000000000 - 0000000000008000 - 1 = FFFFFFFFFFFF8000 (cc=1) -+slgr 0000000000000001 - 0000000000008000 - 1 = FFFFFFFFFFFF8001 (cc=1) -+slgr 000000000000FFFF - 0000000000008000 - 1 = 0000000000007FFF (cc=3) -+slgr 0000000000007FFF - 0000000000008000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slgr 0000000000008000 - 0000000000008000 - 1 = 0000000000000000 (cc=2) -+slgr 00000000FFFFFFFF - 0000000000008000 - 1 = 00000000FFFF7FFF (cc=3) -+slgr 0000000080000000 - 0000000000008000 - 1 = 000000007FFF8000 (cc=3) -+slgr 000000007FFFFFFF - 0000000000008000 - 1 = 000000007FFF7FFF (cc=3) -+slgr FFFFFFFFFFFFFFFF - 0000000000008000 - 1 = FFFFFFFFFFFF7FFF (cc=3) -+slgr 8000000000000000 - 0000000000008000 - 1 = 7FFFFFFFFFFF8000 (cc=3) -+slgr 7FFFFFFFFFFFFFFF - 0000000000008000 - 1 = 7FFFFFFFFFFF7FFF (cc=3) -+slgfr 0000000000000000 - 0000000000008000 - 1 = FFFFFFFFFFFF8000 (cc=1) -+slgfr 0000000000000001 - 0000000000008000 - 1 = FFFFFFFFFFFF8001 (cc=1) -+slgfr 000000000000FFFF - 0000000000008000 - 1 = 0000000000007FFF (cc=3) -+slgfr 0000000000007FFF - 0000000000008000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slgfr 0000000000008000 - 0000000000008000 - 1 = 0000000000000000 (cc=2) -+slgfr 00000000FFFFFFFF - 0000000000008000 - 1 = 00000000FFFF7FFF (cc=3) -+slgfr 0000000080000000 - 0000000000008000 - 1 = 000000007FFF8000 (cc=3) -+slgfr 000000007FFFFFFF - 0000000000008000 - 1 = 000000007FFF7FFF (cc=3) -+slgfr FFFFFFFFFFFFFFFF - 0000000000008000 - 1 = FFFFFFFFFFFF7FFF (cc=3) -+slgfr 8000000000000000 - 0000000000008000 - 1 = 7FFFFFFFFFFF8000 (cc=3) -+slgfr 7FFFFFFFFFFFFFFF - 0000000000008000 - 1 = 7FFFFFFFFFFF7FFF (cc=3) -+slb 0000000000000000 - 0000000000008000 - 1 = 00000000FFFFFFFF (cc=1) -+slb 0000000000000001 - 0000000000008000 - 1 = 0000000000000000 (cc=2) -+slb 000000000000FFFF - 0000000000008000 - 1 = 000000000000FFFE (cc=3) -+slb 0000000000007FFF - 0000000000008000 - 1 = 0000000000007FFE (cc=3) -+slb 0000000000008000 - 0000000000008000 - 1 = 0000000000007FFF (cc=3) -+slb 00000000FFFFFFFF - 0000000000008000 - 1 = 00000000FFFFFFFE (cc=3) -+slb 0000000080000000 - 0000000000008000 - 1 = 000000007FFFFFFF (cc=3) -+slb 000000007FFFFFFF - 0000000000008000 - 1 = 000000007FFFFFFE (cc=3) -+slb FFFFFFFFFFFFFFFF - 0000000000008000 - 1 = FFFFFFFFFFFFFFFE (cc=3) -+slb 8000000000000000 - 0000000000008000 - 1 = 80000000FFFFFFFF (cc=1) -+slb 7FFFFFFFFFFFFFFF - 0000000000008000 - 1 = 7FFFFFFFFFFFFFFE (cc=3) -+slbg 0000000000000000 - 0000000000008000 - 1 = FFFFFFFFFFFF7FFF (cc=1) -+slbg 0000000000000001 - 0000000000008000 - 1 = FFFFFFFFFFFF8000 (cc=1) -+slbg 000000000000FFFF - 0000000000008000 - 1 = 0000000000007FFE (cc=3) -+slbg 0000000000007FFF - 0000000000008000 - 1 = FFFFFFFFFFFFFFFE (cc=1) -+slbg 0000000000008000 - 0000000000008000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slbg 00000000FFFFFFFF - 0000000000008000 - 1 = 00000000FFFF7FFE (cc=3) -+slbg 0000000080000000 - 0000000000008000 - 1 = 000000007FFF7FFF (cc=3) -+slbg 000000007FFFFFFF - 0000000000008000 - 1 = 000000007FFF7FFE (cc=3) -+slbg FFFFFFFFFFFFFFFF - 0000000000008000 - 1 = FFFFFFFFFFFF7FFE (cc=3) -+slbg 8000000000000000 - 0000000000008000 - 1 = 7FFFFFFFFFFF7FFF (cc=3) -+slbg 7FFFFFFFFFFFFFFF - 0000000000008000 - 1 = 7FFFFFFFFFFF7FFE (cc=3) -+slbr 0000000000000000 - 0000000000008000 - 1 = 00000000FFFF7FFF (cc=1) -+slbr 0000000000000001 - 0000000000008000 - 1 = 00000000FFFF8000 (cc=1) -+slbr 000000000000FFFF - 0000000000008000 - 1 = 0000000000007FFE (cc=3) -+slbr 0000000000007FFF - 0000000000008000 - 1 = 00000000FFFFFFFE (cc=1) -+slbr 0000000000008000 - 0000000000008000 - 1 = 00000000FFFFFFFF (cc=1) -+slbr 00000000FFFFFFFF - 0000000000008000 - 1 = 00000000FFFF7FFE (cc=3) -+slbr 0000000080000000 - 0000000000008000 - 1 = 000000007FFF7FFF (cc=3) -+slbr 000000007FFFFFFF - 0000000000008000 - 1 = 000000007FFF7FFE (cc=3) -+slbr FFFFFFFFFFFFFFFF - 0000000000008000 - 1 = FFFFFFFFFFFF7FFE (cc=3) -+slbr 8000000000000000 - 0000000000008000 - 1 = 80000000FFFF7FFF (cc=1) -+slbr 7FFFFFFFFFFFFFFF - 0000000000008000 - 1 = 7FFFFFFFFFFF7FFE (cc=3) -+slbgr 0000000000000000 - 0000000000008000 - 1 = FFFFFFFFFFFF7FFF (cc=1) -+slbgr 0000000000000001 - 0000000000008000 - 1 = FFFFFFFFFFFF8000 (cc=1) -+slbgr 000000000000FFFF - 0000000000008000 - 1 = 0000000000007FFE (cc=3) -+slbgr 0000000000007FFF - 0000000000008000 - 1 = FFFFFFFFFFFFFFFE (cc=1) -+slbgr 0000000000008000 - 0000000000008000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slbgr 00000000FFFFFFFF - 0000000000008000 - 1 = 00000000FFFF7FFE (cc=3) -+slbgr 0000000080000000 - 0000000000008000 - 1 = 000000007FFF7FFF (cc=3) -+slbgr 000000007FFFFFFF - 0000000000008000 - 1 = 000000007FFF7FFE (cc=3) -+slbgr FFFFFFFFFFFFFFFF - 0000000000008000 - 1 = FFFFFFFFFFFF7FFE (cc=3) -+slbgr 8000000000000000 - 0000000000008000 - 1 = 7FFFFFFFFFFF7FFF (cc=3) -+slbgr 7FFFFFFFFFFFFFFF - 0000000000008000 - 1 = 7FFFFFFFFFFF7FFE (cc=3) -+slb 0000000000000000 - 0000000000008000 - 0 = 0000000000000000 (cc=2) -+slb 0000000000000001 - 0000000000008000 - 0 = 0000000000000001 (cc=3) -+slb 000000000000FFFF - 0000000000008000 - 0 = 000000000000FFFF (cc=3) -+slb 0000000000007FFF - 0000000000008000 - 0 = 0000000000007FFF (cc=3) -+slb 0000000000008000 - 0000000000008000 - 0 = 0000000000008000 (cc=3) -+slb 00000000FFFFFFFF - 0000000000008000 - 0 = 00000000FFFFFFFF (cc=3) -+slb 0000000080000000 - 0000000000008000 - 0 = 0000000080000000 (cc=3) -+slb 000000007FFFFFFF - 0000000000008000 - 0 = 000000007FFFFFFF (cc=3) -+slb FFFFFFFFFFFFFFFF - 0000000000008000 - 0 = FFFFFFFFFFFFFFFF (cc=3) -+slb 8000000000000000 - 0000000000008000 - 0 = 8000000000000000 (cc=2) -+slb 7FFFFFFFFFFFFFFF - 0000000000008000 - 0 = 7FFFFFFFFFFFFFFF (cc=3) -+slbg 0000000000000000 - 0000000000008000 - 0 = FFFFFFFFFFFF8000 (cc=1) -+slbg 0000000000000001 - 0000000000008000 - 0 = FFFFFFFFFFFF8001 (cc=1) -+slbg 000000000000FFFF - 0000000000008000 - 0 = 0000000000007FFF (cc=3) -+slbg 0000000000007FFF - 0000000000008000 - 0 = FFFFFFFFFFFFFFFF (cc=1) -+slbg 0000000000008000 - 0000000000008000 - 0 = 0000000000000000 (cc=2) -+slbg 00000000FFFFFFFF - 0000000000008000 - 0 = 00000000FFFF7FFF (cc=3) -+slbg 0000000080000000 - 0000000000008000 - 0 = 000000007FFF8000 (cc=3) -+slbg 000000007FFFFFFF - 0000000000008000 - 0 = 000000007FFF7FFF (cc=3) -+slbg FFFFFFFFFFFFFFFF - 0000000000008000 - 0 = FFFFFFFFFFFF7FFF (cc=3) -+slbg 8000000000000000 - 0000000000008000 - 0 = 7FFFFFFFFFFF8000 (cc=3) -+slbg 7FFFFFFFFFFFFFFF - 0000000000008000 - 0 = 7FFFFFFFFFFF7FFF (cc=3) -+slbr 0000000000000000 - 0000000000008000 - 0 = 00000000FFFF8000 (cc=1) -+slbr 0000000000000001 - 0000000000008000 - 0 = 00000000FFFF8001 (cc=1) -+slbr 000000000000FFFF - 0000000000008000 - 0 = 0000000000007FFF (cc=3) -+slbr 0000000000007FFF - 0000000000008000 - 0 = 00000000FFFFFFFF (cc=1) -+slbr 0000000000008000 - 0000000000008000 - 0 = 0000000000000000 (cc=2) -+slbr 00000000FFFFFFFF - 0000000000008000 - 0 = 00000000FFFF7FFF (cc=3) -+slbr 0000000080000000 - 0000000000008000 - 0 = 000000007FFF8000 (cc=3) -+slbr 000000007FFFFFFF - 0000000000008000 - 0 = 000000007FFF7FFF (cc=3) -+slbr FFFFFFFFFFFFFFFF - 0000000000008000 - 0 = FFFFFFFFFFFF7FFF (cc=3) -+slbr 8000000000000000 - 0000000000008000 - 0 = 80000000FFFF8000 (cc=1) -+slbr 7FFFFFFFFFFFFFFF - 0000000000008000 - 0 = 7FFFFFFFFFFF7FFF (cc=3) -+slbgr 0000000000000000 - 0000000000008000 - 0 = FFFFFFFFFFFF8000 (cc=1) -+slbgr 0000000000000001 - 0000000000008000 - 0 = FFFFFFFFFFFF8001 (cc=1) -+slbgr 000000000000FFFF - 0000000000008000 - 0 = 0000000000007FFF (cc=3) -+slbgr 0000000000007FFF - 0000000000008000 - 0 = FFFFFFFFFFFFFFFF (cc=1) -+slbgr 0000000000008000 - 0000000000008000 - 0 = 0000000000000000 (cc=2) -+slbgr 00000000FFFFFFFF - 0000000000008000 - 0 = 00000000FFFF7FFF (cc=3) -+slbgr 0000000080000000 - 0000000000008000 - 0 = 000000007FFF8000 (cc=3) -+slbgr 000000007FFFFFFF - 0000000000008000 - 0 = 000000007FFF7FFF (cc=3) -+slbgr FFFFFFFFFFFFFFFF - 0000000000008000 - 0 = FFFFFFFFFFFF7FFF (cc=3) -+slbgr 8000000000000000 - 0000000000008000 - 0 = 7FFFFFFFFFFF8000 (cc=3) -+slbgr 7FFFFFFFFFFFFFFF - 0000000000008000 - 0 = 7FFFFFFFFFFF7FFF (cc=3) -+shy 0000000000000000 - 0000000000008000 - 1 = 0000000000000000 (cc=0) -+shy 0000000000000001 - 0000000000008000 - 1 = 0000000000000001 (cc=2) -+shy 000000000000FFFF - 0000000000008000 - 1 = 000000000000FFFF (cc=2) -+shy 0000000000007FFF - 0000000000008000 - 1 = 0000000000007FFF (cc=2) -+shy 0000000000008000 - 0000000000008000 - 1 = 0000000000008000 (cc=2) -+shy 00000000FFFFFFFF - 0000000000008000 - 1 = 00000000FFFFFFFF (cc=1) -+shy 0000000080000000 - 0000000000008000 - 1 = 0000000080000000 (cc=1) -+shy 000000007FFFFFFF - 0000000000008000 - 1 = 000000007FFFFFFF (cc=2) -+shy FFFFFFFFFFFFFFFF - 0000000000008000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+shy 8000000000000000 - 0000000000008000 - 1 = 8000000000000000 (cc=0) -+shy 7FFFFFFFFFFFFFFF - 0000000000008000 - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sly 0000000000000000 - 0000000000008000 - 1 = 0000000000000000 (cc=2) -+sly 0000000000000001 - 0000000000008000 - 1 = 0000000000000001 (cc=3) -+sly 000000000000FFFF - 0000000000008000 - 1 = 000000000000FFFF (cc=3) -+sly 0000000000007FFF - 0000000000008000 - 1 = 0000000000007FFF (cc=3) -+sly 0000000000008000 - 0000000000008000 - 1 = 0000000000008000 (cc=3) -+sly 00000000FFFFFFFF - 0000000000008000 - 1 = 00000000FFFFFFFF (cc=3) -+sly 0000000080000000 - 0000000000008000 - 1 = 0000000080000000 (cc=3) -+sly 000000007FFFFFFF - 0000000000008000 - 1 = 000000007FFFFFFF (cc=3) -+sly FFFFFFFFFFFFFFFF - 0000000000008000 - 1 = FFFFFFFFFFFFFFFF (cc=3) -+sly 8000000000000000 - 0000000000008000 - 1 = 8000000000000000 (cc=2) -+sly 7FFFFFFFFFFFFFFF - 0000000000008000 - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+sy 0000000000000000 - 0000000000008000 - 1 = 0000000000000000 (cc=0) -+sy 0000000000000001 - 0000000000008000 - 1 = 0000000000000001 (cc=2) -+sy 000000000000FFFF - 0000000000008000 - 1 = 000000000000FFFF (cc=2) -+sy 0000000000007FFF - 0000000000008000 - 1 = 0000000000007FFF (cc=2) -+sy 0000000000008000 - 0000000000008000 - 1 = 0000000000008000 (cc=2) -+sy 00000000FFFFFFFF - 0000000000008000 - 1 = 00000000FFFFFFFF (cc=1) -+sy 0000000080000000 - 0000000000008000 - 1 = 0000000080000000 (cc=1) -+sy 000000007FFFFFFF - 0000000000008000 - 1 = 000000007FFFFFFF (cc=2) -+sy FFFFFFFFFFFFFFFF - 0000000000008000 - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sy 8000000000000000 - 0000000000008000 - 1 = 8000000000000000 (cc=0) -+sy 7FFFFFFFFFFFFFFF - 0000000000008000 - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+s 0000000000000000 - 000000000000FFFF - 1 = 0000000000000000 (cc=0) -+s 0000000000000001 - 000000000000FFFF - 1 = 0000000000000001 (cc=2) -+s 000000000000FFFF - 000000000000FFFF - 1 = 000000000000FFFF (cc=2) -+s 0000000000007FFF - 000000000000FFFF - 1 = 0000000000007FFF (cc=2) -+s 0000000000008000 - 000000000000FFFF - 1 = 0000000000008000 (cc=2) -+s 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFFFFFF (cc=1) -+s 0000000080000000 - 000000000000FFFF - 1 = 0000000080000000 (cc=1) -+s 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFFFFFF (cc=2) -+s FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+s 8000000000000000 - 000000000000FFFF - 1 = 8000000000000000 (cc=0) -+s 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sh 0000000000000000 - 000000000000FFFF - 1 = 0000000000000000 (cc=0) -+sh 0000000000000001 - 000000000000FFFF - 1 = 0000000000000001 (cc=2) -+sh 000000000000FFFF - 000000000000FFFF - 1 = 000000000000FFFF (cc=2) -+sh 0000000000007FFF - 000000000000FFFF - 1 = 0000000000007FFF (cc=2) -+sh 0000000000008000 - 000000000000FFFF - 1 = 0000000000008000 (cc=2) -+sh 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFFFFFF (cc=1) -+sh 0000000080000000 - 000000000000FFFF - 1 = 0000000080000000 (cc=1) -+sh 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFFFFFF (cc=2) -+sh FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sh 8000000000000000 - 000000000000FFFF - 1 = 8000000000000000 (cc=0) -+sh 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sg 0000000000000000 - 000000000000FFFF - 1 = FFFFFFFFFFFF0001 (cc=1) -+sg 0000000000000001 - 000000000000FFFF - 1 = FFFFFFFFFFFF0002 (cc=1) -+sg 000000000000FFFF - 000000000000FFFF - 1 = 0000000000000000 (cc=0) -+sg 0000000000007FFF - 000000000000FFFF - 1 = FFFFFFFFFFFF8000 (cc=1) -+sg 0000000000008000 - 000000000000FFFF - 1 = FFFFFFFFFFFF8001 (cc=1) -+sg 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFF0000 (cc=2) -+sg 0000000080000000 - 000000000000FFFF - 1 = 000000007FFF0001 (cc=2) -+sg 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFF0000 (cc=2) -+sg FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFF0000 (cc=1) -+sg 8000000000000000 - 000000000000FFFF - 1 = 7FFFFFFFFFFF0001 (cc=3) -+sg 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFF0000 (cc=2) -+sgf 0000000000000000 - 000000000000FFFF - 1 = 0000000000000000 (cc=0) -+sgf 0000000000000001 - 000000000000FFFF - 1 = 0000000000000001 (cc=2) -+sgf 000000000000FFFF - 000000000000FFFF - 1 = 000000000000FFFF (cc=2) -+sgf 0000000000007FFF - 000000000000FFFF - 1 = 0000000000007FFF (cc=2) -+sgf 0000000000008000 - 000000000000FFFF - 1 = 0000000000008000 (cc=2) -+sgf 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFFFFFF (cc=2) -+sgf 0000000080000000 - 000000000000FFFF - 1 = 0000000080000000 (cc=2) -+sgf 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFFFFFF (cc=2) -+sgf FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sgf 8000000000000000 - 000000000000FFFF - 1 = 8000000000000000 (cc=1) -+sgf 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFFFFFF (cc=2) -+sl 0000000000000000 - 000000000000FFFF - 1 = 0000000000000000 (cc=2) -+sl 0000000000000001 - 000000000000FFFF - 1 = 0000000000000001 (cc=3) -+sl 000000000000FFFF - 000000000000FFFF - 1 = 000000000000FFFF (cc=3) -+sl 0000000000007FFF - 000000000000FFFF - 1 = 0000000000007FFF (cc=3) -+sl 0000000000008000 - 000000000000FFFF - 1 = 0000000000008000 (cc=3) -+sl 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFFFFFF (cc=3) -+sl 0000000080000000 - 000000000000FFFF - 1 = 0000000080000000 (cc=3) -+sl 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFFFFFF (cc=3) -+sl FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFFFFFF (cc=3) -+sl 8000000000000000 - 000000000000FFFF - 1 = 8000000000000000 (cc=2) -+sl 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+slg 0000000000000000 - 000000000000FFFF - 1 = FFFFFFFFFFFF0001 (cc=1) -+slg 0000000000000001 - 000000000000FFFF - 1 = FFFFFFFFFFFF0002 (cc=1) -+slg 000000000000FFFF - 000000000000FFFF - 1 = 0000000000000000 (cc=2) -+slg 0000000000007FFF - 000000000000FFFF - 1 = FFFFFFFFFFFF8000 (cc=1) -+slg 0000000000008000 - 000000000000FFFF - 1 = FFFFFFFFFFFF8001 (cc=1) -+slg 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFF0000 (cc=3) -+slg 0000000080000000 - 000000000000FFFF - 1 = 000000007FFF0001 (cc=3) -+slg 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFF0000 (cc=3) -+slg FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFF0000 (cc=3) -+slg 8000000000000000 - 000000000000FFFF - 1 = 7FFFFFFFFFFF0001 (cc=3) -+slg 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFF0000 (cc=3) -+sgf 0000000000000000 - 000000000000FFFF - 1 = 0000000000000000 (cc=0) -+sgf 0000000000000001 - 000000000000FFFF - 1 = 0000000000000001 (cc=2) -+sgf 000000000000FFFF - 000000000000FFFF - 1 = 000000000000FFFF (cc=2) -+sgf 0000000000007FFF - 000000000000FFFF - 1 = 0000000000007FFF (cc=2) -+sgf 0000000000008000 - 000000000000FFFF - 1 = 0000000000008000 (cc=2) -+sgf 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFFFFFF (cc=2) -+sgf 0000000080000000 - 000000000000FFFF - 1 = 0000000080000000 (cc=2) -+sgf 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFFFFFF (cc=2) -+sgf FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sgf 8000000000000000 - 000000000000FFFF - 1 = 8000000000000000 (cc=1) -+sgf 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFFFFFF (cc=2) -+slgf 0000000000000000 - 000000000000FFFF - 1 = 0000000000000000 (cc=2) -+slgf 0000000000000001 - 000000000000FFFF - 1 = 0000000000000001 (cc=3) -+slgf 000000000000FFFF - 000000000000FFFF - 1 = 000000000000FFFF (cc=3) -+slgf 0000000000007FFF - 000000000000FFFF - 1 = 0000000000007FFF (cc=3) -+slgf 0000000000008000 - 000000000000FFFF - 1 = 0000000000008000 (cc=3) -+slgf 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFFFFFF (cc=3) -+slgf 0000000080000000 - 000000000000FFFF - 1 = 0000000080000000 (cc=3) -+slgf 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFFFFFF (cc=3) -+slgf FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFFFFFF (cc=3) -+slgf 8000000000000000 - 000000000000FFFF - 1 = 8000000000000000 (cc=3) -+slgf 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+sr 0000000000000000 - 000000000000FFFF - 1 = 00000000FFFF0001 (cc=1) -+sr 0000000000000001 - 000000000000FFFF - 1 = 00000000FFFF0002 (cc=1) -+sr 000000000000FFFF - 000000000000FFFF - 1 = 0000000000000000 (cc=0) -+sr 0000000000007FFF - 000000000000FFFF - 1 = 00000000FFFF8000 (cc=1) -+sr 0000000000008000 - 000000000000FFFF - 1 = 00000000FFFF8001 (cc=1) -+sr 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFF0000 (cc=1) -+sr 0000000080000000 - 000000000000FFFF - 1 = 000000007FFF0001 (cc=3) -+sr 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFF0000 (cc=2) -+sr FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFF0000 (cc=1) -+sr 8000000000000000 - 000000000000FFFF - 1 = 80000000FFFF0001 (cc=1) -+sr 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFF0000 (cc=1) -+sgr 0000000000000000 - 000000000000FFFF - 1 = FFFFFFFFFFFF0001 (cc=1) -+sgr 0000000000000001 - 000000000000FFFF - 1 = FFFFFFFFFFFF0002 (cc=1) -+sgr 000000000000FFFF - 000000000000FFFF - 1 = 0000000000000000 (cc=0) -+sgr 0000000000007FFF - 000000000000FFFF - 1 = FFFFFFFFFFFF8000 (cc=1) -+sgr 0000000000008000 - 000000000000FFFF - 1 = FFFFFFFFFFFF8001 (cc=1) -+sgr 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFF0000 (cc=2) -+sgr 0000000080000000 - 000000000000FFFF - 1 = 000000007FFF0001 (cc=2) -+sgr 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFF0000 (cc=2) -+sgr FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFF0000 (cc=1) -+sgr 8000000000000000 - 000000000000FFFF - 1 = 7FFFFFFFFFFF0001 (cc=3) -+sgr 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFF0000 (cc=2) -+sgfr 0000000000000000 - 000000000000FFFF - 1 = FFFFFFFFFFFF0001 (cc=1) -+sgfr 0000000000000001 - 000000000000FFFF - 1 = FFFFFFFFFFFF0002 (cc=1) -+sgfr 000000000000FFFF - 000000000000FFFF - 1 = 0000000000000000 (cc=0) -+sgfr 0000000000007FFF - 000000000000FFFF - 1 = FFFFFFFFFFFF8000 (cc=1) -+sgfr 0000000000008000 - 000000000000FFFF - 1 = FFFFFFFFFFFF8001 (cc=1) -+sgfr 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFF0000 (cc=2) -+sgfr 0000000080000000 - 000000000000FFFF - 1 = 000000007FFF0001 (cc=2) -+sgfr 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFF0000 (cc=2) -+sgfr FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFF0000 (cc=1) -+sgfr 8000000000000000 - 000000000000FFFF - 1 = 7FFFFFFFFFFF0001 (cc=3) -+sgfr 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFF0000 (cc=2) -+slr 0000000000000000 - 000000000000FFFF - 1 = 00000000FFFF0001 (cc=1) -+slr 0000000000000001 - 000000000000FFFF - 1 = 00000000FFFF0002 (cc=1) -+slr 000000000000FFFF - 000000000000FFFF - 1 = 0000000000000000 (cc=2) -+slr 0000000000007FFF - 000000000000FFFF - 1 = 00000000FFFF8000 (cc=1) -+slr 0000000000008000 - 000000000000FFFF - 1 = 00000000FFFF8001 (cc=1) -+slr 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFF0000 (cc=3) -+slr 0000000080000000 - 000000000000FFFF - 1 = 000000007FFF0001 (cc=3) -+slr 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFF0000 (cc=3) -+slr FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFF0000 (cc=3) -+slr 8000000000000000 - 000000000000FFFF - 1 = 80000000FFFF0001 (cc=1) -+slr 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFF0000 (cc=3) -+slgr 0000000000000000 - 000000000000FFFF - 1 = FFFFFFFFFFFF0001 (cc=1) -+slgr 0000000000000001 - 000000000000FFFF - 1 = FFFFFFFFFFFF0002 (cc=1) -+slgr 000000000000FFFF - 000000000000FFFF - 1 = 0000000000000000 (cc=2) -+slgr 0000000000007FFF - 000000000000FFFF - 1 = FFFFFFFFFFFF8000 (cc=1) -+slgr 0000000000008000 - 000000000000FFFF - 1 = FFFFFFFFFFFF8001 (cc=1) -+slgr 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFF0000 (cc=3) -+slgr 0000000080000000 - 000000000000FFFF - 1 = 000000007FFF0001 (cc=3) -+slgr 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFF0000 (cc=3) -+slgr FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFF0000 (cc=3) -+slgr 8000000000000000 - 000000000000FFFF - 1 = 7FFFFFFFFFFF0001 (cc=3) -+slgr 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFF0000 (cc=3) -+slgfr 0000000000000000 - 000000000000FFFF - 1 = FFFFFFFFFFFF0001 (cc=1) -+slgfr 0000000000000001 - 000000000000FFFF - 1 = FFFFFFFFFFFF0002 (cc=1) -+slgfr 000000000000FFFF - 000000000000FFFF - 1 = 0000000000000000 (cc=2) -+slgfr 0000000000007FFF - 000000000000FFFF - 1 = FFFFFFFFFFFF8000 (cc=1) -+slgfr 0000000000008000 - 000000000000FFFF - 1 = FFFFFFFFFFFF8001 (cc=1) -+slgfr 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFF0000 (cc=3) -+slgfr 0000000080000000 - 000000000000FFFF - 1 = 000000007FFF0001 (cc=3) -+slgfr 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFF0000 (cc=3) -+slgfr FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFF0000 (cc=3) -+slgfr 8000000000000000 - 000000000000FFFF - 1 = 7FFFFFFFFFFF0001 (cc=3) -+slgfr 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFF0000 (cc=3) -+slb 0000000000000000 - 000000000000FFFF - 1 = 00000000FFFFFFFF (cc=1) -+slb 0000000000000001 - 000000000000FFFF - 1 = 0000000000000000 (cc=2) -+slb 000000000000FFFF - 000000000000FFFF - 1 = 000000000000FFFE (cc=3) -+slb 0000000000007FFF - 000000000000FFFF - 1 = 0000000000007FFE (cc=3) -+slb 0000000000008000 - 000000000000FFFF - 1 = 0000000000007FFF (cc=3) -+slb 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFFFFFE (cc=3) -+slb 0000000080000000 - 000000000000FFFF - 1 = 000000007FFFFFFF (cc=3) -+slb 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFFFFFE (cc=3) -+slb FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFFFFFE (cc=3) -+slb 8000000000000000 - 000000000000FFFF - 1 = 80000000FFFFFFFF (cc=1) -+slb 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFFFFFE (cc=3) -+slbg 0000000000000000 - 000000000000FFFF - 1 = FFFFFFFFFFFF0000 (cc=1) -+slbg 0000000000000001 - 000000000000FFFF - 1 = FFFFFFFFFFFF0001 (cc=1) -+slbg 000000000000FFFF - 000000000000FFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slbg 0000000000007FFF - 000000000000FFFF - 1 = FFFFFFFFFFFF7FFF (cc=1) -+slbg 0000000000008000 - 000000000000FFFF - 1 = FFFFFFFFFFFF8000 (cc=1) -+slbg 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFEFFFF (cc=3) -+slbg 0000000080000000 - 000000000000FFFF - 1 = 000000007FFF0000 (cc=3) -+slbg 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFEFFFF (cc=3) -+slbg FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFEFFFF (cc=3) -+slbg 8000000000000000 - 000000000000FFFF - 1 = 7FFFFFFFFFFF0000 (cc=3) -+slbg 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFEFFFF (cc=3) -+slbr 0000000000000000 - 000000000000FFFF - 1 = 00000000FFFF0000 (cc=1) -+slbr 0000000000000001 - 000000000000FFFF - 1 = 00000000FFFF0001 (cc=1) -+slbr 000000000000FFFF - 000000000000FFFF - 1 = 00000000FFFFFFFF (cc=1) -+slbr 0000000000007FFF - 000000000000FFFF - 1 = 00000000FFFF7FFF (cc=1) -+slbr 0000000000008000 - 000000000000FFFF - 1 = 00000000FFFF8000 (cc=1) -+slbr 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFEFFFF (cc=3) -+slbr 0000000080000000 - 000000000000FFFF - 1 = 000000007FFF0000 (cc=3) -+slbr 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFEFFFF (cc=3) -+slbr FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFEFFFF (cc=3) -+slbr 8000000000000000 - 000000000000FFFF - 1 = 80000000FFFF0000 (cc=1) -+slbr 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFEFFFF (cc=3) -+slbgr 0000000000000000 - 000000000000FFFF - 1 = FFFFFFFFFFFF0000 (cc=1) -+slbgr 0000000000000001 - 000000000000FFFF - 1 = FFFFFFFFFFFF0001 (cc=1) -+slbgr 000000000000FFFF - 000000000000FFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+slbgr 0000000000007FFF - 000000000000FFFF - 1 = FFFFFFFFFFFF7FFF (cc=1) -+slbgr 0000000000008000 - 000000000000FFFF - 1 = FFFFFFFFFFFF8000 (cc=1) -+slbgr 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFEFFFF (cc=3) -+slbgr 0000000080000000 - 000000000000FFFF - 1 = 000000007FFF0000 (cc=3) -+slbgr 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFEFFFF (cc=3) -+slbgr FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFEFFFF (cc=3) -+slbgr 8000000000000000 - 000000000000FFFF - 1 = 7FFFFFFFFFFF0000 (cc=3) -+slbgr 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFEFFFF (cc=3) -+slb 0000000000000000 - 000000000000FFFF - 0 = 0000000000000000 (cc=2) -+slb 0000000000000001 - 000000000000FFFF - 0 = 0000000000000001 (cc=3) -+slb 000000000000FFFF - 000000000000FFFF - 0 = 000000000000FFFF (cc=3) -+slb 0000000000007FFF - 000000000000FFFF - 0 = 0000000000007FFF (cc=3) -+slb 0000000000008000 - 000000000000FFFF - 0 = 0000000000008000 (cc=3) -+slb 00000000FFFFFFFF - 000000000000FFFF - 0 = 00000000FFFFFFFF (cc=3) -+slb 0000000080000000 - 000000000000FFFF - 0 = 0000000080000000 (cc=3) -+slb 000000007FFFFFFF - 000000000000FFFF - 0 = 000000007FFFFFFF (cc=3) -+slb FFFFFFFFFFFFFFFF - 000000000000FFFF - 0 = FFFFFFFFFFFFFFFF (cc=3) -+slb 8000000000000000 - 000000000000FFFF - 0 = 8000000000000000 (cc=2) -+slb 7FFFFFFFFFFFFFFF - 000000000000FFFF - 0 = 7FFFFFFFFFFFFFFF (cc=3) -+slbg 0000000000000000 - 000000000000FFFF - 0 = FFFFFFFFFFFF0001 (cc=1) -+slbg 0000000000000001 - 000000000000FFFF - 0 = FFFFFFFFFFFF0002 (cc=1) -+slbg 000000000000FFFF - 000000000000FFFF - 0 = 0000000000000000 (cc=2) -+slbg 0000000000007FFF - 000000000000FFFF - 0 = FFFFFFFFFFFF8000 (cc=1) -+slbg 0000000000008000 - 000000000000FFFF - 0 = FFFFFFFFFFFF8001 (cc=1) -+slbg 00000000FFFFFFFF - 000000000000FFFF - 0 = 00000000FFFF0000 (cc=3) -+slbg 0000000080000000 - 000000000000FFFF - 0 = 000000007FFF0001 (cc=3) -+slbg 000000007FFFFFFF - 000000000000FFFF - 0 = 000000007FFF0000 (cc=3) -+slbg FFFFFFFFFFFFFFFF - 000000000000FFFF - 0 = FFFFFFFFFFFF0000 (cc=3) -+slbg 8000000000000000 - 000000000000FFFF - 0 = 7FFFFFFFFFFF0001 (cc=3) -+slbg 7FFFFFFFFFFFFFFF - 000000000000FFFF - 0 = 7FFFFFFFFFFF0000 (cc=3) -+slbr 0000000000000000 - 000000000000FFFF - 0 = 00000000FFFF0001 (cc=1) -+slbr 0000000000000001 - 000000000000FFFF - 0 = 00000000FFFF0002 (cc=1) -+slbr 000000000000FFFF - 000000000000FFFF - 0 = 0000000000000000 (cc=2) -+slbr 0000000000007FFF - 000000000000FFFF - 0 = 00000000FFFF8000 (cc=1) -+slbr 0000000000008000 - 000000000000FFFF - 0 = 00000000FFFF8001 (cc=1) -+slbr 00000000FFFFFFFF - 000000000000FFFF - 0 = 00000000FFFF0000 (cc=3) -+slbr 0000000080000000 - 000000000000FFFF - 0 = 000000007FFF0001 (cc=3) -+slbr 000000007FFFFFFF - 000000000000FFFF - 0 = 000000007FFF0000 (cc=3) -+slbr FFFFFFFFFFFFFFFF - 000000000000FFFF - 0 = FFFFFFFFFFFF0000 (cc=3) -+slbr 8000000000000000 - 000000000000FFFF - 0 = 80000000FFFF0001 (cc=1) -+slbr 7FFFFFFFFFFFFFFF - 000000000000FFFF - 0 = 7FFFFFFFFFFF0000 (cc=3) -+slbgr 0000000000000000 - 000000000000FFFF - 0 = FFFFFFFFFFFF0001 (cc=1) -+slbgr 0000000000000001 - 000000000000FFFF - 0 = FFFFFFFFFFFF0002 (cc=1) -+slbgr 000000000000FFFF - 000000000000FFFF - 0 = 0000000000000000 (cc=2) -+slbgr 0000000000007FFF - 000000000000FFFF - 0 = FFFFFFFFFFFF8000 (cc=1) -+slbgr 0000000000008000 - 000000000000FFFF - 0 = FFFFFFFFFFFF8001 (cc=1) -+slbgr 00000000FFFFFFFF - 000000000000FFFF - 0 = 00000000FFFF0000 (cc=3) -+slbgr 0000000080000000 - 000000000000FFFF - 0 = 000000007FFF0001 (cc=3) -+slbgr 000000007FFFFFFF - 000000000000FFFF - 0 = 000000007FFF0000 (cc=3) -+slbgr FFFFFFFFFFFFFFFF - 000000000000FFFF - 0 = FFFFFFFFFFFF0000 (cc=3) -+slbgr 8000000000000000 - 000000000000FFFF - 0 = 7FFFFFFFFFFF0001 (cc=3) -+slbgr 7FFFFFFFFFFFFFFF - 000000000000FFFF - 0 = 7FFFFFFFFFFF0000 (cc=3) -+shy 0000000000000000 - 000000000000FFFF - 1 = 0000000000000000 (cc=0) -+shy 0000000000000001 - 000000000000FFFF - 1 = 0000000000000001 (cc=2) -+shy 000000000000FFFF - 000000000000FFFF - 1 = 000000000000FFFF (cc=2) -+shy 0000000000007FFF - 000000000000FFFF - 1 = 0000000000007FFF (cc=2) -+shy 0000000000008000 - 000000000000FFFF - 1 = 0000000000008000 (cc=2) -+shy 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFFFFFF (cc=1) -+shy 0000000080000000 - 000000000000FFFF - 1 = 0000000080000000 (cc=1) -+shy 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFFFFFF (cc=2) -+shy FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+shy 8000000000000000 - 000000000000FFFF - 1 = 8000000000000000 (cc=0) -+shy 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFFFFFF (cc=1) -+sly 0000000000000000 - 000000000000FFFF - 1 = 0000000000000000 (cc=2) -+sly 0000000000000001 - 000000000000FFFF - 1 = 0000000000000001 (cc=3) -+sly 000000000000FFFF - 000000000000FFFF - 1 = 000000000000FFFF (cc=3) -+sly 0000000000007FFF - 000000000000FFFF - 1 = 0000000000007FFF (cc=3) -+sly 0000000000008000 - 000000000000FFFF - 1 = 0000000000008000 (cc=3) -+sly 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFFFFFF (cc=3) -+sly 0000000080000000 - 000000000000FFFF - 1 = 0000000080000000 (cc=3) -+sly 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFFFFFF (cc=3) -+sly FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFFFFFF (cc=3) -+sly 8000000000000000 - 000000000000FFFF - 1 = 8000000000000000 (cc=2) -+sly 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFFFFFF (cc=3) -+sy 0000000000000000 - 000000000000FFFF - 1 = 0000000000000000 (cc=0) -+sy 0000000000000001 - 000000000000FFFF - 1 = 0000000000000001 (cc=2) -+sy 000000000000FFFF - 000000000000FFFF - 1 = 000000000000FFFF (cc=2) -+sy 0000000000007FFF - 000000000000FFFF - 1 = 0000000000007FFF (cc=2) -+sy 0000000000008000 - 000000000000FFFF - 1 = 0000000000008000 (cc=2) -+sy 00000000FFFFFFFF - 000000000000FFFF - 1 = 00000000FFFFFFFF (cc=1) -+sy 0000000080000000 - 000000000000FFFF - 1 = 0000000080000000 (cc=1) -+sy 000000007FFFFFFF - 000000000000FFFF - 1 = 000000007FFFFFFF (cc=2) -+sy FFFFFFFFFFFFFFFF - 000000000000FFFF - 1 = FFFFFFFFFFFFFFFF (cc=1) -+sy 8000000000000000 - 000000000000FFFF - 1 = 8000000000000000 (cc=0) -+sy 7FFFFFFFFFFFFFFF - 000000000000FFFF - 1 = 7FFFFFFFFFFFFFFF (cc=1) ---- none/tests/s390x/sub.vgtest -+++ none/tests/s390x/sub.vgtest -@@ -0,0 +1 @@ -+prog: sub ---- none/tests/s390x/tcxb.c -+++ none/tests/s390x/tcxb.c -@@ -0,0 +1,95 @@ -+/* test data class tests for float, double, long double: TCEB, TCDB, TCXB */ -+#include -+#include -+ -+static int tcxb(long double f, long long num) -+{ -+ int match; -+ -+ asm volatile(" tcxb %1,0(%2)\n" -+ "ipm %0\n" -+ "srl %0,28\n" -+ : "=d" (match) -+ : "f" (f), "a" (num) -+ : "cc"); -+ return match; -+} -+ -+static int tcdb(double f, long long num) -+{ -+ int match; -+ -+ asm volatile(" tcdb %1,0(%2)\n" -+ "ipm %0\n" -+ "srl %0,28\n" -+ : "=d" (match) -+ : "f" (f), "a" (num) -+ : "cc"); -+ return match; -+} -+ -+static int tceb(float f, long long num) -+{ -+ int match; -+ -+ asm volatile(" tceb %1,0(%2)\n" -+ "ipm %0\n" -+ "srl %0,28\n" -+ : "=d" (match) -+ : "f" (f), "a" (num) -+ : "cc"); -+ return match; -+} -+ -+int main() -+{ -+ int i; -+ -+ for (i = 0; i < 64; i++) { -+ if (sizeof (long double) == 16) { -+ /* long double 128 bit */ -+ printf("%d", tcxb(+0.0l, 1UL< -+#define get_cc() \ -+({ \ -+ char __cc; \ -+ /* dont use IPM to better test spechelpers */ \ -+ asm volatile( " brc 8,1f\n\t" \ -+ " brc 4,2f\n\t" \ -+ " brc 2,3f\n\t" \ -+ " brc 1,4f\n\t" \ -+ " mvi %0,4\n\t" \ -+ " j 0f\n\t" \ -+ "1: mvi %0,0\n\t" \ -+ " j 0f\n\t" \ -+ "2: mvi %0,1\n\t" \ -+ " j 0f\n\t" \ -+ "3: mvi %0,2\n\t" \ -+ " j 0f\n\t" \ -+ "4: mvi %0,3\n\t" \ -+ " j 0f\n\t" \ -+ "0: bcr 0,0 /*nop*/\n\t" \ -+ :"=m" (__cc)::"memory"); \ -+ __cc; \ -+}) -+ -+static inline void dump_field(void *field, int size) -+{ -+ int i; -+ for (i=0; i < size; i++) -+ printf("%2.2X ", ((char *) field)[i]); -+} ---- none/tests/s390x/xc.c -+++ none/tests/s390x/xc.c -@@ -0,0 +1,102 @@ -+/* tests, xc,oc and nc */ -+#include -+#include "test.h" -+ -+void test_oc(void) -+{ -+ char buf1[20] = "UUUUU*UUU****U*\0\0\0\0\n"; -+ char buf2[20] = "*U\0*\0\0UU*\0U*AUAA*UU\n"; -+ char zero[2] = "\0\0"; -+ -+ printf("\nOC:\n"); -+ asm volatile ("oc %O0(1,%R0),%0\n"::"Q" (*zero), -+ "Q"(*zero):"memory"); -+ printf("CC:%d\n", get_cc()); -+ dump_field(zero, 2); -+ -+ asm volatile ("oc %O0(19,%R0),%1\n"::"Q" (*buf1), -+ "Q"(*buf2):"memory"); -+ printf("CC:%d\n", get_cc()); -+ dump_field(buf1, 20); -+} -+ -+void test_nc(void) -+{ -+ char buf1[20] = "UUUUU*UUU****U*\0\0\0\0\n"; -+ char buf2[20] = "*U\0*\0\0UU*\0U*AUAA*UU\n"; -+ char zero[2] = "\0\0"; -+ -+ printf("\nNC:\n"); -+ asm volatile ("nc %O0(1,%R0),%0\n"::"Q" (*zero), -+ "Q"(*zero):"memory"); -+ printf("CC:%d\n", get_cc()); -+ dump_field(zero, 2); -+ -+ asm volatile ("nc %O0(19,%R0),%1\n"::"Q" (*buf1), -+ "Q"(*buf2):"memory"); -+ printf("CC:%d\n", get_cc()); -+ dump_field(buf1, 20); -+} -+ -+ -+void test_xc(void) -+{ -+ char buf1[20] = "UUUUU*UUU****U*\0\0\0\0\n"; -+ char buf2[20] = "*U\0*\0\0UU*\0U*AUAA*UU\n"; -+ char buf3[20] = "0123456789abcdefghij"; -+ char zero[300] = -+ "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa" -+ "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa" -+ "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa" -+ "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa" -+ "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa" -+ "aaaaa"; -+ -+ printf("\nXC:\n"); -+ asm volatile ("xc %O0(1,%R0),%0\n"::"Q" (*zero), -+ "Q"(*zero):"memory"); -+ printf("CC:%d\n", get_cc()); -+ dump_field(zero, 4); -+ -+ asm volatile ("xc %O0(10,%R0),%0\n"::"Q" (*zero), -+ "Q"(*zero):"memory"); -+ printf("CC:%d\n", get_cc()); -+ dump_field(zero, 12); -+ -+ asm volatile ("xc %O0(100,%R0),%0\n"::"Q" (*zero), -+ "Q"(*zero):"memory"); -+ printf("CC:%d\n", get_cc()); -+ dump_field(zero, 102); -+ -+ asm volatile ("xc %O0(256,%R0),%0\n"::"Q" (*zero), -+ "Q"(*zero):"memory"); -+ printf("CC:%d\n", get_cc()); -+ dump_field(zero, 257); -+ -+ asm volatile ("lghi 1,256 + 20\n" -+ "larl 2,1f\n" -+ "ex 1,0(2)\n" -+ "j 2f\n" -+ "1: xc 260(1,%0),260(%0)\n" -+ "2:\n"::"a" (zero), "a"(zero):"memory", "1", "2"); -+ printf("CC:%d\n", get_cc()); -+ dump_field(zero + 260, 30); -+ -+ asm volatile ("xc 0(19,%0),0(%1)\n"::"a" (buf1), -+ "a"(buf2):"memory"); -+ printf("CC:%d\n", get_cc()); -+ dump_field(buf1, 20); -+ asm volatile ("xc 0(10,%0),0(%0)\n"::"a" (buf3):"memory"); -+ -+ printf("CC:%d\n", get_cc()); -+ dump_field(buf3, 20); -+ return; -+} -+ -+int main() -+{ -+ test_oc(); -+ test_nc(); -+ test_xc(); -+ return 0; -+} ---- none/tests/s390x/xc.stderr.exp -+++ none/tests/s390x/xc.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/xc.stdout.exp -+++ none/tests/s390x/xc.stdout.exp -@@ -0,0 +1,18 @@ -+ -+OC: -+CC:0 -+00 00 CC:1 -+7F 55 55 7F 55 2A 55 55 7F 2A 7F 2A 6B 55 6B 41 2A 55 55 0A -+NC: -+CC:0 -+00 00 CC:1 -+00 55 00 00 00 00 55 55 00 00 00 2A 00 55 00 00 00 00 00 0A -+XC: -+CC:0 -+00 61 61 61 CC:0 -+00 00 00 00 00 00 00 00 00 00 61 61 CC:0 -+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 61 61 CC:0 -+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 61 CC:0 -+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 61 61 61 61 61 61 61 61 61 CC:1 -+7F 00 55 7F 55 2A 00 00 7F 2A 7F 00 6B 00 6B 41 2A 55 55 0A CC:0 -+00 00 00 00 00 00 00 00 00 00 61 62 63 64 65 66 67 68 69 6A -\ Kein Zeilenumbruch am Dateiende. ---- none/tests/s390x/xc.vgtest -+++ none/tests/s390x/xc.vgtest -@@ -0,0 +1 @@ -+prog: xc ---- none/tests/s390x/xor.c -+++ none/tests/s390x/xor.c -@@ -0,0 +1,51 @@ -+#include -+#include "xor.h" -+ -+static void do_imm_insns(void) -+{ -+ memimmsweep(xi, 0); -+ memimmsweep(xi, 255); -+ memimmsweep(xi, 128); -+ memimmsweep(xi, 0xaa); -+ memimmsweep(xi, 0x55); -+ memimmsweep(xiy, 0); -+ memimmsweep(xiy, 255); -+ memimmsweep(xiy, 128); -+ memimmsweep(xiy, 0xaa); -+ memimmsweep(xiy, 0x55); -+} -+ -+ -+static void do_regmem_insns(unsigned long s2) -+{ -+ memsweep(x, s2); -+ memsweep(xg, s2); -+ regsweep(xr, s2); -+ regsweep(xgr, s2); -+ memsweep(xy, s2); -+} -+ -+int main() -+{ -+ do_regmem_insns(0x0ul); -+ do_regmem_insns(0x5555555555555555ul); -+ do_regmem_insns(0xaaaaaaaaaaaaaaaaul); -+ do_regmem_insns(0x8000000000000000ul); -+ do_regmem_insns(0xfffffffffffffffful); -+ do_regmem_insns(0x7fffffff00000000ul); -+ do_regmem_insns(0x8000000000000000ul); -+ do_regmem_insns(0xaaaaaaaa00000000ul); -+ do_regmem_insns(0xffffffff00000000ul); -+ do_regmem_insns(0x000000007ffffffful); -+ do_regmem_insns(0x0000000080000000ul); -+ do_regmem_insns(0x0000000055555555ul); -+ do_regmem_insns(0x00000000fffffffful); -+ do_regmem_insns(0x000000000000fffful); -+ do_regmem_insns(0x0000000000007ffful); -+ do_regmem_insns(0x0000000000008000ul); -+ do_regmem_insns(0x000000000000fffful); -+ -+ do_imm_insns(); -+ -+ return 0; -+} ---- none/tests/s390x/xor_EI.c -+++ none/tests/s390x/xor_EI.c -@@ -0,0 +1,41 @@ -+#include -+#include "xor.h" -+ -+static void do_imm_insns(void) -+{ -+ immsweep(xihf, 0); -+ immsweep(xihf, 0xff); -+ immsweep(xihf, 0x55); -+ immsweep(xihf, 0xaa); -+ immsweep(xihf, 0xffff); -+ immsweep(xihf, 0x5555); -+ immsweep(xihf, 0xaaaa); -+ immsweep(xihf, 0xffff0000); -+ immsweep(xihf, 0x55550000); -+ immsweep(xihf, 0xaaaa0000); -+ immsweep(xihf, 0xffffffff); -+ immsweep(xihf, 0x55555555); -+ immsweep(xihf, 0xaaaaaaaa); -+ immsweep(xilf, 0); -+ immsweep(xilf, 0xff); -+ immsweep(xilf, 0x55); -+ immsweep(xilf, 0xaa); -+ immsweep(xilf, 0xffff); -+ immsweep(xilf, 0x5555); -+ immsweep(xilf, 0xaaaa); -+ immsweep(xilf, 0xffff0000); -+ immsweep(xilf, 0x55550000); -+ immsweep(xilf, 0xaaaa0000); -+ immsweep(xilf, 0xffffffff); -+ immsweep(xilf, 0x55555555); -+ immsweep(xilf, 0xaaaaaaaa); -+ -+} -+ -+ -+int main() -+{ -+ do_imm_insns(); -+ -+ return 0; -+} ---- none/tests/s390x/xor_EI.stderr.exp -+++ none/tests/s390x/xor_EI.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/xor_EI.stdout.exp -+++ none/tests/s390x/xor_EI.stdout.exp -@@ -0,0 +1,312 @@ -+xihf 0000000000000000 ^ 0000000000000000 = 0000000000000000 (cc=0) -+xihf 0000000000000001 ^ 0000000000000000 = 0000000000000001 (cc=0) -+xihf 000000000000FFFF ^ 0000000000000000 = 000000000000FFFF (cc=0) -+xihf 0000000000007FFF ^ 0000000000000000 = 0000000000007FFF (cc=0) -+xihf 0000000000008000 ^ 0000000000000000 = 0000000000008000 (cc=0) -+xihf 00000000FFFFFFFF ^ 0000000000000000 = 00000000FFFFFFFF (cc=0) -+xihf 0000000080000000 ^ 0000000000000000 = 0000000080000000 (cc=0) -+xihf 000000007FFFFFFF ^ 0000000000000000 = 000000007FFFFFFF (cc=0) -+xihf AAAAAAAAAAAAAAAA ^ 0000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+xihf 8000000000000000 ^ 0000000000000000 = 8000000000000000 (cc=1) -+xihf FFFFFFFFFFFFFFFF ^ 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+xihf 5555555555555555 ^ 0000000000000000 = 5555555555555555 (cc=1) -+xihf 0000000000000000 ^ 00000000000000FF = 000000FF00000000 (cc=1) -+xihf 0000000000000001 ^ 00000000000000FF = 000000FF00000001 (cc=1) -+xihf 000000000000FFFF ^ 00000000000000FF = 000000FF0000FFFF (cc=1) -+xihf 0000000000007FFF ^ 00000000000000FF = 000000FF00007FFF (cc=1) -+xihf 0000000000008000 ^ 00000000000000FF = 000000FF00008000 (cc=1) -+xihf 00000000FFFFFFFF ^ 00000000000000FF = 000000FFFFFFFFFF (cc=1) -+xihf 0000000080000000 ^ 00000000000000FF = 000000FF80000000 (cc=1) -+xihf 000000007FFFFFFF ^ 00000000000000FF = 000000FF7FFFFFFF (cc=1) -+xihf AAAAAAAAAAAAAAAA ^ 00000000000000FF = AAAAAA55AAAAAAAA (cc=1) -+xihf 8000000000000000 ^ 00000000000000FF = 800000FF00000000 (cc=1) -+xihf FFFFFFFFFFFFFFFF ^ 00000000000000FF = FFFFFF00FFFFFFFF (cc=1) -+xihf 5555555555555555 ^ 00000000000000FF = 555555AA55555555 (cc=1) -+xihf 0000000000000000 ^ 0000000000000055 = 0000005500000000 (cc=1) -+xihf 0000000000000001 ^ 0000000000000055 = 0000005500000001 (cc=1) -+xihf 000000000000FFFF ^ 0000000000000055 = 000000550000FFFF (cc=1) -+xihf 0000000000007FFF ^ 0000000000000055 = 0000005500007FFF (cc=1) -+xihf 0000000000008000 ^ 0000000000000055 = 0000005500008000 (cc=1) -+xihf 00000000FFFFFFFF ^ 0000000000000055 = 00000055FFFFFFFF (cc=1) -+xihf 0000000080000000 ^ 0000000000000055 = 0000005580000000 (cc=1) -+xihf 000000007FFFFFFF ^ 0000000000000055 = 000000557FFFFFFF (cc=1) -+xihf AAAAAAAAAAAAAAAA ^ 0000000000000055 = AAAAAAFFAAAAAAAA (cc=1) -+xihf 8000000000000000 ^ 0000000000000055 = 8000005500000000 (cc=1) -+xihf FFFFFFFFFFFFFFFF ^ 0000000000000055 = FFFFFFAAFFFFFFFF (cc=1) -+xihf 5555555555555555 ^ 0000000000000055 = 5555550055555555 (cc=1) -+xihf 0000000000000000 ^ 00000000000000AA = 000000AA00000000 (cc=1) -+xihf 0000000000000001 ^ 00000000000000AA = 000000AA00000001 (cc=1) -+xihf 000000000000FFFF ^ 00000000000000AA = 000000AA0000FFFF (cc=1) -+xihf 0000000000007FFF ^ 00000000000000AA = 000000AA00007FFF (cc=1) -+xihf 0000000000008000 ^ 00000000000000AA = 000000AA00008000 (cc=1) -+xihf 00000000FFFFFFFF ^ 00000000000000AA = 000000AAFFFFFFFF (cc=1) -+xihf 0000000080000000 ^ 00000000000000AA = 000000AA80000000 (cc=1) -+xihf 000000007FFFFFFF ^ 00000000000000AA = 000000AA7FFFFFFF (cc=1) -+xihf AAAAAAAAAAAAAAAA ^ 00000000000000AA = AAAAAA00AAAAAAAA (cc=1) -+xihf 8000000000000000 ^ 00000000000000AA = 800000AA00000000 (cc=1) -+xihf FFFFFFFFFFFFFFFF ^ 00000000000000AA = FFFFFF55FFFFFFFF (cc=1) -+xihf 5555555555555555 ^ 00000000000000AA = 555555FF55555555 (cc=1) -+xihf 0000000000000000 ^ 000000000000FFFF = 0000FFFF00000000 (cc=1) -+xihf 0000000000000001 ^ 000000000000FFFF = 0000FFFF00000001 (cc=1) -+xihf 000000000000FFFF ^ 000000000000FFFF = 0000FFFF0000FFFF (cc=1) -+xihf 0000000000007FFF ^ 000000000000FFFF = 0000FFFF00007FFF (cc=1) -+xihf 0000000000008000 ^ 000000000000FFFF = 0000FFFF00008000 (cc=1) -+xihf 00000000FFFFFFFF ^ 000000000000FFFF = 0000FFFFFFFFFFFF (cc=1) -+xihf 0000000080000000 ^ 000000000000FFFF = 0000FFFF80000000 (cc=1) -+xihf 000000007FFFFFFF ^ 000000000000FFFF = 0000FFFF7FFFFFFF (cc=1) -+xihf AAAAAAAAAAAAAAAA ^ 000000000000FFFF = AAAA5555AAAAAAAA (cc=1) -+xihf 8000000000000000 ^ 000000000000FFFF = 8000FFFF00000000 (cc=1) -+xihf FFFFFFFFFFFFFFFF ^ 000000000000FFFF = FFFF0000FFFFFFFF (cc=1) -+xihf 5555555555555555 ^ 000000000000FFFF = 5555AAAA55555555 (cc=1) -+xihf 0000000000000000 ^ 0000000000005555 = 0000555500000000 (cc=1) -+xihf 0000000000000001 ^ 0000000000005555 = 0000555500000001 (cc=1) -+xihf 000000000000FFFF ^ 0000000000005555 = 000055550000FFFF (cc=1) -+xihf 0000000000007FFF ^ 0000000000005555 = 0000555500007FFF (cc=1) -+xihf 0000000000008000 ^ 0000000000005555 = 0000555500008000 (cc=1) -+xihf 00000000FFFFFFFF ^ 0000000000005555 = 00005555FFFFFFFF (cc=1) -+xihf 0000000080000000 ^ 0000000000005555 = 0000555580000000 (cc=1) -+xihf 000000007FFFFFFF ^ 0000000000005555 = 000055557FFFFFFF (cc=1) -+xihf AAAAAAAAAAAAAAAA ^ 0000000000005555 = AAAAFFFFAAAAAAAA (cc=1) -+xihf 8000000000000000 ^ 0000000000005555 = 8000555500000000 (cc=1) -+xihf FFFFFFFFFFFFFFFF ^ 0000000000005555 = FFFFAAAAFFFFFFFF (cc=1) -+xihf 5555555555555555 ^ 0000000000005555 = 5555000055555555 (cc=1) -+xihf 0000000000000000 ^ 000000000000AAAA = 0000AAAA00000000 (cc=1) -+xihf 0000000000000001 ^ 000000000000AAAA = 0000AAAA00000001 (cc=1) -+xihf 000000000000FFFF ^ 000000000000AAAA = 0000AAAA0000FFFF (cc=1) -+xihf 0000000000007FFF ^ 000000000000AAAA = 0000AAAA00007FFF (cc=1) -+xihf 0000000000008000 ^ 000000000000AAAA = 0000AAAA00008000 (cc=1) -+xihf 00000000FFFFFFFF ^ 000000000000AAAA = 0000AAAAFFFFFFFF (cc=1) -+xihf 0000000080000000 ^ 000000000000AAAA = 0000AAAA80000000 (cc=1) -+xihf 000000007FFFFFFF ^ 000000000000AAAA = 0000AAAA7FFFFFFF (cc=1) -+xihf AAAAAAAAAAAAAAAA ^ 000000000000AAAA = AAAA0000AAAAAAAA (cc=1) -+xihf 8000000000000000 ^ 000000000000AAAA = 8000AAAA00000000 (cc=1) -+xihf FFFFFFFFFFFFFFFF ^ 000000000000AAAA = FFFF5555FFFFFFFF (cc=1) -+xihf 5555555555555555 ^ 000000000000AAAA = 5555FFFF55555555 (cc=1) -+xihf 0000000000000000 ^ 00000000FFFF0000 = FFFF000000000000 (cc=1) -+xihf 0000000000000001 ^ 00000000FFFF0000 = FFFF000000000001 (cc=1) -+xihf 000000000000FFFF ^ 00000000FFFF0000 = FFFF00000000FFFF (cc=1) -+xihf 0000000000007FFF ^ 00000000FFFF0000 = FFFF000000007FFF (cc=1) -+xihf 0000000000008000 ^ 00000000FFFF0000 = FFFF000000008000 (cc=1) -+xihf 00000000FFFFFFFF ^ 00000000FFFF0000 = FFFF0000FFFFFFFF (cc=1) -+xihf 0000000080000000 ^ 00000000FFFF0000 = FFFF000080000000 (cc=1) -+xihf 000000007FFFFFFF ^ 00000000FFFF0000 = FFFF00007FFFFFFF (cc=1) -+xihf AAAAAAAAAAAAAAAA ^ 00000000FFFF0000 = 5555AAAAAAAAAAAA (cc=1) -+xihf 8000000000000000 ^ 00000000FFFF0000 = 7FFF000000000000 (cc=1) -+xihf FFFFFFFFFFFFFFFF ^ 00000000FFFF0000 = 0000FFFFFFFFFFFF (cc=1) -+xihf 5555555555555555 ^ 00000000FFFF0000 = AAAA555555555555 (cc=1) -+xihf 0000000000000000 ^ 0000000055550000 = 5555000000000000 (cc=1) -+xihf 0000000000000001 ^ 0000000055550000 = 5555000000000001 (cc=1) -+xihf 000000000000FFFF ^ 0000000055550000 = 555500000000FFFF (cc=1) -+xihf 0000000000007FFF ^ 0000000055550000 = 5555000000007FFF (cc=1) -+xihf 0000000000008000 ^ 0000000055550000 = 5555000000008000 (cc=1) -+xihf 00000000FFFFFFFF ^ 0000000055550000 = 55550000FFFFFFFF (cc=1) -+xihf 0000000080000000 ^ 0000000055550000 = 5555000080000000 (cc=1) -+xihf 000000007FFFFFFF ^ 0000000055550000 = 555500007FFFFFFF (cc=1) -+xihf AAAAAAAAAAAAAAAA ^ 0000000055550000 = FFFFAAAAAAAAAAAA (cc=1) -+xihf 8000000000000000 ^ 0000000055550000 = D555000000000000 (cc=1) -+xihf FFFFFFFFFFFFFFFF ^ 0000000055550000 = AAAAFFFFFFFFFFFF (cc=1) -+xihf 5555555555555555 ^ 0000000055550000 = 0000555555555555 (cc=1) -+xihf 0000000000000000 ^ 00000000AAAA0000 = AAAA000000000000 (cc=1) -+xihf 0000000000000001 ^ 00000000AAAA0000 = AAAA000000000001 (cc=1) -+xihf 000000000000FFFF ^ 00000000AAAA0000 = AAAA00000000FFFF (cc=1) -+xihf 0000000000007FFF ^ 00000000AAAA0000 = AAAA000000007FFF (cc=1) -+xihf 0000000000008000 ^ 00000000AAAA0000 = AAAA000000008000 (cc=1) -+xihf 00000000FFFFFFFF ^ 00000000AAAA0000 = AAAA0000FFFFFFFF (cc=1) -+xihf 0000000080000000 ^ 00000000AAAA0000 = AAAA000080000000 (cc=1) -+xihf 000000007FFFFFFF ^ 00000000AAAA0000 = AAAA00007FFFFFFF (cc=1) -+xihf AAAAAAAAAAAAAAAA ^ 00000000AAAA0000 = 0000AAAAAAAAAAAA (cc=1) -+xihf 8000000000000000 ^ 00000000AAAA0000 = 2AAA000000000000 (cc=1) -+xihf FFFFFFFFFFFFFFFF ^ 00000000AAAA0000 = 5555FFFFFFFFFFFF (cc=1) -+xihf 5555555555555555 ^ 00000000AAAA0000 = FFFF555555555555 (cc=1) -+xihf 0000000000000000 ^ 00000000FFFFFFFF = FFFFFFFF00000000 (cc=1) -+xihf 0000000000000001 ^ 00000000FFFFFFFF = FFFFFFFF00000001 (cc=1) -+xihf 000000000000FFFF ^ 00000000FFFFFFFF = FFFFFFFF0000FFFF (cc=1) -+xihf 0000000000007FFF ^ 00000000FFFFFFFF = FFFFFFFF00007FFF (cc=1) -+xihf 0000000000008000 ^ 00000000FFFFFFFF = FFFFFFFF00008000 (cc=1) -+xihf 00000000FFFFFFFF ^ 00000000FFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+xihf 0000000080000000 ^ 00000000FFFFFFFF = FFFFFFFF80000000 (cc=1) -+xihf 000000007FFFFFFF ^ 00000000FFFFFFFF = FFFFFFFF7FFFFFFF (cc=1) -+xihf AAAAAAAAAAAAAAAA ^ 00000000FFFFFFFF = 55555555AAAAAAAA (cc=1) -+xihf 8000000000000000 ^ 00000000FFFFFFFF = 7FFFFFFF00000000 (cc=1) -+xihf FFFFFFFFFFFFFFFF ^ 00000000FFFFFFFF = 00000000FFFFFFFF (cc=0) -+xihf 5555555555555555 ^ 00000000FFFFFFFF = AAAAAAAA55555555 (cc=1) -+xihf 0000000000000000 ^ 0000000055555555 = 5555555500000000 (cc=1) -+xihf 0000000000000001 ^ 0000000055555555 = 5555555500000001 (cc=1) -+xihf 000000000000FFFF ^ 0000000055555555 = 555555550000FFFF (cc=1) -+xihf 0000000000007FFF ^ 0000000055555555 = 5555555500007FFF (cc=1) -+xihf 0000000000008000 ^ 0000000055555555 = 5555555500008000 (cc=1) -+xihf 00000000FFFFFFFF ^ 0000000055555555 = 55555555FFFFFFFF (cc=1) -+xihf 0000000080000000 ^ 0000000055555555 = 5555555580000000 (cc=1) -+xihf 000000007FFFFFFF ^ 0000000055555555 = 555555557FFFFFFF (cc=1) -+xihf AAAAAAAAAAAAAAAA ^ 0000000055555555 = FFFFFFFFAAAAAAAA (cc=1) -+xihf 8000000000000000 ^ 0000000055555555 = D555555500000000 (cc=1) -+xihf FFFFFFFFFFFFFFFF ^ 0000000055555555 = AAAAAAAAFFFFFFFF (cc=1) -+xihf 5555555555555555 ^ 0000000055555555 = 0000000055555555 (cc=0) -+xihf 0000000000000000 ^ 00000000AAAAAAAA = AAAAAAAA00000000 (cc=1) -+xihf 0000000000000001 ^ 00000000AAAAAAAA = AAAAAAAA00000001 (cc=1) -+xihf 000000000000FFFF ^ 00000000AAAAAAAA = AAAAAAAA0000FFFF (cc=1) -+xihf 0000000000007FFF ^ 00000000AAAAAAAA = AAAAAAAA00007FFF (cc=1) -+xihf 0000000000008000 ^ 00000000AAAAAAAA = AAAAAAAA00008000 (cc=1) -+xihf 00000000FFFFFFFF ^ 00000000AAAAAAAA = AAAAAAAAFFFFFFFF (cc=1) -+xihf 0000000080000000 ^ 00000000AAAAAAAA = AAAAAAAA80000000 (cc=1) -+xihf 000000007FFFFFFF ^ 00000000AAAAAAAA = AAAAAAAA7FFFFFFF (cc=1) -+xihf AAAAAAAAAAAAAAAA ^ 00000000AAAAAAAA = 00000000AAAAAAAA (cc=0) -+xihf 8000000000000000 ^ 00000000AAAAAAAA = 2AAAAAAA00000000 (cc=1) -+xihf FFFFFFFFFFFFFFFF ^ 00000000AAAAAAAA = 55555555FFFFFFFF (cc=1) -+xihf 5555555555555555 ^ 00000000AAAAAAAA = FFFFFFFF55555555 (cc=1) -+xilf 0000000000000000 ^ 0000000000000000 = 0000000000000000 (cc=0) -+xilf 0000000000000001 ^ 0000000000000000 = 0000000000000001 (cc=1) -+xilf 000000000000FFFF ^ 0000000000000000 = 000000000000FFFF (cc=1) -+xilf 0000000000007FFF ^ 0000000000000000 = 0000000000007FFF (cc=1) -+xilf 0000000000008000 ^ 0000000000000000 = 0000000000008000 (cc=1) -+xilf 00000000FFFFFFFF ^ 0000000000000000 = 00000000FFFFFFFF (cc=1) -+xilf 0000000080000000 ^ 0000000000000000 = 0000000080000000 (cc=1) -+xilf 000000007FFFFFFF ^ 0000000000000000 = 000000007FFFFFFF (cc=1) -+xilf AAAAAAAAAAAAAAAA ^ 0000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+xilf 8000000000000000 ^ 0000000000000000 = 8000000000000000 (cc=0) -+xilf FFFFFFFFFFFFFFFF ^ 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+xilf 5555555555555555 ^ 0000000000000000 = 5555555555555555 (cc=1) -+xilf 0000000000000000 ^ 00000000000000FF = 00000000000000FF (cc=1) -+xilf 0000000000000001 ^ 00000000000000FF = 00000000000000FE (cc=1) -+xilf 000000000000FFFF ^ 00000000000000FF = 000000000000FF00 (cc=1) -+xilf 0000000000007FFF ^ 00000000000000FF = 0000000000007F00 (cc=1) -+xilf 0000000000008000 ^ 00000000000000FF = 00000000000080FF (cc=1) -+xilf 00000000FFFFFFFF ^ 00000000000000FF = 00000000FFFFFF00 (cc=1) -+xilf 0000000080000000 ^ 00000000000000FF = 00000000800000FF (cc=1) -+xilf 000000007FFFFFFF ^ 00000000000000FF = 000000007FFFFF00 (cc=1) -+xilf AAAAAAAAAAAAAAAA ^ 00000000000000FF = AAAAAAAAAAAAAA55 (cc=1) -+xilf 8000000000000000 ^ 00000000000000FF = 80000000000000FF (cc=1) -+xilf FFFFFFFFFFFFFFFF ^ 00000000000000FF = FFFFFFFFFFFFFF00 (cc=1) -+xilf 5555555555555555 ^ 00000000000000FF = 55555555555555AA (cc=1) -+xilf 0000000000000000 ^ 0000000000000055 = 0000000000000055 (cc=1) -+xilf 0000000000000001 ^ 0000000000000055 = 0000000000000054 (cc=1) -+xilf 000000000000FFFF ^ 0000000000000055 = 000000000000FFAA (cc=1) -+xilf 0000000000007FFF ^ 0000000000000055 = 0000000000007FAA (cc=1) -+xilf 0000000000008000 ^ 0000000000000055 = 0000000000008055 (cc=1) -+xilf 00000000FFFFFFFF ^ 0000000000000055 = 00000000FFFFFFAA (cc=1) -+xilf 0000000080000000 ^ 0000000000000055 = 0000000080000055 (cc=1) -+xilf 000000007FFFFFFF ^ 0000000000000055 = 000000007FFFFFAA (cc=1) -+xilf AAAAAAAAAAAAAAAA ^ 0000000000000055 = AAAAAAAAAAAAAAFF (cc=1) -+xilf 8000000000000000 ^ 0000000000000055 = 8000000000000055 (cc=1) -+xilf FFFFFFFFFFFFFFFF ^ 0000000000000055 = FFFFFFFFFFFFFFAA (cc=1) -+xilf 5555555555555555 ^ 0000000000000055 = 5555555555555500 (cc=1) -+xilf 0000000000000000 ^ 00000000000000AA = 00000000000000AA (cc=1) -+xilf 0000000000000001 ^ 00000000000000AA = 00000000000000AB (cc=1) -+xilf 000000000000FFFF ^ 00000000000000AA = 000000000000FF55 (cc=1) -+xilf 0000000000007FFF ^ 00000000000000AA = 0000000000007F55 (cc=1) -+xilf 0000000000008000 ^ 00000000000000AA = 00000000000080AA (cc=1) -+xilf 00000000FFFFFFFF ^ 00000000000000AA = 00000000FFFFFF55 (cc=1) -+xilf 0000000080000000 ^ 00000000000000AA = 00000000800000AA (cc=1) -+xilf 000000007FFFFFFF ^ 00000000000000AA = 000000007FFFFF55 (cc=1) -+xilf AAAAAAAAAAAAAAAA ^ 00000000000000AA = AAAAAAAAAAAAAA00 (cc=1) -+xilf 8000000000000000 ^ 00000000000000AA = 80000000000000AA (cc=1) -+xilf FFFFFFFFFFFFFFFF ^ 00000000000000AA = FFFFFFFFFFFFFF55 (cc=1) -+xilf 5555555555555555 ^ 00000000000000AA = 55555555555555FF (cc=1) -+xilf 0000000000000000 ^ 000000000000FFFF = 000000000000FFFF (cc=1) -+xilf 0000000000000001 ^ 000000000000FFFF = 000000000000FFFE (cc=1) -+xilf 000000000000FFFF ^ 000000000000FFFF = 0000000000000000 (cc=0) -+xilf 0000000000007FFF ^ 000000000000FFFF = 0000000000008000 (cc=1) -+xilf 0000000000008000 ^ 000000000000FFFF = 0000000000007FFF (cc=1) -+xilf 00000000FFFFFFFF ^ 000000000000FFFF = 00000000FFFF0000 (cc=1) -+xilf 0000000080000000 ^ 000000000000FFFF = 000000008000FFFF (cc=1) -+xilf 000000007FFFFFFF ^ 000000000000FFFF = 000000007FFF0000 (cc=1) -+xilf AAAAAAAAAAAAAAAA ^ 000000000000FFFF = AAAAAAAAAAAA5555 (cc=1) -+xilf 8000000000000000 ^ 000000000000FFFF = 800000000000FFFF (cc=1) -+xilf FFFFFFFFFFFFFFFF ^ 000000000000FFFF = FFFFFFFFFFFF0000 (cc=1) -+xilf 5555555555555555 ^ 000000000000FFFF = 555555555555AAAA (cc=1) -+xilf 0000000000000000 ^ 0000000000005555 = 0000000000005555 (cc=1) -+xilf 0000000000000001 ^ 0000000000005555 = 0000000000005554 (cc=1) -+xilf 000000000000FFFF ^ 0000000000005555 = 000000000000AAAA (cc=1) -+xilf 0000000000007FFF ^ 0000000000005555 = 0000000000002AAA (cc=1) -+xilf 0000000000008000 ^ 0000000000005555 = 000000000000D555 (cc=1) -+xilf 00000000FFFFFFFF ^ 0000000000005555 = 00000000FFFFAAAA (cc=1) -+xilf 0000000080000000 ^ 0000000000005555 = 0000000080005555 (cc=1) -+xilf 000000007FFFFFFF ^ 0000000000005555 = 000000007FFFAAAA (cc=1) -+xilf AAAAAAAAAAAAAAAA ^ 0000000000005555 = AAAAAAAAAAAAFFFF (cc=1) -+xilf 8000000000000000 ^ 0000000000005555 = 8000000000005555 (cc=1) -+xilf FFFFFFFFFFFFFFFF ^ 0000000000005555 = FFFFFFFFFFFFAAAA (cc=1) -+xilf 5555555555555555 ^ 0000000000005555 = 5555555555550000 (cc=1) -+xilf 0000000000000000 ^ 000000000000AAAA = 000000000000AAAA (cc=1) -+xilf 0000000000000001 ^ 000000000000AAAA = 000000000000AAAB (cc=1) -+xilf 000000000000FFFF ^ 000000000000AAAA = 0000000000005555 (cc=1) -+xilf 0000000000007FFF ^ 000000000000AAAA = 000000000000D555 (cc=1) -+xilf 0000000000008000 ^ 000000000000AAAA = 0000000000002AAA (cc=1) -+xilf 00000000FFFFFFFF ^ 000000000000AAAA = 00000000FFFF5555 (cc=1) -+xilf 0000000080000000 ^ 000000000000AAAA = 000000008000AAAA (cc=1) -+xilf 000000007FFFFFFF ^ 000000000000AAAA = 000000007FFF5555 (cc=1) -+xilf AAAAAAAAAAAAAAAA ^ 000000000000AAAA = AAAAAAAAAAAA0000 (cc=1) -+xilf 8000000000000000 ^ 000000000000AAAA = 800000000000AAAA (cc=1) -+xilf FFFFFFFFFFFFFFFF ^ 000000000000AAAA = FFFFFFFFFFFF5555 (cc=1) -+xilf 5555555555555555 ^ 000000000000AAAA = 555555555555FFFF (cc=1) -+xilf 0000000000000000 ^ 00000000FFFF0000 = 00000000FFFF0000 (cc=1) -+xilf 0000000000000001 ^ 00000000FFFF0000 = 00000000FFFF0001 (cc=1) -+xilf 000000000000FFFF ^ 00000000FFFF0000 = 00000000FFFFFFFF (cc=1) -+xilf 0000000000007FFF ^ 00000000FFFF0000 = 00000000FFFF7FFF (cc=1) -+xilf 0000000000008000 ^ 00000000FFFF0000 = 00000000FFFF8000 (cc=1) -+xilf 00000000FFFFFFFF ^ 00000000FFFF0000 = 000000000000FFFF (cc=1) -+xilf 0000000080000000 ^ 00000000FFFF0000 = 000000007FFF0000 (cc=1) -+xilf 000000007FFFFFFF ^ 00000000FFFF0000 = 000000008000FFFF (cc=1) -+xilf AAAAAAAAAAAAAAAA ^ 00000000FFFF0000 = AAAAAAAA5555AAAA (cc=1) -+xilf 8000000000000000 ^ 00000000FFFF0000 = 80000000FFFF0000 (cc=1) -+xilf FFFFFFFFFFFFFFFF ^ 00000000FFFF0000 = FFFFFFFF0000FFFF (cc=1) -+xilf 5555555555555555 ^ 00000000FFFF0000 = 55555555AAAA5555 (cc=1) -+xilf 0000000000000000 ^ 0000000055550000 = 0000000055550000 (cc=1) -+xilf 0000000000000001 ^ 0000000055550000 = 0000000055550001 (cc=1) -+xilf 000000000000FFFF ^ 0000000055550000 = 000000005555FFFF (cc=1) -+xilf 0000000000007FFF ^ 0000000055550000 = 0000000055557FFF (cc=1) -+xilf 0000000000008000 ^ 0000000055550000 = 0000000055558000 (cc=1) -+xilf 00000000FFFFFFFF ^ 0000000055550000 = 00000000AAAAFFFF (cc=1) -+xilf 0000000080000000 ^ 0000000055550000 = 00000000D5550000 (cc=1) -+xilf 000000007FFFFFFF ^ 0000000055550000 = 000000002AAAFFFF (cc=1) -+xilf AAAAAAAAAAAAAAAA ^ 0000000055550000 = AAAAAAAAFFFFAAAA (cc=1) -+xilf 8000000000000000 ^ 0000000055550000 = 8000000055550000 (cc=1) -+xilf FFFFFFFFFFFFFFFF ^ 0000000055550000 = FFFFFFFFAAAAFFFF (cc=1) -+xilf 5555555555555555 ^ 0000000055550000 = 5555555500005555 (cc=1) -+xilf 0000000000000000 ^ 00000000AAAA0000 = 00000000AAAA0000 (cc=1) -+xilf 0000000000000001 ^ 00000000AAAA0000 = 00000000AAAA0001 (cc=1) -+xilf 000000000000FFFF ^ 00000000AAAA0000 = 00000000AAAAFFFF (cc=1) -+xilf 0000000000007FFF ^ 00000000AAAA0000 = 00000000AAAA7FFF (cc=1) -+xilf 0000000000008000 ^ 00000000AAAA0000 = 00000000AAAA8000 (cc=1) -+xilf 00000000FFFFFFFF ^ 00000000AAAA0000 = 000000005555FFFF (cc=1) -+xilf 0000000080000000 ^ 00000000AAAA0000 = 000000002AAA0000 (cc=1) -+xilf 000000007FFFFFFF ^ 00000000AAAA0000 = 00000000D555FFFF (cc=1) -+xilf AAAAAAAAAAAAAAAA ^ 00000000AAAA0000 = AAAAAAAA0000AAAA (cc=1) -+xilf 8000000000000000 ^ 00000000AAAA0000 = 80000000AAAA0000 (cc=1) -+xilf FFFFFFFFFFFFFFFF ^ 00000000AAAA0000 = FFFFFFFF5555FFFF (cc=1) -+xilf 5555555555555555 ^ 00000000AAAA0000 = 55555555FFFF5555 (cc=1) -+xilf 0000000000000000 ^ 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+xilf 0000000000000001 ^ 00000000FFFFFFFF = 00000000FFFFFFFE (cc=1) -+xilf 000000000000FFFF ^ 00000000FFFFFFFF = 00000000FFFF0000 (cc=1) -+xilf 0000000000007FFF ^ 00000000FFFFFFFF = 00000000FFFF8000 (cc=1) -+xilf 0000000000008000 ^ 00000000FFFFFFFF = 00000000FFFF7FFF (cc=1) -+xilf 00000000FFFFFFFF ^ 00000000FFFFFFFF = 0000000000000000 (cc=0) -+xilf 0000000080000000 ^ 00000000FFFFFFFF = 000000007FFFFFFF (cc=1) -+xilf 000000007FFFFFFF ^ 00000000FFFFFFFF = 0000000080000000 (cc=1) -+xilf AAAAAAAAAAAAAAAA ^ 00000000FFFFFFFF = AAAAAAAA55555555 (cc=1) -+xilf 8000000000000000 ^ 00000000FFFFFFFF = 80000000FFFFFFFF (cc=1) -+xilf FFFFFFFFFFFFFFFF ^ 00000000FFFFFFFF = FFFFFFFF00000000 (cc=0) -+xilf 5555555555555555 ^ 00000000FFFFFFFF = 55555555AAAAAAAA (cc=1) -+xilf 0000000000000000 ^ 0000000055555555 = 0000000055555555 (cc=1) -+xilf 0000000000000001 ^ 0000000055555555 = 0000000055555554 (cc=1) -+xilf 000000000000FFFF ^ 0000000055555555 = 000000005555AAAA (cc=1) -+xilf 0000000000007FFF ^ 0000000055555555 = 0000000055552AAA (cc=1) -+xilf 0000000000008000 ^ 0000000055555555 = 000000005555D555 (cc=1) -+xilf 00000000FFFFFFFF ^ 0000000055555555 = 00000000AAAAAAAA (cc=1) -+xilf 0000000080000000 ^ 0000000055555555 = 00000000D5555555 (cc=1) -+xilf 000000007FFFFFFF ^ 0000000055555555 = 000000002AAAAAAA (cc=1) -+xilf AAAAAAAAAAAAAAAA ^ 0000000055555555 = AAAAAAAAFFFFFFFF (cc=1) -+xilf 8000000000000000 ^ 0000000055555555 = 8000000055555555 (cc=1) -+xilf FFFFFFFFFFFFFFFF ^ 0000000055555555 = FFFFFFFFAAAAAAAA (cc=1) -+xilf 5555555555555555 ^ 0000000055555555 = 5555555500000000 (cc=0) -+xilf 0000000000000000 ^ 00000000AAAAAAAA = 00000000AAAAAAAA (cc=1) -+xilf 0000000000000001 ^ 00000000AAAAAAAA = 00000000AAAAAAAB (cc=1) -+xilf 000000000000FFFF ^ 00000000AAAAAAAA = 00000000AAAA5555 (cc=1) -+xilf 0000000000007FFF ^ 00000000AAAAAAAA = 00000000AAAAD555 (cc=1) -+xilf 0000000000008000 ^ 00000000AAAAAAAA = 00000000AAAA2AAA (cc=1) -+xilf 00000000FFFFFFFF ^ 00000000AAAAAAAA = 0000000055555555 (cc=1) -+xilf 0000000080000000 ^ 00000000AAAAAAAA = 000000002AAAAAAA (cc=1) -+xilf 000000007FFFFFFF ^ 00000000AAAAAAAA = 00000000D5555555 (cc=1) -+xilf AAAAAAAAAAAAAAAA ^ 00000000AAAAAAAA = AAAAAAAA00000000 (cc=0) -+xilf 8000000000000000 ^ 00000000AAAAAAAA = 80000000AAAAAAAA (cc=1) -+xilf FFFFFFFFFFFFFFFF ^ 00000000AAAAAAAA = FFFFFFFF55555555 (cc=1) -+xilf 5555555555555555 ^ 00000000AAAAAAAA = 55555555FFFFFFFF (cc=1) ---- none/tests/s390x/xor_EI.vgtest -+++ none/tests/s390x/xor_EI.vgtest -@@ -0,0 +1,2 @@ -+prog: xor_EI -+prereq: test -x xor_EI ---- none/tests/s390x/xor.h -+++ none/tests/s390x/xor.h -@@ -0,0 +1,120 @@ -+#include -+ -+#define XOR_REG_MEM(insn, s1, s2) \ -+({ \ -+ unsigned long tmp = s1; \ -+ int cc; \ -+ asm volatile( #insn " %0, %3\n" \ -+ "ipm %1\n" \ -+ "srl %1,28\n" \ -+ : "+d" (tmp), "=d" (cc) \ -+ : "d" (tmp), "Q" (s2) \ -+ : "0", "cc"); \ -+ printf(#insn " %16.16lX ^ %16.16lX = %16.16lX (cc=%d)\n", s1, s2, tmp, cc); \ -+}) -+ -+#define XOR_REG_REG(insn, s1, s2) \ -+({ \ -+ unsigned long tmp = s1; \ -+ int cc; \ -+ asm volatile( #insn " %0, %3\n" \ -+ "ipm %1\n" \ -+ "srl %1,28\n" \ -+ : "+d" (tmp), "=d" (cc) \ -+ : "d" (tmp), "d" (s2) \ -+ : "0", "cc"); \ -+ printf(#insn " %16.16lX ^ %16.16lX = %16.16lX (cc=%d)\n", s1, s2, tmp, cc); \ -+}) -+ -+#define XOR_REG_IMM(insn, s1, s2) \ -+({ \ -+ unsigned long tmp = s1; \ -+ int cc; \ -+ asm volatile( #insn " %0," #s2 "\n" \ -+ "ipm %1\n" \ -+ "srl %1,28\n" \ -+ : "+d" (tmp), "=d" (cc) \ -+ : "d" (tmp) \ -+ : "0", "cc"); \ -+ printf(#insn " %16.16lX ^ %16.16lX = %16.16lX (cc=%d)\n", s1, (unsigned long) s2, tmp, cc); \ -+}) -+ -+#define XOR_MEM_IMM(insn, s1, s2) \ -+({ \ -+ unsigned long tmp = s1; \ -+ int cc; \ -+ asm volatile( #insn " %0," #s2 "\n" \ -+ "ipm %1\n" \ -+ "srl %1,28\n" \ -+ : "+Q" (tmp), "=d" (cc) \ -+ : "Q" (tmp) \ -+ : "0", "cc"); \ -+ printf(#insn " %16.16lX ^ %16.16lX = %16.16lX (cc=%d)\n", s1, (unsigned long) s2, tmp, cc); \ -+}) -+ -+ -+#define memsweep(i, s2) \ -+({ \ -+ XOR_REG_MEM(i, 0ul, s2); \ -+ XOR_REG_MEM(i, 1ul, s2); \ -+ XOR_REG_MEM(i, 0xfffful, s2); \ -+ XOR_REG_MEM(i, 0x7ffful, s2); \ -+ XOR_REG_MEM(i, 0x8000ul, s2); \ -+ XOR_REG_MEM(i, 0xfffffffful, s2); \ -+ XOR_REG_MEM(i, 0x80000000ul, s2); \ -+ XOR_REG_MEM(i, 0x7ffffffful, s2); \ -+ XOR_REG_MEM(i, 0xaaaaaaaaaaaaaaaaul, s2); \ -+ XOR_REG_MEM(i, 0x8000000000000000ul, s2); \ -+ XOR_REG_MEM(i, 0xfffffffffffffffful, s2); \ -+ XOR_REG_MEM(i, 0x5555555555555555ul, s2); \ -+}) -+ -+#define regsweep(i, s2) \ -+({ \ -+ XOR_REG_REG(i, 0ul, s2); \ -+ XOR_REG_REG(i, 1ul, s2); \ -+ XOR_REG_REG(i, 0xfffful, s2); \ -+ XOR_REG_REG(i, 0x7ffful, s2); \ -+ XOR_REG_REG(i, 0x8000ul, s2); \ -+ XOR_REG_REG(i, 0xfffffffful, s2); \ -+ XOR_REG_REG(i, 0x80000000ul, s2); \ -+ XOR_REG_REG(i, 0x7ffffffful, s2); \ -+ XOR_REG_REG(i, 0xaaaaaaaaaaaaaaaaul, s2); \ -+ XOR_REG_REG(i, 0x8000000000000000ul, s2); \ -+ XOR_REG_REG(i, 0xfffffffffffffffful, s2); \ -+ XOR_REG_REG(i, 0x5555555555555555ul, s2); \ -+}) -+ -+#define immsweep(i, s2) \ -+({ \ -+ XOR_REG_IMM(i, 0ul, s2); \ -+ XOR_REG_IMM(i, 1ul, s2); \ -+ XOR_REG_IMM(i, 0xfffful, s2); \ -+ XOR_REG_IMM(i, 0x7ffful, s2); \ -+ XOR_REG_IMM(i, 0x8000ul, s2); \ -+ XOR_REG_IMM(i, 0xfffffffful, s2); \ -+ XOR_REG_IMM(i, 0x80000000ul, s2); \ -+ XOR_REG_IMM(i, 0x7ffffffful, s2); \ -+ XOR_REG_IMM(i, 0xaaaaaaaaaaaaaaaaul, s2); \ -+ XOR_REG_IMM(i, 0x8000000000000000ul, s2); \ -+ XOR_REG_IMM(i, 0xfffffffffffffffful, s2); \ -+ XOR_REG_IMM(i, 0x5555555555555555ul, s2); \ -+}) -+ -+#define memimmsweep(i, s2) \ -+({ \ -+ XOR_MEM_IMM(i, 0ul, s2); \ -+ XOR_MEM_IMM(i, 1ul, s2); \ -+ XOR_MEM_IMM(i, 0xfffful, s2); \ -+ XOR_MEM_IMM(i, 0x7ffful, s2); \ -+ XOR_MEM_IMM(i, 0x8000ul, s2); \ -+ XOR_MEM_IMM(i, 0xfffffffful, s2); \ -+ XOR_MEM_IMM(i, 0x80000000ul, s2); \ -+ XOR_MEM_IMM(i, 0x7ffffffful, s2); \ -+ XOR_MEM_IMM(i, 0xaaaaaaaaaaaaaaaaul, s2); \ -+ XOR_MEM_IMM(i, 0x8000000000000000ul, s2); \ -+ XOR_MEM_IMM(i, 0xfffffffffffffffful, s2); \ -+ XOR_MEM_IMM(i, 0x5555555555555555ul, s2); \ -+}) -+ -+ ---- none/tests/s390x/xor.stderr.exp -+++ none/tests/s390x/xor.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ ---- none/tests/s390x/xor.stdout.exp -+++ none/tests/s390x/xor.stdout.exp -@@ -0,0 +1,1140 @@ -+x 0000000000000000 ^ 0000000000000000 = 0000000000000000 (cc=0) -+x 0000000000000001 ^ 0000000000000000 = 0000000000000001 (cc=1) -+x 000000000000FFFF ^ 0000000000000000 = 000000000000FFFF (cc=1) -+x 0000000000007FFF ^ 0000000000000000 = 0000000000007FFF (cc=1) -+x 0000000000008000 ^ 0000000000000000 = 0000000000008000 (cc=1) -+x 00000000FFFFFFFF ^ 0000000000000000 = 00000000FFFFFFFF (cc=1) -+x 0000000080000000 ^ 0000000000000000 = 0000000080000000 (cc=1) -+x 000000007FFFFFFF ^ 0000000000000000 = 000000007FFFFFFF (cc=1) -+x AAAAAAAAAAAAAAAA ^ 0000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+x 8000000000000000 ^ 0000000000000000 = 8000000000000000 (cc=0) -+x FFFFFFFFFFFFFFFF ^ 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+x 5555555555555555 ^ 0000000000000000 = 5555555555555555 (cc=1) -+xg 0000000000000000 ^ 0000000000000000 = 0000000000000000 (cc=0) -+xg 0000000000000001 ^ 0000000000000000 = 0000000000000001 (cc=1) -+xg 000000000000FFFF ^ 0000000000000000 = 000000000000FFFF (cc=1) -+xg 0000000000007FFF ^ 0000000000000000 = 0000000000007FFF (cc=1) -+xg 0000000000008000 ^ 0000000000000000 = 0000000000008000 (cc=1) -+xg 00000000FFFFFFFF ^ 0000000000000000 = 00000000FFFFFFFF (cc=1) -+xg 0000000080000000 ^ 0000000000000000 = 0000000080000000 (cc=1) -+xg 000000007FFFFFFF ^ 0000000000000000 = 000000007FFFFFFF (cc=1) -+xg AAAAAAAAAAAAAAAA ^ 0000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+xg 8000000000000000 ^ 0000000000000000 = 8000000000000000 (cc=1) -+xg FFFFFFFFFFFFFFFF ^ 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+xg 5555555555555555 ^ 0000000000000000 = 5555555555555555 (cc=1) -+xr 0000000000000000 ^ 0000000000000000 = 0000000000000000 (cc=0) -+xr 0000000000000001 ^ 0000000000000000 = 0000000000000001 (cc=1) -+xr 000000000000FFFF ^ 0000000000000000 = 000000000000FFFF (cc=1) -+xr 0000000000007FFF ^ 0000000000000000 = 0000000000007FFF (cc=1) -+xr 0000000000008000 ^ 0000000000000000 = 0000000000008000 (cc=1) -+xr 00000000FFFFFFFF ^ 0000000000000000 = 00000000FFFFFFFF (cc=1) -+xr 0000000080000000 ^ 0000000000000000 = 0000000080000000 (cc=1) -+xr 000000007FFFFFFF ^ 0000000000000000 = 000000007FFFFFFF (cc=1) -+xr AAAAAAAAAAAAAAAA ^ 0000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+xr 8000000000000000 ^ 0000000000000000 = 8000000000000000 (cc=0) -+xr FFFFFFFFFFFFFFFF ^ 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+xr 5555555555555555 ^ 0000000000000000 = 5555555555555555 (cc=1) -+xgr 0000000000000000 ^ 0000000000000000 = 0000000000000000 (cc=0) -+xgr 0000000000000001 ^ 0000000000000000 = 0000000000000001 (cc=1) -+xgr 000000000000FFFF ^ 0000000000000000 = 000000000000FFFF (cc=1) -+xgr 0000000000007FFF ^ 0000000000000000 = 0000000000007FFF (cc=1) -+xgr 0000000000008000 ^ 0000000000000000 = 0000000000008000 (cc=1) -+xgr 00000000FFFFFFFF ^ 0000000000000000 = 00000000FFFFFFFF (cc=1) -+xgr 0000000080000000 ^ 0000000000000000 = 0000000080000000 (cc=1) -+xgr 000000007FFFFFFF ^ 0000000000000000 = 000000007FFFFFFF (cc=1) -+xgr AAAAAAAAAAAAAAAA ^ 0000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+xgr 8000000000000000 ^ 0000000000000000 = 8000000000000000 (cc=1) -+xgr FFFFFFFFFFFFFFFF ^ 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+xgr 5555555555555555 ^ 0000000000000000 = 5555555555555555 (cc=1) -+xy 0000000000000000 ^ 0000000000000000 = 0000000000000000 (cc=0) -+xy 0000000000000001 ^ 0000000000000000 = 0000000000000001 (cc=1) -+xy 000000000000FFFF ^ 0000000000000000 = 000000000000FFFF (cc=1) -+xy 0000000000007FFF ^ 0000000000000000 = 0000000000007FFF (cc=1) -+xy 0000000000008000 ^ 0000000000000000 = 0000000000008000 (cc=1) -+xy 00000000FFFFFFFF ^ 0000000000000000 = 00000000FFFFFFFF (cc=1) -+xy 0000000080000000 ^ 0000000000000000 = 0000000080000000 (cc=1) -+xy 000000007FFFFFFF ^ 0000000000000000 = 000000007FFFFFFF (cc=1) -+xy AAAAAAAAAAAAAAAA ^ 0000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+xy 8000000000000000 ^ 0000000000000000 = 8000000000000000 (cc=0) -+xy FFFFFFFFFFFFFFFF ^ 0000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+xy 5555555555555555 ^ 0000000000000000 = 5555555555555555 (cc=1) -+x 0000000000000000 ^ 5555555555555555 = 0000000055555555 (cc=1) -+x 0000000000000001 ^ 5555555555555555 = 0000000055555554 (cc=1) -+x 000000000000FFFF ^ 5555555555555555 = 000000005555AAAA (cc=1) -+x 0000000000007FFF ^ 5555555555555555 = 0000000055552AAA (cc=1) -+x 0000000000008000 ^ 5555555555555555 = 000000005555D555 (cc=1) -+x 00000000FFFFFFFF ^ 5555555555555555 = 00000000AAAAAAAA (cc=1) -+x 0000000080000000 ^ 5555555555555555 = 00000000D5555555 (cc=1) -+x 000000007FFFFFFF ^ 5555555555555555 = 000000002AAAAAAA (cc=1) -+x AAAAAAAAAAAAAAAA ^ 5555555555555555 = AAAAAAAAFFFFFFFF (cc=1) -+x 8000000000000000 ^ 5555555555555555 = 8000000055555555 (cc=1) -+x FFFFFFFFFFFFFFFF ^ 5555555555555555 = FFFFFFFFAAAAAAAA (cc=1) -+x 5555555555555555 ^ 5555555555555555 = 5555555500000000 (cc=0) -+xg 0000000000000000 ^ 5555555555555555 = 5555555555555555 (cc=1) -+xg 0000000000000001 ^ 5555555555555555 = 5555555555555554 (cc=1) -+xg 000000000000FFFF ^ 5555555555555555 = 555555555555AAAA (cc=1) -+xg 0000000000007FFF ^ 5555555555555555 = 5555555555552AAA (cc=1) -+xg 0000000000008000 ^ 5555555555555555 = 555555555555D555 (cc=1) -+xg 00000000FFFFFFFF ^ 5555555555555555 = 55555555AAAAAAAA (cc=1) -+xg 0000000080000000 ^ 5555555555555555 = 55555555D5555555 (cc=1) -+xg 000000007FFFFFFF ^ 5555555555555555 = 555555552AAAAAAA (cc=1) -+xg AAAAAAAAAAAAAAAA ^ 5555555555555555 = FFFFFFFFFFFFFFFF (cc=1) -+xg 8000000000000000 ^ 5555555555555555 = D555555555555555 (cc=1) -+xg FFFFFFFFFFFFFFFF ^ 5555555555555555 = AAAAAAAAAAAAAAAA (cc=1) -+xg 5555555555555555 ^ 5555555555555555 = 0000000000000000 (cc=0) -+xr 0000000000000000 ^ 5555555555555555 = 0000000055555555 (cc=1) -+xr 0000000000000001 ^ 5555555555555555 = 0000000055555554 (cc=1) -+xr 000000000000FFFF ^ 5555555555555555 = 000000005555AAAA (cc=1) -+xr 0000000000007FFF ^ 5555555555555555 = 0000000055552AAA (cc=1) -+xr 0000000000008000 ^ 5555555555555555 = 000000005555D555 (cc=1) -+xr 00000000FFFFFFFF ^ 5555555555555555 = 00000000AAAAAAAA (cc=1) -+xr 0000000080000000 ^ 5555555555555555 = 00000000D5555555 (cc=1) -+xr 000000007FFFFFFF ^ 5555555555555555 = 000000002AAAAAAA (cc=1) -+xr AAAAAAAAAAAAAAAA ^ 5555555555555555 = AAAAAAAAFFFFFFFF (cc=1) -+xr 8000000000000000 ^ 5555555555555555 = 8000000055555555 (cc=1) -+xr FFFFFFFFFFFFFFFF ^ 5555555555555555 = FFFFFFFFAAAAAAAA (cc=1) -+xr 5555555555555555 ^ 5555555555555555 = 5555555500000000 (cc=0) -+xgr 0000000000000000 ^ 5555555555555555 = 5555555555555555 (cc=1) -+xgr 0000000000000001 ^ 5555555555555555 = 5555555555555554 (cc=1) -+xgr 000000000000FFFF ^ 5555555555555555 = 555555555555AAAA (cc=1) -+xgr 0000000000007FFF ^ 5555555555555555 = 5555555555552AAA (cc=1) -+xgr 0000000000008000 ^ 5555555555555555 = 555555555555D555 (cc=1) -+xgr 00000000FFFFFFFF ^ 5555555555555555 = 55555555AAAAAAAA (cc=1) -+xgr 0000000080000000 ^ 5555555555555555 = 55555555D5555555 (cc=1) -+xgr 000000007FFFFFFF ^ 5555555555555555 = 555555552AAAAAAA (cc=1) -+xgr AAAAAAAAAAAAAAAA ^ 5555555555555555 = FFFFFFFFFFFFFFFF (cc=1) -+xgr 8000000000000000 ^ 5555555555555555 = D555555555555555 (cc=1) -+xgr FFFFFFFFFFFFFFFF ^ 5555555555555555 = AAAAAAAAAAAAAAAA (cc=1) -+xgr 5555555555555555 ^ 5555555555555555 = 0000000000000000 (cc=0) -+xy 0000000000000000 ^ 5555555555555555 = 0000000055555555 (cc=1) -+xy 0000000000000001 ^ 5555555555555555 = 0000000055555554 (cc=1) -+xy 000000000000FFFF ^ 5555555555555555 = 000000005555AAAA (cc=1) -+xy 0000000000007FFF ^ 5555555555555555 = 0000000055552AAA (cc=1) -+xy 0000000000008000 ^ 5555555555555555 = 000000005555D555 (cc=1) -+xy 00000000FFFFFFFF ^ 5555555555555555 = 00000000AAAAAAAA (cc=1) -+xy 0000000080000000 ^ 5555555555555555 = 00000000D5555555 (cc=1) -+xy 000000007FFFFFFF ^ 5555555555555555 = 000000002AAAAAAA (cc=1) -+xy AAAAAAAAAAAAAAAA ^ 5555555555555555 = AAAAAAAAFFFFFFFF (cc=1) -+xy 8000000000000000 ^ 5555555555555555 = 8000000055555555 (cc=1) -+xy FFFFFFFFFFFFFFFF ^ 5555555555555555 = FFFFFFFFAAAAAAAA (cc=1) -+xy 5555555555555555 ^ 5555555555555555 = 5555555500000000 (cc=0) -+x 0000000000000000 ^ AAAAAAAAAAAAAAAA = 00000000AAAAAAAA (cc=1) -+x 0000000000000001 ^ AAAAAAAAAAAAAAAA = 00000000AAAAAAAB (cc=1) -+x 000000000000FFFF ^ AAAAAAAAAAAAAAAA = 00000000AAAA5555 (cc=1) -+x 0000000000007FFF ^ AAAAAAAAAAAAAAAA = 00000000AAAAD555 (cc=1) -+x 0000000000008000 ^ AAAAAAAAAAAAAAAA = 00000000AAAA2AAA (cc=1) -+x 00000000FFFFFFFF ^ AAAAAAAAAAAAAAAA = 0000000055555555 (cc=1) -+x 0000000080000000 ^ AAAAAAAAAAAAAAAA = 000000002AAAAAAA (cc=1) -+x 000000007FFFFFFF ^ AAAAAAAAAAAAAAAA = 00000000D5555555 (cc=1) -+x AAAAAAAAAAAAAAAA ^ AAAAAAAAAAAAAAAA = AAAAAAAA00000000 (cc=0) -+x 8000000000000000 ^ AAAAAAAAAAAAAAAA = 80000000AAAAAAAA (cc=1) -+x FFFFFFFFFFFFFFFF ^ AAAAAAAAAAAAAAAA = FFFFFFFF55555555 (cc=1) -+x 5555555555555555 ^ AAAAAAAAAAAAAAAA = 55555555FFFFFFFF (cc=1) -+xg 0000000000000000 ^ AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAA (cc=1) -+xg 0000000000000001 ^ AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAB (cc=1) -+xg 000000000000FFFF ^ AAAAAAAAAAAAAAAA = AAAAAAAAAAAA5555 (cc=1) -+xg 0000000000007FFF ^ AAAAAAAAAAAAAAAA = AAAAAAAAAAAAD555 (cc=1) -+xg 0000000000008000 ^ AAAAAAAAAAAAAAAA = AAAAAAAAAAAA2AAA (cc=1) -+xg 00000000FFFFFFFF ^ AAAAAAAAAAAAAAAA = AAAAAAAA55555555 (cc=1) -+xg 0000000080000000 ^ AAAAAAAAAAAAAAAA = AAAAAAAA2AAAAAAA (cc=1) -+xg 000000007FFFFFFF ^ AAAAAAAAAAAAAAAA = AAAAAAAAD5555555 (cc=1) -+xg AAAAAAAAAAAAAAAA ^ AAAAAAAAAAAAAAAA = 0000000000000000 (cc=0) -+xg 8000000000000000 ^ AAAAAAAAAAAAAAAA = 2AAAAAAAAAAAAAAA (cc=1) -+xg FFFFFFFFFFFFFFFF ^ AAAAAAAAAAAAAAAA = 5555555555555555 (cc=1) -+xg 5555555555555555 ^ AAAAAAAAAAAAAAAA = FFFFFFFFFFFFFFFF (cc=1) -+xr 0000000000000000 ^ AAAAAAAAAAAAAAAA = 00000000AAAAAAAA (cc=1) -+xr 0000000000000001 ^ AAAAAAAAAAAAAAAA = 00000000AAAAAAAB (cc=1) -+xr 000000000000FFFF ^ AAAAAAAAAAAAAAAA = 00000000AAAA5555 (cc=1) -+xr 0000000000007FFF ^ AAAAAAAAAAAAAAAA = 00000000AAAAD555 (cc=1) -+xr 0000000000008000 ^ AAAAAAAAAAAAAAAA = 00000000AAAA2AAA (cc=1) -+xr 00000000FFFFFFFF ^ AAAAAAAAAAAAAAAA = 0000000055555555 (cc=1) -+xr 0000000080000000 ^ AAAAAAAAAAAAAAAA = 000000002AAAAAAA (cc=1) -+xr 000000007FFFFFFF ^ AAAAAAAAAAAAAAAA = 00000000D5555555 (cc=1) -+xr AAAAAAAAAAAAAAAA ^ AAAAAAAAAAAAAAAA = AAAAAAAA00000000 (cc=0) -+xr 8000000000000000 ^ AAAAAAAAAAAAAAAA = 80000000AAAAAAAA (cc=1) -+xr FFFFFFFFFFFFFFFF ^ AAAAAAAAAAAAAAAA = FFFFFFFF55555555 (cc=1) -+xr 5555555555555555 ^ AAAAAAAAAAAAAAAA = 55555555FFFFFFFF (cc=1) -+xgr 0000000000000000 ^ AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAA (cc=1) -+xgr 0000000000000001 ^ AAAAAAAAAAAAAAAA = AAAAAAAAAAAAAAAB (cc=1) -+xgr 000000000000FFFF ^ AAAAAAAAAAAAAAAA = AAAAAAAAAAAA5555 (cc=1) -+xgr 0000000000007FFF ^ AAAAAAAAAAAAAAAA = AAAAAAAAAAAAD555 (cc=1) -+xgr 0000000000008000 ^ AAAAAAAAAAAAAAAA = AAAAAAAAAAAA2AAA (cc=1) -+xgr 00000000FFFFFFFF ^ AAAAAAAAAAAAAAAA = AAAAAAAA55555555 (cc=1) -+xgr 0000000080000000 ^ AAAAAAAAAAAAAAAA = AAAAAAAA2AAAAAAA (cc=1) -+xgr 000000007FFFFFFF ^ AAAAAAAAAAAAAAAA = AAAAAAAAD5555555 (cc=1) -+xgr AAAAAAAAAAAAAAAA ^ AAAAAAAAAAAAAAAA = 0000000000000000 (cc=0) -+xgr 8000000000000000 ^ AAAAAAAAAAAAAAAA = 2AAAAAAAAAAAAAAA (cc=1) -+xgr FFFFFFFFFFFFFFFF ^ AAAAAAAAAAAAAAAA = 5555555555555555 (cc=1) -+xgr 5555555555555555 ^ AAAAAAAAAAAAAAAA = FFFFFFFFFFFFFFFF (cc=1) -+xy 0000000000000000 ^ AAAAAAAAAAAAAAAA = 00000000AAAAAAAA (cc=1) -+xy 0000000000000001 ^ AAAAAAAAAAAAAAAA = 00000000AAAAAAAB (cc=1) -+xy 000000000000FFFF ^ AAAAAAAAAAAAAAAA = 00000000AAAA5555 (cc=1) -+xy 0000000000007FFF ^ AAAAAAAAAAAAAAAA = 00000000AAAAD555 (cc=1) -+xy 0000000000008000 ^ AAAAAAAAAAAAAAAA = 00000000AAAA2AAA (cc=1) -+xy 00000000FFFFFFFF ^ AAAAAAAAAAAAAAAA = 0000000055555555 (cc=1) -+xy 0000000080000000 ^ AAAAAAAAAAAAAAAA = 000000002AAAAAAA (cc=1) -+xy 000000007FFFFFFF ^ AAAAAAAAAAAAAAAA = 00000000D5555555 (cc=1) -+xy AAAAAAAAAAAAAAAA ^ AAAAAAAAAAAAAAAA = AAAAAAAA00000000 (cc=0) -+xy 8000000000000000 ^ AAAAAAAAAAAAAAAA = 80000000AAAAAAAA (cc=1) -+xy FFFFFFFFFFFFFFFF ^ AAAAAAAAAAAAAAAA = FFFFFFFF55555555 (cc=1) -+xy 5555555555555555 ^ AAAAAAAAAAAAAAAA = 55555555FFFFFFFF (cc=1) -+x 0000000000000000 ^ 8000000000000000 = 0000000080000000 (cc=1) -+x 0000000000000001 ^ 8000000000000000 = 0000000080000001 (cc=1) -+x 000000000000FFFF ^ 8000000000000000 = 000000008000FFFF (cc=1) -+x 0000000000007FFF ^ 8000000000000000 = 0000000080007FFF (cc=1) -+x 0000000000008000 ^ 8000000000000000 = 0000000080008000 (cc=1) -+x 00000000FFFFFFFF ^ 8000000000000000 = 000000007FFFFFFF (cc=1) -+x 0000000080000000 ^ 8000000000000000 = 0000000000000000 (cc=0) -+x 000000007FFFFFFF ^ 8000000000000000 = 00000000FFFFFFFF (cc=1) -+x AAAAAAAAAAAAAAAA ^ 8000000000000000 = AAAAAAAA2AAAAAAA (cc=1) -+x 8000000000000000 ^ 8000000000000000 = 8000000080000000 (cc=1) -+x FFFFFFFFFFFFFFFF ^ 8000000000000000 = FFFFFFFF7FFFFFFF (cc=1) -+x 5555555555555555 ^ 8000000000000000 = 55555555D5555555 (cc=1) -+xg 0000000000000000 ^ 8000000000000000 = 8000000000000000 (cc=1) -+xg 0000000000000001 ^ 8000000000000000 = 8000000000000001 (cc=1) -+xg 000000000000FFFF ^ 8000000000000000 = 800000000000FFFF (cc=1) -+xg 0000000000007FFF ^ 8000000000000000 = 8000000000007FFF (cc=1) -+xg 0000000000008000 ^ 8000000000000000 = 8000000000008000 (cc=1) -+xg 00000000FFFFFFFF ^ 8000000000000000 = 80000000FFFFFFFF (cc=1) -+xg 0000000080000000 ^ 8000000000000000 = 8000000080000000 (cc=1) -+xg 000000007FFFFFFF ^ 8000000000000000 = 800000007FFFFFFF (cc=1) -+xg AAAAAAAAAAAAAAAA ^ 8000000000000000 = 2AAAAAAAAAAAAAAA (cc=1) -+xg 8000000000000000 ^ 8000000000000000 = 0000000000000000 (cc=0) -+xg FFFFFFFFFFFFFFFF ^ 8000000000000000 = 7FFFFFFFFFFFFFFF (cc=1) -+xg 5555555555555555 ^ 8000000000000000 = D555555555555555 (cc=1) -+xr 0000000000000000 ^ 8000000000000000 = 0000000000000000 (cc=0) -+xr 0000000000000001 ^ 8000000000000000 = 0000000000000001 (cc=1) -+xr 000000000000FFFF ^ 8000000000000000 = 000000000000FFFF (cc=1) -+xr 0000000000007FFF ^ 8000000000000000 = 0000000000007FFF (cc=1) -+xr 0000000000008000 ^ 8000000000000000 = 0000000000008000 (cc=1) -+xr 00000000FFFFFFFF ^ 8000000000000000 = 00000000FFFFFFFF (cc=1) -+xr 0000000080000000 ^ 8000000000000000 = 0000000080000000 (cc=1) -+xr 000000007FFFFFFF ^ 8000000000000000 = 000000007FFFFFFF (cc=1) -+xr AAAAAAAAAAAAAAAA ^ 8000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+xr 8000000000000000 ^ 8000000000000000 = 8000000000000000 (cc=0) -+xr FFFFFFFFFFFFFFFF ^ 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+xr 5555555555555555 ^ 8000000000000000 = 5555555555555555 (cc=1) -+xgr 0000000000000000 ^ 8000000000000000 = 8000000000000000 (cc=1) -+xgr 0000000000000001 ^ 8000000000000000 = 8000000000000001 (cc=1) -+xgr 000000000000FFFF ^ 8000000000000000 = 800000000000FFFF (cc=1) -+xgr 0000000000007FFF ^ 8000000000000000 = 8000000000007FFF (cc=1) -+xgr 0000000000008000 ^ 8000000000000000 = 8000000000008000 (cc=1) -+xgr 00000000FFFFFFFF ^ 8000000000000000 = 80000000FFFFFFFF (cc=1) -+xgr 0000000080000000 ^ 8000000000000000 = 8000000080000000 (cc=1) -+xgr 000000007FFFFFFF ^ 8000000000000000 = 800000007FFFFFFF (cc=1) -+xgr AAAAAAAAAAAAAAAA ^ 8000000000000000 = 2AAAAAAAAAAAAAAA (cc=1) -+xgr 8000000000000000 ^ 8000000000000000 = 0000000000000000 (cc=0) -+xgr FFFFFFFFFFFFFFFF ^ 8000000000000000 = 7FFFFFFFFFFFFFFF (cc=1) -+xgr 5555555555555555 ^ 8000000000000000 = D555555555555555 (cc=1) -+xy 0000000000000000 ^ 8000000000000000 = 0000000080000000 (cc=1) -+xy 0000000000000001 ^ 8000000000000000 = 0000000080000001 (cc=1) -+xy 000000000000FFFF ^ 8000000000000000 = 000000008000FFFF (cc=1) -+xy 0000000000007FFF ^ 8000000000000000 = 0000000080007FFF (cc=1) -+xy 0000000000008000 ^ 8000000000000000 = 0000000080008000 (cc=1) -+xy 00000000FFFFFFFF ^ 8000000000000000 = 000000007FFFFFFF (cc=1) -+xy 0000000080000000 ^ 8000000000000000 = 0000000000000000 (cc=0) -+xy 000000007FFFFFFF ^ 8000000000000000 = 00000000FFFFFFFF (cc=1) -+xy AAAAAAAAAAAAAAAA ^ 8000000000000000 = AAAAAAAA2AAAAAAA (cc=1) -+xy 8000000000000000 ^ 8000000000000000 = 8000000080000000 (cc=1) -+xy FFFFFFFFFFFFFFFF ^ 8000000000000000 = FFFFFFFF7FFFFFFF (cc=1) -+xy 5555555555555555 ^ 8000000000000000 = 55555555D5555555 (cc=1) -+x 0000000000000000 ^ FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+x 0000000000000001 ^ FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=1) -+x 000000000000FFFF ^ FFFFFFFFFFFFFFFF = 00000000FFFF0000 (cc=1) -+x 0000000000007FFF ^ FFFFFFFFFFFFFFFF = 00000000FFFF8000 (cc=1) -+x 0000000000008000 ^ FFFFFFFFFFFFFFFF = 00000000FFFF7FFF (cc=1) -+x 00000000FFFFFFFF ^ FFFFFFFFFFFFFFFF = 0000000000000000 (cc=0) -+x 0000000080000000 ^ FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=1) -+x 000000007FFFFFFF ^ FFFFFFFFFFFFFFFF = 0000000080000000 (cc=1) -+x AAAAAAAAAAAAAAAA ^ FFFFFFFFFFFFFFFF = AAAAAAAA55555555 (cc=1) -+x 8000000000000000 ^ FFFFFFFFFFFFFFFF = 80000000FFFFFFFF (cc=1) -+x FFFFFFFFFFFFFFFF ^ FFFFFFFFFFFFFFFF = FFFFFFFF00000000 (cc=0) -+x 5555555555555555 ^ FFFFFFFFFFFFFFFF = 55555555AAAAAAAA (cc=1) -+xg 0000000000000000 ^ FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+xg 0000000000000001 ^ FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=1) -+xg 000000000000FFFF ^ FFFFFFFFFFFFFFFF = FFFFFFFFFFFF0000 (cc=1) -+xg 0000000000007FFF ^ FFFFFFFFFFFFFFFF = FFFFFFFFFFFF8000 (cc=1) -+xg 0000000000008000 ^ FFFFFFFFFFFFFFFF = FFFFFFFFFFFF7FFF (cc=1) -+xg 00000000FFFFFFFF ^ FFFFFFFFFFFFFFFF = FFFFFFFF00000000 (cc=1) -+xg 0000000080000000 ^ FFFFFFFFFFFFFFFF = FFFFFFFF7FFFFFFF (cc=1) -+xg 000000007FFFFFFF ^ FFFFFFFFFFFFFFFF = FFFFFFFF80000000 (cc=1) -+xg AAAAAAAAAAAAAAAA ^ FFFFFFFFFFFFFFFF = 5555555555555555 (cc=1) -+xg 8000000000000000 ^ FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF (cc=1) -+xg FFFFFFFFFFFFFFFF ^ FFFFFFFFFFFFFFFF = 0000000000000000 (cc=0) -+xg 5555555555555555 ^ FFFFFFFFFFFFFFFF = AAAAAAAAAAAAAAAA (cc=1) -+xr 0000000000000000 ^ FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+xr 0000000000000001 ^ FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=1) -+xr 000000000000FFFF ^ FFFFFFFFFFFFFFFF = 00000000FFFF0000 (cc=1) -+xr 0000000000007FFF ^ FFFFFFFFFFFFFFFF = 00000000FFFF8000 (cc=1) -+xr 0000000000008000 ^ FFFFFFFFFFFFFFFF = 00000000FFFF7FFF (cc=1) -+xr 00000000FFFFFFFF ^ FFFFFFFFFFFFFFFF = 0000000000000000 (cc=0) -+xr 0000000080000000 ^ FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=1) -+xr 000000007FFFFFFF ^ FFFFFFFFFFFFFFFF = 0000000080000000 (cc=1) -+xr AAAAAAAAAAAAAAAA ^ FFFFFFFFFFFFFFFF = AAAAAAAA55555555 (cc=1) -+xr 8000000000000000 ^ FFFFFFFFFFFFFFFF = 80000000FFFFFFFF (cc=1) -+xr FFFFFFFFFFFFFFFF ^ FFFFFFFFFFFFFFFF = FFFFFFFF00000000 (cc=0) -+xr 5555555555555555 ^ FFFFFFFFFFFFFFFF = 55555555AAAAAAAA (cc=1) -+xgr 0000000000000000 ^ FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+xgr 0000000000000001 ^ FFFFFFFFFFFFFFFF = FFFFFFFFFFFFFFFE (cc=1) -+xgr 000000000000FFFF ^ FFFFFFFFFFFFFFFF = FFFFFFFFFFFF0000 (cc=1) -+xgr 0000000000007FFF ^ FFFFFFFFFFFFFFFF = FFFFFFFFFFFF8000 (cc=1) -+xgr 0000000000008000 ^ FFFFFFFFFFFFFFFF = FFFFFFFFFFFF7FFF (cc=1) -+xgr 00000000FFFFFFFF ^ FFFFFFFFFFFFFFFF = FFFFFFFF00000000 (cc=1) -+xgr 0000000080000000 ^ FFFFFFFFFFFFFFFF = FFFFFFFF7FFFFFFF (cc=1) -+xgr 000000007FFFFFFF ^ FFFFFFFFFFFFFFFF = FFFFFFFF80000000 (cc=1) -+xgr AAAAAAAAAAAAAAAA ^ FFFFFFFFFFFFFFFF = 5555555555555555 (cc=1) -+xgr 8000000000000000 ^ FFFFFFFFFFFFFFFF = 7FFFFFFFFFFFFFFF (cc=1) -+xgr FFFFFFFFFFFFFFFF ^ FFFFFFFFFFFFFFFF = 0000000000000000 (cc=0) -+xgr 5555555555555555 ^ FFFFFFFFFFFFFFFF = AAAAAAAAAAAAAAAA (cc=1) -+xy 0000000000000000 ^ FFFFFFFFFFFFFFFF = 00000000FFFFFFFF (cc=1) -+xy 0000000000000001 ^ FFFFFFFFFFFFFFFF = 00000000FFFFFFFE (cc=1) -+xy 000000000000FFFF ^ FFFFFFFFFFFFFFFF = 00000000FFFF0000 (cc=1) -+xy 0000000000007FFF ^ FFFFFFFFFFFFFFFF = 00000000FFFF8000 (cc=1) -+xy 0000000000008000 ^ FFFFFFFFFFFFFFFF = 00000000FFFF7FFF (cc=1) -+xy 00000000FFFFFFFF ^ FFFFFFFFFFFFFFFF = 0000000000000000 (cc=0) -+xy 0000000080000000 ^ FFFFFFFFFFFFFFFF = 000000007FFFFFFF (cc=1) -+xy 000000007FFFFFFF ^ FFFFFFFFFFFFFFFF = 0000000080000000 (cc=1) -+xy AAAAAAAAAAAAAAAA ^ FFFFFFFFFFFFFFFF = AAAAAAAA55555555 (cc=1) -+xy 8000000000000000 ^ FFFFFFFFFFFFFFFF = 80000000FFFFFFFF (cc=1) -+xy FFFFFFFFFFFFFFFF ^ FFFFFFFFFFFFFFFF = FFFFFFFF00000000 (cc=0) -+xy 5555555555555555 ^ FFFFFFFFFFFFFFFF = 55555555AAAAAAAA (cc=1) -+x 0000000000000000 ^ 7FFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+x 0000000000000001 ^ 7FFFFFFF00000000 = 000000007FFFFFFE (cc=1) -+x 000000000000FFFF ^ 7FFFFFFF00000000 = 000000007FFF0000 (cc=1) -+x 0000000000007FFF ^ 7FFFFFFF00000000 = 000000007FFF8000 (cc=1) -+x 0000000000008000 ^ 7FFFFFFF00000000 = 000000007FFF7FFF (cc=1) -+x 00000000FFFFFFFF ^ 7FFFFFFF00000000 = 0000000080000000 (cc=1) -+x 0000000080000000 ^ 7FFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+x 000000007FFFFFFF ^ 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+x AAAAAAAAAAAAAAAA ^ 7FFFFFFF00000000 = AAAAAAAAD5555555 (cc=1) -+x 8000000000000000 ^ 7FFFFFFF00000000 = 800000007FFFFFFF (cc=1) -+x FFFFFFFFFFFFFFFF ^ 7FFFFFFF00000000 = FFFFFFFF80000000 (cc=1) -+x 5555555555555555 ^ 7FFFFFFF00000000 = 555555552AAAAAAA (cc=1) -+xg 0000000000000000 ^ 7FFFFFFF00000000 = 7FFFFFFF00000000 (cc=1) -+xg 0000000000000001 ^ 7FFFFFFF00000000 = 7FFFFFFF00000001 (cc=1) -+xg 000000000000FFFF ^ 7FFFFFFF00000000 = 7FFFFFFF0000FFFF (cc=1) -+xg 0000000000007FFF ^ 7FFFFFFF00000000 = 7FFFFFFF00007FFF (cc=1) -+xg 0000000000008000 ^ 7FFFFFFF00000000 = 7FFFFFFF00008000 (cc=1) -+xg 00000000FFFFFFFF ^ 7FFFFFFF00000000 = 7FFFFFFFFFFFFFFF (cc=1) -+xg 0000000080000000 ^ 7FFFFFFF00000000 = 7FFFFFFF80000000 (cc=1) -+xg 000000007FFFFFFF ^ 7FFFFFFF00000000 = 7FFFFFFF7FFFFFFF (cc=1) -+xg AAAAAAAAAAAAAAAA ^ 7FFFFFFF00000000 = D5555555AAAAAAAA (cc=1) -+xg 8000000000000000 ^ 7FFFFFFF00000000 = FFFFFFFF00000000 (cc=1) -+xg FFFFFFFFFFFFFFFF ^ 7FFFFFFF00000000 = 80000000FFFFFFFF (cc=1) -+xg 5555555555555555 ^ 7FFFFFFF00000000 = 2AAAAAAA55555555 (cc=1) -+xr 0000000000000000 ^ 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+xr 0000000000000001 ^ 7FFFFFFF00000000 = 0000000000000001 (cc=1) -+xr 000000000000FFFF ^ 7FFFFFFF00000000 = 000000000000FFFF (cc=1) -+xr 0000000000007FFF ^ 7FFFFFFF00000000 = 0000000000007FFF (cc=1) -+xr 0000000000008000 ^ 7FFFFFFF00000000 = 0000000000008000 (cc=1) -+xr 00000000FFFFFFFF ^ 7FFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+xr 0000000080000000 ^ 7FFFFFFF00000000 = 0000000080000000 (cc=1) -+xr 000000007FFFFFFF ^ 7FFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+xr AAAAAAAAAAAAAAAA ^ 7FFFFFFF00000000 = AAAAAAAAAAAAAAAA (cc=1) -+xr 8000000000000000 ^ 7FFFFFFF00000000 = 8000000000000000 (cc=0) -+xr FFFFFFFFFFFFFFFF ^ 7FFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+xr 5555555555555555 ^ 7FFFFFFF00000000 = 5555555555555555 (cc=1) -+xgr 0000000000000000 ^ 7FFFFFFF00000000 = 7FFFFFFF00000000 (cc=1) -+xgr 0000000000000001 ^ 7FFFFFFF00000000 = 7FFFFFFF00000001 (cc=1) -+xgr 000000000000FFFF ^ 7FFFFFFF00000000 = 7FFFFFFF0000FFFF (cc=1) -+xgr 0000000000007FFF ^ 7FFFFFFF00000000 = 7FFFFFFF00007FFF (cc=1) -+xgr 0000000000008000 ^ 7FFFFFFF00000000 = 7FFFFFFF00008000 (cc=1) -+xgr 00000000FFFFFFFF ^ 7FFFFFFF00000000 = 7FFFFFFFFFFFFFFF (cc=1) -+xgr 0000000080000000 ^ 7FFFFFFF00000000 = 7FFFFFFF80000000 (cc=1) -+xgr 000000007FFFFFFF ^ 7FFFFFFF00000000 = 7FFFFFFF7FFFFFFF (cc=1) -+xgr AAAAAAAAAAAAAAAA ^ 7FFFFFFF00000000 = D5555555AAAAAAAA (cc=1) -+xgr 8000000000000000 ^ 7FFFFFFF00000000 = FFFFFFFF00000000 (cc=1) -+xgr FFFFFFFFFFFFFFFF ^ 7FFFFFFF00000000 = 80000000FFFFFFFF (cc=1) -+xgr 5555555555555555 ^ 7FFFFFFF00000000 = 2AAAAAAA55555555 (cc=1) -+xy 0000000000000000 ^ 7FFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+xy 0000000000000001 ^ 7FFFFFFF00000000 = 000000007FFFFFFE (cc=1) -+xy 000000000000FFFF ^ 7FFFFFFF00000000 = 000000007FFF0000 (cc=1) -+xy 0000000000007FFF ^ 7FFFFFFF00000000 = 000000007FFF8000 (cc=1) -+xy 0000000000008000 ^ 7FFFFFFF00000000 = 000000007FFF7FFF (cc=1) -+xy 00000000FFFFFFFF ^ 7FFFFFFF00000000 = 0000000080000000 (cc=1) -+xy 0000000080000000 ^ 7FFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+xy 000000007FFFFFFF ^ 7FFFFFFF00000000 = 0000000000000000 (cc=0) -+xy AAAAAAAAAAAAAAAA ^ 7FFFFFFF00000000 = AAAAAAAAD5555555 (cc=1) -+xy 8000000000000000 ^ 7FFFFFFF00000000 = 800000007FFFFFFF (cc=1) -+xy FFFFFFFFFFFFFFFF ^ 7FFFFFFF00000000 = FFFFFFFF80000000 (cc=1) -+xy 5555555555555555 ^ 7FFFFFFF00000000 = 555555552AAAAAAA (cc=1) -+x 0000000000000000 ^ 8000000000000000 = 0000000080000000 (cc=1) -+x 0000000000000001 ^ 8000000000000000 = 0000000080000001 (cc=1) -+x 000000000000FFFF ^ 8000000000000000 = 000000008000FFFF (cc=1) -+x 0000000000007FFF ^ 8000000000000000 = 0000000080007FFF (cc=1) -+x 0000000000008000 ^ 8000000000000000 = 0000000080008000 (cc=1) -+x 00000000FFFFFFFF ^ 8000000000000000 = 000000007FFFFFFF (cc=1) -+x 0000000080000000 ^ 8000000000000000 = 0000000000000000 (cc=0) -+x 000000007FFFFFFF ^ 8000000000000000 = 00000000FFFFFFFF (cc=1) -+x AAAAAAAAAAAAAAAA ^ 8000000000000000 = AAAAAAAA2AAAAAAA (cc=1) -+x 8000000000000000 ^ 8000000000000000 = 8000000080000000 (cc=1) -+x FFFFFFFFFFFFFFFF ^ 8000000000000000 = FFFFFFFF7FFFFFFF (cc=1) -+x 5555555555555555 ^ 8000000000000000 = 55555555D5555555 (cc=1) -+xg 0000000000000000 ^ 8000000000000000 = 8000000000000000 (cc=1) -+xg 0000000000000001 ^ 8000000000000000 = 8000000000000001 (cc=1) -+xg 000000000000FFFF ^ 8000000000000000 = 800000000000FFFF (cc=1) -+xg 0000000000007FFF ^ 8000000000000000 = 8000000000007FFF (cc=1) -+xg 0000000000008000 ^ 8000000000000000 = 8000000000008000 (cc=1) -+xg 00000000FFFFFFFF ^ 8000000000000000 = 80000000FFFFFFFF (cc=1) -+xg 0000000080000000 ^ 8000000000000000 = 8000000080000000 (cc=1) -+xg 000000007FFFFFFF ^ 8000000000000000 = 800000007FFFFFFF (cc=1) -+xg AAAAAAAAAAAAAAAA ^ 8000000000000000 = 2AAAAAAAAAAAAAAA (cc=1) -+xg 8000000000000000 ^ 8000000000000000 = 0000000000000000 (cc=0) -+xg FFFFFFFFFFFFFFFF ^ 8000000000000000 = 7FFFFFFFFFFFFFFF (cc=1) -+xg 5555555555555555 ^ 8000000000000000 = D555555555555555 (cc=1) -+xr 0000000000000000 ^ 8000000000000000 = 0000000000000000 (cc=0) -+xr 0000000000000001 ^ 8000000000000000 = 0000000000000001 (cc=1) -+xr 000000000000FFFF ^ 8000000000000000 = 000000000000FFFF (cc=1) -+xr 0000000000007FFF ^ 8000000000000000 = 0000000000007FFF (cc=1) -+xr 0000000000008000 ^ 8000000000000000 = 0000000000008000 (cc=1) -+xr 00000000FFFFFFFF ^ 8000000000000000 = 00000000FFFFFFFF (cc=1) -+xr 0000000080000000 ^ 8000000000000000 = 0000000080000000 (cc=1) -+xr 000000007FFFFFFF ^ 8000000000000000 = 000000007FFFFFFF (cc=1) -+xr AAAAAAAAAAAAAAAA ^ 8000000000000000 = AAAAAAAAAAAAAAAA (cc=1) -+xr 8000000000000000 ^ 8000000000000000 = 8000000000000000 (cc=0) -+xr FFFFFFFFFFFFFFFF ^ 8000000000000000 = FFFFFFFFFFFFFFFF (cc=1) -+xr 5555555555555555 ^ 8000000000000000 = 5555555555555555 (cc=1) -+xgr 0000000000000000 ^ 8000000000000000 = 8000000000000000 (cc=1) -+xgr 0000000000000001 ^ 8000000000000000 = 8000000000000001 (cc=1) -+xgr 000000000000FFFF ^ 8000000000000000 = 800000000000FFFF (cc=1) -+xgr 0000000000007FFF ^ 8000000000000000 = 8000000000007FFF (cc=1) -+xgr 0000000000008000 ^ 8000000000000000 = 8000000000008000 (cc=1) -+xgr 00000000FFFFFFFF ^ 8000000000000000 = 80000000FFFFFFFF (cc=1) -+xgr 0000000080000000 ^ 8000000000000000 = 8000000080000000 (cc=1) -+xgr 000000007FFFFFFF ^ 8000000000000000 = 800000007FFFFFFF (cc=1) -+xgr AAAAAAAAAAAAAAAA ^ 8000000000000000 = 2AAAAAAAAAAAAAAA (cc=1) -+xgr 8000000000000000 ^ 8000000000000000 = 0000000000000000 (cc=0) -+xgr FFFFFFFFFFFFFFFF ^ 8000000000000000 = 7FFFFFFFFFFFFFFF (cc=1) -+xgr 5555555555555555 ^ 8000000000000000 = D555555555555555 (cc=1) -+xy 0000000000000000 ^ 8000000000000000 = 0000000080000000 (cc=1) -+xy 0000000000000001 ^ 8000000000000000 = 0000000080000001 (cc=1) -+xy 000000000000FFFF ^ 8000000000000000 = 000000008000FFFF (cc=1) -+xy 0000000000007FFF ^ 8000000000000000 = 0000000080007FFF (cc=1) -+xy 0000000000008000 ^ 8000000000000000 = 0000000080008000 (cc=1) -+xy 00000000FFFFFFFF ^ 8000000000000000 = 000000007FFFFFFF (cc=1) -+xy 0000000080000000 ^ 8000000000000000 = 0000000000000000 (cc=0) -+xy 000000007FFFFFFF ^ 8000000000000000 = 00000000FFFFFFFF (cc=1) -+xy AAAAAAAAAAAAAAAA ^ 8000000000000000 = AAAAAAAA2AAAAAAA (cc=1) -+xy 8000000000000000 ^ 8000000000000000 = 8000000080000000 (cc=1) -+xy FFFFFFFFFFFFFFFF ^ 8000000000000000 = FFFFFFFF7FFFFFFF (cc=1) -+xy 5555555555555555 ^ 8000000000000000 = 55555555D5555555 (cc=1) -+x 0000000000000000 ^ AAAAAAAA00000000 = 00000000AAAAAAAA (cc=1) -+x 0000000000000001 ^ AAAAAAAA00000000 = 00000000AAAAAAAB (cc=1) -+x 000000000000FFFF ^ AAAAAAAA00000000 = 00000000AAAA5555 (cc=1) -+x 0000000000007FFF ^ AAAAAAAA00000000 = 00000000AAAAD555 (cc=1) -+x 0000000000008000 ^ AAAAAAAA00000000 = 00000000AAAA2AAA (cc=1) -+x 00000000FFFFFFFF ^ AAAAAAAA00000000 = 0000000055555555 (cc=1) -+x 0000000080000000 ^ AAAAAAAA00000000 = 000000002AAAAAAA (cc=1) -+x 000000007FFFFFFF ^ AAAAAAAA00000000 = 00000000D5555555 (cc=1) -+x AAAAAAAAAAAAAAAA ^ AAAAAAAA00000000 = AAAAAAAA00000000 (cc=0) -+x 8000000000000000 ^ AAAAAAAA00000000 = 80000000AAAAAAAA (cc=1) -+x FFFFFFFFFFFFFFFF ^ AAAAAAAA00000000 = FFFFFFFF55555555 (cc=1) -+x 5555555555555555 ^ AAAAAAAA00000000 = 55555555FFFFFFFF (cc=1) -+xg 0000000000000000 ^ AAAAAAAA00000000 = AAAAAAAA00000000 (cc=1) -+xg 0000000000000001 ^ AAAAAAAA00000000 = AAAAAAAA00000001 (cc=1) -+xg 000000000000FFFF ^ AAAAAAAA00000000 = AAAAAAAA0000FFFF (cc=1) -+xg 0000000000007FFF ^ AAAAAAAA00000000 = AAAAAAAA00007FFF (cc=1) -+xg 0000000000008000 ^ AAAAAAAA00000000 = AAAAAAAA00008000 (cc=1) -+xg 00000000FFFFFFFF ^ AAAAAAAA00000000 = AAAAAAAAFFFFFFFF (cc=1) -+xg 0000000080000000 ^ AAAAAAAA00000000 = AAAAAAAA80000000 (cc=1) -+xg 000000007FFFFFFF ^ AAAAAAAA00000000 = AAAAAAAA7FFFFFFF (cc=1) -+xg AAAAAAAAAAAAAAAA ^ AAAAAAAA00000000 = 00000000AAAAAAAA (cc=1) -+xg 8000000000000000 ^ AAAAAAAA00000000 = 2AAAAAAA00000000 (cc=1) -+xg FFFFFFFFFFFFFFFF ^ AAAAAAAA00000000 = 55555555FFFFFFFF (cc=1) -+xg 5555555555555555 ^ AAAAAAAA00000000 = FFFFFFFF55555555 (cc=1) -+xr 0000000000000000 ^ AAAAAAAA00000000 = 0000000000000000 (cc=0) -+xr 0000000000000001 ^ AAAAAAAA00000000 = 0000000000000001 (cc=1) -+xr 000000000000FFFF ^ AAAAAAAA00000000 = 000000000000FFFF (cc=1) -+xr 0000000000007FFF ^ AAAAAAAA00000000 = 0000000000007FFF (cc=1) -+xr 0000000000008000 ^ AAAAAAAA00000000 = 0000000000008000 (cc=1) -+xr 00000000FFFFFFFF ^ AAAAAAAA00000000 = 00000000FFFFFFFF (cc=1) -+xr 0000000080000000 ^ AAAAAAAA00000000 = 0000000080000000 (cc=1) -+xr 000000007FFFFFFF ^ AAAAAAAA00000000 = 000000007FFFFFFF (cc=1) -+xr AAAAAAAAAAAAAAAA ^ AAAAAAAA00000000 = AAAAAAAAAAAAAAAA (cc=1) -+xr 8000000000000000 ^ AAAAAAAA00000000 = 8000000000000000 (cc=0) -+xr FFFFFFFFFFFFFFFF ^ AAAAAAAA00000000 = FFFFFFFFFFFFFFFF (cc=1) -+xr 5555555555555555 ^ AAAAAAAA00000000 = 5555555555555555 (cc=1) -+xgr 0000000000000000 ^ AAAAAAAA00000000 = AAAAAAAA00000000 (cc=1) -+xgr 0000000000000001 ^ AAAAAAAA00000000 = AAAAAAAA00000001 (cc=1) -+xgr 000000000000FFFF ^ AAAAAAAA00000000 = AAAAAAAA0000FFFF (cc=1) -+xgr 0000000000007FFF ^ AAAAAAAA00000000 = AAAAAAAA00007FFF (cc=1) -+xgr 0000000000008000 ^ AAAAAAAA00000000 = AAAAAAAA00008000 (cc=1) -+xgr 00000000FFFFFFFF ^ AAAAAAAA00000000 = AAAAAAAAFFFFFFFF (cc=1) -+xgr 0000000080000000 ^ AAAAAAAA00000000 = AAAAAAAA80000000 (cc=1) -+xgr 000000007FFFFFFF ^ AAAAAAAA00000000 = AAAAAAAA7FFFFFFF (cc=1) -+xgr AAAAAAAAAAAAAAAA ^ AAAAAAAA00000000 = 00000000AAAAAAAA (cc=1) -+xgr 8000000000000000 ^ AAAAAAAA00000000 = 2AAAAAAA00000000 (cc=1) -+xgr FFFFFFFFFFFFFFFF ^ AAAAAAAA00000000 = 55555555FFFFFFFF (cc=1) -+xgr 5555555555555555 ^ AAAAAAAA00000000 = FFFFFFFF55555555 (cc=1) -+xy 0000000000000000 ^ AAAAAAAA00000000 = 00000000AAAAAAAA (cc=1) -+xy 0000000000000001 ^ AAAAAAAA00000000 = 00000000AAAAAAAB (cc=1) -+xy 000000000000FFFF ^ AAAAAAAA00000000 = 00000000AAAA5555 (cc=1) -+xy 0000000000007FFF ^ AAAAAAAA00000000 = 00000000AAAAD555 (cc=1) -+xy 0000000000008000 ^ AAAAAAAA00000000 = 00000000AAAA2AAA (cc=1) -+xy 00000000FFFFFFFF ^ AAAAAAAA00000000 = 0000000055555555 (cc=1) -+xy 0000000080000000 ^ AAAAAAAA00000000 = 000000002AAAAAAA (cc=1) -+xy 000000007FFFFFFF ^ AAAAAAAA00000000 = 00000000D5555555 (cc=1) -+xy AAAAAAAAAAAAAAAA ^ AAAAAAAA00000000 = AAAAAAAA00000000 (cc=0) -+xy 8000000000000000 ^ AAAAAAAA00000000 = 80000000AAAAAAAA (cc=1) -+xy FFFFFFFFFFFFFFFF ^ AAAAAAAA00000000 = FFFFFFFF55555555 (cc=1) -+xy 5555555555555555 ^ AAAAAAAA00000000 = 55555555FFFFFFFF (cc=1) -+x 0000000000000000 ^ FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+x 0000000000000001 ^ FFFFFFFF00000000 = 00000000FFFFFFFE (cc=1) -+x 000000000000FFFF ^ FFFFFFFF00000000 = 00000000FFFF0000 (cc=1) -+x 0000000000007FFF ^ FFFFFFFF00000000 = 00000000FFFF8000 (cc=1) -+x 0000000000008000 ^ FFFFFFFF00000000 = 00000000FFFF7FFF (cc=1) -+x 00000000FFFFFFFF ^ FFFFFFFF00000000 = 0000000000000000 (cc=0) -+x 0000000080000000 ^ FFFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+x 000000007FFFFFFF ^ FFFFFFFF00000000 = 0000000080000000 (cc=1) -+x AAAAAAAAAAAAAAAA ^ FFFFFFFF00000000 = AAAAAAAA55555555 (cc=1) -+x 8000000000000000 ^ FFFFFFFF00000000 = 80000000FFFFFFFF (cc=1) -+x FFFFFFFFFFFFFFFF ^ FFFFFFFF00000000 = FFFFFFFF00000000 (cc=0) -+x 5555555555555555 ^ FFFFFFFF00000000 = 55555555AAAAAAAA (cc=1) -+xg 0000000000000000 ^ FFFFFFFF00000000 = FFFFFFFF00000000 (cc=1) -+xg 0000000000000001 ^ FFFFFFFF00000000 = FFFFFFFF00000001 (cc=1) -+xg 000000000000FFFF ^ FFFFFFFF00000000 = FFFFFFFF0000FFFF (cc=1) -+xg 0000000000007FFF ^ FFFFFFFF00000000 = FFFFFFFF00007FFF (cc=1) -+xg 0000000000008000 ^ FFFFFFFF00000000 = FFFFFFFF00008000 (cc=1) -+xg 00000000FFFFFFFF ^ FFFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+xg 0000000080000000 ^ FFFFFFFF00000000 = FFFFFFFF80000000 (cc=1) -+xg 000000007FFFFFFF ^ FFFFFFFF00000000 = FFFFFFFF7FFFFFFF (cc=1) -+xg AAAAAAAAAAAAAAAA ^ FFFFFFFF00000000 = 55555555AAAAAAAA (cc=1) -+xg 8000000000000000 ^ FFFFFFFF00000000 = 7FFFFFFF00000000 (cc=1) -+xg FFFFFFFFFFFFFFFF ^ FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+xg 5555555555555555 ^ FFFFFFFF00000000 = AAAAAAAA55555555 (cc=1) -+xr 0000000000000000 ^ FFFFFFFF00000000 = 0000000000000000 (cc=0) -+xr 0000000000000001 ^ FFFFFFFF00000000 = 0000000000000001 (cc=1) -+xr 000000000000FFFF ^ FFFFFFFF00000000 = 000000000000FFFF (cc=1) -+xr 0000000000007FFF ^ FFFFFFFF00000000 = 0000000000007FFF (cc=1) -+xr 0000000000008000 ^ FFFFFFFF00000000 = 0000000000008000 (cc=1) -+xr 00000000FFFFFFFF ^ FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+xr 0000000080000000 ^ FFFFFFFF00000000 = 0000000080000000 (cc=1) -+xr 000000007FFFFFFF ^ FFFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+xr AAAAAAAAAAAAAAAA ^ FFFFFFFF00000000 = AAAAAAAAAAAAAAAA (cc=1) -+xr 8000000000000000 ^ FFFFFFFF00000000 = 8000000000000000 (cc=0) -+xr FFFFFFFFFFFFFFFF ^ FFFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+xr 5555555555555555 ^ FFFFFFFF00000000 = 5555555555555555 (cc=1) -+xgr 0000000000000000 ^ FFFFFFFF00000000 = FFFFFFFF00000000 (cc=1) -+xgr 0000000000000001 ^ FFFFFFFF00000000 = FFFFFFFF00000001 (cc=1) -+xgr 000000000000FFFF ^ FFFFFFFF00000000 = FFFFFFFF0000FFFF (cc=1) -+xgr 0000000000007FFF ^ FFFFFFFF00000000 = FFFFFFFF00007FFF (cc=1) -+xgr 0000000000008000 ^ FFFFFFFF00000000 = FFFFFFFF00008000 (cc=1) -+xgr 00000000FFFFFFFF ^ FFFFFFFF00000000 = FFFFFFFFFFFFFFFF (cc=1) -+xgr 0000000080000000 ^ FFFFFFFF00000000 = FFFFFFFF80000000 (cc=1) -+xgr 000000007FFFFFFF ^ FFFFFFFF00000000 = FFFFFFFF7FFFFFFF (cc=1) -+xgr AAAAAAAAAAAAAAAA ^ FFFFFFFF00000000 = 55555555AAAAAAAA (cc=1) -+xgr 8000000000000000 ^ FFFFFFFF00000000 = 7FFFFFFF00000000 (cc=1) -+xgr FFFFFFFFFFFFFFFF ^ FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+xgr 5555555555555555 ^ FFFFFFFF00000000 = AAAAAAAA55555555 (cc=1) -+xy 0000000000000000 ^ FFFFFFFF00000000 = 00000000FFFFFFFF (cc=1) -+xy 0000000000000001 ^ FFFFFFFF00000000 = 00000000FFFFFFFE (cc=1) -+xy 000000000000FFFF ^ FFFFFFFF00000000 = 00000000FFFF0000 (cc=1) -+xy 0000000000007FFF ^ FFFFFFFF00000000 = 00000000FFFF8000 (cc=1) -+xy 0000000000008000 ^ FFFFFFFF00000000 = 00000000FFFF7FFF (cc=1) -+xy 00000000FFFFFFFF ^ FFFFFFFF00000000 = 0000000000000000 (cc=0) -+xy 0000000080000000 ^ FFFFFFFF00000000 = 000000007FFFFFFF (cc=1) -+xy 000000007FFFFFFF ^ FFFFFFFF00000000 = 0000000080000000 (cc=1) -+xy AAAAAAAAAAAAAAAA ^ FFFFFFFF00000000 = AAAAAAAA55555555 (cc=1) -+xy 8000000000000000 ^ FFFFFFFF00000000 = 80000000FFFFFFFF (cc=1) -+xy FFFFFFFFFFFFFFFF ^ FFFFFFFF00000000 = FFFFFFFF00000000 (cc=0) -+xy 5555555555555555 ^ FFFFFFFF00000000 = 55555555AAAAAAAA (cc=1) -+x 0000000000000000 ^ 000000007FFFFFFF = 0000000000000000 (cc=0) -+x 0000000000000001 ^ 000000007FFFFFFF = 0000000000000001 (cc=1) -+x 000000000000FFFF ^ 000000007FFFFFFF = 000000000000FFFF (cc=1) -+x 0000000000007FFF ^ 000000007FFFFFFF = 0000000000007FFF (cc=1) -+x 0000000000008000 ^ 000000007FFFFFFF = 0000000000008000 (cc=1) -+x 00000000FFFFFFFF ^ 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+x 0000000080000000 ^ 000000007FFFFFFF = 0000000080000000 (cc=1) -+x 000000007FFFFFFF ^ 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+x AAAAAAAAAAAAAAAA ^ 000000007FFFFFFF = AAAAAAAAAAAAAAAA (cc=1) -+x 8000000000000000 ^ 000000007FFFFFFF = 8000000000000000 (cc=0) -+x FFFFFFFFFFFFFFFF ^ 000000007FFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+x 5555555555555555 ^ 000000007FFFFFFF = 5555555555555555 (cc=1) -+xg 0000000000000000 ^ 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+xg 0000000000000001 ^ 000000007FFFFFFF = 000000007FFFFFFE (cc=1) -+xg 000000000000FFFF ^ 000000007FFFFFFF = 000000007FFF0000 (cc=1) -+xg 0000000000007FFF ^ 000000007FFFFFFF = 000000007FFF8000 (cc=1) -+xg 0000000000008000 ^ 000000007FFFFFFF = 000000007FFF7FFF (cc=1) -+xg 00000000FFFFFFFF ^ 000000007FFFFFFF = 0000000080000000 (cc=1) -+xg 0000000080000000 ^ 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+xg 000000007FFFFFFF ^ 000000007FFFFFFF = 0000000000000000 (cc=0) -+xg AAAAAAAAAAAAAAAA ^ 000000007FFFFFFF = AAAAAAAAD5555555 (cc=1) -+xg 8000000000000000 ^ 000000007FFFFFFF = 800000007FFFFFFF (cc=1) -+xg FFFFFFFFFFFFFFFF ^ 000000007FFFFFFF = FFFFFFFF80000000 (cc=1) -+xg 5555555555555555 ^ 000000007FFFFFFF = 555555552AAAAAAA (cc=1) -+xr 0000000000000000 ^ 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+xr 0000000000000001 ^ 000000007FFFFFFF = 000000007FFFFFFE (cc=1) -+xr 000000000000FFFF ^ 000000007FFFFFFF = 000000007FFF0000 (cc=1) -+xr 0000000000007FFF ^ 000000007FFFFFFF = 000000007FFF8000 (cc=1) -+xr 0000000000008000 ^ 000000007FFFFFFF = 000000007FFF7FFF (cc=1) -+xr 00000000FFFFFFFF ^ 000000007FFFFFFF = 0000000080000000 (cc=1) -+xr 0000000080000000 ^ 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+xr 000000007FFFFFFF ^ 000000007FFFFFFF = 0000000000000000 (cc=0) -+xr AAAAAAAAAAAAAAAA ^ 000000007FFFFFFF = AAAAAAAAD5555555 (cc=1) -+xr 8000000000000000 ^ 000000007FFFFFFF = 800000007FFFFFFF (cc=1) -+xr FFFFFFFFFFFFFFFF ^ 000000007FFFFFFF = FFFFFFFF80000000 (cc=1) -+xr 5555555555555555 ^ 000000007FFFFFFF = 555555552AAAAAAA (cc=1) -+xgr 0000000000000000 ^ 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+xgr 0000000000000001 ^ 000000007FFFFFFF = 000000007FFFFFFE (cc=1) -+xgr 000000000000FFFF ^ 000000007FFFFFFF = 000000007FFF0000 (cc=1) -+xgr 0000000000007FFF ^ 000000007FFFFFFF = 000000007FFF8000 (cc=1) -+xgr 0000000000008000 ^ 000000007FFFFFFF = 000000007FFF7FFF (cc=1) -+xgr 00000000FFFFFFFF ^ 000000007FFFFFFF = 0000000080000000 (cc=1) -+xgr 0000000080000000 ^ 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+xgr 000000007FFFFFFF ^ 000000007FFFFFFF = 0000000000000000 (cc=0) -+xgr AAAAAAAAAAAAAAAA ^ 000000007FFFFFFF = AAAAAAAAD5555555 (cc=1) -+xgr 8000000000000000 ^ 000000007FFFFFFF = 800000007FFFFFFF (cc=1) -+xgr FFFFFFFFFFFFFFFF ^ 000000007FFFFFFF = FFFFFFFF80000000 (cc=1) -+xgr 5555555555555555 ^ 000000007FFFFFFF = 555555552AAAAAAA (cc=1) -+xy 0000000000000000 ^ 000000007FFFFFFF = 0000000000000000 (cc=0) -+xy 0000000000000001 ^ 000000007FFFFFFF = 0000000000000001 (cc=1) -+xy 000000000000FFFF ^ 000000007FFFFFFF = 000000000000FFFF (cc=1) -+xy 0000000000007FFF ^ 000000007FFFFFFF = 0000000000007FFF (cc=1) -+xy 0000000000008000 ^ 000000007FFFFFFF = 0000000000008000 (cc=1) -+xy 00000000FFFFFFFF ^ 000000007FFFFFFF = 00000000FFFFFFFF (cc=1) -+xy 0000000080000000 ^ 000000007FFFFFFF = 0000000080000000 (cc=1) -+xy 000000007FFFFFFF ^ 000000007FFFFFFF = 000000007FFFFFFF (cc=1) -+xy AAAAAAAAAAAAAAAA ^ 000000007FFFFFFF = AAAAAAAAAAAAAAAA (cc=1) -+xy 8000000000000000 ^ 000000007FFFFFFF = 8000000000000000 (cc=0) -+xy FFFFFFFFFFFFFFFF ^ 000000007FFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+xy 5555555555555555 ^ 000000007FFFFFFF = 5555555555555555 (cc=1) -+x 0000000000000000 ^ 0000000080000000 = 0000000000000000 (cc=0) -+x 0000000000000001 ^ 0000000080000000 = 0000000000000001 (cc=1) -+x 000000000000FFFF ^ 0000000080000000 = 000000000000FFFF (cc=1) -+x 0000000000007FFF ^ 0000000080000000 = 0000000000007FFF (cc=1) -+x 0000000000008000 ^ 0000000080000000 = 0000000000008000 (cc=1) -+x 00000000FFFFFFFF ^ 0000000080000000 = 00000000FFFFFFFF (cc=1) -+x 0000000080000000 ^ 0000000080000000 = 0000000080000000 (cc=1) -+x 000000007FFFFFFF ^ 0000000080000000 = 000000007FFFFFFF (cc=1) -+x AAAAAAAAAAAAAAAA ^ 0000000080000000 = AAAAAAAAAAAAAAAA (cc=1) -+x 8000000000000000 ^ 0000000080000000 = 8000000000000000 (cc=0) -+x FFFFFFFFFFFFFFFF ^ 0000000080000000 = FFFFFFFFFFFFFFFF (cc=1) -+x 5555555555555555 ^ 0000000080000000 = 5555555555555555 (cc=1) -+xg 0000000000000000 ^ 0000000080000000 = 0000000080000000 (cc=1) -+xg 0000000000000001 ^ 0000000080000000 = 0000000080000001 (cc=1) -+xg 000000000000FFFF ^ 0000000080000000 = 000000008000FFFF (cc=1) -+xg 0000000000007FFF ^ 0000000080000000 = 0000000080007FFF (cc=1) -+xg 0000000000008000 ^ 0000000080000000 = 0000000080008000 (cc=1) -+xg 00000000FFFFFFFF ^ 0000000080000000 = 000000007FFFFFFF (cc=1) -+xg 0000000080000000 ^ 0000000080000000 = 0000000000000000 (cc=0) -+xg 000000007FFFFFFF ^ 0000000080000000 = 00000000FFFFFFFF (cc=1) -+xg AAAAAAAAAAAAAAAA ^ 0000000080000000 = AAAAAAAA2AAAAAAA (cc=1) -+xg 8000000000000000 ^ 0000000080000000 = 8000000080000000 (cc=1) -+xg FFFFFFFFFFFFFFFF ^ 0000000080000000 = FFFFFFFF7FFFFFFF (cc=1) -+xg 5555555555555555 ^ 0000000080000000 = 55555555D5555555 (cc=1) -+xr 0000000000000000 ^ 0000000080000000 = 0000000080000000 (cc=1) -+xr 0000000000000001 ^ 0000000080000000 = 0000000080000001 (cc=1) -+xr 000000000000FFFF ^ 0000000080000000 = 000000008000FFFF (cc=1) -+xr 0000000000007FFF ^ 0000000080000000 = 0000000080007FFF (cc=1) -+xr 0000000000008000 ^ 0000000080000000 = 0000000080008000 (cc=1) -+xr 00000000FFFFFFFF ^ 0000000080000000 = 000000007FFFFFFF (cc=1) -+xr 0000000080000000 ^ 0000000080000000 = 0000000000000000 (cc=0) -+xr 000000007FFFFFFF ^ 0000000080000000 = 00000000FFFFFFFF (cc=1) -+xr AAAAAAAAAAAAAAAA ^ 0000000080000000 = AAAAAAAA2AAAAAAA (cc=1) -+xr 8000000000000000 ^ 0000000080000000 = 8000000080000000 (cc=1) -+xr FFFFFFFFFFFFFFFF ^ 0000000080000000 = FFFFFFFF7FFFFFFF (cc=1) -+xr 5555555555555555 ^ 0000000080000000 = 55555555D5555555 (cc=1) -+xgr 0000000000000000 ^ 0000000080000000 = 0000000080000000 (cc=1) -+xgr 0000000000000001 ^ 0000000080000000 = 0000000080000001 (cc=1) -+xgr 000000000000FFFF ^ 0000000080000000 = 000000008000FFFF (cc=1) -+xgr 0000000000007FFF ^ 0000000080000000 = 0000000080007FFF (cc=1) -+xgr 0000000000008000 ^ 0000000080000000 = 0000000080008000 (cc=1) -+xgr 00000000FFFFFFFF ^ 0000000080000000 = 000000007FFFFFFF (cc=1) -+xgr 0000000080000000 ^ 0000000080000000 = 0000000000000000 (cc=0) -+xgr 000000007FFFFFFF ^ 0000000080000000 = 00000000FFFFFFFF (cc=1) -+xgr AAAAAAAAAAAAAAAA ^ 0000000080000000 = AAAAAAAA2AAAAAAA (cc=1) -+xgr 8000000000000000 ^ 0000000080000000 = 8000000080000000 (cc=1) -+xgr FFFFFFFFFFFFFFFF ^ 0000000080000000 = FFFFFFFF7FFFFFFF (cc=1) -+xgr 5555555555555555 ^ 0000000080000000 = 55555555D5555555 (cc=1) -+xy 0000000000000000 ^ 0000000080000000 = 0000000000000000 (cc=0) -+xy 0000000000000001 ^ 0000000080000000 = 0000000000000001 (cc=1) -+xy 000000000000FFFF ^ 0000000080000000 = 000000000000FFFF (cc=1) -+xy 0000000000007FFF ^ 0000000080000000 = 0000000000007FFF (cc=1) -+xy 0000000000008000 ^ 0000000080000000 = 0000000000008000 (cc=1) -+xy 00000000FFFFFFFF ^ 0000000080000000 = 00000000FFFFFFFF (cc=1) -+xy 0000000080000000 ^ 0000000080000000 = 0000000080000000 (cc=1) -+xy 000000007FFFFFFF ^ 0000000080000000 = 000000007FFFFFFF (cc=1) -+xy AAAAAAAAAAAAAAAA ^ 0000000080000000 = AAAAAAAAAAAAAAAA (cc=1) -+xy 8000000000000000 ^ 0000000080000000 = 8000000000000000 (cc=0) -+xy FFFFFFFFFFFFFFFF ^ 0000000080000000 = FFFFFFFFFFFFFFFF (cc=1) -+xy 5555555555555555 ^ 0000000080000000 = 5555555555555555 (cc=1) -+x 0000000000000000 ^ 0000000055555555 = 0000000000000000 (cc=0) -+x 0000000000000001 ^ 0000000055555555 = 0000000000000001 (cc=1) -+x 000000000000FFFF ^ 0000000055555555 = 000000000000FFFF (cc=1) -+x 0000000000007FFF ^ 0000000055555555 = 0000000000007FFF (cc=1) -+x 0000000000008000 ^ 0000000055555555 = 0000000000008000 (cc=1) -+x 00000000FFFFFFFF ^ 0000000055555555 = 00000000FFFFFFFF (cc=1) -+x 0000000080000000 ^ 0000000055555555 = 0000000080000000 (cc=1) -+x 000000007FFFFFFF ^ 0000000055555555 = 000000007FFFFFFF (cc=1) -+x AAAAAAAAAAAAAAAA ^ 0000000055555555 = AAAAAAAAAAAAAAAA (cc=1) -+x 8000000000000000 ^ 0000000055555555 = 8000000000000000 (cc=0) -+x FFFFFFFFFFFFFFFF ^ 0000000055555555 = FFFFFFFFFFFFFFFF (cc=1) -+x 5555555555555555 ^ 0000000055555555 = 5555555555555555 (cc=1) -+xg 0000000000000000 ^ 0000000055555555 = 0000000055555555 (cc=1) -+xg 0000000000000001 ^ 0000000055555555 = 0000000055555554 (cc=1) -+xg 000000000000FFFF ^ 0000000055555555 = 000000005555AAAA (cc=1) -+xg 0000000000007FFF ^ 0000000055555555 = 0000000055552AAA (cc=1) -+xg 0000000000008000 ^ 0000000055555555 = 000000005555D555 (cc=1) -+xg 00000000FFFFFFFF ^ 0000000055555555 = 00000000AAAAAAAA (cc=1) -+xg 0000000080000000 ^ 0000000055555555 = 00000000D5555555 (cc=1) -+xg 000000007FFFFFFF ^ 0000000055555555 = 000000002AAAAAAA (cc=1) -+xg AAAAAAAAAAAAAAAA ^ 0000000055555555 = AAAAAAAAFFFFFFFF (cc=1) -+xg 8000000000000000 ^ 0000000055555555 = 8000000055555555 (cc=1) -+xg FFFFFFFFFFFFFFFF ^ 0000000055555555 = FFFFFFFFAAAAAAAA (cc=1) -+xg 5555555555555555 ^ 0000000055555555 = 5555555500000000 (cc=1) -+xr 0000000000000000 ^ 0000000055555555 = 0000000055555555 (cc=1) -+xr 0000000000000001 ^ 0000000055555555 = 0000000055555554 (cc=1) -+xr 000000000000FFFF ^ 0000000055555555 = 000000005555AAAA (cc=1) -+xr 0000000000007FFF ^ 0000000055555555 = 0000000055552AAA (cc=1) -+xr 0000000000008000 ^ 0000000055555555 = 000000005555D555 (cc=1) -+xr 00000000FFFFFFFF ^ 0000000055555555 = 00000000AAAAAAAA (cc=1) -+xr 0000000080000000 ^ 0000000055555555 = 00000000D5555555 (cc=1) -+xr 000000007FFFFFFF ^ 0000000055555555 = 000000002AAAAAAA (cc=1) -+xr AAAAAAAAAAAAAAAA ^ 0000000055555555 = AAAAAAAAFFFFFFFF (cc=1) -+xr 8000000000000000 ^ 0000000055555555 = 8000000055555555 (cc=1) -+xr FFFFFFFFFFFFFFFF ^ 0000000055555555 = FFFFFFFFAAAAAAAA (cc=1) -+xr 5555555555555555 ^ 0000000055555555 = 5555555500000000 (cc=0) -+xgr 0000000000000000 ^ 0000000055555555 = 0000000055555555 (cc=1) -+xgr 0000000000000001 ^ 0000000055555555 = 0000000055555554 (cc=1) -+xgr 000000000000FFFF ^ 0000000055555555 = 000000005555AAAA (cc=1) -+xgr 0000000000007FFF ^ 0000000055555555 = 0000000055552AAA (cc=1) -+xgr 0000000000008000 ^ 0000000055555555 = 000000005555D555 (cc=1) -+xgr 00000000FFFFFFFF ^ 0000000055555555 = 00000000AAAAAAAA (cc=1) -+xgr 0000000080000000 ^ 0000000055555555 = 00000000D5555555 (cc=1) -+xgr 000000007FFFFFFF ^ 0000000055555555 = 000000002AAAAAAA (cc=1) -+xgr AAAAAAAAAAAAAAAA ^ 0000000055555555 = AAAAAAAAFFFFFFFF (cc=1) -+xgr 8000000000000000 ^ 0000000055555555 = 8000000055555555 (cc=1) -+xgr FFFFFFFFFFFFFFFF ^ 0000000055555555 = FFFFFFFFAAAAAAAA (cc=1) -+xgr 5555555555555555 ^ 0000000055555555 = 5555555500000000 (cc=1) -+xy 0000000000000000 ^ 0000000055555555 = 0000000000000000 (cc=0) -+xy 0000000000000001 ^ 0000000055555555 = 0000000000000001 (cc=1) -+xy 000000000000FFFF ^ 0000000055555555 = 000000000000FFFF (cc=1) -+xy 0000000000007FFF ^ 0000000055555555 = 0000000000007FFF (cc=1) -+xy 0000000000008000 ^ 0000000055555555 = 0000000000008000 (cc=1) -+xy 00000000FFFFFFFF ^ 0000000055555555 = 00000000FFFFFFFF (cc=1) -+xy 0000000080000000 ^ 0000000055555555 = 0000000080000000 (cc=1) -+xy 000000007FFFFFFF ^ 0000000055555555 = 000000007FFFFFFF (cc=1) -+xy AAAAAAAAAAAAAAAA ^ 0000000055555555 = AAAAAAAAAAAAAAAA (cc=1) -+xy 8000000000000000 ^ 0000000055555555 = 8000000000000000 (cc=0) -+xy FFFFFFFFFFFFFFFF ^ 0000000055555555 = FFFFFFFFFFFFFFFF (cc=1) -+xy 5555555555555555 ^ 0000000055555555 = 5555555555555555 (cc=1) -+x 0000000000000000 ^ 00000000FFFFFFFF = 0000000000000000 (cc=0) -+x 0000000000000001 ^ 00000000FFFFFFFF = 0000000000000001 (cc=1) -+x 000000000000FFFF ^ 00000000FFFFFFFF = 000000000000FFFF (cc=1) -+x 0000000000007FFF ^ 00000000FFFFFFFF = 0000000000007FFF (cc=1) -+x 0000000000008000 ^ 00000000FFFFFFFF = 0000000000008000 (cc=1) -+x 00000000FFFFFFFF ^ 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+x 0000000080000000 ^ 00000000FFFFFFFF = 0000000080000000 (cc=1) -+x 000000007FFFFFFF ^ 00000000FFFFFFFF = 000000007FFFFFFF (cc=1) -+x AAAAAAAAAAAAAAAA ^ 00000000FFFFFFFF = AAAAAAAAAAAAAAAA (cc=1) -+x 8000000000000000 ^ 00000000FFFFFFFF = 8000000000000000 (cc=0) -+x FFFFFFFFFFFFFFFF ^ 00000000FFFFFFFF = FFFFFFFFFFFFFFFF (cc=1) -+x 5555555555555555 ^ 00000000FFFFFFFF = 5555555555555555 (cc=1) -+xg 0000000000000000 ^ 00000000FFFFFFFF = 00000000FFFFFFFF (cc=1) -+xg 0000000000000001 ^ 00000000FFFFFFFF = 00000000FFFFFFFE (cc=1) -+xg 000000000000FFFF ^ 00000000FFFFFFFF = 00000000FFFF0000 (cc=1) -+xg 0000000000007FFF ^ 00000000FFFFFFFF = 00000000FFFF8000 (cc=1) -+xg 0000000000008000 ^ 00000000FFFFFFFF = 00000000FFFF7FFF (cc=1) -+xg 00000000FFFFFFFF ^ 00000000FFFFFFFF = 0000000000000000 (cc=0) -+xg 0000000080000000 ^ 00000000FFFFFFFF = 000000007FFFFFFF (cc=1) -+xg 000000007FFFFFFF ^ 00000000FFFFFFFF = 0000000080000000 (cc=1) -+xg AAAAAAAAAAAAAAAA ^ 00000000FFFFFFFF = AAAAAAAA55555555 (cc=1) -+xg 8000000000000000 ^ 00000000FFFFFFFF = 80000000FFFFFFFF (cc=1) -+xg FFFFFFFFFFFFFFFF ^ 00000000FFFFFFFF = FFFFFFFF00000000 (cc=1) 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00000000000000FF = FF0000007FFFFFFF (cc=1) -+xiy AAAAAAAAAAAAAAAA ^ 00000000000000FF = 55AAAAAAAAAAAAAA (cc=1) -+xiy 8000000000000000 ^ 00000000000000FF = 7F00000000000000 (cc=1) -+xiy FFFFFFFFFFFFFFFF ^ 00000000000000FF = 00FFFFFFFFFFFFFF (cc=0) -+xiy 5555555555555555 ^ 00000000000000FF = AA55555555555555 (cc=1) -+xiy 0000000000000000 ^ 0000000000000080 = 8000000000000000 (cc=1) -+xiy 0000000000000001 ^ 0000000000000080 = 8000000000000001 (cc=1) -+xiy 000000000000FFFF ^ 0000000000000080 = 800000000000FFFF (cc=1) -+xiy 0000000000007FFF ^ 0000000000000080 = 8000000000007FFF (cc=1) -+xiy 0000000000008000 ^ 0000000000000080 = 8000000000008000 (cc=1) -+xiy 00000000FFFFFFFF ^ 0000000000000080 = 80000000FFFFFFFF (cc=1) -+xiy 0000000080000000 ^ 0000000000000080 = 8000000080000000 (cc=1) -+xiy 000000007FFFFFFF ^ 0000000000000080 = 800000007FFFFFFF (cc=1) -+xiy AAAAAAAAAAAAAAAA ^ 0000000000000080 = 2AAAAAAAAAAAAAAA (cc=1) -+xiy 8000000000000000 ^ 0000000000000080 = 0000000000000000 (cc=0) -+xiy FFFFFFFFFFFFFFFF ^ 0000000000000080 = 7FFFFFFFFFFFFFFF (cc=1) -+xiy 5555555555555555 ^ 0000000000000080 = D555555555555555 (cc=1) -+xiy 0000000000000000 ^ 00000000000000AA = AA00000000000000 (cc=1) -+xiy 0000000000000001 ^ 00000000000000AA = AA00000000000001 (cc=1) -+xiy 000000000000FFFF ^ 00000000000000AA = AA0000000000FFFF (cc=1) -+xiy 0000000000007FFF ^ 00000000000000AA = AA00000000007FFF (cc=1) -+xiy 0000000000008000 ^ 00000000000000AA = AA00000000008000 (cc=1) -+xiy 00000000FFFFFFFF ^ 00000000000000AA = AA000000FFFFFFFF (cc=1) -+xiy 0000000080000000 ^ 00000000000000AA = AA00000080000000 (cc=1) -+xiy 000000007FFFFFFF ^ 00000000000000AA = AA0000007FFFFFFF (cc=1) -+xiy AAAAAAAAAAAAAAAA ^ 00000000000000AA = 00AAAAAAAAAAAAAA (cc=0) -+xiy 8000000000000000 ^ 00000000000000AA = 2A00000000000000 (cc=1) -+xiy FFFFFFFFFFFFFFFF ^ 00000000000000AA = 55FFFFFFFFFFFFFF (cc=1) -+xiy 5555555555555555 ^ 00000000000000AA = FF55555555555555 (cc=1) -+xiy 0000000000000000 ^ 0000000000000055 = 5500000000000000 (cc=1) -+xiy 0000000000000001 ^ 0000000000000055 = 5500000000000001 (cc=1) -+xiy 000000000000FFFF ^ 0000000000000055 = 550000000000FFFF (cc=1) -+xiy 0000000000007FFF ^ 0000000000000055 = 5500000000007FFF (cc=1) -+xiy 0000000000008000 ^ 0000000000000055 = 5500000000008000 (cc=1) -+xiy 00000000FFFFFFFF ^ 0000000000000055 = 55000000FFFFFFFF (cc=1) -+xiy 0000000080000000 ^ 0000000000000055 = 5500000080000000 (cc=1) -+xiy 000000007FFFFFFF ^ 0000000000000055 = 550000007FFFFFFF (cc=1) -+xiy AAAAAAAAAAAAAAAA ^ 0000000000000055 = FFAAAAAAAAAAAAAA (cc=1) -+xiy 8000000000000000 ^ 0000000000000055 = D500000000000000 (cc=1) -+xiy FFFFFFFFFFFFFFFF ^ 0000000000000055 = AAFFFFFFFFFFFFFF (cc=1) -+xiy 5555555555555555 ^ 0000000000000055 = 0055555555555555 (cc=0) ---- none/tests/s390x/xor.vgtest -+++ none/tests/s390x/xor.vgtest -@@ -0,0 +1 @@ -+prog: xor ---- README.s390 -+++ README.s390 -@@ -0,0 +1,36 @@ -+Requirements -+------------ -+- You need GCC 3.4 or later to compile the s390 port. -+- A working combination of autotools is required. -+- To run valgrind a z900 machine or any later model is needed. -+- The long displacement facility must be installed on the host machine. -+ -+ -+Limitations -+----------- -+- 31-bit client programs are not supported. -+- Hexadecimal floating point is not supported. -+- Decimal floating point is not supported yet. -+- Currently, only memcheck, massif, lackey, and none are supported -+- helgrind and drd seem to work on SLES10,11 and RHEL5,6 on z9,z10 and z196 -+ but might fail on other hardware/software combinations. -+- Some gcc versions use mvc to copy 4/8 byte values. This will affect some -+ debug messages. Valgrind will complain about 4 or 8 one-byte reads/writes -+ instead of just 1 read/write. -+- exp-ptrcheck and callgrind are not supported. -+ -+ -+Recommendations -+--------------- -+Applications should be compiled with -fno-builtin to avoid -+false positives due to builtin string operations when running memcheck. -+ -+ -+Reading Material -+---------------- -+(1) Linux for zSeries ELF ABI Supplement -+ http://refspecs.linuxfoundation.org/ELF/zSeries/index.html -+(2) z/Architecture Principles of Operation -+ http://publibfi.boulder.ibm.com/epubs/pdf/dz9zr008.pdf -+(3) z/Architecture Reference Summary -+ http://publibfi.boulder.ibm.com/epubs/pdf/dz9zs006.pdf ---- tests/arch_test.c -+++ tests/arch_test.c -@@ -28,6 +28,7 @@ - "ppc32", - "ppc64", - "arm", -+ "s390x", - NULL - }; - -@@ -47,6 +48,9 @@ - if ( 0 == strcmp( arch, "ppc64" ) ) return True; - if ( 0 == strcmp( arch, "ppc32" ) ) return True; - -+#elif defined(VGP_s390x_linux) -+ if ( 0 == strcmp( arch, "s390x" ) ) return True; -+ - #elif defined(VGP_ppc32_aix5) || defined(VGP_ppc64_aix5) - if (sizeof(void*) == 8) { - /* CPU is in 64-bit mode */ ---- VEX/auxprogs/genoffsets.c -+++ VEX/auxprogs/genoffsets.c -@@ -51,6 +51,7 @@ - #include "../pub/libvex_guest_ppc32.h" - #include "../pub/libvex_guest_ppc64.h" - #include "../pub/libvex_guest_arm.h" -+#include "../pub/libvex_guest_s390x.h" - - #define VG_STRINGIFZ(__str) #__str - #define VG_STRINGIFY(__str) VG_STRINGIFZ(__str) -@@ -155,6 +156,19 @@ - GENOFFSET(ARM,arm,R13); - GENOFFSET(ARM,arm,R14); - GENOFFSET(ARM,arm,R15T); -+ -+ // s390x -+ GENOFFSET(S390X,s390x,r2); -+ GENOFFSET(S390X,s390x,r3); -+ GENOFFSET(S390X,s390x,r4); -+ GENOFFSET(S390X,s390x,r5); -+ GENOFFSET(S390X,s390x,r6); -+ GENOFFSET(S390X,s390x,r7); -+ GENOFFSET(S390X,s390x,r15); -+ GENOFFSET(S390X,s390x,IA); -+ GENOFFSET(S390X,s390x,SYSNO); -+ GENOFFSET(S390X,s390x,IP_AT_SYSCALL); -+ GENOFFSET(S390X,s390x,fpc); - } - - /*--------------------------------------------------------------------*/ ---- VEX/priv/guest_s390_defs.h -+++ VEX/priv/guest_s390_defs.h -@@ -0,0 +1,211 @@ -+/* -*- mode: C; c-basic-offset: 3; -*- */ -+ -+/*---------------------------------------------------------------*/ -+/*--- begin guest_s390_defs.h ---*/ -+/*---------------------------------------------------------------*/ -+ -+/* -+ This file is part of Valgrind, a dynamic binary instrumentation -+ framework. -+ -+ Copyright IBM Corp. 2010,2011 -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA -+ 02110-1301, USA. -+ -+ The GNU General Public License is contained in the file COPYING. -+*/ -+ -+/* Contributed by Florian Krohm */ -+ -+#ifndef __VEX_GUEST_S390_DEFS_H -+#define __VEX_GUEST_S390_DEFS_H -+ -+#include "libvex_basictypes.h" -+#include "libvex_ir.h" // IRSB (needed by bb_to_IR.h) -+#include "libvex.h" // VexArch (needed by bb_to_IR.h) -+#include "guest_generic_bb_to_IR.h" // DisResult -+ -+/* Convert one s390 insn to IR. See the type DisOneInstrFn in -+ bb_to_IR.h. */ -+extern -+DisResult disInstr_S390 ( IRSB* irbb, -+ Bool put_IP, -+ Bool (*resteerOkFn) ( void*, Addr64 ), -+ Bool resteerCisOk, -+ void* callback_opaque, -+ UChar* guest_code, -+ Long delta, -+ Addr64 guest_IP, -+ VexArch guest_arch, -+ VexArchInfo* archinfo, -+ VexAbiInfo* abiinfo, -+ Bool host_bigendian ); -+ -+/* Used by the optimiser to specialise calls to helpers. */ -+extern -+IRExpr* guest_s390x_spechelper ( HChar *function_name, -+ IRExpr **args, -+ IRStmt **precedingStmts, -+ Int n_precedingStmts); -+ -+ -+/* Describes to the optimser which part of the guest state require -+ precise memory exceptions. This is logically part of the guest -+ state description. */ -+extern -+Bool guest_s390x_state_requires_precise_mem_exns ( Int, Int ); -+ -+extern -+VexGuestLayout s390xGuest_layout; -+ -+ -+UInt s390_decode_and_irgen(UChar *, UInt, DisResult *); -+ -+#define S390_GUEST_OFFSET(x) offsetof(VexGuestS390XState, x) -+ -+/*------------------------------------------------------------*/ -+/*--- Dirty Helper functions. ---*/ -+/*------------------------------------------------------------*/ -+void s390x_dirtyhelper_EX(ULong torun); -+ -+/*------------------------------------------------------------*/ -+/*--- IR generators for special opcodes. ---*/ -+/*------------------------------------------------------------*/ -+void s390_irgen_client_request(void); -+void s390_irgen_guest_NRADDR(void); -+void s390_irgen_call_noredir(void); -+void s390_irgen_internal_return(void); -+ -+#include "libvex_basictypes.h" -+#include "libvex_ir.h" -+ -+/* The various ways to compute the condition code. */ -+ -+enum { -+ S390_CC_OP_BITWISE = 0, -+ S390_CC_OP_SIGNED_COMPARE = 1, -+ S390_CC_OP_UNSIGNED_COMPARE = 2, -+ S390_CC_OP_SIGNED_ADD_32 = 3, -+ S390_CC_OP_SIGNED_ADD_64 = 4, -+ S390_CC_OP_UNSIGNED_ADD_32 = 5, -+ S390_CC_OP_UNSIGNED_ADD_64 = 6, -+ S390_CC_OP_UNSIGNED_ADDC_32 = 7, -+ S390_CC_OP_UNSIGNED_ADDC_64 = 8, -+ S390_CC_OP_SIGNED_SUB_32 = 9, -+ S390_CC_OP_SIGNED_SUB_64 = 10, -+ S390_CC_OP_UNSIGNED_SUB_32 = 11, -+ S390_CC_OP_UNSIGNED_SUB_64 = 12, -+ S390_CC_OP_UNSIGNED_SUBB_32 = 13, -+ S390_CC_OP_UNSIGNED_SUBB_64 = 14, -+ S390_CC_OP_LOAD_AND_TEST = 15, -+ S390_CC_OP_LOAD_POSITIVE_32 = 16, -+ S390_CC_OP_LOAD_POSITIVE_64 = 17, -+ S390_CC_OP_TEST_AND_SET = 18, -+ S390_CC_OP_TEST_UNDER_MASK_8 = 19, -+ S390_CC_OP_TEST_UNDER_MASK_16 = 20, -+ S390_CC_OP_SHIFT_LEFT_32 = 21, -+ S390_CC_OP_SHIFT_LEFT_64 = 22, -+ S390_CC_OP_INSERT_CHAR_MASK_32 = 23, -+ S390_CC_OP_BFP_RESULT_32 = 24, -+ S390_CC_OP_BFP_RESULT_64 = 25, -+ S390_CC_OP_BFP_RESULT_128 = 26, -+ S390_CC_OP_BFP_32_TO_INT_32 = 27, -+ S390_CC_OP_BFP_64_TO_INT_32 = 28, -+ S390_CC_OP_BFP_128_TO_INT_32 = 29, -+ S390_CC_OP_BFP_32_TO_INT_64 = 30, -+ S390_CC_OP_BFP_64_TO_INT_64 = 31, -+ S390_CC_OP_BFP_128_TO_INT_64 = 32, -+ S390_CC_OP_BFP_TDC_32 = 33, -+ S390_CC_OP_BFP_TDC_64 = 34, -+ S390_CC_OP_BFP_TDC_128 = 35, -+ S390_CC_OP_SET = 36 -+}; -+ -+/*------------------------------------------------------------*/ -+/*--- Thunk layout ---*/ -+/*------------------------------------------------------------*/ -+ -+/* -+ Z -- value is zero extended to 32 / 64 bit -+ S -- value is sign extended to 32 / 64 bit -+ F -- a binary floating point value -+ -+ +--------------------------------+-----------------------+----------------------+-------------+ -+ | op | cc_dep1 | cc_dep2 | cc_ndep | -+ +--------------------------------+-----------------------+----------------------+-------------+ -+ | S390_CC_OP_BITWISE | Z result | | | -+ | S390_CC_OP_SIGNED_COMPARE | S 1st operand | S 2nd operand | | -+ | S390_CC_OP_UNSIGNED_COMPARE | Z 1st operand | Z 2nd operand | | -+ | S390_CC_OP_SIGNED_ADD_32 | S 1st operand | S 2nd operand | | -+ | S390_CC_OP_SIGNED_ADD_64 | S 1st operand | S 2nd operand | | -+ | S390_CC_OP_UNSIGNED_ADD_32 | Z 1st operand | Z 2nd operand | | -+ | S390_CC_OP_UNSIGNED_ADD_64 | Z 1st operand | Z 2nd operand | | -+ | S390_CC_OP_UNSIGNED_ADDC_32 | Z 1st operand | Z 2nd operand | Z carry in | -+ | S390_CC_OP_UNSIGNED_ADDC_64 | Z 1st operand | Z 2nd operand | Z carry in | -+ | S390_CC_OP_SIGNED_SUB_32 | S left operand | S right operand | | -+ | S390_CC_OP_SIGNED_SUB_64 | S left operand | S right operand | | -+ | S390_CC_OP_UNSIGNED_SUB_32 | Z left operand | Z right operand | | -+ | S390_CC_OP_UNSIGNED_SUB_64 | Z left operand | Z right operand | | -+ | S390_CC_OP_UNSIGNED_SUBB_32 | Z left operand | Z right operand | Z borrow in | -+ | S390_CC_OP_UNSIGNED_SUBB_64 | Z left operand | Z right operand | Z borrow in | -+ | S390_CC_OP_LOAD_AND_TEST | S loaded value | | | -+ | S390_CC_OP_LOAD_POSITIVE_32 | S loaded value | | | -+ | S390_CC_OP_LOAD_POSITIVE_64 | S loaded value | | | -+ | S390_CC_OP_TEST_AND_SET | Z tested value | | | -+ | S390_CC_OP_TEST_UNDER_MASK_8 | Z tested value | Z mask | | -+ | S390_CC_OP_TEST_UNDER_MASK_16 | Z tested value | Z mask | | -+ | S390_CC_OP_SHIFT_LEFT_32 | Z value to be shifted | Z shift amount | | -+ | S390_CC_OP_SHIFT_LEFT_64 | Z value to be shifted | Z shift amount | | -+ | S390_CC_OP_INSERT_CHAR_MASK_32 | Z result | Z mask | | -+ | S390_CC_OP_BFP_RESULT_32 | F result | | | -+ | S390_CC_OP_BFP_RESULT_64 | F result | | | -+ | S390_CC_OP_BFP_RESULT_128 | F result hi 64 bits | F result low 64 bits | | -+ | S390_CC_OP_BFP_32_TO_INT_32 | F source | | | -+ | S390_CC_OP_BFP_64_TO_INT_32 | F source | | | -+ | S390_CC_OP_BFP_128_TO_INT_32 | F source hi 64 bits | | | -+ | S390_CC_OP_BFP_32_TO_INT_64 | F source | | | -+ | S390_CC_OP_BFP_64_TO_INT_64 | F source | | | -+ | S390_CC_OP_BFP_128_TO_INT_64 | F source hi 64 bits | | | -+ | S390_CC_OP_BFP_TDC_32 | F value | Z class | | -+ | S390_CC_OP_BFP_TDC_64 | F value | Z class | | -+ | S390_CC_OP_BFP_TDC_128 | F value hi 64 bits | F value low 64 bits | Z class | -+ | S390_CC_OP_SET | Z condition code | | | -+ +--------------------------------+-----------------------+----------------------+-------------+ -+*/ -+ -+/*------------------------------------------------------------*/ -+/*--- condition code helpers. ---*/ -+/*------------------------------------------------------------*/ -+UInt s390_calculate_cc(ULong cc_op, ULong cc_dep1, ULong cc_dep2, -+ ULong cc_ndep); -+UInt s390_calculate_icc(ULong op, ULong dep1, ULong dep2); -+UInt s390_calculate_cond(ULong mask, ULong op, ULong dep1, ULong dep2, -+ ULong ndep); -+ -+/* Size of special instruction preamble */ -+#define S390_SPECIAL_OP_PREAMBLE_SIZE 8 -+ -+/* Size of special instructions */ -+#define S390_SPECIAL_OP_SIZE 2 -+ -+/* Last target instruction for the EX helper */ -+extern ULong last_execute_target; -+ -+/*---------------------------------------------------------------*/ -+/*--- end guest_s390_defs.h ---*/ -+/*---------------------------------------------------------------*/ -+ -+#endif /* __VEX_GUEST_S390_DEFS_H */ ---- VEX/priv/guest_s390_helpers.c -+++ VEX/priv/guest_s390_helpers.c -@@ -0,0 +1,1162 @@ -+/* -*- mode: C; c-basic-offset: 3; -*- */ -+ -+/*---------------------------------------------------------------*/ -+/*--- begin guest_s390_helpers.c ---*/ -+/*---------------------------------------------------------------*/ -+ -+/* -+ This file is part of Valgrind, a dynamic binary instrumentation -+ framework. -+ -+ Copyright IBM Corp. 2010,2011 -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA -+ 02110-1301, USA. -+ -+ The GNU General Public License is contained in the file COPYING. -+*/ -+ -+/* Contributed by Florian Krohm */ -+ -+#include "libvex_basictypes.h" -+#include "libvex_emwarn.h" -+#include "libvex_guest_s390x.h" -+#include "libvex_ir.h" -+#include "libvex.h" -+ -+#include "main_util.h" -+#include "guest_generic_bb_to_IR.h" -+#include "guest_s390_defs.h" -+ -+void -+LibVEX_GuestS390X_initialise(VexGuestS390XState *state) -+{ -+/*------------------------------------------------------------*/ -+/*--- Initialise ar registers ---*/ -+/*------------------------------------------------------------*/ -+ -+ state->guest_a0 = 0; -+ state->guest_a1 = 0; -+ state->guest_a2 = 0; -+ state->guest_a3 = 0; -+ state->guest_a4 = 0; -+ state->guest_a5 = 0; -+ state->guest_a6 = 0; -+ state->guest_a7 = 0; -+ state->guest_a8 = 0; -+ state->guest_a9 = 0; -+ state->guest_a10 = 0; -+ state->guest_a11 = 0; -+ state->guest_a12 = 0; -+ state->guest_a13 = 0; -+ state->guest_a14 = 0; -+ state->guest_a15 = 0; -+ -+/*------------------------------------------------------------*/ -+/*--- Initialise fpr registers ---*/ -+/*------------------------------------------------------------*/ -+ -+ state->guest_f0 = 0; -+ state->guest_f1 = 0; -+ state->guest_f2 = 0; -+ state->guest_f3 = 0; -+ state->guest_f4 = 0; -+ state->guest_f5 = 0; -+ state->guest_f6 = 0; -+ state->guest_f7 = 0; -+ state->guest_f8 = 0; -+ state->guest_f9 = 0; -+ state->guest_f10 = 0; -+ state->guest_f11 = 0; -+ state->guest_f12 = 0; -+ state->guest_f13 = 0; -+ state->guest_f14 = 0; -+ state->guest_f15 = 0; -+ -+/*------------------------------------------------------------*/ -+/*--- Initialise gpr registers ---*/ -+/*------------------------------------------------------------*/ -+ -+ state->guest_r0 = 0; -+ state->guest_r1 = 0; -+ state->guest_r2 = 0; -+ state->guest_r3 = 0; -+ state->guest_r4 = 0; -+ state->guest_r5 = 0; -+ state->guest_r6 = 0; -+ state->guest_r7 = 0; -+ state->guest_r8 = 0; -+ state->guest_r9 = 0; -+ state->guest_r10 = 0; -+ state->guest_r11 = 0; -+ state->guest_r12 = 0; -+ state->guest_r13 = 0; -+ state->guest_r14 = 0; -+ state->guest_r15 = 0; -+ -+/*------------------------------------------------------------*/ -+/*--- Initialise S390 miscellaneous registers ---*/ -+/*------------------------------------------------------------*/ -+ -+ state->guest_counter = 0; -+ state->guest_fpc = 0; -+ state->guest_IA = 0; -+ -+/*------------------------------------------------------------*/ -+/*--- Initialise S390 pseudo registers ---*/ -+/*------------------------------------------------------------*/ -+ -+ state->guest_SYSNO = 0; -+ -+/*------------------------------------------------------------*/ -+/*--- Initialise generic pseudo registers ---*/ -+/*------------------------------------------------------------*/ -+ -+ state->guest_NRADDR = 0; -+ state->guest_TISTART = 0; -+ state->guest_TILEN = 0; -+ state->guest_IP_AT_SYSCALL = 0; -+ state->guest_EMWARN = EmWarn_NONE; -+ -+/*------------------------------------------------------------*/ -+/*--- Initialise thunk ---*/ -+/*------------------------------------------------------------*/ -+ -+ state->guest_CC_OP = 0; -+ state->guest_CC_DEP1 = 0; -+ state->guest_CC_DEP2 = 0; -+ state->guest_CC_NDEP = 0; -+} -+ -+ -+/* Figure out if any part of the guest state contained in minoff -+ .. maxoff requires precise memory exceptions. If in doubt return -+ True (but this is generates significantly slower code). */ -+Bool -+guest_s390x_state_requires_precise_mem_exns(Int minoff, Int maxoff) -+{ -+ Int lr_min = offsetof(VexGuestS390XState, guest_LR); -+ Int lr_max = lr_min + 8 - 1; -+ Int sp_min = offsetof(VexGuestS390XState, guest_SP); -+ Int sp_max = sp_min + 8 - 1; -+ Int fp_min = offsetof(VexGuestS390XState, guest_FP); -+ Int fp_max = fp_min + 8 - 1; -+ Int ia_min = offsetof(VexGuestS390XState, guest_IA); -+ Int ia_max = ia_min + 8 - 1; -+ -+ if (maxoff < lr_min || minoff > lr_max) { -+ /* No overlap with LR */ -+ } else { -+ return True; -+ } -+ -+ if (maxoff < sp_min || minoff > sp_max) { -+ /* No overlap with SP */ -+ } else { -+ return True; -+ } -+ -+ if (maxoff < fp_min || minoff > fp_max) { -+ /* No overlap with FP */ -+ } else { -+ return True; -+ } -+ -+ if (maxoff < ia_min || minoff > ia_max) { -+ /* No overlap with IA */ -+ } else { -+ return True; -+ } -+ -+ return False; -+} -+ -+ -+#define ALWAYSDEFD(field) \ -+ { offsetof(VexGuestS390XState, field), \ -+ (sizeof ((VexGuestS390XState*)0)->field) } -+ -+VexGuestLayout s390xGuest_layout = { -+ -+ /* Total size of the guest state, in bytes. */ -+ .total_sizeB = sizeof(VexGuestS390XState), -+ -+ /* Describe the stack pointer. */ -+ .offset_SP = offsetof(VexGuestS390XState, guest_SP), -+ .sizeof_SP = 8, -+ -+ /* Describe the frame pointer. */ -+ .offset_FP = offsetof(VexGuestS390XState, guest_FP), -+ .sizeof_FP = 8, -+ -+ /* Describe the instruction pointer. */ -+ .offset_IP = offsetof(VexGuestS390XState, guest_IA), -+ .sizeof_IP = 8, -+ -+ /* Describe any sections to be regarded by Memcheck as -+ 'always-defined'. */ -+ .n_alwaysDefd = 9, -+ -+ /* Flags thunk: OP and NDEP are always defined, whereas DEP1 -+ and DEP2 have to be tracked. See detailed comment in -+ gdefs.h on meaning of thunk fields. */ -+ .alwaysDefd = { -+ /* 0 */ ALWAYSDEFD(guest_CC_OP), /* generic */ -+ /* 1 */ ALWAYSDEFD(guest_CC_NDEP), /* generic */ -+ /* 2 */ ALWAYSDEFD(guest_EMWARN), /* generic */ -+ /* 3 */ ALWAYSDEFD(guest_TISTART), /* generic */ -+ /* 4 */ ALWAYSDEFD(guest_TILEN), /* generic */ -+ /* 5 */ ALWAYSDEFD(guest_IP_AT_SYSCALL), /* generic */ -+ /* 6 */ ALWAYSDEFD(guest_IA), /* control reg */ -+ /* 7 */ ALWAYSDEFD(guest_fpc), /* control reg */ -+ /* 8 */ ALWAYSDEFD(guest_counter), /* internal usage register */ -+ } -+}; -+ -+/*------------------------------------------------------------*/ -+/*--- Dirty helper for EXecute ---*/ -+/*------------------------------------------------------------*/ -+void -+s390x_dirtyhelper_EX(ULong torun) -+{ -+ last_execute_target = torun; -+} -+ -+/*------------------------------------------------------------*/ -+/*--- Helper for condition code. ---*/ -+/*------------------------------------------------------------*/ -+ -+#define S390_CC_FOR_BINARY(opcode,cc_dep1,cc_dep2) \ -+({ \ -+ __asm__ volatile ( \ -+ opcode " %[op1],%[op2]\n\t" \ -+ "ipm %[psw]\n\t" : [psw] "=d"(psw), [op1] "+d"(cc_dep1) \ -+ : [op2] "d"(cc_dep2) \ -+ : "cc");\ -+ psw >> 28; /* cc */ \ -+}) -+ -+#define S390_CC_FOR_TERNARY_SUBB(opcode,cc_dep1,cc_dep2,cc_ndep) \ -+({ \ -+ /* Recover the original DEP2 value. See comment near s390_cc_thunk_put3 \ -+ for rationale. */ \ -+ cc_dep2 = cc_dep2 ^ cc_ndep; \ -+ __asm__ volatile ( \ -+ "lghi 0,1\n\t" \ -+ "sr 0,%[op3]\n\t" /* borrow to cc */ \ -+ opcode " %[op1],%[op2]\n\t" /* then redo the op */\ -+ "ipm %[psw]\n\t" : [psw] "=d"(psw), [op1] "+&d"(cc_dep1) \ -+ : [op2] "d"(cc_dep2), [op3] "d"(cc_ndep) \ -+ : "0", "cc");\ -+ psw >> 28; /* cc */ \ -+}) -+ -+#define S390_CC_FOR_TERNARY_ADDC(opcode,cc_dep1,cc_dep2,cc_ndep) \ -+({ \ -+ /* Recover the original DEP2 value. See comment near s390_cc_thunk_put3 \ -+ for rationale. */ \ -+ cc_dep2 = cc_dep2 ^ cc_ndep; \ -+ __asm__ volatile ( \ -+ "lgfr 0,%[op3]\n\t" /* first load cc_ndep */ \ -+ "aghi 0,0\n\t" /* and convert it into a cc */ \ -+ opcode " %[op1],%[op2]\n\t" /* then redo the op */\ -+ "ipm %[psw]\n\t" : [psw] "=d"(psw), [op1] "+&d"(cc_dep1) \ -+ : [op2] "d"(cc_dep2), [op3] "d"(cc_ndep) \ -+ : "0", "cc");\ -+ psw >> 28; /* cc */ \ -+}) -+ -+ -+#define S390_CC_FOR_BFP_RESULT(opcode,cc_dep1) \ -+({ \ -+ __asm__ volatile ( \ -+ opcode " 0,%[op]\n\t" \ -+ "ipm %[psw]\n\t" : [psw] "=d"(psw) \ -+ : [op] "f"(cc_dep1) \ -+ : "cc", "f0");\ -+ psw >> 28; /* cc */ \ -+}) -+ -+#define S390_CC_FOR_BFP128_RESULT(hi,lo) \ -+({ \ -+ __asm__ volatile ( \ -+ "ldr 4,%[high]\n\t" \ -+ "ldr 6,%[low]\n\t" \ -+ "ltxbr 0,4\n\t" \ -+ "ipm %[psw]\n\t" : [psw] "=d"(psw) \ -+ : [high] "f"(hi), [low] "f"(lo) \ -+ : "cc", "f0", "f2", "f4", "f6");\ -+ psw >> 28; /* cc */ \ -+}) -+ -+#define S390_CC_FOR_BFP_CONVERT(opcode,cc_dep1) \ -+({ \ -+ __asm__ volatile ( \ -+ opcode " 0,0,%[op]\n\t" \ -+ "ipm %[psw]\n\t" : [psw] "=d"(psw) \ -+ : [op] "f"(cc_dep1) \ -+ : "cc", "r0");\ -+ psw >> 28; /* cc */ \ -+}) -+ -+#define S390_CC_FOR_BFP128_CONVERT(opcode,hi,lo) \ -+({ \ -+ __asm__ volatile ( \ -+ "ldr 4,%[high]\n\t" \ -+ "ldr 6,%[low]\n\t" \ -+ opcode " 0,0,4\n\t" \ -+ "ipm %[psw]\n\t" : [psw] "=d"(psw) \ -+ : [high] "f"(hi), [low] "f"(lo) \ -+ : "cc", "r0", "f4", "f6");\ -+ psw >> 28; /* cc */ \ -+}) -+ -+#define S390_CC_FOR_BFP_TDC(opcode,cc_dep1,cc_dep2) \ -+({ \ -+ __asm__ volatile ( \ -+ opcode " %[value],0(%[class])\n\t" \ -+ "ipm %[psw]\n\t" : [psw] "=d"(psw) \ -+ : [value] "f"(cc_dep1), \ -+ [class] "a"(cc_dep2) \ -+ : "cc");\ -+ psw >> 28; /* cc */ \ -+}) -+ -+#define S390_CC_FOR_BFP128_TDC(cc_dep1,cc_dep2,cc_ndep) \ -+({ \ -+ /* Recover the original DEP2 value. See comment near s390_cc_thunk_put1f128Z \ -+ for rationale. */ \ -+ cc_dep2 = cc_dep2 ^ cc_ndep; \ -+ __asm__ volatile ( \ -+ "ldr 4,%[high]\n\t" \ -+ "ldr 6,%[low]\n\t" \ -+ "tcxb 4,0(%[class])\n\t" \ -+ "ipm %[psw]\n\t" : [psw] "=d"(psw) \ -+ : [high] "f"(cc_dep1), [low] "f"(cc_dep2), \ -+ [class] "a"(cc_ndep) \ -+ : "cc", "f4", "f6");\ -+ psw >> 28; /* cc */ \ -+}) -+ -+ -+/* Return the value of the condition code from the supplied thunk parameters. -+ This is not the value of the PSW. It is the value of the 2 CC bits within -+ the PSW. The returned value is thusly in the interval [0:3]. */ -+UInt -+s390_calculate_cc(ULong cc_op, ULong cc_dep1, ULong cc_dep2, ULong cc_ndep) -+{ -+#if defined(VGA_s390x) -+ UInt psw; -+ -+ switch (cc_op) { -+ -+ case S390_CC_OP_BITWISE: -+ return S390_CC_FOR_BINARY("ogr", cc_dep1, (ULong)0); -+ -+ case S390_CC_OP_SIGNED_COMPARE: -+ return S390_CC_FOR_BINARY("cgr", cc_dep1, cc_dep2); -+ -+ case S390_CC_OP_UNSIGNED_COMPARE: -+ return S390_CC_FOR_BINARY("clgr", cc_dep1, cc_dep2); -+ -+ case S390_CC_OP_SIGNED_ADD_64: -+ return S390_CC_FOR_BINARY("agr", cc_dep1, cc_dep2); -+ -+ case S390_CC_OP_SIGNED_ADD_32: -+ return S390_CC_FOR_BINARY("ar", cc_dep1, cc_dep2); -+ -+ case S390_CC_OP_SIGNED_SUB_64: -+ return S390_CC_FOR_BINARY("sgr", cc_dep1, cc_dep2); -+ -+ case S390_CC_OP_SIGNED_SUB_32: -+ return S390_CC_FOR_BINARY("sr", cc_dep1, cc_dep2); -+ -+ case S390_CC_OP_UNSIGNED_ADD_64: -+ return S390_CC_FOR_BINARY("algr", cc_dep1, cc_dep2); -+ -+ case S390_CC_OP_UNSIGNED_ADD_32: -+ return S390_CC_FOR_BINARY("alr", cc_dep1, cc_dep2); -+ -+ case S390_CC_OP_UNSIGNED_ADDC_64: -+ return S390_CC_FOR_TERNARY_ADDC("alcgr", cc_dep1, cc_dep2, cc_ndep); -+ -+ case S390_CC_OP_UNSIGNED_ADDC_32: -+ return S390_CC_FOR_TERNARY_ADDC("alcr", cc_dep1, cc_dep2, cc_ndep); -+ -+ case S390_CC_OP_UNSIGNED_SUB_64: -+ return S390_CC_FOR_BINARY("slgr", cc_dep1, cc_dep2); -+ -+ case S390_CC_OP_UNSIGNED_SUB_32: -+ return S390_CC_FOR_BINARY("slr", cc_dep1, cc_dep2); -+ -+ case S390_CC_OP_UNSIGNED_SUBB_64: -+ return S390_CC_FOR_TERNARY_SUBB("slbgr", cc_dep1, cc_dep2, cc_ndep); -+ -+ case S390_CC_OP_UNSIGNED_SUBB_32: -+ return S390_CC_FOR_TERNARY_SUBB("slbr", cc_dep1, cc_dep2, cc_ndep); -+ -+ case S390_CC_OP_LOAD_AND_TEST: -+ /* Like signed comparison with 0 */ -+ return S390_CC_FOR_BINARY("cgr", cc_dep1, (Long)0); -+ -+ case S390_CC_OP_TEST_AND_SET: -+ /* Shift the sign bit into the LSB. Note, that the tested value is an -+ 8-bit value which has been zero-extended to 32/64 bit. */ -+ return cc_dep1 >> 7; -+ -+ case S390_CC_OP_LOAD_POSITIVE_32: -+ __asm__ volatile ( -+ "lpr %[result],%[op]\n\t" -+ "ipm %[psw]\n\t" : [psw] "=d"(psw), [result] "=d"(cc_dep1) -+ : [op] "d"(cc_dep1) -+ : "cc"); -+ return psw >> 28; /* cc */ -+ -+ case S390_CC_OP_LOAD_POSITIVE_64: -+ __asm__ volatile ( -+ "lpgr %[result],%[op]\n\t" -+ "ipm %[psw]\n\t" : [psw] "=d"(psw), [result] "=d"(cc_dep1) -+ : [op] "d"(cc_dep1) -+ : "cc"); -+ return psw >> 28; /* cc */ -+ -+ case S390_CC_OP_TEST_UNDER_MASK_8: { -+ UChar value = cc_dep1; -+ UChar mask = cc_dep2; -+ -+ __asm__ volatile ( -+ "bras %%r2,1f\n\t" /* %r2 = address of next insn */ -+ "tm %[value],0\n\t" /* this is skipped, then EXecuted */ -+ "1: ex %[mask],0(%%r2)\n\t" /* EXecute TM after modifying mask */ -+ "ipm %[psw]\n\t" : [psw] "=d"(psw) -+ : [value] "m"(value), [mask] "a"(mask) -+ : "r2", "cc"); -+ return psw >> 28; /* cc */ -+ } -+ -+ case S390_CC_OP_TEST_UNDER_MASK_16: { -+ /* Create a TMLL insn with the mask as given by cc_dep2 */ -+ UInt insn = (0xA701 << 16) | cc_dep2; -+ UInt value = cc_dep1; -+ -+ __asm__ volatile ( -+ "lr 1,%[value]\n\t" -+ "lhi 2,0x10\n\t" -+ "ex 2,%[insn]\n\t" -+ "ipm %[psw]\n\t" : [psw] "=d"(psw) -+ : [value] "d"(value), [insn] "m"(insn) -+ : "r1", "r2", "cc"); -+ return psw >> 28; /* cc */ -+ } -+ -+ case S390_CC_OP_SHIFT_LEFT_32: -+ __asm__ volatile ( -+ "sla %[op],0(%[amount])\n\t" -+ "ipm %[psw]\n\t" : [psw] "=d"(psw), [op] "+d"(cc_dep1) -+ : [amount] "a"(cc_dep2) -+ : "cc"); -+ return psw >> 28; /* cc */ -+ -+ case S390_CC_OP_SHIFT_LEFT_64: { -+ Int high = (Int)(cc_dep1 >> 32); -+ Int low = (Int)(cc_dep1 & 0xFFFFFFFF); -+ -+ __asm__ volatile ( -+ "lr 2,%[high]\n\t" -+ "lr 3,%[low]\n\t" -+ "slda 2,0(%[amount])\n\t" -+ "ipm %[psw]\n\t" : [psw] "=d"(psw), [high] "+d"(high), [low] "+d"(low) -+ : [amount] "a"(cc_dep2) -+ : "cc", "r2", "r3"); -+ return psw >> 28; /* cc */ -+ } -+ -+ case S390_CC_OP_INSERT_CHAR_MASK_32: { -+ Int inserted = 0; -+ Int msb = 0; -+ -+ if (cc_dep2 & 1) { -+ inserted |= cc_dep1 & 0xff; -+ msb = 0x80; -+ } -+ if (cc_dep2 & 2) { -+ inserted |= cc_dep1 & 0xff00; -+ msb = 0x8000; -+ } -+ if (cc_dep2 & 4) { -+ inserted |= cc_dep1 & 0xff0000; -+ msb = 0x800000; -+ } -+ if (cc_dep2 & 8) { -+ inserted |= cc_dep1 & 0xff000000; -+ msb = 0x80000000; -+ } -+ -+ if (inserted & msb) // MSB is 1 -+ return 1; -+ if (inserted > 0) -+ return 2; -+ return 0; -+ } -+ -+ case S390_CC_OP_BFP_RESULT_32: -+ return S390_CC_FOR_BFP_RESULT("ltebr", cc_dep1); -+ -+ case S390_CC_OP_BFP_RESULT_64: -+ return S390_CC_FOR_BFP_RESULT("ltdbr", cc_dep1); -+ -+ case S390_CC_OP_BFP_RESULT_128: -+ return S390_CC_FOR_BFP128_RESULT(cc_dep1, cc_dep2); -+ -+ case S390_CC_OP_BFP_32_TO_INT_32: -+ return S390_CC_FOR_BFP_CONVERT("cfebr", cc_dep1); -+ -+ case S390_CC_OP_BFP_64_TO_INT_32: -+ return S390_CC_FOR_BFP_CONVERT("cfdbr", cc_dep1); -+ -+ case S390_CC_OP_BFP_128_TO_INT_32: -+ return S390_CC_FOR_BFP128_CONVERT("cfxbr", cc_dep1, cc_dep2); -+ -+ case S390_CC_OP_BFP_32_TO_INT_64: -+ return S390_CC_FOR_BFP_CONVERT("cgebr", cc_dep1); -+ -+ case S390_CC_OP_BFP_64_TO_INT_64: -+ return S390_CC_FOR_BFP_CONVERT("cgdbr", cc_dep1); -+ -+ case S390_CC_OP_BFP_128_TO_INT_64: -+ return S390_CC_FOR_BFP128_CONVERT("cgxbr", cc_dep1, cc_dep2); -+ -+ case S390_CC_OP_BFP_TDC_32: -+ return S390_CC_FOR_BFP_TDC("tceb", cc_dep1, cc_dep2); -+ -+ case S390_CC_OP_BFP_TDC_64: -+ return S390_CC_FOR_BFP_TDC("tcdb", cc_dep1, cc_dep2); -+ -+ case S390_CC_OP_BFP_TDC_128: -+ return S390_CC_FOR_BFP128_TDC(cc_dep1, cc_dep2, cc_ndep); -+ -+ case S390_CC_OP_SET: -+ return cc_dep1; -+ -+ default: -+ break; -+ } -+#endif -+ vpanic("s390_calculate_cc"); -+} -+ -+ -+UInt -+s390_calculate_icc(ULong op, ULong dep1, ULong dep2) -+{ -+ return s390_calculate_cc(op, dep1, dep2, 0 /* unused */); -+} -+ -+ -+/* Note that this does *not* return a Boolean value. The result needs to be -+ explicitly tested against zero. */ -+UInt -+s390_calculate_cond(ULong mask, ULong op, ULong dep1, ULong dep2, ULong ndep) -+{ -+ UInt cc = s390_calculate_cc(op, dep1, dep2, ndep); -+ -+ return ((mask << cc) & 0x8); -+} -+ -+/*------------------------------------------------------------*/ -+/*--- spechelper for performance ---*/ -+/*------------------------------------------------------------*/ -+ -+ -+/* Convenience macros */ -+#define unop(op,a1) IRExpr_Unop((op),(a1)) -+#define binop(op,a1,a2) IRExpr_Binop((op),(a1),(a2)) -+#define mkU64(v) IRExpr_Const(IRConst_U64(v)) -+#define mkU32(v) IRExpr_Const(IRConst_U32(v)) -+#define mkU8(v) IRExpr_Const(IRConst_U8(v)) -+ -+ -+static inline Bool -+isC64(IRExpr *expr) -+{ -+ return expr->tag == Iex_Const && expr->Iex.Const.con->tag == Ico_U64; -+} -+ -+ -+/* The returned expression is NULL if no specialization was found. In that -+ case the helper function will be called. Otherwise, the expression has -+ type Ity_I32 and a Boolean value. */ -+IRExpr * -+guest_s390x_spechelper(HChar *function_name, IRExpr **args, -+ IRStmt **precedingStmts, Int n_precedingStmts) -+{ -+ UInt i, arity = 0; -+ -+ for (i = 0; args[i]; i++) -+ arity++; -+ -+# if 0 -+ vex_printf("spec request:\n"); -+ vex_printf(" %s ", function_name); -+ for (i = 0; i < arity; i++) { -+ vex_printf(" "); -+ ppIRExpr(args[i]); -+ } -+ vex_printf("\n"); -+# endif -+ -+ /* --------- Specialising "s390_calculate_cond" --------- */ -+ -+ if (vex_streq(function_name, "s390_calculate_cond")) { -+ IRExpr *cond_expr, *cc_op_expr, *cc_dep1, *cc_dep2; -+ ULong cond, cc_op; -+ -+ vassert(arity == 5); -+ -+ cond_expr = args[0]; -+ cc_op_expr = args[1]; -+ -+ /* The necessary requirement for all optimizations here is that the -+ condition and the cc_op are constant. So check that upfront. */ -+ if (! isC64(cond_expr)) return NULL; -+ if (! isC64(cc_op_expr)) return NULL; -+ -+ cond = cond_expr->Iex.Const.con->Ico.U64; -+ cc_op = cc_op_expr->Iex.Const.con->Ico.U64; -+ -+ vassert(cond <= 15); -+ -+ /* -+ +------+---+---+---+---+ -+ | cc | 0 | 1 | 2 | 3 | -+ | cond | 8 | 4 | 2 | 1 | -+ +------+---+---+---+---+ -+ */ -+ cc_dep1 = args[2]; -+ cc_dep2 = args[3]; -+ -+ /* S390_CC_OP_SIGNED_COMPARE */ -+ if (cc_op == S390_CC_OP_SIGNED_COMPARE) { -+ /* -+ cc == 0 --> cc_dep1 == cc_dep2 (cond == 8) -+ cc == 1 --> cc_dep1 < cc_dep2 (cond == 4) -+ cc == 2 --> cc_dep1 > cc_dep2 (cond == 2) -+ -+ Because cc == 3 cannot occur the rightmost bit of cond is -+ a don't care. -+ */ -+ if (cond == 8 || cond == 8 + 1) { -+ return unop(Iop_1Uto32, binop(Iop_CmpEQ64, cc_dep1, cc_dep2)); -+ } -+ if (cond == 4 + 2 || cond == 4 + 2 + 1) { -+ return unop(Iop_1Uto32, binop(Iop_CmpNE64, cc_dep1, cc_dep2)); -+ } -+ if (cond == 4 || cond == 4 + 1) { -+ return unop(Iop_1Uto32, binop(Iop_CmpLT64S, cc_dep1, cc_dep2)); -+ } -+ if (cond == 8 + 4 || cond == 8 + 4 + 1) { -+ return unop(Iop_1Uto32, binop(Iop_CmpLE64S, cc_dep1, cc_dep2)); -+ } -+ /* cc_dep1 > cc_dep2 ----> cc_dep2 < cc_dep1 */ -+ if (cond == 2 || cond == 2 + 1) { -+ return unop(Iop_1Uto32, binop(Iop_CmpLT64S, cc_dep2, cc_dep1)); -+ } -+ if (cond == 8 + 2 || cond == 8 + 2 + 1) { -+ return unop(Iop_1Uto32, binop(Iop_CmpLE64S, cc_dep2, cc_dep1)); -+ } -+ if (cond == 8 + 4 + 2 || cond == 8 + 4 + 2 + 1) { -+ return mkU32(1); -+ } -+ /* Remaining case */ -+ return mkU32(0); -+ } -+ -+ /* S390_CC_OP_UNSIGNED_COMPARE */ -+ if (cc_op == S390_CC_OP_UNSIGNED_COMPARE) { -+ /* -+ cc == 0 --> cc_dep1 == cc_dep2 (cond == 8) -+ cc == 1 --> cc_dep1 < cc_dep2 (cond == 4) -+ cc == 2 --> cc_dep1 > cc_dep2 (cond == 2) -+ -+ Because cc == 3 cannot occur the rightmost bit of cond is -+ a don't care. -+ */ -+ if (cond == 8 || cond == 8 + 1) { -+ return unop(Iop_1Uto32, binop(Iop_CmpEQ64, cc_dep1, cc_dep2)); -+ } -+ if (cond == 4 + 2 || cond == 4 + 2 + 1) { -+ return unop(Iop_1Uto32, binop(Iop_CmpNE64, cc_dep1, cc_dep2)); -+ } -+ if (cond == 4 || cond == 4 + 1) { -+ return unop(Iop_1Uto32, binop(Iop_CmpLT64U, cc_dep1, cc_dep2)); -+ } -+ if (cond == 8 + 4 || cond == 8 + 4 + 1) { -+ return unop(Iop_1Uto32, binop(Iop_CmpLE64U, cc_dep1, cc_dep2)); -+ } -+ /* cc_dep1 > cc_dep2 ----> cc_dep2 < cc_dep1 */ -+ if (cond == 2 || cond == 2 + 1) { -+ return unop(Iop_1Uto32, binop(Iop_CmpLT64U, cc_dep2, cc_dep1)); -+ } -+ if (cond == 8 + 2 || cond == 8 + 2 + 1) { -+ return unop(Iop_1Uto32, binop(Iop_CmpLE64U, cc_dep2, cc_dep1)); -+ } -+ if (cond == 8 + 4 + 2 || cond == 8 + 4 + 2 + 1) { -+ return mkU32(1); -+ } -+ /* Remaining case */ -+ return mkU32(0); -+ } -+ -+ /* S390_CC_OP_LOAD_AND_TEST */ -+ if (cc_op == S390_CC_OP_LOAD_AND_TEST) { -+ /* -+ cc == 0 --> cc_dep1 == 0 (cond == 8) -+ cc == 1 --> cc_dep1 < 0 (cond == 4) -+ cc == 2 --> cc_dep1 > 0 (cond == 2) -+ -+ Because cc == 3 cannot occur the rightmost bit of cond is -+ a don't care. -+ */ -+ if (cond == 8 || cond == 8 + 1) { -+ return unop(Iop_1Uto32, binop(Iop_CmpEQ64, cc_dep1, mkU64(0))); -+ } -+ if (cond == 4 + 2 || cond == 4 + 2 + 1) { -+ return unop(Iop_1Uto32, binop(Iop_CmpNE64, cc_dep1, mkU64(0))); -+ } -+ if (cond == 4 || cond == 4 + 1) { -+ return unop(Iop_1Uto32, binop(Iop_CmpLT64S, cc_dep1, mkU64(0))); -+ } -+ if (cond == 8 + 4 || cond == 8 + 4 + 1) { -+ return unop(Iop_1Uto32, binop(Iop_CmpLE64S, cc_dep1, mkU64(0))); -+ } -+ /* cc_dep1 > 0 ----> 0 < cc_dep1 */ -+ if (cond == 2 || cond == 2 + 1) { -+ return unop(Iop_1Uto32, binop(Iop_CmpLT64S, mkU64(0), cc_dep1)); -+ } -+ if (cond == 8 + 2 || cond == 8 + 2 + 1) { -+ return unop(Iop_1Uto32, binop(Iop_CmpLE64S, mkU64(0), cc_dep1)); -+ } -+ if (cond == 8 + 4 + 2 || cond == 8 + 4 + 2 + 1) { -+ return mkU32(1); -+ } -+ /* Remaining case */ -+ return mkU32(0); -+ } -+ -+ /* S390_CC_OP_BITWISE */ -+ if (cc_op == S390_CC_OP_BITWISE) { -+ /* -+ cc_dep1 is the result of the boolean operation. -+ -+ cc == 0 --> cc_dep1 == 0 (cond == 8) -+ cc == 1 --> cc_dep1 != 0 (cond == 4) -+ -+ Because cc == 2 and cc == 3 cannot occur the two rightmost bits of -+ cond are don't cares. Therefore: -+ -+ cond == 00xx -> always false -+ cond == 01xx -> not equal -+ cond == 10xx -> equal -+ cond == 11xx -> always true -+ */ -+ if ((cond & (8 + 4)) == 8 + 4) { -+ return mkU32(1); -+ } -+ if (cond & 8) { -+ return unop(Iop_1Uto32, binop(Iop_CmpEQ64, cc_dep1, mkU64(0))); -+ } -+ if (cond & 4) { -+ return unop(Iop_1Uto32, binop(Iop_CmpNE64, cc_dep1, mkU64(0))); -+ } -+ /* Remaining case */ -+ return mkU32(0); -+ } -+ -+ /* S390_CC_OP_INSERT_CHAR_MASK_32 -+ Since the mask comes from an immediate field in the opcode, we -+ expect the mask to be a constant here. That simplifies matters. */ -+ if (cc_op == S390_CC_OP_INSERT_CHAR_MASK_32) { -+ ULong mask; -+ UInt imask = 0, shift = 0; -+ IRExpr *word; -+ -+ if (! isC64(cc_dep2)) goto missed; -+ -+ mask = cc_dep2->Iex.Const.con->Ico.U64; -+ -+ /* Extract the 32-bit value from the thunk */ -+ -+ word = unop(Iop_64to32, cc_dep1); -+ -+ switch (mask) { -+ case 0: shift = 0; imask = 0x00000000; break; -+ case 1: shift = 24; imask = 0x000000FF; break; -+ case 2: shift = 16; imask = 0x0000FF00; break; -+ case 3: shift = 16; imask = 0x0000FFFF; break; -+ case 4: shift = 8; imask = 0x00FF0000; break; -+ case 5: shift = 8; imask = 0x00FF00FF; break; -+ case 6: shift = 8; imask = 0x00FFFF00; break; -+ case 7: shift = 8; imask = 0x00FFFFFF; break; -+ case 8: shift = 0; imask = 0xFF000000; break; -+ case 9: shift = 0; imask = 0xFF0000FF; break; -+ case 10: shift = 0; imask = 0xFF00FF00; break; -+ case 11: shift = 0; imask = 0xFF00FFFF; break; -+ case 12: shift = 0; imask = 0xFFFF0000; break; -+ case 13: shift = 0; imask = 0xFFFF00FF; break; -+ case 14: shift = 0; imask = 0xFFFFFF00; break; -+ case 15: shift = 0; imask = 0xFFFFFFFF; break; -+ } -+ -+ /* Select the bits that were inserted */ -+ word = binop(Iop_And32, word, mkU32(imask)); -+ -+ /* cc == 0 --> all inserted bits zero or mask == 0 (cond == 8) -+ cc == 1 --> leftmost inserted bit is one (cond == 4) -+ cc == 2 --> leftmost inserted bit is zero and not (cond == 2) -+ all inserted bits are zero -+ -+ Because cc == 0,1,2 the rightmost bit of the mask is a don't care */ -+ if (cond == 8 || cond == 8 + 1) { -+ return unop(Iop_1Uto32, binop(Iop_CmpEQ32, word, mkU32(0))); -+ } -+ if (cond == 4 + 2 || cond == 4 + 2 + 1) { -+ return unop(Iop_1Uto32, binop(Iop_CmpNE32, word, mkU32(0))); -+ } -+ -+ /* Sign extend */ -+ if (shift != 0) { -+ word = binop(Iop_Sar32, binop(Iop_Shl32, word, mkU8(shift)), -+ mkU8(shift)); -+ } -+ -+ if (cond == 4 || cond == 4 + 1) { /* word < 0 */ -+ return unop(Iop_1Uto32, binop(Iop_CmpLT32S, word, mkU32(0))); -+ } -+ if (cond == 2 || cond == 2 + 1) { /* word > 0 */ -+ return unop(Iop_1Uto32, binop(Iop_CmpLT32S, mkU32(0), word)); -+ } -+ if (cond == 8 + 4 || cond == 8 + 4 + 1) { -+ return unop(Iop_1Uto32, binop(Iop_CmpLE32S, word, mkU32(0))); -+ } -+ if (cond == 8 + 2 || cond == 8 + 2 + 1) { -+ return unop(Iop_1Uto32, binop(Iop_CmpLE32S, mkU32(0), word)); -+ } -+ if (cond == 8 + 4 + 2 || cond == 8 + 4 + 2 + 1) { -+ return mkU32(1); -+ } -+ /* Remaining case */ -+ return mkU32(0); -+ } -+ -+ /* S390_CC_OP_TEST_UNDER_MASK_8 -+ Since the mask comes from an immediate field in the opcode, we -+ expect the mask to be a constant here. That simplifies matters. */ -+ if (cc_op == S390_CC_OP_TEST_UNDER_MASK_8) { -+ ULong mask16; -+ -+ if (! isC64(cc_dep2)) goto missed; -+ -+ mask16 = cc_dep2->Iex.Const.con->Ico.U64; -+ -+ /* Get rid of the mask16 == 0 case first. Some of the simplifications -+ below (e.g. for OVFL) only hold if mask16 == 0. */ -+ if (mask16 == 0) { /* cc == 0 */ -+ if (cond & 0x8) return mkU32(1); -+ return mkU32(0); -+ } -+ -+ /* cc == 2 is a don't care */ -+ if (cond == 8 || cond == 8 + 2) { -+ return unop(Iop_1Uto32, binop(Iop_CmpEQ64, -+ binop(Iop_And64, cc_dep1, cc_dep2), -+ mkU64(0))); -+ } -+ if (cond == 7 || cond == 7 - 2) { -+ return unop(Iop_1Uto32, binop(Iop_CmpNE64, -+ binop(Iop_And64, cc_dep1, cc_dep2), -+ mkU64(0))); -+ } -+ if (cond == 1 || cond == 1 + 2) { -+ return unop(Iop_1Uto32, binop(Iop_CmpEQ64, -+ binop(Iop_And64, cc_dep1, cc_dep2), -+ cc_dep2)); -+ } -+ if (cond == 14 || cond == 14 - 2) { /* ! OVFL */ -+ return unop(Iop_1Uto32, binop(Iop_CmpNE64, -+ binop(Iop_And64, cc_dep1, cc_dep2), -+ cc_dep2)); -+ } -+ goto missed; -+ } -+ -+ /* S390_CC_OP_TEST_UNDER_MASK_16 -+ Since the mask comes from an immediate field in the opcode, we -+ expect the mask to be a constant here. That simplifies matters. */ -+ if (cc_op == S390_CC_OP_TEST_UNDER_MASK_16) { -+ ULong mask16; -+ UInt msb; -+ -+ if (! isC64(cc_dep2)) goto missed; -+ -+ mask16 = cc_dep2->Iex.Const.con->Ico.U64; -+ -+ /* Get rid of the mask16 == 0 case first. Some of the simplifications -+ below (e.g. for OVFL) only hold if mask16 == 0. */ -+ if (mask16 == 0) { /* cc == 0 */ -+ if (cond & 0x8) return mkU32(1); -+ return mkU32(0); -+ } -+ -+ if (cond == 8) { -+ return unop(Iop_1Uto32, binop(Iop_CmpEQ64, -+ binop(Iop_And64, cc_dep1, cc_dep2), -+ mkU64(0))); -+ } -+ if (cond == 7) { -+ return unop(Iop_1Uto32, binop(Iop_CmpNE64, -+ binop(Iop_And64, cc_dep1, cc_dep2), -+ mkU64(0))); -+ } -+ if (cond == 1) { -+ return unop(Iop_1Uto32, binop(Iop_CmpEQ64, -+ binop(Iop_And64, cc_dep1, cc_dep2), -+ mkU64(mask16))); -+ } -+ if (cond == 14) { /* ! OVFL */ -+ return unop(Iop_1Uto32, binop(Iop_CmpNE64, -+ binop(Iop_And64, cc_dep1, cc_dep2), -+ mkU64(mask16))); -+ } -+ -+ /* Find MSB in mask */ -+ msb = 0x8000; -+ while (msb > mask16) -+ msb >>= 1; -+ -+ if (cond == 2) { /* cc == 2 */ -+ IRExpr *c1, *c2; -+ -+ /* (cc_dep & msb) != 0 && (cc_dep & mask16) != mask16 */ -+ c1 = binop(Iop_CmpNE64, -+ binop(Iop_And64, cc_dep1, mkU64(msb)), mkU64(0)); -+ c2 = binop(Iop_CmpNE64, -+ binop(Iop_And64, cc_dep1, cc_dep2), -+ mkU64(mask16)); -+ return binop(Iop_And32, unop(Iop_1Uto32, c1), -+ unop(Iop_1Uto32, c2)); -+ } -+ -+ if (cond == 4) { /* cc == 1 */ -+ IRExpr *c1, *c2; -+ -+ /* (cc_dep & msb) == 0 && (cc_dep & mask16) != 0 */ -+ c1 = binop(Iop_CmpEQ64, -+ binop(Iop_And64, cc_dep1, mkU64(msb)), mkU64(0)); -+ c2 = binop(Iop_CmpNE64, -+ binop(Iop_And64, cc_dep1, cc_dep2), -+ mkU64(0)); -+ return binop(Iop_And32, unop(Iop_1Uto32, c1), -+ unop(Iop_1Uto32, c2)); -+ } -+ -+ if (cond == 11) { /* cc == 0,2,3 */ -+ IRExpr *c1, *c2; -+ -+ c1 = binop(Iop_CmpNE64, -+ binop(Iop_And64, cc_dep1, mkU64(msb)), mkU64(0)); -+ c2 = binop(Iop_CmpEQ64, -+ binop(Iop_And64, cc_dep1, cc_dep2), -+ mkU64(0)); -+ return binop(Iop_Or32, unop(Iop_1Uto32, c1), -+ unop(Iop_1Uto32, c2)); -+ } -+ -+ if (cond == 3) { /* cc == 2 || cc == 3 */ -+ return unop(Iop_1Uto32, -+ binop(Iop_CmpNE64, -+ binop(Iop_And64, cc_dep1, mkU64(msb)), -+ mkU64(0))); -+ } -+ if (cond == 12) { /* cc == 0 || cc == 1 */ -+ return unop(Iop_1Uto32, -+ binop(Iop_CmpEQ64, -+ binop(Iop_And64, cc_dep1, mkU64(msb)), -+ mkU64(0))); -+ } -+ // vex_printf("TUM mask = 0x%llx\n", mask16); -+ goto missed; -+ } -+ -+ /* S390_CC_OP_UNSIGNED_SUB_64/32 */ -+ if (cc_op == S390_CC_OP_UNSIGNED_SUB_64 || -+ cc_op == S390_CC_OP_UNSIGNED_SUB_32) { -+ /* -+ cc_dep1, cc_dep2 are the zero extended left and right operands -+ -+ cc == 1 --> result != 0, borrow (cond == 4) -+ cc == 2 --> result == 0, no borrow (cond == 2) -+ cc == 3 --> result != 0, no borrow (cond == 1) -+ -+ cc = (cc_dep1 == cc_dep2) ? 2 -+ : (cc_dep1 > cc_dep2) ? 3 : 1; -+ -+ Because cc == 0 cannot occur the leftmost bit of cond is -+ a don't care. -+ */ -+ if (cond == 1 || cond == 1 + 8) { /* cc == 3 op2 < op1 */ -+ return unop(Iop_1Uto32, binop(Iop_CmpLT64U, cc_dep2, cc_dep1)); -+ } -+ if (cond == 2 || cond == 2 + 8) { /* cc == 2 */ -+ return unop(Iop_1Uto32, binop(Iop_CmpEQ64, cc_dep1, cc_dep2)); -+ } -+ if (cond == 4 || cond == 4 + 8) { /* cc == 1 */ -+ return unop(Iop_1Uto32, binop(Iop_CmpLT64U, cc_dep1, cc_dep2)); -+ } -+ if (cond == 3 || cond == 3 + 8) { /* cc == 2 || cc == 3 */ -+ return unop(Iop_1Uto32, binop(Iop_CmpLE64U, cc_dep2, cc_dep1)); -+ } -+ if (cond == 6 || cond == 6 + 8) { /* cc == 2 || cc == 1 */ -+ return unop(Iop_1Uto32, binop(Iop_CmpLE64U, cc_dep1, cc_dep2)); -+ } -+ -+ if (cond == 5 || cond == 5 + 8) { /* cc == 3 || cc == 1 */ -+ return unop(Iop_1Uto32, binop(Iop_CmpNE64, cc_dep1, cc_dep2)); -+ } -+ if (cond == 7 || cond == 7 + 8) { -+ return mkU32(1); -+ } -+ /* Remaining case */ -+ return mkU32(0); -+ } -+ -+ /* S390_CC_OP_UNSIGNED_ADD_64 */ -+ if (cc_op == S390_CC_OP_UNSIGNED_ADD_64) { -+ /* -+ cc_dep1, cc_dep2 are the zero extended left and right operands -+ -+ cc == 0 --> result == 0, no carry (cond == 8) -+ cc == 1 --> result != 0, no carry (cond == 4) -+ cc == 2 --> result == 0, carry (cond == 2) -+ cc == 3 --> result != 0, carry (cond == 1) -+ */ -+ if (cond == 8) { /* cc == 0 */ -+ /* Both inputs are 0 */ -+ return unop(Iop_1Uto32, binop(Iop_CmpEQ64, -+ binop(Iop_Or64, cc_dep1, cc_dep2), -+ mkU64(0))); -+ } -+ if (cond == 7) { /* cc == 1,2,3 */ -+ /* Not both inputs are 0 */ -+ return unop(Iop_1Uto32, binop(Iop_CmpNE64, -+ binop(Iop_Or64, cc_dep1, cc_dep2), -+ mkU64(0))); -+ } -+ if (cond == 8 + 2) { /* cc == 0,2 -> result is zero */ -+ return unop(Iop_1Uto32, binop(Iop_CmpEQ64, -+ binop(Iop_Add64, cc_dep1, cc_dep2), -+ mkU64(0))); -+ } -+ if (cond == 4 + 1) { /* cc == 1,3 -> result is not zero */ -+ return unop(Iop_1Uto32, binop(Iop_CmpNE64, -+ binop(Iop_Add64, cc_dep1, cc_dep2), -+ mkU64(0))); -+ } -+ goto missed; -+ } -+ -+ /* S390_CC_OP_UNSIGNED_ADD_32 */ -+ if (cc_op == S390_CC_OP_UNSIGNED_ADD_32) { -+ /* -+ cc_dep1, cc_dep2 are the zero extended left and right operands -+ -+ cc == 0 --> result == 0, no carry (cond == 8) -+ cc == 1 --> result != 0, no carry (cond == 4) -+ cc == 2 --> result == 0, carry (cond == 2) -+ cc == 3 --> result != 0, carry (cond == 1) -+ */ -+ if (cond == 8) { /* cc == 0 */ -+ /* Both inputs are 0 */ -+ return unop(Iop_1Uto32, binop(Iop_CmpEQ64, -+ binop(Iop_Or64, cc_dep1, cc_dep2), -+ mkU64(0))); -+ } -+ if (cond == 7) { /* cc == 1,2,3 */ -+ /* Not both inputs are 0 */ -+ return unop(Iop_1Uto32, binop(Iop_CmpNE64, -+ binop(Iop_Or64, cc_dep1, cc_dep2), -+ mkU64(0))); -+ } -+ if (cond == 8 + 2) { /* cc == 0,2 -> result is zero */ -+ return unop(Iop_1Uto32, binop(Iop_CmpEQ32, -+ binop(Iop_Add32, -+ unop(Iop_64to32, cc_dep1), -+ unop(Iop_64to32, cc_dep2)), -+ mkU32(0))); -+ } -+ if (cond == 4 + 1) { /* cc == 1,3 -> result is not zero */ -+ return unop(Iop_1Uto32, binop(Iop_CmpNE32, -+ binop(Iop_Add32, -+ unop(Iop_64to32, cc_dep1), -+ unop(Iop_64to32, cc_dep2)), -+ mkU32(0))); -+ } -+ goto missed; -+ } -+ -+ /* S390_CC_OP_SET */ -+ if (cc_op == S390_CC_OP_SET) { -+ /* cc_dep1 is the condition code -+ -+ Return 1, if ((cond << cc_dep1) & 0x8) != 0 */ -+ -+ return unop(Iop_1Uto32, -+ binop(Iop_CmpNE64, -+ binop(Iop_And64, -+ binop(Iop_Shl64, cond_expr, -+ unop(Iop_64to8, cc_dep1)), -+ mkU64(8)), -+ mkU64(0))); -+ } -+ -+ /* S390_CC_OP_TEST_AND_SET */ -+ if (cc_op == S390_CC_OP_TEST_AND_SET) { -+ /* cc_dep1 is the zero-extended loaded value -+ -+ cc == 0 --> leftmost bit is zero (cond == 8) -+ cc == 1 --> leftmost bit is one (cond == 4) -+ -+ As cc is either 0 or 1, only the two leftmost bits of the mask -+ are relevant. */ -+ IRExpr *bit = binop(Iop_Shr64, cc_dep1, mkU8(7)); -+ -+ switch (cond & (8 + 4)) { -+ case 0: return mkU32(0); -+ case 4: return unop(Iop_1Uto32, binop(Iop_CmpNE64, bit, mkU64(0))); -+ case 8: return unop(Iop_1Uto32, binop(Iop_CmpEQ64, bit, mkU64(0))); -+ case 8 + 4: return mkU32(1); -+ } -+ /* not reached */ -+ } -+ -+missed: -+ ; -+ } -+ -+ return NULL; -+} -+ -+/*---------------------------------------------------------------*/ -+/*--- end guest_s390_helpers.c ---*/ -+/*---------------------------------------------------------------*/ ---- VEX/priv/guest_s390_toIR.c -+++ VEX/priv/guest_s390_toIR.c -@@ -0,0 +1,12855 @@ -+/* -*- mode: C; c-basic-offset: 3; -*- */ -+ -+/*---------------------------------------------------------------*/ -+/*--- begin guest_s390_toIR.c ---*/ -+/*---------------------------------------------------------------*/ -+ -+/* -+ This file is part of Valgrind, a dynamic binary instrumentation -+ framework. -+ -+ Copyright IBM Corp. 2010,2011 -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA -+ 02110-1301, USA. -+ -+ The GNU General Public License is contained in the file COPYING. -+*/ -+ -+/* Contributed by Florian Krohm and Christian Borntraeger */ -+ -+/* Translates s390 code to IR. */ -+ -+#include "libvex_basictypes.h" -+#include "libvex_ir.h" -+#include "libvex_guest_s390x.h" /* VexGuestS390XState */ -+#include "libvex.h" /* needed for bb_to_IR.h */ -+#include "libvex_guest_offsets.h" /* OFFSET_s390x_SYSNO */ -+ -+#include "main_util.h" /* vassert */ -+#include "main_globals.h" /* vex_traceflags */ -+#include "guest_generic_bb_to_IR.h" /* DisResult */ -+#include "guest_s390_defs.h" /* prototypes for this file's functions */ -+#include "host_s390_disasm.h" -+#include "host_s390_defs.h" /* S390_ROUND_xyzzy */ -+ -+#undef likely -+#undef unlikely -+#define likely(x) __builtin_expect(!!(x), 1) -+#define unlikely(x) __builtin_expect(!!(x), 0) -+ -+ -+ -+/*------------------------------------------------------------*/ -+/*--- Globals ---*/ -+/*------------------------------------------------------------*/ -+ -+/* The IRSB* into which we're generating code. */ -+static IRSB *irsb; -+ -+/* The guest address for the instruction currently being -+ translated. */ -+static Addr64 guest_IA_curr_instr; -+ -+/* The guest address for the instruction following the current instruction. */ -+static Addr64 guest_IA_next_instr; -+ -+/* Result of disassembly step. */ -+static DisResult *dis_res; -+ -+/* The last seen execute target instruction */ -+ULong last_execute_target; -+ -+/* The possible outcomes of a decoding operation */ -+typedef enum { -+ S390_DECODE_OK, -+ S390_DECODE_UNKNOWN_INSN, -+ S390_DECODE_UNIMPLEMENTED_INSN, -+ S390_DECODE_UNKNOWN_SPECIAL_INSN, -+ S390_DECODE_ERROR -+} s390_decode_t; -+ -+/*------------------------------------------------------------*/ -+/*--- Helpers for constructing IR. ---*/ -+/*------------------------------------------------------------*/ -+ -+/* Sign extend a value with the given number of bits. This is a -+ macro because it allows us to overload the type of the value. -+ Note that VALUE must have a signed type! */ -+#undef sign_extend -+#define sign_extend(value,num_bits) \ -+(((value) << (sizeof(__typeof__(value)) * 8 - (num_bits))) >> \ -+ (sizeof(__typeof__(value)) * 8 - (num_bits))) -+ -+ -+/* Add a statement to the current irsb. */ -+static __inline__ void -+stmt(IRStmt *st) -+{ -+ addStmtToIRSB(irsb, st); -+} -+ -+/* Allocate a new temporary of the given type. */ -+static __inline__ IRTemp -+newTemp(IRType type) -+{ -+ vassert(isPlausibleIRType(type)); -+ -+ return newIRTemp(irsb->tyenv, type); -+} -+ -+/* Create an expression node for a temporary */ -+static __inline__ IRExpr * -+mkexpr(IRTemp tmp) -+{ -+ return IRExpr_RdTmp(tmp); -+} -+ -+/* Add a statement that assigns to a temporary */ -+static __inline__ void -+assign(IRTemp dst, IRExpr *expr) -+{ -+ stmt(IRStmt_WrTmp(dst, expr)); -+} -+ -+/* Create a temporary of the given type and assign the expression to it */ -+static __inline__ IRTemp -+mktemp(IRType type, IRExpr *expr) -+{ -+ IRTemp temp = newTemp(type); -+ -+ assign(temp, expr); -+ -+ return temp; -+} -+ -+/* Create a unary expression */ -+static __inline__ IRExpr * -+unop(IROp kind, IRExpr *op) -+{ -+ return IRExpr_Unop(kind, op); -+} -+ -+/* Create a binary expression */ -+static __inline__ IRExpr * -+binop(IROp kind, IRExpr *op1, IRExpr *op2) -+{ -+ return IRExpr_Binop(kind, op1, op2); -+} -+ -+/* Create a ternary expression */ -+static __inline__ IRExpr * -+triop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3) -+{ -+ return IRExpr_Triop(kind, op1, op2, op3); -+} -+ -+/* Create a quaternary expression */ -+static __inline__ IRExpr * -+qop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3, IRExpr *op4) -+{ -+ return IRExpr_Qop(kind, op1, op2, op3, op4); -+} -+ -+/* Create an expression node for an 8-bit integer constant */ -+static __inline__ IRExpr * -+mkU8(UInt value) -+{ -+ vassert(value < 256); -+ -+ return IRExpr_Const(IRConst_U8((UChar)value)); -+} -+ -+/* Create an expression node for a 16-bit integer constant */ -+static __inline__ IRExpr * -+mkU16(UInt value) -+{ -+ vassert(value < 65536); -+ -+ return IRExpr_Const(IRConst_U16((UShort)value)); -+} -+ -+/* Create an expression node for a 32-bit integer constant */ -+static __inline__ IRExpr * -+mkU32(UInt value) -+{ -+ return IRExpr_Const(IRConst_U32(value)); -+} -+ -+/* Create an expression node for a 64-bit integer constant */ -+static __inline__ IRExpr * -+mkU64(ULong value) -+{ -+ return IRExpr_Const(IRConst_U64(value)); -+} -+ -+/* Create an expression node for a 32-bit floating point constant -+ whose value is given by a bit pattern. */ -+static __inline__ IRExpr * -+mkF32i(UInt value) -+{ -+ return IRExpr_Const(IRConst_F32i(value)); -+} -+ -+/* Create an expression node for a 32-bit floating point constant -+ whose value is given by a bit pattern. */ -+static __inline__ IRExpr * -+mkF64i(ULong value) -+{ -+ return IRExpr_Const(IRConst_F64i(value)); -+} -+ -+/* Little helper function for my sanity. ITE = if-then-else */ -+static IRExpr * -+mkite(IRExpr *condition, IRExpr *iftrue, IRExpr *iffalse) -+{ -+ vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1); -+ -+ return IRExpr_Mux0X(unop(Iop_1Uto8, condition), iffalse, iftrue); -+} -+ -+/* Add a statement that stores DATA at ADDR. This is a big-endian machine. */ -+static void __inline__ -+store(IRExpr *addr, IRExpr *data) -+{ -+ stmt(IRStmt_Store(Iend_BE, addr, data)); -+} -+ -+/* Create an expression that loads a TYPE sized value from ADDR. -+ This is a big-endian machine. */ -+static __inline__ IRExpr * -+load(IRType type, IRExpr *addr) -+{ -+ return IRExpr_Load(Iend_BE, type, addr); -+} -+ -+/* Function call */ -+static void -+call_function(IRExpr *callee_address) -+{ -+ irsb->next = callee_address; -+ irsb->jumpkind = Ijk_Call; -+ -+ dis_res->whatNext = Dis_StopHere; -+} -+ -+/* Function return sequence */ -+static void -+return_from_function(IRExpr *return_address) -+{ -+ irsb->next = return_address; -+ irsb->jumpkind = Ijk_Ret; -+ -+ dis_res->whatNext = Dis_StopHere; -+} -+ -+/* A conditional branch whose target is not known at instrumentation time. -+ -+ if (condition) goto computed_target; -+ -+ Needs to be represented as: -+ -+ if (! condition) goto next_instruction; -+ goto computed_target; -+ -+ This inversion is being handled at code generation time. So we just -+ take the condition here as is. -+*/ -+static void -+if_not_condition_goto_computed(IRExpr *condition, IRExpr *target) -+{ -+ vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1); -+ -+ stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(guest_IA_next_instr))); -+ -+ irsb->next = target; -+ irsb->jumpkind = Ijk_Boring; -+ -+ dis_res->whatNext = Dis_StopHere; -+} -+ -+/* A conditional branch whose target is known at instrumentation time. */ -+static void -+if_condition_goto(IRExpr *condition, Addr64 target) -+{ -+ vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1); -+ -+ stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(target))); -+ dis_res->whatNext = Dis_Continue; -+} -+ -+/* An unconditional branch. Target may or may not be known at instrumentation -+ time. */ -+static void -+always_goto(IRExpr *target) -+{ -+ irsb->next = target; -+ irsb->jumpkind = Ijk_Boring; -+ -+ dis_res->whatNext = Dis_StopHere; -+} -+ -+/* A system call */ -+static void -+system_call(IRExpr *sysno) -+{ -+ /* Store the system call number in the pseudo register. */ -+ stmt(IRStmt_Put(OFFSET_s390x_SYSNO, sysno)); -+ -+ /* Store the current IA into guest_IP_AT_SYSCALL. libvex_ir.h says so. -+ fixs390: As we do not use it, can we get rid of it ?? */ -+ stmt(IRStmt_Put(OFFSET_s390x_IP_AT_SYSCALL, mkU64(guest_IA_curr_instr))); -+ -+ /* It's important that all ArchRegs carry their up-to-date value -+ at this point. So we declare an end-of-block here, which -+ forces any TempRegs caching ArchRegs to be flushed. */ -+ irsb->next = mkU64(guest_IA_next_instr); -+ -+ irsb->jumpkind = Ijk_Sys_syscall; -+ -+ dis_res->whatNext = Dis_StopHere; -+} -+ -+/* Encode the s390 rounding mode as it appears in the m3/m4 fields of certain -+ instructions to VEX's IRRoundingMode. */ -+static IRRoundingMode -+encode_rounding_mode(UChar mode) -+{ -+ switch (mode) { -+ case S390_ROUND_NEAREST_EVEN: return Irrm_NEAREST; -+ case S390_ROUND_ZERO: return Irrm_ZERO; -+ case S390_ROUND_POSINF: return Irrm_PosINF; -+ case S390_ROUND_NEGINF: return Irrm_NegINF; -+ } -+ vpanic("encode_rounding_mode"); -+} -+ -+static __inline__ IRExpr *get_fpr_dw0(UInt); -+static __inline__ void put_fpr_dw0(UInt, IRExpr *); -+ -+/* Read a floating point register pair and combine their contents into a -+ 128-bit value */ -+static IRExpr * -+get_fpr_pair(UInt archreg) -+{ -+ IRExpr *high = get_fpr_dw0(archreg); -+ IRExpr *low = get_fpr_dw0(archreg + 2); -+ -+ return binop(Iop_F64HLtoF128, high, low); -+} -+ -+/* Write a 128-bit floating point value into a register pair. */ -+static void -+put_fpr_pair(UInt archreg, IRExpr *expr) -+{ -+ IRExpr *high = unop(Iop_F128HItoF64, expr); -+ IRExpr *low = unop(Iop_F128LOtoF64, expr); -+ -+ put_fpr_dw0(archreg, high); -+ put_fpr_dw0(archreg + 2, low); -+} -+ -+ -+/* Flags thunk offsets */ -+#define S390X_GUEST_OFFSET_CC_OP S390_GUEST_OFFSET(guest_CC_OP) -+#define S390X_GUEST_OFFSET_CC_DEP1 S390_GUEST_OFFSET(guest_CC_DEP1) -+#define S390X_GUEST_OFFSET_CC_DEP2 S390_GUEST_OFFSET(guest_CC_DEP2) -+#define S390X_GUEST_OFFSET_CC_NDEP S390_GUEST_OFFSET(guest_CC_NDEP) -+ -+/*------------------------------------------------------------*/ -+/*--- Build the flags thunk. ---*/ -+/*------------------------------------------------------------*/ -+ -+/* Completely fill the flags thunk. We're always filling all fields. -+ Apparently, that is better for redundant PUT elimination. */ -+static void -+s390_cc_thunk_fill(IRExpr *op, IRExpr *dep1, IRExpr *dep2, IRExpr *ndep) -+{ -+ UInt op_off, dep1_off, dep2_off, ndep_off; -+ -+ op_off = S390X_GUEST_OFFSET_CC_OP; -+ dep1_off = S390X_GUEST_OFFSET_CC_DEP1; -+ dep2_off = S390X_GUEST_OFFSET_CC_DEP2; -+ ndep_off = S390X_GUEST_OFFSET_CC_NDEP; -+ -+ stmt(IRStmt_Put(op_off, op)); -+ stmt(IRStmt_Put(dep1_off, dep1)); -+ stmt(IRStmt_Put(dep2_off, dep2)); -+ stmt(IRStmt_Put(ndep_off, ndep)); -+} -+ -+ -+/* Create an expression for V and widen the result to 64 bit. */ -+static IRExpr * -+s390_cc_widen(IRTemp v, Bool sign_extend) -+{ -+ IRExpr *expr; -+ -+ expr = mkexpr(v); -+ -+ switch (typeOfIRTemp(irsb->tyenv, v)) { -+ case Ity_I64: -+ break; -+ case Ity_I32: -+ expr = unop(sign_extend ? Iop_32Sto64 : Iop_32Uto64, expr); -+ break; -+ case Ity_I16: -+ expr = unop(sign_extend ? Iop_16Sto64 : Iop_16Uto64, expr); -+ break; -+ case Ity_I8: -+ expr = unop(sign_extend ? Iop_8Sto64 : Iop_8Uto64, expr); -+ break; -+ default: -+ vpanic("s390_cc_widen"); -+ } -+ -+ return expr; -+} -+ -+static void -+s390_cc_thunk_put1(UInt opc, IRTemp d1, Bool sign_extend) -+{ -+ IRExpr *op, *dep1, *dep2, *ndep; -+ -+ op = mkU64(opc); -+ dep1 = s390_cc_widen(d1, sign_extend); -+ dep2 = mkU64(0); -+ ndep = mkU64(0); -+ -+ s390_cc_thunk_fill(op, dep1, dep2, ndep); -+} -+ -+ -+static void -+s390_cc_thunk_put2(UInt opc, IRTemp d1, IRTemp d2, Bool sign_extend) -+{ -+ IRExpr *op, *dep1, *dep2, *ndep; -+ -+ op = mkU64(opc); -+ dep1 = s390_cc_widen(d1, sign_extend); -+ dep2 = s390_cc_widen(d2, sign_extend); -+ ndep = mkU64(0); -+ -+ s390_cc_thunk_fill(op, dep1, dep2, ndep); -+} -+ -+ -+/* memcheck believes that the NDEP field in the flags thunk is always -+ defined. But for some flag computations (e.g. add with carry) that is -+ just not true. We therefore need to convey to memcheck that the value -+ of the ndep field does matter and therefore we make the DEP2 field -+ depend on it: -+ -+ DEP2 = original_DEP2 ^ NDEP -+ -+ In s390_calculate_cc we exploit that (a^b)^b == a -+ I.e. we xor the DEP2 value with the NDEP value to recover the -+ original_DEP2 value. */ -+static void -+s390_cc_thunk_put3(UInt opc, IRTemp d1, IRTemp d2, IRTemp nd, Bool sign_extend) -+{ -+ IRExpr *op, *dep1, *dep2, *ndep, *dep2x; -+ -+ op = mkU64(opc); -+ dep1 = s390_cc_widen(d1, sign_extend); -+ dep2 = s390_cc_widen(d2, sign_extend); -+ ndep = s390_cc_widen(nd, sign_extend); -+ -+ dep2x = binop(Iop_Xor64, dep2, ndep); -+ -+ s390_cc_thunk_fill(op, dep1, dep2x, ndep); -+} -+ -+ -+/* Write one floating point value into the flags thunk */ -+static void -+s390_cc_thunk_put1f(UInt opc, IRTemp d1) -+{ -+ IRExpr *op, *dep1, *dep2, *ndep; -+ -+ op = mkU64(opc); -+ dep1 = mkexpr(d1); -+ dep2 = mkU64(0); -+ ndep = mkU64(0); -+ -+ s390_cc_thunk_fill(op, dep1, dep2, ndep); -+} -+ -+ -+/* Write a floating point value and an integer into the flags thunk. The -+ integer value is zero-extended first. */ -+static void -+s390_cc_thunk_putFZ(UInt opc, IRTemp d1, IRTemp d2) -+{ -+ IRExpr *op, *dep1, *dep2, *ndep; -+ -+ op = mkU64(opc); -+ dep1 = mkexpr(d1); -+ dep2 = s390_cc_widen(d2, False); -+ ndep = mkU64(0); -+ -+ s390_cc_thunk_fill(op, dep1, dep2, ndep); -+} -+ -+ -+/* Write a 128-bit floating point value into the flags thunk. This is -+ done by splitting the value into two 64-bits values. */ -+static void -+s390_cc_thunk_put1f128(UInt opc, IRTemp d1) -+{ -+ IRExpr *op, *hi, *lo, *ndep; -+ -+ op = mkU64(opc); -+ hi = unop(Iop_F128HItoF64, mkexpr(d1)); -+ lo = unop(Iop_F128LOtoF64, mkexpr(d1)); -+ ndep = mkU64(0); -+ -+ s390_cc_thunk_fill(op, hi, lo, ndep); -+} -+ -+ -+/* Write a 128-bit floating point value and an integer into the flags thunk. -+ The integer value is zero-extended first. */ -+static void -+s390_cc_thunk_put1f128Z(UInt opc, IRTemp d1, IRTemp nd) -+{ -+ IRExpr *op, *hi, *lo, *lox, *ndep; -+ -+ op = mkU64(opc); -+ hi = unop(Iop_F128HItoF64, mkexpr(d1)); -+ lo = unop(Iop_ReinterpF64asI64, unop(Iop_F128LOtoF64, mkexpr(d1))); -+ ndep = s390_cc_widen(nd, False); -+ -+ lox = binop(Iop_Xor64, lo, ndep); /* convey dependency */ -+ -+ s390_cc_thunk_fill(op, hi, lox, ndep); -+} -+ -+ -+static void -+s390_cc_set(UInt val) -+{ -+ s390_cc_thunk_fill(mkU64(S390_CC_OP_SET), -+ mkU64(val), mkU64(0), mkU64(0)); -+} -+ -+/* Build IR to calculate the condition code from flags thunk. -+ Returns an expression of type Ity_I32 */ -+static IRExpr * -+s390_call_calculate_cc(void) -+{ -+ IRExpr **args, *call, *op, *dep1, *dep2, *ndep; -+ -+ op = IRExpr_Get(S390X_GUEST_OFFSET_CC_OP, Ity_I64); -+ dep1 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP1, Ity_I64); -+ dep2 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP2, Ity_I64); -+ ndep = IRExpr_Get(S390X_GUEST_OFFSET_CC_NDEP, Ity_I64); -+ -+ args = mkIRExprVec_4(op, dep1, dep2, ndep); -+ call = mkIRExprCCall(Ity_I32, 0 /*regparm*/, -+ "s390_calculate_cc", &s390_calculate_cc, args); -+ -+ /* Exclude OP and NDEP from definedness checking. We're only -+ interested in DEP1 and DEP2. */ -+ call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<3); -+ -+ return call; -+} -+ -+/* Build IR to calculate the internal condition code for a "compare and branch" -+ insn. Returns an expression of type Ity_I32 */ -+static IRExpr * -+s390_call_calculate_icc(UInt opc, IRTemp op1, IRTemp op2, Bool sign_extend) -+{ -+ IRExpr **args, *call, *op, *dep1, *dep2; -+ -+ op = mkU64(opc); -+ dep1 = s390_cc_widen(op1, sign_extend); -+ dep2 = s390_cc_widen(op2, sign_extend); -+ -+ args = mkIRExprVec_3(op, dep1, dep2); -+ call = mkIRExprCCall(Ity_I32, 0 /*regparm*/, -+ "s390_calculate_icc", &s390_calculate_icc, args); -+ -+ /* Exclude OP from definedness checking. We're only -+ interested in DEP1 and DEP2. */ -+ call->Iex.CCall.cee->mcx_mask = (1<<0); -+ -+ return call; -+} -+ -+/* Build IR to calculate the condition code from flags thunk. -+ Returns an expression of type Ity_I32 */ -+static IRExpr * -+s390_call_calculate_cond(UInt m) -+{ -+ IRExpr **args, *call, *op, *dep1, *dep2, *ndep, *mask; -+ -+ mask = mkU64(m); -+ op = IRExpr_Get(S390X_GUEST_OFFSET_CC_OP, Ity_I64); -+ dep1 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP1, Ity_I64); -+ dep2 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP2, Ity_I64); -+ ndep = IRExpr_Get(S390X_GUEST_OFFSET_CC_NDEP, Ity_I64); -+ -+ args = mkIRExprVec_5(mask, op, dep1, dep2, ndep); -+ call = mkIRExprCCall(Ity_I32, 0 /*regparm*/, -+ "s390_calculate_cond", &s390_calculate_cond, args); -+ -+ /* Exclude the requested condition, OP and NDEP from definedness -+ checking. We're only interested in DEP1 and DEP2. */ -+ call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<1) | (1<<4); -+ -+ return call; -+} -+ -+#define s390_cc_thunk_putZ(op,dep1) s390_cc_thunk_put1(op,dep1,False) -+#define s390_cc_thunk_putS(op,dep1) s390_cc_thunk_put1(op,dep1,True) -+#define s390_cc_thunk_putF(op,dep1) s390_cc_thunk_put1f(op,dep1) -+#define s390_cc_thunk_putZZ(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,False) -+#define s390_cc_thunk_putSS(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,True) -+#define s390_cc_thunk_putFF(op,dep1,dep2) s390_cc_thunk_put2f(op,dep1,dep2) -+#define s390_cc_thunk_putZZZ(op,dep1,dep2,ndep) \ -+ s390_cc_thunk_put3(op,dep1,dep2,ndep,False) -+#define s390_cc_thunk_putSSS(op,dep1,dep2,ndep) \ -+ s390_cc_thunk_put3(op,dep1,dep2,ndep,True) -+#define s390_call_calculate_iccZZ(op,dep1,dep2) \ -+ s390_call_calculate_icc(op,dep1,dep2,False) -+#define s390_call_calculate_iccSS(op,dep1,dep2) \ -+ s390_call_calculate_icc(op,dep1,dep2,True) -+ -+ -+#define OFFB_TISTART offsetof(VexGuestS390XState, guest_TISTART) -+#define OFFB_TILEN offsetof(VexGuestS390XState, guest_TILEN) -+ -+ -+/*------------------------------------------------------------*/ -+/*--- Guest register access ---*/ -+/*------------------------------------------------------------*/ -+ -+ -+/*------------------------------------------------------------*/ -+/*--- ar registers ---*/ -+/*------------------------------------------------------------*/ -+ -+/* Return the guest state offset of a ar register. */ -+static UInt -+ar_offset(UInt archreg) -+{ -+ static const UInt offset[16] = { -+ offsetof(VexGuestS390XState, guest_a0), -+ offsetof(VexGuestS390XState, guest_a1), -+ offsetof(VexGuestS390XState, guest_a2), -+ offsetof(VexGuestS390XState, guest_a3), -+ offsetof(VexGuestS390XState, guest_a4), -+ offsetof(VexGuestS390XState, guest_a5), -+ offsetof(VexGuestS390XState, guest_a6), -+ offsetof(VexGuestS390XState, guest_a7), -+ offsetof(VexGuestS390XState, guest_a8), -+ offsetof(VexGuestS390XState, guest_a9), -+ offsetof(VexGuestS390XState, guest_a10), -+ offsetof(VexGuestS390XState, guest_a11), -+ offsetof(VexGuestS390XState, guest_a12), -+ offsetof(VexGuestS390XState, guest_a13), -+ offsetof(VexGuestS390XState, guest_a14), -+ offsetof(VexGuestS390XState, guest_a15), -+ }; -+ -+ vassert(archreg < 16); -+ -+ return offset[archreg]; -+} -+ -+ -+/* Return the guest state offset of word #0 of a ar register. */ -+static __inline__ UInt -+ar_w0_offset(UInt archreg) -+{ -+ return ar_offset(archreg) + 0; -+} -+ -+/* Write word #0 of a ar to the guest state. */ -+static __inline__ void -+put_ar_w0(UInt archreg, IRExpr *expr) -+{ -+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32); -+ -+ stmt(IRStmt_Put(ar_w0_offset(archreg), expr)); -+} -+ -+/* Read word #0 of a ar register. */ -+static __inline__ IRExpr * -+get_ar_w0(UInt archreg) -+{ -+ return IRExpr_Get(ar_w0_offset(archreg), Ity_I32); -+} -+ -+ -+/*------------------------------------------------------------*/ -+/*--- fpr registers ---*/ -+/*------------------------------------------------------------*/ -+ -+/* Return the guest state offset of a fpr register. */ -+static UInt -+fpr_offset(UInt archreg) -+{ -+ static const UInt offset[16] = { -+ offsetof(VexGuestS390XState, guest_f0), -+ offsetof(VexGuestS390XState, guest_f1), -+ offsetof(VexGuestS390XState, guest_f2), -+ offsetof(VexGuestS390XState, guest_f3), -+ offsetof(VexGuestS390XState, guest_f4), -+ offsetof(VexGuestS390XState, guest_f5), -+ offsetof(VexGuestS390XState, guest_f6), -+ offsetof(VexGuestS390XState, guest_f7), -+ offsetof(VexGuestS390XState, guest_f8), -+ offsetof(VexGuestS390XState, guest_f9), -+ offsetof(VexGuestS390XState, guest_f10), -+ offsetof(VexGuestS390XState, guest_f11), -+ offsetof(VexGuestS390XState, guest_f12), -+ offsetof(VexGuestS390XState, guest_f13), -+ offsetof(VexGuestS390XState, guest_f14), -+ offsetof(VexGuestS390XState, guest_f15), -+ }; -+ -+ vassert(archreg < 16); -+ -+ return offset[archreg]; -+} -+ -+ -+/* Return the guest state offset of word #0 of a fpr register. */ -+static __inline__ UInt -+fpr_w0_offset(UInt archreg) -+{ -+ return fpr_offset(archreg) + 0; -+} -+ -+/* Write word #0 of a fpr to the guest state. */ -+static __inline__ void -+put_fpr_w0(UInt archreg, IRExpr *expr) -+{ -+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F32); -+ -+ stmt(IRStmt_Put(fpr_w0_offset(archreg), expr)); -+} -+ -+/* Read word #0 of a fpr register. */ -+static __inline__ IRExpr * -+get_fpr_w0(UInt archreg) -+{ -+ return IRExpr_Get(fpr_w0_offset(archreg), Ity_F32); -+} -+ -+/* Return the guest state offset of double word #0 of a fpr register. */ -+static __inline__ UInt -+fpr_dw0_offset(UInt archreg) -+{ -+ return fpr_offset(archreg) + 0; -+} -+ -+/* Write double word #0 of a fpr to the guest state. */ -+static __inline__ void -+put_fpr_dw0(UInt archreg, IRExpr *expr) -+{ -+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F64); -+ -+ stmt(IRStmt_Put(fpr_dw0_offset(archreg), expr)); -+} -+ -+/* Read double word #0 of a fpr register. */ -+static __inline__ IRExpr * -+get_fpr_dw0(UInt archreg) -+{ -+ return IRExpr_Get(fpr_dw0_offset(archreg), Ity_F64); -+} -+ -+ -+/*------------------------------------------------------------*/ -+/*--- gpr registers ---*/ -+/*------------------------------------------------------------*/ -+ -+/* Return the guest state offset of a gpr register. */ -+static UInt -+gpr_offset(UInt archreg) -+{ -+ static const UInt offset[16] = { -+ offsetof(VexGuestS390XState, guest_r0), -+ offsetof(VexGuestS390XState, guest_r1), -+ offsetof(VexGuestS390XState, guest_r2), -+ offsetof(VexGuestS390XState, guest_r3), -+ offsetof(VexGuestS390XState, guest_r4), -+ offsetof(VexGuestS390XState, guest_r5), -+ offsetof(VexGuestS390XState, guest_r6), -+ offsetof(VexGuestS390XState, guest_r7), -+ offsetof(VexGuestS390XState, guest_r8), -+ offsetof(VexGuestS390XState, guest_r9), -+ offsetof(VexGuestS390XState, guest_r10), -+ offsetof(VexGuestS390XState, guest_r11), -+ offsetof(VexGuestS390XState, guest_r12), -+ offsetof(VexGuestS390XState, guest_r13), -+ offsetof(VexGuestS390XState, guest_r14), -+ offsetof(VexGuestS390XState, guest_r15), -+ }; -+ -+ vassert(archreg < 16); -+ -+ return offset[archreg]; -+} -+ -+ -+/* Return the guest state offset of word #0 of a gpr register. */ -+static __inline__ UInt -+gpr_w0_offset(UInt archreg) -+{ -+ return gpr_offset(archreg) + 0; -+} -+ -+/* Write word #0 of a gpr to the guest state. */ -+static __inline__ void -+put_gpr_w0(UInt archreg, IRExpr *expr) -+{ -+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32); -+ -+ stmt(IRStmt_Put(gpr_w0_offset(archreg), expr)); -+} -+ -+/* Read word #0 of a gpr register. */ -+static __inline__ IRExpr * -+get_gpr_w0(UInt archreg) -+{ -+ return IRExpr_Get(gpr_w0_offset(archreg), Ity_I32); -+} -+ -+/* Return the guest state offset of double word #0 of a gpr register. */ -+static __inline__ UInt -+gpr_dw0_offset(UInt archreg) -+{ -+ return gpr_offset(archreg) + 0; -+} -+ -+/* Write double word #0 of a gpr to the guest state. */ -+static __inline__ void -+put_gpr_dw0(UInt archreg, IRExpr *expr) -+{ -+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64); -+ -+ stmt(IRStmt_Put(gpr_dw0_offset(archreg), expr)); -+} -+ -+/* Read double word #0 of a gpr register. */ -+static __inline__ IRExpr * -+get_gpr_dw0(UInt archreg) -+{ -+ return IRExpr_Get(gpr_dw0_offset(archreg), Ity_I64); -+} -+ -+/* Return the guest state offset of half word #1 of a gpr register. */ -+static __inline__ UInt -+gpr_hw1_offset(UInt archreg) -+{ -+ return gpr_offset(archreg) + 2; -+} -+ -+/* Write half word #1 of a gpr to the guest state. */ -+static __inline__ void -+put_gpr_hw1(UInt archreg, IRExpr *expr) -+{ -+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16); -+ -+ stmt(IRStmt_Put(gpr_hw1_offset(archreg), expr)); -+} -+ -+/* Read half word #1 of a gpr register. */ -+static __inline__ IRExpr * -+get_gpr_hw1(UInt archreg) -+{ -+ return IRExpr_Get(gpr_hw1_offset(archreg), Ity_I16); -+} -+ -+/* Return the guest state offset of byte #6 of a gpr register. */ -+static __inline__ UInt -+gpr_b6_offset(UInt archreg) -+{ -+ return gpr_offset(archreg) + 6; -+} -+ -+/* Write byte #6 of a gpr to the guest state. */ -+static __inline__ void -+put_gpr_b6(UInt archreg, IRExpr *expr) -+{ -+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8); -+ -+ stmt(IRStmt_Put(gpr_b6_offset(archreg), expr)); -+} -+ -+/* Read byte #6 of a gpr register. */ -+static __inline__ IRExpr * -+get_gpr_b6(UInt archreg) -+{ -+ return IRExpr_Get(gpr_b6_offset(archreg), Ity_I8); -+} -+ -+/* Return the guest state offset of byte #3 of a gpr register. */ -+static __inline__ UInt -+gpr_b3_offset(UInt archreg) -+{ -+ return gpr_offset(archreg) + 3; -+} -+ -+/* Write byte #3 of a gpr to the guest state. */ -+static __inline__ void -+put_gpr_b3(UInt archreg, IRExpr *expr) -+{ -+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8); -+ -+ stmt(IRStmt_Put(gpr_b3_offset(archreg), expr)); -+} -+ -+/* Read byte #3 of a gpr register. */ -+static __inline__ IRExpr * -+get_gpr_b3(UInt archreg) -+{ -+ return IRExpr_Get(gpr_b3_offset(archreg), Ity_I8); -+} -+ -+/* Return the guest state offset of byte #0 of a gpr register. */ -+static __inline__ UInt -+gpr_b0_offset(UInt archreg) -+{ -+ return gpr_offset(archreg) + 0; -+} -+ -+/* Write byte #0 of a gpr to the guest state. */ -+static __inline__ void -+put_gpr_b0(UInt archreg, IRExpr *expr) -+{ -+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8); -+ -+ stmt(IRStmt_Put(gpr_b0_offset(archreg), expr)); -+} -+ -+/* Read byte #0 of a gpr register. */ -+static __inline__ IRExpr * -+get_gpr_b0(UInt archreg) -+{ -+ return IRExpr_Get(gpr_b0_offset(archreg), Ity_I8); -+} -+ -+/* Return the guest state offset of word #1 of a gpr register. */ -+static __inline__ UInt -+gpr_w1_offset(UInt archreg) -+{ -+ return gpr_offset(archreg) + 4; -+} -+ -+/* Write word #1 of a gpr to the guest state. */ -+static __inline__ void -+put_gpr_w1(UInt archreg, IRExpr *expr) -+{ -+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32); -+ -+ stmt(IRStmt_Put(gpr_w1_offset(archreg), expr)); -+} -+ -+/* Read word #1 of a gpr register. */ -+static __inline__ IRExpr * -+get_gpr_w1(UInt archreg) -+{ -+ return IRExpr_Get(gpr_w1_offset(archreg), Ity_I32); -+} -+ -+/* Return the guest state offset of half word #3 of a gpr register. */ -+static __inline__ UInt -+gpr_hw3_offset(UInt archreg) -+{ -+ return gpr_offset(archreg) + 6; -+} -+ -+/* Write half word #3 of a gpr to the guest state. */ -+static __inline__ void -+put_gpr_hw3(UInt archreg, IRExpr *expr) -+{ -+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16); -+ -+ stmt(IRStmt_Put(gpr_hw3_offset(archreg), expr)); -+} -+ -+/* Read half word #3 of a gpr register. */ -+static __inline__ IRExpr * -+get_gpr_hw3(UInt archreg) -+{ -+ return IRExpr_Get(gpr_hw3_offset(archreg), Ity_I16); -+} -+ -+/* Return the guest state offset of byte #7 of a gpr register. */ -+static __inline__ UInt -+gpr_b7_offset(UInt archreg) -+{ -+ return gpr_offset(archreg) + 7; -+} -+ -+/* Write byte #7 of a gpr to the guest state. */ -+static __inline__ void -+put_gpr_b7(UInt archreg, IRExpr *expr) -+{ -+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8); -+ -+ stmt(IRStmt_Put(gpr_b7_offset(archreg), expr)); -+} -+ -+/* Read byte #7 of a gpr register. */ -+static __inline__ IRExpr * -+get_gpr_b7(UInt archreg) -+{ -+ return IRExpr_Get(gpr_b7_offset(archreg), Ity_I8); -+} -+ -+/* Return the guest state offset of half word #0 of a gpr register. */ -+static __inline__ UInt -+gpr_hw0_offset(UInt archreg) -+{ -+ return gpr_offset(archreg) + 0; -+} -+ -+/* Write half word #0 of a gpr to the guest state. */ -+static __inline__ void -+put_gpr_hw0(UInt archreg, IRExpr *expr) -+{ -+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16); -+ -+ stmt(IRStmt_Put(gpr_hw0_offset(archreg), expr)); -+} -+ -+/* Read half word #0 of a gpr register. */ -+static __inline__ IRExpr * -+get_gpr_hw0(UInt archreg) -+{ -+ return IRExpr_Get(gpr_hw0_offset(archreg), Ity_I16); -+} -+ -+/* Return the guest state offset of byte #4 of a gpr register. */ -+static __inline__ UInt -+gpr_b4_offset(UInt archreg) -+{ -+ return gpr_offset(archreg) + 4; -+} -+ -+/* Write byte #4 of a gpr to the guest state. */ -+static __inline__ void -+put_gpr_b4(UInt archreg, IRExpr *expr) -+{ -+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8); -+ -+ stmt(IRStmt_Put(gpr_b4_offset(archreg), expr)); -+} -+ -+/* Read byte #4 of a gpr register. */ -+static __inline__ IRExpr * -+get_gpr_b4(UInt archreg) -+{ -+ return IRExpr_Get(gpr_b4_offset(archreg), Ity_I8); -+} -+ -+/* Return the guest state offset of byte #1 of a gpr register. */ -+static __inline__ UInt -+gpr_b1_offset(UInt archreg) -+{ -+ return gpr_offset(archreg) + 1; -+} -+ -+/* Write byte #1 of a gpr to the guest state. */ -+static __inline__ void -+put_gpr_b1(UInt archreg, IRExpr *expr) -+{ -+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8); -+ -+ stmt(IRStmt_Put(gpr_b1_offset(archreg), expr)); -+} -+ -+/* Read byte #1 of a gpr register. */ -+static __inline__ IRExpr * -+get_gpr_b1(UInt archreg) -+{ -+ return IRExpr_Get(gpr_b1_offset(archreg), Ity_I8); -+} -+ -+/* Return the guest state offset of half word #2 of a gpr register. */ -+static __inline__ UInt -+gpr_hw2_offset(UInt archreg) -+{ -+ return gpr_offset(archreg) + 4; -+} -+ -+/* Write half word #2 of a gpr to the guest state. */ -+static __inline__ void -+put_gpr_hw2(UInt archreg, IRExpr *expr) -+{ -+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16); -+ -+ stmt(IRStmt_Put(gpr_hw2_offset(archreg), expr)); -+} -+ -+/* Read half word #2 of a gpr register. */ -+static __inline__ IRExpr * -+get_gpr_hw2(UInt archreg) -+{ -+ return IRExpr_Get(gpr_hw2_offset(archreg), Ity_I16); -+} -+ -+/* Return the guest state offset of byte #5 of a gpr register. */ -+static __inline__ UInt -+gpr_b5_offset(UInt archreg) -+{ -+ return gpr_offset(archreg) + 5; -+} -+ -+/* Write byte #5 of a gpr to the guest state. */ -+static __inline__ void -+put_gpr_b5(UInt archreg, IRExpr *expr) -+{ -+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8); -+ -+ stmt(IRStmt_Put(gpr_b5_offset(archreg), expr)); -+} -+ -+/* Read byte #5 of a gpr register. */ -+static __inline__ IRExpr * -+get_gpr_b5(UInt archreg) -+{ -+ return IRExpr_Get(gpr_b5_offset(archreg), Ity_I8); -+} -+ -+/* Return the guest state offset of byte #2 of a gpr register. */ -+static __inline__ UInt -+gpr_b2_offset(UInt archreg) -+{ -+ return gpr_offset(archreg) + 2; -+} -+ -+/* Write byte #2 of a gpr to the guest state. */ -+static __inline__ void -+put_gpr_b2(UInt archreg, IRExpr *expr) -+{ -+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8); -+ -+ stmt(IRStmt_Put(gpr_b2_offset(archreg), expr)); -+} -+ -+/* Read byte #2 of a gpr register. */ -+static __inline__ IRExpr * -+get_gpr_b2(UInt archreg) -+{ -+ return IRExpr_Get(gpr_b2_offset(archreg), Ity_I8); -+} -+ -+/* Return the guest state offset of the counter register. */ -+static UInt -+counter_offset(void) -+{ -+ return offsetof(VexGuestS390XState, guest_counter); -+} -+ -+/* Return the guest state offset of double word #0 of the counter register. */ -+static __inline__ UInt -+counter_dw0_offset(void) -+{ -+ return counter_offset() + 0; -+} -+ -+/* Write double word #0 of the counter to the guest state. */ -+static __inline__ void -+put_counter_dw0(IRExpr *expr) -+{ -+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64); -+ -+ stmt(IRStmt_Put(counter_dw0_offset(), expr)); -+} -+ -+/* Read double word #0 of the counter register. */ -+static __inline__ IRExpr * -+get_counter_dw0(void) -+{ -+ return IRExpr_Get(counter_dw0_offset(), Ity_I64); -+} -+ -+/* Return the guest state offset of word #0 of the counter register. */ -+static __inline__ UInt -+counter_w0_offset(void) -+{ -+ return counter_offset() + 0; -+} -+ -+/* Return the guest state offset of word #1 of the counter register. */ -+static __inline__ UInt -+counter_w1_offset(void) -+{ -+ return counter_offset() + 4; -+} -+ -+/* Write word #0 of the counter to the guest state. */ -+static __inline__ void -+put_counter_w0(IRExpr *expr) -+{ -+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32); -+ -+ stmt(IRStmt_Put(counter_w0_offset(), expr)); -+} -+ -+/* Read word #0 of the counter register. */ -+static __inline__ IRExpr * -+get_counter_w0(void) -+{ -+ return IRExpr_Get(counter_w0_offset(), Ity_I32); -+} -+ -+/* Write word #1 of the counter to the guest state. */ -+static __inline__ void -+put_counter_w1(IRExpr *expr) -+{ -+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32); -+ -+ stmt(IRStmt_Put(counter_w1_offset(), expr)); -+} -+ -+/* Read word #1 of the counter register. */ -+static __inline__ IRExpr * -+get_counter_w1(void) -+{ -+ return IRExpr_Get(counter_w1_offset(), Ity_I32); -+} -+ -+/* Return the guest state offset of the fpc register. */ -+static UInt -+fpc_offset(void) -+{ -+ return offsetof(VexGuestS390XState, guest_fpc); -+} -+ -+/* Return the guest state offset of word #0 of the fpc register. */ -+static __inline__ UInt -+fpc_w0_offset(void) -+{ -+ return fpc_offset() + 0; -+} -+ -+/* Write word #0 of the fpc to the guest state. */ -+static __inline__ void -+put_fpc_w0(IRExpr *expr) -+{ -+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32); -+ -+ stmt(IRStmt_Put(fpc_w0_offset(), expr)); -+} -+ -+/* Read word #0 of the fpc register. */ -+static __inline__ IRExpr * -+get_fpc_w0(void) -+{ -+ return IRExpr_Get(fpc_w0_offset(), Ity_I32); -+} -+ -+ -+/*------------------------------------------------------------*/ -+/*--- Build IR for formats ---*/ -+/*------------------------------------------------------------*/ -+static void -+s390_format_I(HChar *(*irgen)(UChar i), -+ UChar i) -+{ -+ HChar *mnm = irgen(i); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC2(MNM, UINT), mnm, i); -+} -+ -+static void -+s390_format_RI(HChar *(*irgen)(UChar r1, UShort i2), -+ UChar r1, UShort i2) -+{ -+ irgen(r1, i2); -+} -+ -+static void -+s390_format_RI_RU(HChar *(*irgen)(UChar r1, UShort i2), -+ UChar r1, UShort i2) -+{ -+ HChar *mnm = irgen(r1, i2); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2); -+} -+ -+static void -+s390_format_RI_RI(HChar *(*irgen)(UChar r1, UShort i2), -+ UChar r1, UShort i2) -+{ -+ HChar *mnm = irgen(r1, i2); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, (Int)(Short)i2); -+} -+ -+static void -+s390_format_RI_RP(HChar *(*irgen)(UChar r1, UShort i2), -+ UChar r1, UShort i2) -+{ -+ HChar *mnm = irgen(r1, i2); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, (Int)(Short)i2); -+} -+ -+static void -+s390_format_RIE_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2), -+ UChar r1, UChar r3, UShort i2) -+{ -+ HChar *mnm = irgen(r1, r3, i2); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2); -+} -+ -+static void -+s390_format_RIE_RRI0(HChar *(*irgen)(UChar r1, UChar r3, UShort i2), -+ UChar r1, UChar r3, UShort i2) -+{ -+ HChar *mnm = irgen(r1, r3, i2); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC4(MNM, GPR, GPR, INT), mnm, r1, r3, (Int)(Short)i2); -+} -+ -+static void -+s390_format_RIE_RRUUU(HChar *(*irgen)(UChar r1, UChar r2, UChar i3, UChar i4, -+ UChar i5), -+ UChar r1, UChar r2, UChar i3, UChar i4, UChar i5) -+{ -+ HChar *mnm = irgen(r1, r2, i3, i4, i5); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC6(MNM, GPR, GPR, UINT, UINT, UINT), mnm, r1, r2, i3, i4, -+ i5); -+} -+ -+static void -+s390_format_RIE_RRPU(HChar *(*irgen)(UChar r1, UChar r2, UShort i4, UChar m3), -+ UChar r1, UChar r2, UShort i4, UChar m3) -+{ -+ HChar *mnm = irgen(r1, r2, i4, m3); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC5(XMNM, GPR, GPR, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1, -+ r2, m3, (Int)(Short)i4); -+} -+ -+static void -+s390_format_RIE_RUPU(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2), -+ UChar r1, UChar m3, UShort i4, UChar i2) -+{ -+ HChar *mnm = irgen(r1, m3, i4, i2); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC5(XMNM, GPR, UINT, CABM, PCREL), S390_XMNM_CAB, mnm, m3, -+ r1, i2, m3, (Int)(Short)i4); -+} -+ -+static void -+s390_format_RIE_RUPI(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2), -+ UChar r1, UChar m3, UShort i4, UChar i2) -+{ -+ HChar *mnm = irgen(r1, m3, i4, i2); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC5(XMNM, GPR, INT, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1, -+ (Int)(Char)i2, m3, (Int)(Short)i4); -+} -+ -+static void -+s390_format_RIL(HChar *(*irgen)(UChar r1, UInt i2), -+ UChar r1, UInt i2) -+{ -+ irgen(r1, i2); -+} -+ -+static void -+s390_format_RIL_RU(HChar *(*irgen)(UChar r1, UInt i2), -+ UChar r1, UInt i2) -+{ -+ HChar *mnm = irgen(r1, i2); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2); -+} -+ -+static void -+s390_format_RIL_RI(HChar *(*irgen)(UChar r1, UInt i2), -+ UChar r1, UInt i2) -+{ -+ HChar *mnm = irgen(r1, i2); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, i2); -+} -+ -+static void -+s390_format_RIL_RP(HChar *(*irgen)(UChar r1, UInt i2), -+ UChar r1, UInt i2) -+{ -+ HChar *mnm = irgen(r1, i2); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, i2); -+} -+ -+static void -+s390_format_RIL_UP(HChar *(*irgen)(void), -+ UChar r1, UInt i2) -+{ -+ HChar *mnm = irgen(); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, UINT, PCREL), mnm, r1, i2); -+} -+ -+static void -+s390_format_RIS_RURDI(HChar *(*irgen)(UChar r1, UChar m3, UChar i2, -+ IRTemp op4addr), -+ UChar r1, UChar m3, UChar b4, UShort d4, UChar i2) -+{ -+ HChar *mnm; -+ IRTemp op4addr = newTemp(Ity_I64); -+ -+ assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) : -+ mkU64(0))); -+ -+ mnm = irgen(r1, m3, i2, op4addr); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC5(XMNM, GPR, INT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1, -+ (Int)(Char)i2, m3, d4, 0, b4); -+} -+ -+static void -+s390_format_RIS_RURDU(HChar *(*irgen)(UChar r1, UChar m3, UChar i2, -+ IRTemp op4addr), -+ UChar r1, UChar m3, UChar b4, UShort d4, UChar i2) -+{ -+ HChar *mnm; -+ IRTemp op4addr = newTemp(Ity_I64); -+ -+ assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) : -+ mkU64(0))); -+ -+ mnm = irgen(r1, m3, i2, op4addr); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC5(XMNM, GPR, UINT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1, -+ i2, m3, d4, 0, b4); -+} -+ -+static void -+s390_format_RR(HChar *(*irgen)(UChar r1, UChar r2), -+ UChar r1, UChar r2) -+{ -+ irgen(r1, r2); -+} -+ -+static void -+s390_format_RR_RR(HChar *(*irgen)(UChar r1, UChar r2), -+ UChar r1, UChar r2) -+{ -+ HChar *mnm = irgen(r1, r2); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2); -+} -+ -+static void -+s390_format_RR_FF(HChar *(*irgen)(UChar r1, UChar r2), -+ UChar r1, UChar r2) -+{ -+ HChar *mnm = irgen(r1, r2); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2); -+} -+ -+static void -+s390_format_RRE(HChar *(*irgen)(UChar r1, UChar r2), -+ UChar r1, UChar r2) -+{ -+ irgen(r1, r2); -+} -+ -+static void -+s390_format_RRE_RR(HChar *(*irgen)(UChar r1, UChar r2), -+ UChar r1, UChar r2) -+{ -+ HChar *mnm = irgen(r1, r2); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2); -+} -+ -+static void -+s390_format_RRE_FF(HChar *(*irgen)(UChar r1, UChar r2), -+ UChar r1, UChar r2) -+{ -+ HChar *mnm = irgen(r1, r2); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2); -+} -+ -+static void -+s390_format_RRE_RF(HChar *(*irgen)(UChar, UChar), -+ UChar r1, UChar r2) -+{ -+ HChar *mnm = irgen(r1, r2); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, GPR, FPR), mnm, r1, r2); -+} -+ -+static void -+s390_format_RRE_FR(HChar *(*irgen)(UChar r1, UChar r2), -+ UChar r1, UChar r2) -+{ -+ HChar *mnm = irgen(r1, r2); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, FPR, GPR), mnm, r1, r2); -+} -+ -+static void -+s390_format_RRE_R0(HChar *(*irgen)(UChar r1), -+ UChar r1) -+{ -+ HChar *mnm = irgen(r1); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC2(MNM, GPR), mnm, r1); -+} -+ -+static void -+s390_format_RRE_F0(HChar *(*irgen)(UChar r1), -+ UChar r1) -+{ -+ HChar *mnm = irgen(r1); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC2(MNM, FPR), mnm, r1); -+} -+ -+static void -+s390_format_RRF_F0FF(HChar *(*irgen)(UChar, UChar, UChar), -+ UChar r1, UChar r3, UChar r2) -+{ -+ HChar *mnm = irgen(r1, r3, r2); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2); -+} -+ -+static void -+s390_format_RRF_U0RF(HChar *(*irgen)(UChar r3, UChar r1, UChar r2), -+ UChar r3, UChar r1, UChar r2) -+{ -+ HChar *mnm = irgen(r3, r1, r2); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC4(MNM, GPR, UINT, FPR), mnm, r1, r3, r2); -+} -+ -+static void -+s390_format_RRF_F0FF2(HChar *(*irgen)(UChar, UChar, UChar), -+ UChar r3, UChar r1, UChar r2) -+{ -+ HChar *mnm = irgen(r3, r1, r2); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2); -+} -+ -+static void -+s390_format_RRF_R0RR2(HChar *(*irgen)(UChar r3, UChar r1, UChar r2), -+ UChar r3, UChar r1, UChar r2) -+{ -+ HChar *mnm = irgen(r3, r1, r2); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC4(MNM, GPR, GPR, GPR), mnm, r1, r2, r3); -+} -+ -+static void -+s390_format_RRS(HChar *(*irgen)(UChar r1, UChar r2, UChar m3, IRTemp op4addr), -+ UChar r1, UChar r2, UChar b4, UShort d4, UChar m3) -+{ -+ HChar *mnm; -+ IRTemp op4addr = newTemp(Ity_I64); -+ -+ assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) : -+ mkU64(0))); -+ -+ mnm = irgen(r1, r2, m3, op4addr); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC5(XMNM, GPR, GPR, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1, -+ r2, m3, d4, 0, b4); -+} -+ -+static void -+s390_format_RS_R0RD(HChar *(*irgen)(UChar r1, IRTemp op2addr), -+ UChar r1, UChar b2, UShort d2) -+{ -+ HChar *mnm; -+ IRTemp op2addr = newTemp(Ity_I64); -+ -+ assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) : -+ mkU64(0))); -+ -+ mnm = irgen(r1, op2addr); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, 0, b2); -+} -+ -+static void -+s390_format_RS_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr), -+ UChar r1, UChar r3, UChar b2, UShort d2) -+{ -+ HChar *mnm; -+ IRTemp op2addr = newTemp(Ity_I64); -+ -+ assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) : -+ mkU64(0))); -+ -+ mnm = irgen(r1, r3, op2addr); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC4(MNM, GPR, GPR, UDXB), mnm, r1, r3, d2, 0, b2); -+} -+ -+static void -+s390_format_RS_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr), -+ UChar r1, UChar r3, UChar b2, UShort d2) -+{ -+ HChar *mnm; -+ IRTemp op2addr = newTemp(Ity_I64); -+ -+ assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) : -+ mkU64(0))); -+ -+ mnm = irgen(r1, r3, op2addr); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC4(MNM, GPR, UINT, UDXB), mnm, r1, r3, d2, 0, b2); -+} -+ -+static void -+s390_format_RS_AARD(HChar *(*irgen)(UChar, UChar, IRTemp), -+ UChar r1, UChar r3, UChar b2, UShort d2) -+{ -+ HChar *mnm; -+ IRTemp op2addr = newTemp(Ity_I64); -+ -+ assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) : -+ mkU64(0))); -+ -+ mnm = irgen(r1, r3, op2addr); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC4(MNM, AR, AR, UDXB), mnm, r1, r3, d2, 0, b2); -+} -+ -+static void -+s390_format_RSI_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2), -+ UChar r1, UChar r3, UShort i2) -+{ -+ HChar *mnm = irgen(r1, r3, i2); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2); -+} -+ -+static void -+s390_format_RSY_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr), -+ UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2) -+{ -+ HChar *mnm; -+ IRTemp op2addr = newTemp(Ity_I64); -+ IRTemp d2 = newTemp(Ity_I64); -+ -+ assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2))); -+ assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) : -+ mkU64(0))); -+ -+ mnm = irgen(r1, r3, op2addr); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC4(MNM, GPR, GPR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2); -+} -+ -+static void -+s390_format_RSY_AARD(HChar *(*irgen)(UChar, UChar, IRTemp), -+ UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2) -+{ -+ HChar *mnm; -+ IRTemp op2addr = newTemp(Ity_I64); -+ IRTemp d2 = newTemp(Ity_I64); -+ -+ assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2))); -+ assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) : -+ mkU64(0))); -+ -+ mnm = irgen(r1, r3, op2addr); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC4(MNM, AR, AR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2); -+} -+ -+static void -+s390_format_RSY_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr), -+ UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2) -+{ -+ HChar *mnm; -+ IRTemp op2addr = newTemp(Ity_I64); -+ IRTemp d2 = newTemp(Ity_I64); -+ -+ assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2))); -+ assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) : -+ mkU64(0))); -+ -+ mnm = irgen(r1, r3, op2addr); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC4(MNM, GPR, UINT, SDXB), mnm, r1, r3, dh2, dl2, 0, b2); -+} -+ -+static void -+s390_format_RX(HChar *(*irgen)(UChar r1, UChar x2, UChar b2, UShort d2, -+ IRTemp op2addr), -+ UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ IRTemp op2addr = newTemp(Ity_I64); -+ -+ assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2), -+ b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) : -+ mkU64(0))); -+ -+ irgen(r1, x2, b2, d2, op2addr); -+} -+ -+static void -+s390_format_RX_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr), -+ UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ HChar *mnm; -+ IRTemp op2addr = newTemp(Ity_I64); -+ -+ assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2), -+ b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) : -+ mkU64(0))); -+ -+ mnm = irgen(r1, op2addr); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, x2, b2); -+} -+ -+static void -+s390_format_RX_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr), -+ UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ HChar *mnm; -+ IRTemp op2addr = newTemp(Ity_I64); -+ -+ assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2), -+ b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) : -+ mkU64(0))); -+ -+ mnm = irgen(r1, op2addr); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2); -+} -+ -+static void -+s390_format_RXE_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr), -+ UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ HChar *mnm; -+ IRTemp op2addr = newTemp(Ity_I64); -+ -+ assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2), -+ b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) : -+ mkU64(0))); -+ -+ mnm = irgen(r1, op2addr); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2); -+} -+ -+static void -+s390_format_RXF_FRRDF(HChar *(*irgen)(UChar, IRTemp, UChar), -+ UChar r3, UChar x2, UChar b2, UShort d2, UChar r1) -+{ -+ HChar *mnm; -+ IRTemp op2addr = newTemp(Ity_I64); -+ -+ assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2), -+ b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) : -+ mkU64(0))); -+ -+ mnm = irgen(r3, op2addr, r1); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC4(MNM, FPR, FPR, UDXB), mnm, r1, r3, d2, x2, b2); -+} -+ -+static void -+s390_format_RXY_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr), -+ UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ HChar *mnm; -+ IRTemp op2addr = newTemp(Ity_I64); -+ IRTemp d2 = newTemp(Ity_I64); -+ -+ assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2))); -+ assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2), -+ b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) : -+ mkU64(0))); -+ -+ mnm = irgen(r1, op2addr); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), mnm, r1, dh2, dl2, x2, b2); -+} -+ -+static void -+s390_format_RXY_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr), -+ UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ HChar *mnm; -+ IRTemp op2addr = newTemp(Ity_I64); -+ IRTemp d2 = newTemp(Ity_I64); -+ -+ assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2))); -+ assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2), -+ b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) : -+ mkU64(0))); -+ -+ mnm = irgen(r1, op2addr); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, FPR, SDXB), mnm, r1, dh2, dl2, x2, b2); -+} -+ -+static void -+s390_format_RXY_URRD(HChar *(*irgen)(void), -+ UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ HChar *mnm; -+ IRTemp op2addr = newTemp(Ity_I64); -+ IRTemp d2 = newTemp(Ity_I64); -+ -+ assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2))); -+ assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2), -+ b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) : -+ mkU64(0))); -+ -+ mnm = irgen(); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, UINT, SDXB), mnm, r1, dh2, dl2, x2, b2); -+} -+ -+static void -+s390_format_S_RD(HChar *(*irgen)(IRTemp op2addr), -+ UChar b2, UShort d2) -+{ -+ HChar *mnm; -+ IRTemp op2addr = newTemp(Ity_I64); -+ -+ assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) : -+ mkU64(0))); -+ -+ mnm = irgen(op2addr); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC2(MNM, UDXB), mnm, d2, 0, b2); -+} -+ -+static void -+s390_format_SI_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr), -+ UChar i2, UChar b1, UShort d1) -+{ -+ HChar *mnm; -+ IRTemp op1addr = newTemp(Ity_I64); -+ -+ assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) : -+ mkU64(0))); -+ -+ mnm = irgen(i2, op1addr); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2); -+} -+ -+static void -+s390_format_SIY_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr), -+ UChar i2, UChar b1, UShort dl1, UChar dh1) -+{ -+ HChar *mnm; -+ IRTemp op1addr = newTemp(Ity_I64); -+ IRTemp d1 = newTemp(Ity_I64); -+ -+ assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1))); -+ assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) : -+ mkU64(0))); -+ -+ mnm = irgen(i2, op1addr); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, SDXB, UINT), mnm, dh1, dl1, 0, b1, i2); -+} -+ -+static void -+s390_format_SIY_IRD(HChar *(*irgen)(UChar i2, IRTemp op1addr), -+ UChar i2, UChar b1, UShort dl1, UChar dh1) -+{ -+ HChar *mnm; -+ IRTemp op1addr = newTemp(Ity_I64); -+ IRTemp d1 = newTemp(Ity_I64); -+ -+ assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1))); -+ assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) : -+ mkU64(0))); -+ -+ mnm = irgen(i2, op1addr); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, SDXB, INT), mnm, dh1, dl1, 0, b1, (Int)(Char)i2); -+} -+ -+static void -+s390_format_SS_L0RDRD(HChar *(*irgen)(UChar, IRTemp, IRTemp), -+ UChar l, UChar b1, UShort d1, UChar b2, UShort d2) -+{ -+ HChar *mnm; -+ IRTemp op1addr = newTemp(Ity_I64); -+ IRTemp op2addr = newTemp(Ity_I64); -+ -+ assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) : -+ mkU64(0))); -+ assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) : -+ mkU64(0))); -+ -+ mnm = irgen(l, op1addr, op2addr); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, UDLB, UDXB), mnm, d1, l, b1, d2, 0, b2); -+} -+ -+static void -+s390_format_SIL_RDI(HChar *(*irgen)(UShort i2, IRTemp op1addr), -+ UChar b1, UShort d1, UShort i2) -+{ -+ HChar *mnm; -+ IRTemp op1addr = newTemp(Ity_I64); -+ -+ assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) : -+ mkU64(0))); -+ -+ mnm = irgen(i2, op1addr); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, UDXB, INT), mnm, d1, 0, b1, (Int)(Short)i2); -+} -+ -+static void -+s390_format_SIL_RDU(HChar *(*irgen)(UShort i2, IRTemp op1addr), -+ UChar b1, UShort d1, UShort i2) -+{ -+ HChar *mnm; -+ IRTemp op1addr = newTemp(Ity_I64); -+ -+ assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) : -+ mkU64(0))); -+ -+ mnm = irgen(i2, op1addr); -+ -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2); -+} -+ -+ -+ -+/*------------------------------------------------------------*/ -+/*--- Build IR for opcodes ---*/ -+/*------------------------------------------------------------*/ -+ -+static HChar * -+s390_irgen_AR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, get_gpr_w1(r2)); -+ assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "ar"; -+} -+ -+static HChar * -+s390_irgen_AGR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, get_gpr_dw0(r2)); -+ assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "agr"; -+} -+ -+static HChar * -+s390_irgen_AGFR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2))); -+ assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "agfr"; -+} -+ -+static HChar * -+s390_irgen_ARK(UChar r3, UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp op3 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op2, get_gpr_w1(r2)); -+ assign(op3, get_gpr_w1(r3)); -+ assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "ark"; -+} -+ -+static HChar * -+s390_irgen_AGRK(UChar r3, UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp op3 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op2, get_gpr_dw0(r2)); -+ assign(op3, get_gpr_dw0(r3)); -+ assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "agrk"; -+} -+ -+static HChar * -+s390_irgen_A(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "a"; -+} -+ -+static HChar * -+s390_irgen_AY(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "ay"; -+} -+ -+static HChar * -+s390_irgen_AG(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, load(Ity_I64, mkexpr(op2addr))); -+ assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "ag"; -+} -+ -+static HChar * -+s390_irgen_AGF(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr)))); -+ assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "agf"; -+} -+ -+static HChar * -+s390_irgen_AFI(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ Int op2; -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ op2 = (Int)i2; -+ assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32, -+ mkU32((UInt)op2))); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "afi"; -+} -+ -+static HChar * -+s390_irgen_AGFI(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ Long op2; -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ op2 = (Long)(Int)i2; -+ assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64, -+ mkU64((ULong)op2))); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "agfi"; -+} -+ -+static HChar * -+s390_irgen_AHIK(UChar r1, UChar r3, UShort i2) -+{ -+ Int op2; -+ IRTemp op3 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ op2 = (Int)(Short)i2; -+ assign(op3, get_gpr_w1(r3)); -+ assign(result, binop(Iop_Add32, mkU32((UInt)op2), mkexpr(op3))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, mktemp(Ity_I32, mkU32((UInt) -+ op2)), op3); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "ahik"; -+} -+ -+static HChar * -+s390_irgen_AGHIK(UChar r1, UChar r3, UShort i2) -+{ -+ Long op2; -+ IRTemp op3 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ op2 = (Long)(Short)i2; -+ assign(op3, get_gpr_dw0(r3)); -+ assign(result, binop(Iop_Add64, mkU64((ULong)op2), mkexpr(op3))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, mktemp(Ity_I64, mkU64((ULong) -+ op2)), op3); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "aghik"; -+} -+ -+static HChar * -+s390_irgen_ASI(UChar i2, IRTemp op1addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ Int op2; -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, load(Ity_I32, mkexpr(op1addr))); -+ op2 = (Int)(Char)i2; -+ assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2))); -+ store(mkexpr(op1addr), mkexpr(result)); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32, -+ mkU32((UInt)op2))); -+ -+ return "asi"; -+} -+ -+static HChar * -+s390_irgen_AGSI(UChar i2, IRTemp op1addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ Long op2; -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, load(Ity_I64, mkexpr(op1addr))); -+ op2 = (Long)(Char)i2; -+ assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2))); -+ store(mkexpr(op1addr), mkexpr(result)); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64, -+ mkU64((ULong)op2))); -+ -+ return "agsi"; -+} -+ -+static HChar * -+s390_irgen_AH(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr)))); -+ assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "ah"; -+} -+ -+static HChar * -+s390_irgen_AHY(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr)))); -+ assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "ahy"; -+} -+ -+static HChar * -+s390_irgen_AHI(UChar r1, UShort i2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ Int op2; -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ op2 = (Int)(Short)i2; -+ assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32, -+ mkU32((UInt)op2))); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "ahi"; -+} -+ -+static HChar * -+s390_irgen_AGHI(UChar r1, UShort i2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ Long op2; -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ op2 = (Long)(Short)i2; -+ assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64, -+ mkU64((ULong)op2))); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "aghi"; -+} -+ -+static HChar * -+s390_irgen_AHHHR(UChar r3, UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp op3 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op2, get_gpr_w0(r2)); -+ assign(op3, get_gpr_w0(r3)); -+ assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3); -+ put_gpr_w0(r1, mkexpr(result)); -+ -+ return "ahhhr"; -+} -+ -+static HChar * -+s390_irgen_AHHLR(UChar r3, UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp op3 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op2, get_gpr_w0(r2)); -+ assign(op3, get_gpr_w1(r3)); -+ assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3); -+ put_gpr_w0(r1, mkexpr(result)); -+ -+ return "ahhlr"; -+} -+ -+static HChar * -+s390_irgen_AIH(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ Int op2; -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w0(r1)); -+ op2 = (Int)i2; -+ assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32, -+ mkU32((UInt)op2))); -+ put_gpr_w0(r1, mkexpr(result)); -+ -+ return "aih"; -+} -+ -+static HChar * -+s390_irgen_ALR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, get_gpr_w1(r2)); -+ assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "alr"; -+} -+ -+static HChar * -+s390_irgen_ALGR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, get_gpr_dw0(r2)); -+ assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "algr"; -+} -+ -+static HChar * -+s390_irgen_ALGFR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2))); -+ assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "algfr"; -+} -+ -+static HChar * -+s390_irgen_ALRK(UChar r3, UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp op3 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op2, get_gpr_w1(r2)); -+ assign(op3, get_gpr_w1(r3)); -+ assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "alrk"; -+} -+ -+static HChar * -+s390_irgen_ALGRK(UChar r3, UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp op3 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op2, get_gpr_dw0(r2)); -+ assign(op3, get_gpr_dw0(r3)); -+ assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "algrk"; -+} -+ -+static HChar * -+s390_irgen_AL(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "al"; -+} -+ -+static HChar * -+s390_irgen_ALY(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "aly"; -+} -+ -+static HChar * -+s390_irgen_ALG(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, load(Ity_I64, mkexpr(op2addr))); -+ assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "alg"; -+} -+ -+static HChar * -+s390_irgen_ALGF(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr)))); -+ assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "algf"; -+} -+ -+static HChar * -+s390_irgen_ALFI(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ UInt op2; -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ op2 = i2; -+ assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32, -+ mkU32(op2))); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "alfi"; -+} -+ -+static HChar * -+s390_irgen_ALGFI(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ ULong op2; -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ op2 = (ULong)i2; -+ assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64, -+ mkU64(op2))); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "algfi"; -+} -+ -+static HChar * -+s390_irgen_ALHHHR(UChar r3, UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp op3 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op2, get_gpr_w0(r2)); -+ assign(op3, get_gpr_w0(r3)); -+ assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3); -+ put_gpr_w0(r1, mkexpr(result)); -+ -+ return "alhhhr"; -+} -+ -+static HChar * -+s390_irgen_ALHHLR(UChar r3, UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp op3 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op2, get_gpr_w0(r2)); -+ assign(op3, get_gpr_w1(r3)); -+ assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3); -+ put_gpr_w0(r1, mkexpr(result)); -+ -+ return "alhhlr"; -+} -+ -+static HChar * -+s390_irgen_ALCR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ IRTemp carry_in = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, get_gpr_w1(r2)); -+ assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1))); -+ assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)), -+ mkexpr(carry_in))); -+ s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "alcr"; -+} -+ -+static HChar * -+s390_irgen_ALCGR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ IRTemp carry_in = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, get_gpr_dw0(r2)); -+ assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(), -+ mkU8(1)))); -+ assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)), -+ mkexpr(carry_in))); -+ s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "alcgr"; -+} -+ -+static HChar * -+s390_irgen_ALC(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ IRTemp carry_in = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1))); -+ assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)), -+ mkexpr(carry_in))); -+ s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "alc"; -+} -+ -+static HChar * -+s390_irgen_ALCG(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ IRTemp carry_in = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, load(Ity_I64, mkexpr(op2addr))); -+ assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(), -+ mkU8(1)))); -+ assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)), -+ mkexpr(carry_in))); -+ s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "alcg"; -+} -+ -+static HChar * -+s390_irgen_ALSI(UChar i2, IRTemp op1addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ UInt op2; -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, load(Ity_I32, mkexpr(op1addr))); -+ op2 = (UInt)(Int)(Char)i2; -+ assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32, -+ mkU32(op2))); -+ store(mkexpr(op1addr), mkexpr(result)); -+ -+ return "alsi"; -+} -+ -+static HChar * -+s390_irgen_ALGSI(UChar i2, IRTemp op1addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ ULong op2; -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, load(Ity_I64, mkexpr(op1addr))); -+ op2 = (ULong)(Long)(Char)i2; -+ assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64, -+ mkU64(op2))); -+ store(mkexpr(op1addr), mkexpr(result)); -+ -+ return "algsi"; -+} -+ -+static HChar * -+s390_irgen_ALHSIK(UChar r1, UChar r3, UShort i2) -+{ -+ UInt op2; -+ IRTemp op3 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ op2 = (UInt)(Int)(Short)i2; -+ assign(op3, get_gpr_w1(r3)); -+ assign(result, binop(Iop_Add32, mkU32(op2), mkexpr(op3))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, mktemp(Ity_I32, mkU32(op2)), -+ op3); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "alhsik"; -+} -+ -+static HChar * -+s390_irgen_ALGHSIK(UChar r1, UChar r3, UShort i2) -+{ -+ ULong op2; -+ IRTemp op3 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ op2 = (ULong)(Long)(Short)i2; -+ assign(op3, get_gpr_dw0(r3)); -+ assign(result, binop(Iop_Add64, mkU64(op2), mkexpr(op3))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(op2)), -+ op3); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "alghsik"; -+} -+ -+static HChar * -+s390_irgen_ALSIH(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ UInt op2; -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w0(r1)); -+ op2 = i2; -+ assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32, -+ mkU32(op2))); -+ put_gpr_w0(r1, mkexpr(result)); -+ -+ return "alsih"; -+} -+ -+static HChar * -+s390_irgen_ALSIHN(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ UInt op2; -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w0(r1)); -+ op2 = i2; -+ assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2))); -+ put_gpr_w0(r1, mkexpr(result)); -+ -+ return "alsihn"; -+} -+ -+static HChar * -+s390_irgen_NR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, get_gpr_w1(r2)); -+ assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "nr"; -+} -+ -+static HChar * -+s390_irgen_NGR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, get_gpr_dw0(r2)); -+ assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "ngr"; -+} -+ -+static HChar * -+s390_irgen_NRK(UChar r3, UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp op3 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op2, get_gpr_w1(r2)); -+ assign(op3, get_gpr_w1(r3)); -+ assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "nrk"; -+} -+ -+static HChar * -+s390_irgen_NGRK(UChar r3, UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp op3 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op2, get_gpr_dw0(r2)); -+ assign(op3, get_gpr_dw0(r3)); -+ assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "ngrk"; -+} -+ -+static HChar * -+s390_irgen_N(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "n"; -+} -+ -+static HChar * -+s390_irgen_NY(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "ny"; -+} -+ -+static HChar * -+s390_irgen_NG(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, load(Ity_I64, mkexpr(op2addr))); -+ assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "ng"; -+} -+ -+static HChar * -+s390_irgen_NI(UChar i2, IRTemp op1addr) -+{ -+ IRTemp op1 = newTemp(Ity_I8); -+ UChar op2; -+ IRTemp result = newTemp(Ity_I8); -+ -+ assign(op1, load(Ity_I8, mkexpr(op1addr))); -+ op2 = i2; -+ assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ store(mkexpr(op1addr), mkexpr(result)); -+ -+ return "ni"; -+} -+ -+static HChar * -+s390_irgen_NIY(UChar i2, IRTemp op1addr) -+{ -+ IRTemp op1 = newTemp(Ity_I8); -+ UChar op2; -+ IRTemp result = newTemp(Ity_I8); -+ -+ assign(op1, load(Ity_I8, mkexpr(op1addr))); -+ op2 = i2; -+ assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ store(mkexpr(op1addr), mkexpr(result)); -+ -+ return "niy"; -+} -+ -+static HChar * -+s390_irgen_NIHF(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ UInt op2; -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w0(r1)); -+ op2 = i2; -+ assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_w0(r1, mkexpr(result)); -+ -+ return "nihf"; -+} -+ -+static HChar * -+s390_irgen_NIHH(UChar r1, UShort i2) -+{ -+ IRTemp op1 = newTemp(Ity_I16); -+ UShort op2; -+ IRTemp result = newTemp(Ity_I16); -+ -+ assign(op1, get_gpr_hw0(r1)); -+ op2 = i2; -+ assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_hw0(r1, mkexpr(result)); -+ -+ return "nihh"; -+} -+ -+static HChar * -+s390_irgen_NIHL(UChar r1, UShort i2) -+{ -+ IRTemp op1 = newTemp(Ity_I16); -+ UShort op2; -+ IRTemp result = newTemp(Ity_I16); -+ -+ assign(op1, get_gpr_hw1(r1)); -+ op2 = i2; -+ assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_hw1(r1, mkexpr(result)); -+ -+ return "nihl"; -+} -+ -+static HChar * -+s390_irgen_NILF(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ UInt op2; -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ op2 = i2; -+ assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "nilf"; -+} -+ -+static HChar * -+s390_irgen_NILH(UChar r1, UShort i2) -+{ -+ IRTemp op1 = newTemp(Ity_I16); -+ UShort op2; -+ IRTemp result = newTemp(Ity_I16); -+ -+ assign(op1, get_gpr_hw2(r1)); -+ op2 = i2; -+ assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_hw2(r1, mkexpr(result)); -+ -+ return "nilh"; -+} -+ -+static HChar * -+s390_irgen_NILL(UChar r1, UShort i2) -+{ -+ IRTemp op1 = newTemp(Ity_I16); -+ UShort op2; -+ IRTemp result = newTemp(Ity_I16); -+ -+ assign(op1, get_gpr_hw3(r1)); -+ op2 = i2; -+ assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_hw3(r1, mkexpr(result)); -+ -+ return "nill"; -+} -+ -+static HChar * -+s390_irgen_BASR(UChar r1, UChar r2) -+{ -+ IRTemp target = newTemp(Ity_I64); -+ -+ if (r2 == 0) { -+ put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL)); -+ } else { -+ if (r1 != r2) { -+ put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL)); -+ call_function(get_gpr_dw0(r2)); -+ } else { -+ assign(target, get_gpr_dw0(r2)); -+ put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL)); -+ call_function(mkexpr(target)); -+ } -+ } -+ -+ return "basr"; -+} -+ -+static HChar * -+s390_irgen_BAS(UChar r1, IRTemp op2addr) -+{ -+ IRTemp target = newTemp(Ity_I64); -+ -+ put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL)); -+ assign(target, mkexpr(op2addr)); -+ call_function(mkexpr(target)); -+ -+ return "bas"; -+} -+ -+static HChar * -+s390_irgen_BCR(UChar r1, UChar r2) -+{ -+ IRTemp cond = newTemp(Ity_I32); -+ -+ if ((r2 == 0) || (r1 == 0)) { -+ } else { -+ if (r1 == 15) { -+ return_from_function(get_gpr_dw0(r2)); -+ } else { -+ assign(cond, s390_call_calculate_cond(r1)); -+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond), -+ mkU32(0)), get_gpr_dw0(r2)); -+ } -+ } -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC2(XMNM, GPR), S390_XMNM_BCR, r1, r2); -+ -+ return "bcr"; -+} -+ -+static HChar * -+s390_irgen_BC(UChar r1, UChar x2, UChar b2, UShort d2, IRTemp op2addr) -+{ -+ IRTemp cond = newTemp(Ity_I32); -+ -+ if (r1 == 0) { -+ } else { -+ if (r1 == 15) { -+ always_goto(mkexpr(op2addr)); -+ } else { -+ assign(cond, s390_call_calculate_cond(r1)); -+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond), -+ mkU32(0)), mkexpr(op2addr)); -+ } -+ } -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC2(XMNM, UDXB), S390_XMNM_BC, r1, d2, x2, b2); -+ -+ return "bc"; -+} -+ -+static HChar * -+s390_irgen_BCTR(UChar r1, UChar r2) -+{ -+ put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1))); -+ if (r2 != 0) { -+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0) -+ ), get_gpr_dw0(r2)); -+ } -+ -+ return "bctr"; -+} -+ -+static HChar * -+s390_irgen_BCTGR(UChar r1, UChar r2) -+{ -+ put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1))); -+ if (r2 != 0) { -+ if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1), -+ mkU64(0)), get_gpr_dw0(r2)); -+ } -+ -+ return "bctgr"; -+} -+ -+static HChar * -+s390_irgen_BCT(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1))); -+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)), -+ mkexpr(op2addr)); -+ -+ return "bct"; -+} -+ -+static HChar * -+s390_irgen_BCTG(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1))); -+ if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1), mkU64(0)), -+ mkexpr(op2addr)); -+ -+ return "bctg"; -+} -+ -+static HChar * -+s390_irgen_BXH(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ IRTemp value = newTemp(Ity_I32); -+ -+ assign(value, get_gpr_w1(r3 | 1)); -+ put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3))); -+ if_not_condition_goto_computed(binop(Iop_CmpLE32S, get_gpr_w1(r1), -+ mkexpr(value)), mkexpr(op2addr)); -+ -+ return "bxh"; -+} -+ -+static HChar * -+s390_irgen_BXHG(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ IRTemp value = newTemp(Ity_I64); -+ -+ assign(value, get_gpr_dw0(r3 | 1)); -+ put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3))); -+ if_not_condition_goto_computed(binop(Iop_CmpLE64S, get_gpr_dw0(r1), -+ mkexpr(value)), mkexpr(op2addr)); -+ -+ return "bxhg"; -+} -+ -+static HChar * -+s390_irgen_BXLE(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ IRTemp value = newTemp(Ity_I32); -+ -+ assign(value, get_gpr_w1(r3 | 1)); -+ put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3))); -+ if_not_condition_goto_computed(binop(Iop_CmpLT32S, mkexpr(value), -+ get_gpr_w1(r1)), mkexpr(op2addr)); -+ -+ return "bxle"; -+} -+ -+static HChar * -+s390_irgen_BXLEG(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ IRTemp value = newTemp(Ity_I64); -+ -+ assign(value, get_gpr_dw0(r3 | 1)); -+ put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3))); -+ if_not_condition_goto_computed(binop(Iop_CmpLT64S, mkexpr(value), -+ get_gpr_dw0(r1)), mkexpr(op2addr)); -+ -+ return "bxleg"; -+} -+ -+static HChar * -+s390_irgen_BRAS(UChar r1, UShort i2) -+{ -+ put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL)); -+ call_function(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1))); -+ -+ return "bras"; -+} -+ -+static HChar * -+s390_irgen_BRASL(UChar r1, UInt i2) -+{ -+ put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 6ULL)); -+ call_function(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1))); -+ -+ return "brasl"; -+} -+ -+static HChar * -+s390_irgen_BRC(UChar r1, UShort i2) -+{ -+ IRTemp cond = newTemp(Ity_I32); -+ -+ if (r1 == 0) { -+ } else { -+ if (r1 == 15) { -+ always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1)) -+ ); -+ } else { -+ assign(cond, s390_call_calculate_cond(r1)); -+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), -+ guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1)); -+ -+ } -+ } -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRC, r1, (Int)(Short)i2); -+ -+ return "brc"; -+} -+ -+static HChar * -+s390_irgen_BRCL(UChar r1, UInt i2) -+{ -+ IRTemp cond = newTemp(Ity_I32); -+ -+ if (r1 == 0) { -+ } else { -+ if (r1 == 15) { -+ always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1))); -+ } else { -+ assign(cond, s390_call_calculate_cond(r1)); -+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), -+ guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)); -+ } -+ } -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRCL, r1, i2); -+ -+ return "brcl"; -+} -+ -+static HChar * -+s390_irgen_BRCT(UChar r1, UShort i2) -+{ -+ put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1))); -+ if_condition_goto(binop(Iop_CmpNE32, get_gpr_w1(r1), mkU32(0)), -+ guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1)); -+ -+ return "brct"; -+} -+ -+static HChar * -+s390_irgen_BRCTG(UChar r1, UShort i2) -+{ -+ put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1))); -+ if_condition_goto(binop(Iop_CmpNE64, get_gpr_dw0(r1), mkU64(0)), -+ guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1)); -+ -+ return "brctg"; -+} -+ -+static HChar * -+s390_irgen_BRXH(UChar r1, UChar r3, UShort i2) -+{ -+ IRTemp value = newTemp(Ity_I32); -+ -+ assign(value, get_gpr_w1(r3 | 1)); -+ put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3))); -+ if_condition_goto(binop(Iop_CmpLT32S, mkexpr(value), get_gpr_w1(r1)), -+ guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1)); -+ -+ return "brxh"; -+} -+ -+static HChar * -+s390_irgen_BRXHG(UChar r1, UChar r3, UShort i2) -+{ -+ IRTemp value = newTemp(Ity_I64); -+ -+ assign(value, get_gpr_dw0(r3 | 1)); -+ put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3))); -+ if_condition_goto(binop(Iop_CmpLT64S, mkexpr(value), get_gpr_dw0(r1)), -+ guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1)); -+ -+ return "brxhg"; -+} -+ -+static HChar * -+s390_irgen_BRXLE(UChar r1, UChar r3, UShort i2) -+{ -+ IRTemp value = newTemp(Ity_I32); -+ -+ assign(value, get_gpr_w1(r3 | 1)); -+ put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3))); -+ if_condition_goto(binop(Iop_CmpLE32S, get_gpr_w1(r1), mkexpr(value)), -+ guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1)); -+ -+ return "brxle"; -+} -+ -+static HChar * -+s390_irgen_BRXLG(UChar r1, UChar r3, UShort i2) -+{ -+ IRTemp value = newTemp(Ity_I64); -+ -+ assign(value, get_gpr_dw0(r3 | 1)); -+ put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3))); -+ if_condition_goto(binop(Iop_CmpLE64S, get_gpr_dw0(r1), mkexpr(value)), -+ guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1)); -+ -+ return "brxlg"; -+} -+ -+static HChar * -+s390_irgen_CR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, get_gpr_w1(r2)); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); -+ -+ return "cr"; -+} -+ -+static HChar * -+s390_irgen_CGR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, get_gpr_dw0(r2)); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); -+ -+ return "cgr"; -+} -+ -+static HChar * -+s390_irgen_CGFR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); -+ -+ return "cgfr"; -+} -+ -+static HChar * -+s390_irgen_C(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); -+ -+ return "c"; -+} -+ -+static HChar * -+s390_irgen_CY(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); -+ -+ return "cy"; -+} -+ -+static HChar * -+s390_irgen_CG(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, load(Ity_I64, mkexpr(op2addr))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); -+ -+ return "cg"; -+} -+ -+static HChar * -+s390_irgen_CGF(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr)))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); -+ -+ return "cgf"; -+} -+ -+static HChar * -+s390_irgen_CFI(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ Int op2; -+ -+ assign(op1, get_gpr_w1(r1)); -+ op2 = (Int)i2; -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32, -+ mkU32((UInt)op2))); -+ -+ return "cfi"; -+} -+ -+static HChar * -+s390_irgen_CGFI(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ Long op2; -+ -+ assign(op1, get_gpr_dw0(r1)); -+ op2 = (Long)(Int)i2; -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64, -+ mkU64((ULong)op2))); -+ -+ return "cgfi"; -+} -+ -+static HChar * -+s390_irgen_CRL(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int) -+ i2 << 1)))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); -+ -+ return "crl"; -+} -+ -+static HChar * -+s390_irgen_CGRL(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int) -+ i2 << 1)))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); -+ -+ return "cgrl"; -+} -+ -+static HChar * -+s390_irgen_CGFRL(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr + -+ ((ULong)(Long)(Int)i2 << 1))))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); -+ -+ return "cgfrl"; -+} -+ -+static HChar * -+s390_irgen_CRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp icc = newTemp(Ity_I32); -+ IRTemp cond = newTemp(Ity_I32); -+ -+ if (m3 == 0) { -+ } else { -+ if (m3 == 14) { -+ always_goto(mkexpr(op4addr)); -+ } else { -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, get_gpr_w1(r2)); -+ assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1, -+ op2)); -+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3), -+ unop(Iop_32to8, mkexpr(icc))), mkU32(8))); -+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond), -+ mkU32(0)), mkexpr(op4addr)); -+ } -+ } -+ -+ return "crb"; -+} -+ -+static HChar * -+s390_irgen_CGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp icc = newTemp(Ity_I32); -+ IRTemp cond = newTemp(Ity_I32); -+ -+ if (m3 == 0) { -+ } else { -+ if (m3 == 14) { -+ always_goto(mkexpr(op4addr)); -+ } else { -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, get_gpr_dw0(r2)); -+ assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1, -+ op2)); -+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3), -+ unop(Iop_32to8, mkexpr(icc))), mkU32(8))); -+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond), -+ mkU32(0)), mkexpr(op4addr)); -+ } -+ } -+ -+ return "cgrb"; -+} -+ -+static HChar * -+s390_irgen_CRJ(UChar r1, UChar r2, UShort i4, UChar m3) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp icc = newTemp(Ity_I32); -+ IRTemp cond = newTemp(Ity_I32); -+ -+ if (m3 == 0) { -+ } else { -+ if (m3 == 14) { -+ always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)) -+ ); -+ } else { -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, get_gpr_w1(r2)); -+ assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1, -+ op2)); -+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3), -+ unop(Iop_32to8, mkexpr(icc))), mkU32(8))); -+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), -+ guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)); -+ -+ } -+ } -+ -+ return "crj"; -+} -+ -+static HChar * -+s390_irgen_CGRJ(UChar r1, UChar r2, UShort i4, UChar m3) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp icc = newTemp(Ity_I32); -+ IRTemp cond = newTemp(Ity_I32); -+ -+ if (m3 == 0) { -+ } else { -+ if (m3 == 14) { -+ always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)) -+ ); -+ } else { -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, get_gpr_dw0(r2)); -+ assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1, -+ op2)); -+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3), -+ unop(Iop_32to8, mkexpr(icc))), mkU32(8))); -+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), -+ guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)); -+ -+ } -+ } -+ -+ return "cgrj"; -+} -+ -+static HChar * -+s390_irgen_CIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ Int op2; -+ IRTemp icc = newTemp(Ity_I32); -+ IRTemp cond = newTemp(Ity_I32); -+ -+ if (m3 == 0) { -+ } else { -+ if (m3 == 14) { -+ always_goto(mkexpr(op4addr)); -+ } else { -+ assign(op1, get_gpr_w1(r1)); -+ op2 = (Int)(Char)i2; -+ assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1, -+ mktemp(Ity_I32, mkU32((UInt)op2)))); -+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3), -+ unop(Iop_32to8, mkexpr(icc))), mkU32(8))); -+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond), -+ mkU32(0)), mkexpr(op4addr)); -+ } -+ } -+ -+ return "cib"; -+} -+ -+static HChar * -+s390_irgen_CGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ Long op2; -+ IRTemp icc = newTemp(Ity_I32); -+ IRTemp cond = newTemp(Ity_I32); -+ -+ if (m3 == 0) { -+ } else { -+ if (m3 == 14) { -+ always_goto(mkexpr(op4addr)); -+ } else { -+ assign(op1, get_gpr_dw0(r1)); -+ op2 = (Long)(Char)i2; -+ assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1, -+ mktemp(Ity_I64, mkU64((ULong)op2)))); -+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3), -+ unop(Iop_32to8, mkexpr(icc))), mkU32(8))); -+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond), -+ mkU32(0)), mkexpr(op4addr)); -+ } -+ } -+ -+ return "cgib"; -+} -+ -+static HChar * -+s390_irgen_CIJ(UChar r1, UChar m3, UShort i4, UChar i2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ Int op2; -+ IRTemp icc = newTemp(Ity_I32); -+ IRTemp cond = newTemp(Ity_I32); -+ -+ if (m3 == 0) { -+ } else { -+ if (m3 == 14) { -+ always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)) -+ ); -+ } else { -+ assign(op1, get_gpr_w1(r1)); -+ op2 = (Int)(Char)i2; -+ assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1, -+ mktemp(Ity_I32, mkU32((UInt)op2)))); -+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3), -+ unop(Iop_32to8, mkexpr(icc))), mkU32(8))); -+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), -+ guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)); -+ -+ } -+ } -+ -+ return "cij"; -+} -+ -+static HChar * -+s390_irgen_CGIJ(UChar r1, UChar m3, UShort i4, UChar i2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ Long op2; -+ IRTemp icc = newTemp(Ity_I32); -+ IRTemp cond = newTemp(Ity_I32); -+ -+ if (m3 == 0) { -+ } else { -+ if (m3 == 14) { -+ always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)) -+ ); -+ } else { -+ assign(op1, get_gpr_dw0(r1)); -+ op2 = (Long)(Char)i2; -+ assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1, -+ mktemp(Ity_I64, mkU64((ULong)op2)))); -+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3), -+ unop(Iop_32to8, mkexpr(icc))), mkU32(8))); -+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), -+ guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)); -+ -+ } -+ } -+ -+ return "cgij"; -+} -+ -+static HChar * -+s390_irgen_CH(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr)))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); -+ -+ return "ch"; -+} -+ -+static HChar * -+s390_irgen_CHY(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr)))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); -+ -+ return "chy"; -+} -+ -+static HChar * -+s390_irgen_CGH(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr)))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); -+ -+ return "cgh"; -+} -+ -+static HChar * -+s390_irgen_CHI(UChar r1, UShort i2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ Int op2; -+ -+ assign(op1, get_gpr_w1(r1)); -+ op2 = (Int)(Short)i2; -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32, -+ mkU32((UInt)op2))); -+ -+ return "chi"; -+} -+ -+static HChar * -+s390_irgen_CGHI(UChar r1, UShort i2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ Long op2; -+ -+ assign(op1, get_gpr_dw0(r1)); -+ op2 = (Long)(Short)i2; -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64, -+ mkU64((ULong)op2))); -+ -+ return "cghi"; -+} -+ -+static HChar * -+s390_irgen_CHHSI(UShort i2, IRTemp op1addr) -+{ -+ IRTemp op1 = newTemp(Ity_I16); -+ Short op2; -+ -+ assign(op1, load(Ity_I16, mkexpr(op1addr))); -+ op2 = (Short)i2; -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I16, -+ mkU16((UShort)op2))); -+ -+ return "chhsi"; -+} -+ -+static HChar * -+s390_irgen_CHSI(UShort i2, IRTemp op1addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ Int op2; -+ -+ assign(op1, load(Ity_I32, mkexpr(op1addr))); -+ op2 = (Int)(Short)i2; -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32, -+ mkU32((UInt)op2))); -+ -+ return "chsi"; -+} -+ -+static HChar * -+s390_irgen_CGHSI(UShort i2, IRTemp op1addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ Long op2; -+ -+ assign(op1, load(Ity_I64, mkexpr(op1addr))); -+ op2 = (Long)(Short)i2; -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64, -+ mkU64((ULong)op2))); -+ -+ return "cghsi"; -+} -+ -+static HChar * -+s390_irgen_CHRL(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr + -+ ((ULong)(Long)(Int)i2 << 1))))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); -+ -+ return "chrl"; -+} -+ -+static HChar * -+s390_irgen_CGHRL(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr + -+ ((ULong)(Long)(Int)i2 << 1))))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); -+ -+ return "cghrl"; -+} -+ -+static HChar * -+s390_irgen_CHHR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w0(r1)); -+ assign(op2, get_gpr_w0(r2)); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); -+ -+ return "chhr"; -+} -+ -+static HChar * -+s390_irgen_CHLR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w0(r1)); -+ assign(op2, get_gpr_w1(r2)); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); -+ -+ return "chlr"; -+} -+ -+static HChar * -+s390_irgen_CHF(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w0(r1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2); -+ -+ return "chf"; -+} -+ -+static HChar * -+s390_irgen_CIH(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ Int op2; -+ -+ assign(op1, get_gpr_w0(r1)); -+ op2 = (Int)i2; -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32, -+ mkU32((UInt)op2))); -+ -+ return "cih"; -+} -+ -+static HChar * -+s390_irgen_CLR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, get_gpr_w1(r2)); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); -+ -+ return "clr"; -+} -+ -+static HChar * -+s390_irgen_CLGR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, get_gpr_dw0(r2)); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); -+ -+ return "clgr"; -+} -+ -+static HChar * -+s390_irgen_CLGFR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); -+ -+ return "clgfr"; -+} -+ -+static HChar * -+s390_irgen_CL(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); -+ -+ return "cl"; -+} -+ -+static HChar * -+s390_irgen_CLY(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); -+ -+ return "cly"; -+} -+ -+static HChar * -+s390_irgen_CLG(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, load(Ity_I64, mkexpr(op2addr))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); -+ -+ return "clg"; -+} -+ -+static HChar * -+s390_irgen_CLGF(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr)))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); -+ -+ return "clgf"; -+} -+ -+static HChar * -+s390_irgen_CLFI(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ UInt op2; -+ -+ assign(op1, get_gpr_w1(r1)); -+ op2 = i2; -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32, -+ mkU32(op2))); -+ -+ return "clfi"; -+} -+ -+static HChar * -+s390_irgen_CLGFI(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ ULong op2; -+ -+ assign(op1, get_gpr_dw0(r1)); -+ op2 = (ULong)i2; -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64, -+ mkU64(op2))); -+ -+ return "clgfi"; -+} -+ -+static HChar * -+s390_irgen_CLI(UChar i2, IRTemp op1addr) -+{ -+ IRTemp op1 = newTemp(Ity_I8); -+ UChar op2; -+ -+ assign(op1, load(Ity_I8, mkexpr(op1addr))); -+ op2 = i2; -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8, -+ mkU8(op2))); -+ -+ return "cli"; -+} -+ -+static HChar * -+s390_irgen_CLIY(UChar i2, IRTemp op1addr) -+{ -+ IRTemp op1 = newTemp(Ity_I8); -+ UChar op2; -+ -+ assign(op1, load(Ity_I8, mkexpr(op1addr))); -+ op2 = i2; -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8, -+ mkU8(op2))); -+ -+ return "cliy"; -+} -+ -+static HChar * -+s390_irgen_CLFHSI(UShort i2, IRTemp op1addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ UInt op2; -+ -+ assign(op1, load(Ity_I32, mkexpr(op1addr))); -+ op2 = (UInt)i2; -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32, -+ mkU32(op2))); -+ -+ return "clfhsi"; -+} -+ -+static HChar * -+s390_irgen_CLGHSI(UShort i2, IRTemp op1addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ ULong op2; -+ -+ assign(op1, load(Ity_I64, mkexpr(op1addr))); -+ op2 = (ULong)i2; -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64, -+ mkU64(op2))); -+ -+ return "clghsi"; -+} -+ -+static HChar * -+s390_irgen_CLHHSI(UShort i2, IRTemp op1addr) -+{ -+ IRTemp op1 = newTemp(Ity_I16); -+ UShort op2; -+ -+ assign(op1, load(Ity_I16, mkexpr(op1addr))); -+ op2 = i2; -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I16, -+ mkU16(op2))); -+ -+ return "clhhsi"; -+} -+ -+static HChar * -+s390_irgen_CLRL(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int) -+ i2 << 1)))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); -+ -+ return "clrl"; -+} -+ -+static HChar * -+s390_irgen_CLGRL(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int) -+ i2 << 1)))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); -+ -+ return "clgrl"; -+} -+ -+static HChar * -+s390_irgen_CLGFRL(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr + -+ ((ULong)(Long)(Int)i2 << 1))))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); -+ -+ return "clgfrl"; -+} -+ -+static HChar * -+s390_irgen_CLHRL(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr + -+ ((ULong)(Long)(Int)i2 << 1))))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); -+ -+ return "clhrl"; -+} -+ -+static HChar * -+s390_irgen_CLGHRL(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr + -+ ((ULong)(Long)(Int)i2 << 1))))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); -+ -+ return "clghrl"; -+} -+ -+static HChar * -+s390_irgen_CLRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp icc = newTemp(Ity_I32); -+ IRTemp cond = newTemp(Ity_I32); -+ -+ if (m3 == 0) { -+ } else { -+ if (m3 == 14) { -+ always_goto(mkexpr(op4addr)); -+ } else { -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, get_gpr_w1(r2)); -+ assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, -+ op2)); -+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3), -+ unop(Iop_32to8, mkexpr(icc))), mkU32(8))); -+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond), -+ mkU32(0)), mkexpr(op4addr)); -+ } -+ } -+ -+ return "clrb"; -+} -+ -+static HChar * -+s390_irgen_CLGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp icc = newTemp(Ity_I32); -+ IRTemp cond = newTemp(Ity_I32); -+ -+ if (m3 == 0) { -+ } else { -+ if (m3 == 14) { -+ always_goto(mkexpr(op4addr)); -+ } else { -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, get_gpr_dw0(r2)); -+ assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, -+ op2)); -+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3), -+ unop(Iop_32to8, mkexpr(icc))), mkU32(8))); -+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond), -+ mkU32(0)), mkexpr(op4addr)); -+ } -+ } -+ -+ return "clgrb"; -+} -+ -+static HChar * -+s390_irgen_CLRJ(UChar r1, UChar r2, UShort i4, UChar m3) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp icc = newTemp(Ity_I32); -+ IRTemp cond = newTemp(Ity_I32); -+ -+ if (m3 == 0) { -+ } else { -+ if (m3 == 14) { -+ always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)) -+ ); -+ } else { -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, get_gpr_w1(r2)); -+ assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, -+ op2)); -+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3), -+ unop(Iop_32to8, mkexpr(icc))), mkU32(8))); -+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), -+ guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)); -+ -+ } -+ } -+ -+ return "clrj"; -+} -+ -+static HChar * -+s390_irgen_CLGRJ(UChar r1, UChar r2, UShort i4, UChar m3) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp icc = newTemp(Ity_I32); -+ IRTemp cond = newTemp(Ity_I32); -+ -+ if (m3 == 0) { -+ } else { -+ if (m3 == 14) { -+ always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)) -+ ); -+ } else { -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, get_gpr_dw0(r2)); -+ assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, -+ op2)); -+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3), -+ unop(Iop_32to8, mkexpr(icc))), mkU32(8))); -+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), -+ guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)); -+ -+ } -+ } -+ -+ return "clgrj"; -+} -+ -+static HChar * -+s390_irgen_CLIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ UInt op2; -+ IRTemp icc = newTemp(Ity_I32); -+ IRTemp cond = newTemp(Ity_I32); -+ -+ if (m3 == 0) { -+ } else { -+ if (m3 == 14) { -+ always_goto(mkexpr(op4addr)); -+ } else { -+ assign(op1, get_gpr_w1(r1)); -+ op2 = (UInt)i2; -+ assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, -+ mktemp(Ity_I32, mkU32(op2)))); -+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3), -+ unop(Iop_32to8, mkexpr(icc))), mkU32(8))); -+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond), -+ mkU32(0)), mkexpr(op4addr)); -+ } -+ } -+ -+ return "clib"; -+} -+ -+static HChar * -+s390_irgen_CLGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ ULong op2; -+ IRTemp icc = newTemp(Ity_I32); -+ IRTemp cond = newTemp(Ity_I32); -+ -+ if (m3 == 0) { -+ } else { -+ if (m3 == 14) { -+ always_goto(mkexpr(op4addr)); -+ } else { -+ assign(op1, get_gpr_dw0(r1)); -+ op2 = (ULong)i2; -+ assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, -+ mktemp(Ity_I64, mkU64(op2)))); -+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3), -+ unop(Iop_32to8, mkexpr(icc))), mkU32(8))); -+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond), -+ mkU32(0)), mkexpr(op4addr)); -+ } -+ } -+ -+ return "clgib"; -+} -+ -+static HChar * -+s390_irgen_CLIJ(UChar r1, UChar m3, UShort i4, UChar i2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ UInt op2; -+ IRTemp icc = newTemp(Ity_I32); -+ IRTemp cond = newTemp(Ity_I32); -+ -+ if (m3 == 0) { -+ } else { -+ if (m3 == 14) { -+ always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)) -+ ); -+ } else { -+ assign(op1, get_gpr_w1(r1)); -+ op2 = (UInt)i2; -+ assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, -+ mktemp(Ity_I32, mkU32(op2)))); -+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3), -+ unop(Iop_32to8, mkexpr(icc))), mkU32(8))); -+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), -+ guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)); -+ -+ } -+ } -+ -+ return "clij"; -+} -+ -+static HChar * -+s390_irgen_CLGIJ(UChar r1, UChar m3, UShort i4, UChar i2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ ULong op2; -+ IRTemp icc = newTemp(Ity_I32); -+ IRTemp cond = newTemp(Ity_I32); -+ -+ if (m3 == 0) { -+ } else { -+ if (m3 == 14) { -+ always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)) -+ ); -+ } else { -+ assign(op1, get_gpr_dw0(r1)); -+ op2 = (ULong)i2; -+ assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, -+ mktemp(Ity_I64, mkU64(op2)))); -+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3), -+ unop(Iop_32to8, mkexpr(icc))), mkU32(8))); -+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)), -+ guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1)); -+ -+ } -+ } -+ -+ return "clgij"; -+} -+ -+static HChar * -+s390_irgen_CLM(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp b0 = newTemp(Ity_I32); -+ IRTemp b1 = newTemp(Ity_I32); -+ IRTemp b2 = newTemp(Ity_I32); -+ IRTemp b3 = newTemp(Ity_I32); -+ IRTemp c0 = newTemp(Ity_I32); -+ IRTemp c1 = newTemp(Ity_I32); -+ IRTemp c2 = newTemp(Ity_I32); -+ IRTemp c3 = newTemp(Ity_I32); -+ UChar n; -+ -+ n = 0; -+ if ((r3 & 8) != 0) { -+ assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1))); -+ assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr)))); -+ n = n + 1; -+ } else { -+ assign(b0, mkU32(0)); -+ assign(c0, mkU32(0)); -+ } -+ if ((r3 & 4) != 0) { -+ assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1))); -+ assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), -+ mkU64(n))))); -+ n = n + 1; -+ } else { -+ assign(b1, mkU32(0)); -+ assign(c1, mkU32(0)); -+ } -+ if ((r3 & 2) != 0) { -+ assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1))); -+ assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), -+ mkU64(n))))); -+ n = n + 1; -+ } else { -+ assign(b2, mkU32(0)); -+ assign(c2, mkU32(0)); -+ } -+ if ((r3 & 1) != 0) { -+ assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1))); -+ assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), -+ mkU64(n))))); -+ n = n + 1; -+ } else { -+ assign(b3, mkU32(0)); -+ assign(c3, mkU32(0)); -+ } -+ assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32, -+ mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))), -+ binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3))); -+ assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32, -+ mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))), -+ binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); -+ -+ return "clm"; -+} -+ -+static HChar * -+s390_irgen_CLMY(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp b0 = newTemp(Ity_I32); -+ IRTemp b1 = newTemp(Ity_I32); -+ IRTemp b2 = newTemp(Ity_I32); -+ IRTemp b3 = newTemp(Ity_I32); -+ IRTemp c0 = newTemp(Ity_I32); -+ IRTemp c1 = newTemp(Ity_I32); -+ IRTemp c2 = newTemp(Ity_I32); -+ IRTemp c3 = newTemp(Ity_I32); -+ UChar n; -+ -+ n = 0; -+ if ((r3 & 8) != 0) { -+ assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1))); -+ assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr)))); -+ n = n + 1; -+ } else { -+ assign(b0, mkU32(0)); -+ assign(c0, mkU32(0)); -+ } -+ if ((r3 & 4) != 0) { -+ assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1))); -+ assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), -+ mkU64(n))))); -+ n = n + 1; -+ } else { -+ assign(b1, mkU32(0)); -+ assign(c1, mkU32(0)); -+ } -+ if ((r3 & 2) != 0) { -+ assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1))); -+ assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), -+ mkU64(n))))); -+ n = n + 1; -+ } else { -+ assign(b2, mkU32(0)); -+ assign(c2, mkU32(0)); -+ } -+ if ((r3 & 1) != 0) { -+ assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1))); -+ assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), -+ mkU64(n))))); -+ n = n + 1; -+ } else { -+ assign(b3, mkU32(0)); -+ assign(c3, mkU32(0)); -+ } -+ assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32, -+ mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))), -+ binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3))); -+ assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32, -+ mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))), -+ binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); -+ -+ return "clmy"; -+} -+ -+static HChar * -+s390_irgen_CLMH(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp b0 = newTemp(Ity_I32); -+ IRTemp b1 = newTemp(Ity_I32); -+ IRTemp b2 = newTemp(Ity_I32); -+ IRTemp b3 = newTemp(Ity_I32); -+ IRTemp c0 = newTemp(Ity_I32); -+ IRTemp c1 = newTemp(Ity_I32); -+ IRTemp c2 = newTemp(Ity_I32); -+ IRTemp c3 = newTemp(Ity_I32); -+ UChar n; -+ -+ n = 0; -+ if ((r3 & 8) != 0) { -+ assign(b0, unop(Iop_8Uto32, get_gpr_b0(r1))); -+ assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr)))); -+ n = n + 1; -+ } else { -+ assign(b0, mkU32(0)); -+ assign(c0, mkU32(0)); -+ } -+ if ((r3 & 4) != 0) { -+ assign(b1, unop(Iop_8Uto32, get_gpr_b1(r1))); -+ assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), -+ mkU64(n))))); -+ n = n + 1; -+ } else { -+ assign(b1, mkU32(0)); -+ assign(c1, mkU32(0)); -+ } -+ if ((r3 & 2) != 0) { -+ assign(b2, unop(Iop_8Uto32, get_gpr_b2(r1))); -+ assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), -+ mkU64(n))))); -+ n = n + 1; -+ } else { -+ assign(b2, mkU32(0)); -+ assign(c2, mkU32(0)); -+ } -+ if ((r3 & 1) != 0) { -+ assign(b3, unop(Iop_8Uto32, get_gpr_b3(r1))); -+ assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), -+ mkU64(n))))); -+ n = n + 1; -+ } else { -+ assign(b3, mkU32(0)); -+ assign(c3, mkU32(0)); -+ } -+ assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32, -+ mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))), -+ binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3))); -+ assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32, -+ mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))), -+ binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); -+ -+ return "clmh"; -+} -+ -+static HChar * -+s390_irgen_CLHHR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w0(r1)); -+ assign(op2, get_gpr_w0(r2)); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); -+ -+ return "clhhr"; -+} -+ -+static HChar * -+s390_irgen_CLHLR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w0(r1)); -+ assign(op2, get_gpr_w1(r2)); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); -+ -+ return "clhlr"; -+} -+ -+static HChar * -+s390_irgen_CLHF(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w0(r1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2); -+ -+ return "clhf"; -+} -+ -+static HChar * -+s390_irgen_CLIH(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ UInt op2; -+ -+ assign(op1, get_gpr_w0(r1)); -+ op2 = i2; -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32, -+ mkU32(op2))); -+ -+ return "clih"; -+} -+ -+static HChar * -+s390_irgen_CPYA(UChar r1, UChar r2) -+{ -+ put_ar_w0(r1, get_ar_w0(r2)); -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, AR, AR), "cpya", r1, r2); -+ -+ return "cpya"; -+} -+ -+static HChar * -+s390_irgen_XR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ if (r1 == r2) { -+ assign(result, mkU32(0)); -+ } else { -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, get_gpr_w1(r2)); -+ assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2))); -+ } -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "xr"; -+} -+ -+static HChar * -+s390_irgen_XGR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ if (r1 == r2) { -+ assign(result, mkU64(0)); -+ } else { -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, get_gpr_dw0(r2)); -+ assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2))); -+ } -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "xgr"; -+} -+ -+static HChar * -+s390_irgen_XRK(UChar r3, UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp op3 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op2, get_gpr_w1(r2)); -+ assign(op3, get_gpr_w1(r3)); -+ assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "xrk"; -+} -+ -+static HChar * -+s390_irgen_XGRK(UChar r3, UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp op3 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op2, get_gpr_dw0(r2)); -+ assign(op3, get_gpr_dw0(r3)); -+ assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "xgrk"; -+} -+ -+static HChar * -+s390_irgen_X(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "x"; -+} -+ -+static HChar * -+s390_irgen_XY(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "xy"; -+} -+ -+static HChar * -+s390_irgen_XG(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, load(Ity_I64, mkexpr(op2addr))); -+ assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "xg"; -+} -+ -+static HChar * -+s390_irgen_XI(UChar i2, IRTemp op1addr) -+{ -+ IRTemp op1 = newTemp(Ity_I8); -+ UChar op2; -+ IRTemp result = newTemp(Ity_I8); -+ -+ assign(op1, load(Ity_I8, mkexpr(op1addr))); -+ op2 = i2; -+ assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ store(mkexpr(op1addr), mkexpr(result)); -+ -+ return "xi"; -+} -+ -+static HChar * -+s390_irgen_XIY(UChar i2, IRTemp op1addr) -+{ -+ IRTemp op1 = newTemp(Ity_I8); -+ UChar op2; -+ IRTemp result = newTemp(Ity_I8); -+ -+ assign(op1, load(Ity_I8, mkexpr(op1addr))); -+ op2 = i2; -+ assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ store(mkexpr(op1addr), mkexpr(result)); -+ -+ return "xiy"; -+} -+ -+static HChar * -+s390_irgen_XIHF(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ UInt op2; -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w0(r1)); -+ op2 = i2; -+ assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_w0(r1, mkexpr(result)); -+ -+ return "xihf"; -+} -+ -+static HChar * -+s390_irgen_XILF(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ UInt op2; -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ op2 = i2; -+ assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "xilf"; -+} -+ -+static HChar * -+s390_irgen_EAR(UChar r1, UChar r2) -+{ -+ put_gpr_w1(r1, get_ar_w0(r2)); -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, GPR, AR), "ear", r1, r2); -+ -+ return "ear"; -+} -+ -+static HChar * -+s390_irgen_IC(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr))); -+ -+ return "ic"; -+} -+ -+static HChar * -+s390_irgen_ICY(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr))); -+ -+ return "icy"; -+} -+ -+static HChar * -+s390_irgen_ICM(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ UChar n; -+ IRTemp result = newTemp(Ity_I32); -+ UInt mask; -+ -+ n = 0; -+ mask = (UInt)r3; -+ if ((mask & 8) != 0) { -+ put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr))); -+ n = n + 1; -+ } -+ if ((mask & 4) != 0) { -+ put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n)))); -+ -+ n = n + 1; -+ } -+ if ((mask & 2) != 0) { -+ put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n)))); -+ -+ n = n + 1; -+ } -+ if ((mask & 1) != 0) { -+ put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n)))); -+ -+ n = n + 1; -+ } -+ assign(result, get_gpr_w1(r1)); -+ s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32, -+ mkU32(mask))); -+ -+ return "icm"; -+} -+ -+static HChar * -+s390_irgen_ICMY(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ UChar n; -+ IRTemp result = newTemp(Ity_I32); -+ UInt mask; -+ -+ n = 0; -+ mask = (UInt)r3; -+ if ((mask & 8) != 0) { -+ put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr))); -+ n = n + 1; -+ } -+ if ((mask & 4) != 0) { -+ put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n)))); -+ -+ n = n + 1; -+ } -+ if ((mask & 2) != 0) { -+ put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n)))); -+ -+ n = n + 1; -+ } -+ if ((mask & 1) != 0) { -+ put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n)))); -+ -+ n = n + 1; -+ } -+ assign(result, get_gpr_w1(r1)); -+ s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32, -+ mkU32(mask))); -+ -+ return "icmy"; -+} -+ -+static HChar * -+s390_irgen_ICMH(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ UChar n; -+ IRTemp result = newTemp(Ity_I32); -+ UInt mask; -+ -+ n = 0; -+ mask = (UInt)r3; -+ if ((mask & 8) != 0) { -+ put_gpr_b0(r1, load(Ity_I8, mkexpr(op2addr))); -+ n = n + 1; -+ } -+ if ((mask & 4) != 0) { -+ put_gpr_b1(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n)))); -+ -+ n = n + 1; -+ } -+ if ((mask & 2) != 0) { -+ put_gpr_b2(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n)))); -+ -+ n = n + 1; -+ } -+ if ((mask & 1) != 0) { -+ put_gpr_b3(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n)))); -+ -+ n = n + 1; -+ } -+ assign(result, get_gpr_w0(r1)); -+ s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32, -+ mkU32(mask))); -+ -+ return "icmh"; -+} -+ -+static HChar * -+s390_irgen_IIHF(UChar r1, UInt i2) -+{ -+ put_gpr_w0(r1, mkU32(i2)); -+ -+ return "iihf"; -+} -+ -+static HChar * -+s390_irgen_IIHH(UChar r1, UShort i2) -+{ -+ put_gpr_hw0(r1, mkU16(i2)); -+ -+ return "iihh"; -+} -+ -+static HChar * -+s390_irgen_IIHL(UChar r1, UShort i2) -+{ -+ put_gpr_hw1(r1, mkU16(i2)); -+ -+ return "iihl"; -+} -+ -+static HChar * -+s390_irgen_IILF(UChar r1, UInt i2) -+{ -+ put_gpr_w1(r1, mkU32(i2)); -+ -+ return "iilf"; -+} -+ -+static HChar * -+s390_irgen_IILH(UChar r1, UShort i2) -+{ -+ put_gpr_hw2(r1, mkU16(i2)); -+ -+ return "iilh"; -+} -+ -+static HChar * -+s390_irgen_IILL(UChar r1, UShort i2) -+{ -+ put_gpr_hw3(r1, mkU16(i2)); -+ -+ return "iill"; -+} -+ -+static HChar * -+s390_irgen_LR(UChar r1, UChar r2) -+{ -+ put_gpr_w1(r1, get_gpr_w1(r2)); -+ -+ return "lr"; -+} -+ -+static HChar * -+s390_irgen_LGR(UChar r1, UChar r2) -+{ -+ put_gpr_dw0(r1, get_gpr_dw0(r2)); -+ -+ return "lgr"; -+} -+ -+static HChar * -+s390_irgen_LGFR(UChar r1, UChar r2) -+{ -+ put_gpr_dw0(r1, unop(Iop_32Sto64, get_gpr_w1(r2))); -+ -+ return "lgfr"; -+} -+ -+static HChar * -+s390_irgen_L(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr))); -+ -+ return "l"; -+} -+ -+static HChar * -+s390_irgen_LY(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr))); -+ -+ return "ly"; -+} -+ -+static HChar * -+s390_irgen_LG(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr))); -+ -+ return "lg"; -+} -+ -+static HChar * -+s390_irgen_LGF(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr)))); -+ -+ return "lgf"; -+} -+ -+static HChar * -+s390_irgen_LGFI(UChar r1, UInt i2) -+{ -+ put_gpr_dw0(r1, mkU64((ULong)(Long)(Int)i2)); -+ -+ return "lgfi"; -+} -+ -+static HChar * -+s390_irgen_LRL(UChar r1, UInt i2) -+{ -+ put_gpr_w1(r1, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int) -+ i2 << 1)))); -+ -+ return "lrl"; -+} -+ -+static HChar * -+s390_irgen_LGRL(UChar r1, UInt i2) -+{ -+ put_gpr_dw0(r1, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int) -+ i2 << 1)))); -+ -+ return "lgrl"; -+} -+ -+static HChar * -+s390_irgen_LGFRL(UChar r1, UInt i2) -+{ -+ put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr + -+ ((ULong)(Long)(Int)i2 << 1))))); -+ -+ return "lgfrl"; -+} -+ -+static HChar * -+s390_irgen_LA(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_dw0(r1, mkexpr(op2addr)); -+ -+ return "la"; -+} -+ -+static HChar * -+s390_irgen_LAY(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_dw0(r1, mkexpr(op2addr)); -+ -+ return "lay"; -+} -+ -+static HChar * -+s390_irgen_LAE(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_dw0(r1, mkexpr(op2addr)); -+ -+ return "lae"; -+} -+ -+static HChar * -+s390_irgen_LAEY(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_dw0(r1, mkexpr(op2addr)); -+ -+ return "laey"; -+} -+ -+static HChar * -+s390_irgen_LARL(UChar r1, UInt i2) -+{ -+ put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1))); -+ -+ return "larl"; -+} -+ -+static HChar * -+s390_irgen_LAA(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp op3 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ assign(op3, get_gpr_w1(r3)); -+ assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3); -+ store(mkexpr(op2addr), mkexpr(result)); -+ put_gpr_w1(r1, mkexpr(op2)); -+ -+ return "laa"; -+} -+ -+static HChar * -+s390_irgen_LAAG(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp op3 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op2, load(Ity_I64, mkexpr(op2addr))); -+ assign(op3, get_gpr_dw0(r3)); -+ assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3); -+ store(mkexpr(op2addr), mkexpr(result)); -+ put_gpr_dw0(r1, mkexpr(op2)); -+ -+ return "laag"; -+} -+ -+static HChar * -+s390_irgen_LAAL(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp op3 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ assign(op3, get_gpr_w1(r3)); -+ assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3); -+ store(mkexpr(op2addr), mkexpr(result)); -+ put_gpr_w1(r1, mkexpr(op2)); -+ -+ return "laal"; -+} -+ -+static HChar * -+s390_irgen_LAALG(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp op3 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op2, load(Ity_I64, mkexpr(op2addr))); -+ assign(op3, get_gpr_dw0(r3)); -+ assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3); -+ store(mkexpr(op2addr), mkexpr(result)); -+ put_gpr_dw0(r1, mkexpr(op2)); -+ -+ return "laalg"; -+} -+ -+static HChar * -+s390_irgen_LAN(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp op3 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ assign(op3, get_gpr_w1(r3)); -+ assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ store(mkexpr(op2addr), mkexpr(result)); -+ put_gpr_w1(r1, mkexpr(op2)); -+ -+ return "lan"; -+} -+ -+static HChar * -+s390_irgen_LANG(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp op3 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op2, load(Ity_I64, mkexpr(op2addr))); -+ assign(op3, get_gpr_dw0(r3)); -+ assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ store(mkexpr(op2addr), mkexpr(result)); -+ put_gpr_dw0(r1, mkexpr(op2)); -+ -+ return "lang"; -+} -+ -+static HChar * -+s390_irgen_LAX(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp op3 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ assign(op3, get_gpr_w1(r3)); -+ assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ store(mkexpr(op2addr), mkexpr(result)); -+ put_gpr_w1(r1, mkexpr(op2)); -+ -+ return "lax"; -+} -+ -+static HChar * -+s390_irgen_LAXG(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp op3 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op2, load(Ity_I64, mkexpr(op2addr))); -+ assign(op3, get_gpr_dw0(r3)); -+ assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ store(mkexpr(op2addr), mkexpr(result)); -+ put_gpr_dw0(r1, mkexpr(op2)); -+ -+ return "laxg"; -+} -+ -+static HChar * -+s390_irgen_LAO(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp op3 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ assign(op3, get_gpr_w1(r3)); -+ assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ store(mkexpr(op2addr), mkexpr(result)); -+ put_gpr_w1(r1, mkexpr(op2)); -+ -+ return "lao"; -+} -+ -+static HChar * -+s390_irgen_LAOG(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp op3 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op2, load(Ity_I64, mkexpr(op2addr))); -+ assign(op3, get_gpr_dw0(r3)); -+ assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ store(mkexpr(op2addr), mkexpr(result)); -+ put_gpr_dw0(r1, mkexpr(op2)); -+ -+ return "laog"; -+} -+ -+static HChar * -+s390_irgen_LTR(UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op2, get_gpr_w1(r2)); -+ put_gpr_w1(r1, mkexpr(op2)); -+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2); -+ -+ return "ltr"; -+} -+ -+static HChar * -+s390_irgen_LTGR(UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op2, get_gpr_dw0(r2)); -+ put_gpr_dw0(r1, mkexpr(op2)); -+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2); -+ -+ return "ltgr"; -+} -+ -+static HChar * -+s390_irgen_LTGFR(UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2))); -+ put_gpr_dw0(r1, mkexpr(op2)); -+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2); -+ -+ return "ltgfr"; -+} -+ -+static HChar * -+s390_irgen_LT(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ put_gpr_w1(r1, mkexpr(op2)); -+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2); -+ -+ return "lt"; -+} -+ -+static HChar * -+s390_irgen_LTG(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op2, load(Ity_I64, mkexpr(op2addr))); -+ put_gpr_dw0(r1, mkexpr(op2)); -+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2); -+ -+ return "ltg"; -+} -+ -+static HChar * -+s390_irgen_LTGF(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr)))); -+ put_gpr_dw0(r1, mkexpr(op2)); -+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2); -+ -+ return "ltgf"; -+} -+ -+static HChar * -+s390_irgen_LBR(UChar r1, UChar r2) -+{ -+ put_gpr_w1(r1, unop(Iop_8Sto32, get_gpr_b7(r2))); -+ -+ return "lbr"; -+} -+ -+static HChar * -+s390_irgen_LGBR(UChar r1, UChar r2) -+{ -+ put_gpr_dw0(r1, unop(Iop_8Sto64, get_gpr_b7(r2))); -+ -+ return "lgbr"; -+} -+ -+static HChar * -+s390_irgen_LB(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_w1(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr)))); -+ -+ return "lb"; -+} -+ -+static HChar * -+s390_irgen_LGB(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_dw0(r1, unop(Iop_8Sto64, load(Ity_I8, mkexpr(op2addr)))); -+ -+ return "lgb"; -+} -+ -+static HChar * -+s390_irgen_LBH(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_w0(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr)))); -+ -+ return "lbh"; -+} -+ -+static HChar * -+s390_irgen_LCR(UChar r1, UChar r2) -+{ -+ Int op1; -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ op1 = 0; -+ assign(op2, get_gpr_w1(r2)); -+ assign(result, binop(Iop_Sub32, mkU32((UInt)op1), mkexpr(op2))); -+ put_gpr_w1(r1, mkexpr(result)); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, mktemp(Ity_I32, mkU32((UInt) -+ op1)), op2); -+ -+ return "lcr"; -+} -+ -+static HChar * -+s390_irgen_LCGR(UChar r1, UChar r2) -+{ -+ Long op1; -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ op1 = 0ULL; -+ assign(op2, get_gpr_dw0(r2)); -+ assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2))); -+ put_gpr_dw0(r1, mkexpr(result)); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong) -+ op1)), op2); -+ -+ return "lcgr"; -+} -+ -+static HChar * -+s390_irgen_LCGFR(UChar r1, UChar r2) -+{ -+ Long op1; -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ op1 = 0ULL; -+ assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2))); -+ assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2))); -+ put_gpr_dw0(r1, mkexpr(result)); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong) -+ op1)), op2); -+ -+ return "lcgfr"; -+} -+ -+static HChar * -+s390_irgen_LHR(UChar r1, UChar r2) -+{ -+ put_gpr_w1(r1, unop(Iop_16Sto32, get_gpr_hw3(r2))); -+ -+ return "lhr"; -+} -+ -+static HChar * -+s390_irgen_LGHR(UChar r1, UChar r2) -+{ -+ put_gpr_dw0(r1, unop(Iop_16Sto64, get_gpr_hw3(r2))); -+ -+ return "lghr"; -+} -+ -+static HChar * -+s390_irgen_LH(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr)))); -+ -+ return "lh"; -+} -+ -+static HChar * -+s390_irgen_LHY(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr)))); -+ -+ return "lhy"; -+} -+ -+static HChar * -+s390_irgen_LGH(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr)))); -+ -+ return "lgh"; -+} -+ -+static HChar * -+s390_irgen_LHI(UChar r1, UShort i2) -+{ -+ put_gpr_w1(r1, mkU32((UInt)(Int)(Short)i2)); -+ -+ return "lhi"; -+} -+ -+static HChar * -+s390_irgen_LGHI(UChar r1, UShort i2) -+{ -+ put_gpr_dw0(r1, mkU64((ULong)(Long)(Short)i2)); -+ -+ return "lghi"; -+} -+ -+static HChar * -+s390_irgen_LHRL(UChar r1, UInt i2) -+{ -+ put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr + -+ ((ULong)(Long)(Int)i2 << 1))))); -+ -+ return "lhrl"; -+} -+ -+static HChar * -+s390_irgen_LGHRL(UChar r1, UInt i2) -+{ -+ put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr + -+ ((ULong)(Long)(Int)i2 << 1))))); -+ -+ return "lghrl"; -+} -+ -+static HChar * -+s390_irgen_LHH(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_w0(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr)))); -+ -+ return "lhh"; -+} -+ -+static HChar * -+s390_irgen_LFH(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_w0(r1, load(Ity_I32, mkexpr(op2addr))); -+ -+ return "lfh"; -+} -+ -+static HChar * -+s390_irgen_LLGFR(UChar r1, UChar r2) -+{ -+ put_gpr_dw0(r1, unop(Iop_32Uto64, get_gpr_w1(r2))); -+ -+ return "llgfr"; -+} -+ -+static HChar * -+s390_irgen_LLGF(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr)))); -+ -+ return "llgf"; -+} -+ -+static HChar * -+s390_irgen_LLGFRL(UChar r1, UInt i2) -+{ -+ put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr + -+ ((ULong)(Long)(Int)i2 << 1))))); -+ -+ return "llgfrl"; -+} -+ -+static HChar * -+s390_irgen_LLCR(UChar r1, UChar r2) -+{ -+ put_gpr_w1(r1, unop(Iop_8Uto32, get_gpr_b7(r2))); -+ -+ return "llcr"; -+} -+ -+static HChar * -+s390_irgen_LLGCR(UChar r1, UChar r2) -+{ -+ put_gpr_dw0(r1, unop(Iop_8Uto64, get_gpr_b7(r2))); -+ -+ return "llgcr"; -+} -+ -+static HChar * -+s390_irgen_LLC(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_w1(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr)))); -+ -+ return "llc"; -+} -+ -+static HChar * -+s390_irgen_LLGC(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_dw0(r1, unop(Iop_8Uto64, load(Ity_I8, mkexpr(op2addr)))); -+ -+ return "llgc"; -+} -+ -+static HChar * -+s390_irgen_LLCH(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_w0(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr)))); -+ -+ return "llch"; -+} -+ -+static HChar * -+s390_irgen_LLHR(UChar r1, UChar r2) -+{ -+ put_gpr_w1(r1, unop(Iop_16Uto32, get_gpr_hw3(r2))); -+ -+ return "llhr"; -+} -+ -+static HChar * -+s390_irgen_LLGHR(UChar r1, UChar r2) -+{ -+ put_gpr_dw0(r1, unop(Iop_16Uto64, get_gpr_hw3(r2))); -+ -+ return "llghr"; -+} -+ -+static HChar * -+s390_irgen_LLH(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr)))); -+ -+ return "llh"; -+} -+ -+static HChar * -+s390_irgen_LLGH(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkexpr(op2addr)))); -+ -+ return "llgh"; -+} -+ -+static HChar * -+s390_irgen_LLHRL(UChar r1, UInt i2) -+{ -+ put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr + -+ ((ULong)(Long)(Int)i2 << 1))))); -+ -+ return "llhrl"; -+} -+ -+static HChar * -+s390_irgen_LLGHRL(UChar r1, UInt i2) -+{ -+ put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr + -+ ((ULong)(Long)(Int)i2 << 1))))); -+ -+ return "llghrl"; -+} -+ -+static HChar * -+s390_irgen_LLHH(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_w0(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr)))); -+ -+ return "llhh"; -+} -+ -+static HChar * -+s390_irgen_LLIHF(UChar r1, UInt i2) -+{ -+ put_gpr_dw0(r1, mkU64(((ULong)i2) << 32)); -+ -+ return "llihf"; -+} -+ -+static HChar * -+s390_irgen_LLIHH(UChar r1, UShort i2) -+{ -+ put_gpr_dw0(r1, mkU64(((ULong)i2) << 48)); -+ -+ return "llihh"; -+} -+ -+static HChar * -+s390_irgen_LLIHL(UChar r1, UShort i2) -+{ -+ put_gpr_dw0(r1, mkU64(((ULong)i2) << 32)); -+ -+ return "llihl"; -+} -+ -+static HChar * -+s390_irgen_LLILF(UChar r1, UInt i2) -+{ -+ put_gpr_dw0(r1, mkU64(i2)); -+ -+ return "llilf"; -+} -+ -+static HChar * -+s390_irgen_LLILH(UChar r1, UShort i2) -+{ -+ put_gpr_dw0(r1, mkU64(((ULong)i2) << 16)); -+ -+ return "llilh"; -+} -+ -+static HChar * -+s390_irgen_LLILL(UChar r1, UShort i2) -+{ -+ put_gpr_dw0(r1, mkU64(i2)); -+ -+ return "llill"; -+} -+ -+static HChar * -+s390_irgen_LLGTR(UChar r1, UChar r2) -+{ -+ put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, get_gpr_w1(r2), -+ mkU32(2147483647)))); -+ -+ return "llgtr"; -+} -+ -+static HChar * -+s390_irgen_LLGT(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, load(Ity_I32, -+ mkexpr(op2addr)), mkU32(2147483647)))); -+ -+ return "llgt"; -+} -+ -+static HChar * -+s390_irgen_LNR(UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op2, get_gpr_w1(r2)); -+ assign(result, mkite(binop(Iop_CmpLE32S, mkexpr(op2), mkU32(0)), mkexpr(op2), -+ binop(Iop_Sub32, mkU32(0), mkexpr(op2)))); -+ put_gpr_w1(r1, mkexpr(result)); -+ s390_cc_thunk_putS(S390_CC_OP_BITWISE, result); -+ -+ return "lnr"; -+} -+ -+static HChar * -+s390_irgen_LNGR(UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op2, get_gpr_dw0(r2)); -+ assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2), -+ binop(Iop_Sub64, mkU64(0), mkexpr(op2)))); -+ put_gpr_dw0(r1, mkexpr(result)); -+ s390_cc_thunk_putS(S390_CC_OP_BITWISE, result); -+ -+ return "lngr"; -+} -+ -+static HChar * -+s390_irgen_LNGFR(UChar r1, UChar r2 __attribute__((unused))) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op2, unop(Iop_32Sto64, get_gpr_w1(r1))); -+ assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2), -+ binop(Iop_Sub64, mkU64(0), mkexpr(op2)))); -+ put_gpr_dw0(r1, mkexpr(result)); -+ s390_cc_thunk_putS(S390_CC_OP_BITWISE, result); -+ -+ return "lngfr"; -+} -+ -+static HChar * -+s390_irgen_LPQ(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr))); -+ put_gpr_dw0(r1 + 1, load(Ity_I64, binop(Iop_Add64, mkexpr(op2addr), mkU64(8)) -+ )); -+ -+ return "lpq"; -+} -+ -+static HChar * -+s390_irgen_LPR(UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op2, get_gpr_w1(r2)); -+ assign(result, mkite(binop(Iop_CmpLT32S, mkexpr(op2), mkU32(0)), -+ binop(Iop_Sub32, mkU32(0), mkexpr(op2)), mkexpr(op2))); -+ put_gpr_w1(r1, mkexpr(result)); -+ s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_32, op2); -+ -+ return "lpr"; -+} -+ -+static HChar * -+s390_irgen_LPGR(UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op2, get_gpr_dw0(r2)); -+ assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)), -+ binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2))); -+ put_gpr_dw0(r1, mkexpr(result)); -+ s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2); -+ -+ return "lpgr"; -+} -+ -+static HChar * -+s390_irgen_LPGFR(UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2))); -+ assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)), -+ binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2))); -+ put_gpr_dw0(r1, mkexpr(result)); -+ s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2); -+ -+ return "lpgfr"; -+} -+ -+static HChar * -+s390_irgen_LRVR(UChar r1, UChar r2) -+{ -+ IRTemp b0 = newTemp(Ity_I8); -+ IRTemp b1 = newTemp(Ity_I8); -+ IRTemp b2 = newTemp(Ity_I8); -+ IRTemp b3 = newTemp(Ity_I8); -+ -+ assign(b3, get_gpr_b7(r2)); -+ assign(b2, get_gpr_b6(r2)); -+ assign(b1, get_gpr_b5(r2)); -+ assign(b0, get_gpr_b4(r2)); -+ put_gpr_b4(r1, mkexpr(b3)); -+ put_gpr_b5(r1, mkexpr(b2)); -+ put_gpr_b6(r1, mkexpr(b1)); -+ put_gpr_b7(r1, mkexpr(b0)); -+ -+ return "lrvr"; -+} -+ -+static HChar * -+s390_irgen_LRVGR(UChar r1, UChar r2) -+{ -+ IRTemp b0 = newTemp(Ity_I8); -+ IRTemp b1 = newTemp(Ity_I8); -+ IRTemp b2 = newTemp(Ity_I8); -+ IRTemp b3 = newTemp(Ity_I8); -+ IRTemp b4 = newTemp(Ity_I8); -+ IRTemp b5 = newTemp(Ity_I8); -+ IRTemp b6 = newTemp(Ity_I8); -+ IRTemp b7 = newTemp(Ity_I8); -+ -+ assign(b7, get_gpr_b7(r2)); -+ assign(b6, get_gpr_b6(r2)); -+ assign(b5, get_gpr_b5(r2)); -+ assign(b4, get_gpr_b4(r2)); -+ assign(b3, get_gpr_b3(r2)); -+ assign(b2, get_gpr_b2(r2)); -+ assign(b1, get_gpr_b1(r2)); -+ assign(b0, get_gpr_b0(r2)); -+ put_gpr_b0(r1, mkexpr(b7)); -+ put_gpr_b1(r1, mkexpr(b6)); -+ put_gpr_b2(r1, mkexpr(b5)); -+ put_gpr_b3(r1, mkexpr(b4)); -+ put_gpr_b4(r1, mkexpr(b3)); -+ put_gpr_b5(r1, mkexpr(b2)); -+ put_gpr_b6(r1, mkexpr(b1)); -+ put_gpr_b7(r1, mkexpr(b0)); -+ -+ return "lrvgr"; -+} -+ -+static HChar * -+s390_irgen_LRVH(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op2 = newTemp(Ity_I16); -+ -+ assign(op2, load(Ity_I16, mkexpr(op2addr))); -+ put_gpr_b6(r1, unop(Iop_16to8, mkexpr(op2))); -+ put_gpr_b7(r1, unop(Iop_16HIto8, mkexpr(op2))); -+ -+ return "lrvh"; -+} -+ -+static HChar * -+s390_irgen_LRV(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_And32, mkexpr(op2), mkU32(255)))); -+ put_gpr_b5(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2), -+ mkU8(8)), mkU32(255)))); -+ put_gpr_b6(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2), -+ mkU8(16)), mkU32(255)))); -+ put_gpr_b7(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2), -+ mkU8(24)), mkU32(255)))); -+ -+ return "lrv"; -+} -+ -+static HChar * -+s390_irgen_LRVG(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op2, load(Ity_I64, mkexpr(op2addr))); -+ put_gpr_b0(r1, unop(Iop_64to8, binop(Iop_And64, mkexpr(op2), mkU64(255)))); -+ put_gpr_b1(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2), -+ mkU8(8)), mkU64(255)))); -+ put_gpr_b2(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2), -+ mkU8(16)), mkU64(255)))); -+ put_gpr_b3(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2), -+ mkU8(24)), mkU64(255)))); -+ put_gpr_b4(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2), -+ mkU8(32)), mkU64(255)))); -+ put_gpr_b5(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2), -+ mkU8(40)), mkU64(255)))); -+ put_gpr_b6(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2), -+ mkU8(48)), mkU64(255)))); -+ put_gpr_b7(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2), -+ mkU8(56)), mkU64(255)))); -+ -+ return "lrvg"; -+} -+ -+static HChar * -+s390_irgen_MVHHI(UShort i2, IRTemp op1addr) -+{ -+ store(mkexpr(op1addr), mkU16(i2)); -+ -+ return "mvhhi"; -+} -+ -+static HChar * -+s390_irgen_MVHI(UShort i2, IRTemp op1addr) -+{ -+ store(mkexpr(op1addr), mkU32((UInt)(Int)(Short)i2)); -+ -+ return "mvhi"; -+} -+ -+static HChar * -+s390_irgen_MVGHI(UShort i2, IRTemp op1addr) -+{ -+ store(mkexpr(op1addr), mkU64((ULong)(Long)(Short)i2)); -+ -+ return "mvghi"; -+} -+ -+static HChar * -+s390_irgen_MVI(UChar i2, IRTemp op1addr) -+{ -+ store(mkexpr(op1addr), mkU8(i2)); -+ -+ return "mvi"; -+} -+ -+static HChar * -+s390_irgen_MVIY(UChar i2, IRTemp op1addr) -+{ -+ store(mkexpr(op1addr), mkU8(i2)); -+ -+ return "mviy"; -+} -+ -+static HChar * -+s390_irgen_MR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_w1(r1 + 1)); -+ assign(op2, get_gpr_w1(r2)); -+ assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2))); -+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); -+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); -+ -+ return "mr"; -+} -+ -+static HChar * -+s390_irgen_M(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_w1(r1 + 1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2))); -+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); -+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); -+ -+ return "m"; -+} -+ -+static HChar * -+s390_irgen_MFY(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_w1(r1 + 1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2))); -+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); -+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); -+ -+ return "mfy"; -+} -+ -+static HChar * -+s390_irgen_MH(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I16); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, load(Ity_I16, mkexpr(op2addr))); -+ assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2)) -+ )); -+ put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result))); -+ -+ return "mh"; -+} -+ -+static HChar * -+s390_irgen_MHY(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I16); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, load(Ity_I16, mkexpr(op2addr))); -+ assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2)) -+ )); -+ put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result))); -+ -+ return "mhy"; -+} -+ -+static HChar * -+s390_irgen_MHI(UChar r1, UShort i2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ Short op2; -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_w1(r1)); -+ op2 = (Short)i2; -+ assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, -+ mkU16((UShort)op2)))); -+ put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result))); -+ -+ return "mhi"; -+} -+ -+static HChar * -+s390_irgen_MGHI(UChar r1, UShort i2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ Short op2; -+ IRTemp result = newTemp(Ity_I128); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ op2 = (Short)i2; -+ assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_16Sto64, -+ mkU16((UShort)op2)))); -+ put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result))); -+ -+ return "mghi"; -+} -+ -+static HChar * -+s390_irgen_MLR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_w1(r1 + 1)); -+ assign(op2, get_gpr_w1(r2)); -+ assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2))); -+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); -+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); -+ -+ return "mlr"; -+} -+ -+static HChar * -+s390_irgen_MLGR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I128); -+ -+ assign(op1, get_gpr_dw0(r1 + 1)); -+ assign(op2, get_gpr_dw0(r2)); -+ assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2))); -+ put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); -+ put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); -+ -+ return "mlgr"; -+} -+ -+static HChar * -+s390_irgen_ML(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_w1(r1 + 1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2))); -+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); -+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); -+ -+ return "ml"; -+} -+ -+static HChar * -+s390_irgen_MLG(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I128); -+ -+ assign(op1, get_gpr_dw0(r1 + 1)); -+ assign(op2, load(Ity_I64, mkexpr(op2addr))); -+ assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2))); -+ put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); -+ put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); -+ -+ return "mlg"; -+} -+ -+static HChar * -+s390_irgen_MSR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, get_gpr_w1(r2)); -+ assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2))); -+ put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result))); -+ -+ return "msr"; -+} -+ -+static HChar * -+s390_irgen_MSGR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I128); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, get_gpr_dw0(r2)); -+ assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2))); -+ put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result))); -+ -+ return "msgr"; -+} -+ -+static HChar * -+s390_irgen_MSGFR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I128); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, get_gpr_w1(r2)); -+ assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2)) -+ )); -+ put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result))); -+ -+ return "msgfr"; -+} -+ -+static HChar * -+s390_irgen_MS(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2))); -+ put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result))); -+ -+ return "ms"; -+} -+ -+static HChar * -+s390_irgen_MSY(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2))); -+ put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result))); -+ -+ return "msy"; -+} -+ -+static HChar * -+s390_irgen_MSG(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I128); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, load(Ity_I64, mkexpr(op2addr))); -+ assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2))); -+ put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result))); -+ -+ return "msg"; -+} -+ -+static HChar * -+s390_irgen_MSGF(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I128); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2)) -+ )); -+ put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result))); -+ -+ return "msgf"; -+} -+ -+static HChar * -+s390_irgen_MSFI(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ Int op2; -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_w1(r1)); -+ op2 = (Int)i2; -+ assign(result, binop(Iop_MullS32, mkexpr(op1), mkU32((UInt)op2))); -+ put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result))); -+ -+ return "msfi"; -+} -+ -+static HChar * -+s390_irgen_MSGFI(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ Int op2; -+ IRTemp result = newTemp(Ity_I128); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ op2 = (Int)i2; -+ assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkU32((UInt) -+ op2)))); -+ put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result))); -+ -+ return "msgfi"; -+} -+ -+static HChar * -+s390_irgen_OR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, get_gpr_w1(r2)); -+ assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "or"; -+} -+ -+static HChar * -+s390_irgen_OGR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, get_gpr_dw0(r2)); -+ assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "ogr"; -+} -+ -+static HChar * -+s390_irgen_ORK(UChar r3, UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp op3 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op2, get_gpr_w1(r2)); -+ assign(op3, get_gpr_w1(r3)); -+ assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "ork"; -+} -+ -+static HChar * -+s390_irgen_OGRK(UChar r3, UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp op3 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op2, get_gpr_dw0(r2)); -+ assign(op3, get_gpr_dw0(r3)); -+ assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "ogrk"; -+} -+ -+static HChar * -+s390_irgen_O(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "o"; -+} -+ -+static HChar * -+s390_irgen_OY(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "oy"; -+} -+ -+static HChar * -+s390_irgen_OG(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, load(Ity_I64, mkexpr(op2addr))); -+ assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "og"; -+} -+ -+static HChar * -+s390_irgen_OI(UChar i2, IRTemp op1addr) -+{ -+ IRTemp op1 = newTemp(Ity_I8); -+ UChar op2; -+ IRTemp result = newTemp(Ity_I8); -+ -+ assign(op1, load(Ity_I8, mkexpr(op1addr))); -+ op2 = i2; -+ assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ store(mkexpr(op1addr), mkexpr(result)); -+ -+ return "oi"; -+} -+ -+static HChar * -+s390_irgen_OIY(UChar i2, IRTemp op1addr) -+{ -+ IRTemp op1 = newTemp(Ity_I8); -+ UChar op2; -+ IRTemp result = newTemp(Ity_I8); -+ -+ assign(op1, load(Ity_I8, mkexpr(op1addr))); -+ op2 = i2; -+ assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ store(mkexpr(op1addr), mkexpr(result)); -+ -+ return "oiy"; -+} -+ -+static HChar * -+s390_irgen_OIHF(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ UInt op2; -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w0(r1)); -+ op2 = i2; -+ assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_w0(r1, mkexpr(result)); -+ -+ return "oihf"; -+} -+ -+static HChar * -+s390_irgen_OIHH(UChar r1, UShort i2) -+{ -+ IRTemp op1 = newTemp(Ity_I16); -+ UShort op2; -+ IRTemp result = newTemp(Ity_I16); -+ -+ assign(op1, get_gpr_hw0(r1)); -+ op2 = i2; -+ assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_hw0(r1, mkexpr(result)); -+ -+ return "oihh"; -+} -+ -+static HChar * -+s390_irgen_OIHL(UChar r1, UShort i2) -+{ -+ IRTemp op1 = newTemp(Ity_I16); -+ UShort op2; -+ IRTemp result = newTemp(Ity_I16); -+ -+ assign(op1, get_gpr_hw1(r1)); -+ op2 = i2; -+ assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_hw1(r1, mkexpr(result)); -+ -+ return "oihl"; -+} -+ -+static HChar * -+s390_irgen_OILF(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ UInt op2; -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ op2 = i2; -+ assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "oilf"; -+} -+ -+static HChar * -+s390_irgen_OILH(UChar r1, UShort i2) -+{ -+ IRTemp op1 = newTemp(Ity_I16); -+ UShort op2; -+ IRTemp result = newTemp(Ity_I16); -+ -+ assign(op1, get_gpr_hw2(r1)); -+ op2 = i2; -+ assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_hw2(r1, mkexpr(result)); -+ -+ return "oilh"; -+} -+ -+static HChar * -+s390_irgen_OILL(UChar r1, UShort i2) -+{ -+ IRTemp op1 = newTemp(Ity_I16); -+ UShort op2; -+ IRTemp result = newTemp(Ity_I16); -+ -+ assign(op1, get_gpr_hw3(r1)); -+ op2 = i2; -+ assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2))); -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ put_gpr_hw3(r1, mkexpr(result)); -+ -+ return "oill"; -+} -+ -+static HChar * -+s390_irgen_PFD(void) -+{ -+ -+ return "pfd"; -+} -+ -+static HChar * -+s390_irgen_PFDRL(void) -+{ -+ -+ return "pfdrl"; -+} -+ -+static HChar * -+s390_irgen_RLL(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ IRTemp amount = newTemp(Ity_I64); -+ IRTemp op = newTemp(Ity_I32); -+ -+ assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(31))); -+ assign(op, get_gpr_w1(r3)); -+ put_gpr_w1(r1, binop(Iop_Or32, binop(Iop_Shl32, mkexpr(op), unop(Iop_64to8, -+ mkexpr(amount))), binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, -+ binop(Iop_Sub64, mkU64(32), mkexpr(amount)))))); -+ -+ return "rll"; -+} -+ -+static HChar * -+s390_irgen_RLLG(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ IRTemp amount = newTemp(Ity_I64); -+ IRTemp op = newTemp(Ity_I64); -+ -+ assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63))); -+ assign(op, get_gpr_dw0(r3)); -+ put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(op), unop(Iop_64to8, -+ mkexpr(amount))), binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8, -+ binop(Iop_Sub64, mkU64(64), mkexpr(amount)))))); -+ -+ return "rllg"; -+} -+ -+static HChar * -+s390_irgen_RNSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5) -+{ -+ UChar from; -+ UChar to; -+ UChar rot; -+ UChar t_bit; -+ ULong mask; -+ ULong maskc; -+ IRTemp result = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ from = i3 & 63; -+ to = i4 & 63; -+ rot = i5 & 63; -+ t_bit = i3 & 128; -+ assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64, -+ get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2), -+ mkU8(64 - rot)))); -+ if (from <= to) { -+ mask = ~0ULL; -+ mask = (mask >> from) & (mask << (63 - to)); -+ maskc = ~mask; -+ } else { -+ maskc = ~0ULL; -+ maskc = (maskc >> (to + 1)) & (maskc << (64 - from)); -+ mask = ~maskc; -+ } -+ assign(result, binop(Iop_And64, binop(Iop_And64, get_gpr_dw0(r1), mkexpr(op2) -+ ), mkU64(mask))); -+ if (t_bit == 0) { -+ put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1), -+ mkU64(maskc)), mkexpr(result))); -+ } -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ -+ return "rnsbg"; -+} -+ -+static HChar * -+s390_irgen_RXSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5) -+{ -+ UChar from; -+ UChar to; -+ UChar rot; -+ UChar t_bit; -+ ULong mask; -+ ULong maskc; -+ IRTemp result = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ from = i3 & 63; -+ to = i4 & 63; -+ rot = i5 & 63; -+ t_bit = i3 & 128; -+ assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64, -+ get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2), -+ mkU8(64 - rot)))); -+ if (from <= to) { -+ mask = ~0ULL; -+ mask = (mask >> from) & (mask << (63 - to)); -+ maskc = ~mask; -+ } else { -+ maskc = ~0ULL; -+ maskc = (maskc >> (to + 1)) & (maskc << (64 - from)); -+ mask = ~maskc; -+ } -+ assign(result, binop(Iop_And64, binop(Iop_Xor64, get_gpr_dw0(r1), mkexpr(op2) -+ ), mkU64(mask))); -+ if (t_bit == 0) { -+ put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1), -+ mkU64(maskc)), mkexpr(result))); -+ } -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ -+ return "rxsbg"; -+} -+ -+static HChar * -+s390_irgen_ROSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5) -+{ -+ UChar from; -+ UChar to; -+ UChar rot; -+ UChar t_bit; -+ ULong mask; -+ ULong maskc; -+ IRTemp result = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ from = i3 & 63; -+ to = i4 & 63; -+ rot = i5 & 63; -+ t_bit = i3 & 128; -+ assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64, -+ get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2), -+ mkU8(64 - rot)))); -+ if (from <= to) { -+ mask = ~0ULL; -+ mask = (mask >> from) & (mask << (63 - to)); -+ maskc = ~mask; -+ } else { -+ maskc = ~0ULL; -+ maskc = (maskc >> (to + 1)) & (maskc << (64 - from)); -+ mask = ~maskc; -+ } -+ assign(result, binop(Iop_And64, binop(Iop_Or64, get_gpr_dw0(r1), mkexpr(op2) -+ ), mkU64(mask))); -+ if (t_bit == 0) { -+ put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1), -+ mkU64(maskc)), mkexpr(result))); -+ } -+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result); -+ -+ return "rosbg"; -+} -+ -+static HChar * -+s390_irgen_RISBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5) -+{ -+ UChar from; -+ UChar to; -+ UChar rot; -+ UChar z_bit; -+ ULong mask; -+ ULong maskc; -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ from = i3 & 63; -+ to = i4 & 63; -+ rot = i5 & 63; -+ z_bit = i4 & 128; -+ assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64, -+ get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2), -+ mkU8(64 - rot)))); -+ if (from <= to) { -+ mask = ~0ULL; -+ mask = (mask >> from) & (mask << (63 - to)); -+ maskc = ~mask; -+ } else { -+ maskc = ~0ULL; -+ maskc = (maskc >> (to + 1)) & (maskc << (64 - from)); -+ mask = ~maskc; -+ } -+ if (z_bit == 0) { -+ put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1), -+ mkU64(maskc)), binop(Iop_And64, mkexpr(op2), mkU64(mask)))); -+ } else { -+ put_gpr_dw0(r1, binop(Iop_And64, mkexpr(op2), mkU64(mask))); -+ } -+ assign(result, get_gpr_dw0(r1)); -+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2); -+ -+ return "risbg"; -+} -+ -+static HChar * -+s390_irgen_SAR(UChar r1, UChar r2) -+{ -+ put_ar_w0(r1, get_gpr_w1(r2)); -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ s390_disasm(ENC3(MNM, AR, GPR), "sar", r1, r2); -+ -+ return "sar"; -+} -+ -+static HChar * -+s390_irgen_SLDA(UChar r1, IRTemp op2addr) -+{ -+ IRTemp p1 = newTemp(Ity_I64); -+ IRTemp p2 = newTemp(Ity_I64); -+ IRTemp op = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ Long sign_mask; -+ IRTemp shift_amount = newTemp(Ity_I64); -+ -+ assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1))); -+ assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1))); -+ assign(op, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1), mkU8(32)), mkexpr(p2) -+ )); -+ sign_mask = 1ULL << 63; -+ assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63))); -+ assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(op), -+ unop(Iop_64to8, mkexpr(shift_amount))), mkU64((ULong)(~sign_mask))), -+ binop(Iop_And64, mkexpr(op), mkU64((ULong)sign_mask)))); -+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); -+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); -+ s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount); -+ -+ return "slda"; -+} -+ -+static HChar * -+s390_irgen_SLDL(UChar r1, IRTemp op2addr) -+{ -+ IRTemp p1 = newTemp(Ity_I64); -+ IRTemp p2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1))); -+ assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1))); -+ assign(result, binop(Iop_Shl64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1), -+ mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64, -+ mkexpr(op2addr), mkU64(63))))); -+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); -+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); -+ -+ return "sldl"; -+} -+ -+static HChar * -+s390_irgen_SLA(UChar r1, IRTemp op2addr) -+{ -+ IRTemp uop = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ UInt sign_mask; -+ IRTemp shift_amount = newTemp(Ity_I64); -+ IRTemp op = newTemp(Ity_I32); -+ -+ assign(op, get_gpr_w1(r1)); -+ assign(uop, get_gpr_w1(r1)); -+ sign_mask = 2147483648U; -+ assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63))); -+ assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop), -+ unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)), -+ binop(Iop_And32, mkexpr(uop), mkU32(sign_mask)))); -+ put_gpr_w1(r1, mkexpr(result)); -+ s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount); -+ -+ return "sla"; -+} -+ -+static HChar * -+s390_irgen_SLAK(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ IRTemp uop = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ UInt sign_mask; -+ IRTemp shift_amount = newTemp(Ity_I64); -+ IRTemp op = newTemp(Ity_I32); -+ -+ assign(op, get_gpr_w1(r3)); -+ assign(uop, get_gpr_w1(r3)); -+ sign_mask = 2147483648U; -+ assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63))); -+ assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop), -+ unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)), -+ binop(Iop_And32, mkexpr(uop), mkU32(sign_mask)))); -+ put_gpr_w1(r1, mkexpr(result)); -+ s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount); -+ -+ return "slak"; -+} -+ -+static HChar * -+s390_irgen_SLAG(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ IRTemp uop = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ ULong sign_mask; -+ IRTemp shift_amount = newTemp(Ity_I64); -+ IRTemp op = newTemp(Ity_I64); -+ -+ assign(op, get_gpr_dw0(r3)); -+ assign(uop, get_gpr_dw0(r3)); -+ sign_mask = 9223372036854775808ULL; -+ assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63))); -+ assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(uop), -+ unop(Iop_64to8, mkexpr(shift_amount))), mkU64(~sign_mask)), -+ binop(Iop_And64, mkexpr(uop), mkU64(sign_mask)))); -+ put_gpr_dw0(r1, mkexpr(result)); -+ s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount); -+ -+ return "slag"; -+} -+ -+static HChar * -+s390_irgen_SLL(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r1), unop(Iop_64to8, -+ binop(Iop_And64, mkexpr(op2addr), mkU64(63))))); -+ -+ return "sll"; -+} -+ -+static HChar * -+s390_irgen_SLLK(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r3), unop(Iop_64to8, -+ binop(Iop_And64, mkexpr(op2addr), mkU64(63))))); -+ -+ return "sllk"; -+} -+ -+static HChar * -+s390_irgen_SLLG(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ put_gpr_dw0(r1, binop(Iop_Shl64, get_gpr_dw0(r3), unop(Iop_64to8, -+ binop(Iop_And64, mkexpr(op2addr), mkU64(63))))); -+ -+ return "sllg"; -+} -+ -+static HChar * -+s390_irgen_SRDA(UChar r1, IRTemp op2addr) -+{ -+ IRTemp p1 = newTemp(Ity_I64); -+ IRTemp p2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1))); -+ assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1))); -+ assign(result, binop(Iop_Sar64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1), -+ mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64, -+ mkexpr(op2addr), mkU64(63))))); -+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); -+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); -+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result); -+ -+ return "srda"; -+} -+ -+static HChar * -+s390_irgen_SRDL(UChar r1, IRTemp op2addr) -+{ -+ IRTemp p1 = newTemp(Ity_I64); -+ IRTemp p2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1))); -+ assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1))); -+ assign(result, binop(Iop_Shr64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1), -+ mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64, -+ mkexpr(op2addr), mkU64(63))))); -+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); -+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); -+ -+ return "srdl"; -+} -+ -+static HChar * -+s390_irgen_SRA(UChar r1, IRTemp op2addr) -+{ -+ IRTemp result = newTemp(Ity_I32); -+ IRTemp op = newTemp(Ity_I32); -+ -+ assign(op, get_gpr_w1(r1)); -+ assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64, -+ mkexpr(op2addr), mkU64(63))))); -+ put_gpr_w1(r1, mkexpr(result)); -+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result); -+ -+ return "sra"; -+} -+ -+static HChar * -+s390_irgen_SRAK(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ IRTemp result = newTemp(Ity_I32); -+ IRTemp op = newTemp(Ity_I32); -+ -+ assign(op, get_gpr_w1(r3)); -+ assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64, -+ mkexpr(op2addr), mkU64(63))))); -+ put_gpr_w1(r1, mkexpr(result)); -+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result); -+ -+ return "srak"; -+} -+ -+static HChar * -+s390_irgen_SRAG(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ IRTemp result = newTemp(Ity_I64); -+ IRTemp op = newTemp(Ity_I64); -+ -+ assign(op, get_gpr_dw0(r3)); -+ assign(result, binop(Iop_Sar64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64, -+ mkexpr(op2addr), mkU64(63))))); -+ put_gpr_dw0(r1, mkexpr(result)); -+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result); -+ -+ return "srag"; -+} -+ -+static HChar * -+s390_irgen_SRL(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op = newTemp(Ity_I32); -+ -+ assign(op, get_gpr_w1(r1)); -+ put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64, -+ mkexpr(op2addr), mkU64(63))))); -+ -+ return "srl"; -+} -+ -+static HChar * -+s390_irgen_SRLK(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ IRTemp op = newTemp(Ity_I32); -+ -+ assign(op, get_gpr_w1(r3)); -+ put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64, -+ mkexpr(op2addr), mkU64(63))))); -+ -+ return "srlk"; -+} -+ -+static HChar * -+s390_irgen_SRLG(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ IRTemp op = newTemp(Ity_I64); -+ -+ assign(op, get_gpr_dw0(r3)); -+ put_gpr_dw0(r1, binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64, -+ mkexpr(op2addr), mkU64(63))))); -+ -+ return "srlg"; -+} -+ -+static HChar * -+s390_irgen_ST(UChar r1, IRTemp op2addr) -+{ -+ store(mkexpr(op2addr), get_gpr_w1(r1)); -+ -+ return "st"; -+} -+ -+static HChar * -+s390_irgen_STY(UChar r1, IRTemp op2addr) -+{ -+ store(mkexpr(op2addr), get_gpr_w1(r1)); -+ -+ return "sty"; -+} -+ -+static HChar * -+s390_irgen_STG(UChar r1, IRTemp op2addr) -+{ -+ store(mkexpr(op2addr), get_gpr_dw0(r1)); -+ -+ return "stg"; -+} -+ -+static HChar * -+s390_irgen_STRL(UChar r1, UInt i2) -+{ -+ store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)), -+ get_gpr_w1(r1)); -+ -+ return "strl"; -+} -+ -+static HChar * -+s390_irgen_STGRL(UChar r1, UInt i2) -+{ -+ store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)), -+ get_gpr_dw0(r1)); -+ -+ return "stgrl"; -+} -+ -+static HChar * -+s390_irgen_STC(UChar r1, IRTemp op2addr) -+{ -+ store(mkexpr(op2addr), get_gpr_b7(r1)); -+ -+ return "stc"; -+} -+ -+static HChar * -+s390_irgen_STCY(UChar r1, IRTemp op2addr) -+{ -+ store(mkexpr(op2addr), get_gpr_b7(r1)); -+ -+ return "stcy"; -+} -+ -+static HChar * -+s390_irgen_STCH(UChar r1, IRTemp op2addr) -+{ -+ store(mkexpr(op2addr), get_gpr_b3(r1)); -+ -+ return "stch"; -+} -+ -+static HChar * -+s390_irgen_STCM(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ UChar mask; -+ UChar n; -+ -+ mask = (UChar)r3; -+ n = 0; -+ if ((mask & 8) != 0) { -+ store(mkexpr(op2addr), get_gpr_b4(r1)); -+ n = n + 1; -+ } -+ if ((mask & 4) != 0) { -+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1)); -+ n = n + 1; -+ } -+ if ((mask & 2) != 0) { -+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1)); -+ n = n + 1; -+ } -+ if ((mask & 1) != 0) { -+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1)); -+ } -+ -+ return "stcm"; -+} -+ -+static HChar * -+s390_irgen_STCMY(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ UChar mask; -+ UChar n; -+ -+ mask = (UChar)r3; -+ n = 0; -+ if ((mask & 8) != 0) { -+ store(mkexpr(op2addr), get_gpr_b4(r1)); -+ n = n + 1; -+ } -+ if ((mask & 4) != 0) { -+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1)); -+ n = n + 1; -+ } -+ if ((mask & 2) != 0) { -+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1)); -+ n = n + 1; -+ } -+ if ((mask & 1) != 0) { -+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1)); -+ } -+ -+ return "stcmy"; -+} -+ -+static HChar * -+s390_irgen_STCMH(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ UChar mask; -+ UChar n; -+ -+ mask = (UChar)r3; -+ n = 0; -+ if ((mask & 8) != 0) { -+ store(mkexpr(op2addr), get_gpr_b0(r1)); -+ n = n + 1; -+ } -+ if ((mask & 4) != 0) { -+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b1(r1)); -+ n = n + 1; -+ } -+ if ((mask & 2) != 0) { -+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b2(r1)); -+ n = n + 1; -+ } -+ if ((mask & 1) != 0) { -+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b3(r1)); -+ } -+ -+ return "stcmh"; -+} -+ -+static HChar * -+s390_irgen_STH(UChar r1, IRTemp op2addr) -+{ -+ store(mkexpr(op2addr), get_gpr_hw3(r1)); -+ -+ return "sth"; -+} -+ -+static HChar * -+s390_irgen_STHY(UChar r1, IRTemp op2addr) -+{ -+ store(mkexpr(op2addr), get_gpr_hw3(r1)); -+ -+ return "sthy"; -+} -+ -+static HChar * -+s390_irgen_STHRL(UChar r1, UInt i2) -+{ -+ store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)), -+ get_gpr_hw3(r1)); -+ -+ return "sthrl"; -+} -+ -+static HChar * -+s390_irgen_STHH(UChar r1, IRTemp op2addr) -+{ -+ store(mkexpr(op2addr), get_gpr_hw1(r1)); -+ -+ return "sthh"; -+} -+ -+static HChar * -+s390_irgen_STFH(UChar r1, IRTemp op2addr) -+{ -+ store(mkexpr(op2addr), get_gpr_w0(r1)); -+ -+ return "stfh"; -+} -+ -+static HChar * -+s390_irgen_STPQ(UChar r1, IRTemp op2addr) -+{ -+ store(mkexpr(op2addr), get_gpr_dw0(r1)); -+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(8)), get_gpr_dw0(r1 + 1)); -+ -+ return "stpq"; -+} -+ -+static HChar * -+s390_irgen_STRVH(UChar r1, IRTemp op2addr) -+{ -+ store(mkexpr(op2addr), get_gpr_b7(r1)); -+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1)); -+ -+ return "strvh"; -+} -+ -+static HChar * -+s390_irgen_STRV(UChar r1, IRTemp op2addr) -+{ -+ store(mkexpr(op2addr), get_gpr_b7(r1)); -+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1)); -+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1)); -+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1)); -+ -+ return "strv"; -+} -+ -+static HChar * -+s390_irgen_STRVG(UChar r1, IRTemp op2addr) -+{ -+ store(mkexpr(op2addr), get_gpr_b7(r1)); -+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1)); -+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1)); -+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1)); -+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(4)), get_gpr_b3(r1)); -+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(5)), get_gpr_b2(r1)); -+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(6)), get_gpr_b1(r1)); -+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(7)), get_gpr_b0(r1)); -+ -+ return "strvg"; -+} -+ -+static HChar * -+s390_irgen_SR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, get_gpr_w1(r2)); -+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "sr"; -+} -+ -+static HChar * -+s390_irgen_SGR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, get_gpr_dw0(r2)); -+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "sgr"; -+} -+ -+static HChar * -+s390_irgen_SGFR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2))); -+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "sgfr"; -+} -+ -+static HChar * -+s390_irgen_SRK(UChar r3, UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp op3 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op2, get_gpr_w1(r2)); -+ assign(op3, get_gpr_w1(r3)); -+ assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "srk"; -+} -+ -+static HChar * -+s390_irgen_SGRK(UChar r3, UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp op3 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op2, get_gpr_dw0(r2)); -+ assign(op3, get_gpr_dw0(r3)); -+ assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op2, op3); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "sgrk"; -+} -+ -+static HChar * -+s390_irgen_S(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "s"; -+} -+ -+static HChar * -+s390_irgen_SY(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "sy"; -+} -+ -+static HChar * -+s390_irgen_SG(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, load(Ity_I64, mkexpr(op2addr))); -+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "sg"; -+} -+ -+static HChar * -+s390_irgen_SGF(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr)))); -+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "sgf"; -+} -+ -+static HChar * -+s390_irgen_SH(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr)))); -+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "sh"; -+} -+ -+static HChar * -+s390_irgen_SHY(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr)))); -+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "shy"; -+} -+ -+static HChar * -+s390_irgen_SHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp op3 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op2, get_gpr_w0(r1)); -+ assign(op3, get_gpr_w0(r2)); -+ assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3); -+ put_gpr_w0(r1, mkexpr(result)); -+ -+ return "shhhr"; -+} -+ -+static HChar * -+s390_irgen_SHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp op3 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op2, get_gpr_w0(r1)); -+ assign(op3, get_gpr_w1(r2)); -+ assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3); -+ put_gpr_w0(r1, mkexpr(result)); -+ -+ return "shhlr"; -+} -+ -+static HChar * -+s390_irgen_SLR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, get_gpr_w1(r2)); -+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "slr"; -+} -+ -+static HChar * -+s390_irgen_SLGR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, get_gpr_dw0(r2)); -+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "slgr"; -+} -+ -+static HChar * -+s390_irgen_SLGFR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2))); -+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "slgfr"; -+} -+ -+static HChar * -+s390_irgen_SLRK(UChar r3, UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp op3 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op2, get_gpr_w1(r2)); -+ assign(op3, get_gpr_w1(r3)); -+ assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "slrk"; -+} -+ -+static HChar * -+s390_irgen_SLGRK(UChar r3, UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp op3 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op2, get_gpr_dw0(r2)); -+ assign(op3, get_gpr_dw0(r3)); -+ assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op2, op3); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "slgrk"; -+} -+ -+static HChar * -+s390_irgen_SL(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "sl"; -+} -+ -+static HChar * -+s390_irgen_SLY(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "sly"; -+} -+ -+static HChar * -+s390_irgen_SLG(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, load(Ity_I64, mkexpr(op2addr))); -+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "slg"; -+} -+ -+static HChar * -+s390_irgen_SLGF(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr)))); -+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "slgf"; -+} -+ -+static HChar * -+s390_irgen_SLFI(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ UInt op2; -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ op2 = i2; -+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkU32(op2))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, mktemp(Ity_I32, -+ mkU32(op2))); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "slfi"; -+} -+ -+static HChar * -+s390_irgen_SLGFI(UChar r1, UInt i2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ ULong op2; -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ op2 = (ULong)i2; -+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkU64(op2))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, mktemp(Ity_I64, -+ mkU64(op2))); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "slgfi"; -+} -+ -+static HChar * -+s390_irgen_SLHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp op3 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op2, get_gpr_w0(r1)); -+ assign(op3, get_gpr_w0(r2)); -+ assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3); -+ put_gpr_w0(r1, mkexpr(result)); -+ -+ return "slhhhr"; -+} -+ -+static HChar * -+s390_irgen_SLHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp op3 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op2, get_gpr_w0(r1)); -+ assign(op3, get_gpr_w1(r2)); -+ assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3))); -+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3); -+ put_gpr_w0(r1, mkexpr(result)); -+ -+ return "slhhlr"; -+} -+ -+static HChar * -+s390_irgen_SLBR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ IRTemp borrow_in = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, get_gpr_w1(r2)); -+ assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32, -+ s390_call_calculate_cc(), mkU8(1)))); -+ assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)), -+ mkexpr(borrow_in))); -+ s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "slbr"; -+} -+ -+static HChar * -+s390_irgen_SLBGR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ IRTemp borrow_in = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, get_gpr_dw0(r2)); -+ assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1), -+ binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1))))); -+ assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)), -+ mkexpr(borrow_in))); -+ s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "slbgr"; -+} -+ -+static HChar * -+s390_irgen_SLB(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp op2 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ IRTemp borrow_in = newTemp(Ity_I32); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32, -+ s390_call_calculate_cc(), mkU8(1)))); -+ assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)), -+ mkexpr(borrow_in))); -+ s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in); -+ put_gpr_w1(r1, mkexpr(result)); -+ -+ return "slb"; -+} -+ -+static HChar * -+s390_irgen_SLBG(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp op2 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ IRTemp borrow_in = newTemp(Ity_I64); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op2, load(Ity_I64, mkexpr(op2addr))); -+ assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1), -+ binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1))))); -+ assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)), -+ mkexpr(borrow_in))); -+ s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in); -+ put_gpr_dw0(r1, mkexpr(result)); -+ -+ return "slbg"; -+} -+ -+static HChar * -+s390_irgen_SVC(UChar i) -+{ -+ IRTemp sysno = newTemp(Ity_I64); -+ -+ if (i != 0) { -+ assign(sysno, mkU64(i)); -+ } else { -+ assign(sysno, unop(Iop_32Uto64, get_gpr_w1(1))); -+ } -+ system_call(mkexpr(sysno)); -+ -+ return "svc"; -+} -+ -+static HChar * -+s390_irgen_TS(IRTemp op2addr) -+{ -+ IRTemp value = newTemp(Ity_I8); -+ -+ assign(value, load(Ity_I8, mkexpr(op2addr))); -+ s390_cc_thunk_putZ(S390_CC_OP_TEST_AND_SET, value); -+ store(mkexpr(op2addr), mkU8(255)); -+ -+ return "ts"; -+} -+ -+static HChar * -+s390_irgen_TM(UChar i2, IRTemp op1addr) -+{ -+ UChar mask; -+ IRTemp value = newTemp(Ity_I8); -+ -+ mask = i2; -+ assign(value, load(Ity_I8, mkexpr(op1addr))); -+ s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8, -+ mkU8(mask))); -+ -+ return "tm"; -+} -+ -+static HChar * -+s390_irgen_TMY(UChar i2, IRTemp op1addr) -+{ -+ UChar mask; -+ IRTemp value = newTemp(Ity_I8); -+ -+ mask = i2; -+ assign(value, load(Ity_I8, mkexpr(op1addr))); -+ s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8, -+ mkU8(mask))); -+ -+ return "tmy"; -+} -+ -+static HChar * -+s390_irgen_TMHH(UChar r1, UShort i2) -+{ -+ UShort mask; -+ IRTemp value = newTemp(Ity_I16); -+ -+ mask = i2; -+ assign(value, get_gpr_hw0(r1)); -+ s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16, -+ mkU16(mask))); -+ -+ return "tmhh"; -+} -+ -+static HChar * -+s390_irgen_TMHL(UChar r1, UShort i2) -+{ -+ UShort mask; -+ IRTemp value = newTemp(Ity_I16); -+ -+ mask = i2; -+ assign(value, get_gpr_hw1(r1)); -+ s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16, -+ mkU16(mask))); -+ -+ return "tmhl"; -+} -+ -+static HChar * -+s390_irgen_TMLH(UChar r1, UShort i2) -+{ -+ UShort mask; -+ IRTemp value = newTemp(Ity_I16); -+ -+ mask = i2; -+ assign(value, get_gpr_hw2(r1)); -+ s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16, -+ mkU16(mask))); -+ -+ return "tmlh"; -+} -+ -+static HChar * -+s390_irgen_TMLL(UChar r1, UShort i2) -+{ -+ UShort mask; -+ IRTemp value = newTemp(Ity_I16); -+ -+ mask = i2; -+ assign(value, get_gpr_hw3(r1)); -+ s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16, -+ mkU16(mask))); -+ -+ return "tmll"; -+} -+ -+static HChar * -+s390_irgen_EFPC(UChar r1) -+{ -+ put_gpr_w1(r1, get_fpc_w0()); -+ -+ return "efpc"; -+} -+ -+static HChar * -+s390_irgen_LER(UChar r1, UChar r2) -+{ -+ put_fpr_w0(r1, get_fpr_w0(r2)); -+ -+ return "ler"; -+} -+ -+static HChar * -+s390_irgen_LDR(UChar r1, UChar r2) -+{ -+ put_fpr_dw0(r1, get_fpr_dw0(r2)); -+ -+ return "ldr"; -+} -+ -+static HChar * -+s390_irgen_LXR(UChar r1, UChar r2) -+{ -+ put_fpr_dw0(r1, get_fpr_dw0(r2)); -+ put_fpr_dw0(r1 + 2, get_fpr_dw0(r2 + 2)); -+ -+ return "lxr"; -+} -+ -+static HChar * -+s390_irgen_LE(UChar r1, IRTemp op2addr) -+{ -+ put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr))); -+ -+ return "le"; -+} -+ -+static HChar * -+s390_irgen_LD(UChar r1, IRTemp op2addr) -+{ -+ put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr))); -+ -+ return "ld"; -+} -+ -+static HChar * -+s390_irgen_LEY(UChar r1, IRTemp op2addr) -+{ -+ put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr))); -+ -+ return "ley"; -+} -+ -+static HChar * -+s390_irgen_LDY(UChar r1, IRTemp op2addr) -+{ -+ put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr))); -+ -+ return "ldy"; -+} -+ -+static HChar * -+s390_irgen_LFPC(IRTemp op2addr) -+{ -+ put_fpc_w0(load(Ity_I32, mkexpr(op2addr))); -+ -+ return "lfpc"; -+} -+ -+static HChar * -+s390_irgen_LZER(UChar r1) -+{ -+ put_fpr_w0(r1, mkF32i(0x0)); -+ -+ return "lzer"; -+} -+ -+static HChar * -+s390_irgen_LZDR(UChar r1) -+{ -+ put_fpr_dw0(r1, mkF64i(0x0)); -+ -+ return "lzdr"; -+} -+ -+static HChar * -+s390_irgen_LZXR(UChar r1) -+{ -+ put_fpr_dw0(r1, mkF64i(0x0)); -+ put_fpr_dw0(r1 + 2, mkF64i(0x0)); -+ -+ return "lzxr"; -+} -+ -+static HChar * -+s390_irgen_SRNM(IRTemp op2addr) -+{ -+ UInt mask; -+ -+ mask = 3; -+ put_fpc_w0(binop(Iop_Or32, binop(Iop_And32, get_fpc_w0(), mkU32(~mask)), -+ binop(Iop_And32, unop(Iop_64to32, mkexpr(op2addr)), mkU32(mask))) -+ ); -+ -+ return "srnm"; -+} -+ -+static HChar * -+s390_irgen_SFPC(UChar r1) -+{ -+ put_fpc_w0(get_gpr_w1(r1)); -+ -+ return "sfpc"; -+} -+ -+static HChar * -+s390_irgen_STE(UChar r1, IRTemp op2addr) -+{ -+ store(mkexpr(op2addr), get_fpr_w0(r1)); -+ -+ return "ste"; -+} -+ -+static HChar * -+s390_irgen_STD(UChar r1, IRTemp op2addr) -+{ -+ store(mkexpr(op2addr), get_fpr_dw0(r1)); -+ -+ return "std"; -+} -+ -+static HChar * -+s390_irgen_STEY(UChar r1, IRTemp op2addr) -+{ -+ store(mkexpr(op2addr), get_fpr_w0(r1)); -+ -+ return "stey"; -+} -+ -+static HChar * -+s390_irgen_STDY(UChar r1, IRTemp op2addr) -+{ -+ store(mkexpr(op2addr), get_fpr_dw0(r1)); -+ -+ return "stdy"; -+} -+ -+static HChar * -+s390_irgen_STFPC(IRTemp op2addr) -+{ -+ store(mkexpr(op2addr), get_fpc_w0()); -+ -+ return "stfpc"; -+} -+ -+static HChar * -+s390_irgen_AEBR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_F32); -+ IRTemp op2 = newTemp(Ity_F32); -+ IRTemp result = newTemp(Ity_F32); -+ -+ assign(op1, get_fpr_w0(r1)); -+ assign(op2, get_fpr_w0(r2)); -+ assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1), -+ mkexpr(op2))); -+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result); -+ put_fpr_w0(r1, mkexpr(result)); -+ -+ return "aebr"; -+} -+ -+static HChar * -+s390_irgen_ADBR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_F64); -+ IRTemp op2 = newTemp(Ity_F64); -+ IRTemp result = newTemp(Ity_F64); -+ -+ assign(op1, get_fpr_dw0(r1)); -+ assign(op2, get_fpr_dw0(r2)); -+ assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1), -+ mkexpr(op2))); -+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result); -+ put_fpr_dw0(r1, mkexpr(result)); -+ -+ return "adbr"; -+} -+ -+static HChar * -+s390_irgen_AEB(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_F32); -+ IRTemp op2 = newTemp(Ity_F32); -+ IRTemp result = newTemp(Ity_F32); -+ -+ assign(op1, get_fpr_w0(r1)); -+ assign(op2, load(Ity_F32, mkexpr(op2addr))); -+ assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1), -+ mkexpr(op2))); -+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result); -+ put_fpr_w0(r1, mkexpr(result)); -+ -+ return "aeb"; -+} -+ -+static HChar * -+s390_irgen_ADB(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_F64); -+ IRTemp op2 = newTemp(Ity_F64); -+ IRTemp result = newTemp(Ity_F64); -+ -+ assign(op1, get_fpr_dw0(r1)); -+ assign(op2, load(Ity_F64, mkexpr(op2addr))); -+ assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1), -+ mkexpr(op2))); -+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result); -+ put_fpr_dw0(r1, mkexpr(result)); -+ -+ return "adb"; -+} -+ -+static HChar * -+s390_irgen_CEFBR(UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op2, get_gpr_w1(r2)); -+ put_fpr_w0(r1, binop(Iop_I32StoF32, mkU32(Irrm_NEAREST), mkexpr(op2))); -+ -+ return "cefbr"; -+} -+ -+static HChar * -+s390_irgen_CDFBR(UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op2, get_gpr_w1(r2)); -+ put_fpr_dw0(r1, unop(Iop_I32StoF64, mkexpr(op2))); -+ -+ return "cdfbr"; -+} -+ -+static HChar * -+s390_irgen_CEGBR(UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op2, get_gpr_dw0(r2)); -+ put_fpr_w0(r1, binop(Iop_I64StoF32, mkU32(Irrm_NEAREST), mkexpr(op2))); -+ -+ return "cegbr"; -+} -+ -+static HChar * -+s390_irgen_CDGBR(UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op2, get_gpr_dw0(r2)); -+ put_fpr_dw0(r1, binop(Iop_I64StoF64, mkU32(Irrm_NEAREST), mkexpr(op2))); -+ -+ return "cdgbr"; -+} -+ -+static HChar * -+s390_irgen_CFEBR(UChar r3, UChar r1, UChar r2) -+{ -+ IRTemp op = newTemp(Ity_F32); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op, get_fpr_w0(r2)); -+ assign(result, binop(Iop_F32toI32S, mkU32(encode_rounding_mode(r3)), -+ mkexpr(op))); -+ put_gpr_w1(r1, mkexpr(result)); -+ s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_32, op); -+ -+ return "cfebr"; -+} -+ -+static HChar * -+s390_irgen_CFDBR(UChar r3, UChar r1, UChar r2) -+{ -+ IRTemp op = newTemp(Ity_F64); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op, get_fpr_dw0(r2)); -+ assign(result, binop(Iop_F64toI32S, mkU32(encode_rounding_mode(r3)), -+ mkexpr(op))); -+ put_gpr_w1(r1, mkexpr(result)); -+ s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_32, op); -+ -+ return "cfdbr"; -+} -+ -+static HChar * -+s390_irgen_CGEBR(UChar r3, UChar r1, UChar r2) -+{ -+ IRTemp op = newTemp(Ity_F32); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op, get_fpr_w0(r2)); -+ assign(result, binop(Iop_F32toI64S, mkU32(encode_rounding_mode(r3)), -+ mkexpr(op))); -+ put_gpr_dw0(r1, mkexpr(result)); -+ s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_64, op); -+ -+ return "cgebr"; -+} -+ -+static HChar * -+s390_irgen_CGDBR(UChar r3, UChar r1, UChar r2) -+{ -+ IRTemp op = newTemp(Ity_F64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op, get_fpr_dw0(r2)); -+ assign(result, binop(Iop_F64toI64S, mkU32(encode_rounding_mode(r3)), -+ mkexpr(op))); -+ put_gpr_dw0(r1, mkexpr(result)); -+ s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_64, op); -+ -+ return "cgdbr"; -+} -+ -+static HChar * -+s390_irgen_DEBR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_F32); -+ IRTemp op2 = newTemp(Ity_F32); -+ IRTemp result = newTemp(Ity_F32); -+ -+ assign(op1, get_fpr_w0(r1)); -+ assign(op2, get_fpr_w0(r2)); -+ assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1), -+ mkexpr(op2))); -+ put_fpr_w0(r1, mkexpr(result)); -+ -+ return "debr"; -+} -+ -+static HChar * -+s390_irgen_DDBR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_F64); -+ IRTemp op2 = newTemp(Ity_F64); -+ IRTemp result = newTemp(Ity_F64); -+ -+ assign(op1, get_fpr_dw0(r1)); -+ assign(op2, get_fpr_dw0(r2)); -+ assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1), -+ mkexpr(op2))); -+ put_fpr_dw0(r1, mkexpr(result)); -+ -+ return "ddbr"; -+} -+ -+static HChar * -+s390_irgen_DEB(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_F32); -+ IRTemp op2 = newTemp(Ity_F32); -+ IRTemp result = newTemp(Ity_F32); -+ -+ assign(op1, get_fpr_w0(r1)); -+ assign(op2, load(Ity_F32, mkexpr(op2addr))); -+ assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1), -+ mkexpr(op2))); -+ put_fpr_w0(r1, mkexpr(result)); -+ -+ return "deb"; -+} -+ -+static HChar * -+s390_irgen_DDB(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_F64); -+ IRTemp op2 = newTemp(Ity_F64); -+ IRTemp result = newTemp(Ity_F64); -+ -+ assign(op1, get_fpr_dw0(r1)); -+ assign(op2, load(Ity_F64, mkexpr(op2addr))); -+ assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1), -+ mkexpr(op2))); -+ put_fpr_dw0(r1, mkexpr(result)); -+ -+ return "ddb"; -+} -+ -+static HChar * -+s390_irgen_LTEBR(UChar r1, UChar r2) -+{ -+ IRTemp result = newTemp(Ity_F32); -+ -+ assign(result, get_fpr_w0(r2)); -+ put_fpr_w0(r1, mkexpr(result)); -+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result); -+ -+ return "ltebr"; -+} -+ -+static HChar * -+s390_irgen_LTDBR(UChar r1, UChar r2) -+{ -+ IRTemp result = newTemp(Ity_F64); -+ -+ assign(result, get_fpr_dw0(r2)); -+ put_fpr_dw0(r1, mkexpr(result)); -+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result); -+ -+ return "ltdbr"; -+} -+ -+static HChar * -+s390_irgen_LCEBR(UChar r1, UChar r2) -+{ -+ IRTemp result = newTemp(Ity_F32); -+ -+ assign(result, unop(Iop_NegF32, get_fpr_w0(r2))); -+ put_fpr_w0(r1, mkexpr(result)); -+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result); -+ -+ return "lcebr"; -+} -+ -+static HChar * -+s390_irgen_LCDBR(UChar r1, UChar r2) -+{ -+ IRTemp result = newTemp(Ity_F64); -+ -+ assign(result, unop(Iop_NegF64, get_fpr_dw0(r2))); -+ put_fpr_dw0(r1, mkexpr(result)); -+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result); -+ -+ return "lcdbr"; -+} -+ -+static HChar * -+s390_irgen_LDEBR(UChar r1, UChar r2) -+{ -+ IRTemp op = newTemp(Ity_F32); -+ -+ assign(op, get_fpr_w0(r2)); -+ put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op))); -+ -+ return "ldebr"; -+} -+ -+static HChar * -+s390_irgen_LDEB(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op = newTemp(Ity_F32); -+ -+ assign(op, load(Ity_F32, mkexpr(op2addr))); -+ put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op))); -+ -+ return "ldeb"; -+} -+ -+static HChar * -+s390_irgen_LEDBR(UChar r1, UChar r2) -+{ -+ IRTemp op = newTemp(Ity_F64); -+ -+ assign(op, get_fpr_dw0(r2)); -+ put_fpr_w0(r1, binop(Iop_F64toF32, mkU32(Irrm_NEAREST), mkexpr(op))); -+ -+ return "ledbr"; -+} -+ -+static HChar * -+s390_irgen_MEEBR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_F32); -+ IRTemp op2 = newTemp(Ity_F32); -+ IRTemp result = newTemp(Ity_F32); -+ -+ assign(op1, get_fpr_w0(r1)); -+ assign(op2, get_fpr_w0(r2)); -+ assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1), -+ mkexpr(op2))); -+ put_fpr_w0(r1, mkexpr(result)); -+ -+ return "meebr"; -+} -+ -+static HChar * -+s390_irgen_MDBR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_F64); -+ IRTemp op2 = newTemp(Ity_F64); -+ IRTemp result = newTemp(Ity_F64); -+ -+ assign(op1, get_fpr_dw0(r1)); -+ assign(op2, get_fpr_dw0(r2)); -+ assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1), -+ mkexpr(op2))); -+ put_fpr_dw0(r1, mkexpr(result)); -+ -+ return "mdbr"; -+} -+ -+static HChar * -+s390_irgen_MEEB(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_F32); -+ IRTemp op2 = newTemp(Ity_F32); -+ IRTemp result = newTemp(Ity_F32); -+ -+ assign(op1, get_fpr_w0(r1)); -+ assign(op2, load(Ity_F32, mkexpr(op2addr))); -+ assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1), -+ mkexpr(op2))); -+ put_fpr_w0(r1, mkexpr(result)); -+ -+ return "meeb"; -+} -+ -+static HChar * -+s390_irgen_MDB(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_F64); -+ IRTemp op2 = newTemp(Ity_F64); -+ IRTemp result = newTemp(Ity_F64); -+ -+ assign(op1, get_fpr_dw0(r1)); -+ assign(op2, load(Ity_F64, mkexpr(op2addr))); -+ assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1), -+ mkexpr(op2))); -+ put_fpr_dw0(r1, mkexpr(result)); -+ -+ return "mdb"; -+} -+ -+static HChar * -+s390_irgen_SEBR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_F32); -+ IRTemp op2 = newTemp(Ity_F32); -+ IRTemp result = newTemp(Ity_F32); -+ -+ assign(op1, get_fpr_w0(r1)); -+ assign(op2, get_fpr_w0(r2)); -+ assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1), -+ mkexpr(op2))); -+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result); -+ put_fpr_w0(r1, mkexpr(result)); -+ -+ return "sebr"; -+} -+ -+static HChar * -+s390_irgen_SDBR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_F64); -+ IRTemp op2 = newTemp(Ity_F64); -+ IRTemp result = newTemp(Ity_F64); -+ -+ assign(op1, get_fpr_dw0(r1)); -+ assign(op2, get_fpr_dw0(r2)); -+ assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1), -+ mkexpr(op2))); -+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result); -+ put_fpr_dw0(r1, mkexpr(result)); -+ -+ return "sdbr"; -+} -+ -+static HChar * -+s390_irgen_SEB(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_F32); -+ IRTemp op2 = newTemp(Ity_F32); -+ IRTemp result = newTemp(Ity_F32); -+ -+ assign(op1, get_fpr_w0(r1)); -+ assign(op2, load(Ity_F32, mkexpr(op2addr))); -+ assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1), -+ mkexpr(op2))); -+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result); -+ put_fpr_w0(r1, mkexpr(result)); -+ -+ return "seb"; -+} -+ -+static HChar * -+s390_irgen_SDB(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_F64); -+ IRTemp op2 = newTemp(Ity_F64); -+ IRTemp result = newTemp(Ity_F64); -+ -+ assign(op1, get_fpr_dw0(r1)); -+ assign(op2, load(Ity_F64, mkexpr(op2addr))); -+ assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1), -+ mkexpr(op2))); -+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result); -+ put_fpr_dw0(r1, mkexpr(result)); -+ -+ return "sdb"; -+} -+ -+ -+static HChar * -+s390_irgen_CLC(UChar length, IRTemp start1, IRTemp start2) -+{ -+ IRTemp current1 = newTemp(Ity_I8); -+ IRTemp current2 = newTemp(Ity_I8); -+ IRTemp counter = newTemp(Ity_I64); -+ -+ assign(counter, get_counter_dw0()); -+ put_counter_dw0(mkU64(0)); -+ -+ assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1), -+ mkexpr(counter)))); -+ assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2), -+ mkexpr(counter)))); -+ s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2, -+ False); -+ -+ /* Both fields differ ? */ -+ if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)), -+ guest_IA_next_instr); -+ -+ /* Check for end of field */ -+ put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1))); -+ if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)), -+ guest_IA_curr_instr); -+ put_counter_dw0(mkU64(0)); -+ -+ return "clc"; -+} -+ -+static HChar * -+s390_irgen_CLCLE(UChar r1, UChar r3, IRTemp pad2) -+{ -+ IRTemp addr1, addr3, addr1_load, addr3_load, len1, len3, single1, single3; -+ -+ addr1 = newTemp(Ity_I64); -+ addr3 = newTemp(Ity_I64); -+ addr1_load = newTemp(Ity_I64); -+ addr3_load = newTemp(Ity_I64); -+ len1 = newTemp(Ity_I64); -+ len3 = newTemp(Ity_I64); -+ single1 = newTemp(Ity_I8); -+ single3 = newTemp(Ity_I8); -+ -+ assign(addr1, get_gpr_dw0(r1)); -+ assign(len1, get_gpr_dw0(r1 + 1)); -+ assign(addr3, get_gpr_dw0(r3)); -+ assign(len3, get_gpr_dw0(r3 + 1)); -+ -+ /* len1 == 0 and len3 == 0? Exit */ -+ s390_cc_set(0); -+ if_condition_goto(binop(Iop_CmpEQ64,binop(Iop_Or64, mkexpr(len1), -+ mkexpr(len3)), mkU64(0)), -+ guest_IA_next_instr); -+ -+ /* A mux requires both ways to be possible. This is a way to prevent clcle -+ from reading from addr1 if it should read from the pad. Since the pad -+ has no address, just read from the instruction, we discard that anyway */ -+ assign(addr1_load, -+ IRExpr_Mux0X(unop(Iop_1Uto8, -+ binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))), -+ mkexpr(addr1), -+ mkU64(guest_IA_curr_instr))); -+ -+ /* same for addr3 */ -+ assign(addr3_load, -+ IRExpr_Mux0X(unop(Iop_1Uto8, -+ binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))), -+ mkexpr(addr3), -+ mkU64(guest_IA_curr_instr))); -+ -+ assign(single1, -+ IRExpr_Mux0X(unop(Iop_1Uto8, -+ binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))), -+ load(Ity_I8, mkexpr(addr1_load)), -+ unop(Iop_64to8, mkexpr(pad2)))); -+ -+ assign(single3, -+ IRExpr_Mux0X(unop(Iop_1Uto8, -+ binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))), -+ load(Ity_I8, mkexpr(addr3_load)), -+ unop(Iop_64to8, mkexpr(pad2)))); -+ -+ s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single3, False); -+ /* Both fields differ ? */ -+ if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single3)), -+ guest_IA_next_instr); -+ -+ /* If a length in 0 we must not change this length and the address */ -+ put_gpr_dw0(r1, -+ IRExpr_Mux0X(unop(Iop_1Uto8, -+ binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))), -+ binop(Iop_Add64, mkexpr(addr1), mkU64(1)), -+ mkexpr(addr1))); -+ -+ put_gpr_dw0(r1 + 1, -+ IRExpr_Mux0X(unop(Iop_1Uto8, -+ binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))), -+ binop(Iop_Sub64, mkexpr(len1), mkU64(1)), -+ mkU64(0))); -+ -+ put_gpr_dw0(r3, -+ IRExpr_Mux0X(unop(Iop_1Uto8, -+ binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))), -+ binop(Iop_Add64, mkexpr(addr3), mkU64(1)), -+ mkexpr(addr3))); -+ -+ put_gpr_dw0(r3 + 1, -+ IRExpr_Mux0X(unop(Iop_1Uto8, -+ binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))), -+ binop(Iop_Sub64, mkexpr(len3), mkU64(1)), -+ mkU64(0))); -+ -+ /* The architecture requires that we exit with CC3 after a machine specific -+ amount of bytes. We do that if len1+len3 % 4096 == 0 */ -+ s390_cc_set(3); -+ if_condition_goto(binop(Iop_CmpEQ64, -+ binop(Iop_And64, -+ binop(Iop_Add64, mkexpr(len1), mkexpr(len3)), -+ mkU64(0xfff)), -+ mkU64(0)), -+ guest_IA_next_instr); -+ -+ always_goto(mkU64(guest_IA_curr_instr)); -+ -+ return "clcle"; -+} -+static void -+s390_irgen_XC_EX(IRTemp length, IRTemp start1, IRTemp start2) -+{ -+ IRTemp old1 = newTemp(Ity_I8); -+ IRTemp old2 = newTemp(Ity_I8); -+ IRTemp new1 = newTemp(Ity_I8); -+ IRTemp counter = newTemp(Ity_I32); -+ IRTemp addr1 = newTemp(Ity_I64); -+ -+ assign(counter, get_counter_w0()); -+ -+ assign(addr1, binop(Iop_Add64, mkexpr(start1), -+ unop(Iop_32Uto64, mkexpr(counter)))); -+ -+ assign(old1, load(Ity_I8, mkexpr(addr1))); -+ assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2), -+ unop(Iop_32Uto64,mkexpr(counter))))); -+ assign(new1, binop(Iop_Xor8, mkexpr(old1), mkexpr(old2))); -+ -+ store(mkexpr(addr1), -+ IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(start1), -+ mkexpr(start2))), -+ mkexpr(new1), mkU8(0))); -+ put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)), -+ get_counter_w1())); -+ -+ /* Check for end of field */ -+ put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1))); -+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkexpr(length)), -+ guest_IA_curr_instr); -+ s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()), -+ False); -+ put_counter_dw0(mkU64(0)); -+} -+ -+ -+static void -+s390_irgen_CLC_EX(IRTemp length, IRTemp start1, IRTemp start2) -+{ -+ IRTemp current1 = newTemp(Ity_I8); -+ IRTemp current2 = newTemp(Ity_I8); -+ IRTemp counter = newTemp(Ity_I64); -+ -+ assign(counter, get_counter_dw0()); -+ put_counter_dw0(mkU64(0)); -+ -+ assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1), -+ mkexpr(counter)))); -+ assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2), -+ mkexpr(counter)))); -+ s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2, -+ False); -+ -+ /* Both fields differ ? */ -+ if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)), -+ guest_IA_next_instr); -+ -+ /* Check for end of field */ -+ put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1))); -+ if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)), -+ guest_IA_curr_instr); -+ put_counter_dw0(mkU64(0)); -+} -+ -+static void -+s390_irgen_MVC_EX(IRTemp length, IRTemp start1, IRTemp start2) -+{ -+ IRTemp counter = newTemp(Ity_I64); -+ -+ assign(counter, get_counter_dw0()); -+ -+ store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)), -+ load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter)))); -+ -+ /* Check for end of field */ -+ put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1))); -+ if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)), -+ guest_IA_curr_instr); -+ put_counter_dw0(mkU64(0)); -+} -+ -+ -+ -+static void -+s390_irgen_EX_SS(UChar r, IRTemp addr2, -+void (*irgen)(IRTemp length, IRTemp start1, IRTemp start2), int lensize) -+{ -+ struct SS { -+ unsigned int op : 8; -+ unsigned int l : 8; -+ unsigned int b1 : 4; -+ unsigned int d1 : 12; -+ unsigned int b2 : 4; -+ unsigned int d2 : 12; -+ }; -+ union { -+ struct SS dec; -+ unsigned long bytes; -+ } ss; -+ IRTemp cond; -+ IRDirty *d; -+ IRTemp torun; -+ -+ IRTemp start1 = newTemp(Ity_I64); -+ IRTemp start2 = newTemp(Ity_I64); -+ IRTemp len = newTemp(lensize == 64 ? Ity_I64 : Ity_I32); -+ cond = newTemp(Ity_I1); -+ torun = newTemp(Ity_I64); -+ -+ assign(torun, load(Ity_I64, mkexpr(addr2))); -+ /* Start with a check that the saved code is still correct */ -+ assign(cond, binop(Iop_CmpNE64, mkexpr(torun), mkU64(last_execute_target))); -+ /* If not, save the new value */ -+ d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX, -+ mkIRExprVec_1(mkexpr(torun))); -+ d->guard = mkexpr(cond); -+ stmt(IRStmt_Dirty(d)); -+ -+ /* and restart */ -+ stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr))); -+ stmt(IRStmt_Put(OFFB_TILEN, mkU64(4))); -+ stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval, -+ IRConst_U64(guest_IA_curr_instr))); -+ -+ ss.bytes = last_execute_target; -+ assign(start1, binop(Iop_Add64, mkU64(ss.dec.d1), -+ ss.dec.b1 != 0 ? get_gpr_dw0(ss.dec.b1) : mkU64(0))); -+ assign(start2, binop(Iop_Add64, mkU64(ss.dec.d2), -+ ss.dec.b2 != 0 ? get_gpr_dw0(ss.dec.b2) : mkU64(0))); -+ assign(len, unop(lensize == 64 ? Iop_8Uto64 : Iop_8Uto32, binop(Iop_Or8, -+ r != 0 ? get_gpr_b7(r): mkU8(0), mkU8(ss.dec.l)))); -+ irgen(len, start1, start2); -+ last_execute_target = 0; -+} -+ -+static HChar * -+s390_irgen_EX(UChar r1, IRTemp addr2) -+{ -+ switch(last_execute_target & 0xff00000000000000ULL) { -+ case 0: -+ { -+ /* no code information yet */ -+ IRDirty *d; -+ -+ /* so safe the code... */ -+ d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX, -+ mkIRExprVec_1(load(Ity_I64, mkexpr(addr2)))); -+ stmt(IRStmt_Dirty(d)); -+ /* and restart */ -+ stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr))); -+ stmt(IRStmt_Put(OFFB_TILEN, mkU64(4))); -+ stmt(IRStmt_Exit(IRExpr_Const(IRConst_U1(True)), Ijk_TInval, -+ IRConst_U64(guest_IA_curr_instr))); -+ /* we know that this will be invalidated */ -+ irsb->next = mkU64(guest_IA_next_instr); -+ dis_res->whatNext = Dis_StopHere; -+ break; -+ } -+ -+ case 0xd200000000000000ULL: -+ /* special case MVC */ -+ s390_irgen_EX_SS(r1, addr2, s390_irgen_MVC_EX, 64); -+ return "mvc via ex"; -+ -+ case 0xd500000000000000ULL: -+ /* special case CLC */ -+ s390_irgen_EX_SS(r1, addr2, s390_irgen_CLC_EX, 64); -+ return "clc via ex"; -+ -+ case 0xd700000000000000ULL: -+ /* special case XC */ -+ s390_irgen_EX_SS(r1, addr2, s390_irgen_XC_EX, 32); -+ return "xc via ex"; -+ -+ -+ default: -+ { -+ /* everything else will get a self checking prefix that also checks the -+ register content */ -+ IRDirty *d; -+ UChar *bytes; -+ IRTemp cond; -+ IRTemp orperand; -+ IRTemp torun; -+ -+ cond = newTemp(Ity_I1); -+ orperand = newTemp(Ity_I64); -+ torun = newTemp(Ity_I64); -+ -+ if (r1 == 0) -+ assign(orperand, mkU64(0)); -+ else -+ assign(orperand, unop(Iop_8Uto64,get_gpr_b7(r1))); -+ /* This code is going to be translated */ -+ assign(torun, binop(Iop_Or64, load(Ity_I64, mkexpr(addr2)), -+ binop(Iop_Shl64, mkexpr(orperand), mkU8(48)))); -+ -+ /* Start with a check that saved code is still correct */ -+ assign(cond, binop(Iop_CmpNE64, mkexpr(torun), -+ mkU64(last_execute_target))); -+ /* If not, save the new value */ -+ d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX, -+ mkIRExprVec_1(mkexpr(torun))); -+ d->guard = mkexpr(cond); -+ stmt(IRStmt_Dirty(d)); -+ -+ /* and restart */ -+ stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr))); -+ stmt(IRStmt_Put(OFFB_TILEN, mkU64(4))); -+ stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval, -+ IRConst_U64(guest_IA_curr_instr))); -+ -+ /* Now comes the actual translation */ -+ bytes = (UChar *) &last_execute_target; -+ s390_decode_and_irgen(bytes, ((((bytes[0] >> 6) + 1) >> 1) + 1) << 1, -+ dis_res); -+ if (unlikely(vex_traceflags & VEX_TRACE_FE)) -+ vex_printf(" which was executed by\n"); -+ /* dont make useless translations in the next execute */ -+ last_execute_target = 0; -+ } -+ } -+ return "ex"; -+} -+ -+static HChar * -+s390_irgen_EXRL(UChar r1, UInt offset) -+{ -+ IRTemp addr = newTemp(Ity_I64); -+ /* we might save one round trip because we know the target */ -+ if (!last_execute_target) -+ last_execute_target = *(ULong *)(HWord) -+ (guest_IA_curr_instr + offset * 2UL); -+ assign(addr, mkU64(guest_IA_curr_instr + offset * 2UL)); -+ s390_irgen_EX(r1, addr); -+ return "exrl"; -+} -+ -+static HChar * -+s390_irgen_IPM(UChar r1) -+{ -+ // As long as we dont support SPM, lets just assume 0 as program mask -+ put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_Or32, mkU32(0 /* program mask */), -+ binop(Iop_Shl32, s390_call_calculate_cc(), mkU8(4))))); -+ -+ return "ipm"; -+} -+ -+ -+static HChar * -+s390_irgen_SRST(UChar r1, UChar r2) -+{ -+ IRTemp address = newTemp(Ity_I64); -+ IRTemp next = newTemp(Ity_I64); -+ IRTemp delim = newTemp(Ity_I8); -+ IRTemp counter = newTemp(Ity_I64); -+ IRTemp byte = newTemp(Ity_I8); -+ -+ assign(address, get_gpr_dw0(r2)); -+ assign(next, get_gpr_dw0(r1)); -+ -+ assign(counter, get_counter_dw0()); -+ put_counter_dw0(mkU64(0)); -+ -+ // start = next? CC=2 and out r1 and r2 unchanged -+ s390_cc_set(2); -+ put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address), mkexpr(counter))); -+ if_condition_goto(binop(Iop_CmpEQ64, mkexpr(address), mkexpr(next)), -+ guest_IA_next_instr); -+ -+ assign(byte, load(Ity_I8, mkexpr(address))); -+ assign(delim, get_gpr_b7(0)); -+ -+ // byte = delim? CC=1, R1=address -+ s390_cc_set(1); -+ put_gpr_dw0(r1, mkexpr(address)); -+ if_condition_goto(binop(Iop_CmpEQ8, mkexpr(delim), mkexpr(byte)), -+ guest_IA_next_instr); -+ -+ // else: all equal, no end yet, loop -+ put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1))); -+ put_gpr_dw0(r1, mkexpr(next)); -+ put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(address), mkU64(1))); -+ stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)), -+ Ijk_Boring, IRConst_U64(guest_IA_curr_instr))); -+ // >= 256 bytes done CC=3 -+ s390_cc_set(3); -+ put_counter_dw0(mkU64(0)); -+ -+ return "srst"; -+} -+ -+static HChar * -+s390_irgen_CLST(UChar r1, UChar r2) -+{ -+ IRTemp address1 = newTemp(Ity_I64); -+ IRTemp address2 = newTemp(Ity_I64); -+ IRTemp end = newTemp(Ity_I8); -+ IRTemp counter = newTemp(Ity_I64); -+ IRTemp byte1 = newTemp(Ity_I8); -+ IRTemp byte2 = newTemp(Ity_I8); -+ -+ assign(address1, get_gpr_dw0(r1)); -+ assign(address2, get_gpr_dw0(r2)); -+ assign(end, get_gpr_b7(0)); -+ assign(counter, get_counter_dw0()); -+ put_counter_dw0(mkU64(0)); -+ assign(byte1, load(Ity_I8, mkexpr(address1))); -+ assign(byte2, load(Ity_I8, mkexpr(address2))); -+ -+ // end in both? all equal, reset r1 and r2 to start values -+ s390_cc_set(0); -+ put_gpr_dw0(r1, binop(Iop_Sub64, mkexpr(address1), mkexpr(counter))); -+ put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address2), mkexpr(counter))); -+ if_condition_goto(binop(Iop_CmpEQ8, mkU8(0), -+ binop(Iop_Or8, -+ binop(Iop_Xor8, mkexpr(byte1), mkexpr(end)), -+ binop(Iop_Xor8, mkexpr(byte2), mkexpr(end)))), -+ guest_IA_next_instr); -+ -+ put_gpr_dw0(r1, mkexpr(address1)); -+ put_gpr_dw0(r2, mkexpr(address2)); -+ -+ // End found in string1 -+ s390_cc_set(1); -+ if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte1)), -+ guest_IA_next_instr); -+ -+ // End found in string2 -+ s390_cc_set(2); -+ if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte2)), -+ guest_IA_next_instr); -+ -+ // string1 < string2 -+ s390_cc_set(1); -+ if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte1)), -+ unop(Iop_8Uto32, mkexpr(byte2))), -+ guest_IA_next_instr); -+ -+ // string2 < string1 -+ s390_cc_set(2); -+ if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte2)), -+ unop(Iop_8Uto32, mkexpr(byte1))), -+ guest_IA_next_instr); -+ -+ // else: all equal, no end yet, loop -+ put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1))); -+ put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), mkU64(1))); -+ put_gpr_dw0(r2, binop(Iop_Add64, get_gpr_dw0(r2), mkU64(1))); -+ stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)), -+ Ijk_Boring, IRConst_U64(guest_IA_curr_instr))); -+ // >= 256 bytes done CC=3 -+ s390_cc_set(3); -+ put_counter_dw0(mkU64(0)); -+ -+ return "clst"; -+} -+ -+static void -+s390_irgen_load_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ UChar reg; -+ IRTemp addr = newTemp(Ity_I64); -+ -+ assign(addr, mkexpr(op2addr)); -+ reg = r1; -+ do { -+ IRTemp old = addr; -+ -+ reg %= 16; -+ put_gpr_w1(reg, load(Ity_I32, mkexpr(addr))); -+ addr = newTemp(Ity_I64); -+ assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4))); -+ reg++; -+ } while (reg != (r3 + 1)); -+} -+ -+static HChar * -+s390_irgen_LM(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ s390_irgen_load_multiple_32bit(r1, r3, op2addr); -+ -+ return "lm"; -+} -+ -+static HChar * -+s390_irgen_LMY(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ s390_irgen_load_multiple_32bit(r1, r3, op2addr); -+ -+ return "lmy"; -+} -+ -+static HChar * -+s390_irgen_LMH(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ UChar reg; -+ IRTemp addr = newTemp(Ity_I64); -+ -+ assign(addr, mkexpr(op2addr)); -+ reg = r1; -+ do { -+ IRTemp old = addr; -+ -+ reg %= 16; -+ put_gpr_w0(reg, load(Ity_I32, mkexpr(addr))); -+ addr = newTemp(Ity_I64); -+ assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4))); -+ reg++; -+ } while (reg != (r3 + 1)); -+ -+ return "lmh"; -+} -+ -+static HChar * -+s390_irgen_LMG(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ UChar reg; -+ IRTemp addr = newTemp(Ity_I64); -+ -+ assign(addr, mkexpr(op2addr)); -+ reg = r1; -+ do { -+ IRTemp old = addr; -+ -+ reg %= 16; -+ put_gpr_dw0(reg, load(Ity_I64, mkexpr(addr))); -+ addr = newTemp(Ity_I64); -+ assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8))); -+ reg++; -+ } while (reg != (r3 + 1)); -+ -+ return "lmg"; -+} -+ -+static void -+s390_irgen_store_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ UChar reg; -+ IRTemp addr = newTemp(Ity_I64); -+ -+ assign(addr, mkexpr(op2addr)); -+ reg = r1; -+ do { -+ IRTemp old = addr; -+ -+ reg %= 16; -+ store(mkexpr(addr), get_gpr_w1(reg)); -+ addr = newTemp(Ity_I64); -+ assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4))); -+ reg++; -+ } while( reg != (r3 + 1)); -+} -+ -+static HChar * -+s390_irgen_STM(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ s390_irgen_store_multiple_32bit(r1, r3, op2addr); -+ -+ return "stm"; -+} -+ -+static HChar * -+s390_irgen_STMY(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ s390_irgen_store_multiple_32bit(r1, r3, op2addr); -+ -+ return "stmy"; -+} -+ -+static HChar * -+s390_irgen_STMH(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ UChar reg; -+ IRTemp addr = newTemp(Ity_I64); -+ -+ assign(addr, mkexpr(op2addr)); -+ reg = r1; -+ do { -+ IRTemp old = addr; -+ -+ reg %= 16; -+ store(mkexpr(addr), get_gpr_w0(reg)); -+ addr = newTemp(Ity_I64); -+ assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4))); -+ reg++; -+ } while( reg != (r3 + 1)); -+ -+ return "stmh"; -+} -+ -+static HChar * -+s390_irgen_STMG(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ UChar reg; -+ IRTemp addr = newTemp(Ity_I64); -+ -+ assign(addr, mkexpr(op2addr)); -+ reg = r1; -+ do { -+ IRTemp old = addr; -+ -+ reg %= 16; -+ store(mkexpr(addr), get_gpr_dw0(reg)); -+ addr = newTemp(Ity_I64); -+ assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8))); -+ reg++; -+ } while( reg != (r3 + 1)); -+ -+ return "stmg"; -+} -+ -+static void -+s390_irgen_XONC(IROp op, UChar length, IRTemp start1, IRTemp start2) -+{ -+ IRTemp old1 = newTemp(Ity_I8); -+ IRTemp old2 = newTemp(Ity_I8); -+ IRTemp new1 = newTemp(Ity_I8); -+ IRTemp counter = newTemp(Ity_I32); -+ IRTemp addr1 = newTemp(Ity_I64); -+ -+ assign(counter, get_counter_w0()); -+ -+ assign(addr1, binop(Iop_Add64, mkexpr(start1), -+ unop(Iop_32Uto64, mkexpr(counter)))); -+ -+ assign(old1, load(Ity_I8, mkexpr(addr1))); -+ assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2), -+ unop(Iop_32Uto64,mkexpr(counter))))); -+ assign(new1, binop(op, mkexpr(old1), mkexpr(old2))); -+ -+ /* Special case: xc is used to zero memory */ -+ /* fixs390: we also want an instrumentation time shortcut */ -+ if (op == Iop_Xor8) { -+ store(mkexpr(addr1), -+ IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(start1), -+ mkexpr(start2))), -+ mkexpr(new1), mkU8(0))); -+ } else -+ store(mkexpr(addr1), mkexpr(new1)); -+ put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)), -+ get_counter_w1())); -+ -+ /* Check for end of field */ -+ put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1))); -+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)), -+ guest_IA_curr_instr); -+ s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()), -+ False); -+ put_counter_dw0(mkU64(0)); -+} -+ -+static HChar * -+s390_irgen_XC(UChar length, IRTemp start1, IRTemp start2) -+{ -+ s390_irgen_XONC(Iop_Xor8, length, start1, start2); -+ -+ return "xc"; -+} -+ -+static HChar * -+s390_irgen_NC(UChar length, IRTemp start1, IRTemp start2) -+{ -+ s390_irgen_XONC(Iop_And8, length, start1, start2); -+ -+ return "nc"; -+} -+ -+static HChar * -+s390_irgen_OC(UChar length, IRTemp start1, IRTemp start2) -+{ -+ s390_irgen_XONC(Iop_Or8, length, start1, start2); -+ -+ return "oc"; -+} -+ -+ -+static HChar * -+s390_irgen_MVC(UChar length, IRTemp start1, IRTemp start2) -+{ -+ IRTemp counter = newTemp(Ity_I64); -+ -+ assign(counter, get_counter_dw0()); -+ -+ store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)), -+ load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter)))); -+ -+ /* Check for end of field */ -+ put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1))); -+ if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)), -+ guest_IA_curr_instr); -+ put_counter_dw0(mkU64(0)); -+ -+ return "mvc"; -+} -+ -+static HChar * -+s390_irgen_MVCLE(UChar r1, UChar r3, IRTemp pad2) -+{ -+ IRTemp addr1, addr3, addr3_load, len1, len3, single; -+ -+ addr1 = newTemp(Ity_I64); -+ addr3 = newTemp(Ity_I64); -+ addr3_load = newTemp(Ity_I64); -+ len1 = newTemp(Ity_I64); -+ len3 = newTemp(Ity_I64); -+ single = newTemp(Ity_I8); -+ -+ assign(addr1, get_gpr_dw0(r1)); -+ assign(len1, get_gpr_dw0(r1 + 1)); -+ assign(addr3, get_gpr_dw0(r3)); -+ assign(len3, get_gpr_dw0(r3 + 1)); -+ -+ // len1 == 0 ? -+ s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False); -+ if_condition_goto(binop(Iop_CmpEQ64,mkexpr(len1), mkU64(0)), -+ guest_IA_next_instr); -+ -+ /* This is a hack to prevent mvcle from reading from addr3 if it -+ should read from the pad. Since the pad has no address, just -+ read from the instruction, we discard that anyway */ -+ assign(addr3_load, -+ IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3), -+ mkU64(0))), -+ mkexpr(addr3), -+ mkU64(guest_IA_curr_instr))); -+ -+ assign(single, -+ IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3), -+ mkU64(0))), -+ load(Ity_I8, mkexpr(addr3_load)), -+ unop(Iop_64to8, mkexpr(pad2)))); -+ store(mkexpr(addr1), mkexpr(single)); -+ -+ put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1))); -+ -+ put_gpr_dw0(r1 + 1, binop(Iop_Sub64, mkexpr(len1), mkU64(1))); -+ -+ put_gpr_dw0(r3, -+ IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3), -+ mkU64(0))), -+ binop(Iop_Add64, mkexpr(addr3), mkU64(1)), -+ mkexpr(addr3))); -+ -+ put_gpr_dw0(r3 + 1, -+ IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3), -+ mkU64(0))), -+ binop(Iop_Sub64, mkexpr(len3), mkU64(1)), -+ mkU64(0))); -+ -+ /* We should set CC=3 (faked by overflow add) and leave after -+ a maximum of ~4096 bytes have been processed. This is simpler: -+ we leave whenever (len1 % 4096) == 0 */ -+ s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(-1ULL)), -+ -+ mktemp(Ity_I64, mkU64(-1ULL)), False); -+ if_condition_goto(binop(Iop_CmpEQ64, -+ binop(Iop_And64, mkexpr(len1), mkU64(0xfff)), -+ mkU64(0)), -+ guest_IA_next_instr); -+ -+ s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False); -+ if_condition_goto(binop(Iop_CmpNE64, mkexpr(len1), mkU64(1)), -+ guest_IA_curr_instr); -+ -+ return "mvcle"; -+} -+ -+static HChar * -+s390_irgen_MVST(UChar r1, UChar r2) -+{ -+ IRTemp addr1 = newTemp(Ity_I64); -+ IRTemp addr2 = newTemp(Ity_I64); -+ IRTemp end = newTemp(Ity_I8); -+ IRTemp byte = newTemp(Ity_I8); -+ IRTemp counter = newTemp(Ity_I64); -+ -+ assign(addr1, get_gpr_dw0(r1)); -+ assign(addr2, get_gpr_dw0(r2)); -+ assign(counter, get_counter_dw0()); -+ assign(end, get_gpr_b7(0)); -+ assign(byte, load(Ity_I8, binop(Iop_Add64, mkexpr(addr2),mkexpr(counter)))); -+ store(binop(Iop_Add64,mkexpr(addr1),mkexpr(counter)), mkexpr(byte)); -+ -+ // We use unlimited as cpu-determined number -+ put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1))); -+ if_condition_goto(binop(Iop_CmpNE8, mkexpr(end), mkexpr(byte)), -+ guest_IA_curr_instr); -+ -+ // and always set cc=1 at the end + update r1 -+ s390_cc_set(1); -+ put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkexpr(counter))); -+ put_counter_dw0(mkU64(0)); -+ -+ return "mvst"; -+} -+ -+static void -+s390_irgen_divide_64to32(IROp op, UChar r1, IRTemp op2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op1, binop(Iop_32HLto64, -+ get_gpr_w1(r1), // high 32 bits -+ get_gpr_w1(r1 + 1))); // low 32 bits -+ assign(result, binop(op, mkexpr(op1), mkexpr(op2))); -+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); // remainder -+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); // quotient -+} -+ -+static void -+s390_irgen_divide_128to64(IROp op, UChar r1, IRTemp op2) -+{ -+ IRTemp op1 = newTemp(Ity_I128); -+ IRTemp result = newTemp(Ity_I128); -+ -+ assign(op1, binop(Iop_64HLto128, -+ get_gpr_dw0(r1), // high 64 bits -+ get_gpr_dw0(r1 + 1))); // low 64 bits -+ assign(result, binop(op, mkexpr(op1), mkexpr(op2))); -+ put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder -+ put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient -+} -+ -+static void -+s390_irgen_divide_64to64(IROp op, UChar r1, IRTemp op2) -+{ -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I128); -+ -+ assign(op1, get_gpr_dw0(r1 + 1)); -+ assign(result, binop(op, mkexpr(op1), mkexpr(op2))); -+ put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder -+ put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient -+} -+ -+static HChar * -+s390_irgen_DR(UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op2, get_gpr_w1(r2)); -+ -+ s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2); -+ -+ return "dr"; -+} -+ -+static HChar * -+s390_irgen_D(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ -+ s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2); -+ -+ return "d"; -+} -+ -+static HChar * -+s390_irgen_DLR(UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op2, get_gpr_w1(r2)); -+ -+ s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2); -+ -+ return "dr"; -+} -+ -+static HChar * -+s390_irgen_DL(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op2, load(Ity_I32, mkexpr(op2addr))); -+ -+ s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2); -+ -+ return "dl"; -+} -+ -+static HChar * -+s390_irgen_DLG(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op2, load(Ity_I64, mkexpr(op2addr))); -+ -+ s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2); -+ -+ return "dlg"; -+} -+ -+static HChar * -+s390_irgen_DLGR(UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op2, get_gpr_dw0(r2)); -+ -+ s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2); -+ -+ return "dlgr"; -+} -+ -+static HChar * -+s390_irgen_DSGR(UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op2, get_gpr_dw0(r2)); -+ -+ s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2); -+ -+ return "dsgr"; -+} -+ -+static HChar * -+s390_irgen_DSG(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op2, load(Ity_I64, mkexpr(op2addr))); -+ -+ s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2); -+ -+ return "dsg"; -+} -+ -+static HChar * -+s390_irgen_DSGFR(UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2))); -+ -+ s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2); -+ -+ return "dsgfr"; -+} -+ -+static HChar * -+s390_irgen_DSGF(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr)))); -+ -+ s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2); -+ -+ return "dsgf"; -+} -+ -+static void -+s390_irgen_load_ar_multiple(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ UChar reg; -+ IRTemp addr = newTemp(Ity_I64); -+ -+ assign(addr, mkexpr(op2addr)); -+ reg = r1; -+ do { -+ IRTemp old = addr; -+ -+ reg %= 16; -+ put_ar_w0(reg, load(Ity_I32, mkexpr(addr))); -+ addr = newTemp(Ity_I64); -+ assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4))); -+ reg++; -+ } while (reg != (r3 + 1)); -+} -+ -+static HChar * -+s390_irgen_LAM(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ s390_irgen_load_ar_multiple(r1, r3, op2addr); -+ -+ return "lam"; -+} -+ -+static HChar * -+s390_irgen_LAMY(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ s390_irgen_load_ar_multiple(r1, r3, op2addr); -+ -+ return "lamy"; -+} -+ -+static void -+s390_irgen_store_ar_multiple(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ UChar reg; -+ IRTemp addr = newTemp(Ity_I64); -+ -+ assign(addr, mkexpr(op2addr)); -+ reg = r1; -+ do { -+ IRTemp old = addr; -+ -+ reg %= 16; -+ store(mkexpr(addr), get_ar_w0(reg)); -+ addr = newTemp(Ity_I64); -+ assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4))); -+ reg++; -+ } while (reg != (r3 + 1)); -+} -+ -+static HChar * -+s390_irgen_STAM(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ s390_irgen_store_ar_multiple(r1, r3, op2addr); -+ -+ return "stam"; -+} -+ -+static HChar * -+s390_irgen_STAMY(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ s390_irgen_store_ar_multiple(r1, r3, op2addr); -+ -+ return "stamy"; -+} -+ -+ -+/* Implementation for 32-bit compare-and-swap */ -+static void -+s390_irgen_cas_32(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ IRCAS *cas; -+ IRTemp op1 = newTemp(Ity_I32); -+ IRTemp old_mem = newTemp(Ity_I32); -+ IRTemp op3 = newTemp(Ity_I32); -+ IRTemp result = newTemp(Ity_I32); -+ IRTemp nequal = newTemp(Ity_I1); -+ -+ assign(op1, get_gpr_w1(r1)); -+ assign(op3, get_gpr_w1(r3)); -+ -+ /* The first and second operands are compared. If they are equal, -+ the third operand is stored at the second- operand location. */ -+ cas = mkIRCAS(IRTemp_INVALID, old_mem, -+ Iend_BE, mkexpr(op2addr), -+ NULL, mkexpr(op1), /* expected value */ -+ NULL, mkexpr(op3) /* new value */); -+ stmt(IRStmt_CAS(cas)); -+ -+ /* Set CC. Operands compared equal -> 0, else 1. */ -+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(old_mem))); -+ s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False); -+ -+ /* If operands were equal (cc == 0) just store the old value op1 in r1. -+ Otherwise, store the old_value from memory in r1 and yield. */ -+ assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0))); -+ put_gpr_w1(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1))); -+ stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield, -+ IRConst_U64(guest_IA_next_instr))); -+} -+ -+static HChar * -+s390_irgen_CS(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ s390_irgen_cas_32(r1, r3, op2addr); -+ -+ return "cs"; -+} -+ -+static HChar * -+s390_irgen_CSY(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ s390_irgen_cas_32(r1, r3, op2addr); -+ -+ return "csy"; -+} -+ -+static HChar * -+s390_irgen_CSG(UChar r1, UChar r3, IRTemp op2addr) -+{ -+ IRCAS *cas; -+ IRTemp op1 = newTemp(Ity_I64); -+ IRTemp old_mem = newTemp(Ity_I64); -+ IRTemp op3 = newTemp(Ity_I64); -+ IRTemp result = newTemp(Ity_I64); -+ IRTemp nequal = newTemp(Ity_I1); -+ -+ assign(op1, get_gpr_dw0(r1)); -+ assign(op3, get_gpr_dw0(r3)); -+ -+ /* The first and second operands are compared. If they are equal, -+ the third operand is stored at the second- operand location. */ -+ cas = mkIRCAS(IRTemp_INVALID, old_mem, -+ Iend_BE, mkexpr(op2addr), -+ NULL, mkexpr(op1), /* expected value */ -+ NULL, mkexpr(op3) /* new value */); -+ stmt(IRStmt_CAS(cas)); -+ -+ /* Set CC. Operands compared equal -> 0, else 1. */ -+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(old_mem))); -+ s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False); -+ -+ /* If operands were equal (cc == 0) just store the old value op1 in r1. -+ Otherwise, store the old_value from memory in r1 and yield. */ -+ assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0))); -+ put_gpr_dw0(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1))); -+ stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield, -+ IRConst_U64(guest_IA_next_instr))); -+ -+ return "csg"; -+} -+ -+ -+/* Binary floating point */ -+ -+static HChar * -+s390_irgen_AXBR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_F128); -+ IRTemp op2 = newTemp(Ity_F128); -+ IRTemp result = newTemp(Ity_F128); -+ -+ assign(op1, get_fpr_pair(r1)); -+ assign(op2, get_fpr_pair(r2)); -+ assign(result, triop(Iop_AddF128, mkU32(Irrm_NEAREST), mkexpr(op1), -+ mkexpr(op2))); -+ put_fpr_pair(r1, mkexpr(result)); -+ -+ s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result); -+ -+ return "axbr"; -+} -+ -+/* The result of a Iop_CmdFxx operation is a condition code. It is -+ encoded using the values defined in type IRCmpFxxResult. -+ Before we can store the condition code into the guest state (or do -+ anything else with it for that matter) we need to convert it to -+ the encoding that s390 uses. This is what this function does. -+ -+ s390 VEX b6 b2 b0 cc.1 cc.0 -+ 0 0x40 EQ 1 0 0 0 0 -+ 1 0x01 LT 0 0 1 0 1 -+ 2 0x00 GT 0 0 0 1 0 -+ 3 0x45 Unordered 1 1 1 1 1 -+ -+ The following bits from the VEX encoding are interesting: -+ b0, b2, b6 with b0 being the LSB. We observe: -+ -+ cc.0 = b0; -+ cc.1 = b2 | (~b0 & ~b6) -+ -+ with cc being the s390 condition code. -+*/ -+static IRExpr * -+convert_vex_fpcc_to_s390(IRTemp vex_cc) -+{ -+ IRTemp cc0 = newTemp(Ity_I32); -+ IRTemp cc1 = newTemp(Ity_I32); -+ IRTemp b0 = newTemp(Ity_I32); -+ IRTemp b2 = newTemp(Ity_I32); -+ IRTemp b6 = newTemp(Ity_I32); -+ -+ assign(b0, binop(Iop_And32, mkexpr(vex_cc), mkU32(1))); -+ assign(b2, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(2)), -+ mkU32(1))); -+ assign(b6, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(6)), -+ mkU32(1))); -+ -+ assign(cc0, mkexpr(b0)); -+ assign(cc1, binop(Iop_Or32, mkexpr(b2), -+ binop(Iop_And32, -+ binop(Iop_Sub32, mkU32(1), mkexpr(b0)), /* ~b0 */ -+ binop(Iop_Sub32, mkU32(1), mkexpr(b6)) /* ~b6 */ -+ ))); -+ -+ return binop(Iop_Or32, mkexpr(cc0), binop(Iop_Shl32, mkexpr(cc1), mkU8(1))); -+} -+ -+static HChar * -+s390_irgen_CEBR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_F32); -+ IRTemp op2 = newTemp(Ity_F32); -+ IRTemp cc_vex = newTemp(Ity_I32); -+ IRTemp cc_s390 = newTemp(Ity_I32); -+ -+ assign(op1, get_fpr_w0(r1)); -+ assign(op2, get_fpr_w0(r2)); -+ assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2))); -+ -+ assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex)); -+ s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False); -+ -+ return "cebr"; -+} -+ -+static HChar * -+s390_irgen_CDBR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_F64); -+ IRTemp op2 = newTemp(Ity_F64); -+ IRTemp cc_vex = newTemp(Ity_I32); -+ IRTemp cc_s390 = newTemp(Ity_I32); -+ -+ assign(op1, get_fpr_dw0(r1)); -+ assign(op2, get_fpr_dw0(r2)); -+ assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2))); -+ -+ assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex)); -+ s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False); -+ -+ return "cdbr"; -+} -+ -+static HChar * -+s390_irgen_CXBR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_F128); -+ IRTemp op2 = newTemp(Ity_F128); -+ IRTemp cc_vex = newTemp(Ity_I32); -+ IRTemp cc_s390 = newTemp(Ity_I32); -+ -+ assign(op1, get_fpr_pair(r1)); -+ assign(op2, get_fpr_pair(r2)); -+ assign(cc_vex, binop(Iop_CmpF128, mkexpr(op1), mkexpr(op2))); -+ -+ assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex)); -+ s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False); -+ -+ return "cxbr"; -+} -+ -+static HChar * -+s390_irgen_CEB(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_F32); -+ IRTemp op2 = newTemp(Ity_F32); -+ IRTemp cc_vex = newTemp(Ity_I32); -+ IRTemp cc_s390 = newTemp(Ity_I32); -+ -+ assign(op1, get_fpr_w0(r1)); -+ assign(op2, load(Ity_F32, mkexpr(op2addr))); -+ assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2))); -+ -+ assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex)); -+ s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False); -+ -+ return "ceb"; -+} -+ -+static HChar * -+s390_irgen_CDB(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op1 = newTemp(Ity_F64); -+ IRTemp op2 = newTemp(Ity_F64); -+ IRTemp cc_vex = newTemp(Ity_I32); -+ IRTemp cc_s390 = newTemp(Ity_I32); -+ -+ assign(op1, get_fpr_dw0(r1)); -+ assign(op2, load(Ity_F64, mkexpr(op2addr))); -+ assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2))); -+ -+ assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex)); -+ s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False); -+ -+ return "cdb"; -+} -+ -+static HChar * -+s390_irgen_CXFBR(UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I32); -+ -+ assign(op2, get_gpr_w1(r2)); -+ put_fpr_pair(r1, unop(Iop_I32StoF128, mkexpr(op2))); -+ -+ return "cxfbr"; -+} -+ -+static HChar * -+s390_irgen_CXGBR(UChar r1, UChar r2) -+{ -+ IRTemp op2 = newTemp(Ity_I64); -+ -+ assign(op2, get_gpr_dw0(r2)); -+ put_fpr_pair(r1, unop(Iop_I64StoF128, mkexpr(op2))); -+ -+ return "cxgbr"; -+} -+ -+static HChar * -+s390_irgen_CFXBR(UChar r3, UChar r1, UChar r2) -+{ -+ IRTemp op = newTemp(Ity_F128); -+ IRTemp result = newTemp(Ity_I32); -+ -+ assign(op, get_fpr_pair(r2)); -+ assign(result, binop(Iop_F128toI32S, mkU32(encode_rounding_mode(r3)), -+ mkexpr(op))); -+ put_gpr_w1(r1, mkexpr(result)); -+ s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_32, op); -+ -+ return "cfxbr"; -+} -+ -+static HChar * -+s390_irgen_CGXBR(UChar r3, UChar r1, UChar r2) -+{ -+ IRTemp op = newTemp(Ity_F128); -+ IRTemp result = newTemp(Ity_I64); -+ -+ assign(op, get_fpr_pair(r2)); -+ assign(result, binop(Iop_F128toI64S, mkU32(encode_rounding_mode(r3)), -+ mkexpr(op))); -+ put_gpr_dw0(r1, mkexpr(result)); -+ s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_64, op); -+ -+ return "cgxbr"; -+} -+ -+static HChar * -+s390_irgen_DXBR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_F128); -+ IRTemp op2 = newTemp(Ity_F128); -+ IRTemp result = newTemp(Ity_F128); -+ -+ assign(op1, get_fpr_pair(r1)); -+ assign(op2, get_fpr_pair(r2)); -+ assign(result, triop(Iop_DivF128, mkU32(Irrm_NEAREST), mkexpr(op1), -+ mkexpr(op2))); -+ put_fpr_pair(r1, mkexpr(result)); -+ -+ return "dxbr"; -+} -+ -+static HChar * -+s390_irgen_LTXBR(UChar r1, UChar r2) -+{ -+ IRTemp result = newTemp(Ity_F128); -+ -+ assign(result, get_fpr_pair(r2)); -+ put_fpr_pair(r1, mkexpr(result)); -+ s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result); -+ -+ return "ltxbr"; -+} -+ -+static HChar * -+s390_irgen_LCXBR(UChar r1, UChar r2) -+{ -+ IRTemp result = newTemp(Ity_F128); -+ -+ assign(result, unop(Iop_NegF128, get_fpr_pair(r2))); -+ put_fpr_pair(r1, mkexpr(result)); -+ s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result); -+ -+ return "lcxbr"; -+} -+ -+static HChar * -+s390_irgen_LXDBR(UChar r1, UChar r2) -+{ -+ IRTemp op = newTemp(Ity_F64); -+ -+ assign(op, get_fpr_dw0(r2)); -+ put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op))); -+ -+ return "lxdbr"; -+} -+ -+static HChar * -+s390_irgen_LXEBR(UChar r1, UChar r2) -+{ -+ IRTemp op = newTemp(Ity_F32); -+ -+ assign(op, get_fpr_w0(r2)); -+ put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op))); -+ -+ return "lxebr"; -+} -+ -+static HChar * -+s390_irgen_LXDB(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op = newTemp(Ity_F64); -+ -+ assign(op, load(Ity_F64, mkexpr(op2addr))); -+ put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op))); -+ -+ return "lxdb"; -+} -+ -+static HChar * -+s390_irgen_LXEB(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op = newTemp(Ity_F32); -+ -+ assign(op, load(Ity_F32, mkexpr(op2addr))); -+ put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op))); -+ -+ return "lxeb"; -+} -+ -+static HChar * -+s390_irgen_LNEBR(UChar r1, UChar r2) -+{ -+ IRTemp result = newTemp(Ity_F32); -+ -+ assign(result, unop(Iop_NegF32, unop(Iop_AbsF32, get_fpr_w0(r2)))); -+ put_fpr_w0(r1, mkexpr(result)); -+ s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result); -+ -+ return "lnebr"; -+} -+ -+static HChar * -+s390_irgen_LNDBR(UChar r1, UChar r2) -+{ -+ IRTemp result = newTemp(Ity_F64); -+ -+ assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2)))); -+ put_fpr_dw0(r1, mkexpr(result)); -+ s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result); -+ -+ return "lndbr"; -+} -+ -+static HChar * -+s390_irgen_LNXBR(UChar r1, UChar r2) -+{ -+ IRTemp result = newTemp(Ity_F128); -+ -+ assign(result, unop(Iop_NegF128, unop(Iop_AbsF128, get_fpr_pair(r2)))); -+ put_fpr_pair(r1, mkexpr(result)); -+ s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result); -+ -+ return "lnxbr"; -+} -+ -+static HChar * -+s390_irgen_LPEBR(UChar r1, UChar r2) -+{ -+ IRTemp result = newTemp(Ity_F32); -+ -+ assign(result, unop(Iop_AbsF32, get_fpr_w0(r2))); -+ put_fpr_w0(r1, mkexpr(result)); -+ s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result); -+ -+ return "lpebr"; -+} -+ -+static HChar * -+s390_irgen_LPDBR(UChar r1, UChar r2) -+{ -+ IRTemp result = newTemp(Ity_F64); -+ -+ assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2))); -+ put_fpr_dw0(r1, mkexpr(result)); -+ s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result); -+ -+ return "lpdbr"; -+} -+ -+static HChar * -+s390_irgen_LPXBR(UChar r1, UChar r2) -+{ -+ IRTemp result = newTemp(Ity_F128); -+ -+ assign(result, unop(Iop_AbsF128, get_fpr_pair(r2))); -+ put_fpr_pair(r1, mkexpr(result)); -+ s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result); -+ -+ return "lpxbr"; -+} -+ -+static HChar * -+s390_irgen_LDXBR(UChar r1, UChar r2) -+{ -+ IRTemp result = newTemp(Ity_F64); -+ -+ assign(result, binop(Iop_F128toF64, mkU32(Irrm_NEAREST), get_fpr_pair(r2))); -+ put_fpr_dw0(r1, mkexpr(result)); -+ -+ return "ldxbr"; -+} -+ -+static HChar * -+s390_irgen_LEXBR(UChar r1, UChar r2) -+{ -+ IRTemp result = newTemp(Ity_F32); -+ -+ assign(result, binop(Iop_F128toF32, mkU32(Irrm_NEAREST), get_fpr_pair(r2))); -+ put_fpr_w0(r1, mkexpr(result)); -+ -+ return "lexbr"; -+} -+ -+static HChar * -+s390_irgen_MXBR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_F128); -+ IRTemp op2 = newTemp(Ity_F128); -+ IRTemp result = newTemp(Ity_F128); -+ -+ assign(op1, get_fpr_pair(r1)); -+ assign(op2, get_fpr_pair(r2)); -+ assign(result, triop(Iop_MulF128, mkU32(Irrm_NEAREST), mkexpr(op1), -+ mkexpr(op2))); -+ put_fpr_pair(r1, mkexpr(result)); -+ -+ return "mxbr"; -+} -+ -+static HChar * -+s390_irgen_MAEBR(UChar r1, UChar r3, UChar r2) -+{ -+ put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST), -+ get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3))); -+ -+ return "maebr"; -+} -+ -+static HChar * -+s390_irgen_MADBR(UChar r1, UChar r3, UChar r2) -+{ -+ put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST), -+ get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3))); -+ -+ return "madbr"; -+} -+ -+static HChar * -+s390_irgen_MAEB(UChar r3, IRTemp op2addr, UChar r1) -+{ -+ IRExpr *op2 = load(Ity_F32, mkexpr(op2addr)); -+ -+ put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST), -+ get_fpr_w0(r1), op2, get_fpr_w0(r3))); -+ -+ return "maeb"; -+} -+ -+static HChar * -+s390_irgen_MADB(UChar r3, IRTemp op2addr, UChar r1) -+{ -+ IRExpr *op2 = load(Ity_F64, mkexpr(op2addr)); -+ -+ put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST), -+ get_fpr_dw0(r1), op2, get_fpr_dw0(r3))); -+ -+ return "madb"; -+} -+ -+static HChar * -+s390_irgen_MSEBR(UChar r1, UChar r3, UChar r2) -+{ -+ put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST), -+ get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3))); -+ -+ return "msebr"; -+} -+ -+static HChar * -+s390_irgen_MSDBR(UChar r1, UChar r3, UChar r2) -+{ -+ put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST), -+ get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3))); -+ -+ return "msdbr"; -+} -+ -+static HChar * -+s390_irgen_MSEB(UChar r3, IRTemp op2addr, UChar r1) -+{ -+ IRExpr *op2 = load(Ity_F32, mkexpr(op2addr)); -+ -+ put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST), -+ get_fpr_w0(r1), op2, get_fpr_w0(r3))); -+ -+ return "mseb"; -+} -+ -+static HChar * -+s390_irgen_MSDB(UChar r3, IRTemp op2addr, UChar r1) -+{ -+ IRExpr *op2 = load(Ity_F64, mkexpr(op2addr)); -+ -+ put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST), -+ get_fpr_dw0(r1), op2, get_fpr_dw0(r3))); -+ -+ return "msdb"; -+} -+ -+static HChar * -+s390_irgen_SQEBR(UChar r1, UChar r2) -+{ -+ IRTemp result = newTemp(Ity_F32); -+ -+ assign(result, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), get_fpr_w0(r2))); -+ put_fpr_w0(r1, mkexpr(result)); -+ -+ return "sqebr"; -+} -+ -+static HChar * -+s390_irgen_SQDBR(UChar r1, UChar r2) -+{ -+ IRTemp result = newTemp(Ity_F64); -+ -+ assign(result, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), get_fpr_dw0(r2))); -+ put_fpr_dw0(r1, mkexpr(result)); -+ -+ return "sqdbr"; -+} -+ -+static HChar * -+s390_irgen_SQXBR(UChar r1, UChar r2) -+{ -+ IRTemp result = newTemp(Ity_F128); -+ -+ assign(result, binop(Iop_SqrtF128, mkU32(Irrm_NEAREST), get_fpr_pair(r2))); -+ put_fpr_pair(r1, mkexpr(result)); -+ -+ return "sqxbr"; -+} -+ -+static HChar * -+s390_irgen_SQEB(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op = newTemp(Ity_F32); -+ -+ assign(op, load(Ity_F32, mkexpr(op2addr))); -+ put_fpr_w0(r1, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), mkexpr(op))); -+ -+ return "sqeb"; -+} -+ -+static HChar * -+s390_irgen_SQDB(UChar r1, IRTemp op2addr) -+{ -+ IRTemp op = newTemp(Ity_F64); -+ -+ assign(op, load(Ity_F64, mkexpr(op2addr))); -+ put_fpr_dw0(r1, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), mkexpr(op))); -+ -+ return "sqdb"; -+} -+ -+static HChar * -+s390_irgen_SXBR(UChar r1, UChar r2) -+{ -+ IRTemp op1 = newTemp(Ity_F128); -+ IRTemp op2 = newTemp(Ity_F128); -+ IRTemp result = newTemp(Ity_F128); -+ -+ assign(op1, get_fpr_pair(r1)); -+ assign(op2, get_fpr_pair(r2)); -+ assign(result, triop(Iop_SubF128, mkU32(Irrm_NEAREST), mkexpr(op1), -+ mkexpr(op2))); -+ put_fpr_pair(r1, mkexpr(result)); -+ s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result); -+ -+ return "sxbr"; -+} -+ -+static HChar * -+s390_irgen_TCEB(UChar r1, IRTemp op2addr) -+{ -+ IRTemp value = newTemp(Ity_F32); -+ -+ assign(value, get_fpr_w0(r1)); -+ -+ s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_32, value, op2addr); -+ -+ return "tceb"; -+} -+ -+static HChar * -+s390_irgen_TCDB(UChar r1, IRTemp op2addr) -+{ -+ IRTemp value = newTemp(Ity_F64); -+ -+ assign(value, get_fpr_dw0(r1)); -+ -+ s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_64, value, op2addr); -+ -+ return "tcdb"; -+} -+ -+static HChar * -+s390_irgen_TCXB(UChar r1, IRTemp op2addr) -+{ -+ IRTemp value = newTemp(Ity_F128); -+ -+ assign(value, get_fpr_pair(r1)); -+ -+ s390_cc_thunk_put1f128Z(S390_CC_OP_BFP_TDC_128, value, op2addr); -+ -+ return "tcxb"; -+} -+ -+static HChar * -+s390_irgen_LCDFR(UChar r1, UChar r2) -+{ -+ IRTemp result = newTemp(Ity_F64); -+ -+ assign(result, unop(Iop_NegF64, get_fpr_dw0(r2))); -+ put_fpr_dw0(r1, mkexpr(result)); -+ -+ return "lcdfr"; -+} -+ -+static HChar * -+s390_irgen_LNDFR(UChar r1, UChar r2) -+{ -+ IRTemp result = newTemp(Ity_F64); -+ -+ assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2)))); -+ put_fpr_dw0(r1, mkexpr(result)); -+ -+ return "lndfr"; -+} -+ -+static HChar * -+s390_irgen_LPDFR(UChar r1, UChar r2) -+{ -+ IRTemp result = newTemp(Ity_F64); -+ -+ assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2))); -+ put_fpr_dw0(r1, mkexpr(result)); -+ -+ return "lpdfr"; -+} -+ -+static HChar * -+s390_irgen_LDGR(UChar r1, UChar r2) -+{ -+ put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, get_gpr_dw0(r2))); -+ -+ return "ldgr"; -+} -+ -+static HChar * -+s390_irgen_LGDR(UChar r1, UChar r2) -+{ -+ put_gpr_dw0(r1, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2))); -+ -+ return "lgdr"; -+} -+ -+ -+static HChar * -+s390_irgen_CPSDR(UChar r3, UChar r1, UChar r2) -+{ -+ IRTemp sign = newTemp(Ity_I64); -+ IRTemp value = newTemp(Ity_I64); -+ -+ assign(sign, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r3)), -+ mkU64(1ULL << 63))); -+ assign(value, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)), -+ mkU64((1ULL << 63) - 1))); -+ put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, binop(Iop_Or64, mkexpr(value), -+ mkexpr(sign)))); -+ -+ return "cpsdr"; -+} -+ -+ -+static UInt -+s390_do_cvb(ULong decimal) -+{ -+#if defined(VGA_s390x) -+ UInt binary; -+ -+ __asm__ volatile ( -+ "cvb %[result],%[input]\n\t" -+ : [result] "=d"(binary) -+ : [input] "m"(decimal) -+ ); -+ -+ return binary; -+#else -+ return 0; -+#endif -+} -+ -+static IRExpr * -+s390_call_cvb(IRExpr *in) -+{ -+ IRExpr **args, *call; -+ -+ args = mkIRExprVec_1(in); -+ call = mkIRExprCCall(Ity_I32, 0 /*regparm*/, -+ "s390_do_cvb", &s390_do_cvb, args); -+ -+ /* Nothing is excluded from definedness checking. */ -+ call->Iex.CCall.cee->mcx_mask = 0; -+ -+ return call; -+} -+ -+static HChar * -+s390_irgen_CVB(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr)))); -+ -+ return "cvb"; -+} -+ -+static HChar * -+s390_irgen_CVBY(UChar r1, IRTemp op2addr) -+{ -+ put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr)))); -+ -+ return "cvby"; -+} -+ -+ -+static ULong -+s390_do_cvd(ULong binary_in) -+{ -+#if defined(VGA_s390x) -+ UInt binary = binary_in & 0xffffffffULL; -+ ULong decimal; -+ -+ __asm__ volatile ( -+ "cvd %[input],%[result]\n\t" -+ : [result] "=m"(decimal) -+ : [input] "d"(binary) -+ ); -+ -+ return decimal; -+#else -+ return 0; -+#endif -+} -+ -+static IRExpr * -+s390_call_cvd(IRExpr *in) -+{ -+ IRExpr **args, *call; -+ -+ args = mkIRExprVec_1(in); -+ call = mkIRExprCCall(Ity_I64, 0 /*regparm*/, -+ "s390_do_cvd", &s390_do_cvd, args); -+ -+ /* Nothing is excluded from definedness checking. */ -+ call->Iex.CCall.cee->mcx_mask = 0; -+ -+ return call; -+} -+ -+static HChar * -+s390_irgen_CVD(UChar r1, IRTemp op2addr) -+{ -+ store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1))); -+ -+ return "cvd"; -+} -+ -+static HChar * -+s390_irgen_CVDY(UChar r1, IRTemp op2addr) -+{ -+ store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1))); -+ -+ return "cvdy"; -+} -+ -+static HChar * -+s390_irgen_FLOGR(UChar r1, UChar r2) -+{ -+ IRTemp input = newTemp(Ity_I64); -+ IRTemp not_zero = newTemp(Ity_I64); -+ IRTemp tmpnum = newTemp(Ity_I64); -+ IRTemp num = newTemp(Ity_I64); -+ IRTemp shift_amount = newTemp(Ity_I8); -+ -+ /* We use the "count leading zeroes" operator because the number of -+ leading zeroes is identical with the bit position of the first '1' bit. -+ However, that operator does not work when the input value is zero. -+ Therefore, we set the LSB of the input value to 1 and use Clz64 on -+ the modified value. If input == 0, then the result is 64. Otherwise, -+ the result of Clz64 is what we want. */ -+ -+ assign(input, get_gpr_dw0(r2)); -+ assign(not_zero, binop(Iop_Or64, mkexpr(input), mkU64(1))); -+ assign(tmpnum, unop(Iop_Clz64, mkexpr(not_zero))); -+ -+ /* num = (input == 0) ? 64 : tmpnum */ -+ assign(num, mkite(binop(Iop_CmpEQ64, mkexpr(input), mkU64(0)), -+ /* == 0 */ mkU64(64), -+ /* != 0 */ mkexpr(tmpnum))); -+ -+ put_gpr_dw0(r1, mkexpr(num)); -+ -+ /* Set the leftmost '1' bit of the input value to zero. The general scheme -+ is to first shift the input value by NUM + 1 bits to the left which -+ causes the leftmost '1' bit to disappear. Then we shift logically to -+ the right by NUM + 1 bits. Because the semantics of Iop_Shl64 and -+ Iop_Shr64 are undefined if the shift-amount is greater than or equal to -+ the width of the value-to-be-shifted, we need to special case -+ NUM + 1 >= 64. This is equivalent to INPUT != 0 && INPUT != 1. -+ For both such INPUT values the result will be 0. */ -+ -+ assign(shift_amount, unop(Iop_64to8, binop(Iop_Add64, mkexpr(num), -+ mkU64(1)))); -+ -+ put_gpr_dw0(r1 + 1, -+ mkite(binop(Iop_CmpLE64U, mkexpr(input), mkU64(1)), -+ /* == 0 || == 1*/ mkU64(0), -+ /* otherwise */ -+ binop(Iop_Shr64, -+ binop(Iop_Shl64, mkexpr(input), -+ mkexpr(shift_amount)), -+ mkexpr(shift_amount)))); -+ -+ /* Compare the original value as an unsigned integer with 0. */ -+ s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, input, -+ mktemp(Ity_I64, mkU64(0)), False); -+ -+ return "flogr"; -+} -+ -+/*------------------------------------------------------------*/ -+/*--- Build IR for special instructions ---*/ -+/*------------------------------------------------------------*/ -+ -+void -+s390_irgen_client_request(void) -+{ -+ if (0) -+ vex_printf("%%R3 = client_request ( %%R2 )\n"); -+ -+ irsb->next = mkU64((ULong)(guest_IA_curr_instr -+ + S390_SPECIAL_OP_PREAMBLE_SIZE -+ + S390_SPECIAL_OP_SIZE)); -+ irsb->jumpkind = Ijk_ClientReq; -+ -+ dis_res->whatNext = Dis_StopHere; -+} -+ -+void -+s390_irgen_guest_NRADDR(void) -+{ -+ if (0) -+ vex_printf("%%R3 = guest_NRADDR\n"); -+ -+ put_gpr_dw0(3, IRExpr_Get(S390_GUEST_OFFSET(guest_NRADDR), Ity_I64)); -+} -+ -+void -+s390_irgen_call_noredir(void) -+{ -+ /* Continue after special op */ -+ put_gpr_dw0(14, mkU64(guest_IA_curr_instr -+ + S390_SPECIAL_OP_PREAMBLE_SIZE -+ + S390_SPECIAL_OP_SIZE)); -+ -+ /* The address is in REG1, all parameters are in the right (guest) places */ -+ irsb->next = get_gpr_dw0(1); -+ irsb->jumpkind = Ijk_NoRedir; -+ -+ dis_res->whatNext = Dis_StopHere; -+} -+ -+/* Force proper alignment for the structures below. */ -+#pragma pack(1) -+ -+ -+static s390_decode_t -+s390_decode_2byte_and_irgen(UChar *bytes) -+{ -+ typedef union { -+ struct { -+ unsigned int op : 16; -+ } E; -+ struct { -+ unsigned int op : 8; -+ unsigned int i : 8; -+ } I; -+ struct { -+ unsigned int op : 8; -+ unsigned int r1 : 4; -+ unsigned int r2 : 4; -+ } RR; -+ } formats; -+ union { -+ formats fmt; -+ UShort value; -+ } ovl; -+ -+ vassert(sizeof(formats) == 2); -+ -+ ((char *)(&ovl.value))[0] = bytes[0]; -+ ((char *)(&ovl.value))[1] = bytes[1]; -+ -+ switch (ovl.value & 0xffff) { -+ case 0x0101: /* PR */ goto unimplemented; -+ case 0x0102: /* UPT */ goto unimplemented; -+ case 0x0104: /* PTFF */ goto unimplemented; -+ case 0x0107: /* SCKPF */ goto unimplemented; -+ case 0x010a: /* PFPO */ goto unimplemented; -+ case 0x010b: /* TAM */ goto unimplemented; -+ case 0x010c: /* SAM24 */ goto unimplemented; -+ case 0x010d: /* SAM31 */ goto unimplemented; -+ case 0x010e: /* SAM64 */ goto unimplemented; -+ case 0x01ff: /* TRAP2 */ goto unimplemented; -+ } -+ -+ switch ((ovl.value & 0xff00) >> 8) { -+ case 0x04: /* SPM */ goto unimplemented; -+ case 0x05: /* BALR */ goto unimplemented; -+ case 0x06: s390_format_RR_RR(s390_irgen_BCTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); -+ goto ok; -+ case 0x07: s390_format_RR(s390_irgen_BCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); -+ goto ok; -+ case 0x0a: s390_format_I(s390_irgen_SVC, ovl.fmt.I.i); goto ok; -+ case 0x0b: /* BSM */ goto unimplemented; -+ case 0x0c: /* BASSM */ goto unimplemented; -+ case 0x0d: s390_format_RR_RR(s390_irgen_BASR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); -+ goto ok; -+ case 0x0e: /* MVCL */ goto unimplemented; -+ case 0x0f: /* CLCL */ goto unimplemented; -+ case 0x10: s390_format_RR_RR(s390_irgen_LPR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); -+ goto ok; -+ case 0x11: s390_format_RR_RR(s390_irgen_LNR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); -+ goto ok; -+ case 0x12: s390_format_RR_RR(s390_irgen_LTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); -+ goto ok; -+ case 0x13: s390_format_RR_RR(s390_irgen_LCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); -+ goto ok; -+ case 0x14: s390_format_RR_RR(s390_irgen_NR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); -+ goto ok; -+ case 0x15: s390_format_RR_RR(s390_irgen_CLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); -+ goto ok; -+ case 0x16: s390_format_RR_RR(s390_irgen_OR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); -+ goto ok; -+ case 0x17: s390_format_RR_RR(s390_irgen_XR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); -+ goto ok; -+ case 0x18: s390_format_RR_RR(s390_irgen_LR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); -+ goto ok; -+ case 0x19: s390_format_RR_RR(s390_irgen_CR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); -+ goto ok; -+ case 0x1a: s390_format_RR_RR(s390_irgen_AR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); -+ goto ok; -+ case 0x1b: s390_format_RR_RR(s390_irgen_SR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); -+ goto ok; -+ case 0x1c: s390_format_RR_RR(s390_irgen_MR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); -+ goto ok; -+ case 0x1d: s390_format_RR_RR(s390_irgen_DR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); -+ goto ok; -+ case 0x1e: s390_format_RR_RR(s390_irgen_ALR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); -+ goto ok; -+ case 0x1f: s390_format_RR_RR(s390_irgen_SLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); -+ goto ok; -+ case 0x20: /* LPDR */ goto unimplemented; -+ case 0x21: /* LNDR */ goto unimplemented; -+ case 0x22: /* LTDR */ goto unimplemented; -+ case 0x23: /* LCDR */ goto unimplemented; -+ case 0x24: /* HDR */ goto unimplemented; -+ case 0x25: /* LDXR */ goto unimplemented; -+ case 0x26: /* MXR */ goto unimplemented; -+ case 0x27: /* MXDR */ goto unimplemented; -+ case 0x28: s390_format_RR_FF(s390_irgen_LDR, ovl.fmt.RR.r1, ovl.fmt.RR.r2); -+ goto ok; -+ case 0x29: /* CDR */ goto unimplemented; -+ case 0x2a: /* ADR */ goto unimplemented; -+ case 0x2b: /* SDR */ goto unimplemented; -+ case 0x2c: /* MDR */ goto unimplemented; -+ case 0x2d: /* DDR */ goto unimplemented; -+ case 0x2e: /* AWR */ goto unimplemented; -+ case 0x2f: /* SWR */ goto unimplemented; -+ case 0x30: /* LPER */ goto unimplemented; -+ case 0x31: /* LNER */ goto unimplemented; -+ case 0x32: /* LTER */ goto unimplemented; -+ case 0x33: /* LCER */ goto unimplemented; -+ case 0x34: /* HER */ goto unimplemented; -+ case 0x35: /* LEDR */ goto unimplemented; -+ case 0x36: /* AXR */ goto unimplemented; -+ case 0x37: /* SXR */ goto unimplemented; -+ case 0x38: s390_format_RR_FF(s390_irgen_LER, ovl.fmt.RR.r1, ovl.fmt.RR.r2); -+ goto ok; -+ case 0x39: /* CER */ goto unimplemented; -+ case 0x3a: /* AER */ goto unimplemented; -+ case 0x3b: /* SER */ goto unimplemented; -+ case 0x3c: /* MDER */ goto unimplemented; -+ case 0x3d: /* DER */ goto unimplemented; -+ case 0x3e: /* AUR */ goto unimplemented; -+ case 0x3f: /* SUR */ goto unimplemented; -+ } -+ -+ return S390_DECODE_UNKNOWN_INSN; -+ -+ok: -+ return S390_DECODE_OK; -+ -+unimplemented: -+ return S390_DECODE_UNIMPLEMENTED_INSN; -+} -+ -+static s390_decode_t -+s390_decode_4byte_and_irgen(UChar *bytes) -+{ -+ typedef union { -+ struct { -+ unsigned int op1 : 8; -+ unsigned int r1 : 4; -+ unsigned int op2 : 4; -+ unsigned int i2 : 16; -+ } RI; -+ struct { -+ unsigned int op : 16; -+ unsigned int : 8; -+ unsigned int r1 : 4; -+ unsigned int r2 : 4; -+ } RRE; -+ struct { -+ unsigned int op : 16; -+ unsigned int r1 : 4; -+ unsigned int : 4; -+ unsigned int r3 : 4; -+ unsigned int r2 : 4; -+ } RRF; -+ struct { -+ unsigned int op : 16; -+ unsigned int r3 : 4; -+ unsigned int m4 : 4; -+ unsigned int r1 : 4; -+ unsigned int r2 : 4; -+ } RRF2; -+ struct { -+ unsigned int op : 16; -+ unsigned int r3 : 4; -+ unsigned int : 4; -+ unsigned int r1 : 4; -+ unsigned int r2 : 4; -+ } RRF3; -+ struct { -+ unsigned int op : 16; -+ unsigned int r3 : 4; -+ unsigned int : 4; -+ unsigned int r1 : 4; -+ unsigned int r2 : 4; -+ } RRR; -+ struct { -+ unsigned int op : 16; -+ unsigned int r3 : 4; -+ unsigned int : 4; -+ unsigned int r1 : 4; -+ unsigned int r2 : 4; -+ } RRF4; -+ struct { -+ unsigned int op : 8; -+ unsigned int r1 : 4; -+ unsigned int r3 : 4; -+ unsigned int b2 : 4; -+ unsigned int d2 : 12; -+ } RS; -+ struct { -+ unsigned int op : 8; -+ unsigned int r1 : 4; -+ unsigned int r3 : 4; -+ unsigned int i2 : 16; -+ } RSI; -+ struct { -+ unsigned int op : 8; -+ unsigned int r1 : 4; -+ unsigned int x2 : 4; -+ unsigned int b2 : 4; -+ unsigned int d2 : 12; -+ } RX; -+ struct { -+ unsigned int op : 16; -+ unsigned int b2 : 4; -+ unsigned int d2 : 12; -+ } S; -+ struct { -+ unsigned int op : 8; -+ unsigned int i2 : 8; -+ unsigned int b1 : 4; -+ unsigned int d1 : 12; -+ } SI; -+ } formats; -+ union { -+ formats fmt; -+ UInt value; -+ } ovl; -+ -+ vassert(sizeof(formats) == 4); -+ -+ ((char *)(&ovl.value))[0] = bytes[0]; -+ ((char *)(&ovl.value))[1] = bytes[1]; -+ ((char *)(&ovl.value))[2] = bytes[2]; -+ ((char *)(&ovl.value))[3] = bytes[3]; -+ -+ switch ((ovl.value & 0xff0f0000) >> 16) { -+ case 0xa500: s390_format_RI_RU(s390_irgen_IIHH, ovl.fmt.RI.r1, -+ ovl.fmt.RI.i2); goto ok; -+ case 0xa501: s390_format_RI_RU(s390_irgen_IIHL, ovl.fmt.RI.r1, -+ ovl.fmt.RI.i2); goto ok; -+ case 0xa502: s390_format_RI_RU(s390_irgen_IILH, ovl.fmt.RI.r1, -+ ovl.fmt.RI.i2); goto ok; -+ case 0xa503: s390_format_RI_RU(s390_irgen_IILL, ovl.fmt.RI.r1, -+ ovl.fmt.RI.i2); goto ok; -+ case 0xa504: s390_format_RI_RU(s390_irgen_NIHH, ovl.fmt.RI.r1, -+ ovl.fmt.RI.i2); goto ok; -+ case 0xa505: s390_format_RI_RU(s390_irgen_NIHL, ovl.fmt.RI.r1, -+ ovl.fmt.RI.i2); goto ok; -+ case 0xa506: s390_format_RI_RU(s390_irgen_NILH, ovl.fmt.RI.r1, -+ ovl.fmt.RI.i2); goto ok; -+ case 0xa507: s390_format_RI_RU(s390_irgen_NILL, ovl.fmt.RI.r1, -+ ovl.fmt.RI.i2); goto ok; -+ case 0xa508: s390_format_RI_RU(s390_irgen_OIHH, ovl.fmt.RI.r1, -+ ovl.fmt.RI.i2); goto ok; -+ case 0xa509: s390_format_RI_RU(s390_irgen_OIHL, ovl.fmt.RI.r1, -+ ovl.fmt.RI.i2); goto ok; -+ case 0xa50a: s390_format_RI_RU(s390_irgen_OILH, ovl.fmt.RI.r1, -+ ovl.fmt.RI.i2); goto ok; -+ case 0xa50b: s390_format_RI_RU(s390_irgen_OILL, ovl.fmt.RI.r1, -+ ovl.fmt.RI.i2); goto ok; -+ case 0xa50c: s390_format_RI_RU(s390_irgen_LLIHH, ovl.fmt.RI.r1, -+ ovl.fmt.RI.i2); goto ok; -+ case 0xa50d: s390_format_RI_RU(s390_irgen_LLIHL, ovl.fmt.RI.r1, -+ ovl.fmt.RI.i2); goto ok; -+ case 0xa50e: s390_format_RI_RU(s390_irgen_LLILH, ovl.fmt.RI.r1, -+ ovl.fmt.RI.i2); goto ok; -+ case 0xa50f: s390_format_RI_RU(s390_irgen_LLILL, ovl.fmt.RI.r1, -+ ovl.fmt.RI.i2); goto ok; -+ case 0xa700: s390_format_RI_RU(s390_irgen_TMLH, ovl.fmt.RI.r1, -+ ovl.fmt.RI.i2); goto ok; -+ case 0xa701: s390_format_RI_RU(s390_irgen_TMLL, ovl.fmt.RI.r1, -+ ovl.fmt.RI.i2); goto ok; -+ case 0xa702: s390_format_RI_RU(s390_irgen_TMHH, ovl.fmt.RI.r1, -+ ovl.fmt.RI.i2); goto ok; -+ case 0xa703: s390_format_RI_RU(s390_irgen_TMHL, ovl.fmt.RI.r1, -+ ovl.fmt.RI.i2); goto ok; -+ case 0xa704: s390_format_RI(s390_irgen_BRC, ovl.fmt.RI.r1, ovl.fmt.RI.i2); -+ goto ok; -+ case 0xa705: s390_format_RI_RP(s390_irgen_BRAS, ovl.fmt.RI.r1, -+ ovl.fmt.RI.i2); goto ok; -+ case 0xa706: s390_format_RI_RP(s390_irgen_BRCT, ovl.fmt.RI.r1, -+ ovl.fmt.RI.i2); goto ok; -+ case 0xa707: s390_format_RI_RP(s390_irgen_BRCTG, ovl.fmt.RI.r1, -+ ovl.fmt.RI.i2); goto ok; -+ case 0xa708: s390_format_RI_RI(s390_irgen_LHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2); -+ goto ok; -+ case 0xa709: s390_format_RI_RI(s390_irgen_LGHI, ovl.fmt.RI.r1, -+ ovl.fmt.RI.i2); goto ok; -+ case 0xa70a: s390_format_RI_RI(s390_irgen_AHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2); -+ goto ok; -+ case 0xa70b: s390_format_RI_RI(s390_irgen_AGHI, ovl.fmt.RI.r1, -+ ovl.fmt.RI.i2); goto ok; -+ case 0xa70c: s390_format_RI_RI(s390_irgen_MHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2); -+ goto ok; -+ case 0xa70d: s390_format_RI_RI(s390_irgen_MGHI, ovl.fmt.RI.r1, -+ ovl.fmt.RI.i2); goto ok; -+ case 0xa70e: s390_format_RI_RI(s390_irgen_CHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2); -+ goto ok; -+ case 0xa70f: s390_format_RI_RI(s390_irgen_CGHI, ovl.fmt.RI.r1, -+ ovl.fmt.RI.i2); goto ok; -+ } -+ -+ switch ((ovl.value & 0xffff0000) >> 16) { -+ case 0x8000: /* SSM */ goto unimplemented; -+ case 0x8200: /* LPSW */ goto unimplemented; -+ case 0x9300: s390_format_S_RD(s390_irgen_TS, ovl.fmt.S.b2, ovl.fmt.S.d2); -+ goto ok; -+ case 0xb202: /* STIDP */ goto unimplemented; -+ case 0xb204: /* SCK */ goto unimplemented; -+ case 0xb205: /* STCK */ goto unimplemented; -+ case 0xb206: /* SCKC */ goto unimplemented; -+ case 0xb207: /* STCKC */ goto unimplemented; -+ case 0xb208: /* SPT */ goto unimplemented; -+ case 0xb209: /* STPT */ goto unimplemented; -+ case 0xb20a: /* SPKA */ goto unimplemented; -+ case 0xb20b: /* IPK */ goto unimplemented; -+ case 0xb20d: /* PTLB */ goto unimplemented; -+ case 0xb210: /* SPX */ goto unimplemented; -+ case 0xb211: /* STPX */ goto unimplemented; -+ case 0xb212: /* STAP */ goto unimplemented; -+ case 0xb214: /* SIE */ goto unimplemented; -+ case 0xb218: /* PC */ goto unimplemented; -+ case 0xb219: /* SAC */ goto unimplemented; -+ case 0xb21a: /* CFC */ goto unimplemented; -+ case 0xb221: /* IPTE */ goto unimplemented; -+ case 0xb222: s390_format_RRE_R0(s390_irgen_IPM, ovl.fmt.RRE.r1); goto ok; -+ case 0xb223: /* IVSK */ goto unimplemented; -+ case 0xb224: /* IAC */ goto unimplemented; -+ case 0xb225: /* SSAR */ goto unimplemented; -+ case 0xb226: /* EPAR */ goto unimplemented; -+ case 0xb227: /* ESAR */ goto unimplemented; -+ case 0xb228: /* PT */ goto unimplemented; -+ case 0xb229: /* ISKE */ goto unimplemented; -+ case 0xb22a: /* RRBE */ goto unimplemented; -+ case 0xb22b: /* SSKE */ goto unimplemented; -+ case 0xb22c: /* TB */ goto unimplemented; -+ case 0xb22d: /* DXR */ goto unimplemented; -+ case 0xb22e: /* PGIN */ goto unimplemented; -+ case 0xb22f: /* PGOUT */ goto unimplemented; -+ case 0xb230: /* CSCH */ goto unimplemented; -+ case 0xb231: /* HSCH */ goto unimplemented; -+ case 0xb232: /* MSCH */ goto unimplemented; -+ case 0xb233: /* SSCH */ goto unimplemented; -+ case 0xb234: /* STSCH */ goto unimplemented; -+ case 0xb235: /* TSCH */ goto unimplemented; -+ case 0xb236: /* TPI */ goto unimplemented; -+ case 0xb237: /* SAL */ goto unimplemented; -+ case 0xb238: /* RSCH */ goto unimplemented; -+ case 0xb239: /* STCRW */ goto unimplemented; -+ case 0xb23a: /* STCPS */ goto unimplemented; -+ case 0xb23b: /* RCHP */ goto unimplemented; -+ case 0xb23c: /* SCHM */ goto unimplemented; -+ case 0xb240: /* BAKR */ goto unimplemented; -+ case 0xb241: /* CKSM */ goto unimplemented; -+ case 0xb244: /* SQDR */ goto unimplemented; -+ case 0xb245: /* SQER */ goto unimplemented; -+ case 0xb246: /* STURA */ goto unimplemented; -+ case 0xb247: /* MSTA */ goto unimplemented; -+ case 0xb248: /* PALB */ goto unimplemented; -+ case 0xb249: /* EREG */ goto unimplemented; -+ case 0xb24a: /* ESTA */ goto unimplemented; -+ case 0xb24b: /* LURA */ goto unimplemented; -+ case 0xb24c: /* TAR */ goto unimplemented; -+ case 0xb24d: s390_format_RRE(s390_irgen_CPYA, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb24e: s390_format_RRE(s390_irgen_SAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2); -+ goto ok; -+ case 0xb24f: s390_format_RRE(s390_irgen_EAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2); -+ goto ok; -+ case 0xb250: /* CSP */ goto unimplemented; -+ case 0xb252: s390_format_RRE_RR(s390_irgen_MSR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb254: /* MVPG */ goto unimplemented; -+ case 0xb255: s390_format_RRE_RR(s390_irgen_MVST, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb257: /* CUSE */ goto unimplemented; -+ case 0xb258: /* BSG */ goto unimplemented; -+ case 0xb25a: /* BSA */ goto unimplemented; -+ case 0xb25d: s390_format_RRE_RR(s390_irgen_CLST, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb25e: s390_format_RRE_RR(s390_irgen_SRST, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb263: /* CMPSC */ goto unimplemented; -+ case 0xb274: /* SIGA */ goto unimplemented; -+ case 0xb276: /* XSCH */ goto unimplemented; -+ case 0xb277: /* RP */ goto unimplemented; -+ case 0xb278: /* STCKE */ goto unimplemented; -+ case 0xb279: /* SACF */ goto unimplemented; -+ case 0xb27c: /* STCKF */ goto unimplemented; -+ case 0xb27d: /* STSI */ goto unimplemented; -+ case 0xb299: s390_format_S_RD(s390_irgen_SRNM, ovl.fmt.S.b2, ovl.fmt.S.d2); -+ goto ok; -+ case 0xb29c: s390_format_S_RD(s390_irgen_STFPC, ovl.fmt.S.b2, ovl.fmt.S.d2); -+ goto ok; -+ case 0xb29d: s390_format_S_RD(s390_irgen_LFPC, ovl.fmt.S.b2, ovl.fmt.S.d2); -+ goto ok; -+ case 0xb2a5: /* TRE */ goto unimplemented; -+ case 0xb2a6: /* CU21 */ goto unimplemented; -+ case 0xb2a7: /* CU12 */ goto unimplemented; -+ case 0xb2b0: /* STFLE */ goto unimplemented; -+ case 0xb2b1: /* STFL */ goto unimplemented; -+ case 0xb2b2: /* LPSWE */ goto unimplemented; -+ case 0xb2b8: /* SRNMB */ goto unimplemented; -+ case 0xb2b9: /* SRNMT */ goto unimplemented; -+ case 0xb2bd: /* LFAS */ goto unimplemented; -+ case 0xb2ff: /* TRAP4 */ goto unimplemented; -+ case 0xb300: s390_format_RRE_FF(s390_irgen_LPEBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb301: s390_format_RRE_FF(s390_irgen_LNEBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb302: s390_format_RRE_FF(s390_irgen_LTEBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb303: s390_format_RRE_FF(s390_irgen_LCEBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb304: s390_format_RRE_FF(s390_irgen_LDEBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb305: s390_format_RRE_FF(s390_irgen_LXDBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb306: s390_format_RRE_FF(s390_irgen_LXEBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb307: /* MXDBR */ goto unimplemented; -+ case 0xb308: /* KEBR */ goto unimplemented; -+ case 0xb309: s390_format_RRE_FF(s390_irgen_CEBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb30a: s390_format_RRE_FF(s390_irgen_AEBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb30b: s390_format_RRE_FF(s390_irgen_SEBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb30c: /* MDEBR */ goto unimplemented; -+ case 0xb30d: s390_format_RRE_FF(s390_irgen_DEBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb30e: s390_format_RRF_F0FF(s390_irgen_MAEBR, ovl.fmt.RRF.r1, -+ ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok; -+ case 0xb30f: s390_format_RRF_F0FF(s390_irgen_MSEBR, ovl.fmt.RRF.r1, -+ ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok; -+ case 0xb310: s390_format_RRE_FF(s390_irgen_LPDBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb311: s390_format_RRE_FF(s390_irgen_LNDBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb312: s390_format_RRE_FF(s390_irgen_LTDBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb313: s390_format_RRE_FF(s390_irgen_LCDBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb314: s390_format_RRE_FF(s390_irgen_SQEBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb315: s390_format_RRE_FF(s390_irgen_SQDBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb316: s390_format_RRE_FF(s390_irgen_SQXBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb317: s390_format_RRE_FF(s390_irgen_MEEBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb318: /* KDBR */ goto unimplemented; -+ case 0xb319: s390_format_RRE_FF(s390_irgen_CDBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb31a: s390_format_RRE_FF(s390_irgen_ADBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb31b: s390_format_RRE_FF(s390_irgen_SDBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb31c: s390_format_RRE_FF(s390_irgen_MDBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb31d: s390_format_RRE_FF(s390_irgen_DDBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb31e: s390_format_RRF_F0FF(s390_irgen_MADBR, ovl.fmt.RRF.r1, -+ ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok; -+ case 0xb31f: s390_format_RRF_F0FF(s390_irgen_MSDBR, ovl.fmt.RRF.r1, -+ ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok; -+ case 0xb324: /* LDER */ goto unimplemented; -+ case 0xb325: /* LXDR */ goto unimplemented; -+ case 0xb326: /* LXER */ goto unimplemented; -+ case 0xb32e: /* MAER */ goto unimplemented; -+ case 0xb32f: /* MSER */ goto unimplemented; -+ case 0xb336: /* SQXR */ goto unimplemented; -+ case 0xb337: /* MEER */ goto unimplemented; -+ case 0xb338: /* MAYLR */ goto unimplemented; -+ case 0xb339: /* MYLR */ goto unimplemented; -+ case 0xb33a: /* MAYR */ goto unimplemented; -+ case 0xb33b: /* MYR */ goto unimplemented; -+ case 0xb33c: /* MAYHR */ goto unimplemented; -+ case 0xb33d: /* MYHR */ goto unimplemented; -+ case 0xb33e: /* MADR */ goto unimplemented; -+ case 0xb33f: /* MSDR */ goto unimplemented; -+ case 0xb340: s390_format_RRE_FF(s390_irgen_LPXBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb341: s390_format_RRE_FF(s390_irgen_LNXBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb342: s390_format_RRE_FF(s390_irgen_LTXBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb343: s390_format_RRE_FF(s390_irgen_LCXBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb344: s390_format_RRE_FF(s390_irgen_LEDBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb345: s390_format_RRE_FF(s390_irgen_LDXBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb346: s390_format_RRE_FF(s390_irgen_LEXBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb347: /* FIXBR */ goto unimplemented; -+ case 0xb348: /* KXBR */ goto unimplemented; -+ case 0xb349: s390_format_RRE_FF(s390_irgen_CXBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb34a: s390_format_RRE_FF(s390_irgen_AXBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb34b: s390_format_RRE_FF(s390_irgen_SXBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb34c: s390_format_RRE_FF(s390_irgen_MXBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb34d: s390_format_RRE_FF(s390_irgen_DXBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb350: /* TBEDR */ goto unimplemented; -+ case 0xb351: /* TBDR */ goto unimplemented; -+ case 0xb353: /* DIEBR */ goto unimplemented; -+ case 0xb357: /* FIEBR */ goto unimplemented; -+ case 0xb358: /* THDER */ goto unimplemented; -+ case 0xb359: /* THDR */ goto unimplemented; -+ case 0xb35b: /* DIDBR */ goto unimplemented; -+ case 0xb35f: /* FIDBR */ goto unimplemented; -+ case 0xb360: /* LPXR */ goto unimplemented; -+ case 0xb361: /* LNXR */ goto unimplemented; -+ case 0xb362: /* LTXR */ goto unimplemented; -+ case 0xb363: /* LCXR */ goto unimplemented; -+ case 0xb365: s390_format_RRE_FF(s390_irgen_LXR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb366: /* LEXR */ goto unimplemented; -+ case 0xb367: /* FIXR */ goto unimplemented; -+ case 0xb369: /* CXR */ goto unimplemented; -+ case 0xb370: s390_format_RRE_FF(s390_irgen_LPDFR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb371: s390_format_RRE_FF(s390_irgen_LNDFR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb372: s390_format_RRF_F0FF2(s390_irgen_CPSDR, ovl.fmt.RRF3.r3, -+ ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); -+ goto ok; -+ case 0xb373: s390_format_RRE_FF(s390_irgen_LCDFR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb374: s390_format_RRE_F0(s390_irgen_LZER, ovl.fmt.RRE.r1); goto ok; -+ case 0xb375: s390_format_RRE_F0(s390_irgen_LZDR, ovl.fmt.RRE.r1); goto ok; -+ case 0xb376: s390_format_RRE_F0(s390_irgen_LZXR, ovl.fmt.RRE.r1); goto ok; -+ case 0xb377: /* FIER */ goto unimplemented; -+ case 0xb37f: /* FIDR */ goto unimplemented; -+ case 0xb384: s390_format_RRE_R0(s390_irgen_SFPC, ovl.fmt.RRE.r1); goto ok; -+ case 0xb385: /* SFASR */ goto unimplemented; -+ case 0xb38c: s390_format_RRE_R0(s390_irgen_EFPC, ovl.fmt.RRE.r1); goto ok; -+ case 0xb390: /* CELFBR */ goto unimplemented; -+ case 0xb391: /* CDLFBR */ goto unimplemented; -+ case 0xb392: /* CXLFBR */ goto unimplemented; -+ case 0xb394: s390_format_RRE_FR(s390_irgen_CEFBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb395: s390_format_RRE_FR(s390_irgen_CDFBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb396: s390_format_RRE_FR(s390_irgen_CXFBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb398: s390_format_RRF_U0RF(s390_irgen_CFEBR, ovl.fmt.RRF3.r3, -+ ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); -+ goto ok; -+ case 0xb399: s390_format_RRF_U0RF(s390_irgen_CFDBR, ovl.fmt.RRF3.r3, -+ ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); -+ goto ok; -+ case 0xb39a: s390_format_RRF_U0RF(s390_irgen_CFXBR, ovl.fmt.RRF3.r3, -+ ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); -+ goto ok; -+ case 0xb3a0: /* CELGBR */ goto unimplemented; -+ case 0xb3a1: /* CDLGBR */ goto unimplemented; -+ case 0xb3a2: /* CXLGBR */ goto unimplemented; -+ case 0xb3a4: s390_format_RRE_FR(s390_irgen_CEGBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb3a5: s390_format_RRE_FR(s390_irgen_CDGBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb3a6: s390_format_RRE_FR(s390_irgen_CXGBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb3a8: s390_format_RRF_U0RF(s390_irgen_CGEBR, ovl.fmt.RRF3.r3, -+ ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); -+ goto ok; -+ case 0xb3a9: s390_format_RRF_U0RF(s390_irgen_CGDBR, ovl.fmt.RRF3.r3, -+ ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); -+ goto ok; -+ case 0xb3aa: s390_format_RRF_U0RF(s390_irgen_CGXBR, ovl.fmt.RRF3.r3, -+ ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2); -+ goto ok; -+ case 0xb3b4: /* CEFR */ goto unimplemented; -+ case 0xb3b5: /* CDFR */ goto unimplemented; -+ case 0xb3b6: /* CXFR */ goto unimplemented; -+ case 0xb3b8: /* CFER */ goto unimplemented; -+ case 0xb3b9: /* CFDR */ goto unimplemented; -+ case 0xb3ba: /* CFXR */ goto unimplemented; -+ case 0xb3c1: s390_format_RRE_FR(s390_irgen_LDGR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb3c4: /* CEGR */ goto unimplemented; -+ case 0xb3c5: /* CDGR */ goto unimplemented; -+ case 0xb3c6: /* CXGR */ goto unimplemented; -+ case 0xb3c8: /* CGER */ goto unimplemented; -+ case 0xb3c9: /* CGDR */ goto unimplemented; -+ case 0xb3ca: /* CGXR */ goto unimplemented; -+ case 0xb3cd: s390_format_RRE_RF(s390_irgen_LGDR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb3d0: /* MDTR */ goto unimplemented; -+ case 0xb3d1: /* DDTR */ goto unimplemented; -+ case 0xb3d2: /* ADTR */ goto unimplemented; -+ case 0xb3d3: /* SDTR */ goto unimplemented; -+ case 0xb3d4: /* LDETR */ goto unimplemented; -+ case 0xb3d5: /* LEDTR */ goto unimplemented; -+ case 0xb3d6: /* LTDTR */ goto unimplemented; -+ case 0xb3d7: /* FIDTR */ goto unimplemented; -+ case 0xb3d8: /* MXTR */ goto unimplemented; -+ case 0xb3d9: /* DXTR */ goto unimplemented; -+ case 0xb3da: /* AXTR */ goto unimplemented; -+ case 0xb3db: /* SXTR */ goto unimplemented; -+ case 0xb3dc: /* LXDTR */ goto unimplemented; -+ case 0xb3dd: /* LDXTR */ goto unimplemented; -+ case 0xb3de: /* LTXTR */ goto unimplemented; -+ case 0xb3df: /* FIXTR */ goto unimplemented; -+ case 0xb3e0: /* KDTR */ goto unimplemented; -+ case 0xb3e1: /* CGDTR */ goto unimplemented; -+ case 0xb3e2: /* CUDTR */ goto unimplemented; -+ case 0xb3e3: /* CSDTR */ goto unimplemented; -+ case 0xb3e4: /* CDTR */ goto unimplemented; -+ case 0xb3e5: /* EEDTR */ goto unimplemented; -+ case 0xb3e7: /* ESDTR */ goto unimplemented; -+ case 0xb3e8: /* KXTR */ goto unimplemented; -+ case 0xb3e9: /* CGXTR */ goto unimplemented; -+ case 0xb3ea: /* CUXTR */ goto unimplemented; -+ case 0xb3eb: /* CSXTR */ goto unimplemented; -+ case 0xb3ec: /* CXTR */ goto unimplemented; -+ case 0xb3ed: /* EEXTR */ goto unimplemented; -+ case 0xb3ef: /* ESXTR */ goto unimplemented; -+ case 0xb3f1: /* CDGTR */ goto unimplemented; -+ case 0xb3f2: /* CDUTR */ goto unimplemented; -+ case 0xb3f3: /* CDSTR */ goto unimplemented; -+ case 0xb3f4: /* CEDTR */ goto unimplemented; -+ case 0xb3f5: /* QADTR */ goto unimplemented; -+ case 0xb3f6: /* IEDTR */ goto unimplemented; -+ case 0xb3f7: /* RRDTR */ goto unimplemented; -+ case 0xb3f9: /* CXGTR */ goto unimplemented; -+ case 0xb3fa: /* CXUTR */ goto unimplemented; -+ case 0xb3fb: /* CXSTR */ goto unimplemented; -+ case 0xb3fc: /* CEXTR */ goto unimplemented; -+ case 0xb3fd: /* QAXTR */ goto unimplemented; -+ case 0xb3fe: /* IEXTR */ goto unimplemented; -+ case 0xb3ff: /* RRXTR */ goto unimplemented; -+ case 0xb900: s390_format_RRE_RR(s390_irgen_LPGR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb901: s390_format_RRE_RR(s390_irgen_LNGR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb902: s390_format_RRE_RR(s390_irgen_LTGR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb903: s390_format_RRE_RR(s390_irgen_LCGR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb904: s390_format_RRE_RR(s390_irgen_LGR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb905: /* LURAG */ goto unimplemented; -+ case 0xb906: s390_format_RRE_RR(s390_irgen_LGBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb907: s390_format_RRE_RR(s390_irgen_LGHR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb908: s390_format_RRE_RR(s390_irgen_AGR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb909: s390_format_RRE_RR(s390_irgen_SGR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb90a: s390_format_RRE_RR(s390_irgen_ALGR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb90b: s390_format_RRE_RR(s390_irgen_SLGR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb90c: s390_format_RRE_RR(s390_irgen_MSGR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb90d: s390_format_RRE_RR(s390_irgen_DSGR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb90e: /* EREGG */ goto unimplemented; -+ case 0xb90f: s390_format_RRE_RR(s390_irgen_LRVGR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb910: s390_format_RRE_RR(s390_irgen_LPGFR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb911: s390_format_RRE_RR(s390_irgen_LNGFR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb912: s390_format_RRE_RR(s390_irgen_LTGFR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb913: s390_format_RRE_RR(s390_irgen_LCGFR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb914: s390_format_RRE_RR(s390_irgen_LGFR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb916: s390_format_RRE_RR(s390_irgen_LLGFR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb917: s390_format_RRE_RR(s390_irgen_LLGTR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb918: s390_format_RRE_RR(s390_irgen_AGFR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb919: s390_format_RRE_RR(s390_irgen_SGFR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb91a: s390_format_RRE_RR(s390_irgen_ALGFR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb91b: s390_format_RRE_RR(s390_irgen_SLGFR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb91c: s390_format_RRE_RR(s390_irgen_MSGFR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb91d: s390_format_RRE_RR(s390_irgen_DSGFR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb91e: /* KMAC */ goto unimplemented; -+ case 0xb91f: s390_format_RRE_RR(s390_irgen_LRVR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb920: s390_format_RRE_RR(s390_irgen_CGR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb921: s390_format_RRE_RR(s390_irgen_CLGR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb925: /* STURG */ goto unimplemented; -+ case 0xb926: s390_format_RRE_RR(s390_irgen_LBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb927: s390_format_RRE_RR(s390_irgen_LHR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb928: /* PCKMO */ goto unimplemented; -+ case 0xb92b: /* KMO */ goto unimplemented; -+ case 0xb92c: /* PCC */ goto unimplemented; -+ case 0xb92d: /* KMCTR */ goto unimplemented; -+ case 0xb92e: /* KM */ goto unimplemented; -+ case 0xb92f: /* KMC */ goto unimplemented; -+ case 0xb930: s390_format_RRE_RR(s390_irgen_CGFR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb931: s390_format_RRE_RR(s390_irgen_CLGFR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb93e: /* KIMD */ goto unimplemented; -+ case 0xb93f: /* KLMD */ goto unimplemented; -+ case 0xb941: /* CFDTR */ goto unimplemented; -+ case 0xb942: /* CLGDTR */ goto unimplemented; -+ case 0xb943: /* CLFDTR */ goto unimplemented; -+ case 0xb946: s390_format_RRE_RR(s390_irgen_BCTGR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb949: /* CFXTR */ goto unimplemented; -+ case 0xb94a: /* CLGXTR */ goto unimplemented; -+ case 0xb94b: /* CLFXTR */ goto unimplemented; -+ case 0xb951: /* CDFTR */ goto unimplemented; -+ case 0xb952: /* CDLGTR */ goto unimplemented; -+ case 0xb953: /* CDLFTR */ goto unimplemented; -+ case 0xb959: /* CXFTR */ goto unimplemented; -+ case 0xb95a: /* CXLGTR */ goto unimplemented; -+ case 0xb95b: /* CXLFTR */ goto unimplemented; -+ case 0xb960: /* CGRT */ goto unimplemented; -+ case 0xb961: /* CLGRT */ goto unimplemented; -+ case 0xb972: /* CRT */ goto unimplemented; -+ case 0xb973: /* CLRT */ goto unimplemented; -+ case 0xb980: s390_format_RRE_RR(s390_irgen_NGR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb981: s390_format_RRE_RR(s390_irgen_OGR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb982: s390_format_RRE_RR(s390_irgen_XGR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb983: s390_format_RRE_RR(s390_irgen_FLOGR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb984: s390_format_RRE_RR(s390_irgen_LLGCR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb985: s390_format_RRE_RR(s390_irgen_LLGHR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb986: s390_format_RRE_RR(s390_irgen_MLGR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb987: s390_format_RRE_RR(s390_irgen_DLGR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb988: s390_format_RRE_RR(s390_irgen_ALCGR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb989: s390_format_RRE_RR(s390_irgen_SLBGR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb98a: /* CSPG */ goto unimplemented; -+ case 0xb98d: /* EPSW */ goto unimplemented; -+ case 0xb98e: /* IDTE */ goto unimplemented; -+ case 0xb990: /* TRTT */ goto unimplemented; -+ case 0xb991: /* TRTO */ goto unimplemented; -+ case 0xb992: /* TROT */ goto unimplemented; -+ case 0xb993: /* TROO */ goto unimplemented; -+ case 0xb994: s390_format_RRE_RR(s390_irgen_LLCR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb995: s390_format_RRE_RR(s390_irgen_LLHR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb996: s390_format_RRE_RR(s390_irgen_MLR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb997: s390_format_RRE_RR(s390_irgen_DLR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb998: s390_format_RRE_RR(s390_irgen_ALCR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb999: s390_format_RRE_RR(s390_irgen_SLBR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb99a: /* EPAIR */ goto unimplemented; -+ case 0xb99b: /* ESAIR */ goto unimplemented; -+ case 0xb99d: /* ESEA */ goto unimplemented; -+ case 0xb99e: /* PTI */ goto unimplemented; -+ case 0xb99f: /* SSAIR */ goto unimplemented; -+ case 0xb9a2: /* PTF */ goto unimplemented; -+ case 0xb9aa: /* LPTEA */ goto unimplemented; -+ case 0xb9ae: /* RRBM */ goto unimplemented; -+ case 0xb9af: /* PFMF */ goto unimplemented; -+ case 0xb9b0: /* CU14 */ goto unimplemented; -+ case 0xb9b1: /* CU24 */ goto unimplemented; -+ case 0xb9b2: /* CU41 */ goto unimplemented; -+ case 0xb9b3: /* CU42 */ goto unimplemented; -+ case 0xb9bd: /* TRTRE */ goto unimplemented; -+ case 0xb9be: /* SRSTU */ goto unimplemented; -+ case 0xb9bf: /* TRTE */ goto unimplemented; -+ case 0xb9c8: s390_format_RRF_R0RR2(s390_irgen_AHHHR, ovl.fmt.RRF4.r3, -+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); -+ goto ok; -+ case 0xb9c9: s390_format_RRF_R0RR2(s390_irgen_SHHHR, ovl.fmt.RRF4.r3, -+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); -+ goto ok; -+ case 0xb9ca: s390_format_RRF_R0RR2(s390_irgen_ALHHHR, ovl.fmt.RRF4.r3, -+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); -+ goto ok; -+ case 0xb9cb: s390_format_RRF_R0RR2(s390_irgen_SLHHHR, ovl.fmt.RRF4.r3, -+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); -+ goto ok; -+ case 0xb9cd: s390_format_RRE_RR(s390_irgen_CHHR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb9cf: s390_format_RRE_RR(s390_irgen_CLHHR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb9d8: s390_format_RRF_R0RR2(s390_irgen_AHHLR, ovl.fmt.RRF4.r3, -+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); -+ goto ok; -+ case 0xb9d9: s390_format_RRF_R0RR2(s390_irgen_SHHLR, ovl.fmt.RRF4.r3, -+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); -+ goto ok; -+ case 0xb9da: s390_format_RRF_R0RR2(s390_irgen_ALHHLR, ovl.fmt.RRF4.r3, -+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); -+ goto ok; -+ case 0xb9db: s390_format_RRF_R0RR2(s390_irgen_SLHHLR, ovl.fmt.RRF4.r3, -+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); -+ goto ok; -+ case 0xb9dd: s390_format_RRE_RR(s390_irgen_CHLR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb9df: s390_format_RRE_RR(s390_irgen_CLHLR, ovl.fmt.RRE.r1, -+ ovl.fmt.RRE.r2); goto ok; -+ case 0xb9e1: /* POPCNT */ goto unimplemented; -+ case 0xb9e2: /* LOCGR */ goto unimplemented; -+ case 0xb9e4: s390_format_RRF_R0RR2(s390_irgen_NGRK, ovl.fmt.RRF4.r3, -+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); -+ goto ok; -+ case 0xb9e6: s390_format_RRF_R0RR2(s390_irgen_OGRK, ovl.fmt.RRF4.r3, -+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); -+ goto ok; -+ case 0xb9e7: s390_format_RRF_R0RR2(s390_irgen_XGRK, ovl.fmt.RRF4.r3, -+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); -+ goto ok; -+ case 0xb9e8: s390_format_RRF_R0RR2(s390_irgen_AGRK, ovl.fmt.RRF4.r3, -+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); -+ goto ok; -+ case 0xb9e9: s390_format_RRF_R0RR2(s390_irgen_SGRK, ovl.fmt.RRF4.r3, -+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); -+ goto ok; -+ case 0xb9ea: s390_format_RRF_R0RR2(s390_irgen_ALGRK, ovl.fmt.RRF4.r3, -+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); -+ goto ok; -+ case 0xb9eb: s390_format_RRF_R0RR2(s390_irgen_SLGRK, ovl.fmt.RRF4.r3, -+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); -+ goto ok; -+ case 0xb9f2: /* LOCR */ goto unimplemented; -+ case 0xb9f4: s390_format_RRF_R0RR2(s390_irgen_NRK, ovl.fmt.RRF4.r3, -+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); -+ goto ok; -+ case 0xb9f6: s390_format_RRF_R0RR2(s390_irgen_ORK, ovl.fmt.RRF4.r3, -+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); -+ goto ok; -+ case 0xb9f7: s390_format_RRF_R0RR2(s390_irgen_XRK, ovl.fmt.RRF4.r3, -+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); -+ goto ok; -+ case 0xb9f8: s390_format_RRF_R0RR2(s390_irgen_ARK, ovl.fmt.RRF4.r3, -+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); -+ goto ok; -+ case 0xb9f9: s390_format_RRF_R0RR2(s390_irgen_SRK, ovl.fmt.RRF4.r3, -+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); -+ goto ok; -+ case 0xb9fa: s390_format_RRF_R0RR2(s390_irgen_ALRK, ovl.fmt.RRF4.r3, -+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); -+ goto ok; -+ case 0xb9fb: s390_format_RRF_R0RR2(s390_irgen_SLRK, ovl.fmt.RRF4.r3, -+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2); -+ goto ok; -+ } -+ -+ switch ((ovl.value & 0xff000000) >> 24) { -+ case 0x40: s390_format_RX_RRRD(s390_irgen_STH, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x41: s390_format_RX_RRRD(s390_irgen_LA, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x42: s390_format_RX_RRRD(s390_irgen_STC, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x43: s390_format_RX_RRRD(s390_irgen_IC, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x44: s390_format_RX_RRRD(s390_irgen_EX, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x45: /* BAL */ goto unimplemented; -+ case 0x46: s390_format_RX_RRRD(s390_irgen_BCT, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x47: s390_format_RX(s390_irgen_BC, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x48: s390_format_RX_RRRD(s390_irgen_LH, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x49: s390_format_RX_RRRD(s390_irgen_CH, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x4a: s390_format_RX_RRRD(s390_irgen_AH, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x4b: s390_format_RX_RRRD(s390_irgen_SH, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x4c: s390_format_RX_RRRD(s390_irgen_MH, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x4d: s390_format_RX_RRRD(s390_irgen_BAS, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x4e: s390_format_RX_RRRD(s390_irgen_CVD, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x4f: s390_format_RX_RRRD(s390_irgen_CVB, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x50: s390_format_RX_RRRD(s390_irgen_ST, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x51: s390_format_RX_RRRD(s390_irgen_LAE, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x54: s390_format_RX_RRRD(s390_irgen_N, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x55: s390_format_RX_RRRD(s390_irgen_CL, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x56: s390_format_RX_RRRD(s390_irgen_O, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x57: s390_format_RX_RRRD(s390_irgen_X, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x58: s390_format_RX_RRRD(s390_irgen_L, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x59: s390_format_RX_RRRD(s390_irgen_C, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x5a: s390_format_RX_RRRD(s390_irgen_A, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x5b: s390_format_RX_RRRD(s390_irgen_S, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x5c: s390_format_RX_RRRD(s390_irgen_M, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x5d: s390_format_RX_RRRD(s390_irgen_D, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x5e: s390_format_RX_RRRD(s390_irgen_AL, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x5f: s390_format_RX_RRRD(s390_irgen_SL, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x60: s390_format_RX_FRRD(s390_irgen_STD, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x67: /* MXD */ goto unimplemented; -+ case 0x68: s390_format_RX_FRRD(s390_irgen_LD, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x69: /* CD */ goto unimplemented; -+ case 0x6a: /* AD */ goto unimplemented; -+ case 0x6b: /* SD */ goto unimplemented; -+ case 0x6c: /* MD */ goto unimplemented; -+ case 0x6d: /* DD */ goto unimplemented; -+ case 0x6e: /* AW */ goto unimplemented; -+ case 0x6f: /* SW */ goto unimplemented; -+ case 0x70: s390_format_RX_FRRD(s390_irgen_STE, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x71: s390_format_RX_RRRD(s390_irgen_MS, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x78: s390_format_RX_FRRD(s390_irgen_LE, ovl.fmt.RX.r1, ovl.fmt.RX.x2, -+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok; -+ case 0x79: /* CE */ goto unimplemented; -+ case 0x7a: /* AE */ goto unimplemented; -+ case 0x7b: /* SE */ goto unimplemented; -+ case 0x7c: /* MDE */ goto unimplemented; -+ case 0x7d: /* DE */ goto unimplemented; -+ case 0x7e: /* AU */ goto unimplemented; -+ case 0x7f: /* SU */ goto unimplemented; -+ case 0x83: /* DIAG */ goto unimplemented; -+ case 0x84: s390_format_RSI_RRP(s390_irgen_BRXH, ovl.fmt.RSI.r1, -+ ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok; -+ case 0x85: s390_format_RSI_RRP(s390_irgen_BRXLE, ovl.fmt.RSI.r1, -+ ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok; -+ case 0x86: s390_format_RS_RRRD(s390_irgen_BXH, ovl.fmt.RS.r1, ovl.fmt.RS.r3, -+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok; -+ case 0x87: s390_format_RS_RRRD(s390_irgen_BXLE, ovl.fmt.RS.r1, ovl.fmt.RS.r3, -+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok; -+ case 0x88: s390_format_RS_R0RD(s390_irgen_SRL, ovl.fmt.RS.r1, ovl.fmt.RS.b2, -+ ovl.fmt.RS.d2); goto ok; -+ case 0x89: s390_format_RS_R0RD(s390_irgen_SLL, ovl.fmt.RS.r1, ovl.fmt.RS.b2, -+ ovl.fmt.RS.d2); goto ok; -+ case 0x8a: s390_format_RS_R0RD(s390_irgen_SRA, ovl.fmt.RS.r1, ovl.fmt.RS.b2, -+ ovl.fmt.RS.d2); goto ok; -+ case 0x8b: s390_format_RS_R0RD(s390_irgen_SLA, ovl.fmt.RS.r1, ovl.fmt.RS.b2, -+ ovl.fmt.RS.d2); goto ok; -+ case 0x8c: s390_format_RS_R0RD(s390_irgen_SRDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2, -+ ovl.fmt.RS.d2); goto ok; -+ case 0x8d: s390_format_RS_R0RD(s390_irgen_SLDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2, -+ ovl.fmt.RS.d2); goto ok; -+ case 0x8e: s390_format_RS_R0RD(s390_irgen_SRDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2, -+ ovl.fmt.RS.d2); goto ok; -+ case 0x8f: s390_format_RS_R0RD(s390_irgen_SLDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2, -+ ovl.fmt.RS.d2); goto ok; -+ case 0x90: s390_format_RS_RRRD(s390_irgen_STM, ovl.fmt.RS.r1, ovl.fmt.RS.r3, -+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok; -+ case 0x91: s390_format_SI_URD(s390_irgen_TM, ovl.fmt.SI.i2, ovl.fmt.SI.b1, -+ ovl.fmt.SI.d1); goto ok; -+ case 0x92: s390_format_SI_URD(s390_irgen_MVI, ovl.fmt.SI.i2, ovl.fmt.SI.b1, -+ ovl.fmt.SI.d1); goto ok; -+ case 0x94: s390_format_SI_URD(s390_irgen_NI, ovl.fmt.SI.i2, ovl.fmt.SI.b1, -+ ovl.fmt.SI.d1); goto ok; -+ case 0x95: s390_format_SI_URD(s390_irgen_CLI, ovl.fmt.SI.i2, ovl.fmt.SI.b1, -+ ovl.fmt.SI.d1); goto ok; -+ case 0x96: s390_format_SI_URD(s390_irgen_OI, ovl.fmt.SI.i2, ovl.fmt.SI.b1, -+ ovl.fmt.SI.d1); goto ok; -+ case 0x97: s390_format_SI_URD(s390_irgen_XI, ovl.fmt.SI.i2, ovl.fmt.SI.b1, -+ ovl.fmt.SI.d1); goto ok; -+ case 0x98: s390_format_RS_RRRD(s390_irgen_LM, ovl.fmt.RS.r1, ovl.fmt.RS.r3, -+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok; -+ case 0x99: /* TRACE */ goto unimplemented; -+ case 0x9a: s390_format_RS_AARD(s390_irgen_LAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3, -+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok; -+ case 0x9b: s390_format_RS_AARD(s390_irgen_STAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3, -+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok; -+ case 0xa8: s390_format_RS_RRRD(s390_irgen_MVCLE, ovl.fmt.RS.r1, -+ ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2); -+ goto ok; -+ case 0xa9: s390_format_RS_RRRD(s390_irgen_CLCLE, ovl.fmt.RS.r1, -+ ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2); -+ goto ok; -+ case 0xac: /* STNSM */ goto unimplemented; -+ case 0xad: /* STOSM */ goto unimplemented; -+ case 0xae: /* SIGP */ goto unimplemented; -+ case 0xaf: /* MC */ goto unimplemented; -+ case 0xb1: /* LRA */ goto unimplemented; -+ case 0xb6: /* STCTL */ goto unimplemented; -+ case 0xb7: /* LCTL */ goto unimplemented; -+ case 0xba: s390_format_RS_RRRD(s390_irgen_CS, ovl.fmt.RS.r1, ovl.fmt.RS.r3, -+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok; -+ case 0xbb: /* CDS */ goto unimplemented; -+ case 0xbd: s390_format_RS_RURD(s390_irgen_CLM, ovl.fmt.RS.r1, ovl.fmt.RS.r3, -+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok; -+ case 0xbe: s390_format_RS_RURD(s390_irgen_STCM, ovl.fmt.RS.r1, ovl.fmt.RS.r3, -+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok; -+ case 0xbf: s390_format_RS_RURD(s390_irgen_ICM, ovl.fmt.RS.r1, ovl.fmt.RS.r3, -+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok; -+ } -+ -+ return S390_DECODE_UNKNOWN_INSN; -+ -+ok: -+ return S390_DECODE_OK; -+ -+unimplemented: -+ return S390_DECODE_UNIMPLEMENTED_INSN; -+} -+ -+static s390_decode_t -+s390_decode_6byte_and_irgen(UChar *bytes) -+{ -+ typedef union { -+ struct { -+ unsigned int op1 : 8; -+ unsigned int r1 : 4; -+ unsigned int r3 : 4; -+ unsigned int i2 : 16; -+ unsigned int : 8; -+ unsigned int op2 : 8; -+ } RIE; -+ struct { -+ unsigned int op1 : 8; -+ unsigned int r1 : 4; -+ unsigned int r2 : 4; -+ unsigned int i3 : 8; -+ unsigned int i4 : 8; -+ unsigned int i5 : 8; -+ unsigned int op2 : 8; -+ } RIE_RRUUU; -+ struct { -+ unsigned int op1 : 8; -+ unsigned int r1 : 4; -+ unsigned int : 4; -+ unsigned int i2 : 16; -+ unsigned int m3 : 4; -+ unsigned int : 4; -+ unsigned int op2 : 8; -+ } RIEv1; -+ struct { -+ unsigned int op1 : 8; -+ unsigned int r1 : 4; -+ unsigned int r2 : 4; -+ unsigned int i4 : 16; -+ unsigned int m3 : 4; -+ unsigned int : 4; -+ unsigned int op2 : 8; -+ } RIE_RRPU; -+ struct { -+ unsigned int op1 : 8; -+ unsigned int r1 : 4; -+ unsigned int m3 : 4; -+ unsigned int i4 : 16; -+ unsigned int i2 : 8; -+ unsigned int op2 : 8; -+ } RIEv3; -+ struct { -+ unsigned int op1 : 8; -+ unsigned int r1 : 4; -+ unsigned int op2 : 4; -+ unsigned int i2 : 32; -+ } RIL; -+ struct { -+ unsigned int op1 : 8; -+ unsigned int r1 : 4; -+ unsigned int m3 : 4; -+ unsigned int b4 : 4; -+ unsigned int d4 : 12; -+ unsigned int i2 : 8; -+ unsigned int op2 : 8; -+ } RIS; -+ struct { -+ unsigned int op1 : 8; -+ unsigned int r1 : 4; -+ unsigned int r2 : 4; -+ unsigned int b4 : 4; -+ unsigned int d4 : 12; -+ unsigned int m3 : 4; -+ unsigned int : 4; -+ unsigned int op2 : 8; -+ } RRS; -+ struct { -+ unsigned int op1 : 8; -+ unsigned int l1 : 4; -+ unsigned int : 4; -+ unsigned int b1 : 4; -+ unsigned int d1 : 12; -+ unsigned int : 8; -+ unsigned int op2 : 8; -+ } RSL; -+ struct { -+ unsigned int op1 : 8; -+ unsigned int r1 : 4; -+ unsigned int r3 : 4; -+ unsigned int b2 : 4; -+ unsigned int dl2 : 12; -+ unsigned int dh2 : 8; -+ unsigned int op2 : 8; -+ } RSY; -+ struct { -+ unsigned int op1 : 8; -+ unsigned int r1 : 4; -+ unsigned int x2 : 4; -+ unsigned int b2 : 4; -+ unsigned int d2 : 12; -+ unsigned int : 8; -+ unsigned int op2 : 8; -+ } RXE; -+ struct { -+ unsigned int op1 : 8; -+ unsigned int r3 : 4; -+ unsigned int x2 : 4; -+ unsigned int b2 : 4; -+ unsigned int d2 : 12; -+ unsigned int r1 : 4; -+ unsigned int : 4; -+ unsigned int op2 : 8; -+ } RXF; -+ struct { -+ unsigned int op1 : 8; -+ unsigned int r1 : 4; -+ unsigned int x2 : 4; -+ unsigned int b2 : 4; -+ unsigned int dl2 : 12; -+ unsigned int dh2 : 8; -+ unsigned int op2 : 8; -+ } RXY; -+ struct { -+ unsigned int op1 : 8; -+ unsigned int i2 : 8; -+ unsigned int b1 : 4; -+ unsigned int dl1 : 12; -+ unsigned int dh1 : 8; -+ unsigned int op2 : 8; -+ } SIY; -+ struct { -+ unsigned int op : 8; -+ unsigned int l : 8; -+ unsigned int b1 : 4; -+ unsigned int d1 : 12; -+ unsigned int b2 : 4; -+ unsigned int d2 : 12; -+ } SS; -+ struct { -+ unsigned int op : 8; -+ unsigned int l1 : 4; -+ unsigned int l2 : 4; -+ unsigned int b1 : 4; -+ unsigned int d1 : 12; -+ unsigned int b2 : 4; -+ unsigned int d2 : 12; -+ } SS_LLRDRD; -+ struct { -+ unsigned int op : 8; -+ unsigned int r1 : 4; -+ unsigned int r3 : 4; -+ unsigned int b2 : 4; -+ unsigned int d2 : 12; -+ unsigned int b4 : 4; -+ unsigned int d4 : 12; -+ } SS_RRRDRD2; -+ struct { -+ unsigned int op : 16; -+ unsigned int b1 : 4; -+ unsigned int d1 : 12; -+ unsigned int b2 : 4; -+ unsigned int d2 : 12; -+ } SSE; -+ struct { -+ unsigned int op1 : 8; -+ unsigned int r3 : 4; -+ unsigned int op2 : 4; -+ unsigned int b1 : 4; -+ unsigned int d1 : 12; -+ unsigned int b2 : 4; -+ unsigned int d2 : 12; -+ } SSF; -+ struct { -+ unsigned int op : 16; -+ unsigned int b1 : 4; -+ unsigned int d1 : 12; -+ unsigned int i2 : 16; -+ } SIL; -+ } formats; -+ union { -+ formats fmt; -+ ULong value; -+ } ovl; -+ -+ vassert(sizeof(formats) == 6); -+ -+ ((char *)(&ovl.value))[0] = bytes[0]; -+ ((char *)(&ovl.value))[1] = bytes[1]; -+ ((char *)(&ovl.value))[2] = bytes[2]; -+ ((char *)(&ovl.value))[3] = bytes[3]; -+ ((char *)(&ovl.value))[4] = bytes[4]; -+ ((char *)(&ovl.value))[5] = bytes[5]; -+ ((char *)(&ovl.value))[6] = 0x0; -+ ((char *)(&ovl.value))[7] = 0x0; -+ -+ switch ((ovl.value >> 16) & 0xff00000000ffULL) { -+ case 0xe30000000002ULL: s390_format_RXY_RRRD(s390_irgen_LTG, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000003ULL: /* LRAG */ goto unimplemented; -+ case 0xe30000000004ULL: s390_format_RXY_RRRD(s390_irgen_LG, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000006ULL: s390_format_RXY_RRRD(s390_irgen_CVBY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000008ULL: s390_format_RXY_RRRD(s390_irgen_AG, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000009ULL: s390_format_RXY_RRRD(s390_irgen_SG, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe3000000000aULL: s390_format_RXY_RRRD(s390_irgen_ALG, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe3000000000bULL: s390_format_RXY_RRRD(s390_irgen_SLG, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe3000000000cULL: s390_format_RXY_RRRD(s390_irgen_MSG, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe3000000000dULL: s390_format_RXY_RRRD(s390_irgen_DSG, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe3000000000eULL: /* CVBG */ goto unimplemented; -+ case 0xe3000000000fULL: s390_format_RXY_RRRD(s390_irgen_LRVG, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000012ULL: s390_format_RXY_RRRD(s390_irgen_LT, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000013ULL: /* LRAY */ goto unimplemented; -+ case 0xe30000000014ULL: s390_format_RXY_RRRD(s390_irgen_LGF, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000015ULL: s390_format_RXY_RRRD(s390_irgen_LGH, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000016ULL: s390_format_RXY_RRRD(s390_irgen_LLGF, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000017ULL: s390_format_RXY_RRRD(s390_irgen_LLGT, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000018ULL: s390_format_RXY_RRRD(s390_irgen_AGF, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000019ULL: s390_format_RXY_RRRD(s390_irgen_SGF, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe3000000001aULL: s390_format_RXY_RRRD(s390_irgen_ALGF, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe3000000001bULL: s390_format_RXY_RRRD(s390_irgen_SLGF, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe3000000001cULL: s390_format_RXY_RRRD(s390_irgen_MSGF, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe3000000001dULL: s390_format_RXY_RRRD(s390_irgen_DSGF, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe3000000001eULL: s390_format_RXY_RRRD(s390_irgen_LRV, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe3000000001fULL: s390_format_RXY_RRRD(s390_irgen_LRVH, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000020ULL: s390_format_RXY_RRRD(s390_irgen_CG, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000021ULL: s390_format_RXY_RRRD(s390_irgen_CLG, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000024ULL: s390_format_RXY_RRRD(s390_irgen_STG, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000026ULL: s390_format_RXY_RRRD(s390_irgen_CVDY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe3000000002eULL: /* CVDG */ goto unimplemented; -+ case 0xe3000000002fULL: s390_format_RXY_RRRD(s390_irgen_STRVG, -+ ovl.fmt.RXY.r1, ovl.fmt.RXY.x2, -+ ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000030ULL: s390_format_RXY_RRRD(s390_irgen_CGF, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000031ULL: s390_format_RXY_RRRD(s390_irgen_CLGF, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000032ULL: s390_format_RXY_RRRD(s390_irgen_LTGF, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000034ULL: s390_format_RXY_RRRD(s390_irgen_CGH, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000036ULL: s390_format_RXY_URRD(s390_irgen_PFD, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe3000000003eULL: s390_format_RXY_RRRD(s390_irgen_STRV, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe3000000003fULL: s390_format_RXY_RRRD(s390_irgen_STRVH, -+ ovl.fmt.RXY.r1, ovl.fmt.RXY.x2, -+ ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000046ULL: s390_format_RXY_RRRD(s390_irgen_BCTG, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000050ULL: s390_format_RXY_RRRD(s390_irgen_STY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000051ULL: s390_format_RXY_RRRD(s390_irgen_MSY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000054ULL: s390_format_RXY_RRRD(s390_irgen_NY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000055ULL: s390_format_RXY_RRRD(s390_irgen_CLY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000056ULL: s390_format_RXY_RRRD(s390_irgen_OY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000057ULL: s390_format_RXY_RRRD(s390_irgen_XY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000058ULL: s390_format_RXY_RRRD(s390_irgen_LY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000059ULL: s390_format_RXY_RRRD(s390_irgen_CY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe3000000005aULL: s390_format_RXY_RRRD(s390_irgen_AY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe3000000005bULL: s390_format_RXY_RRRD(s390_irgen_SY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe3000000005cULL: s390_format_RXY_RRRD(s390_irgen_MFY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe3000000005eULL: s390_format_RXY_RRRD(s390_irgen_ALY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe3000000005fULL: s390_format_RXY_RRRD(s390_irgen_SLY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000070ULL: s390_format_RXY_RRRD(s390_irgen_STHY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000071ULL: s390_format_RXY_RRRD(s390_irgen_LAY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000072ULL: s390_format_RXY_RRRD(s390_irgen_STCY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000073ULL: s390_format_RXY_RRRD(s390_irgen_ICY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000075ULL: s390_format_RXY_RRRD(s390_irgen_LAEY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000076ULL: s390_format_RXY_RRRD(s390_irgen_LB, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000077ULL: s390_format_RXY_RRRD(s390_irgen_LGB, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000078ULL: s390_format_RXY_RRRD(s390_irgen_LHY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000079ULL: s390_format_RXY_RRRD(s390_irgen_CHY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe3000000007aULL: s390_format_RXY_RRRD(s390_irgen_AHY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe3000000007bULL: s390_format_RXY_RRRD(s390_irgen_SHY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe3000000007cULL: s390_format_RXY_RRRD(s390_irgen_MHY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000080ULL: s390_format_RXY_RRRD(s390_irgen_NG, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000081ULL: s390_format_RXY_RRRD(s390_irgen_OG, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000082ULL: s390_format_RXY_RRRD(s390_irgen_XG, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000086ULL: s390_format_RXY_RRRD(s390_irgen_MLG, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000087ULL: s390_format_RXY_RRRD(s390_irgen_DLG, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000088ULL: s390_format_RXY_RRRD(s390_irgen_ALCG, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000089ULL: s390_format_RXY_RRRD(s390_irgen_SLBG, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe3000000008eULL: s390_format_RXY_RRRD(s390_irgen_STPQ, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe3000000008fULL: s390_format_RXY_RRRD(s390_irgen_LPQ, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000090ULL: s390_format_RXY_RRRD(s390_irgen_LLGC, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000091ULL: s390_format_RXY_RRRD(s390_irgen_LLGH, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000094ULL: s390_format_RXY_RRRD(s390_irgen_LLC, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000095ULL: s390_format_RXY_RRRD(s390_irgen_LLH, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000096ULL: s390_format_RXY_RRRD(s390_irgen_ML, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000097ULL: s390_format_RXY_RRRD(s390_irgen_DL, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000098ULL: s390_format_RXY_RRRD(s390_irgen_ALC, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe30000000099ULL: s390_format_RXY_RRRD(s390_irgen_SLB, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe300000000c0ULL: s390_format_RXY_RRRD(s390_irgen_LBH, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe300000000c2ULL: s390_format_RXY_RRRD(s390_irgen_LLCH, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe300000000c3ULL: s390_format_RXY_RRRD(s390_irgen_STCH, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe300000000c4ULL: s390_format_RXY_RRRD(s390_irgen_LHH, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe300000000c6ULL: s390_format_RXY_RRRD(s390_irgen_LLHH, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe300000000c7ULL: s390_format_RXY_RRRD(s390_irgen_STHH, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe300000000caULL: s390_format_RXY_RRRD(s390_irgen_LFH, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe300000000cbULL: s390_format_RXY_RRRD(s390_irgen_STFH, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe300000000cdULL: s390_format_RXY_RRRD(s390_irgen_CHF, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xe300000000cfULL: s390_format_RXY_RRRD(s390_irgen_CLHF, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xeb0000000004ULL: s390_format_RSY_RRRD(s390_irgen_LMG, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb000000000aULL: s390_format_RSY_RRRD(s390_irgen_SRAG, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb000000000bULL: s390_format_RSY_RRRD(s390_irgen_SLAG, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb000000000cULL: s390_format_RSY_RRRD(s390_irgen_SRLG, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb000000000dULL: s390_format_RSY_RRRD(s390_irgen_SLLG, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb000000000fULL: /* TRACG */ goto unimplemented; -+ case 0xeb0000000014ULL: s390_format_RSY_RRRD(s390_irgen_CSY, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb000000001cULL: s390_format_RSY_RRRD(s390_irgen_RLLG, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb000000001dULL: s390_format_RSY_RRRD(s390_irgen_RLL, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb0000000020ULL: s390_format_RSY_RURD(s390_irgen_CLMH, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb0000000021ULL: s390_format_RSY_RURD(s390_irgen_CLMY, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb0000000024ULL: s390_format_RSY_RRRD(s390_irgen_STMG, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb0000000025ULL: /* STCTG */ goto unimplemented; -+ case 0xeb0000000026ULL: s390_format_RSY_RRRD(s390_irgen_STMH, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb000000002cULL: s390_format_RSY_RURD(s390_irgen_STCMH, -+ ovl.fmt.RSY.r1, ovl.fmt.RSY.r3, -+ ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb000000002dULL: s390_format_RSY_RURD(s390_irgen_STCMY, -+ ovl.fmt.RSY.r1, ovl.fmt.RSY.r3, -+ ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb000000002fULL: /* LCTLG */ goto unimplemented; -+ case 0xeb0000000030ULL: s390_format_RSY_RRRD(s390_irgen_CSG, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb0000000031ULL: /* CDSY */ goto unimplemented; -+ case 0xeb000000003eULL: /* CDSG */ goto unimplemented; -+ case 0xeb0000000044ULL: s390_format_RSY_RRRD(s390_irgen_BXHG, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb0000000045ULL: s390_format_RSY_RRRD(s390_irgen_BXLEG, -+ ovl.fmt.RSY.r1, ovl.fmt.RSY.r3, -+ ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb000000004cULL: /* ECAG */ goto unimplemented; -+ case 0xeb0000000051ULL: s390_format_SIY_URD(s390_irgen_TMY, ovl.fmt.SIY.i2, -+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1, -+ ovl.fmt.SIY.dh1); goto ok; -+ case 0xeb0000000052ULL: s390_format_SIY_URD(s390_irgen_MVIY, ovl.fmt.SIY.i2, -+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1, -+ ovl.fmt.SIY.dh1); goto ok; -+ case 0xeb0000000054ULL: s390_format_SIY_URD(s390_irgen_NIY, ovl.fmt.SIY.i2, -+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1, -+ ovl.fmt.SIY.dh1); goto ok; -+ case 0xeb0000000055ULL: s390_format_SIY_URD(s390_irgen_CLIY, ovl.fmt.SIY.i2, -+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1, -+ ovl.fmt.SIY.dh1); goto ok; -+ case 0xeb0000000056ULL: s390_format_SIY_URD(s390_irgen_OIY, ovl.fmt.SIY.i2, -+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1, -+ ovl.fmt.SIY.dh1); goto ok; -+ case 0xeb0000000057ULL: s390_format_SIY_URD(s390_irgen_XIY, ovl.fmt.SIY.i2, -+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1, -+ ovl.fmt.SIY.dh1); goto ok; -+ case 0xeb000000006aULL: s390_format_SIY_IRD(s390_irgen_ASI, ovl.fmt.SIY.i2, -+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1, -+ ovl.fmt.SIY.dh1); goto ok; -+ case 0xeb000000006eULL: s390_format_SIY_IRD(s390_irgen_ALSI, ovl.fmt.SIY.i2, -+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1, -+ ovl.fmt.SIY.dh1); goto ok; -+ case 0xeb000000007aULL: s390_format_SIY_IRD(s390_irgen_AGSI, ovl.fmt.SIY.i2, -+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1, -+ ovl.fmt.SIY.dh1); goto ok; -+ case 0xeb000000007eULL: s390_format_SIY_IRD(s390_irgen_ALGSI, ovl.fmt.SIY.i2, -+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1, -+ ovl.fmt.SIY.dh1); goto ok; -+ case 0xeb0000000080ULL: s390_format_RSY_RURD(s390_irgen_ICMH, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb0000000081ULL: s390_format_RSY_RURD(s390_irgen_ICMY, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb000000008eULL: /* MVCLU */ goto unimplemented; -+ case 0xeb000000008fULL: /* CLCLU */ goto unimplemented; -+ case 0xeb0000000090ULL: s390_format_RSY_RRRD(s390_irgen_STMY, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb0000000096ULL: s390_format_RSY_RRRD(s390_irgen_LMH, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb0000000098ULL: s390_format_RSY_RRRD(s390_irgen_LMY, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb000000009aULL: s390_format_RSY_AARD(s390_irgen_LAMY, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb000000009bULL: s390_format_RSY_AARD(s390_irgen_STAMY, -+ ovl.fmt.RSY.r1, ovl.fmt.RSY.r3, -+ ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb00000000c0ULL: /* TP */ goto unimplemented; -+ case 0xeb00000000dcULL: s390_format_RSY_RRRD(s390_irgen_SRAK, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb00000000ddULL: s390_format_RSY_RRRD(s390_irgen_SLAK, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb00000000deULL: s390_format_RSY_RRRD(s390_irgen_SRLK, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb00000000dfULL: s390_format_RSY_RRRD(s390_irgen_SLLK, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb00000000e2ULL: /* LOCG */ goto unimplemented; -+ case 0xeb00000000e3ULL: /* STOCG */ goto unimplemented; -+ case 0xeb00000000e4ULL: s390_format_RSY_RRRD(s390_irgen_LANG, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb00000000e6ULL: s390_format_RSY_RRRD(s390_irgen_LAOG, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb00000000e7ULL: s390_format_RSY_RRRD(s390_irgen_LAXG, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb00000000e8ULL: s390_format_RSY_RRRD(s390_irgen_LAAG, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb00000000eaULL: s390_format_RSY_RRRD(s390_irgen_LAALG, -+ ovl.fmt.RSY.r1, ovl.fmt.RSY.r3, -+ ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb00000000f2ULL: /* LOC */ goto unimplemented; -+ case 0xeb00000000f3ULL: /* STOC */ goto unimplemented; -+ case 0xeb00000000f4ULL: s390_format_RSY_RRRD(s390_irgen_LAN, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb00000000f6ULL: s390_format_RSY_RRRD(s390_irgen_LAO, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb00000000f7ULL: s390_format_RSY_RRRD(s390_irgen_LAX, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb00000000f8ULL: s390_format_RSY_RRRD(s390_irgen_LAA, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xeb00000000faULL: s390_format_RSY_RRRD(s390_irgen_LAAL, ovl.fmt.RSY.r1, -+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2, -+ ovl.fmt.RSY.dl2, -+ ovl.fmt.RSY.dh2); goto ok; -+ case 0xec0000000044ULL: s390_format_RIE_RRP(s390_irgen_BRXHG, ovl.fmt.RIE.r1, -+ ovl.fmt.RIE.r3, ovl.fmt.RIE.i2); -+ goto ok; -+ case 0xec0000000045ULL: s390_format_RIE_RRP(s390_irgen_BRXLG, ovl.fmt.RIE.r1, -+ ovl.fmt.RIE.r3, ovl.fmt.RIE.i2); -+ goto ok; -+ case 0xec0000000051ULL: /* RISBLG */ goto unimplemented; -+ case 0xec0000000054ULL: s390_format_RIE_RRUUU(s390_irgen_RNSBG, -+ ovl.fmt.RIE_RRUUU.r1, -+ ovl.fmt.RIE_RRUUU.r2, -+ ovl.fmt.RIE_RRUUU.i3, -+ ovl.fmt.RIE_RRUUU.i4, -+ ovl.fmt.RIE_RRUUU.i5); -+ goto ok; -+ case 0xec0000000055ULL: s390_format_RIE_RRUUU(s390_irgen_RISBG, -+ ovl.fmt.RIE_RRUUU.r1, -+ ovl.fmt.RIE_RRUUU.r2, -+ ovl.fmt.RIE_RRUUU.i3, -+ ovl.fmt.RIE_RRUUU.i4, -+ ovl.fmt.RIE_RRUUU.i5); -+ goto ok; -+ case 0xec0000000056ULL: s390_format_RIE_RRUUU(s390_irgen_ROSBG, -+ ovl.fmt.RIE_RRUUU.r1, -+ ovl.fmt.RIE_RRUUU.r2, -+ ovl.fmt.RIE_RRUUU.i3, -+ ovl.fmt.RIE_RRUUU.i4, -+ ovl.fmt.RIE_RRUUU.i5); -+ goto ok; -+ case 0xec0000000057ULL: s390_format_RIE_RRUUU(s390_irgen_RXSBG, -+ ovl.fmt.RIE_RRUUU.r1, -+ ovl.fmt.RIE_RRUUU.r2, -+ ovl.fmt.RIE_RRUUU.i3, -+ ovl.fmt.RIE_RRUUU.i4, -+ ovl.fmt.RIE_RRUUU.i5); -+ goto ok; -+ case 0xec000000005dULL: /* RISBHG */ goto unimplemented; -+ case 0xec0000000064ULL: s390_format_RIE_RRPU(s390_irgen_CGRJ, -+ ovl.fmt.RIE_RRPU.r1, -+ ovl.fmt.RIE_RRPU.r2, -+ ovl.fmt.RIE_RRPU.i4, -+ ovl.fmt.RIE_RRPU.m3); goto ok; -+ case 0xec0000000065ULL: s390_format_RIE_RRPU(s390_irgen_CLGRJ, -+ ovl.fmt.RIE_RRPU.r1, -+ ovl.fmt.RIE_RRPU.r2, -+ ovl.fmt.RIE_RRPU.i4, -+ ovl.fmt.RIE_RRPU.m3); goto ok; -+ case 0xec0000000070ULL: /* CGIT */ goto unimplemented; -+ case 0xec0000000071ULL: /* CLGIT */ goto unimplemented; -+ case 0xec0000000072ULL: /* CIT */ goto unimplemented; -+ case 0xec0000000073ULL: /* CLFIT */ goto unimplemented; -+ case 0xec0000000076ULL: s390_format_RIE_RRPU(s390_irgen_CRJ, -+ ovl.fmt.RIE_RRPU.r1, -+ ovl.fmt.RIE_RRPU.r2, -+ ovl.fmt.RIE_RRPU.i4, -+ ovl.fmt.RIE_RRPU.m3); goto ok; -+ case 0xec0000000077ULL: s390_format_RIE_RRPU(s390_irgen_CLRJ, -+ ovl.fmt.RIE_RRPU.r1, -+ ovl.fmt.RIE_RRPU.r2, -+ ovl.fmt.RIE_RRPU.i4, -+ ovl.fmt.RIE_RRPU.m3); goto ok; -+ case 0xec000000007cULL: s390_format_RIE_RUPI(s390_irgen_CGIJ, -+ ovl.fmt.RIEv3.r1, -+ ovl.fmt.RIEv3.m3, -+ ovl.fmt.RIEv3.i4, -+ ovl.fmt.RIEv3.i2); goto ok; -+ case 0xec000000007dULL: s390_format_RIE_RUPU(s390_irgen_CLGIJ, -+ ovl.fmt.RIEv3.r1, -+ ovl.fmt.RIEv3.m3, -+ ovl.fmt.RIEv3.i4, -+ ovl.fmt.RIEv3.i2); goto ok; -+ case 0xec000000007eULL: s390_format_RIE_RUPI(s390_irgen_CIJ, -+ ovl.fmt.RIEv3.r1, -+ ovl.fmt.RIEv3.m3, -+ ovl.fmt.RIEv3.i4, -+ ovl.fmt.RIEv3.i2); goto ok; -+ case 0xec000000007fULL: s390_format_RIE_RUPU(s390_irgen_CLIJ, -+ ovl.fmt.RIEv3.r1, -+ ovl.fmt.RIEv3.m3, -+ ovl.fmt.RIEv3.i4, -+ ovl.fmt.RIEv3.i2); goto ok; -+ case 0xec00000000d8ULL: s390_format_RIE_RRI0(s390_irgen_AHIK, ovl.fmt.RIE.r1, -+ ovl.fmt.RIE.r3, ovl.fmt.RIE.i2); -+ goto ok; -+ case 0xec00000000d9ULL: s390_format_RIE_RRI0(s390_irgen_AGHIK, -+ ovl.fmt.RIE.r1, ovl.fmt.RIE.r3, -+ ovl.fmt.RIE.i2); goto ok; -+ case 0xec00000000daULL: s390_format_RIE_RRI0(s390_irgen_ALHSIK, -+ ovl.fmt.RIE.r1, ovl.fmt.RIE.r3, -+ ovl.fmt.RIE.i2); goto ok; -+ case 0xec00000000dbULL: s390_format_RIE_RRI0(s390_irgen_ALGHSIK, -+ ovl.fmt.RIE.r1, ovl.fmt.RIE.r3, -+ ovl.fmt.RIE.i2); goto ok; -+ case 0xec00000000e4ULL: s390_format_RRS(s390_irgen_CGRB, ovl.fmt.RRS.r1, -+ ovl.fmt.RRS.r2, ovl.fmt.RRS.b4, -+ ovl.fmt.RRS.d4, ovl.fmt.RRS.m3); -+ goto ok; -+ case 0xec00000000e5ULL: s390_format_RRS(s390_irgen_CLGRB, ovl.fmt.RRS.r1, -+ ovl.fmt.RRS.r2, ovl.fmt.RRS.b4, -+ ovl.fmt.RRS.d4, ovl.fmt.RRS.m3); -+ goto ok; -+ case 0xec00000000f6ULL: s390_format_RRS(s390_irgen_CRB, ovl.fmt.RRS.r1, -+ ovl.fmt.RRS.r2, ovl.fmt.RRS.b4, -+ ovl.fmt.RRS.d4, ovl.fmt.RRS.m3); -+ goto ok; -+ case 0xec00000000f7ULL: s390_format_RRS(s390_irgen_CLRB, ovl.fmt.RRS.r1, -+ ovl.fmt.RRS.r2, ovl.fmt.RRS.b4, -+ ovl.fmt.RRS.d4, ovl.fmt.RRS.m3); -+ goto ok; -+ case 0xec00000000fcULL: s390_format_RIS_RURDI(s390_irgen_CGIB, -+ ovl.fmt.RIS.r1, ovl.fmt.RIS.m3, -+ ovl.fmt.RIS.b4, ovl.fmt.RIS.d4, -+ ovl.fmt.RIS.i2); goto ok; -+ case 0xec00000000fdULL: s390_format_RIS_RURDU(s390_irgen_CLGIB, -+ ovl.fmt.RIS.r1, ovl.fmt.RIS.m3, -+ ovl.fmt.RIS.b4, ovl.fmt.RIS.d4, -+ ovl.fmt.RIS.i2); goto ok; -+ case 0xec00000000feULL: s390_format_RIS_RURDI(s390_irgen_CIB, ovl.fmt.RIS.r1, -+ ovl.fmt.RIS.m3, ovl.fmt.RIS.b4, -+ ovl.fmt.RIS.d4, -+ ovl.fmt.RIS.i2); goto ok; -+ case 0xec00000000ffULL: s390_format_RIS_RURDU(s390_irgen_CLIB, -+ ovl.fmt.RIS.r1, ovl.fmt.RIS.m3, -+ ovl.fmt.RIS.b4, ovl.fmt.RIS.d4, -+ ovl.fmt.RIS.i2); goto ok; -+ case 0xed0000000004ULL: s390_format_RXE_FRRD(s390_irgen_LDEB, ovl.fmt.RXE.r1, -+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, -+ ovl.fmt.RXE.d2); goto ok; -+ case 0xed0000000005ULL: s390_format_RXE_FRRD(s390_irgen_LXDB, ovl.fmt.RXE.r1, -+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, -+ ovl.fmt.RXE.d2); goto ok; -+ case 0xed0000000006ULL: s390_format_RXE_FRRD(s390_irgen_LXEB, ovl.fmt.RXE.r1, -+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, -+ ovl.fmt.RXE.d2); goto ok; -+ case 0xed0000000007ULL: /* MXDB */ goto unimplemented; -+ case 0xed0000000008ULL: /* KEB */ goto unimplemented; -+ case 0xed0000000009ULL: s390_format_RXE_FRRD(s390_irgen_CEB, ovl.fmt.RXE.r1, -+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, -+ ovl.fmt.RXE.d2); goto ok; -+ case 0xed000000000aULL: s390_format_RXE_FRRD(s390_irgen_AEB, ovl.fmt.RXE.r1, -+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, -+ ovl.fmt.RXE.d2); goto ok; -+ case 0xed000000000bULL: s390_format_RXE_FRRD(s390_irgen_SEB, ovl.fmt.RXE.r1, -+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, -+ ovl.fmt.RXE.d2); goto ok; -+ case 0xed000000000cULL: /* MDEB */ goto unimplemented; -+ case 0xed000000000dULL: s390_format_RXE_FRRD(s390_irgen_DEB, ovl.fmt.RXE.r1, -+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, -+ ovl.fmt.RXE.d2); goto ok; -+ case 0xed000000000eULL: s390_format_RXF_FRRDF(s390_irgen_MAEB, -+ ovl.fmt.RXF.r3, ovl.fmt.RXF.x2, -+ ovl.fmt.RXF.b2, ovl.fmt.RXF.d2, -+ ovl.fmt.RXF.r1); goto ok; -+ case 0xed000000000fULL: s390_format_RXF_FRRDF(s390_irgen_MSEB, -+ ovl.fmt.RXF.r3, ovl.fmt.RXF.x2, -+ ovl.fmt.RXF.b2, ovl.fmt.RXF.d2, -+ ovl.fmt.RXF.r1); goto ok; -+ case 0xed0000000010ULL: s390_format_RXE_FRRD(s390_irgen_TCEB, ovl.fmt.RXE.r1, -+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, -+ ovl.fmt.RXE.d2); goto ok; -+ case 0xed0000000011ULL: s390_format_RXE_FRRD(s390_irgen_TCDB, ovl.fmt.RXE.r1, -+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, -+ ovl.fmt.RXE.d2); goto ok; -+ case 0xed0000000012ULL: s390_format_RXE_FRRD(s390_irgen_TCXB, ovl.fmt.RXE.r1, -+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, -+ ovl.fmt.RXE.d2); goto ok; -+ case 0xed0000000014ULL: s390_format_RXE_FRRD(s390_irgen_SQEB, ovl.fmt.RXE.r1, -+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, -+ ovl.fmt.RXE.d2); goto ok; -+ case 0xed0000000015ULL: s390_format_RXE_FRRD(s390_irgen_SQDB, ovl.fmt.RXE.r1, -+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, -+ ovl.fmt.RXE.d2); goto ok; -+ case 0xed0000000017ULL: s390_format_RXE_FRRD(s390_irgen_MEEB, ovl.fmt.RXE.r1, -+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, -+ ovl.fmt.RXE.d2); goto ok; -+ case 0xed0000000018ULL: /* KDB */ goto unimplemented; -+ case 0xed0000000019ULL: s390_format_RXE_FRRD(s390_irgen_CDB, ovl.fmt.RXE.r1, -+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, -+ ovl.fmt.RXE.d2); goto ok; -+ case 0xed000000001aULL: s390_format_RXE_FRRD(s390_irgen_ADB, ovl.fmt.RXE.r1, -+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, -+ ovl.fmt.RXE.d2); goto ok; -+ case 0xed000000001bULL: s390_format_RXE_FRRD(s390_irgen_SDB, ovl.fmt.RXE.r1, -+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, -+ ovl.fmt.RXE.d2); goto ok; -+ case 0xed000000001cULL: s390_format_RXE_FRRD(s390_irgen_MDB, ovl.fmt.RXE.r1, -+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, -+ ovl.fmt.RXE.d2); goto ok; -+ case 0xed000000001dULL: s390_format_RXE_FRRD(s390_irgen_DDB, ovl.fmt.RXE.r1, -+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2, -+ ovl.fmt.RXE.d2); goto ok; -+ case 0xed000000001eULL: s390_format_RXF_FRRDF(s390_irgen_MADB, -+ ovl.fmt.RXF.r3, ovl.fmt.RXF.x2, -+ ovl.fmt.RXF.b2, ovl.fmt.RXF.d2, -+ ovl.fmt.RXF.r1); goto ok; -+ case 0xed000000001fULL: s390_format_RXF_FRRDF(s390_irgen_MSDB, -+ ovl.fmt.RXF.r3, ovl.fmt.RXF.x2, -+ ovl.fmt.RXF.b2, ovl.fmt.RXF.d2, -+ ovl.fmt.RXF.r1); goto ok; -+ case 0xed0000000024ULL: /* LDE */ goto unimplemented; -+ case 0xed0000000025ULL: /* LXD */ goto unimplemented; -+ case 0xed0000000026ULL: /* LXE */ goto unimplemented; -+ case 0xed000000002eULL: /* MAE */ goto unimplemented; -+ case 0xed000000002fULL: /* MSE */ goto unimplemented; -+ case 0xed0000000034ULL: /* SQE */ goto unimplemented; -+ case 0xed0000000035ULL: /* SQD */ goto unimplemented; -+ case 0xed0000000037ULL: /* MEE */ goto unimplemented; -+ case 0xed0000000038ULL: /* MAYL */ goto unimplemented; -+ case 0xed0000000039ULL: /* MYL */ goto unimplemented; -+ case 0xed000000003aULL: /* MAY */ goto unimplemented; -+ case 0xed000000003bULL: /* MY */ goto unimplemented; -+ case 0xed000000003cULL: /* MAYH */ goto unimplemented; -+ case 0xed000000003dULL: /* MYH */ goto unimplemented; -+ case 0xed000000003eULL: /* MAD */ goto unimplemented; -+ case 0xed000000003fULL: /* MSD */ goto unimplemented; -+ case 0xed0000000040ULL: /* SLDT */ goto unimplemented; -+ case 0xed0000000041ULL: /* SRDT */ goto unimplemented; -+ case 0xed0000000048ULL: /* SLXT */ goto unimplemented; -+ case 0xed0000000049ULL: /* SRXT */ goto unimplemented; -+ case 0xed0000000050ULL: /* TDCET */ goto unimplemented; -+ case 0xed0000000051ULL: /* TDGET */ goto unimplemented; -+ case 0xed0000000054ULL: /* TDCDT */ goto unimplemented; -+ case 0xed0000000055ULL: /* TDGDT */ goto unimplemented; -+ case 0xed0000000058ULL: /* TDCXT */ goto unimplemented; -+ case 0xed0000000059ULL: /* TDGXT */ goto unimplemented; -+ case 0xed0000000064ULL: s390_format_RXY_FRRD(s390_irgen_LEY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xed0000000065ULL: s390_format_RXY_FRRD(s390_irgen_LDY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xed0000000066ULL: s390_format_RXY_FRRD(s390_irgen_STEY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ case 0xed0000000067ULL: s390_format_RXY_FRRD(s390_irgen_STDY, ovl.fmt.RXY.r1, -+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2, -+ ovl.fmt.RXY.dl2, -+ ovl.fmt.RXY.dh2); goto ok; -+ } -+ -+ switch (((ovl.value >> 16) & 0xff0f00000000ULL) >> 32) { -+ case 0xc000ULL: s390_format_RIL_RP(s390_irgen_LARL, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc001ULL: s390_format_RIL_RI(s390_irgen_LGFI, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc004ULL: s390_format_RIL(s390_irgen_BRCL, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc005ULL: s390_format_RIL_RP(s390_irgen_BRASL, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc006ULL: s390_format_RIL_RU(s390_irgen_XIHF, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc007ULL: s390_format_RIL_RU(s390_irgen_XILF, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc008ULL: s390_format_RIL_RU(s390_irgen_IIHF, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc009ULL: s390_format_RIL_RU(s390_irgen_IILF, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc00aULL: s390_format_RIL_RU(s390_irgen_NIHF, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc00bULL: s390_format_RIL_RU(s390_irgen_NILF, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc00cULL: s390_format_RIL_RU(s390_irgen_OIHF, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc00dULL: s390_format_RIL_RU(s390_irgen_OILF, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc00eULL: s390_format_RIL_RU(s390_irgen_LLIHF, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc00fULL: s390_format_RIL_RU(s390_irgen_LLILF, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc200ULL: s390_format_RIL_RI(s390_irgen_MSGFI, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc201ULL: s390_format_RIL_RI(s390_irgen_MSFI, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc204ULL: s390_format_RIL_RU(s390_irgen_SLGFI, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc205ULL: s390_format_RIL_RU(s390_irgen_SLFI, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc208ULL: s390_format_RIL_RI(s390_irgen_AGFI, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc209ULL: s390_format_RIL_RI(s390_irgen_AFI, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc20aULL: s390_format_RIL_RU(s390_irgen_ALGFI, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc20bULL: s390_format_RIL_RU(s390_irgen_ALFI, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc20cULL: s390_format_RIL_RI(s390_irgen_CGFI, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc20dULL: s390_format_RIL_RI(s390_irgen_CFI, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc20eULL: s390_format_RIL_RU(s390_irgen_CLGFI, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc20fULL: s390_format_RIL_RU(s390_irgen_CLFI, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc402ULL: s390_format_RIL_RP(s390_irgen_LLHRL, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc404ULL: s390_format_RIL_RP(s390_irgen_LGHRL, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc405ULL: s390_format_RIL_RP(s390_irgen_LHRL, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc406ULL: s390_format_RIL_RP(s390_irgen_LLGHRL, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc407ULL: s390_format_RIL_RP(s390_irgen_STHRL, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc408ULL: s390_format_RIL_RP(s390_irgen_LGRL, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc40bULL: s390_format_RIL_RP(s390_irgen_STGRL, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc40cULL: s390_format_RIL_RP(s390_irgen_LGFRL, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc40dULL: s390_format_RIL_RP(s390_irgen_LRL, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc40eULL: s390_format_RIL_RP(s390_irgen_LLGFRL, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc40fULL: s390_format_RIL_RP(s390_irgen_STRL, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc600ULL: s390_format_RIL_RP(s390_irgen_EXRL, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc602ULL: s390_format_RIL_UP(s390_irgen_PFDRL, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc604ULL: s390_format_RIL_RP(s390_irgen_CGHRL, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc605ULL: s390_format_RIL_RP(s390_irgen_CHRL, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc606ULL: s390_format_RIL_RP(s390_irgen_CLGHRL, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc607ULL: s390_format_RIL_RP(s390_irgen_CLHRL, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc608ULL: s390_format_RIL_RP(s390_irgen_CGRL, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc60aULL: s390_format_RIL_RP(s390_irgen_CLGRL, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc60cULL: s390_format_RIL_RP(s390_irgen_CGFRL, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc60dULL: s390_format_RIL_RP(s390_irgen_CRL, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc60eULL: s390_format_RIL_RP(s390_irgen_CLGFRL, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc60fULL: s390_format_RIL_RP(s390_irgen_CLRL, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xc800ULL: /* MVCOS */ goto unimplemented; -+ case 0xc801ULL: /* ECTG */ goto unimplemented; -+ case 0xc802ULL: /* CSST */ goto unimplemented; -+ case 0xc804ULL: /* LPD */ goto unimplemented; -+ case 0xc805ULL: /* LPDG */ goto unimplemented; -+ case 0xcc06ULL: /* BRCTH */ goto unimplemented; -+ case 0xcc08ULL: s390_format_RIL_RI(s390_irgen_AIH, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xcc0aULL: s390_format_RIL_RI(s390_irgen_ALSIH, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xcc0bULL: s390_format_RIL_RI(s390_irgen_ALSIHN, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xcc0dULL: s390_format_RIL_RI(s390_irgen_CIH, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ case 0xcc0fULL: s390_format_RIL_RU(s390_irgen_CLIH, ovl.fmt.RIL.r1, -+ ovl.fmt.RIL.i2); goto ok; -+ } -+ -+ switch (((ovl.value >> 16) & 0xff0000000000ULL) >> 40) { -+ case 0xd0ULL: /* TRTR */ goto unimplemented; -+ case 0xd1ULL: /* MVN */ goto unimplemented; -+ case 0xd2ULL: s390_format_SS_L0RDRD(s390_irgen_MVC, ovl.fmt.SS.l, -+ ovl.fmt.SS.b1, ovl.fmt.SS.d1, -+ ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok; -+ case 0xd3ULL: /* MVZ */ goto unimplemented; -+ case 0xd4ULL: s390_format_SS_L0RDRD(s390_irgen_NC, ovl.fmt.SS.l, -+ ovl.fmt.SS.b1, ovl.fmt.SS.d1, -+ ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok; -+ case 0xd5ULL: s390_format_SS_L0RDRD(s390_irgen_CLC, ovl.fmt.SS.l, -+ ovl.fmt.SS.b1, ovl.fmt.SS.d1, -+ ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok; -+ case 0xd6ULL: s390_format_SS_L0RDRD(s390_irgen_OC, ovl.fmt.SS.l, -+ ovl.fmt.SS.b1, ovl.fmt.SS.d1, -+ ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok; -+ case 0xd7ULL: s390_format_SS_L0RDRD(s390_irgen_XC, ovl.fmt.SS.l, -+ ovl.fmt.SS.b1, ovl.fmt.SS.d1, -+ ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok; -+ case 0xd9ULL: /* MVCK */ goto unimplemented; -+ case 0xdaULL: /* MVCP */ goto unimplemented; -+ case 0xdbULL: /* MVCS */ goto unimplemented; -+ case 0xdcULL: /* TR */ goto unimplemented; -+ case 0xddULL: /* TRT */ goto unimplemented; -+ case 0xdeULL: /* ED */ goto unimplemented; -+ case 0xdfULL: /* EDMK */ goto unimplemented; -+ case 0xe1ULL: /* PKU */ goto unimplemented; -+ case 0xe2ULL: /* UNPKU */ goto unimplemented; -+ case 0xe8ULL: /* MVCIN */ goto unimplemented; -+ case 0xe9ULL: /* PKA */ goto unimplemented; -+ case 0xeaULL: /* UNPKA */ goto unimplemented; -+ case 0xeeULL: /* PLO */ goto unimplemented; -+ case 0xefULL: /* LMD */ goto unimplemented; -+ case 0xf0ULL: /* SRP */ goto unimplemented; -+ case 0xf1ULL: /* MVO */ goto unimplemented; -+ case 0xf2ULL: /* PACK */ goto unimplemented; -+ case 0xf3ULL: /* UNPK */ goto unimplemented; -+ case 0xf8ULL: /* ZAP */ goto unimplemented; -+ case 0xf9ULL: /* CP */ goto unimplemented; -+ case 0xfaULL: /* AP */ goto unimplemented; -+ case 0xfbULL: /* SP */ goto unimplemented; -+ case 0xfcULL: /* MP */ goto unimplemented; -+ case 0xfdULL: /* DP */ goto unimplemented; -+ } -+ -+ switch (((ovl.value >> 16) & 0xffff00000000ULL) >> 32) { -+ case 0xe500ULL: /* LASP */ goto unimplemented; -+ case 0xe501ULL: /* TPROT */ goto unimplemented; -+ case 0xe502ULL: /* STRAG */ goto unimplemented; -+ case 0xe50eULL: /* MVCSK */ goto unimplemented; -+ case 0xe50fULL: /* MVCDK */ goto unimplemented; -+ case 0xe544ULL: s390_format_SIL_RDI(s390_irgen_MVHHI, ovl.fmt.SIL.b1, -+ ovl.fmt.SIL.d1, ovl.fmt.SIL.i2); -+ goto ok; -+ case 0xe548ULL: s390_format_SIL_RDI(s390_irgen_MVGHI, ovl.fmt.SIL.b1, -+ ovl.fmt.SIL.d1, ovl.fmt.SIL.i2); -+ goto ok; -+ case 0xe54cULL: s390_format_SIL_RDI(s390_irgen_MVHI, ovl.fmt.SIL.b1, -+ ovl.fmt.SIL.d1, ovl.fmt.SIL.i2); -+ goto ok; -+ case 0xe554ULL: s390_format_SIL_RDI(s390_irgen_CHHSI, ovl.fmt.SIL.b1, -+ ovl.fmt.SIL.d1, ovl.fmt.SIL.i2); -+ goto ok; -+ case 0xe555ULL: s390_format_SIL_RDU(s390_irgen_CLHHSI, ovl.fmt.SIL.b1, -+ ovl.fmt.SIL.d1, ovl.fmt.SIL.i2); -+ goto ok; -+ case 0xe558ULL: s390_format_SIL_RDI(s390_irgen_CGHSI, ovl.fmt.SIL.b1, -+ ovl.fmt.SIL.d1, ovl.fmt.SIL.i2); -+ goto ok; -+ case 0xe559ULL: s390_format_SIL_RDU(s390_irgen_CLGHSI, ovl.fmt.SIL.b1, -+ ovl.fmt.SIL.d1, ovl.fmt.SIL.i2); -+ goto ok; -+ case 0xe55cULL: s390_format_SIL_RDI(s390_irgen_CHSI, ovl.fmt.SIL.b1, -+ ovl.fmt.SIL.d1, ovl.fmt.SIL.i2); -+ goto ok; -+ case 0xe55dULL: s390_format_SIL_RDU(s390_irgen_CLFHSI, ovl.fmt.SIL.b1, -+ ovl.fmt.SIL.d1, ovl.fmt.SIL.i2); -+ goto ok; -+ } -+ -+ return S390_DECODE_UNKNOWN_INSN; -+ -+ok: -+ return S390_DECODE_OK; -+ -+unimplemented: -+ return S390_DECODE_UNIMPLEMENTED_INSN; -+} -+ -+/* Handle "special" instructions. */ -+static s390_decode_t -+s390_decode_special_and_irgen(UChar *bytes) -+{ -+ s390_decode_t status = S390_DECODE_OK; -+ -+ /* Got a "Special" instruction preamble. Which one is it? */ -+ if (bytes[0] == 0x18 && bytes[1] == 0x22 /* lr %r2, %r2 */) { -+ s390_irgen_client_request(); -+ } else if (bytes[0] == 0x18 && bytes[1] == 0x33 /* lr %r3, %r3 */) { -+ s390_irgen_guest_NRADDR(); -+ } else if (bytes[0] == 0x18 && bytes[1] == 0x44 /* lr %r4, %r4 */) { -+ s390_irgen_call_noredir(); -+ } else { -+ /* We don't know what it is. */ -+ return S390_DECODE_UNKNOWN_SPECIAL_INSN; -+ } -+ -+ dis_res->len = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE; -+ -+ return status; -+} -+ -+ -+/* Function returns # bytes that were decoded or 0 in case of failure */ -+UInt -+s390_decode_and_irgen(UChar *bytes, UInt insn_length, DisResult *dres) -+{ -+ s390_decode_t status; -+ -+ dis_res = dres; -+ -+ /* Spot the 8-byte preamble: 18ff lr r15,r15 -+ 1811 lr r1,r1 -+ 1822 lr r2,r2 -+ 1833 lr r3,r3 */ -+ if (bytes[ 0] == 0x18 && bytes[ 1] == 0xff && bytes[ 2] == 0x18 && -+ bytes[ 3] == 0x11 && bytes[ 4] == 0x18 && bytes[ 5] == 0x22 && -+ bytes[ 6] == 0x18 && bytes[ 7] == 0x33) { -+ -+ /* Handle special instruction that follows that preamble. */ -+ if (0) vex_printf("special function handling...\n"); -+ bytes += S390_SPECIAL_OP_PREAMBLE_SIZE; -+ status = s390_decode_special_and_irgen(bytes); -+ insn_length = S390_SPECIAL_OP_SIZE; -+ } else { -+ /* Handle normal instructions. */ -+ switch (insn_length) { -+ case 2: -+ status = s390_decode_2byte_and_irgen(bytes); -+ break; -+ -+ case 4: -+ status = s390_decode_4byte_and_irgen(bytes); -+ break; -+ -+ case 6: -+ status = s390_decode_6byte_and_irgen(bytes); -+ break; -+ -+ default: -+ status = S390_DECODE_ERROR; -+ break; -+ } -+ } -+ /* next instruction is execute, stop here */ -+ if (irsb->next == NULL && (*(char *)(HWord) guest_IA_next_instr == 0x44)) { -+ irsb->next = IRExpr_Const(IRConst_U64(guest_IA_next_instr)); -+ dis_res->whatNext = Dis_StopHere; -+ } -+ -+ if (status == S390_DECODE_OK) return insn_length; /* OK */ -+ -+ /* Decoding failed somehow */ -+ vex_printf("vex s390->IR: "); -+ switch (status) { -+ case S390_DECODE_UNKNOWN_INSN: -+ vex_printf("unknown insn: "); -+ break; -+ -+ case S390_DECODE_UNIMPLEMENTED_INSN: -+ vex_printf("unimplemented insn: "); -+ break; -+ -+ case S390_DECODE_UNKNOWN_SPECIAL_INSN: -+ vex_printf("unimplemented special insn: "); -+ break; -+ -+ default: -+ case S390_DECODE_ERROR: -+ vex_printf("decoding error: "); -+ break; -+ } -+ -+ vex_printf("%02x%02x", bytes[0], bytes[1]); -+ if (insn_length > 2) { -+ vex_printf(" %02x%02x", bytes[2], bytes[3]); -+ } -+ if (insn_length > 4) { -+ vex_printf(" %02x%02x", bytes[4], bytes[5]); -+ } -+ vex_printf("\n"); -+ -+ return 0; /* Failed */ -+} -+ -+ -+/* Generate an IRExpr for an address. */ -+static __inline__ IRExpr * -+mkaddr_expr(Addr64 addr) -+{ -+ return IRExpr_Const(IRConst_U64(addr)); -+} -+ -+ -+/* Disassemble a single instruction INSN into IR. */ -+static DisResult -+disInstr_S390_WRK(UChar *insn, Bool (*resteerOkFn)(void *, Addr64), -+ void *callback_data) -+{ -+ UChar byte; -+ UInt insn_length; -+ DisResult dres; -+ -+ /* ---------------------------------------------------- */ -+ /* --- Compute instruction length -- */ -+ /* ---------------------------------------------------- */ -+ -+ /* Get the first byte of the insn. */ -+ byte = insn[0]; -+ -+ /* The leftmost two bits (0:1) encode the length of the insn in bytes. -+ 00 -> 2 bytes, 01 -> 4 bytes, 10 -> 4 bytes, 11 -> 6 bytes. */ -+ insn_length = ((((byte >> 6) + 1) >> 1) + 1) << 1; -+ -+ guest_IA_next_instr = guest_IA_curr_instr + insn_length; -+ -+ /* ---------------------------------------------------- */ -+ /* --- Initialise the DisResult data -- */ -+ /* ---------------------------------------------------- */ -+ dres.whatNext = Dis_Continue; -+ dres.len = insn_length; -+ dres.continueAt = 0; -+ -+ /* fixs390: we should probably pass the resteer-function and the callback -+ data. It's not needed for correctness but improves performance. */ -+ -+ /* Normal and special instruction handling starts here. */ -+ if (s390_decode_and_irgen(insn, insn_length, &dres) == 0) { -+ /* All decode failures end up here. The decoder has already issued an -+ error message. -+ Tell the dispatcher that this insn cannot be decoded, and so has -+ not been executed, and (is currently) the next to be executed. -+ IA should be up-to-date since it made so at the start of each -+ insn, but nevertheless be paranoid and update it again right -+ now. */ -+ addStmtToIRSB(irsb, IRStmt_Put(S390_GUEST_OFFSET(guest_IA), -+ mkaddr_expr(guest_IA_curr_instr))); -+ -+ irsb->next = mkaddr_expr(guest_IA_curr_instr); -+ irsb->jumpkind = Ijk_NoDecode; -+ dres.whatNext = Dis_StopHere; -+ dres.len = 0; -+ -+ return dres; -+ } -+ -+ return dres; -+} -+ -+ -+/*------------------------------------------------------------*/ -+/*--- Top-level fn ---*/ -+/*------------------------------------------------------------*/ -+ -+/* Disassemble a single instruction into IR. The instruction -+ is located in host memory at &guest_code[delta]. */ -+ -+DisResult -+disInstr_S390(IRSB *irsb_IN, -+ Bool put_IP, -+ Bool (*resteerOkFn)(void *, Addr64), -+ Bool resteerCisOk, -+ void *callback_opaque, -+ UChar *guest_code, -+ Long delta, -+ Addr64 guest_IP, -+ VexArch guest_arch, -+ VexArchInfo *archinfo, -+ VexAbiInfo *abiinfo, -+ Bool host_bigendian) -+{ -+ vassert(guest_arch == VexArchS390X); -+ -+ /* The instruction decoder requires a big-endian machine. */ -+ vassert(host_bigendian == True); -+ -+ /* Set globals (see top of this file) */ -+ guest_IA_curr_instr = guest_IP; -+ -+ irsb = irsb_IN; -+ -+ vassert(guest_arch == VexArchS390X); -+ -+ /* We may be asked to update the guest IA before going further. */ -+ if (put_IP) -+ addStmtToIRSB(irsb, IRStmt_Put(S390_GUEST_OFFSET(guest_IA), -+ mkaddr_expr(guest_IA_curr_instr))); -+ -+ return disInstr_S390_WRK(guest_code + delta, resteerOkFn, callback_opaque); -+} -+ -+/*---------------------------------------------------------------*/ -+/*--- end guest_s390_toIR.c ---*/ -+/*---------------------------------------------------------------*/ ---- VEX/priv/host_s390_defs.c -+++ VEX/priv/host_s390_defs.c -@@ -0,0 +1,6804 @@ -+/* -*- mode: C; c-basic-offset: 3; -*- */ -+ -+/*---------------------------------------------------------------*/ -+/*--- begin host_s390_defs.c ---*/ -+/*---------------------------------------------------------------*/ -+ -+/* -+ This file is part of Valgrind, a dynamic binary instrumentation -+ framework. -+ -+ Copyright IBM Corp. 2010,2011 -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA -+ 02110-1301, USA. -+ -+ The GNU General Public License is contained in the file COPYING. -+*/ -+ -+/* Contributed by Florian Krohm */ -+ -+#include "libvex_basictypes.h" -+#include "libvex.h" -+#include "libvex_trc_values.h" -+#include "libvex_guest_offsets.h" -+#include "libvex_s390x.h" -+ -+#include "main_util.h" -+#include "main_globals.h" -+#include "host_generic_regs.h" -+#include "host_s390_defs.h" -+#include "host_s390_disasm.h" -+#include -+ -+/* KLUDGE: We need to know the hwcaps of the host when generating -+ code. But that info is not passed to emit_S390Instr. Only mode64 is -+ being passed. So, ideally, we want this passed as an argument, too. -+ Until then, we use a global variable. This variable is set as a side -+ effect of iselSB_S390. This is safe because instructions are selected -+ before they are emitted. */ -+const VexArchInfo *s390_archinfo_host; -+ -+/*------------------------------------------------------------*/ -+/*--- Registers ---*/ -+/*------------------------------------------------------------*/ -+ -+/* Decompile the given register into a static buffer and return it */ -+const HChar * -+s390_hreg_as_string(HReg reg) -+{ -+ static HChar buf[10]; -+ -+ static const HChar ireg_names[16][5] = { -+ "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", -+ "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15" -+ }; -+ -+ static const HChar freg_names[16][5] = { -+ "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7", -+ "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15" -+ }; -+ -+ UInt r; /* hregNumber() returns an UInt */ -+ -+ r = hregNumber(reg); -+ -+ /* Be generic for all virtual regs. */ -+ if (hregIsVirtual(reg)) { -+ buf[0] = '\0'; -+ switch (hregClass(reg)) { -+ case HRcInt64: vex_sprintf(buf, "%%vR%d", r); break; -+ case HRcFlt64: vex_sprintf(buf, "%%vF%d", r); break; -+ default: goto fail; -+ } -+ return buf; -+ } -+ -+ /* But specific for real regs. */ -+ vassert(r < 16); -+ -+ switch (hregClass(reg)) { -+ case HRcInt64: return ireg_names[r]; -+ case HRcFlt64: return freg_names[r]; -+ default: goto fail; -+ } -+ -+ fail: vpanic("s390_hreg_as_string"); -+} -+ -+ -+/* Tell the register allocator which registers can be allocated. */ -+void -+s390_hreg_get_allocable(Int *nregs, HReg **arr) -+{ -+ UInt i; -+ -+ /* Total number of allocable registers (all classes) */ -+ *nregs = 16 /* GPRs */ -+ - 1 /* r0 */ -+ - 1 /* r12 register holding VG_(dispatch_ctr) */ -+ - 1 /* r13 guest state pointer */ -+ - 1 /* r14 link register */ -+ - 1 /* r15 stack pointer */ -+ + 16 /* FPRs */ -+ ; -+ -+ *arr = LibVEX_Alloc(*nregs * sizeof(HReg)); -+ -+ i = 0; -+ -+ /* GPR0 is not available because it is interpreted as 0, when used -+ as a base or index register. */ -+ (*arr)[i++] = mkHReg(1, HRcInt64, False); -+ (*arr)[i++] = mkHReg(2, HRcInt64, False); -+ (*arr)[i++] = mkHReg(3, HRcInt64, False); -+ (*arr)[i++] = mkHReg(4, HRcInt64, False); -+ (*arr)[i++] = mkHReg(5, HRcInt64, False); -+ (*arr)[i++] = mkHReg(6, HRcInt64, False); -+ (*arr)[i++] = mkHReg(7, HRcInt64, False); -+ (*arr)[i++] = mkHReg(8, HRcInt64, False); -+ (*arr)[i++] = mkHReg(9, HRcInt64, False); -+ /* GPR10 and GPR11 are used for instructions that use register pairs. -+ Otherwise, they are available to the allocator */ -+ (*arr)[i++] = mkHReg(10, HRcInt64, False); -+ (*arr)[i++] = mkHReg(11, HRcInt64, False); -+ /* GPR12 is not available because it caches VG_(dispatch_ctr) */ -+ /* GPR13 is not available because it is used as guest state pointer */ -+ /* GPR14 is not available because it is used as link register */ -+ /* GPR15 is not available because it is used as stack pointer */ -+ -+ /* Add the available real (non-virtual) FPRs */ -+ (*arr)[i++] = mkHReg(0, HRcFlt64, False); -+ (*arr)[i++] = mkHReg(1, HRcFlt64, False); -+ (*arr)[i++] = mkHReg(2, HRcFlt64, False); -+ (*arr)[i++] = mkHReg(3, HRcFlt64, False); -+ (*arr)[i++] = mkHReg(4, HRcFlt64, False); -+ (*arr)[i++] = mkHReg(5, HRcFlt64, False); -+ (*arr)[i++] = mkHReg(6, HRcFlt64, False); -+ (*arr)[i++] = mkHReg(7, HRcFlt64, False); -+ (*arr)[i++] = mkHReg(8, HRcFlt64, False); -+ (*arr)[i++] = mkHReg(9, HRcFlt64, False); -+ (*arr)[i++] = mkHReg(10, HRcFlt64, False); -+ (*arr)[i++] = mkHReg(11, HRcFlt64, False); -+ (*arr)[i++] = mkHReg(12, HRcFlt64, False); -+ (*arr)[i++] = mkHReg(13, HRcFlt64, False); -+ (*arr)[i++] = mkHReg(14, HRcFlt64, False); -+ (*arr)[i++] = mkHReg(15, HRcFlt64, False); -+ /* FPR12 - FPR15 are also used as register pairs for 128-bit -+ floating point operations */ -+} -+ -+ -+/* Return the real register that holds the guest state pointer */ -+HReg -+s390_hreg_guest_state_pointer(void) -+{ -+ return mkHReg(S390_REGNO_GUEST_STATE_POINTER, HRcInt64, False); -+} -+ -+/* Is VALUE within the domain of a 20-bit signed integer. */ -+static __inline__ Bool -+fits_signed_20bit(Int value) -+{ -+ return ((value << 12) >> 12) == value; -+} -+ -+ -+/* Is VALUE within the domain of a 12-bit unsigned integer. */ -+static __inline__ Bool -+fits_unsigned_12bit(Int value) -+{ -+ return (value & 0xFFF) == value; -+} -+ -+/*------------------------------------------------------------*/ -+/*--- Addressing modes (amodes) ---*/ -+/*------------------------------------------------------------*/ -+ -+/* Construct a b12 amode. */ -+s390_amode * -+s390_amode_b12(Int d, HReg b) -+{ -+ s390_amode *am = LibVEX_Alloc(sizeof(s390_amode)); -+ -+ vassert(fits_unsigned_12bit(d)); -+ -+ am->tag = S390_AMODE_B12; -+ am->d = d; -+ am->b = b; -+ am->x = 0; /* hregNumber(0) == 0 */ -+ -+ return am; -+} -+ -+ -+/* Construct a b20 amode. */ -+s390_amode * -+s390_amode_b20(Int d, HReg b) -+{ -+ s390_amode *am = LibVEX_Alloc(sizeof(s390_amode)); -+ -+ vassert(fits_signed_20bit(d)); -+ -+ am->tag = S390_AMODE_B20; -+ am->d = d; -+ am->b = b; -+ am->x = 0; /* hregNumber(0) == 0 */ -+ -+ return am; -+} -+ -+ -+/* Construct a bx12 amode. */ -+s390_amode * -+s390_amode_bx12(Int d, HReg b, HReg x) -+{ -+ s390_amode *am = LibVEX_Alloc(sizeof(s390_amode)); -+ -+ vassert(fits_unsigned_12bit(d)); -+ vassert(b != 0); -+ vassert(x != 0); -+ -+ am->tag = S390_AMODE_BX12; -+ am->d = d; -+ am->b = b; -+ am->x = x; -+ -+ return am; -+} -+ -+ -+/* Construct a bx20 amode. */ -+s390_amode * -+s390_amode_bx20(Int d, HReg b, HReg x) -+{ -+ s390_amode *am = LibVEX_Alloc(sizeof(s390_amode)); -+ -+ vassert(fits_signed_20bit(d)); -+ vassert(b != 0); -+ vassert(x != 0); -+ -+ am->tag = S390_AMODE_BX20; -+ am->d = d; -+ am->b = b; -+ am->x = x; -+ -+ return am; -+} -+ -+ -+/* Construct an AMODE for accessing the guest state at OFFSET */ -+s390_amode * -+s390_amode_for_guest_state(Int offset) -+{ -+ if (fits_unsigned_12bit(offset)) -+ return s390_amode_b12(offset, s390_hreg_guest_state_pointer()); -+ if (fits_signed_20bit(offset)) -+ return s390_amode_b20(offset, s390_hreg_guest_state_pointer()); -+ -+ vpanic("invalid guest state offset"); -+} -+ -+ -+/* Decompile the given amode into a static buffer and return it. */ -+const HChar * -+s390_amode_as_string(const s390_amode *am) -+{ -+ static HChar buf[30]; -+ HChar *p; -+ -+ buf[0] = '\0'; -+ p = buf; -+ -+ switch (am->tag) { -+ case S390_AMODE_B12: -+ case S390_AMODE_B20: -+ vex_sprintf(p, "%d(%s)", am->d, s390_hreg_as_string(am->b)); -+ break; -+ -+ case S390_AMODE_BX12: -+ case S390_AMODE_BX20: -+ /* s390_hreg_as_string returns pointer to local buffer. Need to -+ split this into two printfs */ -+ p += vex_sprintf(p, "%d(%s,", am->d, s390_hreg_as_string(am->x)); -+ vex_sprintf(p, "%s)", s390_hreg_as_string(am->b)); -+ break; -+ -+ default: -+ vpanic("s390_amode_as_string"); -+ } -+ -+ return buf; -+} -+ -+ -+/* Helper function for s390_amode_is_sane */ -+static __inline__ Bool -+is_virtual_gpr(HReg reg) -+{ -+ return hregIsVirtual(reg) && hregClass(reg) == HRcInt64; -+} -+ -+ -+/* Sanity check for an amode */ -+Bool -+s390_amode_is_sane(const s390_amode *am) -+{ -+ switch (am->tag) { -+ case S390_AMODE_B12: -+ return is_virtual_gpr(am->b) && fits_unsigned_12bit(am->d); -+ -+ case S390_AMODE_B20: -+ return is_virtual_gpr(am->b) && fits_signed_20bit(am->d); -+ -+ case S390_AMODE_BX12: -+ return is_virtual_gpr(am->b) && is_virtual_gpr(am->x) && -+ fits_unsigned_12bit(am->d); -+ -+ case S390_AMODE_BX20: -+ return is_virtual_gpr(am->b) && is_virtual_gpr(am->x) && -+ fits_signed_20bit(am->d); -+ -+ default: -+ vpanic("s390_amode_is_sane"); -+ } -+} -+ -+ -+/* Record the register use of an amode */ -+void -+s390_amode_get_reg_usage(HRegUsage *u, const s390_amode *am) -+{ -+ switch (am->tag) { -+ case S390_AMODE_B12: -+ case S390_AMODE_B20: -+ addHRegUse(u, HRmRead, am->b); -+ return; -+ -+ case S390_AMODE_BX12: -+ case S390_AMODE_BX20: -+ addHRegUse(u, HRmRead, am->b); -+ addHRegUse(u, HRmRead, am->x); -+ return; -+ -+ default: -+ vpanic("s390_amode_get_reg_usage"); -+ } -+} -+ -+ -+void -+s390_amode_map_regs(HRegRemap *m, s390_amode *am) -+{ -+ switch (am->tag) { -+ case S390_AMODE_B12: -+ case S390_AMODE_B20: -+ am->b = lookupHRegRemap(m, am->b); -+ return; -+ -+ case S390_AMODE_BX12: -+ case S390_AMODE_BX20: -+ am->b = lookupHRegRemap(m, am->b); -+ am->x = lookupHRegRemap(m, am->x); -+ return; -+ -+ default: -+ vpanic("s390_amode_map_regs"); -+ } -+} -+ -+ -+ -+void -+ppS390AMode(struct s390_amode *am) -+{ -+ vex_printf("%s", s390_amode_as_string(am)); -+} -+ -+void -+ppS390Instr(struct s390_insn *insn, Bool mode64) -+{ -+ vex_printf("%s", s390_insn_as_string(insn)); -+} -+ -+void -+ppHRegS390(HReg reg) -+{ -+ vex_printf("%s", s390_hreg_as_string(reg)); -+} -+ -+/*------------------------------------------------------------*/ -+/*--- Helpers for register allocation ---*/ -+/*------------------------------------------------------------*/ -+ -+/* Called once per translation. */ -+void -+getAllocableRegs_S390(Int *nregs, HReg **arr, Bool mode64) -+{ -+ s390_hreg_get_allocable(nregs, arr); -+} -+ -+ -+/* Tell the register allocator how the given instruction uses the registers -+ it refers to. */ -+void -+getRegUsage_S390Instr(HRegUsage *u, struct s390_insn *insn, Bool mode64) -+{ -+ s390_insn_get_reg_usage(u, insn); -+} -+ -+ -+/* Map the registers of the given instruction */ -+void -+mapRegs_S390Instr(HRegRemap *m, struct s390_insn *insn, Bool mode64) -+{ -+ s390_insn_map_regs(m, insn); -+} -+ -+ -+/* Figure out if the given insn represents a reg-reg move, and if so -+ assign the source and destination to *src and *dst. If in doubt say No. -+ Used by the register allocator to do move coalescing. */ -+Bool -+isMove_S390Instr(struct s390_insn *insn, HReg *src, HReg *dst) -+{ -+ return s390_insn_is_reg_reg_move(insn, src, dst); -+} -+ -+ -+/* Generate s390 spill/reload instructions under the direction of the -+ register allocator. Note it's critical these don't write the -+ condition codes. This is like an Ist_Put */ -+void -+genSpill_S390(HInstr **i1, HInstr **i2, HReg rreg, Int offsetB, Bool mode64) -+{ -+ s390_amode *am; -+ -+ vassert(offsetB >= 0); -+ vassert(offsetB <= (1 << 12)); /* because we use b12 amode */ -+ vassert(!hregIsVirtual(rreg)); -+ -+ *i1 = *i2 = NULL; -+ -+ am = s390_amode_for_guest_state(offsetB); -+ -+ switch (hregClass(rreg)) { -+ case HRcInt64: -+ case HRcFlt64: -+ *i1 = s390_insn_store(8, am, rreg); -+ return; -+ -+ default: -+ ppHRegClass(hregClass(rreg)); -+ vpanic("genSpill_S390: unimplemented regclass"); -+ } -+} -+ -+ -+/* This is like an Iex_Get */ -+void -+genReload_S390(HInstr **i1, HInstr **i2, HReg rreg, Int offsetB, Bool mode64) -+{ -+ s390_amode *am; -+ -+ vassert(offsetB >= 0); -+ vassert(offsetB <= (1 << 12)); /* because we use b12 amode */ -+ vassert(!hregIsVirtual(rreg)); -+ -+ *i1 = *i2 = NULL; -+ -+ am = s390_amode_for_guest_state(offsetB); -+ -+ switch (hregClass(rreg)) { -+ case HRcInt64: -+ case HRcFlt64: -+ *i1 = s390_insn_load(8, rreg, am); -+ return; -+ -+ default: -+ ppHRegClass(hregClass(rreg)); -+ vpanic("genReload_S390: unimplemented regclass"); -+ } -+} -+ -+/* Helper function for s390_insn_get_reg_usage */ -+static void -+s390_opnd_RMI_get_reg_usage(HRegUsage *u, s390_opnd_RMI op) -+{ -+ switch (op.tag) { -+ case S390_OPND_REG: -+ addHRegUse(u, HRmRead, op.variant.reg); -+ break; -+ -+ case S390_OPND_AMODE: -+ s390_amode_get_reg_usage(u, op.variant.am); -+ break; -+ -+ case S390_OPND_IMMEDIATE: -+ break; -+ -+ default: -+ vpanic("s390_opnd_RMI_get_reg_usage"); -+ } -+} -+ -+ -+/* Tell the register allocator how the given insn uses the registers */ -+void -+s390_insn_get_reg_usage(HRegUsage *u, const s390_insn *insn) -+{ -+ initHRegUsage(u); -+ -+ switch (insn->tag) { -+ case S390_INSN_LOAD: -+ addHRegUse(u, HRmWrite, insn->variant.load.dst); -+ s390_amode_get_reg_usage(u, insn->variant.load.src); -+ break; -+ -+ case S390_INSN_LOAD_IMMEDIATE: -+ addHRegUse(u, HRmWrite, insn->variant.load_immediate.dst); -+ break; -+ -+ case S390_INSN_STORE: -+ addHRegUse(u, HRmRead, insn->variant.store.src); -+ s390_amode_get_reg_usage(u, insn->variant.store.dst); -+ break; -+ -+ case S390_INSN_MOVE: -+ addHRegUse(u, HRmRead, insn->variant.move.src); -+ addHRegUse(u, HRmWrite, insn->variant.move.dst); -+ break; -+ -+ case S390_INSN_COND_MOVE: -+ s390_opnd_RMI_get_reg_usage(u, insn->variant.cond_move.src); -+ addHRegUse(u, HRmWrite, insn->variant.cond_move.dst); -+ break; -+ -+ case S390_INSN_ALU: -+ addHRegUse(u, HRmWrite, insn->variant.alu.dst); -+ addHRegUse(u, HRmRead, insn->variant.alu.dst); /* op1 */ -+ s390_opnd_RMI_get_reg_usage(u, insn->variant.alu.op2); -+ break; -+ -+ case S390_INSN_MUL: -+ addHRegUse(u, HRmRead, insn->variant.mul.dst_lo); /* op1 */ -+ addHRegUse(u, HRmWrite, insn->variant.mul.dst_lo); -+ addHRegUse(u, HRmWrite, insn->variant.mul.dst_hi); -+ s390_opnd_RMI_get_reg_usage(u, insn->variant.mul.op2); -+ break; -+ -+ case S390_INSN_DIV: -+ addHRegUse(u, HRmRead, insn->variant.div.op1_lo); -+ addHRegUse(u, HRmRead, insn->variant.div.op1_hi); -+ addHRegUse(u, HRmWrite, insn->variant.div.op1_lo); -+ addHRegUse(u, HRmWrite, insn->variant.div.op1_hi); -+ s390_opnd_RMI_get_reg_usage(u, insn->variant.div.op2); -+ break; -+ -+ case S390_INSN_DIVS: -+ addHRegUse(u, HRmRead, insn->variant.divs.op1); -+ addHRegUse(u, HRmWrite, insn->variant.divs.op1); /* quotient */ -+ addHRegUse(u, HRmWrite, insn->variant.divs.rem); /* remainder */ -+ s390_opnd_RMI_get_reg_usage(u, insn->variant.divs.op2); -+ break; -+ -+ case S390_INSN_FLOGR: -+ addHRegUse(u, HRmWrite, insn->variant.flogr.bitpos); -+ addHRegUse(u, HRmWrite, insn->variant.flogr.modval); -+ s390_opnd_RMI_get_reg_usage(u, insn->variant.flogr.src); -+ break; -+ -+ case S390_INSN_UNOP: -+ addHRegUse(u, HRmWrite, insn->variant.unop.dst); -+ s390_opnd_RMI_get_reg_usage(u, insn->variant.unop.src); -+ break; -+ -+ case S390_INSN_TEST: -+ s390_opnd_RMI_get_reg_usage(u, insn->variant.test.src); -+ break; -+ -+ case S390_INSN_CC2BOOL: -+ addHRegUse(u, HRmWrite, insn->variant.cc2bool.dst); -+ break; -+ -+ case S390_INSN_CAS: -+ addHRegUse(u, HRmRead, insn->variant.cas.op1); -+ s390_amode_get_reg_usage(u, insn->variant.cas.op2); -+ addHRegUse(u, HRmRead, insn->variant.cas.op3); -+ addHRegUse(u, HRmWrite, insn->variant.cas.old_mem); -+ break; -+ -+ case S390_INSN_COMPARE: -+ addHRegUse(u, HRmRead, insn->variant.compare.src1); -+ s390_opnd_RMI_get_reg_usage(u, insn->variant.compare.src2); -+ break; -+ -+ case S390_INSN_BRANCH: -+ s390_opnd_RMI_get_reg_usage(u, insn->variant.branch.dst); -+ /* The destination address is loaded into S390_REGNO_RETURN_VALUE. -+ See s390_insn_branch_emit. */ -+ addHRegUse(u, HRmWrite, -+ mkHReg(S390_REGNO_RETURN_VALUE, HRcInt64, False)); -+ break; -+ -+ case S390_INSN_HELPER_CALL: { -+ UInt i; -+ -+ /* Assume that all volatile registers are clobbered. ABI says, -+ volatile registers are: r0 - r5. Valgrind's register allocator -+ does not know about r0, so we can leave that out */ -+ for (i = 1; i <= 5; ++i) { -+ addHRegUse(u, HRmWrite, mkHReg(i, HRcInt64, False)); -+ } -+ -+ /* Ditto for floating point registers. f0 - f7 are volatile */ -+ for (i = 0; i <= 7; ++i) { -+ addHRegUse(u, HRmWrite, mkHReg(i, HRcFlt64, False)); -+ } -+ -+ /* The registers that are used for passing arguments will be read. -+ Not all of them may, but in general we need to assume that. */ -+ for (i = 0; i < insn->variant.helper_call.num_args; ++i) { -+ addHRegUse(u, HRmRead, mkHReg(s390_gprno_from_arg_index(i), -+ HRcInt64, False)); -+ } -+ -+ /* s390_insn_helper_call_emit also reads / writes the link register -+ and stack pointer. But those registers are not visible to the -+ register allocator. So we don't need to do anything for them. */ -+ break; -+ } -+ -+ case S390_INSN_BFP_TRIOP: -+ addHRegUse(u, HRmWrite, insn->variant.bfp_triop.dst); -+ addHRegUse(u, HRmRead, insn->variant.bfp_triop.dst); /* first */ -+ addHRegUse(u, HRmRead, insn->variant.bfp_triop.op2); /* second */ -+ addHRegUse(u, HRmRead, insn->variant.bfp_triop.op3); /* third */ -+ break; -+ -+ case S390_INSN_BFP_BINOP: -+ addHRegUse(u, HRmWrite, insn->variant.bfp_binop.dst); -+ addHRegUse(u, HRmRead, insn->variant.bfp_binop.dst); /* left */ -+ addHRegUse(u, HRmRead, insn->variant.bfp_binop.op2); /* right */ -+ break; -+ -+ case S390_INSN_BFP_UNOP: -+ addHRegUse(u, HRmWrite, insn->variant.bfp_unop.dst); -+ addHRegUse(u, HRmRead, insn->variant.bfp_unop.op); /* operand */ -+ break; -+ -+ case S390_INSN_BFP_COMPARE: -+ addHRegUse(u, HRmWrite, insn->variant.bfp_compare.dst); -+ addHRegUse(u, HRmRead, insn->variant.bfp_compare.op1); /* left */ -+ addHRegUse(u, HRmRead, insn->variant.bfp_compare.op2); /* right */ -+ break; -+ -+ case S390_INSN_BFP128_BINOP: -+ addHRegUse(u, HRmWrite, insn->variant.bfp128_binop.dst_hi); -+ addHRegUse(u, HRmWrite, insn->variant.bfp128_binop.dst_lo); -+ addHRegUse(u, HRmRead, insn->variant.bfp128_binop.dst_hi); /* left */ -+ addHRegUse(u, HRmRead, insn->variant.bfp128_binop.dst_lo); /* left */ -+ addHRegUse(u, HRmRead, insn->variant.bfp128_binop.op2_hi); /* right */ -+ addHRegUse(u, HRmRead, insn->variant.bfp128_binop.op2_lo); /* right */ -+ break; -+ -+ case S390_INSN_BFP128_COMPARE: -+ addHRegUse(u, HRmWrite, insn->variant.bfp128_compare.dst); -+ addHRegUse(u, HRmRead, insn->variant.bfp128_compare.op1_hi); /* left */ -+ addHRegUse(u, HRmRead, insn->variant.bfp128_compare.op1_lo); /* left */ -+ addHRegUse(u, HRmRead, insn->variant.bfp128_compare.op2_hi); /* right */ -+ addHRegUse(u, HRmRead, insn->variant.bfp128_compare.op2_lo); /* right */ -+ break; -+ -+ case S390_INSN_BFP128_UNOP: -+ addHRegUse(u, HRmWrite, insn->variant.bfp128_unop.dst_hi); -+ addHRegUse(u, HRmWrite, insn->variant.bfp128_unop.dst_lo); -+ addHRegUse(u, HRmRead, insn->variant.bfp128_unop.op_hi); -+ addHRegUse(u, HRmRead, insn->variant.bfp128_unop.op_lo); -+ break; -+ -+ case S390_INSN_BFP128_CONVERT_TO: -+ addHRegUse(u, HRmWrite, insn->variant.bfp128_unop.dst_hi); -+ addHRegUse(u, HRmWrite, insn->variant.bfp128_unop.dst_lo); -+ addHRegUse(u, HRmRead, insn->variant.bfp128_unop.op_hi); -+ break; -+ -+ case S390_INSN_BFP128_CONVERT_FROM: -+ addHRegUse(u, HRmWrite, insn->variant.bfp128_unop.dst_hi); -+ addHRegUse(u, HRmRead, insn->variant.bfp128_unop.op_hi); -+ addHRegUse(u, HRmRead, insn->variant.bfp128_unop.op_lo); -+ break; -+ -+ default: -+ vpanic("s390_insn_get_reg_usage"); -+ } -+} -+ -+ -+/* Helper function for s390_insn_map_regs */ -+static void -+s390_opnd_RMI_map_regs(HRegRemap *m, s390_opnd_RMI *op) -+{ -+ switch (op->tag) { -+ case S390_OPND_REG: -+ op->variant.reg = lookupHRegRemap(m, op->variant.reg); -+ break; -+ -+ case S390_OPND_IMMEDIATE: -+ break; -+ -+ case S390_OPND_AMODE: -+ s390_amode_map_regs(m, op->variant.am); -+ break; -+ -+ default: -+ vpanic("s390_opnd_RMI_map_regs"); -+ } -+} -+ -+ -+void -+s390_insn_map_regs(HRegRemap *m, s390_insn *insn) -+{ -+ switch (insn->tag) { -+ case S390_INSN_LOAD: -+ insn->variant.load.dst = lookupHRegRemap(m, insn->variant.load.dst); -+ s390_amode_map_regs(m, insn->variant.load.src); -+ break; -+ -+ case S390_INSN_STORE: -+ s390_amode_map_regs(m, insn->variant.store.dst); -+ insn->variant.store.src = lookupHRegRemap(m, insn->variant.store.src); -+ break; -+ -+ case S390_INSN_MOVE: -+ insn->variant.move.dst = lookupHRegRemap(m, insn->variant.move.dst); -+ insn->variant.move.src = lookupHRegRemap(m, insn->variant.move.src); -+ break; -+ -+ case S390_INSN_COND_MOVE: -+ insn->variant.cond_move.dst = lookupHRegRemap(m, insn->variant.cond_move.dst); -+ s390_opnd_RMI_map_regs(m, &insn->variant.cond_move.src); -+ break; -+ -+ case S390_INSN_LOAD_IMMEDIATE: -+ insn->variant.load_immediate.dst = -+ lookupHRegRemap(m, insn->variant.load_immediate.dst); -+ break; -+ -+ case S390_INSN_ALU: -+ insn->variant.alu.dst = lookupHRegRemap(m, insn->variant.alu.dst); -+ s390_opnd_RMI_map_regs(m, &insn->variant.alu.op2); -+ break; -+ -+ case S390_INSN_MUL: -+ insn->variant.mul.dst_hi = lookupHRegRemap(m, insn->variant.mul.dst_hi); -+ insn->variant.mul.dst_lo = lookupHRegRemap(m, insn->variant.mul.dst_lo); -+ s390_opnd_RMI_map_regs(m, &insn->variant.mul.op2); -+ break; -+ -+ case S390_INSN_DIV: -+ insn->variant.div.op1_hi = lookupHRegRemap(m, insn->variant.div.op1_hi); -+ insn->variant.div.op1_lo = lookupHRegRemap(m, insn->variant.div.op1_lo); -+ s390_opnd_RMI_map_regs(m, &insn->variant.div.op2); -+ break; -+ -+ case S390_INSN_DIVS: -+ insn->variant.divs.op1 = lookupHRegRemap(m, insn->variant.divs.op1); -+ insn->variant.divs.rem = lookupHRegRemap(m, insn->variant.divs.rem); -+ s390_opnd_RMI_map_regs(m, &insn->variant.divs.op2); -+ break; -+ -+ case S390_INSN_FLOGR: -+ insn->variant.flogr.bitpos = lookupHRegRemap(m, insn->variant.flogr.bitpos); -+ insn->variant.flogr.modval = lookupHRegRemap(m, insn->variant.flogr.modval); -+ s390_opnd_RMI_map_regs(m, &insn->variant.flogr.src); -+ break; -+ -+ case S390_INSN_UNOP: -+ insn->variant.unop.dst = lookupHRegRemap(m, insn->variant.unop.dst); -+ s390_opnd_RMI_map_regs(m, &insn->variant.unop.src); -+ break; -+ -+ case S390_INSN_TEST: -+ s390_opnd_RMI_map_regs(m, &insn->variant.test.src); -+ break; -+ -+ case S390_INSN_CC2BOOL: -+ insn->variant.cc2bool.dst = lookupHRegRemap(m, insn->variant.cc2bool.dst); -+ break; -+ -+ case S390_INSN_CAS: -+ insn->variant.cas.op1 = lookupHRegRemap(m, insn->variant.cas.op1); -+ s390_amode_map_regs(m, insn->variant.cas.op2); -+ insn->variant.cas.op3 = lookupHRegRemap(m, insn->variant.cas.op3); -+ insn->variant.cas.old_mem = lookupHRegRemap(m, insn->variant.cas.old_mem); -+ break; -+ -+ case S390_INSN_COMPARE: -+ insn->variant.compare.src1 = lookupHRegRemap(m, insn->variant.compare.src1); -+ s390_opnd_RMI_map_regs(m, &insn->variant.compare.src2); -+ break; -+ -+ case S390_INSN_BRANCH: -+ s390_opnd_RMI_map_regs(m, &insn->variant.branch.dst); -+ /* No need to map S390_REGNO_RETURN_VALUE. It's not virtual */ -+ break; -+ -+ case S390_INSN_HELPER_CALL: -+ /* s390_insn_helper_call_emit also reads / writes the link register -+ and stack pointer. But those registers are not visible to the -+ register allocator. So we don't need to do anything for them. -+ As for the arguments of the helper call -- they will be loaded into -+ non-virtual registers. Again, we don't need to do anything for those -+ here. */ -+ break; -+ -+ case S390_INSN_BFP_TRIOP: -+ insn->variant.bfp_triop.dst = lookupHRegRemap(m, insn->variant.bfp_triop.dst); -+ insn->variant.bfp_triop.op2 = lookupHRegRemap(m, insn->variant.bfp_triop.op2); -+ insn->variant.bfp_triop.op3 = lookupHRegRemap(m, insn->variant.bfp_triop.op3); -+ break; -+ -+ case S390_INSN_BFP_BINOP: -+ insn->variant.bfp_binop.dst = lookupHRegRemap(m, insn->variant.bfp_binop.dst); -+ insn->variant.bfp_binop.op2 = lookupHRegRemap(m, insn->variant.bfp_binop.op2); -+ break; -+ -+ case S390_INSN_BFP_UNOP: -+ insn->variant.bfp_unop.dst = lookupHRegRemap(m, insn->variant.bfp_unop.dst); -+ insn->variant.bfp_unop.op = lookupHRegRemap(m, insn->variant.bfp_unop.op); -+ break; -+ -+ case S390_INSN_BFP_COMPARE: -+ insn->variant.bfp_compare.dst = lookupHRegRemap(m, insn->variant.bfp_compare.dst); -+ insn->variant.bfp_compare.op1 = lookupHRegRemap(m, insn->variant.bfp_compare.op1); -+ insn->variant.bfp_compare.op2 = lookupHRegRemap(m, insn->variant.bfp_compare.op2); -+ break; -+ -+ case S390_INSN_BFP128_BINOP: -+ insn->variant.bfp128_binop.dst_hi = -+ lookupHRegRemap(m, insn->variant.bfp128_binop.dst_hi); -+ insn->variant.bfp128_binop.dst_lo = -+ lookupHRegRemap(m, insn->variant.bfp128_binop.dst_lo); -+ insn->variant.bfp128_binop.op2_hi = -+ lookupHRegRemap(m, insn->variant.bfp128_binop.op2_hi); -+ insn->variant.bfp128_binop.op2_lo = -+ lookupHRegRemap(m, insn->variant.bfp128_binop.op2_lo); -+ break; -+ -+ case S390_INSN_BFP128_COMPARE: -+ insn->variant.bfp128_compare.dst = -+ lookupHRegRemap(m, insn->variant.bfp128_compare.dst); -+ insn->variant.bfp128_compare.op1_hi = -+ lookupHRegRemap(m, insn->variant.bfp128_compare.op1_hi); -+ insn->variant.bfp128_compare.op1_lo = -+ lookupHRegRemap(m, insn->variant.bfp128_compare.op1_lo); -+ insn->variant.bfp128_compare.op2_hi = -+ lookupHRegRemap(m, insn->variant.bfp128_compare.op2_hi); -+ insn->variant.bfp128_compare.op2_lo = -+ lookupHRegRemap(m, insn->variant.bfp128_compare.op2_lo); -+ break; -+ -+ case S390_INSN_BFP128_UNOP: -+ insn->variant.bfp128_unop.dst_hi = -+ lookupHRegRemap(m, insn->variant.bfp128_unop.dst_hi); -+ insn->variant.bfp128_unop.dst_lo = -+ lookupHRegRemap(m, insn->variant.bfp128_unop.dst_lo); -+ insn->variant.bfp128_unop.op_hi = -+ lookupHRegRemap(m, insn->variant.bfp128_unop.op_hi); -+ insn->variant.bfp128_unop.op_lo = -+ lookupHRegRemap(m, insn->variant.bfp128_unop.op_lo); -+ break; -+ -+ case S390_INSN_BFP128_CONVERT_TO: -+ insn->variant.bfp128_unop.dst_hi = -+ lookupHRegRemap(m, insn->variant.bfp128_unop.dst_hi); -+ insn->variant.bfp128_unop.dst_lo = -+ lookupHRegRemap(m, insn->variant.bfp128_unop.dst_lo); -+ insn->variant.bfp128_unop.op_hi = -+ lookupHRegRemap(m, insn->variant.bfp128_unop.op_hi); -+ break; -+ -+ case S390_INSN_BFP128_CONVERT_FROM: -+ insn->variant.bfp128_unop.dst_hi = -+ lookupHRegRemap(m, insn->variant.bfp128_unop.dst_hi); -+ insn->variant.bfp128_unop.op_hi = -+ lookupHRegRemap(m, insn->variant.bfp128_unop.op_hi); -+ insn->variant.bfp128_unop.op_lo = -+ lookupHRegRemap(m, insn->variant.bfp128_unop.op_lo); -+ break; -+ -+ default: -+ vpanic("s390_insn_map_regs"); -+ } -+} -+ -+ -+/* Return True, if INSN is a move between two registers of the same class. -+ In that case assign the source and destination registers to SRC and DST, -+ respectively. */ -+Bool -+s390_insn_is_reg_reg_move(const s390_insn *insn, HReg *src, HReg *dst) -+{ -+ if (insn->tag == S390_INSN_MOVE && -+ hregClass(insn->variant.move.src) == hregClass(insn->variant.move.dst)) { -+ *src = insn->variant.move.src; -+ *dst = insn->variant.move.dst; -+ return True; -+ } -+ -+ return False; -+} -+ -+ -+#undef likely -+#undef unlikely -+#define likely(x) __builtin_expect(!!(x), 1) -+#define unlikely(x) __builtin_expect(!!(x), 0) -+ -+/*------------------------------------------------------------*/ -+/*--- Functions to emit a sequence of bytes ---*/ -+/*------------------------------------------------------------*/ -+ -+ -+static __inline__ UChar * -+emit_2bytes(UChar *p, ULong val) -+{ -+ return (UChar *)__builtin_memcpy(p, ((UChar *)&val) + 6, 2) + 2; -+} -+ -+ -+static __inline__ UChar * -+emit_4bytes(UChar *p, ULong val) -+{ -+ return (UChar *)__builtin_memcpy(p, ((UChar *)&val) + 4, 4) + 4; -+} -+ -+ -+static __inline__ UChar * -+emit_6bytes(UChar *p, ULong val) -+{ -+ return (UChar *)__builtin_memcpy(p, ((UChar *)&val) + 2, 6) + 6; -+} -+ -+ -+/*------------------------------------------------------------*/ -+/*--- Functions to emit various instruction formats ---*/ -+/*------------------------------------------------------------*/ -+ -+ -+static UChar * -+emit_RI(UChar *p, UInt op, UChar r1, UShort i2) -+{ -+ ULong the_insn = op; -+ -+ the_insn |= ((ULong)r1) << 20; -+ the_insn |= ((ULong)i2) << 0; -+ -+ return emit_4bytes(p, the_insn); -+} -+ -+ -+static UChar * -+emit_RIL(UChar *p, ULong op, UChar r1, UInt i2) -+{ -+ ULong the_insn = op; -+ -+ the_insn |= ((ULong)r1) << 36; -+ the_insn |= ((ULong)i2) << 0; -+ -+ return emit_6bytes(p, the_insn); -+} -+ -+ -+static UChar * -+emit_RR(UChar *p, UInt op, UChar r1, UChar r2) -+{ -+ ULong the_insn = op; -+ -+ the_insn |= ((ULong)r1) << 4; -+ the_insn |= ((ULong)r2) << 0; -+ -+ return emit_2bytes(p, the_insn); -+} -+ -+ -+static UChar * -+emit_RRE(UChar *p, UInt op, UChar r1, UChar r2) -+{ -+ ULong the_insn = op; -+ -+ the_insn |= ((ULong)r1) << 4; -+ the_insn |= ((ULong)r2) << 0; -+ -+ return emit_4bytes(p, the_insn); -+} -+ -+ -+static UChar * -+emit_RRF(UChar *p, UInt op, UChar r1, UChar r3, UChar r2) -+{ -+ ULong the_insn = op; -+ -+ the_insn |= ((ULong)r1) << 12; -+ the_insn |= ((ULong)r3) << 4; -+ the_insn |= ((ULong)r2) << 0; -+ -+ return emit_4bytes(p, the_insn); -+} -+ -+ -+static UChar * -+emit_RRF3(UChar *p, UInt op, UChar r3, UChar r1, UChar r2) -+{ -+ ULong the_insn = op; -+ -+ the_insn |= ((ULong)r3) << 12; -+ the_insn |= ((ULong)r1) << 4; -+ the_insn |= ((ULong)r2) << 0; -+ -+ return emit_4bytes(p, the_insn); -+} -+ -+ -+static UChar * -+emit_RS(UChar *p, UInt op, UChar r1, UChar r3, UChar b2, UShort d2) -+{ -+ ULong the_insn = op; -+ -+ the_insn |= ((ULong)r1) << 20; -+ the_insn |= ((ULong)r3) << 16; -+ the_insn |= ((ULong)b2) << 12; -+ the_insn |= ((ULong)d2) << 0; -+ -+ return emit_4bytes(p, the_insn); -+} -+ -+ -+static UChar * -+emit_RSY(UChar *p, ULong op, UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2) -+{ -+ ULong the_insn = op; -+ -+ the_insn |= ((ULong)r1) << 36; -+ the_insn |= ((ULong)r3) << 32; -+ the_insn |= ((ULong)b2) << 28; -+ the_insn |= ((ULong)dl2) << 16; -+ the_insn |= ((ULong)dh2) << 8; -+ -+ return emit_6bytes(p, the_insn); -+} -+ -+ -+static UChar * -+emit_RX(UChar *p, UInt op, UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ ULong the_insn = op; -+ -+ the_insn |= ((ULong)r1) << 20; -+ the_insn |= ((ULong)x2) << 16; -+ the_insn |= ((ULong)b2) << 12; -+ the_insn |= ((ULong)d2) << 0; -+ -+ return emit_4bytes(p, the_insn); -+} -+ -+ -+static UChar * -+emit_RXY(UChar *p, ULong op, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ ULong the_insn = op; -+ -+ the_insn |= ((ULong)r1) << 36; -+ the_insn |= ((ULong)x2) << 32; -+ the_insn |= ((ULong)b2) << 28; -+ the_insn |= ((ULong)dl2) << 16; -+ the_insn |= ((ULong)dh2) << 8; -+ -+ return emit_6bytes(p, the_insn); -+} -+ -+ -+static UChar * -+emit_S(UChar *p, UInt op, UChar b2, UShort d2) -+{ -+ ULong the_insn = op; -+ -+ the_insn |= ((ULong)b2) << 12; -+ the_insn |= ((ULong)d2) << 0; -+ -+ return emit_4bytes(p, the_insn); -+} -+ -+ -+/*------------------------------------------------------------*/ -+/*--- Functions to emit particular instructions ---*/ -+/*------------------------------------------------------------*/ -+ -+ -+static Char * -+s390_emit_AR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "ar", r1, r2); -+ -+ return emit_RR(p, 0x1a00, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_AGR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "agr", r1, r2); -+ -+ return emit_RRE(p, 0xb9080000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_A(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UDXB), "a", r1, d2, x2, b2); -+ -+ return emit_RX(p, 0x5a000000, r1, x2, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_AY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "ay", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe3000000005aULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_AG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "ag", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000008ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_AFI(UChar *p, UChar r1, UInt i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, INT), "afi", r1, i2); -+ -+ return emit_RIL(p, 0xc20900000000ULL, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_AGFI(UChar *p, UChar r1, UInt i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, INT), "agfi", r1, i2); -+ -+ return emit_RIL(p, 0xc20800000000ULL, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_AH(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UDXB), "ah", r1, d2, x2, b2); -+ -+ return emit_RX(p, 0x4a000000, r1, x2, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_AHY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "ahy", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe3000000007aULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_AHI(UChar *p, UChar r1, UShort i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, INT), "ahi", r1, (Int)(Short)i2); -+ -+ return emit_RI(p, 0xa70a0000, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_AGHI(UChar *p, UChar r1, UShort i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, INT), "aghi", r1, (Int)(Short)i2); -+ -+ return emit_RI(p, 0xa70b0000, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_NR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "nr", r1, r2); -+ -+ return emit_RR(p, 0x1400, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_NGR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "ngr", r1, r2); -+ -+ return emit_RRE(p, 0xb9800000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_N(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UDXB), "n", r1, d2, x2, b2); -+ -+ return emit_RX(p, 0x54000000, r1, x2, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_NY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "ny", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000054ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_NG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "ng", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000080ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_NIHF(UChar *p, UChar r1, UInt i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UINT), "nihf", r1, i2); -+ -+ return emit_RIL(p, 0xc00a00000000ULL, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_NILF(UChar *p, UChar r1, UInt i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UINT), "nilf", r1, i2); -+ -+ return emit_RIL(p, 0xc00b00000000ULL, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_NILL(UChar *p, UChar r1, UShort i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UINT), "nill", r1, i2); -+ -+ return emit_RI(p, 0xa5070000, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_BASR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "basr", r1, r2); -+ -+ return emit_RR(p, 0x0d00, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_BCR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC2(XMNM, GPR), S390_XMNM_BCR, r1, r2); -+ -+ return emit_RR(p, 0x0700, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_BRC(UChar *p, UChar r1, UShort i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRC, r1, (Int)(Short)i2); -+ -+ return emit_RI(p, 0xa7040000, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_CR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "cr", r1, r2); -+ -+ return emit_RR(p, 0x1900, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_CGR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "cgr", r1, r2); -+ -+ return emit_RRE(p, 0xb9200000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_C(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UDXB), "c", r1, d2, x2, b2); -+ -+ return emit_RX(p, 0x59000000, r1, x2, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_CY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "cy", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000059ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_CG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "cg", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000020ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_CFI(UChar *p, UChar r1, UInt i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, INT), "cfi", r1, i2); -+ -+ return emit_RIL(p, 0xc20d00000000ULL, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_CS(UChar *p, UChar r1, UChar r3, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC4(MNM, GPR, GPR, UDXB), "cs", r1, r3, d2, 0, b2); -+ -+ return emit_RS(p, 0xba000000, r1, r3, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_CSY(UChar *p, UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC4(MNM, GPR, GPR, SDXB), "csy", r1, r3, dh2, dl2, 0, b2); -+ -+ return emit_RSY(p, 0xeb0000000014ULL, r1, r3, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_CSG(UChar *p, UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC4(MNM, GPR, GPR, SDXB), "csg", r1, r3, dh2, dl2, 0, b2); -+ -+ return emit_RSY(p, 0xeb0000000030ULL, r1, r3, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_CLR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "clr", r1, r2); -+ -+ return emit_RR(p, 0x1500, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_CLGR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "clgr", r1, r2); -+ -+ return emit_RRE(p, 0xb9210000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_CL(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UDXB), "cl", r1, d2, x2, b2); -+ -+ return emit_RX(p, 0x55000000, r1, x2, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_CLY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "cly", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000055ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_CLG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "clg", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000021ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_CLFI(UChar *p, UChar r1, UInt i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UINT), "clfi", r1, i2); -+ -+ return emit_RIL(p, 0xc20f00000000ULL, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_DR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "dr", r1, r2); -+ -+ return emit_RR(p, 0x1d00, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_D(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UDXB), "d", r1, d2, x2, b2); -+ -+ return emit_RX(p, 0x5d000000, r1, x2, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_DLR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "dlr", r1, r2); -+ -+ return emit_RRE(p, 0xb9970000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_DLGR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "dlgr", r1, r2); -+ -+ return emit_RRE(p, 0xb9870000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_DL(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "dl", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000097ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_DLG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "dlg", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000087ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_DSGR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "dsgr", r1, r2); -+ -+ return emit_RRE(p, 0xb90d0000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_DSG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "dsg", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe3000000000dULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_XR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "xr", r1, r2); -+ -+ return emit_RR(p, 0x1700, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_XGR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "xgr", r1, r2); -+ -+ return emit_RRE(p, 0xb9820000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_X(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UDXB), "x", r1, d2, x2, b2); -+ -+ return emit_RX(p, 0x57000000, r1, x2, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_XY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "xy", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000057ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_XG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "xg", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000082ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_XIHF(UChar *p, UChar r1, UInt i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UINT), "xihf", r1, i2); -+ -+ return emit_RIL(p, 0xc00600000000ULL, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_XILF(UChar *p, UChar r1, UInt i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UINT), "xilf", r1, i2); -+ -+ return emit_RIL(p, 0xc00700000000ULL, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_FLOGR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "flogr", r1, r2); -+ -+ return emit_RRE(p, 0xb9830000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_IC(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UDXB), "ic", r1, d2, x2, b2); -+ -+ return emit_RX(p, 0x43000000, r1, x2, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_ICY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "icy", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000073ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_IIHF(UChar *p, UChar r1, UInt i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UINT), "iihf", r1, i2); -+ -+ return emit_RIL(p, 0xc00800000000ULL, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_IIHH(UChar *p, UChar r1, UShort i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UINT), "iihh", r1, i2); -+ -+ return emit_RI(p, 0xa5000000, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_IIHL(UChar *p, UChar r1, UShort i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UINT), "iihl", r1, i2); -+ -+ return emit_RI(p, 0xa5010000, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_IILF(UChar *p, UChar r1, UInt i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UINT), "iilf", r1, i2); -+ -+ return emit_RIL(p, 0xc00900000000ULL, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_IILH(UChar *p, UChar r1, UShort i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UINT), "iilh", r1, i2); -+ -+ return emit_RI(p, 0xa5020000, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_IILL(UChar *p, UChar r1, UShort i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UINT), "iill", r1, i2); -+ -+ return emit_RI(p, 0xa5030000, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_IPM(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC2(MNM, GPR), "ipm", r1); -+ -+ return emit_RRE(p, 0xb2220000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "lr", r1, r2); -+ -+ return emit_RR(p, 0x1800, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LGR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "lgr", r1, r2); -+ -+ return emit_RRE(p, 0xb9040000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LGFR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "lgfr", r1, r2); -+ -+ return emit_RRE(p, 0xb9140000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_L(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UDXB), "l", r1, d2, x2, b2); -+ -+ return emit_RX(p, 0x58000000, r1, x2, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_LY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "ly", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000058ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_LG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "lg", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000004ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_LGF(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "lgf", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000014ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_LGFI(UChar *p, UChar r1, UInt i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, INT), "lgfi", r1, i2); -+ -+ return emit_RIL(p, 0xc00100000000ULL, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_LTR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "ltr", r1, r2); -+ -+ return emit_RR(p, 0x1200, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LTGR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "ltgr", r1, r2); -+ -+ return emit_RRE(p, 0xb9020000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LT(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "lt", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000012ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_LTG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "ltg", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000002ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_LBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "lbr", r1, r2); -+ -+ return emit_RRE(p, 0xb9260000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LGBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "lgbr", r1, r2); -+ -+ return emit_RRE(p, 0xb9060000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LB(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "lb", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000076ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_LGB(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "lgb", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000077ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_LCR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "lcr", r1, r2); -+ -+ return emit_RR(p, 0x1300, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LCGR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "lcgr", r1, r2); -+ -+ return emit_RRE(p, 0xb9030000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LHR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "lhr", r1, r2); -+ -+ return emit_RRE(p, 0xb9270000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LGHR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "lghr", r1, r2); -+ -+ return emit_RRE(p, 0xb9070000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LH(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UDXB), "lh", r1, d2, x2, b2); -+ -+ return emit_RX(p, 0x48000000, r1, x2, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_LHY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "lhy", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000078ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_LGH(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "lgh", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000015ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_LHI(UChar *p, UChar r1, UShort i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, INT), "lhi", r1, (Int)(Short)i2); -+ -+ return emit_RI(p, 0xa7080000, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_LGHI(UChar *p, UChar r1, UShort i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, INT), "lghi", r1, (Int)(Short)i2); -+ -+ return emit_RI(p, 0xa7090000, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_LLGFR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "llgfr", r1, r2); -+ -+ return emit_RRE(p, 0xb9160000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LLGF(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "llgf", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000016ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_LLCR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "llcr", r1, r2); -+ -+ return emit_RRE(p, 0xb9940000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LLGCR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "llgcr", r1, r2); -+ -+ return emit_RRE(p, 0xb9840000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LLC(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "llc", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000094ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_LLGC(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "llgc", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000090ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_LLHR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "llhr", r1, r2); -+ -+ return emit_RRE(p, 0xb9950000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LLGHR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "llghr", r1, r2); -+ -+ return emit_RRE(p, 0xb9850000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LLH(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "llh", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000095ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_LLGH(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "llgh", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000091ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_LLILF(UChar *p, UChar r1, UInt i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UINT), "llilf", r1, i2); -+ -+ return emit_RIL(p, 0xc00f00000000ULL, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_LLILH(UChar *p, UChar r1, UShort i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UINT), "llilh", r1, i2); -+ -+ return emit_RI(p, 0xa50e0000, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_LLILL(UChar *p, UChar r1, UShort i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UINT), "llill", r1, i2); -+ -+ return emit_RI(p, 0xa50f0000, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_MR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "mr", r1, r2); -+ -+ return emit_RR(p, 0x1c00, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_M(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UDXB), "m", r1, d2, x2, b2); -+ -+ return emit_RX(p, 0x5c000000, r1, x2, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_MFY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "mfy", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe3000000005cULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_MH(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UDXB), "mh", r1, d2, x2, b2); -+ -+ return emit_RX(p, 0x4c000000, r1, x2, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_MHY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "mhy", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe3000000007cULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_MHI(UChar *p, UChar r1, UShort i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, INT), "mhi", r1, (Int)(Short)i2); -+ -+ return emit_RI(p, 0xa70c0000, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_MLR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "mlr", r1, r2); -+ -+ return emit_RRE(p, 0xb9960000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_MLGR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "mlgr", r1, r2); -+ -+ return emit_RRE(p, 0xb9860000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_ML(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "ml", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000096ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_MLG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "mlg", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000086ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_MSR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "msr", r1, r2); -+ -+ return emit_RRE(p, 0xb2520000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_MSGR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "msgr", r1, r2); -+ -+ return emit_RRE(p, 0xb90c0000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_MS(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UDXB), "ms", r1, d2, x2, b2); -+ -+ return emit_RX(p, 0x71000000, r1, x2, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_MSY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "msy", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000051ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_MSG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "msg", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe3000000000cULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_MSFI(UChar *p, UChar r1, UInt i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, INT), "msfi", r1, i2); -+ -+ return emit_RIL(p, 0xc20100000000ULL, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_MSGFI(UChar *p, UChar r1, UInt i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, INT), "msgfi", r1, i2); -+ -+ return emit_RIL(p, 0xc20000000000ULL, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_OR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "or", r1, r2); -+ -+ return emit_RR(p, 0x1600, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_OGR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "ogr", r1, r2); -+ -+ return emit_RRE(p, 0xb9810000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_O(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UDXB), "o", r1, d2, x2, b2); -+ -+ return emit_RX(p, 0x56000000, r1, x2, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_OY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "oy", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000056ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_OG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "og", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000081ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_OIHF(UChar *p, UChar r1, UInt i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UINT), "oihf", r1, i2); -+ -+ return emit_RIL(p, 0xc00c00000000ULL, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_OILF(UChar *p, UChar r1, UInt i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UINT), "oilf", r1, i2); -+ -+ return emit_RIL(p, 0xc00d00000000ULL, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_OILL(UChar *p, UChar r1, UShort i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UINT), "oill", r1, i2); -+ -+ return emit_RI(p, 0xa50b0000, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_SLL(UChar *p, UChar r1, UChar r3, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UDXB), "sll", r1, d2, 0, b2); -+ -+ return emit_RS(p, 0x89000000, r1, r3, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_SLLG(UChar *p, UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC4(MNM, GPR, GPR, SDXB), "sllg", r1, r3, dh2, dl2, 0, b2); -+ -+ return emit_RSY(p, 0xeb000000000dULL, r1, r3, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_SRA(UChar *p, UChar r1, UChar r3, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UDXB), "sra", r1, d2, 0, b2); -+ -+ return emit_RS(p, 0x8a000000, r1, r3, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_SRAG(UChar *p, UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC4(MNM, GPR, GPR, SDXB), "srag", r1, r3, dh2, dl2, 0, b2); -+ -+ return emit_RSY(p, 0xeb000000000aULL, r1, r3, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_SRL(UChar *p, UChar r1, UChar r3, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UDXB), "srl", r1, d2, 0, b2); -+ -+ return emit_RS(p, 0x88000000, r1, r3, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_SRLG(UChar *p, UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC4(MNM, GPR, GPR, SDXB), "srlg", r1, r3, dh2, dl2, 0, b2); -+ -+ return emit_RSY(p, 0xeb000000000cULL, r1, r3, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_ST(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UDXB), "st", r1, d2, x2, b2); -+ -+ return emit_RX(p, 0x50000000, r1, x2, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_STY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "sty", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000050ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_STG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "stg", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000024ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_STC(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UDXB), "stc", r1, d2, x2, b2); -+ -+ return emit_RX(p, 0x42000000, r1, x2, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_STCY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "stcy", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000072ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_STH(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UDXB), "sth", r1, d2, x2, b2); -+ -+ return emit_RX(p, 0x40000000, r1, x2, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_STHY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "sthy", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000070ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_SR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "sr", r1, r2); -+ -+ return emit_RR(p, 0x1b00, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_SGR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, GPR), "sgr", r1, r2); -+ -+ return emit_RRE(p, 0xb9090000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_S(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UDXB), "s", r1, d2, x2, b2); -+ -+ return emit_RX(p, 0x5b000000, r1, x2, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_SY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "sy", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe3000000005bULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_SG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "sg", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe30000000009ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_SH(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UDXB), "sh", r1, d2, x2, b2); -+ -+ return emit_RX(p, 0x4b000000, r1, x2, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_SHY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, SDXB), "shy", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xe3000000007bULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_SLFI(UChar *p, UChar r1, UInt i2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, UINT), "slfi", r1, i2); -+ -+ return emit_RIL(p, 0xc20500000000ULL, r1, i2); -+} -+ -+ -+static Char * -+s390_emit_LDR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "ldr", r1, r2); -+ -+ return emit_RR(p, 0x2800, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LE(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, UDXB), "le", r1, d2, x2, b2); -+ -+ return emit_RX(p, 0x78000000, r1, x2, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_LD(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, UDXB), "ld", r1, d2, x2, b2); -+ -+ return emit_RX(p, 0x68000000, r1, x2, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_LEY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, SDXB), "ley", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xed0000000064ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_LDY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, SDXB), "ldy", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xed0000000065ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_LFPC(UChar *p, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC2(MNM, UDXB), "lfpc", d2, 0, b2); -+ -+ return emit_S(p, 0xb29d0000, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_LDGR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, GPR), "ldgr", r1, r2); -+ -+ return emit_RRE(p, 0xb3c10000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LGDR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, GPR, FPR), "lgdr", r1, r2); -+ -+ return emit_RRE(p, 0xb3cd0000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LZER(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC2(MNM, FPR), "lzer", r1); -+ -+ return emit_RRE(p, 0xb3740000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LZDR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC2(MNM, FPR), "lzdr", r1); -+ -+ return emit_RRE(p, 0xb3750000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_SFPC(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC2(MNM, GPR), "sfpc", r1); -+ -+ return emit_RRE(p, 0xb3840000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_STE(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, UDXB), "ste", r1, d2, x2, b2); -+ -+ return emit_RX(p, 0x70000000, r1, x2, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_STD(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, UDXB), "std", r1, d2, x2, b2); -+ -+ return emit_RX(p, 0x60000000, r1, x2, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_STEY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, SDXB), "stey", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xed0000000066ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_STDY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, SDXB), "stdy", r1, dh2, dl2, x2, b2); -+ -+ return emit_RXY(p, 0xed0000000067ULL, r1, x2, b2, dl2, dh2); -+} -+ -+ -+static Char * -+s390_emit_STFPC(UChar *p, UChar b2, UShort d2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC2(MNM, UDXB), "stfpc", d2, 0, b2); -+ -+ return emit_S(p, 0xb29c0000, b2, d2); -+} -+ -+ -+static Char * -+s390_emit_AEBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "aebr", r1, r2); -+ -+ return emit_RRE(p, 0xb30a0000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_ADBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "adbr", r1, r2); -+ -+ return emit_RRE(p, 0xb31a0000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_AXBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "axbr", r1, r2); -+ -+ return emit_RRE(p, 0xb34a0000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_CEBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "cebr", r1, r2); -+ -+ return emit_RRE(p, 0xb3090000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_CDBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "cdbr", r1, r2); -+ -+ return emit_RRE(p, 0xb3190000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_CXBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "cxbr", r1, r2); -+ -+ return emit_RRE(p, 0xb3490000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_CEFBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, GPR), "cefbr", r1, r2); -+ -+ return emit_RRE(p, 0xb3940000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_CDFBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, GPR), "cdfbr", r1, r2); -+ -+ return emit_RRE(p, 0xb3950000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_CXFBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, GPR), "cxfbr", r1, r2); -+ -+ return emit_RRE(p, 0xb3960000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_CEGBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, GPR), "cegbr", r1, r2); -+ -+ return emit_RRE(p, 0xb3a40000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_CDGBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, GPR), "cdgbr", r1, r2); -+ -+ return emit_RRE(p, 0xb3a50000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_CXGBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, GPR), "cxgbr", r1, r2); -+ -+ return emit_RRE(p, 0xb3a60000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_CFEBR(UChar *p, UChar r3, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC4(MNM, GPR, UINT, FPR), "cfebr", r1, r3, r2); -+ -+ return emit_RRF3(p, 0xb3980000, r3, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_CFDBR(UChar *p, UChar r3, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC4(MNM, GPR, UINT, FPR), "cfdbr", r1, r3, r2); -+ -+ return emit_RRF3(p, 0xb3990000, r3, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_CFXBR(UChar *p, UChar r3, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC4(MNM, GPR, UINT, FPR), "cfxbr", r1, r3, r2); -+ -+ return emit_RRF3(p, 0xb39a0000, r3, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_CGEBR(UChar *p, UChar r3, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC4(MNM, GPR, UINT, FPR), "cgebr", r1, r3, r2); -+ -+ return emit_RRF3(p, 0xb3a80000, r3, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_CGDBR(UChar *p, UChar r3, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC4(MNM, GPR, UINT, FPR), "cgdbr", r1, r3, r2); -+ -+ return emit_RRF3(p, 0xb3a90000, r3, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_CGXBR(UChar *p, UChar r3, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC4(MNM, GPR, UINT, FPR), "cgxbr", r1, r3, r2); -+ -+ return emit_RRF3(p, 0xb3aa0000, r3, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_DEBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "debr", r1, r2); -+ -+ return emit_RRE(p, 0xb30d0000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_DDBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "ddbr", r1, r2); -+ -+ return emit_RRE(p, 0xb31d0000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_DXBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "dxbr", r1, r2); -+ -+ return emit_RRE(p, 0xb34d0000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LCEBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "lcebr", r1, r2); -+ -+ return emit_RRE(p, 0xb3030000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LCDBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "lcdbr", r1, r2); -+ -+ return emit_RRE(p, 0xb3130000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LCXBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "lcxbr", r1, r2); -+ -+ return emit_RRE(p, 0xb3430000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LDEBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "ldebr", r1, r2); -+ -+ return emit_RRE(p, 0xb3040000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LXDBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "lxdbr", r1, r2); -+ -+ return emit_RRE(p, 0xb3050000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LXEBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "lxebr", r1, r2); -+ -+ return emit_RRE(p, 0xb3060000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LNEBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "lnebr", r1, r2); -+ -+ return emit_RRE(p, 0xb3010000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LNDBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "lndbr", r1, r2); -+ -+ return emit_RRE(p, 0xb3110000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LNXBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "lnxbr", r1, r2); -+ -+ return emit_RRE(p, 0xb3410000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LPEBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "lpebr", r1, r2); -+ -+ return emit_RRE(p, 0xb3000000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LPDBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "lpdbr", r1, r2); -+ -+ return emit_RRE(p, 0xb3100000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LPXBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "lpxbr", r1, r2); -+ -+ return emit_RRE(p, 0xb3400000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LEDBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "ledbr", r1, r2); -+ -+ return emit_RRE(p, 0xb3440000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LDXBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "ldxbr", r1, r2); -+ -+ return emit_RRE(p, 0xb3450000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_LEXBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "lexbr", r1, r2); -+ -+ return emit_RRE(p, 0xb3460000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_MEEBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "meebr", r1, r2); -+ -+ return emit_RRE(p, 0xb3170000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_MDBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "mdbr", r1, r2); -+ -+ return emit_RRE(p, 0xb31c0000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_MXBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "mxbr", r1, r2); -+ -+ return emit_RRE(p, 0xb34c0000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_MAEBR(UChar *p, UChar r1, UChar r3, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC4(MNM, FPR, FPR, FPR), "maebr", r1, r3, r2); -+ -+ return emit_RRF(p, 0xb30e0000, r1, r3, r2); -+} -+ -+ -+static Char * -+s390_emit_MADBR(UChar *p, UChar r1, UChar r3, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC4(MNM, FPR, FPR, FPR), "madbr", r1, r3, r2); -+ -+ return emit_RRF(p, 0xb31e0000, r1, r3, r2); -+} -+ -+ -+static Char * -+s390_emit_MSEBR(UChar *p, UChar r1, UChar r3, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC4(MNM, FPR, FPR, FPR), "msebr", r1, r3, r2); -+ -+ return emit_RRF(p, 0xb30f0000, r1, r3, r2); -+} -+ -+ -+static Char * -+s390_emit_MSDBR(UChar *p, UChar r1, UChar r3, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC4(MNM, FPR, FPR, FPR), "msdbr", r1, r3, r2); -+ -+ return emit_RRF(p, 0xb31f0000, r1, r3, r2); -+} -+ -+ -+static Char * -+s390_emit_SQEBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "sqebr", r1, r2); -+ -+ return emit_RRE(p, 0xb3140000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_SQDBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "sqdbr", r1, r2); -+ -+ return emit_RRE(p, 0xb3150000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_SQXBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "sqxbr", r1, r2); -+ -+ return emit_RRE(p, 0xb3160000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_SEBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "sebr", r1, r2); -+ -+ return emit_RRE(p, 0xb30b0000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_SDBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "sdbr", r1, r2); -+ -+ return emit_RRE(p, 0xb31b0000, r1, r2); -+} -+ -+ -+static Char * -+s390_emit_SXBR(UChar *p, UChar r1, UChar r2) -+{ -+ if (unlikely(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC3(MNM, FPR, FPR), "sxbr", r1, r2); -+ -+ return emit_RRE(p, 0xb34b0000, r1, r2); -+} -+ -+/* For both 32-bit and 64-bit clients we can use the instructions that -+ were available on z900. See binutils/opcodes/s390-opc.txt -+ -+ Note, that entering a wrapper for a z/arch instruction does not -+ imply that the client is a 64-bit client. It only means that this -+ instruction is a good match for the expression at hand. -+*/ -+ -+/* Provide a symbolic name for register "R0" */ -+#define R0 0 -+ -+/* Split up a 20-bit displacement into its high and low piece -+ suitable for passing as function arguments */ -+#define DISP20(d) ((d) & 0xFFF), (((d) >> 12) & 0xFF) -+ -+/*---------------------------------------------------------------*/ -+/*--- Helper functions ---*/ -+/*---------------------------------------------------------------*/ -+ -+static __inline__ Bool -+uint_fits_signed_16bit(UInt val) -+{ -+ int v = val & 0xFFFFu; -+ -+ /* sign extend */ -+ v = (v << 16) >> 16; -+ -+ return val == (UInt)v; -+} -+ -+ -+static __inline__ Bool -+ulong_fits_signed_16bit(ULong val) -+{ -+ Long v = val & 0xFFFFu; -+ -+ /* sign extend */ -+ v = (v << 48) >> 48; -+ -+ return val == (ULong)v; -+} -+ -+ -+static __inline__ Bool -+ulong_fits_signed_32bit(ULong val) -+{ -+ Long v = val & 0xFFFFFFFFu; -+ -+ /* sign extend */ -+ v = (v << 32) >> 32; -+ -+ return val == (ULong)v; -+} -+ -+ -+static __inline__ Bool -+ulong_fits_unsigned_32bit(ULong val) -+{ -+ return (val & 0xFFFFFFFFu) == val; -+} -+ -+ -+/* Load a 64-bit immediate VAL into register REG. */ -+static UChar * -+s390_emit_load_64imm(UChar *p, UChar reg, ULong val) -+{ -+ if (ulong_fits_signed_16bit(val)) { -+ return s390_emit_LGHI(p, reg, val); -+ } -+ -+ if (s390_host_has_eimm) { -+ if (ulong_fits_unsigned_32bit(val)) { -+ return s390_emit_LLILF(p, reg, val); -+ } -+ if (ulong_fits_signed_32bit(val)) { -+ /* LGFI's sign extension will recreate the correct 64-bit value */ -+ return s390_emit_LGFI(p, reg, val); -+ } -+ /* Do it in two steps: upper half [0:31] and lower half [32:63] */ -+ p = s390_emit_IIHF(p, reg, val >> 32); -+ return s390_emit_IILF(p, reg, val & 0xFFFFFFFF); -+ } -+ -+ /* Fall back */ -+ if (ulong_fits_unsigned_32bit(val)) { -+ p = s390_emit_LLILH(p, reg, (val >> 16) & 0xFFFF); /* sets val[32:47] -+ val[0:31] = 0 */ -+ p = s390_emit_IILL(p, reg, val & 0xFFFF); /* sets val[48:63] */ -+ return p; -+ } -+ -+ p = s390_emit_IIHH(p, reg, (val >> 48) & 0xFFFF); -+ p = s390_emit_IIHL(p, reg, (val >> 32) & 0xFFFF); -+ p = s390_emit_IILH(p, reg, (val >> 16) & 0xFFFF); -+ p = s390_emit_IILL(p, reg, val & 0xFFFF); -+ -+ return p; -+} -+ -+/* Load a 32-bit immediate VAL into register REG. */ -+static UChar * -+s390_emit_load_32imm(UChar *p, UChar reg, UInt val) -+{ -+ if (uint_fits_signed_16bit(val)) { -+ /* LHI's sign extension will recreate the correct 32-bit value */ -+ return s390_emit_LHI(p, reg, val); -+ } -+ if (s390_host_has_eimm) { -+ return s390_emit_IILF(p, reg, val); -+ } -+ /* val[0:15] --> (val >> 16) & 0xFFFF -+ val[16:31] --> val & 0xFFFF */ -+ p = s390_emit_IILH(p, reg, (val >> 16) & 0xFFFF); -+ return s390_emit_IILL(p, reg, val & 0xFFFF); -+} -+ -+/*------------------------------------------------------------*/ -+/*--- Wrapper functions ---*/ -+/*------------------------------------------------------------*/ -+ -+/* r1[32:63],r1+1[32:63] = r1+1[32:63] * memory[op2addr][32:63] */ -+static UChar * -+s390_emit_MFYw(UChar *p, UChar r1, UChar x, UChar b, UShort dl, UChar dh) -+{ -+ if (s390_host_has_gie) { -+ return s390_emit_MFY(p, r1, x, b, dl, dh); -+ } -+ -+ /* Load from memory into R0, then MULTIPLY with R1 */ -+ p = s390_emit_LY(p, R0, x, b, dl, dh); -+ return s390_emit_MR(p, r1, R0); -+} -+ -+/* r1[32:63] = r1[32:63] * i2 */ -+static UChar * -+s390_emit_MSFIw(UChar *p, UChar r1, UInt i2) -+{ -+ if (s390_host_has_gie) { -+ return s390_emit_MSFI(p, r1, i2); -+ } -+ -+ /* Load I2 into R0; then MULTIPLY R0 with R1 */ -+ p = s390_emit_load_32imm(p, R0, i2); -+ return s390_emit_MSR(p, r1, R0); -+} -+ -+ -+/* r1[32:63] = r1[32:63] & i2 */ -+static UChar * -+s390_emit_NILFw(UChar *p, UChar r1, UInt i2) -+{ -+ if (s390_host_has_eimm) { -+ return s390_emit_NILF(p, r1, i2); -+ } -+ -+ /* Load I2 into R0; then AND R0 with R1 */ -+ p = s390_emit_load_32imm(p, R0, i2); -+ return s390_emit_NR(p, r1, R0); -+} -+ -+ -+/* r1[32:63] = r1[32:63] | i2 */ -+static UChar * -+s390_emit_OILFw(UChar *p, UChar r1, UInt i2) -+{ -+ if (s390_host_has_eimm) { -+ return s390_emit_OILF(p, r1, i2); -+ } -+ -+ /* Load I2 into R0; then AND R0 with R1 */ -+ p = s390_emit_load_32imm(p, R0, i2); -+ return s390_emit_OR(p, r1, R0); -+} -+ -+ -+/* r1[32:63] = r1[32:63] ^ i2 */ -+static UChar * -+s390_emit_XILFw(UChar *p, UChar r1, UInt i2) -+{ -+ if (s390_host_has_eimm) { -+ return s390_emit_XILF(p, r1, i2); -+ } -+ -+ /* Load I2 into R0; then AND R0 with R1 */ -+ p = s390_emit_load_32imm(p, R0, i2); -+ return s390_emit_XR(p, r1, R0); -+} -+ -+ -+/* r1[32:63] = sign_extend(r2[56:63]) */ -+static UChar * -+s390_emit_LBRw(UChar *p, UChar r1, UChar r2) -+{ -+ if (s390_host_has_eimm) { -+ return s390_emit_LBR(p, r1, r2); -+ } -+ -+ p = s390_emit_LR(p, r1, r2); /* r1 = r2 */ -+ p = s390_emit_SLL(p, r1, R0, R0, 24); /* r1 = r1 << 24 */ -+ return s390_emit_SRA(p, r1, R0, R0, 24); /* r1 = r1 >>a 24 */ -+} -+ -+ -+/* r1[0:63] = sign_extend(r2[56:63]) */ -+static UChar * -+s390_emit_LGBRw(UChar *p, UChar r1, UChar r2) -+{ -+ if (s390_host_has_eimm) { -+ return s390_emit_LGBR(p, r1, r2); -+ } -+ -+ p = s390_emit_LR(p, r1, r2); /* r1 = r2 */ -+ p = s390_emit_SLLG(p, r1, r1, R0, DISP20(56)); /* r1 = r1 << 56 */ -+ return s390_emit_SRAG(p, r1, r1, R0, DISP20(56)); /* r1 = r1 >>a 56 */ -+} -+ -+ -+/* r1[32:63] = sign_extend(r2[48:63]) */ -+static UChar * -+s390_emit_LHRw(UChar *p, UChar r1, UChar r2) -+{ -+ if (s390_host_has_eimm) { -+ return s390_emit_LHR(p, r1, r2); -+ } -+ -+ p = s390_emit_LR(p, r1, r2); /* r1 = r2 */ -+ p = s390_emit_SLL(p, r1, R0, R0, 16); /* r1 = r1 << 16 */ -+ return s390_emit_SRA(p, r1, R0, R0, 16); /* r1 = r1 >>a 16 */ -+} -+ -+ -+/* r1[0:63] = sign_extend(r2[48:63]) */ -+static UChar * -+s390_emit_LGHRw(UChar *p, UChar r1, UChar r2) -+{ -+ if (s390_host_has_eimm) { -+ return s390_emit_LGHR(p, r1, r2); -+ } -+ -+ p = s390_emit_LR(p, r1, r2); /* r1 = r2 */ -+ p = s390_emit_SLLG(p, r1, r1, R0, DISP20(48)); /* r1 = r1 << 48 */ -+ return s390_emit_SRAG(p, r1, r1, R0, DISP20(48)); /* r1 = r1 >>a 48 */ -+} -+ -+ -+/* r1[0:63] = sign_extend(i2) */ -+static UChar * -+s390_emit_LGFIw(UChar *p, UChar r1, UInt i2) -+{ -+ if (s390_host_has_eimm) { -+ return s390_emit_LGFI(p, r1, i2); -+ } -+ -+ p = s390_emit_load_32imm(p, R0, i2); -+ return s390_emit_LGFR(p, r1, R0); -+} -+ -+ -+/* r1[32:63] = zero_extend($r2[56:63]) */ -+static UChar * -+s390_emit_LLCRw(UChar *p, UChar r1, UChar r2) -+{ -+ if (s390_host_has_eimm) { -+ return s390_emit_LLCR(p, r1, r2); -+ } -+ -+ p = s390_emit_LR(p, r1, r2); -+ p = s390_emit_LHI(p, R0, 0xFF); -+ return s390_emit_NR(p, r1, R0); -+} -+ -+ -+/* r1[0:63] = zero_extend($r2[56:63]) */ -+static UChar * -+s390_emit_LLGCRw(UChar *p, UChar r1, UChar r2) -+{ -+ if (s390_host_has_eimm) { -+ return s390_emit_LLGCR(p, r1, r2); -+ } -+ -+ p = s390_emit_LR(p, r1, r2); -+ p = s390_emit_LLILL(p, R0, 0xFF); -+ return s390_emit_NGR(p, r1, R0); -+} -+ -+ -+/* r1[32:63] = zero_extend(r2[48:63]) */ -+static UChar * -+s390_emit_LLHRw(UChar *p, UChar r1, UChar r2) -+{ -+ if (s390_host_has_eimm) { -+ return s390_emit_LLHR(p, r1, r2); -+ } -+ -+ p = s390_emit_LR(p, r1, r2); -+ p = s390_emit_LLILL(p, R0, 0xFFFF); -+ return s390_emit_NR(p, r1, R0); -+} -+ -+ -+/* r1[0:63] = zero_extend(r2[48:63]) */ -+static UChar * -+s390_emit_LLGHRw(UChar *p, UChar r1, UChar r2) -+{ -+ if (s390_host_has_eimm) { -+ return s390_emit_LLGHR(p, r1, r2); -+ } -+ -+ p = s390_emit_LR(p, r1, r2); -+ p = s390_emit_LLILL(p, R0, 0xFFFF); -+ return s390_emit_NGR(p, r1, R0); -+} -+ -+ -+/* r1[32:63] = zero_extend(mem[op2addr][0:7]) */ -+static UChar * -+s390_emit_LLCw(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl, UChar dh) -+{ -+ if (s390_host_has_eimm) { -+ return s390_emit_LLC(p, r1, x2, b2, dl, dh); -+ } -+ -+ if (dh == 0) { -+ p = s390_emit_IC(p, r1, x2, b2, dl); -+ } else { -+ p = s390_emit_ICY(p, r1, x2, b2, dl, dh); -+ } -+ p = s390_emit_LLILL(p, R0, 0xFF); -+ return s390_emit_NR(p, r1, R0); -+} -+ -+ -+/* r1[32:63] = zero_extend(mem[op2addr][0:15]) */ -+static UChar * -+s390_emit_LLHw(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl, UChar dh) -+{ -+ if (s390_host_has_eimm) { -+ return s390_emit_LLH(p, r1, x2, b2, dl, dh); -+ } -+ -+ p = s390_emit_LLGH(p, r1, x2, b2, dl, dh); -+ p = s390_emit_LLILL(p, R0, 0xFFFF); -+ return s390_emit_NR(p, r1, R0); -+} -+ -+ -+/* r1[0:63] = zero_extend(i2) */ -+static UChar * -+s390_emit_LLILFw(UChar *p, UChar r1, UInt i2) -+{ -+ if (s390_host_has_eimm) { -+ return s390_emit_LLILF(p, r1, i2); -+ } -+ -+ p = s390_emit_LLILH(p, r1, (i2 >> 16) & 0xFFFF); /* i2[0:15] */ -+ return s390_emit_OILL(p, r1, i2 & 0xFFFF); -+} -+ -+ -+/* r1[32:63] = r1[32:63] + i2 */ -+static UChar * -+s390_emit_AFIw(UChar *p, UChar r1, UInt i2) -+{ -+ if (s390_host_has_eimm) { -+ return s390_emit_AFI(p, r1, i2); -+ } -+ /* Load 32 bit immediate to R0 then add */ -+ p = s390_emit_load_32imm(p, R0, i2); -+ return s390_emit_AR(p, r1, R0); -+} -+ -+ -+/* r1[32:63] = r1[32:63] - i2 */ -+static UChar * -+s390_emit_SLFIw(UChar *p, UChar r1, UInt i2) -+{ -+ if (s390_host_has_eimm) { -+ return s390_emit_SLFI(p, r1, i2); -+ } -+ -+ /* Load 32 bit immediate to R0 then subtract */ -+ p = s390_emit_load_32imm(p, R0, i2); -+ return s390_emit_SR(p, r1, R0); -+} -+ -+ -+static UChar * -+s390_emit_LTw(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl, UChar dh) -+{ -+ if (s390_host_has_eimm) { -+ return s390_emit_LT(p, r1, x2, b2, dl, dh); -+ } -+ /* Load 32 bit from memory to R0 then compare */ -+ if (dh == 0) { -+ p = s390_emit_L(p, R0, x2, b2, dl); -+ } else { -+ p = s390_emit_LY(p, R0, x2, b2, dl, dh); -+ } -+ return s390_emit_LTR(p, r1, R0); -+} -+ -+ -+static UChar * -+s390_emit_LTGw(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl, UChar dh) -+{ -+ if (s390_host_has_eimm) { -+ return s390_emit_LTG(p, r1, x2, b2, dl, dh); -+ } -+ /* Load 64 bit from memory to R0 then compare */ -+ p = s390_emit_LG(p, R0, x2, b2, dl, dh); -+ return s390_emit_LTGR(p, r1, R0); -+} -+ -+ -+static UChar * -+s390_emit_CFIw(UChar *p, UChar r1, UInt i2) -+{ -+ if (s390_host_has_eimm) { -+ return s390_emit_CFI(p, r1, i2); -+ } -+ /* Load 32 bit immediate to R0 then compare */ -+ p = s390_emit_load_32imm(p, R0, i2); -+ return s390_emit_CR(p, r1, R0); -+} -+ -+ -+static UChar * -+s390_emit_CLFIw(UChar *p, UChar r1, UInt i2) -+{ -+ if (s390_host_has_eimm) { -+ return s390_emit_CLFI(p, r1, i2); -+ } -+ /* Load 32 bit immediate to R0 then compare */ -+ p = s390_emit_load_32imm(p, R0, i2); -+ return s390_emit_CLR(p, r1, R0); -+} -+ -+/* Split up a 20-bit displacement into its high and low piece -+ suitable for passing as function arguments */ -+#define DISP20(d) ((d) & 0xFFF), (((d) >> 12) & 0xFF) -+ -+/*---------------------------------------------------------------*/ -+/*--- Constructors for the various s390_insn kinds ---*/ -+/*---------------------------------------------------------------*/ -+ -+s390_insn * -+s390_insn_load(UChar size, HReg dst, s390_amode *src) -+{ -+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); -+ -+ insn->tag = S390_INSN_LOAD; -+ insn->size = size; -+ insn->variant.load.src = src; -+ insn->variant.load.dst = dst; -+ -+ vassert(size == 1 || size == 2 || size == 4 || size == 8); -+ -+ return insn; -+} -+ -+ -+s390_insn * -+s390_insn_store(UChar size, s390_amode *dst, HReg src) -+{ -+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); -+ -+ insn->tag = S390_INSN_STORE; -+ insn->size = size; -+ insn->variant.store.src = src; -+ insn->variant.store.dst = dst; -+ -+ vassert(size == 1 || size == 2 || size == 4 || size == 8); -+ -+ return insn; -+} -+ -+ -+s390_insn * -+s390_insn_move(UChar size, HReg dst, HReg src) -+{ -+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); -+ -+ insn->tag = S390_INSN_MOVE; -+ insn->size = size; -+ insn->variant.move.src = src; -+ insn->variant.move.dst = dst; -+ -+ vassert(size == 1 || size == 2 || size == 4 || size == 8); -+ -+ return insn; -+} -+ -+ -+s390_insn * -+s390_insn_cond_move(UChar size, s390_cc_t cond, HReg dst, s390_opnd_RMI src) -+{ -+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); -+ -+ insn->tag = S390_INSN_COND_MOVE; -+ insn->size = size; -+ insn->variant.cond_move.cond = cond; -+ insn->variant.cond_move.src = src; -+ insn->variant.cond_move.dst = dst; -+ -+ vassert(size == 1 || size == 2 || size == 4 || size == 8); -+ -+ return insn; -+} -+ -+ -+s390_insn * -+s390_insn_load_immediate(UChar size, HReg dst, ULong value) -+{ -+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); -+ -+ insn->tag = S390_INSN_LOAD_IMMEDIATE; -+ insn->size = size; -+ insn->variant.load_immediate.dst = dst; -+ insn->variant.load_immediate.value = value; -+ -+ return insn; -+} -+ -+ -+s390_insn * -+s390_insn_alu(UChar size, s390_alu_t tag, HReg dst, s390_opnd_RMI op2) -+{ -+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); -+ -+ insn->tag = S390_INSN_ALU; -+ insn->size = size; -+ insn->variant.alu.tag = tag; -+ insn->variant.alu.dst = dst; -+ insn->variant.alu.op2 = op2; -+ -+ return insn; -+} -+ -+ -+s390_insn * -+s390_insn_mul(UChar size, HReg dst_hi, HReg dst_lo, s390_opnd_RMI op2, -+ Bool signed_multiply) -+{ -+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); -+ -+ vassert(! hregIsVirtual(dst_hi)); -+ vassert(! hregIsVirtual(dst_lo)); -+ -+ insn->tag = S390_INSN_MUL; -+ insn->size = size; -+ insn->variant.mul.dst_hi = dst_hi; -+ insn->variant.mul.dst_lo = dst_lo; -+ insn->variant.mul.op2 = op2; -+ insn->variant.mul.signed_multiply = signed_multiply; -+ -+ return insn; -+} -+ -+ -+s390_insn * -+s390_insn_div(UChar size, HReg op1_hi, HReg op1_lo, s390_opnd_RMI op2, -+ Bool signed_divide) -+{ -+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); -+ -+ vassert(size == 4 || size == 8); -+ vassert(! hregIsVirtual(op1_hi)); -+ vassert(! hregIsVirtual(op1_lo)); -+ -+ insn->tag = S390_INSN_DIV; -+ insn->size = size; -+ insn->variant.div.op1_hi = op1_hi; -+ insn->variant.div.op1_lo = op1_lo; -+ insn->variant.div.op2 = op2; -+ insn->variant.div.signed_divide = signed_divide; -+ -+ return insn; -+} -+ -+ -+s390_insn * -+s390_insn_divs(UChar size, HReg rem, HReg op1, s390_opnd_RMI op2) -+{ -+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); -+ -+ vassert(size == 8); -+ vassert(! hregIsVirtual(op1)); -+ vassert(! hregIsVirtual(rem)); -+ -+ insn->tag = S390_INSN_DIVS; -+ insn->size = size; -+ insn->variant.divs.rem = rem; /* remainder */ -+ insn->variant.divs.op1 = op1; /* also quotient */ -+ insn->variant.divs.op2 = op2; -+ -+ return insn; -+} -+ -+ -+s390_insn * -+s390_insn_flogr(UChar size, HReg bitpos, HReg modval, s390_opnd_RMI src) -+{ -+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); -+ -+ vassert(size == 8); -+ vassert(! hregIsVirtual(bitpos)); -+ vassert(! hregIsVirtual(modval)); -+ -+ insn->tag = S390_INSN_FLOGR; -+ insn->size = size; -+ insn->variant.flogr.bitpos = bitpos; /* bit position */ -+ insn->variant.flogr.modval = modval; /* modified input value */ -+ insn->variant.flogr.src = src; -+ -+ return insn; -+} -+ -+ -+s390_insn * -+s390_insn_unop(UChar size, s390_unop_t tag, HReg dst, s390_opnd_RMI opnd) -+{ -+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); -+ -+ insn->tag = S390_INSN_UNOP; -+ insn->size = size; -+ insn->variant.unop.tag = tag; -+ insn->variant.unop.dst = dst; -+ insn->variant.unop.src = opnd; -+ -+ return insn; -+} -+ -+ -+s390_insn * -+s390_insn_test(UChar size, s390_opnd_RMI src) -+{ -+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); -+ -+ vassert(size == 4 || size == 8); -+ -+ insn->tag = S390_INSN_TEST; -+ insn->size = size; -+ insn->variant.test.src = src; -+ -+ return insn; -+} -+ -+ -+s390_insn * -+s390_insn_cc2bool(HReg dst, s390_cc_t cond) -+{ -+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); -+ -+ insn->tag = S390_INSN_CC2BOOL; -+ insn->size = 0; /* does not matter */ -+ insn->variant.cc2bool.cond = cond; -+ insn->variant.cc2bool.dst = dst; -+ -+ return insn; -+} -+ -+ -+s390_insn * -+s390_insn_cas(UChar size, HReg op1, s390_amode *op2, HReg op3, HReg old_mem) -+{ -+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); -+ -+ vassert(size == 4 || size == 8); -+ vassert(op2->x == 0); -+ -+ insn->tag = S390_INSN_CAS; -+ insn->size = size; -+ insn->variant.cas.op1 = op1; -+ insn->variant.cas.op2 = op2; -+ insn->variant.cas.op3 = op3; -+ insn->variant.cas.old_mem = old_mem; -+ -+ return insn; -+} -+ -+ -+s390_insn * -+s390_insn_compare(UChar size, HReg src1, s390_opnd_RMI src2, -+ Bool signed_comparison) -+{ -+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); -+ -+ vassert(size == 4 || size == 8); -+ -+ insn->tag = S390_INSN_COMPARE; -+ insn->size = size; -+ insn->variant.compare.src1 = src1; -+ insn->variant.compare.src2 = src2; -+ insn->variant.compare.signed_comparison = signed_comparison; -+ -+ return insn; -+} -+ -+ -+s390_insn * -+s390_insn_branch(IRJumpKind kind, s390_cc_t cond, s390_opnd_RMI dst) -+{ -+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); -+ -+ insn->tag = S390_INSN_BRANCH; -+ insn->size = 0; /* does not matter */ -+ insn->variant.branch.kind = kind; -+ insn->variant.branch.dst = dst; -+ insn->variant.branch.cond = cond; -+ -+ return insn; -+} -+ -+ -+s390_insn * -+s390_insn_helper_call(s390_cc_t cond, Addr64 target, UInt num_args, -+ HChar *name) -+{ -+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); -+ -+ insn->tag = S390_INSN_HELPER_CALL; -+ insn->size = 0; /* does not matter */ -+ insn->variant.helper_call.cond = cond; -+ insn->variant.helper_call.target = target; -+ insn->variant.helper_call.num_args = num_args; -+ insn->variant.helper_call.name = name; -+ -+ return insn; -+} -+ -+ -+s390_insn * -+s390_insn_bfp_triop(UChar size, s390_bfp_triop_t tag, HReg dst, HReg op2, -+ HReg op3, s390_round_t rounding_mode) -+{ -+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); -+ -+ insn->tag = S390_INSN_BFP_TRIOP; -+ insn->size = size; -+ insn->variant.bfp_triop.tag = tag; -+ insn->variant.bfp_triop.dst = dst; -+ insn->variant.bfp_triop.op2 = op2; -+ insn->variant.bfp_triop.op3 = op3; -+ insn->variant.bfp_triop.rounding_mode = rounding_mode; -+ -+ return insn; -+} -+ -+ -+s390_insn * -+s390_insn_bfp_binop(UChar size, s390_bfp_binop_t tag, HReg dst, HReg op2, -+ s390_round_t rounding_mode) -+{ -+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); -+ -+ insn->tag = S390_INSN_BFP_BINOP; -+ insn->size = size; -+ insn->variant.bfp_binop.tag = tag; -+ insn->variant.bfp_binop.dst = dst; -+ insn->variant.bfp_binop.op2 = op2; -+ insn->variant.bfp_binop.rounding_mode = rounding_mode; -+ -+ return insn; -+} -+ -+ -+s390_insn * -+s390_insn_bfp_unop(UChar size, s390_bfp_unop_t tag, HReg dst, HReg op, -+ s390_round_t rounding_mode) -+{ -+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); -+ -+ insn->tag = S390_INSN_BFP_UNOP; -+ insn->size = size; -+ insn->variant.bfp_unop.tag = tag; -+ insn->variant.bfp_unop.dst = dst; -+ insn->variant.bfp_unop.op = op; -+ insn->variant.bfp_unop.rounding_mode = rounding_mode; -+ -+ return insn; -+} -+ -+ -+s390_insn * -+s390_insn_bfp_compare(UChar size, HReg dst, HReg op1, HReg op2) -+{ -+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); -+ -+ vassert(size == 4 || size == 8); -+ -+ insn->tag = S390_INSN_BFP_COMPARE; -+ insn->size = size; -+ insn->variant.bfp_compare.dst = dst; -+ insn->variant.bfp_compare.op1 = op1; -+ insn->variant.bfp_compare.op2 = op2; -+ -+ return insn; -+} -+ -+ -+s390_insn * -+s390_insn_bfp128_binop(UChar size, s390_bfp_binop_t tag, HReg dst_hi, -+ HReg dst_lo, HReg op2_hi, HReg op2_lo, -+ s390_round_t rounding_mode) -+{ -+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); -+ -+ insn->tag = S390_INSN_BFP128_BINOP; -+ insn->size = size; -+ insn->variant.bfp128_binop.tag = tag; -+ insn->variant.bfp128_binop.dst_hi = dst_hi; -+ insn->variant.bfp128_binop.dst_lo = dst_lo; -+ insn->variant.bfp128_binop.op2_hi = op2_hi; -+ insn->variant.bfp128_binop.op2_lo = op2_lo; -+ insn->variant.bfp128_binop.rounding_mode = rounding_mode; -+ -+ return insn; -+} -+ -+ -+s390_insn * -+s390_insn_bfp128_unop(UChar size, s390_bfp_binop_t tag, HReg dst_hi, -+ HReg dst_lo, HReg op_hi, HReg op_lo, -+ s390_round_t rounding_mode) -+{ -+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); -+ -+ insn->tag = S390_INSN_BFP128_UNOP; -+ insn->size = size; -+ insn->variant.bfp128_unop.tag = tag; -+ insn->variant.bfp128_unop.dst_hi = dst_hi; -+ insn->variant.bfp128_unop.dst_lo = dst_lo; -+ insn->variant.bfp128_unop.op_hi = op_hi; -+ insn->variant.bfp128_unop.op_lo = op_lo; -+ insn->variant.bfp128_unop.rounding_mode = rounding_mode; -+ -+ return insn; -+} -+ -+ -+s390_insn * -+s390_insn_bfp128_compare(UChar size, HReg dst, HReg op1_hi, HReg op1_lo, -+ HReg op2_hi, HReg op2_lo) -+{ -+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); -+ -+ insn->tag = S390_INSN_BFP128_COMPARE; -+ insn->size = size; -+ insn->variant.bfp128_compare.dst = dst; -+ insn->variant.bfp128_compare.op1_hi = op1_hi; -+ insn->variant.bfp128_compare.op1_lo = op1_lo; -+ insn->variant.bfp128_compare.op2_hi = op2_hi; -+ insn->variant.bfp128_compare.op2_lo = op2_lo; -+ -+ return insn; -+} -+ -+ -+s390_insn * -+s390_insn_bfp128_convert_to(UChar size, s390_bfp_unop_t tag, HReg dst_hi, -+ HReg dst_lo, HReg op) -+{ -+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); -+ -+ insn->tag = S390_INSN_BFP128_CONVERT_TO; -+ insn->size = size; -+ insn->variant.bfp128_unop.tag = tag; -+ insn->variant.bfp128_unop.dst_hi = dst_hi; -+ insn->variant.bfp128_unop.dst_lo = dst_lo; -+ insn->variant.bfp128_unop.op_hi = op; -+ insn->variant.bfp128_unop.op_lo = INVALID_HREG; /* unused */ -+ insn->variant.bfp128_unop.rounding_mode = S390_ROUND_NEAREST_EVEN; /* unused */ -+ -+ return insn; -+} -+ -+ -+s390_insn * -+s390_insn_bfp128_convert_from(UChar size, s390_bfp_unop_t tag, HReg dst, -+ HReg op_hi, HReg op_lo, -+ s390_round_t rounding_mode) -+{ -+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn)); -+ -+ insn->tag = S390_INSN_BFP128_CONVERT_FROM; -+ insn->size = size; -+ insn->variant.bfp128_unop.tag = tag; -+ insn->variant.bfp128_unop.dst_hi = dst; -+ insn->variant.bfp128_unop.dst_lo = INVALID_HREG; /* unused */ -+ insn->variant.bfp128_unop.op_hi = op_hi; -+ insn->variant.bfp128_unop.op_lo = op_lo; -+ insn->variant.bfp128_unop.rounding_mode = rounding_mode; -+ -+ return insn; -+} -+ -+ -+/*---------------------------------------------------------------*/ -+/*--- Debug print ---*/ -+/*---------------------------------------------------------------*/ -+ -+static const HChar * -+s390_cc_as_string(s390_cc_t cc) -+{ -+ switch (cc) { -+ case S390_CC_NEVER: return "never"; -+ case S390_CC_OVFL: return "overflow"; -+ case S390_CC_H: return "greater than"; /* A > B ; high */ -+ case S390_CC_NLE: return "not low or equal"; -+ case S390_CC_L: return "less than"; /* A < B ; low */ -+ case S390_CC_NHE: return "not high or equal"; -+ case S390_CC_LH: return "low or high"; -+ case S390_CC_NE: return "not equal"; /* A != B ; not zero */ -+ case S390_CC_E: return "equal"; /* A == B ; zero */ -+ case S390_CC_NLH: return "not low or high"; -+ case S390_CC_HE: return "greater or equal"; /* A >= B ; high or equal*/ -+ case S390_CC_NL: return "not low"; /* not low */ -+ case S390_CC_LE: return "less or equal"; /* A <= B ; low or equal */ -+ case S390_CC_NH: return "not high"; -+ case S390_CC_NO: return "not overflow"; -+ case S390_CC_ALWAYS: return "always"; -+ default: -+ vpanic("s390_cc_as_string"); -+ } -+} -+ -+ -+/* Helper function for writing out a V insn */ -+static void -+s390_sprintf(HChar *buf, HChar *fmt, ...) -+{ -+ HChar *p; -+ ULong value; -+ va_list args; -+ va_start(args, fmt); -+ -+ p = buf; -+ for ( ; *fmt; ++fmt) { -+ Int c = *fmt; -+ -+ if (c != '%') { -+ *p++ = c; -+ continue; -+ } -+ -+ c = *++fmt; /* next char */ -+ switch (c) { -+ case '%': -+ *p++ = c; /* %% */ -+ continue; -+ -+ case 's': /* %s */ -+ p += vex_sprintf(p, "%s", va_arg(args, HChar *)); -+ continue; -+ -+ case 'M': /* %M = mnemonic */ -+ p += vex_sprintf(p, "%-8s", va_arg(args, HChar *)); -+ continue; -+ -+ case 'R': /* %R = register */ -+ p += vex_sprintf(p, "%s", s390_hreg_as_string(va_arg(args, HReg))); -+ continue; -+ -+ case 'A': /* %A = amode */ -+ p += vex_sprintf(p, "%s", -+ s390_amode_as_string(va_arg(args, s390_amode *))); -+ continue; -+ -+ case 'C': /* %C = condition code */ -+ p += vex_sprintf(p, "%s", s390_cc_as_string(va_arg(args, s390_cc_t))); -+ continue; -+ -+ case 'L': { /* %L = argument list in helper call*/ -+ UInt i, num_args; -+ -+ num_args = va_arg(args, UInt); -+ -+ for (i = 0; i < num_args; ++i) { -+ if (i != 0) p += vex_sprintf(p, ", "); -+ p += vex_sprintf(p, "r%d", s390_gprno_from_arg_index(i)); -+ } -+ continue; -+ } -+ -+ case 'O': { /* %O = RMI operand */ -+ s390_opnd_RMI *op = va_arg(args, s390_opnd_RMI *); -+ -+ switch (op->tag) { -+ case S390_OPND_REG: -+ p += vex_sprintf(p, "%s", s390_hreg_as_string(op->variant.reg)); -+ continue; -+ -+ case S390_OPND_AMODE: -+ p += vex_sprintf(p, "%s", s390_amode_as_string(op->variant.am)); -+ continue; -+ -+ case S390_OPND_IMMEDIATE: -+ value = op->variant.imm; -+ goto print_value; -+ -+ default: -+ goto fail; -+ } -+ } -+ -+ case 'I': /* %I = immediate value */ -+ value = va_arg(args, ULong); -+ goto print_value; -+ -+ print_value: -+ if ((Long)value < 0) -+ p += vex_sprintf(p, "%lld", (Long)value); -+ else if (value < 100) -+ p += vex_sprintf(p, "%llu", value); -+ else -+ p += vex_sprintf(p, "0x%llx", value); -+ continue; -+ -+ default: -+ goto fail; -+ } -+ } -+ *p = '\0'; -+ va_end(args); -+ -+ return; -+ -+ fail: vpanic("s390_printf"); -+} -+ -+ -+/* Decompile the given insn into a static buffer and return it */ -+const HChar * -+s390_insn_as_string(const s390_insn *insn) -+{ -+ static HChar buf[300]; -+ const HChar *op; -+ HChar *p; -+ -+ buf[0] = '\0'; -+ -+ switch (insn->tag) { -+ case S390_INSN_LOAD: -+ s390_sprintf(buf, "%M %R,%A", "v-load", insn->variant.load.dst, -+ insn->variant.load.src); -+ break; -+ -+ case S390_INSN_STORE: -+ s390_sprintf(buf, "%M %R,%A", "v-store", insn->variant.store.src, -+ insn->variant.store.dst); -+ break; -+ -+ case S390_INSN_MOVE: -+ s390_sprintf(buf, "%M %R,%R", "v-move", insn->variant.move.dst, -+ insn->variant.move.src); -+ break; -+ -+ case S390_INSN_COND_MOVE: -+ s390_sprintf(buf, "%M if (%C) %R,%O", "v-move", -+ insn->variant.cond_move.cond, insn->variant.cond_move.dst, -+ &insn->variant.cond_move.src); -+ break; -+ -+ case S390_INSN_LOAD_IMMEDIATE: -+ s390_sprintf(buf, "%M %R,%I", "v-loadi", insn->variant.load_immediate.dst, -+ insn->variant.load_immediate.value); -+ break; -+ -+ case S390_INSN_ALU: -+ switch (insn->variant.alu.tag) { -+ case S390_ALU_ADD: op = "v-add"; break; -+ case S390_ALU_SUB: op = "v-sub"; break; -+ case S390_ALU_MUL: op = "v-mul"; break; -+ case S390_ALU_AND: op = "v-and"; break; -+ case S390_ALU_OR: op = "v-or"; break; -+ case S390_ALU_XOR: op = "v-xor"; break; -+ case S390_ALU_LSH: op = "v-lsh"; break; -+ case S390_ALU_RSH: op = "v-rsh"; break; -+ case S390_ALU_RSHA: op = "v-rsha"; break; -+ default: goto fail; -+ } -+ s390_sprintf(buf, "%M %R,%R,%O", op, insn->variant.alu.dst, -+ insn->variant.alu.dst /* op1 same as dst */, -+ &insn->variant.alu.op2); -+ break; -+ -+ case S390_INSN_MUL: -+ if (insn->variant.mul.signed_multiply) { -+ op = "v-muls"; -+ } else { -+ op = "v-mulu"; -+ } -+ s390_sprintf(buf, "%M %R,%O", op, insn->variant.mul.dst_hi, -+ &insn->variant.mul.op2); -+ break; -+ -+ case S390_INSN_DIV: -+ if (insn->variant.div.signed_divide) { -+ op = "v-divs"; -+ } else { -+ op = "v-divu"; -+ } -+ s390_sprintf(buf, "%M %R,%O", op, insn->variant.div.op1_hi, -+ &insn->variant.div.op2); -+ break; -+ -+ case S390_INSN_DIVS: -+ s390_sprintf(buf, "%M %R,%O", "v-divsi", insn->variant.divs.op1, -+ &insn->variant.divs.op2); -+ break; -+ -+ case S390_INSN_FLOGR: -+ s390_sprintf(buf, "%M %R,%O", "v-flogr", insn->variant.flogr.bitpos, -+ &insn->variant.flogr.src); -+ break; -+ -+ case S390_INSN_UNOP: -+ switch (insn->variant.unop.tag) { -+ case S390_ZERO_EXTEND_8: -+ case S390_ZERO_EXTEND_16: -+ case S390_ZERO_EXTEND_32: -+ op = "v-zerox"; -+ break; -+ -+ case S390_SIGN_EXTEND_8: -+ case S390_SIGN_EXTEND_16: -+ case S390_SIGN_EXTEND_32: -+ op = "v-signx"; -+ break; -+ -+ case S390_NEGATE: -+ op = "v-neg"; -+ break; -+ -+ default: -+ goto fail; -+ } -+ s390_sprintf(buf, "%M %R,%O", op, insn->variant.unop.dst, -+ &insn->variant.unop.src); -+ break; -+ -+ case S390_INSN_TEST: -+ s390_sprintf(buf, "%M %O", "v-test", &insn->variant.test.src); -+ break; -+ -+ case S390_INSN_CC2BOOL: -+ s390_sprintf(buf, "%M %R,%C", "v-cc2b", insn->variant.cc2bool.dst, -+ insn->variant.cc2bool.cond); -+ break; -+ -+ case S390_INSN_CAS: -+ s390_sprintf(buf, "%M %R,%A,%R,%R", "v-cas", insn->variant.cas.op1, -+ insn->variant.cas.op2, insn->variant.cas.op3, -+ insn->variant.cas.old_mem); -+ break; -+ -+ case S390_INSN_COMPARE: -+ if (insn->variant.compare.signed_comparison) { -+ op = "v-cmps"; -+ } else { -+ op = "v-cmpu"; -+ } -+ s390_sprintf(buf, "%M %R,%O", op, insn->variant.compare.src1, -+ &insn->variant.compare.src2); -+ break; -+ -+ case S390_INSN_BRANCH: -+ switch (insn->variant.branch.kind) { -+ case Ijk_ClientReq: op = "clientreq"; break; -+ case Ijk_Sys_syscall: op = "syscall"; break; -+ case Ijk_Yield: op = "yield"; break; -+ case Ijk_EmWarn: op = "emwarn"; break; -+ case Ijk_EmFail: op = "emfail"; break; -+ case Ijk_MapFail: op = "mapfail"; break; -+ case Ijk_NoDecode: op = "nodecode"; break; -+ case Ijk_TInval: op = "tinval"; break; -+ case Ijk_NoRedir: op = "noredir"; break; -+ case Ijk_SigTRAP: op = "sigtrap"; break; -+ case Ijk_Boring: op = "goto"; break; -+ case Ijk_Call: op = "call"; break; -+ case Ijk_Ret: op = "return"; break; -+ default: -+ goto fail; -+ } -+ s390_sprintf(buf, "if (%C) %s %O", insn->variant.branch.cond, op, -+ &insn->variant.branch.dst); -+ break; -+ -+ case S390_INSN_HELPER_CALL: { -+ -+ if (insn->variant.helper_call.cond != S390_CC_ALWAYS) { -+ s390_sprintf(buf, "%M if (%C) %s{%I}(%L)", "v-call", -+ insn->variant.helper_call.cond, -+ insn->variant.helper_call.name, -+ insn->variant.helper_call.target, -+ insn->variant.helper_call.num_args); -+ } else { -+ s390_sprintf(buf, "%M %s{%I}(%L)", "v-call", -+ insn->variant.helper_call.name, -+ insn->variant.helper_call.target, -+ insn->variant.helper_call.num_args); -+ } -+ break; -+ } -+ -+ case S390_INSN_BFP_TRIOP: -+ switch (insn->variant.bfp_triop.tag) { -+ case S390_BFP_MADD: op = "v-fmadd"; break; -+ case S390_BFP_MSUB: op = "v-fmsub"; break; -+ default: goto fail; -+ } -+ s390_sprintf(buf, "%M %R,%R,%R,%R", op, insn->variant.bfp_triop.dst, -+ insn->variant.bfp_triop.dst /* op1 same as dst */, -+ insn->variant.bfp_triop.op2, insn->variant.bfp_triop.op3); -+ break; -+ -+ case S390_INSN_BFP_BINOP: -+ switch (insn->variant.bfp_binop.tag) { -+ case S390_BFP_ADD: op = "v-fadd"; break; -+ case S390_BFP_SUB: op = "v-fsub"; break; -+ case S390_BFP_MUL: op = "v-fmul"; break; -+ case S390_BFP_DIV: op = "v-fdiv"; break; -+ default: goto fail; -+ } -+ s390_sprintf(buf, "%M %R,%R,%R", op, insn->variant.bfp_binop.dst, -+ insn->variant.bfp_binop.dst /* op1 same as dst */, -+ insn->variant.bfp_binop.op2); -+ break; -+ -+ case S390_INSN_BFP_COMPARE: -+ s390_sprintf(buf, "%M %R,%R,%R", "v-fcmp", insn->variant.bfp_compare.dst, -+ insn->variant.bfp_compare.op1, insn->variant.bfp_compare.op2); -+ break; -+ -+ case S390_INSN_BFP_UNOP: -+ switch (insn->variant.bfp_unop.tag) { -+ case S390_BFP_ABS: op = "v-fabs"; break; -+ case S390_BFP_NABS: op = "v-fnabs"; break; -+ case S390_BFP_NEG: op = "v-fneg"; break; -+ case S390_BFP_SQRT: op = "v-fsqrt"; break; -+ case S390_BFP_I32_TO_F32: -+ case S390_BFP_I32_TO_F64: -+ case S390_BFP_I32_TO_F128: -+ case S390_BFP_I64_TO_F32: -+ case S390_BFP_I64_TO_F64: -+ case S390_BFP_I64_TO_F128: op = "v-i2f"; break; -+ case S390_BFP_F32_TO_I32: -+ case S390_BFP_F32_TO_I64: -+ case S390_BFP_F64_TO_I32: -+ case S390_BFP_F64_TO_I64: -+ case S390_BFP_F128_TO_I32: -+ case S390_BFP_F128_TO_I64: op = "v-f2i"; break; -+ case S390_BFP_F32_TO_F64: -+ case S390_BFP_F32_TO_F128: -+ case S390_BFP_F64_TO_F32: -+ case S390_BFP_F64_TO_F128: -+ case S390_BFP_F128_TO_F32: -+ case S390_BFP_F128_TO_F64: op = "v-f2f"; break; -+ default: goto fail; -+ } -+ s390_sprintf(buf, "%M %R,%R", op, insn->variant.bfp_unop.dst, -+ insn->variant.bfp_unop.op); -+ break; -+ -+ case S390_INSN_BFP128_BINOP: -+ switch (insn->variant.bfp128_binop.tag) { -+ case S390_BFP_ADD: op = "v-fadd"; break; -+ case S390_BFP_SUB: op = "v-fsub"; break; -+ case S390_BFP_MUL: op = "v-fmul"; break; -+ case S390_BFP_DIV: op = "v-fdiv"; break; -+ default: goto fail; -+ } -+ /* Only write the register that identifies the register pair */ -+ s390_sprintf(buf, "%M %R,%R,%R", op, insn->variant.bfp128_binop.dst_hi, -+ insn->variant.bfp128_binop.dst_hi /* op1 same as dst */, -+ insn->variant.bfp128_binop.op2_hi); -+ break; -+ -+ case S390_INSN_BFP128_COMPARE: -+ /* Only write the register that identifies the register pair */ -+ s390_sprintf(buf, "%M %R,%R,%R", "v-fcmp", insn->variant.bfp128_compare.dst, -+ insn->variant.bfp128_compare.op1_hi, -+ insn->variant.bfp128_compare.op2_hi); -+ break; -+ -+ case S390_INSN_BFP128_UNOP: -+ case S390_INSN_BFP128_CONVERT_TO: -+ case S390_INSN_BFP128_CONVERT_FROM: -+ switch (insn->variant.bfp128_unop.tag) { -+ case S390_BFP_ABS: op = "v-fabs"; break; -+ case S390_BFP_NABS: op = "v-fnabs"; break; -+ case S390_BFP_NEG: op = "v-fneg"; break; -+ case S390_BFP_SQRT: op = "v-fsqrt"; break; -+ case S390_BFP_I32_TO_F128: -+ case S390_BFP_I64_TO_F128: op = "v-i2f"; break; -+ case S390_BFP_F128_TO_I32: -+ case S390_BFP_F128_TO_I64: op = "v-f2i"; break; -+ case S390_BFP_F32_TO_F128: -+ case S390_BFP_F64_TO_F128: -+ case S390_BFP_F128_TO_F32: -+ case S390_BFP_F128_TO_F64: op = "v-f2f"; break; -+ default: goto fail; -+ } -+ /* Only write the register that identifies the register pair */ -+ s390_sprintf(buf, "%M %R,%R", op, insn->variant.bfp128_unop.dst_hi, -+ insn->variant.bfp128_unop.op_hi); -+ break; -+ -+ default: goto fail; -+ } -+ -+ /* Write out how many bytes are involved in the operation */ -+ -+ { -+ UInt len, i; -+ -+ for (p = buf; *p; ++p) -+ continue; -+ -+ len = p - buf; -+ -+ if (len < 32) { -+ for (i = len; i < 32; ++i) -+ p += vex_sprintf(p, " "); -+ } else { -+ p += vex_sprintf(p, "\t"); -+ } -+ } -+ -+ /* Special cases first */ -+ switch (insn->tag) { -+ case S390_INSN_UNOP: -+ switch (insn->variant.unop.tag) { -+ case S390_SIGN_EXTEND_8: -+ case S390_ZERO_EXTEND_8: p += vex_sprintf(p, "1 -> "); goto common; -+ case S390_SIGN_EXTEND_16: -+ case S390_ZERO_EXTEND_16: p += vex_sprintf(p, "2 -> "); goto common; -+ case S390_SIGN_EXTEND_32: -+ case S390_ZERO_EXTEND_32: p += vex_sprintf(p, "4 -> "); goto common; -+ default: -+ goto common; -+ } -+ -+ case S390_INSN_BFP_UNOP: -+ switch (insn->variant.bfp_unop.tag) { -+ case S390_BFP_I32_TO_F32: -+ case S390_BFP_I32_TO_F64: -+ case S390_BFP_I32_TO_F128: -+ case S390_BFP_F32_TO_I32: -+ case S390_BFP_F32_TO_I64: -+ case S390_BFP_F32_TO_F64: -+ case S390_BFP_F32_TO_F128: p += vex_sprintf(p, "4 -> "); goto common; -+ case S390_BFP_I64_TO_F32: -+ case S390_BFP_I64_TO_F64: -+ case S390_BFP_I64_TO_F128: -+ case S390_BFP_F64_TO_I32: -+ case S390_BFP_F64_TO_I64: -+ case S390_BFP_F64_TO_F32: -+ case S390_BFP_F64_TO_F128: p += vex_sprintf(p, "8 -> "); goto common; -+ case S390_BFP_F128_TO_I32: -+ case S390_BFP_F128_TO_I64: -+ case S390_BFP_F128_TO_F32: -+ case S390_BFP_F128_TO_F64: p += vex_sprintf(p, "16 -> "); goto common; -+ default: -+ goto common; -+ } -+ -+ case S390_INSN_BFP128_UNOP: -+ case S390_INSN_BFP128_CONVERT_TO: -+ case S390_INSN_BFP128_CONVERT_FROM: -+ switch (insn->variant.bfp128_unop.tag) { -+ case S390_BFP_I32_TO_F128: -+ case S390_BFP_F32_TO_F128: p += vex_sprintf(p, "4 -> "); goto common; -+ case S390_BFP_I64_TO_F128: -+ case S390_BFP_F64_TO_F128: p += vex_sprintf(p, "8 -> "); goto common; -+ case S390_BFP_F128_TO_I32: -+ case S390_BFP_F128_TO_I64: -+ case S390_BFP_F128_TO_F32: -+ case S390_BFP_F128_TO_F64: p += vex_sprintf(p, "16 -> "); goto common; -+ default: -+ goto common; -+ } -+ -+ default: -+ goto common; -+ } -+ -+ /* Common case */ -+ common: -+ vex_sprintf(p, "%u bytes", (UInt)insn->size); -+ -+ return buf; -+ -+ fail: vpanic("s390_insn_as_string"); -+} -+ -+ -+ -+/* Load NUM bytes from memory into register REG using addressing mode AM. */ -+static UChar * -+s390_emit_load_mem(UChar *p, UInt num, UChar reg, const s390_amode *am) -+{ -+ UInt b = hregNumber(am->b); -+ UInt x = hregNumber(am->x); /* 0 for B12 and B20 */ -+ UInt d = am->d; -+ -+ switch (am->tag) { -+ case S390_AMODE_B12: -+ case S390_AMODE_BX12: -+ switch (num) { -+ case 1: return s390_emit_IC(p, reg, x, b, d); -+ case 2: return s390_emit_LH(p, reg, x, b, d); -+ case 4: return s390_emit_L(p, reg, x, b, d); -+ case 8: return s390_emit_LG(p, reg, x, b, DISP20(d)); -+ default: goto fail; -+ } -+ break; -+ -+ case S390_AMODE_B20: -+ case S390_AMODE_BX20: -+ switch (num) { -+ case 1: return s390_emit_ICY(p, reg, x, b, DISP20(d)); -+ case 2: return s390_emit_LHY(p, reg, x, b, DISP20(d)); -+ case 4: return s390_emit_LY(p, reg, x, b, DISP20(d)); -+ case 8: return s390_emit_LG(p, reg, x, b, DISP20(d)); -+ default: goto fail; -+ } -+ break; -+ -+ default: goto fail; -+ } -+ -+ fail: -+ vpanic("s390_emit_load_mem"); -+} -+ -+ -+/* Load condition code into register REG */ -+static UChar * -+s390_emit_load_cc(UChar *p, UChar reg) -+{ -+ p = s390_emit_LGHI(p, reg, 0); /* Clear out, cc not affected */ -+ p = s390_emit_IPM(p, reg, reg); -+ /* Shift 28 bits to the right --> [0,1,2,3] */ -+ return s390_emit_SRLG(p, reg, reg, 0, DISP20(28)); /* REG = cc */ -+} -+ -+ -+/*---------------------------------------------------------------*/ -+/*--- Code generation ---*/ -+/*---------------------------------------------------------------*/ -+ -+/* Do not load more bytes than requested. */ -+static UChar * -+s390_insn_load_emit(UChar *buf, const s390_insn *insn) -+{ -+ UInt r, x, b, d; -+ const s390_amode *src; -+ -+ src = insn->variant.load.src; -+ -+ r = hregNumber(insn->variant.load.dst); -+ -+ if (hregClass(insn->variant.load.dst) == HRcFlt64) { -+ b = hregNumber(src->b); -+ x = hregNumber(src->x); /* 0 for B12 and B20 */ -+ d = src->d; -+ -+ switch (insn->size) { -+ -+ case 4: -+ switch (src->tag) { -+ case S390_AMODE_B12: -+ case S390_AMODE_BX12: -+ return s390_emit_LE(buf, r, x, b, d); -+ -+ case S390_AMODE_B20: -+ case S390_AMODE_BX20: -+ return s390_emit_LEY(buf, r, x, b, DISP20(d)); -+ } -+ break; -+ -+ case 8: -+ switch (src->tag) { -+ case S390_AMODE_B12: -+ case S390_AMODE_BX12: -+ return s390_emit_LD(buf, r, x, b, d); -+ -+ case S390_AMODE_B20: -+ case S390_AMODE_BX20: -+ return s390_emit_LDY(buf, r, x, b, DISP20(d)); -+ } -+ break; -+ } -+ vpanic("s390_insn_load_emit"); -+ } -+ -+ /* Integer stuff */ -+ return s390_emit_load_mem(buf, insn->size, r, src); -+} -+ -+ -+static UChar * -+s390_insn_store_emit(UChar *buf, const s390_insn *insn) -+{ -+ UInt r, x, b, d; -+ const s390_amode *dst; -+ -+ dst = insn->variant.store.dst; -+ -+ r = hregNumber(insn->variant.store.src); -+ b = hregNumber(dst->b); -+ x = hregNumber(dst->x); /* 0 for B12 and B20 */ -+ d = dst->d; -+ -+ if (hregClass(insn->variant.store.src) == HRcFlt64) { -+ switch (insn->size) { -+ -+ case 4: -+ switch (dst->tag) { -+ case S390_AMODE_B12: -+ case S390_AMODE_BX12: -+ return s390_emit_STE(buf, r, x, b, d); -+ -+ case S390_AMODE_B20: -+ case S390_AMODE_BX20: -+ return s390_emit_STEY(buf, r, x, b, DISP20(d)); -+ } -+ break; -+ -+ case 8: -+ switch (dst->tag) { -+ case S390_AMODE_B12: -+ case S390_AMODE_BX12: -+ return s390_emit_STD(buf, r, x, b, d); -+ -+ case S390_AMODE_B20: -+ case S390_AMODE_BX20: -+ return s390_emit_STDY(buf, r, x, b, DISP20(d)); -+ } -+ break; -+ } -+ vpanic("s390_insn_store_emit"); -+ } -+ -+ /* Integer stuff */ -+ switch (insn->size) { -+ case 1: -+ switch (dst->tag) { -+ case S390_AMODE_B12: -+ case S390_AMODE_BX12: -+ return s390_emit_STC(buf, r, x, b, d); -+ -+ case S390_AMODE_B20: -+ case S390_AMODE_BX20: -+ return s390_emit_STCY(buf, r, x, b, DISP20(d)); -+ } -+ break; -+ -+ case 2: -+ switch (dst->tag) { -+ case S390_AMODE_B12: -+ case S390_AMODE_BX12: -+ return s390_emit_STH(buf, r, x, b, d); -+ -+ case S390_AMODE_B20: -+ case S390_AMODE_BX20: -+ return s390_emit_STHY(buf, r, x, b, DISP20(d)); -+ } -+ break; -+ -+ case 4: -+ switch (dst->tag) { -+ case S390_AMODE_B12: -+ case S390_AMODE_BX12: -+ return s390_emit_ST(buf, r, x, b, d); -+ -+ case S390_AMODE_B20: -+ case S390_AMODE_BX20: -+ return s390_emit_STY(buf, r, x, b, DISP20(d)); -+ } -+ break; -+ -+ case 8: -+ return s390_emit_STG(buf, r, x, b, DISP20(d)); -+ -+ default: -+ break; -+ } -+ -+ vpanic("s390_insn_store_emit"); -+} -+ -+ -+static UChar * -+s390_insn_move_emit(UChar *buf, const s390_insn *insn) -+{ -+ UInt dst, src; -+ HRegClass dst_class, src_class; -+ -+ dst = hregNumber(insn->variant.move.dst); -+ src = hregNumber(insn->variant.move.src); -+ -+ dst_class = hregClass(insn->variant.move.dst); -+ src_class = hregClass(insn->variant.move.src); -+ -+ if (dst_class == src_class) { -+ if (dst_class == HRcInt64) -+ return s390_emit_LGR(buf, dst, src); -+ if (dst_class == HRcFlt64) -+ return s390_emit_LDR(buf, dst, src); -+ } else { -+ if (dst_class == HRcFlt64 && src_class == HRcInt64) -+ return s390_emit_LDGR(buf, dst, src); -+ if (dst_class == HRcInt64 && src_class == HRcFlt64) -+ return s390_emit_LGDR(buf, dst, src); -+ /* A move between floating point registers and general purpose -+ registers of different size should never occur and indicates -+ an error elsewhere. */ -+ } -+ -+ vpanic("s390_insn_move_emit"); -+} -+ -+ -+static UChar * -+s390_insn_load_immediate_emit(UChar *buf, const s390_insn *insn) -+{ -+ UInt r; -+ ULong value = insn->variant.load_immediate.value; -+ -+ r = hregNumber(insn->variant.load_immediate.dst); -+ -+ if (hregClass(insn->variant.load_immediate.dst) == HRcFlt64) { -+ vassert(value == 0); -+ switch (insn->size) { -+ case 4: return s390_emit_LZER(buf, r, value); -+ case 8: return s390_emit_LZDR(buf, r, value); -+ } -+ vpanic("s390_insn_load_immediate_emit"); -+ } -+ -+ switch (insn->size) { -+ case 1: -+ case 2: -+ /* Load the immediate values as a 4 byte value. That does not hurt as -+ those extra bytes will not be looked at. Fall through .... */ -+ case 4: -+ return s390_emit_load_32imm(buf, r, value); -+ -+ case 8: -+ return s390_emit_load_64imm(buf, r, value); -+ } -+ -+ vpanic("s390_insn_load_immediate_emit"); -+} -+ -+ -+/* There is no easy way to do ALU operations on 1-byte or 2-byte operands. -+ So we simply perform a 4-byte operation. Doing so uses possibly undefined -+ bits and produces an undefined result in those extra bit positions. But -+ upstream does not look at those positions, so this is OK. */ -+static UChar * -+s390_insn_alu_emit(UChar *buf, const s390_insn *insn) -+{ -+ s390_opnd_RMI op2; -+ UInt dst; -+ -+ dst = hregNumber(insn->variant.alu.dst); -+ op2 = insn->variant.alu.op2; -+ -+ /* Second operand is in a register */ -+ if (op2.tag == S390_OPND_REG) { -+ UInt r2 = hregNumber(op2.variant.reg); -+ -+ switch (insn->size) { -+ case 1: -+ case 2: -+ case 4: -+ switch (insn->variant.alu.tag) { -+ case S390_ALU_ADD: return s390_emit_AR(buf, dst, r2); -+ case S390_ALU_SUB: return s390_emit_SR(buf, dst, r2); -+ case S390_ALU_MUL: return s390_emit_MSR(buf, dst, r2); -+ case S390_ALU_AND: return s390_emit_NR(buf, dst, r2); -+ case S390_ALU_OR: return s390_emit_OR(buf, dst, r2); -+ case S390_ALU_XOR: return s390_emit_XR(buf, dst, r2); -+ case S390_ALU_LSH: return s390_emit_SLL(buf, dst, 0, r2, 0); -+ case S390_ALU_RSH: return s390_emit_SRL(buf, dst, 0, r2, 0); -+ case S390_ALU_RSHA: return s390_emit_SRA(buf, dst, 0, r2, 0); -+ } -+ goto fail; -+ -+ case 8: -+ switch (insn->variant.alu.tag) { -+ case S390_ALU_ADD: return s390_emit_AGR(buf, dst, r2); -+ case S390_ALU_SUB: return s390_emit_SGR(buf, dst, r2); -+ case S390_ALU_MUL: return s390_emit_MSGR(buf, dst, r2); -+ case S390_ALU_AND: return s390_emit_NGR(buf, dst, r2); -+ case S390_ALU_OR: return s390_emit_OGR(buf, dst, r2); -+ case S390_ALU_XOR: return s390_emit_XGR(buf, dst, r2); -+ case S390_ALU_LSH: return s390_emit_SLLG(buf, dst, dst, r2, DISP20(0)); -+ case S390_ALU_RSH: return s390_emit_SRLG(buf, dst, dst, r2, DISP20(0)); -+ case S390_ALU_RSHA: return s390_emit_SRAG(buf, dst, dst, r2, DISP20(0)); -+ } -+ goto fail; -+ } -+ goto fail; -+ } -+ -+ /* 2nd operand is in memory */ -+ if (op2.tag == S390_OPND_AMODE) { -+ UInt b, x, d; -+ const s390_amode *src = op2.variant.am; -+ -+ b = hregNumber(src->b); -+ x = hregNumber(src->x); /* 0 for B12 and B20 */ -+ d = src->d; -+ -+ /* Shift operands are special here as there are no opcodes that -+ allow a memory operand. So we first load the 2nd operand to R0. */ -+ if (insn->variant.alu.tag == S390_ALU_LSH || -+ insn->variant.alu.tag == S390_ALU_RSH || -+ insn->variant.alu.tag == S390_ALU_RSHA) { -+ -+ buf = s390_emit_load_mem(buf, insn->size, R0, src); -+ -+ if (insn->size == 8) { -+ if (insn->variant.alu.tag == S390_ALU_LSH) -+ return s390_emit_SLLG(buf, dst, dst, R0, DISP20(0)); -+ if (insn->variant.alu.tag == S390_ALU_RSH) -+ return s390_emit_SRLG(buf, dst, dst, R0, DISP20(0)); -+ if (insn->variant.alu.tag == S390_ALU_RSHA) -+ return s390_emit_SRAG(buf, dst, dst, R0, DISP20(0)); -+ } else { -+ if (insn->variant.alu.tag == S390_ALU_LSH) -+ return s390_emit_SLL(buf, dst, 0, R0, 0); -+ if (insn->variant.alu.tag == S390_ALU_RSH) -+ return s390_emit_SRL(buf, dst, 0, R0, 0); -+ if (insn->variant.alu.tag == S390_ALU_RSHA) -+ return s390_emit_SRA(buf, dst, 0, R0, 0); -+ } -+ } -+ -+ switch (insn->size) { -+ case 1: -+ /* Move the byte from memory into scratch register r0 */ -+ buf = s390_emit_load_mem(buf, 1, R0, src); -+ -+ switch (insn->variant.alu.tag) { -+ case S390_ALU_ADD: return s390_emit_AR(buf, dst, R0); -+ case S390_ALU_SUB: return s390_emit_SR(buf, dst, R0); -+ case S390_ALU_MUL: return s390_emit_MSR(buf, dst, R0); -+ case S390_ALU_AND: return s390_emit_NR(buf, dst, R0); -+ case S390_ALU_OR: return s390_emit_OR(buf, dst, R0); -+ case S390_ALU_XOR: return s390_emit_XR(buf, dst, R0); -+ case S390_ALU_LSH: -+ case S390_ALU_RSH: -+ case S390_ALU_RSHA: ; /* avoid GCC warning */ -+ } -+ goto fail; -+ -+ case 2: -+ switch (src->tag) { -+ case S390_AMODE_B12: -+ case S390_AMODE_BX12: -+ switch (insn->variant.alu.tag) { -+ case S390_ALU_ADD: -+ return s390_emit_AH(buf, dst, x, b, d); -+ -+ case S390_ALU_SUB: -+ return s390_emit_SH(buf, dst, x, b, d); -+ -+ case S390_ALU_MUL: -+ return s390_emit_MH(buf, dst, x, b, d); -+ -+ /* For bitwise operations: Move two bytes from memory into scratch -+ register r0; then perform operation */ -+ case S390_ALU_AND: -+ buf = s390_emit_LH(buf, R0, x, b, d); -+ return s390_emit_NR(buf, dst, R0); -+ -+ case S390_ALU_OR: -+ buf = s390_emit_LH(buf, R0, x, b, d); -+ return s390_emit_OR(buf, dst, R0); -+ -+ case S390_ALU_XOR: -+ buf = s390_emit_LH(buf, R0, x, b, d); -+ return s390_emit_XR(buf, dst, R0); -+ -+ case S390_ALU_LSH: -+ case S390_ALU_RSH: -+ case S390_ALU_RSHA: ; /* avoid GCC warning */ -+ } -+ goto fail; -+ -+ case S390_AMODE_B20: -+ case S390_AMODE_BX20: -+ switch (insn->variant.alu.tag) { -+ case S390_ALU_ADD: -+ return s390_emit_AHY(buf, dst, x, b, DISP20(d)); -+ -+ case S390_ALU_SUB: -+ return s390_emit_SHY(buf, dst, x, b, DISP20(d)); -+ -+ case S390_ALU_MUL: -+ return s390_emit_MHY(buf, dst, x, b, DISP20(d)); -+ -+ /* For bitwise operations: Move two bytes from memory into scratch -+ register r0; then perform operation */ -+ case S390_ALU_AND: -+ buf = s390_emit_LHY(buf, R0, x, b, DISP20(d)); -+ return s390_emit_NR(buf, dst, R0); -+ -+ case S390_ALU_OR: -+ buf = s390_emit_LHY(buf, R0, x, b, DISP20(d)); -+ return s390_emit_OR(buf, dst, R0); -+ -+ case S390_ALU_XOR: -+ buf = s390_emit_LHY(buf, R0, x, b, DISP20(d)); -+ return s390_emit_XR(buf, dst, R0); -+ -+ case S390_ALU_LSH: -+ case S390_ALU_RSH: -+ case S390_ALU_RSHA: ; /* avoid GCC warning */ -+ } -+ goto fail; -+ } -+ goto fail; -+ -+ case 4: -+ switch (src->tag) { -+ case S390_AMODE_B12: -+ case S390_AMODE_BX12: -+ switch (insn->variant.alu.tag) { -+ case S390_ALU_ADD: return s390_emit_A(buf, dst, x, b, d); -+ case S390_ALU_SUB: return s390_emit_S(buf, dst, x, b, d); -+ case S390_ALU_MUL: return s390_emit_MS(buf, dst, x, b, d); -+ case S390_ALU_AND: return s390_emit_N(buf, dst, x, b, d); -+ case S390_ALU_OR: return s390_emit_O(buf, dst, x, b, d); -+ case S390_ALU_XOR: return s390_emit_X(buf, dst, x, b, d); -+ case S390_ALU_LSH: -+ case S390_ALU_RSH: -+ case S390_ALU_RSHA: ; /* avoid GCC warning */ -+ } -+ goto fail; -+ -+ case S390_AMODE_B20: -+ case S390_AMODE_BX20: -+ switch (insn->variant.alu.tag) { -+ case S390_ALU_ADD: return s390_emit_AY(buf, dst, x, b, DISP20(d)); -+ case S390_ALU_SUB: return s390_emit_SY(buf, dst, x, b, DISP20(d)); -+ case S390_ALU_MUL: return s390_emit_MSY(buf, dst, x, b, DISP20(d)); -+ case S390_ALU_AND: return s390_emit_NY(buf, dst, x, b, DISP20(d)); -+ case S390_ALU_OR: return s390_emit_OY(buf, dst, x, b, DISP20(d)); -+ case S390_ALU_XOR: return s390_emit_XY(buf, dst, x, b, DISP20(d)); -+ case S390_ALU_LSH: -+ case S390_ALU_RSH: -+ case S390_ALU_RSHA: ; /* avoid GCC warning */ -+ } -+ goto fail; -+ } -+ goto fail; -+ -+ case 8: -+ switch (insn->variant.alu.tag) { -+ case S390_ALU_ADD: return s390_emit_AG(buf, dst, x, b, DISP20(d)); -+ case S390_ALU_SUB: return s390_emit_SG(buf, dst, x, b, DISP20(d)); -+ case S390_ALU_MUL: return s390_emit_MSG(buf, dst, x, b, DISP20(d)); -+ case S390_ALU_AND: return s390_emit_NG(buf, dst, x, b, DISP20(d)); -+ case S390_ALU_OR: return s390_emit_OG(buf, dst, x, b, DISP20(d)); -+ case S390_ALU_XOR: return s390_emit_XG(buf, dst, x, b, DISP20(d)); -+ case S390_ALU_LSH: -+ case S390_ALU_RSH: -+ case S390_ALU_RSHA: ; /* avoid GCC warning */ -+ } -+ goto fail; -+ } -+ goto fail; -+ } -+ -+ /* 2nd operand is an immediate value */ -+ if (op2.tag == S390_OPND_IMMEDIATE) { -+ ULong value; -+ -+ /* No masking of the value is required as it is not sign extended */ -+ value = op2.variant.imm; -+ -+ switch (insn->size) { -+ case 1: -+ case 2: -+ /* There is no 1-byte opcode. Do the computation in -+ 2 bytes. The extra byte will be ignored. */ -+ switch (insn->variant.alu.tag) { -+ case S390_ALU_ADD: -+ return s390_emit_AHI(buf, dst, value); -+ -+ case S390_ALU_SUB: -+ /* fixs390 later: as an optimization could perhaps use SLFI ? */ -+ buf = s390_emit_LHI(buf, R0, value); -+ return s390_emit_SR(buf, dst, R0); -+ -+ case S390_ALU_MUL: -+ return s390_emit_MHI(buf, dst, value); -+ -+ case S390_ALU_AND: return s390_emit_NILL(buf, dst, value); -+ case S390_ALU_OR: return s390_emit_OILL(buf, dst, value); -+ case S390_ALU_XOR: -+ /* There is no XILL instruction. Load the immediate value into -+ R0 and combine with the destination register. */ -+ buf = s390_emit_LHI(buf, R0, value); -+ return s390_emit_XR(buf, dst, R0); -+ -+ case S390_ALU_LSH: -+ return s390_emit_SLL(buf, dst, 0, 0, value); -+ -+ case S390_ALU_RSH: -+ return s390_emit_SRL(buf, dst, 0, 0, value); -+ -+ case S390_ALU_RSHA: -+ return s390_emit_SRA(buf, dst, 0, 0, value); -+ } -+ goto fail; -+ -+ case 4: -+ switch (insn->variant.alu.tag) { -+ case S390_ALU_ADD: -+ if (uint_fits_signed_16bit(value)) { -+ return s390_emit_AHI(buf, dst, value); -+ } -+ return s390_emit_AFIw(buf, dst, value); -+ -+ case S390_ALU_SUB: return s390_emit_SLFIw(buf, dst, value); -+ case S390_ALU_MUL: return s390_emit_MSFIw(buf, dst, value); -+ case S390_ALU_AND: return s390_emit_NILFw(buf, dst, value); -+ case S390_ALU_OR: return s390_emit_OILFw(buf, dst, value); -+ case S390_ALU_XOR: return s390_emit_XILFw(buf, dst, value); -+ case S390_ALU_LSH: return s390_emit_SLL(buf, dst, 0, 0, value); -+ case S390_ALU_RSH: return s390_emit_SRL(buf, dst, 0, 0, value); -+ case S390_ALU_RSHA: return s390_emit_SRA(buf, dst, 0, 0, value); -+ } -+ goto fail; -+ -+ case 8: -+ switch (insn->variant.alu.tag) { -+ case S390_ALU_ADD: -+ if (ulong_fits_signed_16bit(value)) { -+ return s390_emit_AGHI(buf, dst, value); -+ } -+ if (ulong_fits_signed_32bit(value) && s390_host_has_eimm) { -+ return s390_emit_AGFI(buf, dst, value); -+ } -+ /* Load constant into R0 then add */ -+ buf = s390_emit_load_64imm(buf, R0, value); -+ return s390_emit_AGR(buf, dst, R0); -+ -+ case S390_ALU_SUB: -+ /* fixs390 later: as an optimization could perhaps use SLFI ? */ -+ /* Load value into R0; then subtract from destination reg */ -+ buf = s390_emit_load_64imm(buf, R0, value); -+ return s390_emit_SGR(buf, dst, R0); -+ -+ case S390_ALU_MUL: -+ if (ulong_fits_signed_32bit(value) && s390_host_has_gie) { -+ return s390_emit_MSGFI(buf, dst, value); -+ } -+ /* Load constant into R0 then add */ -+ buf = s390_emit_load_64imm(buf, R0, value); -+ return s390_emit_MSGR(buf, dst, R0); -+ -+ /* Do it in two steps: upper half [0:31] and lower half [32:63] */ -+ case S390_ALU_AND: -+ if (s390_host_has_eimm) { -+ buf = s390_emit_NIHF(buf, dst, value >> 32); -+ return s390_emit_NILF(buf, dst, value & 0xFFFFFFFF); -+ } -+ /* Load value into R0; then combine with destination reg */ -+ buf = s390_emit_load_64imm(buf, R0, value); -+ return s390_emit_NGR(buf, dst, R0); -+ -+ case S390_ALU_OR: -+ if (s390_host_has_eimm) { -+ buf = s390_emit_OIHF(buf, dst, value >> 32); -+ return s390_emit_OILF(buf, dst, value & 0xFFFFFFFF); -+ } -+ /* Load value into R0; then combine with destination reg */ -+ buf = s390_emit_load_64imm(buf, R0, value); -+ return s390_emit_OGR(buf, dst, R0); -+ -+ case S390_ALU_XOR: -+ if (s390_host_has_eimm) { -+ buf = s390_emit_XIHF(buf, dst, value >> 32); -+ return s390_emit_XILF(buf, dst, value & 0xFFFFFFFF); -+ } -+ /* Load value into R0; then combine with destination reg */ -+ buf = s390_emit_load_64imm(buf, R0, value); -+ return s390_emit_XGR(buf, dst, R0); -+ -+ case S390_ALU_LSH: return s390_emit_SLLG(buf, dst, dst, 0, DISP20(value)); -+ case S390_ALU_RSH: return s390_emit_SRLG(buf, dst, dst, 0, DISP20(value)); -+ case S390_ALU_RSHA: return s390_emit_SRAG(buf, dst, dst, 0, DISP20(value)); -+ } -+ goto fail; -+ } -+ goto fail; -+ } -+ -+ fail: -+ vpanic("s390_insn_alu_emit"); -+} -+ -+ -+static UChar * -+s390_widen_emit(UChar *buf, const s390_insn *insn, UInt from_size, -+ Bool sign_extend) -+{ -+ s390_opnd_RMI opnd; -+ UInt dst; -+ -+ dst = hregNumber(insn->variant.unop.dst); -+ opnd = insn->variant.unop.src; -+ -+ switch (opnd.tag) { -+ case S390_OPND_REG: { -+ UChar r1 = hregNumber(insn->variant.unop.dst); -+ UChar r2 = hregNumber(opnd.variant.reg); -+ -+ switch (from_size) { -+ case 1: -+ /* Widening to a half-word is implemented like widening to a word -+ because the upper half-word will not be looked at. */ -+ if (insn->size == 4 || insn->size == 2) { /* 8 --> 32 8 --> 16 */ -+ if (sign_extend) -+ return s390_emit_LBRw(buf, r1, r2); -+ else -+ return s390_emit_LLCRw(buf, r1, r2); -+ } -+ if (insn->size == 8) { /* 8 --> 64 */ -+ if (sign_extend) -+ return s390_emit_LGBRw(buf, r1, r2); -+ else -+ return s390_emit_LLGCRw(buf, r1, r2); -+ } -+ goto fail; -+ -+ case 2: -+ if (insn->size == 4) { /* 16 --> 32 */ -+ if (sign_extend) -+ return s390_emit_LHRw(buf, r1, r2); -+ else -+ return s390_emit_LLHRw(buf, r1, r2); -+ } -+ if (insn->size == 8) { /* 16 --> 64 */ -+ if (sign_extend) -+ return s390_emit_LGHRw(buf, r1, r2); -+ else -+ return s390_emit_LLGHRw(buf, r1, r2); -+ } -+ goto fail; -+ -+ case 4: -+ if (insn->size == 8) { /* 32 --> 64 */ -+ if (sign_extend) -+ return s390_emit_LGFR(buf, r1, r2); -+ else -+ return s390_emit_LLGFR(buf, r1, r2); -+ } -+ goto fail; -+ -+ default: /* unexpected "from" size */ -+ goto fail; -+ } -+ } -+ -+ case S390_OPND_AMODE: { -+ UChar r1 = hregNumber(insn->variant.unop.dst); -+ const s390_amode *src = opnd.variant.am; -+ UChar b = hregNumber(src->b); -+ UChar x = hregNumber(src->x); -+ Int d = src->d; -+ -+ switch (from_size) { -+ case 1: -+ if (insn->size == 4 || insn->size == 2) { -+ if (sign_extend) -+ return s390_emit_LB(buf, r1, x, b, DISP20(d)); -+ else -+ return s390_emit_LLCw(buf, r1, x, b, DISP20(d)); -+ } -+ if (insn->size == 8) { -+ if (sign_extend) -+ return s390_emit_LGB(buf, r1, x, b, DISP20(d)); -+ else -+ /* No wrapper required. Opcode exists as RXE and RXY */ -+ return s390_emit_LLGC(buf, r1, x, b, DISP20(d)); -+ } -+ goto fail; -+ -+ case 2: -+ if (insn->size == 4) { /* 16 --> 32 */ -+ if (sign_extend == 0) -+ return s390_emit_LLHw(buf, r1, x, b, DISP20(d)); -+ -+ switch (src->tag) { -+ case S390_AMODE_B12: -+ case S390_AMODE_BX12: -+ return s390_emit_LH(buf, r1, x, b, d); -+ -+ case S390_AMODE_B20: -+ case S390_AMODE_BX20: -+ return s390_emit_LHY(buf, r1, x, b, DISP20(d)); -+ } -+ goto fail; -+ } -+ if (insn->size == 8) { /* 16 --> 64 */ -+ /* No wrappers required. Opcodes exist as RXE and RXY */ -+ if (sign_extend) -+ return s390_emit_LGH(buf, r1, x, b, DISP20(d)); -+ else -+ return s390_emit_LLGH(buf, r1, x, b, DISP20(d)); -+ } -+ goto fail; -+ -+ case 4: -+ if (insn->size == 8) { /* 32 --> 64 */ -+ /* No wrappers required. Opcodes exist as RXE and RXY */ -+ if (sign_extend) -+ return s390_emit_LGF(buf, r1, x, b, DISP20(d)); -+ else -+ return s390_emit_LLGF(buf, r1, x, b, DISP20(d)); -+ } -+ goto fail; -+ -+ default: /* unexpected "from" size */ -+ goto fail; -+ } -+ } -+ -+ case S390_OPND_IMMEDIATE: { -+ UChar r1 = hregNumber(insn->variant.unop.dst); -+ ULong value = opnd.variant.imm; -+ -+ switch (from_size) { -+ case 1: -+ if (insn->size == 4 || insn->size == 2) { /* 8 --> 32 8 --> 16 */ -+ if (sign_extend) { -+ /* host can do the sign extension to 16-bit; LHI does the rest */ -+ return s390_emit_LHI(buf, r1, (Short)(Char)(UChar)value); -+ } else { -+ return s390_emit_LHI(buf, r1, value); -+ } -+ } -+ if (insn->size == 8) { /* 8 --> 64 */ -+ if (sign_extend) { -+ /* host can do the sign extension to 16-bit; LGHI does the rest */ -+ return s390_emit_LGHI(buf, r1, (Short)(Char)(UChar)value); -+ } else { -+ return s390_emit_LGHI(buf, r1, value); -+ } -+ } -+ goto fail; -+ -+ case 2: -+ if (insn->size == 4) { /* 16 --> 32 */ -+ return s390_emit_LHI(buf, r1, value); -+ } -+ if (insn->size == 8) { /* 16 --> 64 */ -+ if (sign_extend) -+ return s390_emit_LGHI(buf, r1, value); -+ else -+ return s390_emit_LLILL(buf, r1, value); -+ } -+ goto fail; -+ -+ case 4: -+ if (insn->size == 8) { /* 32 --> 64 */ -+ if (sign_extend) -+ return s390_emit_LGFIw(buf, r1, value); -+ else -+ return s390_emit_LLILFw(buf, r1, value); -+ } -+ goto fail; -+ -+ default: /* unexpected "from" size */ -+ goto fail; -+ } -+ } -+ } -+ -+ fail: -+ vpanic("s390_widen_emit"); -+} -+ -+ -+static UChar * -+s390_negate_emit(UChar *buf, const s390_insn *insn) -+{ -+ s390_opnd_RMI opnd; -+ -+ opnd = insn->variant.unop.src; -+ -+ switch (opnd.tag) { -+ case S390_OPND_REG: { -+ UChar r1 = hregNumber(insn->variant.unop.dst); -+ UChar r2 = hregNumber(opnd.variant.reg); -+ -+ switch (insn->size) { -+ case 1: -+ case 2: -+ case 4: -+ return s390_emit_LCR(buf, r1, r2); -+ -+ case 8: -+ return s390_emit_LCGR(buf, r1, r2); -+ -+ default: -+ goto fail; -+ } -+ } -+ -+ case S390_OPND_AMODE: { -+ UChar r1 = hregNumber(insn->variant.unop.dst); -+ -+ /* Load bytes into scratch register R0, then negate */ -+ buf = s390_emit_load_mem(buf, insn->size, R0, opnd.variant.am); -+ -+ switch (insn->size) { -+ case 1: -+ case 2: -+ case 4: -+ return s390_emit_LCR(buf, r1, R0); -+ -+ case 8: -+ return s390_emit_LCGR(buf, r1, R0); -+ -+ default: -+ goto fail; -+ } -+ } -+ -+ case S390_OPND_IMMEDIATE: { -+ UChar r1 = hregNumber(insn->variant.unop.dst); -+ ULong value = opnd.variant.imm; -+ -+ value = ~value + 1; /* two's complement */ -+ -+ switch (insn->size) { -+ case 1: -+ case 2: -+ /* Load the immediate values as a 4 byte value. That does not hurt as -+ those extra bytes will not be looked at. Fall through .... */ -+ case 4: -+ return s390_emit_load_32imm(buf, r1, value); -+ -+ case 8: -+ return s390_emit_load_64imm(buf, r1, value); -+ -+ default: -+ goto fail; -+ } -+ } -+ } -+ -+ fail: -+ vpanic("s390_negate_emit"); -+} -+ -+ -+static UChar * -+s390_insn_unop_emit(UChar *buf, const s390_insn *insn) -+{ -+ switch (insn->variant.unop.tag) { -+ case S390_ZERO_EXTEND_8: return s390_widen_emit(buf, insn, 1, 0); -+ case S390_ZERO_EXTEND_16: return s390_widen_emit(buf, insn, 2, 0); -+ case S390_ZERO_EXTEND_32: return s390_widen_emit(buf, insn, 4, 0); -+ -+ case S390_SIGN_EXTEND_8: return s390_widen_emit(buf, insn, 1, 1); -+ case S390_SIGN_EXTEND_16: return s390_widen_emit(buf, insn, 2, 1); -+ case S390_SIGN_EXTEND_32: return s390_widen_emit(buf, insn, 4, 1); -+ -+ case S390_NEGATE: return s390_negate_emit(buf, insn); -+ } -+ -+ vpanic("s390_insn_unop_emit"); -+} -+ -+ -+/* Only 4-byte and 8-byte operands are handled. 1-byte and 2-byte -+ comparisons will have been converted to 4-byte comparisons in -+ s390_isel_cc and should not occur here. */ -+static UChar * -+s390_insn_test_emit(UChar *buf, const s390_insn *insn) -+{ -+ s390_opnd_RMI opnd; -+ -+ opnd = insn->variant.test.src; -+ -+ switch (opnd.tag) { -+ case S390_OPND_REG: { -+ UInt reg = hregNumber(opnd.variant.reg); -+ -+ switch (insn->size) { -+ case 4: -+ return s390_emit_LTR(buf, reg, reg); -+ -+ case 8: -+ return s390_emit_LTGR(buf, reg, reg); -+ -+ default: -+ goto fail; -+ } -+ } -+ -+ case S390_OPND_AMODE: { -+ const s390_amode *am = opnd.variant.am; -+ UChar b = hregNumber(am->b); -+ UChar x = hregNumber(am->x); -+ Int d = am->d; -+ -+ switch (insn->size) { -+ case 4: -+ return s390_emit_LTw(buf, R0, x, b, DISP20(d)); -+ -+ case 8: -+ return s390_emit_LTGw(buf, R0, x, b, DISP20(d)); -+ -+ default: -+ goto fail; -+ } -+ } -+ -+ case S390_OPND_IMMEDIATE: { -+ ULong value = opnd.variant.imm; -+ -+ switch (insn->size) { -+ case 4: -+ buf = s390_emit_load_32imm(buf, R0, value); -+ return s390_emit_LTR(buf, R0, R0); -+ -+ case 8: -+ buf = s390_emit_load_64imm(buf, R0, value); -+ return s390_emit_LTGR(buf, R0, R0); -+ -+ default: -+ goto fail; -+ } -+ } -+ -+ default: -+ goto fail; -+ } -+ -+ fail: -+ vpanic("s390_insn_test_emit"); -+} -+ -+ -+static UChar * -+s390_insn_cc2bool_emit(UChar *buf, const s390_insn *insn) -+{ -+ UChar r1 = hregNumber(insn->variant.cc2bool.dst); -+ s390_cc_t cond = insn->variant.cc2bool.cond; -+ -+ /* Make the destination register be 1 or 0, depending on whether -+ the relevant condition holds. A 64-bit value is computed. */ -+ if (cond == S390_CC_ALWAYS) -+ return s390_emit_LGHI(buf, r1, 1); /* r1 = 1 */ -+ -+ buf = s390_emit_load_cc(buf, r1); /* r1 = cc */ -+ buf = s390_emit_LGHI(buf, R0, cond); /* r0 = mask */ -+ buf = s390_emit_SLLG(buf, r1, R0, r1, DISP20(0)); /* r1 = mask << cc */ -+ buf = s390_emit_SRLG(buf, r1, r1, 0, DISP20(3)); /* r1 = r1 >> 3 */ -+ buf = s390_emit_NILL(buf, r1, 1); /* r1 = r1 & 0x1 */ -+ -+ return buf; -+} -+ -+ -+/* Only 4-byte and 8-byte operands are handled. */ -+static UChar * -+s390_insn_cas_emit(UChar *buf, const s390_insn *insn) -+{ -+ UChar r1, r3, b, old; -+ Int d; -+ s390_amode *am; -+ -+ r1 = hregNumber(insn->variant.cas.op1); /* expected value */ -+ r3 = hregNumber(insn->variant.cas.op3); -+ old= hregNumber(insn->variant.cas.old_mem); -+ am = insn->variant.cas.op2; -+ b = hregNumber(am->b); -+ d = am->d; -+ -+ switch (insn->size) { -+ case 4: -+ /* r1 must no be overwritten. So copy it to R0 and let CS clobber it */ -+ buf = s390_emit_LR(buf, R0, r1); -+ if (am->tag == S390_AMODE_B12) -+ buf = s390_emit_CS(buf, R0, r3, b, d); -+ else -+ buf = s390_emit_CSY(buf, R0, r3, b, DISP20(d)); -+ /* Now copy R0 which has the old memory value to OLD */ -+ return s390_emit_LR(buf, old, R0); -+ -+ case 8: -+ /* r1 must no be overwritten. So copy it to R0 and let CS clobber it */ -+ buf = s390_emit_LGR(buf, R0, r1); -+ buf = s390_emit_CSG(buf, R0, r3, b, DISP20(d)); -+ /* Now copy R0 which has the old memory value to OLD */ -+ return s390_emit_LGR(buf, old, R0); -+ -+ default: -+ goto fail; -+ } -+ -+ fail: -+ vpanic("s390_insn_cas_emit"); -+} -+ -+ -+/* Only 4-byte and 8-byte comparisons are handled. 1-byte and 2-byte -+ comparisons will have been converted to 4-byte comparisons in -+ s390_isel_cc and should not occur here. */ -+static UChar * -+s390_insn_compare_emit(UChar *buf, const s390_insn *insn) -+{ -+ s390_opnd_RMI op2; -+ HReg op1; -+ Bool signed_comparison; -+ -+ op1 = insn->variant.compare.src1; -+ op2 = insn->variant.compare.src2; -+ signed_comparison = insn->variant.compare.signed_comparison; -+ -+ switch (op2.tag) { -+ case S390_OPND_REG: { -+ UInt r1 = hregNumber(op1); -+ UInt r2 = hregNumber(op2.variant.reg); -+ -+ switch (insn->size) { -+ case 4: -+ if (signed_comparison) -+ return s390_emit_CR(buf, r1, r2); -+ else -+ return s390_emit_CLR(buf, r1, r2); -+ -+ case 8: -+ if (signed_comparison) -+ return s390_emit_CGR(buf, r1, r2); -+ else -+ return s390_emit_CLGR(buf, r1, r2); -+ -+ default: -+ goto fail; -+ } -+ } -+ -+ case S390_OPND_AMODE: { -+ UChar r1 = hregNumber(op1); -+ const s390_amode *am = op2.variant.am; -+ UChar b = hregNumber(am->b); -+ UChar x = hregNumber(am->x); -+ Int d = am->d; -+ -+ switch (insn->size) { -+ case 4: -+ switch (am->tag) { -+ case S390_AMODE_B12: -+ case S390_AMODE_BX12: -+ if (signed_comparison) -+ return s390_emit_C(buf, r1, x, b, d); -+ else -+ return s390_emit_CL(buf, r1, x, b, d); -+ -+ case S390_AMODE_B20: -+ case S390_AMODE_BX20: -+ if (signed_comparison) -+ return s390_emit_CY(buf, r1, x, b, DISP20(d)); -+ else -+ return s390_emit_CLY(buf, r1, x, b, DISP20(d)); -+ } -+ goto fail; -+ -+ case 8: -+ if (signed_comparison) -+ return s390_emit_CG(buf, r1, x, b, DISP20(d)); -+ else -+ return s390_emit_CLG(buf, r1, x, b, DISP20(d)); -+ -+ default: -+ goto fail; -+ } -+ } -+ -+ case S390_OPND_IMMEDIATE: { -+ UChar r1 = hregNumber(op1); -+ ULong value = op2.variant.imm; -+ -+ switch (insn->size) { -+ case 4: -+ if (signed_comparison) -+ return s390_emit_CFIw(buf, r1, value); -+ else -+ return s390_emit_CLFIw(buf, r1, value); -+ -+ case 8: -+ buf = s390_emit_load_64imm(buf, R0, value); -+ if (signed_comparison) -+ return s390_emit_CGR(buf, r1, R0); -+ else -+ return s390_emit_CLGR(buf, r1, R0); -+ -+ default: -+ goto fail; -+ } -+ } -+ -+ default: -+ goto fail; -+ } -+ -+ fail: -+ vpanic("s390_insn_compare_emit"); -+} -+ -+ -+static UChar * -+s390_insn_mul_emit(UChar *buf, const s390_insn *insn) -+{ -+ s390_opnd_RMI op2; -+ UChar r1; -+ Bool signed_multiply; -+ -+ /* The register number identifying the register pair */ -+ r1 = hregNumber(insn->variant.mul.dst_hi); -+ -+ op2 = insn->variant.mul.op2; -+ signed_multiply = insn->variant.mul.signed_multiply; -+ -+ switch (op2.tag) { -+ case S390_OPND_REG: { -+ UInt r2 = hregNumber(op2.variant.reg); -+ -+ switch (insn->size) { -+ case 1: -+ case 2: -+ case 4: -+ if (signed_multiply) -+ return s390_emit_MR(buf, r1, r2); -+ else -+ return s390_emit_MLR(buf, r1, r2); -+ -+ case 8: -+ if (signed_multiply) -+ vpanic("s390_insn_mul_emit"); -+ else -+ return s390_emit_MLGR(buf, r1, r2); -+ -+ default: -+ goto fail; -+ } -+ } -+ -+ case S390_OPND_AMODE: { -+ const s390_amode *am = op2.variant.am; -+ UChar b = hregNumber(am->b); -+ UChar x = hregNumber(am->x); -+ Int d = am->d; -+ -+ switch (insn->size) { -+ case 1: -+ case 2: -+ /* Load bytes into scratch register R0, then multiply */ -+ buf = s390_emit_load_mem(buf, insn->size, R0, am); -+ if (signed_multiply) -+ return s390_emit_MR(buf, r1, R0); -+ else -+ return s390_emit_MLR(buf, r1, R0); -+ -+ case 4: -+ switch (am->tag) { -+ case S390_AMODE_B12: -+ case S390_AMODE_BX12: -+ if (signed_multiply) -+ return s390_emit_M(buf, r1, x, b, d); -+ else -+ return s390_emit_ML(buf, r1, x, b, DISP20(d)); -+ -+ case S390_AMODE_B20: -+ case S390_AMODE_BX20: -+ if (signed_multiply) -+ return s390_emit_MFYw(buf, r1, x, b, DISP20(d)); -+ else -+ vpanic("s390_insn_mul_emit"); -+ } -+ goto fail; -+ -+ case 8: -+ if (signed_multiply) -+ vpanic("s390_insn_mul_emit"); -+ else -+ return s390_emit_MLG(buf, r1, x, b, DISP20(d)); -+ -+ default: -+ goto fail; -+ } -+ } -+ -+ case S390_OPND_IMMEDIATE: { -+ ULong value = op2.variant.imm; -+ -+ switch (insn->size) { -+ case 1: -+ case 2: -+ case 4: -+ buf = s390_emit_load_32imm(buf, R0, value); -+ if (signed_multiply) -+ return s390_emit_MR(buf, r1, R0); -+ else -+ return s390_emit_MLR(buf, r1, R0); -+ -+ case 8: -+ buf = s390_emit_load_64imm(buf, R0, value); -+ if (signed_multiply) -+ vpanic("s390_insn_mul_emit"); -+ else -+ return s390_emit_MLGR(buf, r1, R0); -+ -+ default: -+ goto fail; -+ } -+ } -+ -+ default: -+ goto fail; -+ } -+ -+ fail: -+ vpanic("s390_insn_mul_emit"); -+} -+ -+ -+static UChar * -+s390_insn_div_emit(UChar *buf, const s390_insn *insn) -+{ -+ s390_opnd_RMI op2; -+ UChar r1; -+ Bool signed_divide; -+ -+ r1 = hregNumber(insn->variant.div.op1_hi); -+ op2 = insn->variant.div.op2; -+ signed_divide = insn->variant.div.signed_divide; -+ -+ switch (op2.tag) { -+ case S390_OPND_REG: { -+ UInt r2 = hregNumber(op2.variant.reg); -+ -+ switch (insn->size) { -+ case 4: -+ if (signed_divide) -+ return s390_emit_DR(buf, r1, r2); -+ else -+ return s390_emit_DLR(buf, r1, r2); -+ -+ case 8: -+ if (signed_divide) -+ vpanic("s390_insn_div_emit"); -+ else -+ return s390_emit_DLGR(buf, r1, r2); -+ -+ default: -+ goto fail; -+ } -+ } -+ -+ case S390_OPND_AMODE: { -+ const s390_amode *am = op2.variant.am; -+ UChar b = hregNumber(am->b); -+ UChar x = hregNumber(am->x); -+ Int d = am->d; -+ -+ switch (insn->size) { -+ case 4: -+ switch (am->tag) { -+ case S390_AMODE_B12: -+ case S390_AMODE_BX12: -+ if (signed_divide) -+ return s390_emit_D(buf, r1, x, b, d); -+ else -+ return s390_emit_DL(buf, r1, x, b, DISP20(d)); -+ -+ case S390_AMODE_B20: -+ case S390_AMODE_BX20: -+ buf = s390_emit_LY(buf, R0, x, b, DISP20(d)); -+ if (signed_divide) -+ return s390_emit_DR(buf, r1, R0); -+ else -+ return s390_emit_DLR(buf, r1, R0); -+ } -+ goto fail; -+ -+ case 8: -+ if (signed_divide) -+ vpanic("s390_insn_div_emit"); -+ else -+ return s390_emit_DLG(buf, r1, x, b, DISP20(d)); -+ -+ default: -+ goto fail; -+ } -+ } -+ -+ case S390_OPND_IMMEDIATE: { -+ ULong value = op2.variant.imm; -+ -+ switch (insn->size) { -+ case 4: -+ buf = s390_emit_load_32imm(buf, R0, value); -+ if (signed_divide) -+ return s390_emit_DR(buf, r1, R0); -+ else -+ return s390_emit_DLR(buf, r1, R0); -+ -+ case 8: -+ buf = s390_emit_load_64imm(buf, R0, value); -+ if (signed_divide) -+ vpanic("s390_insn_div_emit"); -+ else -+ return s390_emit_DLGR(buf, r1, R0); -+ -+ default: -+ goto fail; -+ } -+ } -+ -+ default: -+ goto fail; -+ } -+ -+ fail: -+ vpanic("s390_insn_div_emit"); -+} -+ -+ -+static UChar * -+s390_insn_divs_emit(UChar *buf, const s390_insn *insn) -+{ -+ s390_opnd_RMI op2; -+ UChar r1; -+ -+ r1 = hregNumber(insn->variant.divs.rem); -+ op2 = insn->variant.divs.op2; -+ -+ switch (op2.tag) { -+ case S390_OPND_REG: { -+ UInt r2 = hregNumber(op2.variant.reg); -+ -+ return s390_emit_DSGR(buf, r1, r2); -+ } -+ -+ case S390_OPND_AMODE: { -+ const s390_amode *am = op2.variant.am; -+ UChar b = hregNumber(am->b); -+ UChar x = hregNumber(am->x); -+ Int d = am->d; -+ -+ return s390_emit_DSG(buf, r1, x, b, DISP20(d)); -+ } -+ -+ case S390_OPND_IMMEDIATE: { -+ ULong value = op2.variant.imm; -+ -+ buf = s390_emit_load_64imm(buf, R0, value); -+ return s390_emit_DSGR(buf, r1, R0); -+ } -+ -+ default: -+ goto fail; -+ } -+ -+ fail: -+ vpanic("s390_insn_divs_emit"); -+} -+ -+ -+static UChar * -+s390_insn_flogr_emit(UChar *buf, const s390_insn *insn) -+{ -+ s390_opnd_RMI src; -+ UChar r1, r1p1; -+ -+ r1 = hregNumber(insn->variant.flogr.bitpos); -+ r1p1 = hregNumber(insn->variant.flogr.modval); -+ -+ vassert((r1 & 0x1) == 0); -+ vassert(r1p1 == r1 + 1); -+ -+ src = insn->variant.flogr.src; -+ -+ switch (src.tag) { -+ case S390_OPND_REG: { -+ UInt r2 = hregNumber(src.variant.reg); -+ -+ return s390_emit_FLOGR(buf, r1, r2); -+ } -+ -+ case S390_OPND_AMODE: { -+ const s390_amode *am = src.variant.am; -+ UChar b = hregNumber(am->b); -+ UChar x = hregNumber(am->x); -+ Int d = am->d; -+ -+ buf = s390_emit_LG(buf, R0, x, b, DISP20(d)); -+ return s390_emit_FLOGR(buf, r1, R0); -+ } -+ -+ case S390_OPND_IMMEDIATE: { -+ ULong value = src.variant.imm; -+ -+ buf = s390_emit_load_64imm(buf, R0, value); -+ return s390_emit_FLOGR(buf, r1, R0); -+ } -+ -+ default: -+ goto fail; -+ } -+ -+ fail: -+ vpanic("s390_insn_flogr_emit"); -+} -+ -+ -+static UChar * -+s390_insn_branch_emit(UChar *buf, const s390_insn *insn) -+{ -+ s390_opnd_RMI dst; -+ s390_cc_t cond; -+ IRJumpKind kind; -+ UInt trc; -+ UChar *p, *ptmp = 0; /* avoid compiler warnings */ -+ -+ kind = insn->variant.branch.kind; -+ cond = insn->variant.branch.cond; -+ dst = insn->variant.branch.dst; -+ -+ p = buf; -+ trc = 0; -+ -+ if (cond != S390_CC_ALWAYS) { -+ /* So we have something like this -+ if (cond) goto X; -+ Y: ... -+ We convert this into -+ if (! cond) goto Y; // BRC insn; 4 bytes -+ return_reg = X; -+ return to dispatcher -+ Y: -+ */ -+ ptmp = p; /* 4 bytes (a BRC insn) to be filled in here */ -+ p += 4; -+ } -+ -+ /* If a non-boring, set guest-state-pointer appropriately. */ -+ -+ switch (insn->variant.branch.kind) { -+ case Ijk_ClientReq: trc = VEX_TRC_JMP_CLIENTREQ; break; -+ case Ijk_Sys_syscall: trc = VEX_TRC_JMP_SYS_SYSCALL; break; -+ case Ijk_Yield: trc = VEX_TRC_JMP_YIELD; break; -+ case Ijk_EmWarn: trc = VEX_TRC_JMP_EMWARN; break; -+ case Ijk_EmFail: trc = VEX_TRC_JMP_EMFAIL; break; -+ case Ijk_MapFail: trc = VEX_TRC_JMP_MAPFAIL; break; -+ case Ijk_NoDecode: trc = VEX_TRC_JMP_NODECODE; break; -+ case Ijk_TInval: trc = VEX_TRC_JMP_TINVAL; break; -+ case Ijk_NoRedir: trc = VEX_TRC_JMP_NOREDIR; break; -+ case Ijk_SigTRAP: trc = VEX_TRC_JMP_SIGTRAP; break; -+ case Ijk_Ret: trc = 0; break; -+ case Ijk_Call: trc = 0; break; -+ case Ijk_Boring: trc = 0; break; -+ break; -+ -+ default: -+ vpanic("s390_insn_branch_emit: unknown jump kind"); -+ } -+ -+ /* Get the destination address into the return register */ -+ switch (dst.tag) { -+ case S390_OPND_REG: -+ p = s390_emit_LGR(p, S390_REGNO_RETURN_VALUE, hregNumber(dst.variant.reg)); -+ break; -+ -+ case S390_OPND_AMODE: { -+ const s390_amode *am = dst.variant.am; -+ UChar b = hregNumber(am->b); -+ UChar x = hregNumber(am->x); -+ Int d = am->d; -+ -+ p = s390_emit_LG(p, S390_REGNO_RETURN_VALUE, x, b, DISP20(d)); -+ break; -+ } -+ -+ case S390_OPND_IMMEDIATE: -+ p = s390_emit_load_64imm(p, S390_REGNO_RETURN_VALUE, dst.variant.imm); -+ break; -+ -+ default: -+ goto fail; -+ } -+ -+ if (trc != 0) { -+ /* Something special. Set guest-state pointer appropriately */ -+ p = s390_emit_LGHI(p, S390_REGNO_GUEST_STATE_POINTER, trc); -+ } else { -+ /* Nothing special needs to be done for calls and returns. */ -+ } -+ -+ p = s390_emit_BCR(p, S390_CC_ALWAYS, S390_REGNO_LINK_REGISTER); -+ -+ if (cond != S390_CC_ALWAYS) { -+ Int delta = p - ptmp; -+ -+ delta >>= 1; /* immediate constant is #half-words */ -+ vassert(delta > 0 && delta < (1 << 16)); -+ s390_emit_BRC(ptmp, s390_cc_invert(cond), delta); -+ } -+ -+ return p; -+ -+ fail: -+ vpanic("s390_insn_branch_emit"); -+} -+ -+ -+static UChar * -+s390_insn_helper_call_emit(UChar *buf, const s390_insn *insn) -+{ -+ s390_cc_t cond; -+ ULong target; -+ UChar *ptmp = buf; -+ -+ cond = insn->variant.helper_call.cond; -+ target = insn->variant.helper_call.target; -+ -+ if (cond != S390_CC_ALWAYS) { -+ /* So we have something like this -+ if (cond) call X; -+ Y: ... -+ We convert this into -+ if (! cond) goto Y; // BRC opcode; 4 bytes -+ call X; -+ Y: -+ */ -+ /* 4 bytes (a BRC insn) to be filled in here */ -+ buf += 4; -+ } -+ -+ /* Load the target address into a register, that -+ (a) is not used for passing parameters to the helper and -+ (b) can be clobbered by the callee -+ r1 looks like a good choice. -+ Also, need to arrange for the return address be put into the -+ link-register */ -+ buf = s390_emit_load_64imm(buf, 1, target); -+ -+ /* Stash away the client's FPC register because the helper might change it. */ -+ buf = s390_emit_STFPC(buf, S390_REGNO_STACK_POINTER, S390_OFFSET_SAVED_FPC_C); -+ -+ /* Before we can call the helper, we need to save the link register, -+ because the BASR will overwrite it. We cannot use a register for that. -+ (a) Volatile registers will be modified by the helper. -+ (b) For saved registers the client code assumes that they have not -+ changed after the function returns. So we cannot use it to store -+ the link register. -+ In the dispatcher, before calling the client code, we have arranged for -+ a location on the stack for this purpose. See dispatch-s390x-linux.S. */ -+ buf = s390_emit_STG(buf, S390_REGNO_LINK_REGISTER, 0, // save LR -+ S390_REGNO_STACK_POINTER, S390_OFFSET_SAVED_LR, 0); -+ buf = s390_emit_BASR(buf, S390_REGNO_LINK_REGISTER, 1); // call helper -+ buf = s390_emit_LG(buf, S390_REGNO_LINK_REGISTER, 0, // restore LR -+ S390_REGNO_STACK_POINTER, S390_OFFSET_SAVED_LR, 0); -+ buf = s390_emit_LFPC(buf, S390_REGNO_STACK_POINTER, // restore FPC -+ S390_OFFSET_SAVED_FPC_C); -+ -+ if (cond != S390_CC_ALWAYS) { -+ Int delta = buf - ptmp; -+ -+ delta >>= 1; /* immediate constant is #half-words */ -+ vassert(delta > 0 && delta < (1 << 16)); -+ s390_emit_BRC(ptmp, s390_cc_invert(cond), delta); -+ } -+ -+ return buf; -+} -+ -+ -+static UChar * -+s390_insn_cond_move_emit(UChar *buf, const s390_insn *insn) -+{ -+ HReg dst; -+ s390_opnd_RMI src; -+ s390_cc_t cond; -+ UChar *p, *ptmp = 0; /* avoid compiler warnings */ -+ -+ cond = insn->variant.cond_move.cond; -+ dst = insn->variant.cond_move.dst; -+ src = insn->variant.cond_move.src; -+ -+ p = buf; -+ -+ /* Branch (if cond fails) over move instrs */ -+ if (cond != S390_CC_ALWAYS) { -+ /* Don't know how many bytes to jump over yet. -+ Make space for a BRC instruction (4 bytes) and fill in later. */ -+ ptmp = p; /* to be filled in here */ -+ p += 4; -+ } -+ -+ // cond true: move src => dst -+ -+ switch (src.tag) { -+ case S390_OPND_REG: -+ p = s390_emit_LGR(p, hregNumber(dst), hregNumber(src.variant.reg)); -+ break; -+ -+ case S390_OPND_AMODE: -+ p = s390_emit_load_mem(p, insn->size, hregNumber(dst), src.variant.am); -+ break; -+ -+ case S390_OPND_IMMEDIATE: { -+ ULong value = src.variant.imm; -+ UInt r = hregNumber(dst); -+ -+ switch (insn->size) { -+ case 1: -+ case 2: -+ /* Load the immediate values as a 4 byte value. That does not hurt as -+ those extra bytes will not be looked at. Fall through .... */ -+ case 4: -+ p = s390_emit_load_32imm(p, r, value); -+ break; -+ -+ case 8: -+ p = s390_emit_load_64imm(p, r, value); -+ break; -+ } -+ break; -+ } -+ -+ default: -+ goto fail; -+ } -+ -+ if (cond != S390_CC_ALWAYS) { -+ Int delta = p - ptmp; -+ -+ delta >>= 1; /* immediate constant is #half-words */ -+ vassert(delta > 0 && delta < (1 << 16)); -+ s390_emit_BRC(ptmp, s390_cc_invert(cond), delta); -+ } -+ -+ return p; -+ -+ fail: -+ vpanic("s390_insn_cond_move_emit"); -+} -+ -+ -+/* Little helper function to the rounding mode in the real FPC -+ register */ -+static UChar * -+s390_set_fpc_rounding_mode(UChar *buf, s390_round_t rounding_mode) -+{ -+ UChar bits; -+ -+ /* Determine BFP rounding bits */ -+ switch (rounding_mode) { -+ case S390_ROUND_NEAREST_EVEN: bits = 0; break; -+ case S390_ROUND_ZERO: bits = 1; break; -+ case S390_ROUND_POSINF: bits = 2; break; -+ case S390_ROUND_NEGINF: bits = 3; break; -+ default: vpanic("invalid rounding mode\n"); -+ } -+ -+ /* Copy FPC from guest state to R0 and OR in the new rounding mode */ -+ buf = s390_emit_L(buf, R0, 0, S390_REGNO_GUEST_STATE_POINTER, -+ OFFSET_s390x_fpc); // r0 = guest_fpc -+ -+ buf = s390_emit_NILL(buf, R0, 0xFFFC); /* Clear out right-most 2 bits */ -+ buf = s390_emit_OILL(buf, R0, bits); /* OR in the new rounding mode */ -+ buf = s390_emit_SFPC(buf, R0, 0); /* Load FPC register from R0 */ -+ -+ return buf; -+} -+ -+ -+static UChar * -+s390_insn_bfp_triop_emit(UChar *buf, const s390_insn *insn) -+{ -+ UInt r1 = hregNumber(insn->variant.bfp_triop.dst); -+ UInt r2 = hregNumber(insn->variant.bfp_triop.op2); -+ UInt r3 = hregNumber(insn->variant.bfp_triop.op3); -+ s390_round_t rounding_mode = insn->variant.bfp_triop.rounding_mode; -+ -+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) { -+ buf = s390_set_fpc_rounding_mode(buf, rounding_mode); -+ } -+ -+ switch (insn->size) { -+ case 4: -+ switch (insn->variant.bfp_triop.tag) { -+ case S390_BFP_MADD: buf = s390_emit_MAEBR(buf, r1, r3, r2); break; -+ case S390_BFP_MSUB: buf = s390_emit_MSEBR(buf, r1, r3, r2); break; -+ default: goto fail; -+ } -+ break; -+ -+ case 8: -+ switch (insn->variant.bfp_triop.tag) { -+ case S390_BFP_MADD: buf = s390_emit_MADBR(buf, r1, r3, r2); break; -+ case S390_BFP_MSUB: buf = s390_emit_MSDBR(buf, r1, r3, r2); break; -+ default: goto fail; -+ } -+ break; -+ -+ default: goto fail; -+ } -+ -+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) { -+ /* Restore FPC register from guest state */ -+ buf = s390_emit_LFPC(buf, S390_REGNO_GUEST_STATE_POINTER, -+ OFFSET_s390x_fpc); // fpc = guest_fpc -+ } -+ return buf; -+ -+ fail: -+ vpanic("s390_insn_bfp_triop_emit"); -+} -+ -+ -+static UChar * -+s390_insn_bfp_binop_emit(UChar *buf, const s390_insn *insn) -+{ -+ UInt r1 = hregNumber(insn->variant.bfp_binop.dst); -+ UInt r2 = hregNumber(insn->variant.bfp_binop.op2); -+ s390_round_t rounding_mode = insn->variant.bfp_binop.rounding_mode; -+ -+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) { -+ buf = s390_set_fpc_rounding_mode(buf, rounding_mode); -+ } -+ -+ switch (insn->size) { -+ case 4: -+ switch (insn->variant.bfp_binop.tag) { -+ case S390_BFP_ADD: buf = s390_emit_AEBR(buf, r1, r2); break; -+ case S390_BFP_SUB: buf = s390_emit_SEBR(buf, r1, r2); break; -+ case S390_BFP_MUL: buf = s390_emit_MEEBR(buf, r1, r2); break; -+ case S390_BFP_DIV: buf = s390_emit_DEBR(buf, r1, r2); break; -+ default: goto fail; -+ } -+ break; -+ -+ case 8: -+ switch (insn->variant.bfp_binop.tag) { -+ case S390_BFP_ADD: buf = s390_emit_ADBR(buf, r1, r2); break; -+ case S390_BFP_SUB: buf = s390_emit_SDBR(buf, r1, r2); break; -+ case S390_BFP_MUL: buf = s390_emit_MDBR(buf, r1, r2); break; -+ case S390_BFP_DIV: buf = s390_emit_DDBR(buf, r1, r2); break; -+ default: goto fail; -+ } -+ break; -+ -+ default: goto fail; -+ } -+ -+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) { -+ /* Restore FPC register from guest state */ -+ buf = s390_emit_LFPC(buf, S390_REGNO_GUEST_STATE_POINTER, -+ OFFSET_s390x_fpc); -+ } -+ return buf; -+ -+ fail: -+ vpanic("s390_insn_bfp_binop_emit"); -+} -+ -+ -+static UChar * -+s390_insn_bfp_unop_emit(UChar *buf, const s390_insn *insn) -+{ -+ UInt r1 = hregNumber(insn->variant.bfp_unop.dst); -+ UInt r2 = hregNumber(insn->variant.bfp_unop.op); -+ s390_round_t rounding_mode = insn->variant.bfp_unop.rounding_mode; -+ s390_round_t m3 = rounding_mode; -+ -+ /* The "convert to fixed" instructions have a field for the rounding -+ mode and no FPC modification is necessary. So we handle them -+ upfront. */ -+ switch (insn->variant.bfp_unop.tag) { -+ case S390_BFP_F32_TO_I32: return s390_emit_CFEBR(buf, m3, r1, r2); -+ case S390_BFP_F64_TO_I32: return s390_emit_CFDBR(buf, m3, r1, r2); -+ case S390_BFP_F32_TO_I64: return s390_emit_CGEBR(buf, m3, r1, r2); -+ case S390_BFP_F64_TO_I64: return s390_emit_CGDBR(buf, m3, r1, r2); -+ default: break; -+ } -+ -+ /* For all other insns if a special rounding mode is requested, -+ we need to set the FPC first and restore it later. */ -+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) { -+ buf = s390_set_fpc_rounding_mode(buf, rounding_mode); -+ } -+ -+ switch (insn->variant.bfp_unop.tag) { -+ case S390_BFP_ABS: -+ switch (insn->size) { -+ case 4: buf = s390_emit_LPEBR(buf, r1, r2); break; -+ case 8: buf = s390_emit_LPDBR(buf, r1, r2); break; -+ case 16: buf = s390_emit_LPXBR(buf, r1, r2); break; -+ default: goto fail; -+ } -+ break; -+ -+ case S390_BFP_NABS: -+ switch (insn->size) { -+ case 4: buf = s390_emit_LNEBR(buf, r1, r2); break; -+ case 8: buf = s390_emit_LNDBR(buf, r1, r2); break; -+ case 16: buf = s390_emit_LNXBR(buf, r1, r2); break; -+ default: goto fail; -+ } -+ break; -+ -+ case S390_BFP_NEG: -+ switch (insn->size) { -+ case 4: buf = s390_emit_LCEBR(buf, r1, r2); break; -+ case 8: buf = s390_emit_LCDBR(buf, r1, r2); break; -+ case 16: buf = s390_emit_LCXBR(buf, r1, r2); break; -+ default: goto fail; -+ } -+ break; -+ -+ case S390_BFP_SQRT: -+ switch (insn->size) { -+ case 4: buf = s390_emit_SQEBR(buf, r1, r2); break; -+ case 8: buf = s390_emit_SQDBR(buf, r1, r2); break; -+ case 16: buf = s390_emit_SQXBR(buf, r1, r2); break; -+ default: goto fail; -+ } -+ break; -+ -+ case S390_BFP_I32_TO_F32: buf = s390_emit_CEFBR(buf, r1, r2); break; -+ case S390_BFP_I32_TO_F64: buf = s390_emit_CDFBR(buf, r1, r2); break; -+ case S390_BFP_I32_TO_F128: buf = s390_emit_CXFBR(buf, r1, r2); break; -+ case S390_BFP_I64_TO_F32: buf = s390_emit_CEGBR(buf, r1, r2); break; -+ case S390_BFP_I64_TO_F64: buf = s390_emit_CDGBR(buf, r1, r2); break; -+ case S390_BFP_I64_TO_F128: buf = s390_emit_CXGBR(buf, r1, r2); break; -+ -+ case S390_BFP_F32_TO_F64: buf = s390_emit_LDEBR(buf, r1, r2); break; -+ case S390_BFP_F32_TO_F128: buf = s390_emit_LXEBR(buf, r1, r2); break; -+ case S390_BFP_F64_TO_F32: buf = s390_emit_LEDBR(buf, r1, r2); break; -+ case S390_BFP_F64_TO_F128: buf = s390_emit_LXDBR(buf, r1, r2); break; -+ -+ default: goto fail; -+ } -+ -+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) { -+ /* Restore FPC register from guest state */ -+ buf = s390_emit_LFPC(buf, S390_REGNO_GUEST_STATE_POINTER, -+ OFFSET_s390x_fpc); // fpc = guest_fpc -+ } -+ return buf; -+ -+ fail: -+ vpanic("s390_insn_bfp_unop_emit"); -+} -+ -+ -+static UChar * -+s390_insn_bfp_compare_emit(UChar *buf, const s390_insn *insn) -+{ -+ UInt dst = hregNumber(insn->variant.bfp_compare.dst); -+ UInt r1 = hregNumber(insn->variant.bfp_compare.op1); -+ UInt r2 = hregNumber(insn->variant.bfp_compare.op2); -+ -+ switch (insn->size) { -+ case 4: -+ buf = s390_emit_CEBR(buf, r1, r2); -+ break; -+ -+ case 8: -+ buf = s390_emit_CDBR(buf, r1, r2); -+ break; -+ -+ default: goto fail; -+ } -+ -+ return s390_emit_load_cc(buf, dst); /* Load condition code into DST */ -+ -+ fail: -+ vpanic("s390_insn_bfp_compare_emit"); -+} -+ -+ -+static UChar * -+s390_insn_bfp128_binop_emit(UChar *buf, const s390_insn *insn) -+{ -+ UInt r1_hi = hregNumber(insn->variant.bfp128_binop.dst_hi); -+ UInt r1_lo = hregNumber(insn->variant.bfp128_binop.dst_lo); -+ UInt r2_hi = hregNumber(insn->variant.bfp128_binop.op2_hi); -+ UInt r2_lo = hregNumber(insn->variant.bfp128_binop.op2_lo); -+ s390_round_t rounding_mode = insn->variant.bfp_binop.rounding_mode; -+ -+ /* Paranoia */ -+ vassert(insn->size == 16); -+ vassert(r1_lo == r1_hi + 2); -+ vassert(r2_lo == r2_hi + 2); -+ vassert((r1_hi & 0x2) == 0); -+ vassert((r2_hi & 0x2) == 0); -+ -+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) { -+ buf = s390_set_fpc_rounding_mode(buf, rounding_mode); -+ } -+ -+ switch (insn->variant.bfp128_binop.tag) { -+ case S390_BFP_ADD: buf = s390_emit_AXBR(buf, r1_hi, r2_hi); break; -+ case S390_BFP_SUB: buf = s390_emit_SXBR(buf, r1_hi, r2_hi); break; -+ case S390_BFP_MUL: buf = s390_emit_MXBR(buf, r1_hi, r2_hi); break; -+ case S390_BFP_DIV: buf = s390_emit_DXBR(buf, r1_hi, r2_hi); break; -+ default: goto fail; -+ } -+ -+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) { -+ /* Restore FPC register from guest state */ -+ buf = s390_emit_LFPC(buf, S390_REGNO_GUEST_STATE_POINTER, -+ OFFSET_s390x_fpc); // fpc = guest_fpc -+ } -+ return buf; -+ -+ fail: -+ vpanic("s390_insn_bfp128_binop_emit"); -+} -+ -+ -+static UChar * -+s390_insn_bfp128_compare_emit(UChar *buf, const s390_insn *insn) -+{ -+ UInt dst = hregNumber(insn->variant.bfp128_compare.dst); -+ UInt r1_hi = hregNumber(insn->variant.bfp128_compare.op1_hi); -+ UInt r1_lo = hregNumber(insn->variant.bfp128_compare.op1_lo); -+ UInt r2_hi = hregNumber(insn->variant.bfp128_compare.op2_hi); -+ UInt r2_lo = hregNumber(insn->variant.bfp128_compare.op2_lo); -+ -+ /* Paranoia */ -+ vassert(insn->size == 16); -+ vassert(r1_lo == r1_hi + 2); -+ vassert(r2_lo == r2_hi + 2); -+ vassert((r1_hi & 0x2) == 0); -+ vassert((r2_hi & 0x2) == 0); -+ -+ buf = s390_emit_CXBR(buf, r1_hi, r2_hi); -+ -+ /* Load condition code into DST */ -+ return s390_emit_load_cc(buf, dst); -+} -+ -+ -+static UChar * -+s390_insn_bfp128_unop_emit(UChar *buf, const s390_insn *insn) -+{ -+ UInt r1_hi = hregNumber(insn->variant.bfp128_unop.dst_hi); -+ UInt r1_lo = hregNumber(insn->variant.bfp128_unop.dst_lo); -+ UInt r2_hi = hregNumber(insn->variant.bfp128_unop.op_hi); -+ UInt r2_lo = hregNumber(insn->variant.bfp128_unop.op_lo); -+ s390_round_t rounding_mode = insn->variant.bfp_binop.rounding_mode; -+ -+ /* Paranoia */ -+ vassert(insn->size == 16); -+ vassert(r1_lo == r1_hi + 2); -+ vassert(r2_lo == r2_hi + 2); -+ vassert((r1_hi & 0x2) == 0); -+ vassert((r2_hi & 0x2) == 0); -+ -+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) { -+ buf = s390_set_fpc_rounding_mode(buf, rounding_mode); -+ } -+ -+ switch (insn->variant.bfp128_unop.tag) { -+ case S390_BFP_ABS: buf = s390_emit_LPXBR(buf, r1_hi, r2_hi); break; -+ case S390_BFP_NABS: buf = s390_emit_LNXBR(buf, r1_hi, r2_hi); break; -+ case S390_BFP_NEG: buf = s390_emit_LCXBR(buf, r1_hi, r2_hi); break; -+ case S390_BFP_SQRT: buf = s390_emit_SQXBR(buf, r1_hi, r2_hi); break; -+ case S390_BFP_F128_TO_F32: buf = s390_emit_LEXBR(buf, r1_hi, r2_hi); break; -+ case S390_BFP_F128_TO_F64: buf = s390_emit_LDXBR(buf, r1_hi, r2_hi); break; -+ default: goto fail; -+ } -+ -+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) { -+ /* Restore FPC register from guest state */ -+ buf = s390_emit_LFPC(buf, S390_REGNO_GUEST_STATE_POINTER, -+ OFFSET_s390x_fpc); // fpc = guest_fpc -+ } -+ return buf; -+ -+ fail: -+ vpanic("s390_insn_bfp128_unop_emit"); -+} -+ -+ -+/* Conversion to 128-bit BFP does not require a rounding mode */ -+static UChar * -+s390_insn_bfp128_convert_to_emit(UChar *buf, const s390_insn *insn) -+{ -+ UInt r1_hi = hregNumber(insn->variant.bfp128_unop.dst_hi); -+ UInt r1_lo = hregNumber(insn->variant.bfp128_unop.dst_lo); -+ UInt r2 = hregNumber(insn->variant.bfp128_unop.op_hi); -+ -+ /* Paranoia */ -+ vassert(insn->size == 16); -+ vassert(r1_lo == r1_hi + 2); -+ vassert((r1_hi & 0x2) == 0); -+ -+ switch (insn->variant.bfp128_unop.tag) { -+ case S390_BFP_I32_TO_F128: buf = s390_emit_CXFBR(buf, r1_hi, r2); break; -+ case S390_BFP_I64_TO_F128: buf = s390_emit_CXGBR(buf, r1_hi, r2); break; -+ case S390_BFP_F32_TO_F128: buf = s390_emit_LXEBR(buf, r1_hi, r2); break; -+ case S390_BFP_F64_TO_F128: buf = s390_emit_LXDBR(buf, r1_hi, r2); break; -+ default: goto fail; -+ } -+ -+ return buf; -+ -+ fail: -+ vpanic("s390_insn_bfp128_convert_to_emit"); -+} -+ -+ -+static UChar * -+s390_insn_bfp128_convert_from_emit(UChar *buf, const s390_insn *insn) -+{ -+ UInt r1 = hregNumber(insn->variant.bfp128_unop.dst_hi); -+ UInt r2_hi = hregNumber(insn->variant.bfp128_unop.op_hi); -+ UInt r2_lo = hregNumber(insn->variant.bfp128_unop.op_lo); -+ s390_round_t rounding_mode = insn->variant.bfp_binop.rounding_mode; -+ -+ /* Paranoia */ -+ vassert(insn->size != 16); -+ vassert(r2_lo == r2_hi + 2); -+ vassert((r2_hi & 0x2) == 0); -+ -+ /* The "convert to fixed" instructions have a field for the rounding -+ mode and no FPC modification is necessary. So we handle them -+ upfront. */ -+ switch (insn->variant.bfp_unop.tag) { -+ case S390_BFP_F128_TO_I32: return s390_emit_CFXBR(buf, rounding_mode, -+ r1, r2_hi); break; -+ case S390_BFP_F128_TO_I64: return s390_emit_CGXBR(buf, rounding_mode, -+ r1, r2_hi); break; -+ default: break; -+ } -+ -+ vpanic("s390_insn_bfp128_convert_from_emit"); -+} -+ -+ -+Int -+emit_S390Instr(UChar *buf, Int nbuf, struct s390_insn *insn, -+ Bool mode64, void *dispatch) -+{ -+ UChar *end; -+ -+ switch (insn->tag) { -+ case S390_INSN_LOAD: -+ end = s390_insn_load_emit(buf, insn); -+ break; -+ -+ case S390_INSN_STORE: -+ end = s390_insn_store_emit(buf, insn); -+ break; -+ -+ case S390_INSN_MOVE: -+ end = s390_insn_move_emit(buf, insn); -+ break; -+ -+ case S390_INSN_COND_MOVE: -+ end = s390_insn_cond_move_emit(buf, insn); -+ break; -+ -+ case S390_INSN_LOAD_IMMEDIATE: -+ end = s390_insn_load_immediate_emit(buf, insn); -+ break; -+ -+ case S390_INSN_ALU: -+ end = s390_insn_alu_emit(buf, insn); -+ break; -+ -+ case S390_INSN_MUL: -+ end = s390_insn_mul_emit(buf, insn); -+ break; -+ -+ case S390_INSN_DIV: -+ end = s390_insn_div_emit(buf, insn); -+ break; -+ -+ case S390_INSN_DIVS: -+ end = s390_insn_divs_emit(buf, insn); -+ break; -+ -+ case S390_INSN_FLOGR: -+ end = s390_insn_flogr_emit(buf, insn); -+ break; -+ -+ case S390_INSN_UNOP: -+ end = s390_insn_unop_emit(buf, insn); -+ break; -+ -+ case S390_INSN_TEST: -+ end = s390_insn_test_emit(buf, insn); -+ break; -+ -+ case S390_INSN_CC2BOOL: -+ end = s390_insn_cc2bool_emit(buf, insn); -+ break; -+ -+ case S390_INSN_CAS: -+ end = s390_insn_cas_emit(buf, insn); -+ break; -+ -+ case S390_INSN_COMPARE: -+ end = s390_insn_compare_emit(buf, insn); -+ break; -+ -+ case S390_INSN_BRANCH: -+ end = s390_insn_branch_emit(buf, insn); -+ break; -+ -+ case S390_INSN_HELPER_CALL: -+ end = s390_insn_helper_call_emit(buf, insn); -+ break; -+ -+ case S390_INSN_BFP_TRIOP: -+ end = s390_insn_bfp_triop_emit(buf, insn); -+ break; -+ -+ case S390_INSN_BFP_BINOP: -+ end = s390_insn_bfp_binop_emit(buf, insn); -+ break; -+ -+ case S390_INSN_BFP_UNOP: -+ end = s390_insn_bfp_unop_emit(buf, insn); -+ break; -+ -+ case S390_INSN_BFP_COMPARE: -+ end = s390_insn_bfp_compare_emit(buf, insn); -+ break; -+ -+ case S390_INSN_BFP128_BINOP: -+ end = s390_insn_bfp128_binop_emit(buf, insn); -+ break; -+ -+ case S390_INSN_BFP128_COMPARE: -+ end = s390_insn_bfp128_compare_emit(buf, insn); -+ break; -+ -+ case S390_INSN_BFP128_UNOP: -+ end = s390_insn_bfp128_unop_emit(buf, insn); -+ break; -+ -+ case S390_INSN_BFP128_CONVERT_TO: -+ end = s390_insn_bfp128_convert_to_emit(buf, insn); -+ break; -+ -+ case S390_INSN_BFP128_CONVERT_FROM: -+ end = s390_insn_bfp128_convert_from_emit(buf, insn); -+ break; -+ -+ default: -+ vpanic("s390_insn_emit"); -+ } -+ -+ vassert(end - buf <= nbuf); -+ -+ return end - buf; -+} -+ -+ -+/*---------------------------------------------------------------*/ -+/*--- end host_s390_defs.c ---*/ -+/*---------------------------------------------------------------*/ ---- VEX/priv/host_s390_defs.h -+++ VEX/priv/host_s390_defs.h -@@ -0,0 +1,497 @@ -+/* -*- mode: C; c-basic-offset: 3; -*- */ -+ -+/*---------------------------------------------------------------*/ -+/*--- begin host_s390_defs.h ---*/ -+/*---------------------------------------------------------------*/ -+ -+/* -+ This file is part of Valgrind, a dynamic binary instrumentation -+ framework. -+ -+ Copyright IBM Corp. 2010,2011 -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA -+ 02110-1301, USA. -+ -+ The GNU General Public License is contained in the file COPYING. -+*/ -+ -+/* Contributed by Florian Krohm */ -+ -+#ifndef __VEX_HOST_S390_DEFS_H -+#define __VEX_HOST_S390_DEFS_H -+ -+#include "libvex_basictypes.h" /* Bool */ -+#include "libvex.h" /* VexArchInfo */ -+#include "main_util.h" /* needed for host_generic_regs.h */ -+#include "host_generic_regs.h" /* HReg */ -+ -+/* --------- Registers --------- */ -+const HChar *s390_hreg_as_string(HReg); -+ -+void s390_hreg_get_allocable(Int *nregs, HReg **arr); -+ -+/* Dedicated registers */ -+HReg s390_hreg_guest_state_pointer(void); -+ -+ -+/* Given the index of a function argument, return the number of the -+ general purpose register in which it is being passed. Arguments are -+ counted 0, 1, 2, ... and they are being passed in r2, r3, r4, ... */ -+static __inline__ unsigned -+s390_gprno_from_arg_index(unsigned ix) -+{ -+ return ix + 2; -+} -+ -+/* --------- Memory address expressions (amodes). --------- */ -+ -+/* These are the address modes: -+ (1) b12: base register + 12-bit unsigned offset (e.g. RS) -+ (2) b20: base register + 20-bit signed offset (e.g. RSY) -+ (3) bx12: base register + index register + 12-bit unsigned offset (e.g. RX) -+ (4) bx20: base register + index register + 20-bit signed offset (e.g. RXY) -+ fixs390: There is also pc-relative stuff.. e.g. LARL -+*/ -+ -+typedef enum { -+ S390_AMODE_B12, -+ S390_AMODE_B20, -+ S390_AMODE_BX12, -+ S390_AMODE_BX20 -+} s390_amode_t; -+ -+typedef struct s390_amode { -+ s390_amode_t tag; -+ HReg b; -+ HReg x; /* hregNumber(x) == 0 for S390_AMODE_B12/B20 kinds */ -+ Int d; /* 12 bit unsigned or 20 bit signed */ -+} s390_amode; -+ -+ -+s390_amode *s390_amode_b12(Int d, HReg b); -+s390_amode *s390_amode_b20(Int d, HReg b); -+s390_amode *s390_amode_bx12(Int d, HReg b, HReg x); -+s390_amode *s390_amode_bx20(Int d, HReg b, HReg x); -+s390_amode *s390_amode_for_guest_state(Int d); -+Bool s390_amode_is_sane(const s390_amode *); -+void s390_amode_get_reg_usage(HRegUsage *, const s390_amode *); -+void s390_amode_map_regs(HRegRemap *, s390_amode *); -+ -+const HChar *s390_amode_as_string(const s390_amode *); -+ -+struct s390_insn; -+struct s390_amode; -+/* ------------- 2nd (right) operand of binary operation ---------------- */ -+ -+typedef enum { -+ S390_OPND_REG, -+ S390_OPND_IMMEDIATE, -+ S390_OPND_AMODE -+} s390_opnd_t; -+ -+ -+/* Naming convention for operand locations: -+ R - GPR -+ I - immediate value -+ M - memory (any Amode may be used) -+*/ -+ -+/* An operand that is either in a GPR or is addressable via a BX20 amode */ -+typedef struct { -+ s390_opnd_t tag; -+ union { -+ HReg reg; -+ s390_amode *am; -+ ULong imm; -+ } variant; -+} s390_opnd_RMI; -+ -+ -+/* The kind of instructions */ -+typedef enum { -+ S390_INSN_LOAD, /* load register from memory */ -+ S390_INSN_STORE, /* store register to memory */ -+ S390_INSN_MOVE, /* from register to register */ -+ S390_INSN_COND_MOVE, /* conditonal "move" to register */ -+ S390_INSN_LOAD_IMMEDIATE, -+ S390_INSN_ALU, -+ S390_INSN_MUL, /* n-bit operands; 2n-bit result */ -+ S390_INSN_DIV, /* 2n-bit dividend; n-bit divisor; n-bit quot/rem */ -+ S390_INSN_DIVS, /* n-bit dividend; n-bit divisor; n-bit quot/rem */ -+ S390_INSN_FLOGR, -+ S390_INSN_UNOP, -+ S390_INSN_TEST, /* test operand and set cc */ -+ S390_INSN_CC2BOOL,/* convert condition code to 0/1 */ -+ S390_INSN_COMPARE, -+ S390_INSN_BRANCH, /* un/conditional goto */ -+ S390_INSN_HELPER_CALL, -+ S390_INSN_CAS, /* compare and swap */ -+ S390_INSN_BFP_BINOP, /* Binary floating point 32-bit / 64-bit */ -+ S390_INSN_BFP_UNOP, -+ S390_INSN_BFP_TRIOP, -+ S390_INSN_BFP_COMPARE, -+ S390_INSN_BFP128_BINOP, /* Binary floating point 128-bit */ -+ S390_INSN_BFP128_UNOP, -+ S390_INSN_BFP128_COMPARE, -+ S390_INSN_BFP128_CONVERT_TO, -+ S390_INSN_BFP128_CONVERT_FROM -+} s390_insn_tag; -+ -+ -+/* The kind of ALU instructions */ -+typedef enum { -+ S390_ALU_ADD, -+ S390_ALU_SUB, -+ S390_ALU_MUL, /* n-bit operands; result is lower n-bit of product */ -+ S390_ALU_AND, -+ S390_ALU_OR, -+ S390_ALU_XOR, -+ S390_ALU_LSH, -+ S390_ALU_RSH, -+ S390_ALU_RSHA /* arithmetic */ -+} s390_alu_t; -+ -+ -+/* The kind of unary integer operations */ -+typedef enum { -+ S390_ZERO_EXTEND_8, -+ S390_ZERO_EXTEND_16, -+ S390_ZERO_EXTEND_32, -+ S390_SIGN_EXTEND_8, -+ S390_SIGN_EXTEND_16, -+ S390_SIGN_EXTEND_32, -+ S390_NEGATE -+} s390_unop_t; -+ -+/* The kind of ternary BFP operations */ -+typedef enum { -+ S390_BFP_MADD, -+ S390_BFP_MSUB, -+} s390_bfp_triop_t; -+ -+/* The kind of binary BFP operations */ -+typedef enum { -+ S390_BFP_ADD, -+ S390_BFP_SUB, -+ S390_BFP_MUL, -+ S390_BFP_DIV -+} s390_bfp_binop_t; -+ -+ -+/* The kind of unary BFP operations */ -+typedef enum { -+ S390_BFP_ABS, -+ S390_BFP_NABS, -+ S390_BFP_NEG, -+ S390_BFP_SQRT, -+ S390_BFP_I32_TO_F32, -+ S390_BFP_I32_TO_F64, -+ S390_BFP_I32_TO_F128, -+ S390_BFP_I64_TO_F32, -+ S390_BFP_I64_TO_F64, -+ S390_BFP_I64_TO_F128, -+ S390_BFP_F32_TO_I32, -+ S390_BFP_F32_TO_I64, -+ S390_BFP_F32_TO_F64, -+ S390_BFP_F32_TO_F128, -+ S390_BFP_F64_TO_I32, -+ S390_BFP_F64_TO_I64, -+ S390_BFP_F64_TO_F32, -+ S390_BFP_F64_TO_F128, -+ S390_BFP_F128_TO_I32, -+ S390_BFP_F128_TO_I64, -+ S390_BFP_F128_TO_F32, -+ S390_BFP_F128_TO_F64 -+} s390_bfp_unop_t; -+ -+ -+/* Condition code. The encoding of the enumerators matches the value of -+ the mask field in the various branch opcodes. */ -+typedef enum { -+ S390_CC_NEVER= 0, -+ S390_CC_OVFL = 1, /* overflow */ -+ S390_CC_H = 2, /* A > B ; high */ -+ S390_CC_NLE = 3, /* not low or equal */ -+ S390_CC_L = 4, /* A < B ; low */ -+ S390_CC_NHE = 5, /* not high or equal */ -+ S390_CC_LH = 6, /* low or high */ -+ S390_CC_NE = 7, /* A != B ; not zero */ -+ S390_CC_E = 8, /* A == B ; zero */ -+ S390_CC_NLH = 9, /* not low or high */ -+ S390_CC_HE = 10, /* A >= B ; high or equal*/ -+ S390_CC_NL = 11, /* not low */ -+ S390_CC_LE = 12, /* A <= B ; low or equal */ -+ S390_CC_NH = 13, /* not high */ -+ S390_CC_NO = 14, /* not overflow */ -+ S390_CC_ALWAYS = 15 -+} s390_cc_t; -+ -+ -+/* Rounding mode as it is encoded in the m3/m4 fields of certain -+ instructions (e.g. CFEBR) */ -+typedef enum { -+/* S390_ROUND_NEAREST_AWAY = 1, not supported */ -+ S390_ROUND_NEAREST_EVEN = 4, -+ S390_ROUND_ZERO = 5, -+ S390_ROUND_POSINF = 6, -+ S390_ROUND_NEGINF = 7 -+} s390_round_t; -+ -+ -+/* Invert the condition code */ -+static __inline__ s390_cc_t -+s390_cc_invert(s390_cc_t cond) -+{ -+ return S390_CC_ALWAYS - cond; -+} -+ -+ -+typedef struct s390_insn { -+ s390_insn_tag tag; -+ UChar size; /* size of the result in bytes */ -+ union { -+ struct { -+ HReg dst; -+ s390_amode *src; -+ } load; -+ struct { -+ s390_amode *dst; -+ HReg src; -+ } store; -+ struct { -+ HReg dst; -+ HReg src; -+ } move; -+ struct { -+ s390_cc_t cond; -+ HReg dst; -+ s390_opnd_RMI src; -+ } cond_move; -+ struct { -+ HReg dst; -+ ULong value; /* not sign extended */ -+ } load_immediate; -+ /* add, and, or, xor */ -+ struct { -+ s390_alu_t tag; -+ HReg dst; /* op1 */ -+ s390_opnd_RMI op2; -+ } alu; -+ struct { -+ Bool signed_multiply; -+ HReg dst_hi; /* r10 */ -+ HReg dst_lo; /* also op1 r11 */ -+ s390_opnd_RMI op2; -+ } mul; -+ struct { -+ Bool signed_divide; -+ HReg op1_hi; /* also remainder r10 */ -+ HReg op1_lo; /* also quotient r11 */ -+ s390_opnd_RMI op2; -+ } div; -+ struct { -+ HReg rem; /* remainder r10 */ -+ HReg op1; /* also quotient r11 */ -+ s390_opnd_RMI op2; -+ } divs; -+ struct { -+ HReg bitpos; /* position of leftmost '1' bit r10 */ -+ HReg modval; /* modified input value r11 */ -+ s390_opnd_RMI src; -+ } flogr; -+ struct { -+ s390_unop_t tag; -+ HReg dst; -+ s390_opnd_RMI src; -+ } unop; -+ struct { -+ Bool signed_comparison; -+ HReg src1; -+ s390_opnd_RMI src2; -+ } compare; -+ struct { -+ HReg dst; /* condition code in s390 encoding */ -+ HReg op1; -+ HReg op2; -+ } bfp_compare; -+ struct { -+ s390_opnd_RMI src; -+ } test; -+ /* Convert the condition code to a boolean value. */ -+ struct { -+ s390_cc_t cond; -+ HReg dst; -+ } cc2bool; -+ struct { -+ HReg op1; -+ s390_amode *op2; -+ HReg op3; -+ HReg old_mem; -+ } cas; -+ struct { -+ IRJumpKind kind; -+ s390_cc_t cond; -+ s390_opnd_RMI dst; -+ } branch; -+ /* Pseudo-insn for representing a helper call. -+ TARGET is the absolute address of the helper function -+ NUM_ARGS says how many arguments are being passed. -+ All arguments have integer type and are being passed according to ABI, -+ i.e. in registers r2, r3, r4, r5, and r6, with argument #0 being -+ passed in r2 and so forth. */ -+ struct { -+ s390_cc_t cond; -+ Addr64 target; -+ UInt num_args; -+ HChar *name; /* callee's name (for debugging) */ -+ } helper_call; -+ struct { -+ s390_bfp_triop_t tag; -+ s390_round_t rounding_mode; -+ HReg dst; /* first operand */ -+ HReg op2; /* second operand */ -+ HReg op3; /* third operand */ -+ } bfp_triop; -+ struct { -+ s390_bfp_binop_t tag; -+ s390_round_t rounding_mode; -+ HReg dst; /* left operand */ -+ HReg op2; /* right operand */ -+ } bfp_binop; -+ struct { -+ s390_bfp_unop_t tag; -+ s390_round_t rounding_mode; -+ HReg dst; /* result */ -+ HReg op; /* operand */ -+ } bfp_unop; -+ struct { -+ s390_bfp_binop_t tag; -+ s390_round_t rounding_mode; -+ HReg dst_hi; /* left operand; high part */ -+ HReg dst_lo; /* left operand; low part */ -+ HReg op2_hi; /* right operand; high part */ -+ HReg op2_lo; /* right operand; low part */ -+ } bfp128_binop; -+ /* This variant is also used by the BFP128_CONVERT_TO and -+ BFP128_CONVERT_FROM insns. */ -+ struct { -+ s390_bfp_unop_t tag; -+ s390_round_t rounding_mode; -+ HReg dst_hi; /* result; high part */ -+ HReg dst_lo; /* result; low part */ -+ HReg op_hi; /* operand; high part */ -+ HReg op_lo; /* operand; low part */ -+ } bfp128_unop; -+ struct { -+ HReg dst; /* condition code in s390 encoding */ -+ HReg op1_hi; /* left operand; high part */ -+ HReg op1_lo; /* left operand; low part */ -+ HReg op2_hi; /* right operand; high part */ -+ HReg op2_lo; /* right operand; low part */ -+ } bfp128_compare; -+ } variant; -+} s390_insn; -+ -+s390_insn *s390_insn_load(UChar size, HReg dst, s390_amode *src); -+s390_insn *s390_insn_store(UChar size, s390_amode *dst, HReg src); -+s390_insn *s390_insn_move(UChar size, HReg dst, HReg src); -+s390_insn *s390_insn_cond_move(UChar size, s390_cc_t cond, HReg dst, -+ s390_opnd_RMI src); -+s390_insn *s390_insn_load_immediate(UChar size, HReg dst, ULong val); -+s390_insn *s390_insn_alu(UChar size, s390_alu_t, HReg dst, -+ s390_opnd_RMI op2); -+s390_insn *s390_insn_mul(UChar size, HReg dst_hi, HReg dst_lo, -+ s390_opnd_RMI op2, Bool signed_multiply); -+s390_insn *s390_insn_div(UChar size, HReg op1_hi, HReg op1_lo, -+ s390_opnd_RMI op2, Bool signed_divide); -+s390_insn *s390_insn_divs(UChar size, HReg rem, HReg op1, s390_opnd_RMI op2); -+s390_insn *s390_insn_flogr(UChar size, HReg bitpos, HReg modval, -+ s390_opnd_RMI op); -+s390_insn *s390_insn_cas(UChar size, HReg op1, s390_amode *op2, HReg op3, -+ HReg old); -+s390_insn *s390_insn_unop(UChar size, s390_unop_t tag, HReg dst, -+ s390_opnd_RMI opnd); -+s390_insn *s390_insn_cc2bool(HReg dst, s390_cc_t src); -+s390_insn *s390_insn_test(UChar size, s390_opnd_RMI src); -+s390_insn *s390_insn_compare(UChar size, HReg dst, s390_opnd_RMI opnd, -+ Bool signed_comparison); -+s390_insn *s390_insn_branch(IRJumpKind jk, s390_cc_t cond, s390_opnd_RMI dst); -+s390_insn *s390_insn_helper_call(s390_cc_t cond, Addr64 target, UInt num_args, -+ HChar *name); -+s390_insn *s390_insn_bfp_triop(UChar size, s390_bfp_triop_t, HReg dst, HReg op2, -+ HReg op3, s390_round_t); -+s390_insn *s390_insn_bfp_binop(UChar size, s390_bfp_binop_t, HReg dst, HReg op2, -+ s390_round_t); -+s390_insn *s390_insn_bfp_unop(UChar size, s390_bfp_unop_t tag, HReg dst, -+ HReg op, s390_round_t); -+s390_insn *s390_insn_bfp_compare(UChar size, HReg dst, HReg op1, HReg op2); -+s390_insn *s390_insn_bfp128_binop(UChar size, s390_bfp_binop_t, HReg dst_hi, -+ HReg dst_lo, HReg op2_hi, HReg op2_lo, -+ s390_round_t); -+s390_insn *s390_insn_bfp128_unop(UChar size, s390_bfp_binop_t, HReg dst_hi, -+ HReg dst_lo, HReg op_hi, HReg op_lo, -+ s390_round_t); -+s390_insn *s390_insn_bfp128_compare(UChar size, HReg dst, HReg op1_hi, -+ HReg op1_lo, HReg op2_hi, HReg op2_lo); -+s390_insn *s390_insn_bfp128_convert_to(UChar size, s390_bfp_unop_t, -+ HReg dst_hi, HReg dst_lo, HReg op); -+s390_insn *s390_insn_bfp128_convert_from(UChar size, s390_bfp_unop_t, -+ HReg dst, HReg op_hi, HReg op_lo, -+ s390_round_t); -+void s390_insn_map_regs(HRegRemap *, s390_insn *); -+Bool s390_insn_is_reg_reg_move(const s390_insn *, HReg *, HReg *); -+void s390_insn_get_reg_usage(HRegUsage *u, const s390_insn *); -+UInt s390_insn_emit(UChar *buf, Int nbuf, const struct s390_insn *insn, -+ void *dispatch); -+ -+const HChar *s390_insn_as_string(const s390_insn *); -+ -+/*--------------------------------------------------------*/ -+/* --- Interface exposed to VEX --- */ -+/*--------------------------------------------------------*/ -+ -+void ppS390AMode(struct s390_amode *); -+void ppS390Instr(struct s390_insn *, Bool mode64); -+void ppHRegS390(HReg); -+ -+/* Some functions that insulate the register allocator from details -+ of the underlying instruction set. */ -+void getRegUsage_S390Instr( HRegUsage *, struct s390_insn *, Bool ); -+void mapRegs_S390Instr ( HRegRemap *, struct s390_insn *, Bool ); -+Bool isMove_S390Instr ( struct s390_insn *, HReg *, HReg * ); -+Int emit_S390Instr ( UChar *, Int, struct s390_insn *, Bool, void * ); -+void getAllocableRegs_S390( Int *, HReg **, Bool ); -+void genSpill_S390 ( HInstr **, HInstr **, HReg , Int , Bool ); -+void genReload_S390 ( HInstr **, HInstr **, HReg , Int , Bool ); -+struct s390_insn *directReload_S390 ( struct s390_insn *, HReg, Short ); -+HInstrArray *iselSB_S390 ( IRSB *, VexArch, VexArchInfo *, VexAbiInfo * ); -+ -+/* KLUDGE: See detailled comment in host_s390_defs.c. */ -+extern const VexArchInfo *s390_archinfo_host; -+ -+/* Convenience macros to test installed facilities */ -+#define s390_host_has_eimm \ -+ (s390_archinfo_host->hwcaps & (VEX_HWCAPS_S390X_EIMM)) -+#define s390_host_has_gie \ -+ (s390_archinfo_host->hwcaps & (VEX_HWCAPS_S390X_GIE)) -+#define s390_host_has_dfp \ -+ (s390_archinfo_host->hwcaps & (VEX_HWCAPS_S390X_DFP)) -+ -+#endif /* ndef __VEX_HOST_S390_DEFS_H */ -+ -+/*---------------------------------------------------------------*/ -+/*--- end host_s390_defs.h ---*/ -+/*---------------------------------------------------------------*/ ---- VEX/priv/host_s390_disasm.c -+++ VEX/priv/host_s390_disasm.c -@@ -0,0 +1,452 @@ -+/* -*- mode: C; c-basic-offset: 3; -*- */ -+ -+/*---------------------------------------------------------------*/ -+/*--- begin host_s390_disasm.c ---*/ -+/*---------------------------------------------------------------*/ -+ -+/* -+ This file is part of Valgrind, a dynamic binary instrumentation -+ framework. -+ -+ Copyright IBM Corp. 2010,2011 -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA -+ 02110-1301, USA. -+ -+ The GNU General Public License is contained in the file COPYING. -+*/ -+ -+/* Contributed by Florian Krohm */ -+ -+#include -+#include "libvex_basictypes.h" -+#include "main_util.h" // vassert -+#include "main_globals.h" // vex_traceflags -+#include "host_s390_disasm.h" -+ -+/* The format that is used to write out a mnemonic. -+ These should be declared as 'const HChar' but vex_printf needs -+ to be changed for that first */ -+static HChar s390_mnm_fmt[] = "%-8s"; -+ -+ -+/* Return the name of a general purpose register for dis-assembly purposes. */ -+static const HChar * -+gpr_operand(UInt archreg) -+{ -+ static const HChar names[16][5] = { -+ "%r0", "%r1", "%r2", "%r3", -+ "%r4", "%r5", "%r6", "%r7", -+ "%r8", "%r9", "%r10", "%r11", -+ "%r12", "%r13", "%r14", "%r15", -+ }; -+ -+ vassert(archreg < 16); -+ -+ return names[archreg]; -+} -+ -+ -+/* Return the name of a floating point register for dis-assembly purposes. */ -+static const HChar * -+fpr_operand(UInt archreg) -+{ -+ static const HChar names[16][5] = { -+ "%f0", "%f1", "%f2", "%f3", -+ "%f4", "%f5", "%f6", "%f7", -+ "%f8", "%f9", "%f10", "%f11", -+ "%f12", "%f13", "%f14", "%f15", -+ }; -+ -+ vassert(archreg < 16); -+ -+ return names[archreg]; -+} -+ -+ -+/* Return the name of an access register for dis-assembly purposes. */ -+static const HChar * -+ar_operand(UInt archreg) -+{ -+ static const HChar names[16][5] = { -+ "%a0", "%a1", "%a2", "%a3", -+ "%a4", "%a5", "%a6", "%a7", -+ "%a8", "%a9", "%a10", "%a11", -+ "%a12", "%a13", "%a14", "%a15", -+ }; -+ -+ vassert(archreg < 16); -+ -+ return names[archreg]; -+} -+ -+ -+/* Build and return the extended mnemonic for the compare and branch -+ opcodes as introduced by z10. See also the opcodes in file -+ opcodes/s390-opc.txt (from binutils) that have a '$' in their name. */ -+static const HChar * -+cab_operand(const HChar *base, UInt mask) -+{ -+ HChar *to; -+ const HChar *from; -+ -+ static HChar buf[10]; /* Maximum is 6 + 2 */ -+ -+ static HChar *suffix[] = { -+ "", "h", "l", "ne", "e", "nl", "nh", "" -+ }; -+ -+ /* strcpy(buf, from); */ -+ for (from = base, to = buf; *from; ++from, ++to) { -+ *to = *from; -+ } -+ /* strcat(buf, suffix); */ -+ for (from = suffix[mask >> 1]; *from; ++from, ++to) { -+ *to = *from; -+ } -+ *to = '\0'; -+ -+ return buf; -+} -+ -+ -+/* Return the special mnemonic for the BCR opcode */ -+static const HChar * -+bcr_operand(UInt m1) -+{ -+ static const HChar mnemonic[16][6] = { -+ /* 0 */ "nopr", /* no operation */ -+ /* 1 */ "bor", /* branch on overflow / if ones */ -+ /* 2 */ "bhr", /* branch on high */ -+ /* 3 */ "bnler", /* branch on not low or equal */ -+ /* 4 */ "blr", /* branch on low */ -+ /* 5 */ "bnher", /* branch on not high or equal */ -+ /* 6 */ "blhr", /* branch on low or high */ -+ /* 7 */ "bner", /* branch on not equal */ -+ /* 8 */ "ber", /* branch on equal */ -+ /* 9 */ "bnlhr", /* branch on not low or high */ -+ /* a */ "bher", /* branch on high or equal */ -+ /* b */ "bnlr", /* branch on not low */ -+ /* c */ "bler", /* brach on low or equal */ -+ /* d */ "bnhr", /* branch on not high */ -+ /* e */ "bnor", /* branch on not overflow / if not ones */ -+ /* f */ "br", /* unconditional branch */ -+ }; -+ -+ return mnemonic[m1]; -+} -+ -+ -+/* Return the special mnemonic for the BC opcode */ -+static const HChar * -+bc_operand(UInt m1) -+{ -+ static const HChar mnemonic[16][5] = { -+ /* 0 */ "nop", // no operation -+ /* 1 */ "bo", // branch on overflow / if ones -+ /* 2 */ "bh", // branch on high -+ /* 3 */ "bnle", // branch on not low or equal -+ /* 4 */ "bl", // branch on low -+ /* 5 */ "bnhe", // branch on not high or equal -+ /* 6 */ "blh", // branch on low or high -+ /* 7 */ "bne", // branch on not equal -+ /* 8 */ "be", // branch on equal -+ /* 9 */ "bnlh", // branch on not low or high -+ /* a */ "bhe", // branch on high or equal -+ /* b */ "bnl", // branch on not low -+ /* c */ "ble", // branch on low or equal -+ /* d */ "bnh", // branch on not high -+ /* e */ "bno", // branch on not overflow / if not ones -+ /* f */ "b" // unconditional branch -+ }; -+ -+ return mnemonic[m1]; -+} -+ -+ -+/* Return the special mnemonic for the BRC opcode */ -+static const HChar * -+brc_operand(UInt m1) -+{ -+ static const HChar mnemonic[16][5] = { -+ /* 0 */ "brc", /* no special mnemonic */ -+ /* 1 */ "jo", /* jump on overflow / if ones */ -+ /* 2 */ "jh", /* jump on A high */ -+ /* 3 */ "jnle", /* jump on not low or equal */ -+ /* 4 */ "jl", /* jump on A low */ -+ /* 5 */ "jnhe", /* jump on not high or equal */ -+ /* 6 */ "jlh", /* jump on low or high */ -+ /* 7 */ "jne", /* jump on A not equal B */ -+ /* 8 */ "je", /* jump on A equal B */ -+ /* 9 */ "jnlh", /* jump on not low or high */ -+ /* a */ "jhe", /* jump on high or equal */ -+ /* b */ "jnl", /* jump on A not low */ -+ /* c */ "jle", /* jump on low or equal */ -+ /* d */ "jnh", /* jump on A not high */ -+ /* e */ "jno", /* jump on not overflow / if not ones */ -+ /* f */ "j", /* jump */ -+ }; -+ -+ return mnemonic[m1]; -+} -+ -+ -+/* Return the special mnemonic for the BRCL opcode */ -+static const HChar * -+brcl_operand(UInt m1) -+{ -+ static const HChar mnemonic[16][6] = { -+ /* 0 */ "brcl", /* no special mnemonic */ -+ /* 1 */ "jgo", /* jump long on overflow / if ones */ -+ /* 2 */ "jgh", /* jump long on high */ -+ /* 3 */ "jgnle", /* jump long on not low or equal */ -+ /* 4 */ "jgl", /* jump long on low */ -+ /* 5 */ "jgnhe", /* jump long on not high or equal */ -+ /* 6 */ "jglh", /* jump long on low or high */ -+ /* 7 */ "jgne", /* jump long on not equal */ -+ /* 8 */ "jge", /* jump long on equal */ -+ /* 9 */ "jgnlh", /* jump long on not low or high */ -+ /* a */ "jghe", /* jump long on high or equal */ -+ /* b */ "jgnl", /* jump long on not low */ -+ /* c */ "jgle", /* jump long on low or equal */ -+ /* d */ "jgnh", /* jump long on not high */ -+ /* e */ "jgno", /* jump long on not overflow / if not ones */ -+ /* f */ "jg", /* jump long */ -+ }; -+ -+ return mnemonic[m1]; -+} -+ -+ -+/* An operand with a base register, an index register, and a displacement. -+ If the displacement is signed, the rightmost 20 bit of D need to be -+ sign extended */ -+static HChar * -+dxb_operand(HChar *p, UInt d, UInt x, UInt b, Bool displacement_is_signed) -+{ -+ if (displacement_is_signed) { -+ Int displ = ((Int)d << 12) >> 12; /* sign extend */ -+ -+ p += vex_sprintf(p, "%d", displ); -+ } else { -+ p += vex_sprintf(p, "%u", d); -+ } -+ if (x != 0) { -+ p += vex_sprintf(p, "(%s", gpr_operand(x)); -+ if (b != 0) { -+ p += vex_sprintf(p, ",%s", gpr_operand(b)); -+ } -+ p += vex_sprintf(p, ")"); -+ } else { -+ if (b != 0) { -+ p += vex_sprintf(p, "(%s)", gpr_operand(b)); -+ } -+ } -+ -+ return p; -+} -+ -+ -+/* An operand with base register, unsigned length, and a 12-bit -+ unsigned displacement */ -+static HChar * -+udlb_operand(HChar *p, UInt d, UInt length, UInt b) -+{ -+ p += vex_sprintf(p, "%u", d); -+ p += vex_sprintf(p, "(%u", length + 1); // actual length is +1 -+ if (b != 0) { -+ p += vex_sprintf(p, ",%s", gpr_operand(b)); -+ } -+ p += vex_sprintf(p, ")"); -+ -+ return p; -+} -+ -+ -+/* The first argument is the command that says how to write the disassembled -+ insn. It is understood that the mnemonic comes first and that arguments -+ are separated by a ','. The command holds the arguments. Each argument is -+ encoded using a 4-bit S390_ARG_xyz value. The first argument is placed -+ in the least significant bits of the command and so on. There are at most -+ 5 arguments in an insn and a sentinel (S390_ARG_DONE) is needed to identify -+ the end of the argument list. 6 * 4 = 24 bits are required for the -+ command. */ -+void -+s390_disasm(UInt command, ...) -+{ -+ va_list args; -+ unsigned argkind; -+ HChar buf[128]; /* holds the disassembled insn */ -+ HChar *p; -+ HChar separator; -+ -+ va_start(args, command); -+ -+ p = buf; -+ separator = 0; -+ -+ while (42) { -+ argkind = command & 0xF; -+ command >>= 4; -+ -+ if (argkind == S390_ARG_DONE) goto done; -+ -+ if (argkind == S390_ARG_CABM) separator = 0; /* optional */ -+ -+ /* Write out the separator */ -+ if (separator) *p++ = separator; -+ -+ /* argument */ -+ switch (argkind) { -+ case S390_ARG_MNM: -+ p += vex_sprintf(p, s390_mnm_fmt, va_arg(args, HChar *)); -+ separator = ' '; -+ continue; -+ -+ case S390_ARG_XMNM: { -+ UInt mask, kind; -+ const HChar *mnm; -+ -+ kind = va_arg(args, UInt); -+ -+ separator = ' '; -+ switch (kind) { -+ case S390_XMNM_BC: -+ case S390_XMNM_BCR: -+ mask = va_arg(args, UInt); -+ mnm = kind == S390_XMNM_BCR ? bcr_operand(mask) : bc_operand(mask); -+ p += vex_sprintf(p, s390_mnm_fmt, mnm); -+ /* mask == 0 is a NOP and has no argument */ -+ if (mask == 0) goto done; -+ break; -+ -+ case S390_XMNM_BRC: -+ case S390_XMNM_BRCL: -+ mask = va_arg(args, UInt); -+ mnm = kind == S390_XMNM_BRC ? brc_operand(mask) : brcl_operand(mask); -+ p += vex_sprintf(p, s390_mnm_fmt, mnm); -+ -+ /* mask == 0 has no special mnemonic */ -+ if (mask == 0) { -+ p += vex_sprintf(p, " 0"); -+ separator = ','; -+ } -+ break; -+ -+ case S390_XMNM_CAB: -+ mnm = va_arg(args, HChar *); -+ mask = va_arg(args, UInt); -+ p += vex_sprintf(p, s390_mnm_fmt, cab_operand(mnm, mask)); -+ break; -+ } -+ } -+ continue; -+ -+ case S390_ARG_GPR: -+ p += vex_sprintf(p, "%s", gpr_operand(va_arg(args, UInt))); -+ break; -+ -+ case S390_ARG_FPR: -+ p += vex_sprintf(p, "%s", fpr_operand(va_arg(args, UInt))); -+ break; -+ -+ case S390_ARG_AR: -+ p += vex_sprintf(p, "%s", ar_operand(va_arg(args, UInt))); -+ break; -+ -+ case S390_ARG_UINT: -+ p += vex_sprintf(p, "%u", va_arg(args, UInt)); -+ break; -+ -+ case S390_ARG_INT: -+ p += vex_sprintf(p, "%d", (Int)(va_arg(args, UInt))); -+ break; -+ -+ case S390_ARG_PCREL: { -+ Int offset = (Int)(va_arg(args, UInt)); -+ -+ /* Convert # halfwords to # bytes */ -+ offset <<= 1; -+ -+ if (offset < 0) { -+ p += vex_sprintf(p, ".%d", offset); -+ } else { -+ p += vex_sprintf(p, ".+%u", offset); -+ } -+ break; -+ } -+ -+ case S390_ARG_SDXB: { -+ UInt dh, dl, x, b; -+ -+ dh = va_arg(args, UInt); -+ dl = va_arg(args, UInt); -+ x = va_arg(args, UInt); -+ b = va_arg(args, UInt); -+ -+ p = dxb_operand(p, (dh << 12) | dl, x, b, 1 /* signed_displacement */); -+ break; -+ } -+ -+ case S390_ARG_UDXB: { -+ UInt d, x, b; -+ -+ d = va_arg(args, UInt); -+ x = va_arg(args, UInt); -+ b = va_arg(args, UInt); -+ -+ p = dxb_operand(p, d, x, b, 0 /* signed_displacement */); -+ break; -+ } -+ -+ case S390_ARG_UDLB: { -+ UInt d, l, b; -+ -+ d = va_arg(args, UInt); -+ l = va_arg(args, UInt); -+ b = va_arg(args, UInt); -+ -+ p = udlb_operand(p, d, l, b); -+ break; -+ } -+ -+ case S390_ARG_CABM: { -+ UInt mask; -+ -+ mask = va_arg(args, UInt) & 0xE; -+ if (mask == 0 || mask == 14) { -+ p += vex_sprintf(p, ",%u", mask); -+ } -+ break; -+ } -+ } -+ -+ separator = ','; -+ } -+ -+ done: -+ va_end(args); -+ -+ *p = '\0'; -+ -+ vassert(p < buf + sizeof buf); /* detect buffer overwrite */ -+ -+ /* Finally, write out the disassembled insn */ -+ vex_printf("%s\n", buf); -+} -+ -+/*---------------------------------------------------------------*/ -+/*--- end host_s390_disasm.c ---*/ -+/*---------------------------------------------------------------*/ ---- VEX/priv/host_s390_disasm.h -+++ VEX/priv/host_s390_disasm.h -@@ -0,0 +1,87 @@ -+/* -*- mode: C; c-basic-offset: 3; -*- */ -+ -+/*---------------------------------------------------------------*/ -+/*--- begin host_s390_disasm.h ---*/ -+/*---------------------------------------------------------------*/ -+ -+/* -+ This file is part of Valgrind, a dynamic binary instrumentation -+ framework. -+ -+ Copyright IBM Corp. 2010,2011 -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA -+ 02110-1301, USA. -+ -+ The GNU General Public License is contained in the file COPYING. -+*/ -+ -+#ifndef __VEX_HOST_S390_DISASM_H -+#define __VEX_HOST_S390_DISASM_H -+ -+#include "libvex_basictypes.h" -+ -+/* Macros to encode a command for s390_disasm. */ -+#undef P -+#define P(a) (S390_ARG_##a) -+#undef ENC1 -+#define ENC1(a) ((P(DONE) << 4) | P(a)) -+#undef ENC2 -+#define ENC2(a,b) ((P(DONE) << 8) | (P(b) << 4) | P(a)) -+#undef ENC3 -+#define ENC3(a,b,c) ((P(DONE) << 12) | (P(c) << 8) | (P(b) << 4) | P(a)) -+#undef ENC4 -+#define ENC4(a,b,c,d) ((P(DONE) << 16) | (P(d) << 12) | (P(c) << 8) | \ -+ (P(b) << 4) | P(a)) -+#undef ENC5 -+#define ENC5(a,b,c,d,e) ((P(DONE) << 20) | (P(e) << 16) | (P(d) << 12) | \ -+ (P(c) << 8) | (P(b) << 4) | P(a)) -+#undef ENC6 -+#define ENC6(a,b,c,d,e,f) ((P(DONE) << 24) | (P(f) << 20) | (P(e) << 16) | \ -+ (P(d) << 12) | (P(c) << 8) | (P(b) << 4) | P(a)) -+ -+/* The different kinds of operands in an asm insn */ -+enum { -+ S390_ARG_DONE = 0, -+ S390_ARG_GPR = 1, -+ S390_ARG_FPR = 2, -+ S390_ARG_AR = 3, -+ S390_ARG_INT = 4, -+ S390_ARG_UINT = 5, -+ S390_ARG_PCREL = 6, -+ S390_ARG_SDXB = 7, -+ S390_ARG_UDXB = 8, -+ S390_ARG_UDLB = 9, -+ S390_ARG_CABM = 10, -+ S390_ARG_MNM = 11, -+ S390_ARG_XMNM = 12 -+}; -+ -+/* The different kinds of extended mnemonics */ -+enum { -+ S390_XMNM_CAB = 0, -+ S390_XMNM_BCR = 1, -+ S390_XMNM_BC = 2, -+ S390_XMNM_BRC = 3, -+ S390_XMNM_BRCL = 4 -+}; -+ -+void s390_disasm(UInt command, ...); -+ -+/*---------------------------------------------------------------*/ -+/*--- end host_s390_disasm.h ---*/ -+/*---------------------------------------------------------------*/ -+ -+#endif /* __VEX_HOST_S390_DISASM_H */ ---- VEX/priv/host_s390_isel.c -+++ VEX/priv/host_s390_isel.c -@@ -0,0 +1,2441 @@ -+/* -*- mode: C; c-basic-offset: 3; -*- */ -+ -+/*---------------------------------------------------------------*/ -+/*--- begin host_s390_isel.c ---*/ -+/*---------------------------------------------------------------*/ -+ -+/* -+ This file is part of Valgrind, a dynamic binary instrumentation -+ framework. -+ -+ Copyright IBM Corp. 2010,2011 -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA -+ 02110-1301, USA. -+ -+ The GNU General Public License is contained in the file COPYING. -+*/ -+ -+/* Contributed by Florian Krohm */ -+ -+#include "libvex_basictypes.h" -+#include "libvex_ir.h" -+#include "libvex.h" -+#include "libvex_s390x.h" -+ -+#include "ir_match.h" -+#include "main_util.h" -+#include "main_globals.h" -+#include "host_generic_regs.h" -+#include "host_s390_defs.h" -+ -+/*---------------------------------------------------------*/ -+/*--- ISelEnv ---*/ -+/*---------------------------------------------------------*/ -+ -+/* This carries around: -+ -+ - A mapping from IRTemp to IRType, giving the type of any IRTemp we -+ might encounter. This is computed before insn selection starts, -+ and does not change. -+ -+ - A mapping from IRTemp to HReg. This tells the insn selector -+ which virtual register(s) are associated with each IRTemp -+ temporary. This is computed before insn selection starts, and -+ does not change. We expect this mapping to map precisely the -+ same set of IRTemps as the type mapping does. -+ -+ - vregmap holds the primary register for the IRTemp. -+ - vregmapHI holds the secondary register for the IRTemp, -+ if any is needed. That's only for Ity_I64 temps -+ in 32 bit mode or Ity_I128 temps in 64-bit mode. -+ -+ - The code array, that is, the insns selected so far. -+ -+ - A counter, for generating new virtual registers. -+ -+ - The host subarchitecture we are selecting insns for. -+ This is set at the start and does not change. -+*/ -+ -+typedef struct { -+ IRTypeEnv *type_env; -+ -+ HReg *vregmap; -+ HReg *vregmapHI; -+ UInt n_vregmap; -+ -+ HInstrArray *code; -+ -+ UInt vreg_ctr; -+ -+ UInt hwcaps; -+ -+} ISelEnv; -+ -+ -+/* Forward declarations */ -+static HReg s390_isel_int_expr(ISelEnv *, IRExpr *); -+static s390_amode *s390_isel_amode(ISelEnv *, IRExpr *); -+static s390_cc_t s390_isel_cc(ISelEnv *, IRExpr *); -+static s390_opnd_RMI s390_isel_int_expr_RMI(ISelEnv *, IRExpr *); -+static void s390_isel_int128_expr(HReg *, HReg *, ISelEnv *, IRExpr *); -+static HReg s390_isel_float_expr(ISelEnv *, IRExpr *); -+static void s390_isel_float128_expr(HReg *, HReg *, ISelEnv *, IRExpr *); -+ -+ -+/* Add an instruction */ -+static void -+addInstr(ISelEnv *env, s390_insn *insn) -+{ -+ addHInstr(env->code, insn); -+ -+ if (vex_traceflags & VEX_TRACE_VCODE) { -+ vex_printf("%s\n", s390_insn_as_string(insn)); -+ } -+} -+ -+ -+static __inline__ IRExpr * -+mkU64(ULong value) -+{ -+ return IRExpr_Const(IRConst_U64(value)); -+} -+ -+ -+/*---------------------------------------------------------*/ -+/*--- Registers ---*/ -+/*---------------------------------------------------------*/ -+ -+/* Return the virtual register to which a given IRTemp is mapped. */ -+static HReg -+lookupIRTemp(ISelEnv *env, IRTemp tmp) -+{ -+ vassert(tmp < env->n_vregmap); -+ vassert(env->vregmap[tmp] != INVALID_HREG); -+ -+ return env->vregmap[tmp]; -+} -+ -+ -+/* Return the two virtual registers to which the IRTemp is mapped. */ -+static void -+lookupIRTemp128(HReg *hi, HReg *lo, ISelEnv *env, IRTemp tmp) -+{ -+ vassert(tmp < env->n_vregmap); -+ vassert(env->vregmapHI[tmp] != INVALID_HREG); -+ -+ *lo = env->vregmap[tmp]; -+ *hi = env->vregmapHI[tmp]; -+} -+ -+ -+/* Allocate a new integer register */ -+static HReg -+newVRegI(ISelEnv *env) -+{ -+ HReg reg = mkHReg(env->vreg_ctr, HRcInt64, True /* virtual */ ); -+ env->vreg_ctr++; -+ -+ return reg; -+} -+ -+ -+/* Allocate a new floating point register */ -+static HReg -+newVRegF(ISelEnv *env) -+{ -+ HReg reg = mkHReg(env->vreg_ctr, HRcFlt64, True /* virtual */ ); -+ -+ env->vreg_ctr++; -+ -+ return reg; -+} -+ -+ -+/* Construct a non-virtual general purpose register */ -+static __inline__ HReg -+make_gpr(ISelEnv *env, UInt regno) -+{ -+ return mkHReg(regno, HRcInt64, False /* virtual */ ); -+} -+ -+ -+/* Construct a non-virtual floating point register */ -+static __inline__ HReg -+make_fpr(UInt regno) -+{ -+ return mkHReg(regno, HRcFlt64, False /* virtual */ ); -+} -+ -+ -+/*---------------------------------------------------------*/ -+/*--- Amode ---*/ -+/*---------------------------------------------------------*/ -+ -+static __inline__ Bool -+ulong_fits_unsigned_12bit(ULong val) -+{ -+ return (val & 0xFFFu) == val; -+} -+ -+ -+static __inline__ Bool -+ulong_fits_signed_20bit(ULong val) -+{ -+ Long v = val & 0xFFFFFu; -+ -+ v = (v << 44) >> 44; /* sign extend */ -+ -+ return val == (ULong)v; -+} -+ -+ -+/* EXPR is an expression that is used as an address. Return an s390_amode -+ for it. */ -+static s390_amode * -+s390_isel_amode_wrk(ISelEnv *env, IRExpr *expr) -+{ -+ if (expr->tag == Iex_Binop && expr->Iex.Binop.op == Iop_Add64) { -+ IRExpr *arg1 = expr->Iex.Binop.arg1; -+ IRExpr *arg2 = expr->Iex.Binop.arg2; -+ -+ /* Move constant into right subtree */ -+ if (arg1->tag == Iex_Const) { -+ IRExpr *tmp; -+ tmp = arg1; -+ arg1 = arg2; -+ arg2 = tmp; -+ } -+ -+ /* r + constant: Check for b12 first, then b20 */ -+ if (arg2->tag == Iex_Const && arg2->Iex.Const.con->tag == Ico_U64) { -+ ULong value = arg2->Iex.Const.con->Ico.U64; -+ -+ if (ulong_fits_unsigned_12bit(value)) { -+ return s390_amode_b12((Int)value, s390_isel_int_expr(env, arg1)); -+ } -+ if (ulong_fits_signed_20bit(value)) { -+ return s390_amode_b20((Int)value, s390_isel_int_expr(env, arg1)); -+ } -+ } -+ } -+ -+ /* Doesn't match anything in particular. Generate it into -+ a register and use that. */ -+ return s390_amode_b12(0, s390_isel_int_expr(env, expr)); -+} -+ -+ -+static s390_amode * -+s390_isel_amode(ISelEnv *env, IRExpr *expr) -+{ -+ s390_amode *am = s390_isel_amode_wrk(env, expr); -+ -+ /* Address computation should yield a 64-bit value */ -+ vassert(typeOfIRExpr(env->type_env, expr) == Ity_I64); -+ -+ am = s390_isel_amode_wrk(env, expr); -+ -+ /* Check post-condition */ -+ vassert(s390_amode_is_sane(am)); -+ -+ return am; -+} -+ -+ -+/*---------------------------------------------------------*/ -+/*--- Helper functions ---*/ -+/*---------------------------------------------------------*/ -+ -+/* Constants and memory accesses should be right operands */ -+#define order_commutative_operands(left, right) \ -+ do { \ -+ if (left->tag == Iex_Const || left->tag == Iex_Load || \ -+ left->tag == Iex_Get) { \ -+ IRExpr *tmp; \ -+ tmp = left; \ -+ left = right; \ -+ right = tmp; \ -+ } \ -+ } while (0) -+ -+ -+/* Copy an RMI operand to the DST register */ -+static s390_insn * -+s390_opnd_copy(UChar size, HReg dst, s390_opnd_RMI opnd) -+{ -+ switch (opnd.tag) { -+ case S390_OPND_AMODE: -+ return s390_insn_load(size, dst, opnd.variant.am); -+ -+ case S390_OPND_REG: -+ return s390_insn_move(size, dst, opnd.variant.reg); -+ -+ case S390_OPND_IMMEDIATE: -+ return s390_insn_load_immediate(size, dst, opnd.variant.imm); -+ -+ default: -+ vpanic("s390_opnd_copy"); -+ } -+} -+ -+ -+/* Construct a RMI operand for a register */ -+static __inline__ s390_opnd_RMI -+s390_opnd_reg(HReg reg) -+{ -+ s390_opnd_RMI opnd; -+ -+ opnd.tag = S390_OPND_REG; -+ opnd.variant.reg = reg; -+ -+ return opnd; -+} -+ -+ -+/* Construct a RMI operand for an immediate constant */ -+static __inline__ s390_opnd_RMI -+s390_opnd_imm(ULong value) -+{ -+ s390_opnd_RMI opnd; -+ -+ opnd.tag = S390_OPND_IMMEDIATE; -+ opnd.variant.imm = value; -+ -+ return opnd; -+} -+ -+ -+/* Return 1, if EXPR represents the cosntant 0 */ -+static int -+s390_expr_is_const_zero(IRExpr *expr) -+{ -+ ULong value; -+ -+ if (expr->tag == Iex_Const) { -+ switch (expr->Iex.Const.con->tag) { -+ case Ico_U1: value = expr->Iex.Const.con->Ico.U1; break; -+ case Ico_U8: value = expr->Iex.Const.con->Ico.U8; break; -+ case Ico_U16: value = expr->Iex.Const.con->Ico.U16; break; -+ case Ico_U32: value = expr->Iex.Const.con->Ico.U32; break; -+ case Ico_U64: value = expr->Iex.Const.con->Ico.U64; break; -+ default: -+ vpanic("s390_expr_is_const_zero"); -+ } -+ return value == 0; -+ } -+ -+ return 0; -+} -+ -+ -+/* Call a helper (clean or dirty) -+ Arguments must satisfy the following conditions: -+ (a) they are expressions yielding an integer result -+ (b) there can be no more than S390_NUM_GPRPARMS arguments -+ guard is a Ity_Bit expression indicating whether or not the -+ call happens. If guard==NULL, the call is unconditional. -+*/ -+static void -+doHelperCall(ISelEnv *env, Bool passBBP, IRExpr *guard, -+ IRCallee *callee, IRExpr **args) -+{ -+ UInt n_args, i, argreg, size; -+ ULong target; -+ HReg tmpregs[S390_NUM_GPRPARMS]; -+ s390_cc_t cc; -+ -+ n_args = 0; -+ for (i = 0; args[i]; i++) -+ ++n_args; -+ -+ if (n_args > (S390_NUM_GPRPARMS - (passBBP ? 1 : 0))) { -+ vpanic("doHelperCall: too many arguments"); -+ } -+ -+ /* This is the "slow scheme". fixs390: implement the fast one */ -+ argreg = 0; -+ -+ /* If we need the guest state pointer put it in a temporary arg reg */ -+ if (passBBP) { -+ tmpregs[argreg] = newVRegI(env); -+ addInstr(env, s390_insn_move(sizeof(ULong), tmpregs[argreg], -+ s390_hreg_guest_state_pointer())); -+ argreg++; -+ } -+ -+ /* Compute the function arguments into a temporary register each */ -+ for (i = 0; i < n_args; i++) { -+ tmpregs[argreg] = s390_isel_int_expr(env, args[i]); -+ argreg++; -+ } -+ -+ /* Compute the condition */ -+ cc = S390_CC_ALWAYS; -+ if (guard) { -+ if (guard->tag == Iex_Const -+ && guard->Iex.Const.con->tag == Ico_U1 -+ && guard->Iex.Const.con->Ico.U1 == True) { -+ /* unconditional -- do nothing */ -+ } else { -+ cc = s390_isel_cc(env, guard); -+ } -+ } -+ -+ /* Move the args to the final register */ -+ for (i = 0; i < argreg; i++) { -+ HReg finalreg; -+ -+ finalreg = mkHReg(s390_gprno_from_arg_index(i), HRcInt64, False); -+ size = sizeofIRType(Ity_I64); -+ addInstr(env, s390_insn_move(size, finalreg, tmpregs[i])); -+ } -+ -+ target = Ptr_to_ULong(callee->addr); -+ -+ /* Finally, the call itself. */ -+ addInstr(env, s390_insn_helper_call(cc, (Addr64)target, n_args, -+ callee->name)); -+} -+ -+ -+/* Given an expression representing a rounding mode using IRRoundingMode -+ encoding convert it to an s390_round_t value. */ -+static s390_round_t -+decode_rounding_mode(IRExpr *rounding_expr) -+{ -+ if (rounding_expr->tag == Iex_Const && -+ rounding_expr->Iex.Const.con->tag == Ico_U32) { -+ IRRoundingMode mode = rounding_expr->Iex.Const.con->Ico.U32; -+ -+ switch (mode) { -+ case Irrm_NEAREST: return S390_ROUND_NEAREST_EVEN; -+ case Irrm_ZERO: return S390_ROUND_ZERO; -+ case Irrm_PosINF: return S390_ROUND_POSINF; -+ case Irrm_NegINF: return S390_ROUND_NEGINF; -+ } -+ } -+ -+ vpanic("decode_rounding_mode"); -+} -+ -+ -+/* CC_S390 holds the condition code in s390 encoding. Convert it to -+ VEX encoding -+ -+ s390 VEX b6 b2 b0 cc.1 cc.0 -+ 0 0x40 EQ 1 0 0 0 0 -+ 1 0x01 LT 0 0 1 0 1 -+ 2 0x00 GT 0 0 0 1 0 -+ 3 0x45 Unordered 1 1 1 1 1 -+ -+ b0 = cc.0 -+ b2 = cc.0 & cc.1 -+ b6 = ~(cc.0 ^ cc.1) // ((cc.0 - cc.1) + 0x1 ) & 0x1 -+ -+ VEX = b0 | (b2 << 2) | (b6 << 6); -+*/ -+static HReg -+convert_s390_fpcc_to_vex(ISelEnv *env, HReg cc_s390) -+{ -+ HReg cc0, cc1, b2, b6, cc_vex; -+ -+ cc0 = newVRegI(env); -+ addInstr(env, s390_insn_move(4, cc0, cc_s390)); -+ addInstr(env, s390_insn_alu(4, S390_ALU_AND, cc0, s390_opnd_imm(1))); -+ -+ cc1 = newVRegI(env); -+ addInstr(env, s390_insn_move(4, cc1, cc_s390)); -+ addInstr(env, s390_insn_alu(4, S390_ALU_RSH, cc1, s390_opnd_imm(1))); -+ -+ b2 = newVRegI(env); -+ addInstr(env, s390_insn_move(4, b2, cc0)); -+ addInstr(env, s390_insn_alu(4, S390_ALU_AND, b2, s390_opnd_reg(cc1))); -+ addInstr(env, s390_insn_alu(4, S390_ALU_LSH, b2, s390_opnd_imm(2))); -+ -+ b6 = newVRegI(env); -+ addInstr(env, s390_insn_move(4, b6, cc0)); -+ addInstr(env, s390_insn_alu(4, S390_ALU_SUB, b6, s390_opnd_reg(cc1))); -+ addInstr(env, s390_insn_alu(4, S390_ALU_ADD, b6, s390_opnd_imm(1))); -+ addInstr(env, s390_insn_alu(4, S390_ALU_AND, b6, s390_opnd_imm(1))); -+ addInstr(env, s390_insn_alu(4, S390_ALU_LSH, b6, s390_opnd_imm(6))); -+ -+ cc_vex = newVRegI(env); -+ addInstr(env, s390_insn_move(4, cc_vex, cc0)); -+ addInstr(env, s390_insn_alu(4, S390_ALU_OR, cc_vex, s390_opnd_reg(b2))); -+ addInstr(env, s390_insn_alu(4, S390_ALU_OR, cc_vex, s390_opnd_reg(b6))); -+ -+ return cc_vex; -+} -+ -+ -+/*---------------------------------------------------------*/ -+/*--- ISEL: Integer expressions (128 bit) ---*/ -+/*---------------------------------------------------------*/ -+static void -+s390_isel_int128_expr_wrk(HReg *dst_hi, HReg *dst_lo, ISelEnv *env, -+ IRExpr *expr) -+{ -+ IRType ty = typeOfIRExpr(env->type_env, expr); -+ -+ vassert(ty == Ity_I128); -+ -+ /* No need to consider the following -+ - 128-bit constants (they do not exist in VEX) -+ - 128-bit loads from memory (will not be generated) -+ */ -+ -+ /* Read 128-bit IRTemp */ -+ if (expr->tag == Iex_RdTmp) { -+ lookupIRTemp128(dst_hi, dst_lo, env, expr->Iex.RdTmp.tmp); -+ return; -+ } -+ -+ if (expr->tag == Iex_Binop) { -+ IRExpr *arg1 = expr->Iex.Binop.arg1; -+ IRExpr *arg2 = expr->Iex.Binop.arg2; -+ Bool is_signed_multiply, is_signed_divide; -+ -+ switch (expr->Iex.Binop.op) { -+ case Iop_MullU64: -+ is_signed_multiply = False; -+ goto do_multiply64; -+ -+ case Iop_MullS64: -+ is_signed_multiply = True; -+ goto do_multiply64; -+ -+ case Iop_DivModU128to64: -+ is_signed_divide = False; -+ goto do_divide64; -+ -+ case Iop_DivModS128to64: -+ is_signed_divide = True; -+ goto do_divide64; -+ -+ case Iop_64HLto128: -+ *dst_hi = s390_isel_int_expr(env, arg1); -+ *dst_lo = s390_isel_int_expr(env, arg2); -+ return; -+ -+ case Iop_DivModS64to64: { -+ HReg r10, r11, h1; -+ s390_opnd_RMI op2; -+ -+ h1 = s390_isel_int_expr(env, arg1); /* Process 1st operand */ -+ op2 = s390_isel_int_expr_RMI(env, arg2); /* Process 2nd operand */ -+ -+ /* We use non-virtual registers r10 and r11 as pair */ -+ r10 = make_gpr(env, 10); -+ r11 = make_gpr(env, 11); -+ -+ /* Move 1st operand into r11 and */ -+ addInstr(env, s390_insn_move(8, r11, h1)); -+ -+ /* Divide */ -+ addInstr(env, s390_insn_divs(8, r10, r11, op2)); -+ -+ /* The result is in registers r10 (remainder) and r11 (quotient). -+ Move the result into the reg pair that is being returned such -+ such that the low 64 bits are the quotient and the upper 64 bits -+ are the remainder. (see libvex_ir.h). */ -+ *dst_hi = newVRegI(env); -+ *dst_lo = newVRegI(env); -+ addInstr(env, s390_insn_move(8, *dst_hi, r10)); -+ addInstr(env, s390_insn_move(8, *dst_lo, r11)); -+ return; -+ } -+ -+ default: -+ break; -+ -+ do_multiply64: { -+ HReg r10, r11, h1; -+ s390_opnd_RMI op2; -+ -+ order_commutative_operands(arg1, arg2); -+ -+ h1 = s390_isel_int_expr(env, arg1); /* Process 1st operand */ -+ op2 = s390_isel_int_expr_RMI(env, arg2); /* Process 2nd operand */ -+ -+ /* We use non-virtual registers r10 and r11 as pair */ -+ r10 = make_gpr(env, 10); -+ r11 = make_gpr(env, 11); -+ -+ /* Move the first operand to r11 */ -+ addInstr(env, s390_insn_move(8, r11, h1)); -+ -+ /* Multiply */ -+ addInstr(env, s390_insn_mul(8, r10, r11, op2, is_signed_multiply)); -+ -+ /* The result is in registers r10 and r11. Assign to two virtual regs -+ and return. */ -+ *dst_hi = newVRegI(env); -+ *dst_lo = newVRegI(env); -+ addInstr(env, s390_insn_move(8, *dst_hi, r10)); -+ addInstr(env, s390_insn_move(8, *dst_lo, r11)); -+ return; -+ } -+ -+ do_divide64: { -+ HReg r10, r11, hi, lo; -+ s390_opnd_RMI op2; -+ -+ s390_isel_int128_expr(&hi, &lo, env, arg1); -+ op2 = s390_isel_int_expr_RMI(env, arg2); /* Process 2nd operand */ -+ -+ /* We use non-virtual registers r10 and r11 as pair */ -+ r10 = make_gpr(env, 10); -+ r11 = make_gpr(env, 11); -+ -+ /* Move high 64 bits of the 1st operand into r10 and -+ the low 64 bits into r11. */ -+ addInstr(env, s390_insn_move(8, r10, hi)); -+ addInstr(env, s390_insn_move(8, r11, lo)); -+ -+ /* Divide */ -+ addInstr(env, s390_insn_div(8, r10, r11, op2, is_signed_divide)); -+ -+ /* The result is in registers r10 (remainder) and r11 (quotient). -+ Move the result into the reg pair that is being returned such -+ such that the low 64 bits are the quotient and the upper 64 bits -+ are the remainder. (see libvex_ir.h). */ -+ *dst_hi = newVRegI(env); -+ *dst_lo = newVRegI(env); -+ addInstr(env, s390_insn_move(8, *dst_hi, r10)); -+ addInstr(env, s390_insn_move(8, *dst_lo, r11)); -+ return; -+ } -+ } -+ } -+ -+ vpanic("s390_isel_int128_expr"); -+} -+ -+ -+/* Compute a 128-bit value into two 64-bit registers. These may be either -+ real or virtual regs; in any case they must not be changed by subsequent -+ code emitted by the caller. */ -+static void -+s390_isel_int128_expr(HReg *dst_hi, HReg *dst_lo, ISelEnv *env, IRExpr *expr) -+{ -+ s390_isel_int128_expr_wrk(dst_hi, dst_lo, env, expr); -+ -+ /* Sanity checks ... */ -+ vassert(hregIsVirtual(*dst_hi)); -+ vassert(hregIsVirtual(*dst_lo)); -+ vassert(hregClass(*dst_hi) == HRcInt64); -+ vassert(hregClass(*dst_lo) == HRcInt64); -+} -+ -+ -+/*---------------------------------------------------------*/ -+/*--- ISEL: Integer expressions (64/32/16/8 bit) ---*/ -+/*---------------------------------------------------------*/ -+ -+/* Select insns for an integer-typed expression, and add them to the -+ code list. Return a reg holding the result. This reg will be a -+ virtual register. THE RETURNED REG MUST NOT BE MODIFIED. If you -+ want to modify it, ask for a new vreg, copy it in there, and modify -+ the copy. The register allocator will do its best to map both -+ vregs to the same real register, so the copies will often disappear -+ later in the game. -+ -+ This should handle expressions of 64, 32, 16 and 8-bit type. -+ All results are returned in a 64bit register. -+ For 16- and 8-bit expressions, the upper (32/48/56 : 16/24) bits -+ are arbitrary, so you should mask or sign extend partial values -+ if necessary. -+*/ -+ -+/* DO NOT CALL THIS DIRECTLY ! */ -+static HReg -+s390_isel_int_expr_wrk(ISelEnv *env, IRExpr *expr) -+{ -+ IRType ty = typeOfIRExpr(env->type_env, expr); -+ UChar size; -+ s390_bfp_unop_t bfpop; -+ -+ vassert(ty == Ity_I8 || ty == Ity_I16 || ty == Ity_I32 || ty == Ity_I64); -+ -+ size = sizeofIRType(ty); /* size of the result after evaluating EXPR */ -+ -+ switch (expr->tag) { -+ -+ /* --------- TEMP --------- */ -+ case Iex_RdTmp: -+ /* Return the virtual register that holds the temporary. */ -+ return lookupIRTemp(env, expr->Iex.RdTmp.tmp); -+ -+ /* --------- LOAD --------- */ -+ case Iex_Load: { -+ HReg dst = newVRegI(env); -+ s390_amode *am = s390_isel_amode(env, expr->Iex.Load.addr); -+ -+ if (expr->Iex.Load.end != Iend_BE) -+ goto irreducible; -+ -+ addInstr(env, s390_insn_load(size, dst, am)); -+ -+ return dst; -+ } -+ -+ /* --------- BINARY OP --------- */ -+ case Iex_Binop: { -+ IRExpr *arg1 = expr->Iex.Binop.arg1; -+ IRExpr *arg2 = expr->Iex.Binop.arg2; -+ HReg h1, res; -+ s390_alu_t opkind; -+ s390_opnd_RMI op2, value, opnd; -+ s390_insn *insn; -+ Bool is_commutative, is_signed_multiply, is_signed_divide; -+ -+ is_commutative = True; -+ -+ switch (expr->Iex.Binop.op) { -+ case Iop_MullU8: -+ case Iop_MullU16: -+ case Iop_MullU32: -+ is_signed_multiply = False; -+ goto do_multiply; -+ -+ case Iop_MullS8: -+ case Iop_MullS16: -+ case Iop_MullS32: -+ is_signed_multiply = True; -+ goto do_multiply; -+ -+ do_multiply: { -+ HReg r10, r11; -+ UInt arg_size = size / 2; -+ -+ order_commutative_operands(arg1, arg2); -+ -+ h1 = s390_isel_int_expr(env, arg1); /* Process 1st operand */ -+ op2 = s390_isel_int_expr_RMI(env, arg2); /* Process 2nd operand */ -+ -+ /* We use non-virtual registers r10 and r11 as pair */ -+ r10 = make_gpr(env, 10); -+ r11 = make_gpr(env, 11); -+ -+ /* Move the first operand to r11 */ -+ addInstr(env, s390_insn_move(arg_size, r11, h1)); -+ -+ /* Multiply */ -+ addInstr(env, s390_insn_mul(arg_size, r10, r11, op2, is_signed_multiply)); -+ -+ /* The result is in registers r10 and r11. Combine them into a SIZE-bit -+ value into the destination register. */ -+ res = newVRegI(env); -+ addInstr(env, s390_insn_move(arg_size, res, r10)); -+ value = s390_opnd_imm(arg_size * 8); -+ addInstr(env, s390_insn_alu(size, S390_ALU_LSH, res, value)); -+ value = s390_opnd_imm((((ULong)1) << arg_size * 8) - 1); -+ addInstr(env, s390_insn_alu(size, S390_ALU_AND, r11, value)); -+ opnd = s390_opnd_reg(r11); -+ addInstr(env, s390_insn_alu(size, S390_ALU_OR, res, opnd)); -+ return res; -+ } -+ -+ case Iop_DivModS64to32: -+ is_signed_divide = True; -+ goto do_divide; -+ -+ case Iop_DivModU64to32: -+ is_signed_divide = False; -+ goto do_divide; -+ -+ do_divide: { -+ HReg r10, r11; -+ -+ h1 = s390_isel_int_expr(env, arg1); /* Process 1st operand */ -+ op2 = s390_isel_int_expr_RMI(env, arg2); /* Process 2nd operand */ -+ -+ /* We use non-virtual registers r10 and r11 as pair */ -+ r10 = make_gpr(env, 10); -+ r11 = make_gpr(env, 11); -+ -+ /* Split the first operand and put the high 32 bits into r10 and -+ the low 32 bits into r11. */ -+ addInstr(env, s390_insn_move(8, r10, h1)); -+ addInstr(env, s390_insn_move(8, r11, h1)); -+ value = s390_opnd_imm(32); -+ addInstr(env, s390_insn_alu(8, S390_ALU_RSH, r10, value)); -+ -+ /* Divide */ -+ addInstr(env, s390_insn_div(4, r10, r11, op2, is_signed_divide)); -+ -+ /* The result is in registers r10 (remainder) and r11 (quotient). -+ Combine them into a 64-bit value such that the low 32 bits are -+ the quotient and the upper 32 bits are the remainder. (see -+ libvex_ir.h). */ -+ res = newVRegI(env); -+ addInstr(env, s390_insn_move(8, res, r10)); -+ value = s390_opnd_imm(32); -+ addInstr(env, s390_insn_alu(8, S390_ALU_LSH, res, value)); -+ value = s390_opnd_imm((((ULong)1) << 32) - 1); -+ addInstr(env, s390_insn_alu(8, S390_ALU_AND, r11, value)); -+ opnd = s390_opnd_reg(r11); -+ addInstr(env, s390_insn_alu(8, S390_ALU_OR, res, opnd)); -+ return res; -+ } -+ -+ case Iop_F32toI32S: bfpop = S390_BFP_F32_TO_I32; goto do_convert; -+ case Iop_F32toI64S: bfpop = S390_BFP_F32_TO_I64; goto do_convert; -+ case Iop_F64toI32S: bfpop = S390_BFP_F64_TO_I32; goto do_convert; -+ case Iop_F64toI64S: bfpop = S390_BFP_F64_TO_I64; goto do_convert; -+ case Iop_F128toI32S: bfpop = S390_BFP_F128_TO_I32; goto do_convert_128; -+ case Iop_F128toI64S: bfpop = S390_BFP_F128_TO_I64; goto do_convert_128; -+ -+ do_convert: { -+ s390_round_t rounding_mode; -+ -+ res = newVRegI(env); -+ h1 = s390_isel_float_expr(env, arg2); /* Process operand */ -+ -+ rounding_mode = decode_rounding_mode(arg1); -+ addInstr(env, s390_insn_bfp_unop(size, bfpop, res, h1, rounding_mode)); -+ return res; -+ } -+ -+ do_convert_128: { -+ s390_round_t rounding_mode; -+ HReg op_hi, op_lo, f13, f15; -+ -+ res = newVRegI(env); -+ s390_isel_float128_expr(&op_hi, &op_lo, env, arg2); /* operand */ -+ -+ /* We use non-virtual registers r13 and r15 as pair */ -+ f13 = make_fpr(13); -+ f15 = make_fpr(15); -+ -+ /* operand --> (f13, f15) */ -+ addInstr(env, s390_insn_move(8, f13, op_hi)); -+ addInstr(env, s390_insn_move(8, f15, op_lo)); -+ -+ rounding_mode = decode_rounding_mode(arg1); -+ addInstr(env, s390_insn_bfp128_convert_from(size, bfpop, res, f13, f15, -+ rounding_mode)); -+ return res; -+ } -+ -+ case Iop_8HLto16: -+ case Iop_16HLto32: -+ case Iop_32HLto64: { -+ HReg h2; -+ UInt arg_size = size / 2; -+ -+ res = newVRegI(env); -+ h1 = s390_isel_int_expr(env, arg1); /* Process 1st operand */ -+ h2 = s390_isel_int_expr(env, arg2); /* Process 2nd operand */ -+ -+ addInstr(env, s390_insn_move(arg_size, res, h1)); -+ value = s390_opnd_imm(arg_size * 8); -+ addInstr(env, s390_insn_alu(size, S390_ALU_LSH, res, value)); -+ value = s390_opnd_imm((((ULong)1) << arg_size * 8) - 1); -+ addInstr(env, s390_insn_alu(size, S390_ALU_AND, h2, value)); -+ opnd = s390_opnd_reg(h2); -+ addInstr(env, s390_insn_alu(size, S390_ALU_OR, res, opnd)); -+ return res; -+ } -+ -+ case Iop_Max32U: { -+ /* arg1 > arg2 ? arg1 : arg2 using uint32_t arguments */ -+ res = newVRegI(env); -+ h1 = s390_isel_int_expr(env, arg1); -+ op2 = s390_isel_int_expr_RMI(env, arg2); -+ -+ addInstr(env, s390_insn_move(size, res, h1)); -+ addInstr(env, s390_insn_compare(size, res, op2, False /* signed */)); -+ addInstr(env, s390_insn_cond_move(size, S390_CC_L, res, op2)); -+ return res; -+ } -+ -+ case Iop_CmpF32: -+ case Iop_CmpF64: { -+ HReg cc_s390, h2; -+ -+ h1 = s390_isel_float_expr(env, arg1); -+ h2 = s390_isel_float_expr(env, arg2); -+ cc_s390 = newVRegI(env); -+ -+ size = (expr->Iex.Binop.op == Iop_CmpF32) ? 4 : 8; -+ -+ addInstr(env, s390_insn_bfp_compare(size, cc_s390, h1, h2)); -+ -+ return convert_s390_fpcc_to_vex(env, cc_s390); -+ } -+ -+ case Iop_CmpF128: { -+ HReg op1_hi, op1_lo, op2_hi, op2_lo, f12, f13, f14, f15, cc_s390; -+ -+ s390_isel_float128_expr(&op1_hi, &op1_lo, env, arg1); /* 1st operand */ -+ s390_isel_float128_expr(&op2_hi, &op2_lo, env, arg2); /* 2nd operand */ -+ cc_s390 = newVRegI(env); -+ -+ /* We use non-virtual registers as pairs (f13, f15) and (f12, f14)) */ -+ f12 = make_fpr(12); -+ f13 = make_fpr(13); -+ f14 = make_fpr(14); -+ f15 = make_fpr(15); -+ -+ /* 1st operand --> (f12, f14) */ -+ addInstr(env, s390_insn_move(8, f12, op1_hi)); -+ addInstr(env, s390_insn_move(8, f14, op1_lo)); -+ -+ /* 2nd operand --> (f13, f15) */ -+ addInstr(env, s390_insn_move(8, f13, op2_hi)); -+ addInstr(env, s390_insn_move(8, f15, op2_lo)); -+ -+ res = newVRegI(env); -+ addInstr(env, s390_insn_bfp128_compare(16, cc_s390, f12, f14, f13, f15)); -+ -+ return convert_s390_fpcc_to_vex(env, cc_s390); -+ } -+ -+ case Iop_Add8: -+ case Iop_Add16: -+ case Iop_Add32: -+ case Iop_Add64: -+ opkind = S390_ALU_ADD; -+ break; -+ -+ case Iop_Sub8: -+ case Iop_Sub16: -+ case Iop_Sub32: -+ case Iop_Sub64: -+ opkind = S390_ALU_SUB; -+ is_commutative = False; -+ break; -+ -+ case Iop_And8: -+ case Iop_And16: -+ case Iop_And32: -+ case Iop_And64: -+ opkind = S390_ALU_AND; -+ break; -+ -+ case Iop_Or8: -+ case Iop_Or16: -+ case Iop_Or32: -+ case Iop_Or64: -+ opkind = S390_ALU_OR; -+ break; -+ -+ case Iop_Xor8: -+ case Iop_Xor16: -+ case Iop_Xor32: -+ case Iop_Xor64: -+ opkind = S390_ALU_XOR; -+ break; -+ -+ case Iop_Shl8: -+ case Iop_Shl16: -+ case Iop_Shl32: -+ case Iop_Shl64: -+ opkind = S390_ALU_LSH; -+ is_commutative = False; -+ break; -+ -+ case Iop_Shr8: -+ case Iop_Shr16: -+ case Iop_Shr32: -+ case Iop_Shr64: -+ opkind = S390_ALU_RSH; -+ is_commutative = False; -+ break; -+ -+ case Iop_Sar8: -+ case Iop_Sar16: -+ case Iop_Sar32: -+ case Iop_Sar64: -+ opkind = S390_ALU_RSHA; -+ is_commutative = False; -+ break; -+ -+ default: -+ goto irreducible; -+ } -+ -+ /* Pattern match: 0 - arg1 --> -arg1 */ -+ if (opkind == S390_ALU_SUB && s390_expr_is_const_zero(arg1)) { -+ res = newVRegI(env); -+ op2 = s390_isel_int_expr_RMI(env, arg2); /* Process 2nd operand */ -+ insn = s390_insn_unop(size, S390_NEGATE, res, op2); -+ addInstr(env, insn); -+ -+ return res; -+ } -+ -+ if (is_commutative) { -+ order_commutative_operands(arg1, arg2); -+ } -+ -+ h1 = s390_isel_int_expr(env, arg1); /* Process 1st operand */ -+ op2 = s390_isel_int_expr_RMI(env, arg2); /* Process 2nd operand */ -+ res = newVRegI(env); -+ addInstr(env, s390_insn_move(size, res, h1)); -+ insn = s390_insn_alu(size, opkind, res, op2); -+ -+ addInstr(env, insn); -+ -+ return res; -+ } -+ -+ /* --------- UNARY OP --------- */ -+ case Iex_Unop: { -+ static s390_opnd_RMI mask = { S390_OPND_IMMEDIATE }; -+ static s390_opnd_RMI shift = { S390_OPND_IMMEDIATE }; -+ s390_opnd_RMI opnd; -+ s390_insn *insn; -+ IRExpr *arg; -+ HReg dst, h1; -+ IROp unop, binop; -+ -+ arg = expr->Iex.Unop.arg; -+ -+ /* Special cases are handled here */ -+ -+ /* 32-bit multiply with 32-bit result or -+ 64-bit multiply with 64-bit result */ -+ unop = expr->Iex.Unop.op; -+ binop = arg->Iex.Binop.op; -+ -+ if ((arg->tag == Iex_Binop && -+ ((unop == Iop_64to32 && -+ (binop == Iop_MullS32 || binop == Iop_MullU32)) || -+ (unop == Iop_128to64 && -+ (binop == Iop_MullS64 || binop == Iop_MullU64))))) { -+ h1 = s390_isel_int_expr(env, arg->Iex.Binop.arg1); /* 1st opnd */ -+ opnd = s390_isel_int_expr_RMI(env, arg->Iex.Binop.arg2); /* 2nd opnd */ -+ dst = newVRegI(env); /* Result goes into a new register */ -+ addInstr(env, s390_insn_move(size, dst, h1)); -+ addInstr(env, s390_insn_alu(size, S390_ALU_MUL, dst, opnd)); -+ -+ return dst; -+ } -+ -+ if (unop == Iop_ReinterpF64asI64) { -+ dst = newVRegI(env); -+ h1 = s390_isel_float_expr(env, arg); /* Process the operand */ -+ addInstr(env, s390_insn_move(size, dst, h1)); -+ -+ return dst; -+ } -+ -+ /* Expressions whose argument is 1-bit wide */ -+ if (typeOfIRExpr(env->type_env, arg) == Ity_I1) { -+ s390_cc_t cond = s390_isel_cc(env, arg); -+ dst = newVRegI(env); /* Result goes into a new register */ -+ addInstr(env, s390_insn_cc2bool(dst, cond)); -+ -+ switch (unop) { -+ case Iop_1Uto8: -+ case Iop_1Uto32: -+ case Iop_1Uto64: -+ /* Nothing to do */ -+ break; -+ -+ case Iop_1Sto8: -+ case Iop_1Sto16: -+ case Iop_1Sto32: -+ shift.variant.imm = 31; -+ addInstr(env, s390_insn_alu(4, S390_ALU_LSH, dst, shift)); -+ addInstr(env, s390_insn_alu(4, S390_ALU_RSHA, dst, shift)); -+ break; -+ -+ case Iop_1Sto64: -+ shift.variant.imm = 63; -+ addInstr(env, s390_insn_alu(8, S390_ALU_LSH, dst, shift)); -+ addInstr(env, s390_insn_alu(8, S390_ALU_RSHA, dst, shift)); -+ break; -+ -+ default: -+ goto irreducible; -+ } -+ -+ return dst; -+ } -+ -+ /* Regular processing */ -+ -+ if (unop == Iop_128to64) { -+ HReg dst_hi, dst_lo; -+ -+ s390_isel_int128_expr(&dst_hi, &dst_lo, env, arg); -+ return dst_lo; -+ } -+ -+ if (unop == Iop_128HIto64) { -+ HReg dst_hi, dst_lo; -+ -+ s390_isel_int128_expr(&dst_hi, &dst_lo, env, arg); -+ return dst_hi; -+ } -+ -+ dst = newVRegI(env); /* Result goes into a new register */ -+ opnd = s390_isel_int_expr_RMI(env, arg); /* Process the operand */ -+ -+ switch (unop) { -+ case Iop_8Uto16: -+ case Iop_8Uto32: -+ case Iop_8Uto64: -+ insn = s390_insn_unop(size, S390_ZERO_EXTEND_8, dst, opnd); -+ break; -+ -+ case Iop_16Uto32: -+ case Iop_16Uto64: -+ insn = s390_insn_unop(size, S390_ZERO_EXTEND_16, dst, opnd); -+ break; -+ -+ case Iop_32Uto64: -+ insn = s390_insn_unop(size, S390_ZERO_EXTEND_32, dst, opnd); -+ break; -+ -+ case Iop_8Sto16: -+ case Iop_8Sto32: -+ case Iop_8Sto64: -+ insn = s390_insn_unop(size, S390_SIGN_EXTEND_8, dst, opnd); -+ break; -+ -+ case Iop_16Sto32: -+ case Iop_16Sto64: -+ insn = s390_insn_unop(size, S390_SIGN_EXTEND_16, dst, opnd); -+ break; -+ -+ case Iop_32Sto64: -+ insn = s390_insn_unop(size, S390_SIGN_EXTEND_32, dst, opnd); -+ break; -+ -+ case Iop_64to8: -+ case Iop_64to16: -+ case Iop_64to32: -+ case Iop_32to8: -+ case Iop_32to16: -+ case Iop_16to8: -+ /* Down-casts are no-ops. Upstream operations will only look at -+ the bytes that make up the result of the down-cast. So there -+ is no point setting the other bytes to 0. */ -+ insn = s390_opnd_copy(8, dst, opnd); -+ break; -+ -+ case Iop_64HIto32: -+ addInstr(env, s390_opnd_copy(8, dst, opnd)); -+ shift.variant.imm = 32; -+ insn = s390_insn_alu(8, S390_ALU_RSH, dst, shift); -+ break; -+ -+ case Iop_32HIto16: -+ addInstr(env, s390_opnd_copy(4, dst, opnd)); -+ shift.variant.imm = 16; -+ insn = s390_insn_alu(4, S390_ALU_RSH, dst, shift); -+ break; -+ -+ case Iop_16HIto8: -+ addInstr(env, s390_opnd_copy(2, dst, opnd)); -+ shift.variant.imm = 8; -+ insn = s390_insn_alu(2, S390_ALU_RSH, dst, shift); -+ break; -+ -+ case Iop_Not8: -+ case Iop_Not16: -+ case Iop_Not32: -+ case Iop_Not64: -+ /* XOR with ffff... */ -+ mask.variant.imm = ~(ULong)0; -+ addInstr(env, s390_opnd_copy(size, dst, opnd)); -+ insn = s390_insn_alu(size, S390_ALU_XOR, dst, mask); -+ break; -+ -+ case Iop_Left8: -+ case Iop_Left16: -+ case Iop_Left32: -+ case Iop_Left64: -+ addInstr(env, s390_insn_unop(size, S390_NEGATE, dst, opnd)); -+ insn = s390_insn_alu(size, S390_ALU_OR, dst, opnd); -+ break; -+ -+ case Iop_CmpwNEZ32: -+ case Iop_CmpwNEZ64: { -+ /* Use the fact that x | -x == 0 iff x == 0. Otherwise, either X -+ or -X will have a 1 in the MSB. */ -+ addInstr(env, s390_insn_unop(size, S390_NEGATE, dst, opnd)); -+ addInstr(env, s390_insn_alu(size, S390_ALU_OR, dst, opnd)); -+ shift.variant.imm = (unop == Iop_CmpwNEZ32) ? 31 : 63; -+ addInstr(env, s390_insn_alu(size, S390_ALU_RSHA, dst, shift)); -+ return dst; -+ } -+ -+ case Iop_Clz64: { -+ HReg r10, r11; -+ -+ /* We use non-virtual registers r10 and r11 as pair for the two -+ output values */ -+ r10 = make_gpr(env, 10); -+ r11 = make_gpr(env, 11); -+ -+ /* flogr */ -+ addInstr(env, s390_insn_flogr(8, r10, r11, opnd)); -+ -+ /* The result is in registers r10 (bit position) and r11 (modified -+ input value). The value in r11 is not needed and will be -+ discarded. */ -+ addInstr(env, s390_insn_move(8, dst, r10)); -+ return dst; -+ } -+ -+ default: -+ goto irreducible; -+ } -+ -+ addInstr(env, insn); -+ -+ return dst; -+ } -+ -+ /* --------- GET --------- */ -+ case Iex_Get: { -+ HReg dst = newVRegI(env); -+ s390_amode *am = s390_amode_for_guest_state(expr->Iex.Get.offset); -+ -+ /* We never load more than 8 bytes from the guest state, because the -+ floating point register pair is not contiguous. */ -+ vassert(size <= 8); -+ -+ addInstr(env, s390_insn_load(size, dst, am)); -+ -+ return dst; -+ } -+ -+ case Iex_GetI: -+ /* not needed */ -+ break; -+ -+ /* --------- CCALL --------- */ -+ case Iex_CCall: { -+ HReg dst = newVRegI(env); -+ -+ doHelperCall(env, False, NULL, expr->Iex.CCall.cee, -+ expr->Iex.CCall.args); -+ -+ /* Move the returned value into the return register */ -+ addInstr(env, s390_insn_move(sizeofIRType(expr->Iex.CCall.retty), dst, -+ mkHReg(S390_REGNO_RETURN_VALUE, -+ HRcInt64, False))); -+ return dst; -+ } -+ -+ /* --------- LITERAL --------- */ -+ -+ /* Load a literal into a register. Create a "load immediate" -+ v-insn and return the register. */ -+ case Iex_Const: { -+ ULong value; -+ HReg dst = newVRegI(env); -+ const IRConst *con = expr->Iex.Const.con; -+ -+ /* Bitwise copy of the value. No sign/zero-extension */ -+ switch (con->tag) { -+ case Ico_U64: value = con->Ico.U64; break; -+ case Ico_U32: value = con->Ico.U32; break; -+ case Ico_U16: value = con->Ico.U16; break; -+ case Ico_U8: value = con->Ico.U8; break; -+ default: vpanic("s390_isel_int_expr: invalid constant"); -+ } -+ -+ addInstr(env, s390_insn_load_immediate(size, dst, value)); -+ -+ return dst; -+ } -+ -+ /* --------- MULTIPLEX --------- */ -+ case Iex_Mux0X: { -+ IRExpr *cond_expr; -+ HReg dst, tmp, rX; -+ s390_opnd_RMI cond, r0, zero; -+ -+ cond_expr = expr->Iex.Mux0X.cond; -+ -+ dst = newVRegI(env); -+ r0 = s390_isel_int_expr_RMI(env, expr->Iex.Mux0X.expr0); -+ rX = s390_isel_int_expr(env, expr->Iex.Mux0X.exprX); -+ size = sizeofIRType(typeOfIRExpr(env->type_env, expr->Iex.Mux0X.exprX)); -+ -+ if (cond_expr->tag == Iex_Unop && cond_expr->Iex.Unop.op == Iop_1Uto8) { -+ s390_cc_t cc = s390_isel_cc(env, cond_expr->Iex.Unop.arg); -+ -+ addInstr(env, s390_insn_move(size, dst, rX)); -+ addInstr(env, s390_insn_cond_move(size, s390_cc_invert(cc), dst, r0)); -+ return dst; -+ } -+ -+ /* Assume the condition is true and move rX to the destination reg. */ -+ addInstr(env, s390_insn_move(size, dst, rX)); -+ -+ /* Compute the condition ... */ -+ cond = s390_isel_int_expr_RMI(env, cond_expr); -+ -+ /* tmp = cond & 0xFF */ -+ tmp = newVRegI(env); -+ addInstr(env, s390_insn_load_immediate(4, tmp, 0xFF)); -+ addInstr(env, s390_insn_alu(4, S390_ALU_AND, tmp, cond)); -+ -+ /* ... and compare it with zero */ -+ zero = s390_opnd_imm(0); -+ addInstr(env, s390_insn_compare(4, tmp, zero, 0 /* signed */)); -+ -+ /* ... and if it compared equal move r0 to the destination reg. */ -+ size = sizeofIRType(typeOfIRExpr(env->type_env, expr->Iex.Mux0X.expr0)); -+ addInstr(env, s390_insn_cond_move(size, S390_CC_E, dst, r0)); -+ -+ return dst; -+ } -+ -+ default: -+ break; -+ } -+ -+ /* We get here if no pattern matched. */ -+ irreducible: -+ ppIRExpr(expr); -+ vpanic("s390_isel_int_expr: cannot reduce tree"); -+} -+ -+ -+static HReg -+s390_isel_int_expr(ISelEnv *env, IRExpr *expr) -+{ -+ HReg dst = s390_isel_int_expr_wrk(env, expr); -+ -+ /* Sanity checks ... */ -+ vassert(hregClass(dst) == HRcInt64); -+ vassert(hregIsVirtual(dst)); -+ -+ return dst; -+} -+ -+ -+static s390_opnd_RMI -+s390_isel_int_expr_RMI(ISelEnv *env, IRExpr *expr) -+{ -+ IRType ty = typeOfIRExpr(env->type_env, expr); -+ s390_opnd_RMI dst; -+ -+ vassert(ty == Ity_I8 || ty == Ity_I16 || ty == Ity_I32 || -+ ty == Ity_I64); -+ -+ if (expr->tag == Iex_Load) { -+ dst.tag = S390_OPND_AMODE; -+ dst.variant.am = s390_isel_amode(env, expr->Iex.Load.addr); -+ } else if (expr->tag == Iex_Get) { -+ dst.tag = S390_OPND_AMODE; -+ dst.variant.am = s390_amode_for_guest_state(expr->Iex.Get.offset); -+ } else if (expr->tag == Iex_Const) { -+ ULong value; -+ -+ /* The bit pattern for the value will be stored as is in the least -+ significant bits of VALUE. */ -+ switch (expr->Iex.Const.con->tag) { -+ case Ico_U1: value = expr->Iex.Const.con->Ico.U1; break; -+ case Ico_U8: value = expr->Iex.Const.con->Ico.U8; break; -+ case Ico_U16: value = expr->Iex.Const.con->Ico.U16; break; -+ case Ico_U32: value = expr->Iex.Const.con->Ico.U32; break; -+ case Ico_U64: value = expr->Iex.Const.con->Ico.U64; break; -+ default: -+ vpanic("s390_isel_int_expr_RMI"); -+ } -+ -+ dst.tag = S390_OPND_IMMEDIATE; -+ dst.variant.imm = value; -+ } else { -+ dst.tag = S390_OPND_REG; -+ dst.variant.reg = s390_isel_int_expr(env, expr); -+ } -+ -+ return dst; -+} -+ -+ -+/*---------------------------------------------------------*/ -+/*--- ISEL: Floating point expressions (128 bit) ---*/ -+/*---------------------------------------------------------*/ -+static void -+s390_isel_float128_expr_wrk(HReg *dst_hi, HReg *dst_lo, ISelEnv *env, -+ IRExpr *expr) -+{ -+ IRType ty = typeOfIRExpr(env->type_env, expr); -+ -+ vassert(ty == Ity_F128); -+ -+ /* Read 128-bit IRTemp */ -+ if (expr->tag == Iex_RdTmp) { -+ lookupIRTemp128(dst_hi, dst_lo, env, expr->Iex.RdTmp.tmp); -+ return; -+ } -+ -+ switch (expr->tag) { -+ case Iex_RdTmp: -+ /* Return the virtual registers that hold the temporary. */ -+ lookupIRTemp128(dst_hi, dst_lo, env, expr->Iex.RdTmp.tmp); -+ return; -+ -+ /* --------- LOAD --------- */ -+ case Iex_Load: { -+ IRExpr *addr_hi, *addr_lo; -+ s390_amode *am_hi, *am_lo; -+ -+ if (expr->Iex.Load.end != Iend_BE) -+ goto irreducible; -+ -+ addr_hi = expr->Iex.Load.addr; -+ addr_lo = IRExpr_Binop(Iop_Add64, addr_hi, mkU64(8)); -+ -+ am_hi = s390_isel_amode(env, addr_hi); -+ am_lo = s390_isel_amode(env, addr_lo); -+ -+ *dst_hi = newVRegF(env); -+ *dst_lo = newVRegF(env); -+ addInstr(env, s390_insn_load(8, *dst_hi, am_hi)); -+ addInstr(env, s390_insn_load(8, *dst_hi, am_lo)); -+ return; -+ } -+ -+ -+ /* --------- GET --------- */ -+ case Iex_Get: -+ /* This is not supported because loading 128-bit from the guest -+ state is almost certainly wrong. Use get_fpr_pair instead. */ -+ vpanic("Iex_Get with F128 data"); -+ -+ /* --------- 4-ary OP --------- */ -+ case Iex_Qop: -+ vpanic("Iex_Qop with F128 data"); -+ -+ /* --------- TERNARY OP --------- */ -+ case Iex_Triop: { -+ IROp op = expr->Iex.Triop.op; -+ IRExpr *left = expr->Iex.Triop.arg2; -+ IRExpr *right = expr->Iex.Triop.arg3; -+ s390_bfp_binop_t bfpop; -+ s390_round_t rounding_mode; -+ HReg op1_hi, op1_lo, op2_hi, op2_lo, f12, f13, f14, f15; -+ -+ s390_isel_float128_expr(&op1_hi, &op1_lo, env, left); /* 1st operand */ -+ s390_isel_float128_expr(&op2_hi, &op2_lo, env, right); /* 2nd operand */ -+ -+ /* We use non-virtual registers as pairs (f13, f15) and (f12, f14)) */ -+ f12 = make_fpr(12); -+ f13 = make_fpr(13); -+ f14 = make_fpr(14); -+ f15 = make_fpr(15); -+ -+ /* 1st operand --> (f12, f14) */ -+ addInstr(env, s390_insn_move(8, f12, op1_hi)); -+ addInstr(env, s390_insn_move(8, f14, op1_lo)); -+ -+ /* 2nd operand --> (f13, f15) */ -+ addInstr(env, s390_insn_move(8, f13, op2_hi)); -+ addInstr(env, s390_insn_move(8, f15, op2_lo)); -+ -+ switch (op) { -+ case Iop_AddF128: bfpop = S390_BFP_ADD; break; -+ case Iop_SubF128: bfpop = S390_BFP_SUB; break; -+ case Iop_MulF128: bfpop = S390_BFP_MUL; break; -+ case Iop_DivF128: bfpop = S390_BFP_DIV; break; -+ default: -+ goto irreducible; -+ } -+ -+ rounding_mode = decode_rounding_mode(expr->Iex.Triop.arg1); -+ addInstr(env, s390_insn_bfp128_binop(16, bfpop, f12, f14, f13, -+ f15, rounding_mode)); -+ -+ /* Move result to virtual destination register */ -+ *dst_hi = newVRegF(env); -+ *dst_lo = newVRegF(env); -+ addInstr(env, s390_insn_move(8, *dst_hi, f12)); -+ addInstr(env, s390_insn_move(8, *dst_lo, f14)); -+ -+ return; -+ } -+ -+ /* --------- BINARY OP --------- */ -+ case Iex_Binop: { -+ HReg op_hi, op_lo, f12, f13, f14, f15; -+ s390_bfp_binop_t bfpop; -+ s390_round_t rounding_mode; -+ -+ /* We use non-virtual registers as pairs (f13, f15) and (f12, f14)) */ -+ f12 = make_fpr(12); -+ f13 = make_fpr(13); -+ f14 = make_fpr(14); -+ f15 = make_fpr(15); -+ -+ switch (expr->Iex.Binop.op) { -+ case Iop_SqrtF128: -+ s390_isel_float128_expr(&op_hi, &op_lo, env, expr->Iex.Binop.arg2); -+ -+ /* operand --> (f13, f15) */ -+ addInstr(env, s390_insn_move(8, f13, op_hi)); -+ addInstr(env, s390_insn_move(8, f15, op_lo)); -+ -+ bfpop = S390_BFP_SQRT; -+ rounding_mode = decode_rounding_mode(expr->Iex.Binop.arg1); -+ -+ addInstr(env, s390_insn_bfp128_unop(16, bfpop, f12, f14, f13, f15, -+ rounding_mode)); -+ -+ /* Move result to virtual destination registers */ -+ *dst_hi = newVRegF(env); -+ *dst_lo = newVRegF(env); -+ addInstr(env, s390_insn_move(8, *dst_hi, f12)); -+ addInstr(env, s390_insn_move(8, *dst_lo, f14)); -+ return; -+ -+ case Iop_F64HLtoF128: -+ *dst_hi = s390_isel_float_expr(env, expr->Iex.Binop.arg1); -+ *dst_lo = s390_isel_float_expr(env, expr->Iex.Binop.arg2); -+ return; -+ -+ default: -+ goto irreducible; -+ } -+ } -+ -+ /* --------- UNARY OP --------- */ -+ case Iex_Unop: { -+ IRExpr *left = expr->Iex.Binop.arg1; -+ s390_bfp_unop_t bfpop; -+ s390_round_t rounding_mode; -+ HReg op_hi, op_lo, op, f12, f13, f14, f15; -+ -+ /* We use non-virtual registers as pairs (f13, f15) and (f12, f14)) */ -+ f12 = make_fpr(12); -+ f13 = make_fpr(13); -+ f14 = make_fpr(14); -+ f15 = make_fpr(15); -+ -+ switch (expr->Iex.Binop.op) { -+ case Iop_NegF128: bfpop = S390_BFP_NEG; goto float128_opnd; -+ case Iop_AbsF128: bfpop = S390_BFP_ABS; goto float128_opnd; -+ case Iop_I32StoF128: bfpop = S390_BFP_I32_TO_F128; goto convert_int; -+ case Iop_I64StoF128: bfpop = S390_BFP_I64_TO_F128; goto convert_int; -+ case Iop_F32toF128: bfpop = S390_BFP_F32_TO_F128; goto convert_float; -+ case Iop_F64toF128: bfpop = S390_BFP_F64_TO_F128; goto convert_float; -+ default: -+ goto irreducible; -+ } -+ -+ float128_opnd: -+ s390_isel_float128_expr(&op_hi, &op_lo, env, left); -+ -+ /* operand --> (f13, f15) */ -+ addInstr(env, s390_insn_move(8, f13, op_hi)); -+ addInstr(env, s390_insn_move(8, f15, op_lo)); -+ -+ rounding_mode = S390_ROUND_NEAREST_EVEN; /* will not be used later on */ -+ addInstr(env, s390_insn_bfp128_unop(16, bfpop, f12, f14, f13, f15, -+ rounding_mode)); -+ goto move_dst; -+ -+ convert_float: -+ op = s390_isel_float_expr(env, left); -+ addInstr(env, s390_insn_bfp128_convert_to(16, bfpop, f12, f14, -+ op)); -+ goto move_dst; -+ -+ convert_int: -+ op = s390_isel_int_expr(env, left); -+ addInstr(env, s390_insn_bfp128_convert_to(16, bfpop, f12, f14, -+ op)); -+ goto move_dst; -+ -+ move_dst: -+ /* Move result to virtual destination registers */ -+ *dst_hi = newVRegF(env); -+ *dst_lo = newVRegF(env); -+ addInstr(env, s390_insn_move(8, *dst_hi, f12)); -+ addInstr(env, s390_insn_move(8, *dst_lo, f14)); -+ return; -+ } -+ -+ default: -+ goto irreducible; -+ } -+ -+ /* We get here if no pattern matched. */ -+ irreducible: -+ ppIRExpr(expr); -+ vpanic("s390_isel_int_expr: cannot reduce tree"); -+} -+ -+/* Compute a 128-bit value into two 64-bit registers. These may be either -+ real or virtual regs; in any case they must not be changed by subsequent -+ code emitted by the caller. */ -+static void -+s390_isel_float128_expr(HReg *dst_hi, HReg *dst_lo, ISelEnv *env, IRExpr *expr) -+{ -+ s390_isel_float128_expr_wrk(dst_hi, dst_lo, env, expr); -+ -+ /* Sanity checks ... */ -+ vassert(hregIsVirtual(*dst_hi)); -+ vassert(hregIsVirtual(*dst_lo)); -+ vassert(hregClass(*dst_hi) == HRcFlt64); -+ vassert(hregClass(*dst_lo) == HRcFlt64); -+} -+ -+ -+/*---------------------------------------------------------*/ -+/*--- ISEL: Floating point expressions (64 bit) ---*/ -+/*---------------------------------------------------------*/ -+ -+static HReg -+s390_isel_float_expr_wrk(ISelEnv *env, IRExpr *expr) -+{ -+ IRType ty = typeOfIRExpr(env->type_env, expr); -+ UChar size; -+ -+ vassert(ty == Ity_F32 || ty == Ity_F64); -+ -+ size = sizeofIRType(ty); -+ -+ switch (expr->tag) { -+ case Iex_RdTmp: -+ /* Return the virtual register that holds the temporary. */ -+ return lookupIRTemp(env, expr->Iex.RdTmp.tmp); -+ -+ /* --------- LOAD --------- */ -+ case Iex_Load: { -+ HReg dst = newVRegF(env); -+ s390_amode *am = s390_isel_amode(env, expr->Iex.Load.addr); -+ -+ if (expr->Iex.Load.end != Iend_BE) -+ goto irreducible; -+ -+ addInstr(env, s390_insn_load(size, dst, am)); -+ -+ return dst; -+ } -+ -+ /* --------- GET --------- */ -+ case Iex_Get: { -+ HReg dst = newVRegF(env); -+ s390_amode *am = s390_amode_for_guest_state(expr->Iex.Get.offset); -+ -+ addInstr(env, s390_insn_load(size, dst, am)); -+ -+ return dst; -+ } -+ -+ /* --------- LITERAL --------- */ -+ -+ /* Load a literal into a register. Create a "load immediate" -+ v-insn and return the register. */ -+ case Iex_Const: { -+ ULong value; -+ HReg dst = newVRegF(env); -+ const IRConst *con = expr->Iex.Const.con; -+ -+ /* Bitwise copy of the value. No sign/zero-extension */ -+ switch (con->tag) { -+ case Ico_F32i: value = con->Ico.F32i; break; -+ case Ico_F64i: value = con->Ico.F64i; break; -+ default: vpanic("s390_isel_float_expr: invalid constant"); -+ } -+ -+ if (value != 0) vpanic("cannot load immediate floating point constant"); -+ -+ addInstr(env, s390_insn_load_immediate(size, dst, value)); -+ -+ return dst; -+ } -+ -+ /* --------- 4-ary OP --------- */ -+ case Iex_Qop: { -+ HReg op1, op2, op3, dst; -+ s390_bfp_triop_t bfpop; -+ s390_round_t rounding_mode; -+ -+ op1 = s390_isel_float_expr(env, expr->Iex.Qop.arg2); -+ op2 = s390_isel_float_expr(env, expr->Iex.Qop.arg3); -+ op3 = s390_isel_float_expr(env, expr->Iex.Qop.arg4); -+ dst = newVRegF(env); -+ addInstr(env, s390_insn_move(size, dst, op1)); -+ -+ switch (expr->Iex.Qop.op) { -+ case Iop_MAddF32: -+ case Iop_MAddF64: bfpop = S390_BFP_MADD; break; -+ case Iop_MSubF32: -+ case Iop_MSubF64: bfpop = S390_BFP_MSUB; break; -+ -+ default: -+ goto irreducible; -+ } -+ -+ rounding_mode = decode_rounding_mode(expr->Iex.Qop.arg1); -+ addInstr(env, s390_insn_bfp_triop(size, bfpop, dst, op2, op3, -+ rounding_mode)); -+ return dst; -+ } -+ -+ /* --------- TERNARY OP --------- */ -+ case Iex_Triop: { -+ IROp op = expr->Iex.Triop.op; -+ IRExpr *left = expr->Iex.Triop.arg2; -+ IRExpr *right = expr->Iex.Triop.arg3; -+ s390_bfp_binop_t bfpop; -+ s390_round_t rounding_mode; -+ HReg h1, op2, dst; -+ -+ h1 = s390_isel_float_expr(env, left); /* Process 1st operand */ -+ op2 = s390_isel_float_expr(env, right); /* Process 2nd operand */ -+ dst = newVRegF(env); -+ addInstr(env, s390_insn_move(size, dst, h1)); -+ switch (op) { -+ case Iop_AddF32: -+ case Iop_AddF64: bfpop = S390_BFP_ADD; break; -+ case Iop_SubF32: -+ case Iop_SubF64: bfpop = S390_BFP_SUB; break; -+ case Iop_MulF32: -+ case Iop_MulF64: bfpop = S390_BFP_MUL; break; -+ case Iop_DivF32: -+ case Iop_DivF64: bfpop = S390_BFP_DIV; break; -+ -+ default: -+ goto irreducible; -+ } -+ -+ rounding_mode = decode_rounding_mode(expr->Iex.Triop.arg1); -+ addInstr(env, s390_insn_bfp_binop(size, bfpop, dst, op2, rounding_mode)); -+ return dst; -+ } -+ -+ /* --------- BINARY OP --------- */ -+ case Iex_Binop: { -+ IROp op = expr->Iex.Binop.op; -+ IRExpr *left = expr->Iex.Binop.arg2; -+ HReg h1, dst; -+ s390_bfp_unop_t bfpop; -+ s390_round_t rounding_mode; -+ Int integer_operand; -+ -+ integer_operand = 1; -+ -+ switch (op) { -+ case Iop_SqrtF32: -+ case Iop_SqrtF64: -+ bfpop = S390_BFP_SQRT; -+ integer_operand = 0; -+ break; -+ -+ case Iop_F64toF32: -+ bfpop = S390_BFP_F64_TO_F32; -+ integer_operand = 0; -+ break; -+ -+ case Iop_I32StoF32: bfpop = S390_BFP_I32_TO_F32; break; -+ case Iop_I64StoF32: bfpop = S390_BFP_I64_TO_F32; break; -+ case Iop_I64StoF64: bfpop = S390_BFP_I64_TO_F64; break; -+ default: -+ goto irreducible; -+ -+ case Iop_F128toF64: -+ case Iop_F128toF32: { -+ HReg op_hi, op_lo, f12, f13, f14, f15; -+ -+ bfpop = op == Iop_F128toF32 ? S390_BFP_F128_TO_F32 -+ : S390_BFP_F128_TO_F64; -+ -+ rounding_mode = decode_rounding_mode(expr->Iex.Binop.arg1); -+ -+ s390_isel_float128_expr(&op_hi, &op_lo, env, expr->Iex.Binop.arg2); -+ -+ /* We use non-virtual registers as pairs (f13, f15) and (f12, f14)) */ -+ f12 = make_fpr(12); -+ f13 = make_fpr(13); -+ f14 = make_fpr(14); -+ f15 = make_fpr(15); -+ -+ /* operand --> (f13, f15) */ -+ addInstr(env, s390_insn_move(8, f13, op_hi)); -+ addInstr(env, s390_insn_move(8, f15, op_lo)); -+ -+ dst = newVRegF(env); -+ addInstr(env, s390_insn_bfp128_unop(16, bfpop, f12, f14, f13, f15, -+ rounding_mode)); -+ -+ /* Move result to virtual destination registers */ -+ addInstr(env, s390_insn_move(8, dst, f12)); -+ return dst; -+ } -+ } -+ -+ /* Process operand */ -+ if (integer_operand) { -+ h1 = s390_isel_int_expr(env, left); -+ } else { -+ h1 = s390_isel_float_expr(env, left); -+ } -+ -+ dst = newVRegF(env); -+ rounding_mode = decode_rounding_mode(expr->Iex.Binop.arg1); -+ addInstr(env, s390_insn_bfp_unop(size, bfpop, dst, h1, rounding_mode)); -+ return dst; -+ } -+ -+ /* --------- UNARY OP --------- */ -+ case Iex_Unop: { -+ IROp op = expr->Iex.Unop.op; -+ IRExpr *left = expr->Iex.Unop.arg; -+ s390_bfp_unop_t bfpop; -+ s390_round_t rounding_mode; -+ HReg h1, dst; -+ -+ if (op == Iop_F128HItoF64 || op == Iop_F128LOtoF64) { -+ HReg dst_hi, dst_lo; -+ -+ s390_isel_float128_expr(&dst_hi, &dst_lo, env, left); -+ return op == Iop_F128LOtoF64 ? dst_lo : dst_hi; -+ } -+ -+ if (op == Iop_ReinterpI64asF64) { -+ dst = newVRegF(env); -+ h1 = s390_isel_int_expr(env, left); /* Process the operand */ -+ addInstr(env, s390_insn_move(size, dst, h1)); -+ -+ return dst; -+ } -+ -+ switch (op) { -+ case Iop_NegF32: -+ case Iop_NegF64: -+ if (left->tag == Iex_Unop && -+ (left->Iex.Unop.op == Iop_AbsF32 || left->Iex.Unop.op == Iop_AbsF64)) -+ bfpop = S390_BFP_NABS; -+ else -+ bfpop = S390_BFP_NEG; -+ break; -+ -+ case Iop_AbsF32: -+ case Iop_AbsF64: bfpop = S390_BFP_ABS; break; -+ case Iop_I32StoF64: bfpop = S390_BFP_I32_TO_F64; break; -+ case Iop_F32toF64: bfpop = S390_BFP_F32_TO_F64; break; -+ default: -+ goto irreducible; -+ } -+ -+ /* Process operand */ -+ if (op == Iop_I32StoF64) -+ h1 = s390_isel_int_expr(env, left); -+ else if (bfpop == S390_BFP_NABS) -+ h1 = s390_isel_float_expr(env, left->Iex.Unop.arg); -+ else -+ h1 = s390_isel_float_expr(env, left); -+ -+ dst = newVRegF(env); -+ rounding_mode = S390_ROUND_NEAREST_EVEN; /* will not be used later on */ -+ addInstr(env, s390_insn_bfp_unop(size, bfpop, dst, h1, rounding_mode)); -+ return dst; -+ } -+ -+ default: -+ goto irreducible; -+ } -+ -+ /* We get here if no pattern matched. */ -+ irreducible: -+ ppIRExpr(expr); -+ vpanic("s390_isel_float_expr: cannot reduce tree"); -+} -+ -+ -+static HReg -+s390_isel_float_expr(ISelEnv *env, IRExpr *expr) -+{ -+ HReg dst = s390_isel_float_expr_wrk(env, expr); -+ -+ /* Sanity checks ... */ -+ vassert(hregClass(dst) == HRcFlt64); -+ vassert(hregIsVirtual(dst)); -+ -+ return dst; -+} -+ -+ -+/*---------------------------------------------------------*/ -+/*--- ISEL: Condition Code ---*/ -+/*---------------------------------------------------------*/ -+ -+/* This function handles all operators that produce a 1-bit result */ -+static s390_cc_t -+s390_isel_cc(ISelEnv *env, IRExpr *cond) -+{ -+ UChar size; -+ -+ vassert(typeOfIRExpr(env->type_env, cond) == Ity_I1); -+ -+ /* Constant: either 1 or 0 */ -+ if (cond->tag == Iex_Const) { -+ vassert(cond->Iex.Const.con->tag == Ico_U1); -+ vassert(cond->Iex.Const.con->Ico.U1 == True -+ || cond->Iex.Const.con->Ico.U1 == False); -+ -+ return cond->Iex.Const.con->Ico.U1 == True ? S390_CC_ALWAYS : S390_CC_NEVER; -+ } -+ -+ /* Variable: values are 1 or 0 */ -+ if (cond->tag == Iex_RdTmp) { -+ IRTemp tmp = cond->Iex.RdTmp.tmp; -+ HReg reg = lookupIRTemp(env, tmp); -+ -+ /* Load-and-test does not modify REG; so this is OK. */ -+ if (typeOfIRTemp(env->type_env, tmp) == Ity_I1) -+ size = 4; -+ else -+ size = sizeofIRType(typeOfIRTemp(env->type_env, tmp)); -+ addInstr(env, s390_insn_test(size, s390_opnd_reg(reg))); -+ return S390_CC_NE; -+ } -+ -+ /* Unary operators */ -+ if (cond->tag == Iex_Unop) { -+ IRExpr *arg = cond->Iex.Unop.arg; -+ -+ switch (cond->Iex.Unop.op) { -+ case Iop_Not1: /* Not1(cond) */ -+ /* Generate code for EXPR, and negate the test condition */ -+ return s390_cc_invert(s390_isel_cc(env, arg)); -+ -+ /* Iop_32/64to1 select the LSB from their operand */ -+ case Iop_32to1: -+ case Iop_64to1: { -+ HReg dst = s390_isel_int_expr(env, arg); -+ -+ size = sizeofIRType(typeOfIRExpr(env->type_env, arg)); -+ -+ addInstr(env, s390_insn_alu(size, S390_ALU_AND, dst, s390_opnd_imm(1))); -+ addInstr(env, s390_insn_test(size, s390_opnd_reg(dst))); -+ return S390_CC_NE; -+ } -+ -+ case Iop_CmpNEZ8: -+ case Iop_CmpNEZ16: { -+ s390_opnd_RMI src; -+ s390_unop_t op; -+ HReg dst; -+ -+ op = (cond->Iex.Unop.op == Iop_CmpNEZ8) ? S390_ZERO_EXTEND_8 -+ : S390_ZERO_EXTEND_16; -+ dst = newVRegI(env); -+ src = s390_isel_int_expr_RMI(env, arg); -+ addInstr(env, s390_insn_unop(4, op, dst, src)); -+ addInstr(env, s390_insn_test(4, s390_opnd_reg(dst))); -+ return S390_CC_NE; -+ } -+ -+ case Iop_CmpNEZ32: -+ case Iop_CmpNEZ64: { -+ s390_opnd_RMI src; -+ -+ src = s390_isel_int_expr_RMI(env, arg); -+ size = sizeofIRType(typeOfIRExpr(env->type_env, arg)); -+ addInstr(env, s390_insn_test(size, src)); -+ return S390_CC_NE; -+ } -+ -+ default: -+ goto fail; -+ } -+ } -+ -+ /* Binary operators */ -+ if (cond->tag == Iex_Binop) { -+ IRExpr *arg1 = cond->Iex.Binop.arg1; -+ IRExpr *arg2 = cond->Iex.Binop.arg2; -+ HReg reg1, reg2; -+ -+ size = sizeofIRType(typeOfIRExpr(env->type_env, arg1)); -+ -+ switch (cond->Iex.Binop.op) { -+ s390_unop_t op; -+ s390_cc_t result; -+ -+ case Iop_CmpEQ8: -+ case Iop_CasCmpEQ8: -+ op = S390_ZERO_EXTEND_8; -+ result = S390_CC_E; -+ goto do_compare_ze; -+ -+ case Iop_CmpNE8: -+ case Iop_CasCmpNE8: -+ op = S390_ZERO_EXTEND_8; -+ result = S390_CC_NE; -+ goto do_compare_ze; -+ -+ case Iop_CmpEQ16: -+ case Iop_CasCmpEQ16: -+ op = S390_ZERO_EXTEND_16; -+ result = S390_CC_E; -+ goto do_compare_ze; -+ -+ case Iop_CmpNE16: -+ case Iop_CasCmpNE16: -+ op = S390_ZERO_EXTEND_16; -+ result = S390_CC_NE; -+ goto do_compare_ze; -+ -+ do_compare_ze: { -+ s390_opnd_RMI op1, op2; -+ -+ op1 = s390_isel_int_expr_RMI(env, arg1); -+ reg1 = newVRegI(env); -+ addInstr(env, s390_insn_unop(4, op, reg1, op1)); -+ -+ op2 = s390_isel_int_expr_RMI(env, arg2); -+ reg2 = newVRegI(env); -+ addInstr(env, s390_insn_unop(4, op, reg2, op2)); /* zero extend */ -+ -+ op2 = s390_opnd_reg(reg2); -+ addInstr(env, s390_insn_compare(4, reg1, op2, False)); -+ -+ return result; -+ } -+ -+ case Iop_CmpEQ32: -+ case Iop_CmpEQ64: -+ case Iop_CasCmpEQ32: -+ case Iop_CasCmpEQ64: -+ result = S390_CC_E; -+ goto do_compare; -+ -+ case Iop_CmpNE32: -+ case Iop_CmpNE64: -+ case Iop_CasCmpNE32: -+ case Iop_CasCmpNE64: -+ result = S390_CC_NE; -+ goto do_compare; -+ -+ do_compare: { -+ HReg op1; -+ s390_opnd_RMI op2; -+ -+ order_commutative_operands(arg1, arg2); -+ -+ op1 = s390_isel_int_expr(env, arg1); -+ op2 = s390_isel_int_expr_RMI(env, arg2); -+ -+ addInstr(env, s390_insn_compare(size, op1, op2, False)); -+ -+ return result; -+ } -+ -+ case Iop_CmpLT32S: -+ case Iop_CmpLE32S: -+ case Iop_CmpLT64S: -+ case Iop_CmpLE64S: { -+ HReg op1; -+ s390_opnd_RMI op2; -+ -+ op1 = s390_isel_int_expr(env, arg1); -+ op2 = s390_isel_int_expr_RMI(env, arg2); -+ -+ addInstr(env, s390_insn_compare(size, op1, op2, True)); -+ -+ return (cond->Iex.Binop.op == Iop_CmpLT32S || -+ cond->Iex.Binop.op == Iop_CmpLT64S) ? S390_CC_L : S390_CC_LE; -+ } -+ -+ case Iop_CmpLT32U: -+ case Iop_CmpLE32U: -+ case Iop_CmpLT64U: -+ case Iop_CmpLE64U: { -+ HReg op1; -+ s390_opnd_RMI op2; -+ -+ op1 = s390_isel_int_expr(env, arg1); -+ op2 = s390_isel_int_expr_RMI(env, arg2); -+ -+ addInstr(env, s390_insn_compare(size, op1, op2, False)); -+ -+ return (cond->Iex.Binop.op == Iop_CmpLT32U || -+ cond->Iex.Binop.op == Iop_CmpLT64U) ? S390_CC_L : S390_CC_LE; -+ } -+ -+ default: -+ goto fail; -+ } -+ } -+ -+ fail: -+ ppIRExpr(cond); -+ vpanic("s390_isel_cc: unexpected operator"); -+} -+ -+ -+/*---------------------------------------------------------*/ -+/*--- ISEL: Statements ---*/ -+/*---------------------------------------------------------*/ -+ -+static void -+s390_isel_stmt(ISelEnv *env, IRStmt *stmt) -+{ -+ if (vex_traceflags & VEX_TRACE_VCODE) { -+ vex_printf("\n -- "); -+ ppIRStmt(stmt); -+ vex_printf("\n"); -+ } -+ -+ switch (stmt->tag) { -+ -+ /* --------- STORE --------- */ -+ case Ist_Store: { -+ IRType tyd = typeOfIRExpr(env->type_env, stmt->Ist.Store.data); -+ s390_amode *am; -+ HReg src; -+ -+ if (stmt->Ist.Store.end != Iend_BE) goto stmt_fail; -+ -+ am = s390_isel_amode(env, stmt->Ist.Store.addr); -+ -+ switch (tyd) { -+ case Ity_I8: -+ case Ity_I16: -+ case Ity_I32: -+ case Ity_I64: -+ src = s390_isel_int_expr(env, stmt->Ist.Store.data); -+ break; -+ -+ case Ity_F32: -+ case Ity_F64: -+ src = s390_isel_float_expr(env, stmt->Ist.Store.data); -+ break; -+ -+ case Ity_F128: -+ /* Cannot occur. No such instruction */ -+ vpanic("Ist_Store with F128 data"); -+ -+ default: -+ goto stmt_fail; -+ } -+ -+ addInstr(env, s390_insn_store(sizeofIRType(tyd), am, src)); -+ return; -+ } -+ -+ /* --------- PUT --------- */ -+ case Ist_Put: { -+ IRType tyd = typeOfIRExpr(env->type_env, stmt->Ist.Put.data); -+ HReg src; -+ s390_amode *am; -+ -+ am = s390_amode_for_guest_state(stmt->Ist.Put.offset); -+ -+ switch (tyd) { -+ case Ity_I8: -+ case Ity_I16: -+ case Ity_I32: -+ case Ity_I64: -+ src = s390_isel_int_expr(env, stmt->Ist.Put.data); -+ break; -+ -+ case Ity_F32: -+ case Ity_F64: -+ src = s390_isel_float_expr(env, stmt->Ist.Put.data); -+ break; -+ -+ case Ity_F128: -+ /* Does not occur. See function put_fpr_pair. */ -+ vpanic("Ist_Put with F128 data"); -+ -+ default: -+ goto stmt_fail; -+ } -+ -+ addInstr(env, s390_insn_store(sizeofIRType(tyd), am, src)); -+ return; -+ } -+ -+ /* --------- TMP --------- */ -+ case Ist_WrTmp: { -+ IRTemp tmp = stmt->Ist.WrTmp.tmp; -+ IRType tyd = typeOfIRTemp(env->type_env, tmp); -+ HReg src, dst; -+ -+ switch (tyd) { -+ case Ity_I128: { -+ HReg dst_hi, dst_lo, res_hi, res_lo; -+ -+ s390_isel_int128_expr(&res_hi, &res_lo, env, stmt->Ist.WrTmp.data); -+ lookupIRTemp128(&dst_hi, &dst_lo, env, tmp); -+ -+ addInstr(env, s390_insn_move(8, dst_hi, res_hi)); -+ addInstr(env, s390_insn_move(8, dst_lo, res_lo)); -+ return; -+ } -+ -+ case Ity_I8: -+ case Ity_I16: -+ case Ity_I32: -+ case Ity_I64: -+ src = s390_isel_int_expr(env, stmt->Ist.WrTmp.data); -+ dst = lookupIRTemp(env, tmp); -+ break; -+ -+ case Ity_I1: { -+ s390_cc_t cond = s390_isel_cc(env, stmt->Ist.WrTmp.data); -+ dst = lookupIRTemp(env, tmp); -+ addInstr(env, s390_insn_cc2bool(dst, cond)); -+ return; -+ } -+ -+ case Ity_F32: -+ case Ity_F64: -+ src = s390_isel_float_expr(env, stmt->Ist.WrTmp.data); -+ dst = lookupIRTemp(env, tmp); -+ break; -+ -+ case Ity_F128: { -+ HReg dst_hi, dst_lo, res_hi, res_lo; -+ -+ s390_isel_float128_expr(&res_hi, &res_lo, env, stmt->Ist.WrTmp.data); -+ lookupIRTemp128(&dst_hi, &dst_lo, env, tmp); -+ -+ addInstr(env, s390_insn_move(8, dst_hi, res_hi)); -+ addInstr(env, s390_insn_move(8, dst_lo, res_lo)); -+ return; -+ } -+ -+ default: -+ goto stmt_fail; -+ } -+ -+ addInstr(env, s390_insn_move(sizeofIRType(tyd), dst, src)); -+ return; -+ } -+ -+ /* --------- Call to DIRTY helper --------- */ -+ case Ist_Dirty: { -+ IRType retty; -+ IRDirty* d = stmt->Ist.Dirty.details; -+ Bool passBBP; -+ -+ if (d->nFxState == 0) -+ vassert(!d->needsBBP); -+ -+ passBBP = toBool(d->nFxState > 0 && d->needsBBP); -+ -+ doHelperCall(env, passBBP, d->guard, d->cee, d->args); -+ -+ /* Now figure out what to do with the returned value, if any. */ -+ if (d->tmp == IRTemp_INVALID) -+ /* No return value. Nothing to do. */ -+ return; -+ -+ retty = typeOfIRTemp(env->type_env, d->tmp); -+ if (retty == Ity_I64 || retty == Ity_I32 -+ || retty == Ity_I16 || retty == Ity_I8) { -+ /* Move the returned value into the return register */ -+ HReg dst = lookupIRTemp(env, d->tmp); -+ addInstr(env, s390_insn_move(sizeofIRType(retty), dst, -+ mkHReg(S390_REGNO_RETURN_VALUE, -+ HRcInt64, False))); -+ return; -+ } -+ break; -+ } -+ -+ case Ist_CAS: -+ if (stmt->Ist.CAS.details->oldHi == IRTemp_INVALID) { -+ IRCAS *cas = stmt->Ist.CAS.details; -+ s390_amode *op2 = s390_isel_amode(env, cas->addr); -+ HReg op3 = s390_isel_int_expr(env, cas->dataLo); /* new value */ -+ HReg op1 = s390_isel_int_expr(env, cas->expdLo); /* expected value */ -+ HReg old = lookupIRTemp(env, cas->oldLo); -+ -+ if (typeOfIRTemp(env->type_env, cas->oldLo) == Ity_I32) { -+ addInstr(env, s390_insn_cas(4, op1, op2, op3, old)); -+ } else { -+ addInstr(env, s390_insn_cas(8, op1, op2, op3, old)); -+ } -+ return; -+ } else { -+ vpanic("compare double and swap not implemented\n"); -+ } -+ break; -+ -+ /* --------- EXIT --------- */ -+ case Ist_Exit: { -+ s390_opnd_RMI dst; -+ s390_cc_t cond; -+ IRConstTag tag = stmt->Ist.Exit.dst->tag; -+ -+ if (tag != Ico_U64) -+ vpanic("s390_isel_stmt: Ist_Exit: dst is not a 64-bit value"); -+ -+ dst = s390_isel_int_expr_RMI(env, IRExpr_Const(stmt->Ist.Exit.dst)); -+ cond = s390_isel_cc(env, stmt->Ist.Exit.guard); -+ addInstr(env, s390_insn_branch(stmt->Ist.Exit.jk, cond, dst)); -+ return; -+ } -+ -+ /* --------- MEM FENCE --------- */ -+ case Ist_MBE: /* fixs390 later */ -+ break; -+ -+ /* --------- Miscellaneous --------- */ -+ -+ case Ist_PutI: /* Not needed */ -+ case Ist_IMark: /* Doesn't generate any executable code */ -+ case Ist_NoOp: /* Doesn't generate any executable code */ -+ case Ist_AbiHint: /* Meaningless in IR */ -+ return; -+ -+ default: -+ break; -+ } -+ -+ stmt_fail: -+ ppIRStmt(stmt); -+ vpanic("s390_isel_stmt"); -+} -+ -+ -+/*---------------------------------------------------------*/ -+/*--- ISEL: Basic block terminators (Nexts) ---*/ -+/*---------------------------------------------------------*/ -+ -+static void -+iselNext(ISelEnv *env, IRExpr *next, IRJumpKind jk) -+{ -+ s390_opnd_RMI dst; -+ -+ if (vex_traceflags & VEX_TRACE_VCODE) { -+ vex_printf("\n-- goto {"); -+ ppIRJumpKind(jk); -+ vex_printf("} "); -+ ppIRExpr(next); -+ vex_printf("\n"); -+ } -+ -+ dst = s390_isel_int_expr_RMI(env, next); -+ addInstr(env, s390_insn_branch(jk, S390_CC_ALWAYS, dst)); -+} -+ -+ -+/*---------------------------------------------------------*/ -+/*--- Insn selector top-level ---*/ -+/*---------------------------------------------------------*/ -+ -+/* Translate an entire SB to s390 code. */ -+ -+HInstrArray * -+iselSB_S390(IRSB *bb, VexArch arch_host, VexArchInfo *archinfo_host, -+ VexAbiInfo *vbi) -+{ -+ UInt i, j; -+ HReg hreg, hregHI; -+ ISelEnv *env; -+ UInt hwcaps_host = archinfo_host->hwcaps; -+ -+ /* KLUDGE: export archinfo_host. */ -+ s390_archinfo_host = archinfo_host; -+ -+ -+ /* Do some sanity checks */ -+ vassert((hwcaps_host & ~(VEX_HWCAPS_S390X_ALL)) == 0); -+ -+ /* Make up an initial environment to use. */ -+ env = LibVEX_Alloc(sizeof(ISelEnv)); -+ env->vreg_ctr = 0; -+ -+ /* Set up output code array. */ -+ env->code = newHInstrArray(); -+ -+ /* Copy BB's type env. */ -+ env->type_env = bb->tyenv; -+ -+ /* Make up an IRTemp -> virtual HReg mapping. This doesn't -+ change as we go along. For some reason types_used has Int type -- but -+ it should be unsigned. Internally we use an unsigned type; so we -+ assert it here. */ -+ vassert(bb->tyenv->types_used >= 0); -+ -+ env->n_vregmap = bb->tyenv->types_used; -+ env->vregmap = LibVEX_Alloc(env->n_vregmap * sizeof(HReg)); -+ env->vregmapHI = LibVEX_Alloc(env->n_vregmap * sizeof(HReg)); -+ -+ /* and finally ... */ -+ env->hwcaps = hwcaps_host; -+ -+ /* For each IR temporary, allocate a suitably-kinded virtual -+ register. */ -+ j = 0; -+ for (i = 0; i < env->n_vregmap; i++) { -+ hregHI = hreg = INVALID_HREG; -+ switch (bb->tyenv->types[i]) { -+ case Ity_I1: -+ case Ity_I8: -+ case Ity_I16: -+ case Ity_I32: -+ hreg = mkHReg(j++, HRcInt64, True); -+ break; -+ -+ case Ity_I64: -+ hreg = mkHReg(j++, HRcInt64, True); -+ break; -+ -+ case Ity_I128: -+ hreg = mkHReg(j++, HRcInt64, True); -+ hregHI = mkHReg(j++, HRcInt64, True); -+ break; -+ -+ case Ity_F32: -+ case Ity_F64: -+ hreg = mkHReg(j++, HRcFlt64, True); -+ break; -+ -+ case Ity_F128: -+ hreg = mkHReg(j++, HRcFlt64, True); -+ hregHI = mkHReg(j++, HRcFlt64, True); -+ break; -+ -+ case Ity_V128: /* fall through */ -+ default: -+ ppIRType(bb->tyenv->types[i]); -+ vpanic("s390_isel_sb: IRTemp type"); -+ } -+ -+ env->vregmap[i] = hreg; -+ env->vregmapHI[i] = hregHI; -+ } -+ env->vreg_ctr = j; -+ -+ /* Ok, finally we can iterate over the statements. */ -+ for (i = 0; i < bb->stmts_used; i++) -+ if (bb->stmts[i]) -+ s390_isel_stmt(env, bb->stmts[i]); -+ -+ iselNext(env, bb->next, bb->jumpkind); -+ -+ /* Record the number of vregs we used. */ -+ env->code->n_vregs = env->vreg_ctr; -+ -+ return env->code; -+} -+ -+/*---------------------------------------------------------------*/ -+/*--- end host_s390_isel.c ---*/ -+/*---------------------------------------------------------------*/ ---- VEX/priv/ir_defs.c -+++ VEX/priv/ir_defs.c -@@ -56,6 +56,7 @@ - case Ity_I128: vex_printf( "I128"); break; - case Ity_F32: vex_printf( "F32"); break; - case Ity_F64: vex_printf( "F64"); break; -+ case Ity_F128: vex_printf( "F128"); break; - case Ity_V128: vex_printf( "V128"); break; - default: vex_printf("ty = 0x%x\n", (Int)ty); - vpanic("ppIRType"); -@@ -64,7 +65,7 @@ - - void ppIRConst ( IRConst* con ) - { -- union { ULong i64; Double f64; } u; -+ union { ULong i64; Double f64; UInt i32; Float f32; } u; - vassert(sizeof(ULong) == sizeof(Double)); - switch (con->tag) { - case Ico_U1: vex_printf( "%d:I1", con->Ico.U1 ? 1 : 0); break; -@@ -72,6 +73,10 @@ - case Ico_U16: vex_printf( "0x%x:I16", (UInt)(con->Ico.U16)); break; - case Ico_U32: vex_printf( "0x%x:I32", (UInt)(con->Ico.U32)); break; - case Ico_U64: vex_printf( "0x%llx:I64", (ULong)(con->Ico.U64)); break; -+ case Ico_F32: u.f32 = con->Ico.F32; -+ vex_printf( "F32{0x%x}", u.i32); -+ break; -+ case Ico_F32i: vex_printf( "F32i{0x%x}", con->Ico.F32i); break; - case Ico_F64: u.f64 = con->Ico.F64; - vex_printf( "F64{0x%llx}", u.i64); - break; -@@ -222,6 +227,8 @@ - case Iop_DivModU128to64: vex_printf("DivModU128to64"); return; - case Iop_DivModS128to64: vex_printf("DivModS128to64"); return; - -+ case Iop_DivModS64to64: vex_printf("DivModS64to64"); return; -+ - case Iop_16HIto8: vex_printf("16HIto8"); return; - case Iop_16to8: vex_printf("16to8"); return; - case Iop_8HLto16: vex_printf("8HLto16"); return; -@@ -238,6 +245,14 @@ - case Iop_128to64: vex_printf("128to64"); return; - case Iop_64HLto128: vex_printf("64HLto128"); return; - -+ case Iop_CmpF32: vex_printf("CmpF32"); return; -+ case Iop_F32toI16S: vex_printf("F32toI16S"); return; -+ case Iop_F32toI32S: vex_printf("F32toI32S"); return; -+ case Iop_F32toI64S: vex_printf("F32toI64S"); return; -+ case Iop_I16StoF32: vex_printf("I16StoF32"); return; -+ case Iop_I32StoF32: vex_printf("I32StoF32"); return; -+ case Iop_I64StoF32: vex_printf("I64StoF32"); return; -+ - case Iop_AddF64: vex_printf("AddF64"); return; - case Iop_SubF64: vex_printf("SubF64"); return; - case Iop_MulF64: vex_printf("MulF64"); return; -@@ -251,6 +266,32 @@ - case Iop_MulF32: vex_printf("MulF32"); return; - case Iop_DivF32: vex_printf("DivF32"); return; - -+ /* 128 bit floating point */ -+ case Iop_AddF128: vex_printf("AddF128"); return; -+ case Iop_SubF128: vex_printf("SubF128"); return; -+ case Iop_MulF128: vex_printf("MulF128"); return; -+ case Iop_DivF128: vex_printf("DivF128"); return; -+ case Iop_AbsF128: vex_printf("AbsF128"); return; -+ case Iop_NegF128: vex_printf("NegF128"); return; -+ case Iop_SqrtF128: vex_printf("SqrtF128"); return; -+ case Iop_CmpF128: vex_printf("CmpF128"); return; -+ -+ case Iop_F64HLtoF128: vex_printf("F64HLtoF128"); return; -+ case Iop_F128HItoF64: vex_printf("F128HItoF64"); return; -+ case Iop_F128LOtoF64: vex_printf("F128LOtoF64"); return; -+ case Iop_I32StoF128: vex_printf("I32StoF128"); return; -+ case Iop_I64StoF128: vex_printf("I64StoF128"); return; -+ case Iop_F128toI32S: vex_printf("F128toI32S"); return; -+ case Iop_F128toI64S: vex_printf("F128toI64S"); return; -+ case Iop_F32toF128: vex_printf("F32toF128"); return; -+ case Iop_F64toF128: vex_printf("F64toF128"); return; -+ case Iop_F128toF64: vex_printf("F128toF64"); return; -+ case Iop_F128toF32: vex_printf("F128toF32"); return; -+ -+ /* s390 specific */ -+ case Iop_MAddF32: vex_printf("s390_MAddF32"); return; -+ case Iop_MSubF32: vex_printf("s390_MSubF32"); return; -+ - case Iop_ScaleF64: vex_printf("ScaleF64"); return; - case Iop_AtanF64: vex_printf("AtanF64"); return; - case Iop_Yl2xF64: vex_printf("Yl2xF64"); return; -@@ -1258,6 +1299,20 @@ - c->Ico.U64 = u64; - return c; - } -+IRConst* IRConst_F32 ( Float f32 ) -+{ -+ IRConst* c = LibVEX_Alloc(sizeof(IRConst)); -+ c->tag = Ico_F32; -+ c->Ico.F32 = f32; -+ return c; -+} -+IRConst* IRConst_F32i ( UInt f32i ) -+{ -+ IRConst* c = LibVEX_Alloc(sizeof(IRConst)); -+ c->tag = Ico_F32i; -+ c->Ico.F32i = f32i; -+ return c; -+} - IRConst* IRConst_F64 ( Double f64 ) - { - IRConst* c = LibVEX_Alloc(sizeof(IRConst)); -@@ -1706,6 +1761,8 @@ - case Ico_U16: return IRConst_U16(c->Ico.U16); - case Ico_U32: return IRConst_U32(c->Ico.U32); - case Ico_U64: return IRConst_U64(c->Ico.U64); -+ case Ico_F32: return IRConst_F32(c->Ico.F32); -+ case Ico_F32i: return IRConst_F32i(c->Ico.F32i); - case Ico_F64: return IRConst_F64(c->Ico.F64); - case Ico_F64i: return IRConst_F64i(c->Ico.F64i); - case Ico_V128: return IRConst_V128(c->Ico.V128); -@@ -2108,6 +2165,9 @@ - case Iop_DivModU128to64: case Iop_DivModS128to64: - BINARY(Ity_I128,Ity_I64, Ity_I128); - -+ case Iop_DivModS64to64: -+ BINARY(Ity_I64,Ity_I64, Ity_I128); -+ - case Iop_16HIto8: case Iop_16to8: - UNARY(Ity_I16, Ity_I8); - case Iop_8HLto16: -@@ -2184,9 +2244,15 @@ - case Iop_RoundF32toInt: - BINARY(ity_RMode,Ity_F32, Ity_F32); - -+ case Iop_CmpF32: -+ BINARY(Ity_F32,Ity_F32, Ity_I32); -+ - case Iop_CmpF64: - BINARY(Ity_F64,Ity_F64, Ity_I32); - -+ case Iop_CmpF128: -+ BINARY(Ity_F128,Ity_F128, Ity_I32); -+ - case Iop_F64toI16S: BINARY(ity_RMode,Ity_F64, Ity_I16); - case Iop_F64toI32S: BINARY(ity_RMode,Ity_F64, Ity_I32); - case Iop_F64toI64S: BINARY(ity_RMode,Ity_F64, Ity_I64); -@@ -2199,6 +2265,14 @@ - - case Iop_I32UtoF64: UNARY(Ity_I32, Ity_F64); - -+ case Iop_F32toI16S: BINARY(ity_RMode,Ity_F32, Ity_I16); -+ case Iop_F32toI32S: BINARY(ity_RMode,Ity_F32, Ity_I32); -+ case Iop_F32toI64S: BINARY(ity_RMode,Ity_F32, Ity_I64); -+ -+ case Iop_I16StoF32: UNARY(Ity_I16, Ity_F32); -+ case Iop_I32StoF32: BINARY(ity_RMode,Ity_I32, Ity_F32); -+ case Iop_I64StoF32: BINARY(ity_RMode,Ity_I64, Ity_F32); -+ - case Iop_F32toF64: UNARY(Ity_F32, Ity_F64); - case Iop_F64toF32: BINARY(ity_RMode,Ity_F64, Ity_F32); - -@@ -2438,6 +2512,43 @@ - case Iop_QDMulLong16Sx4: case Iop_QDMulLong32Sx2: - BINARY(Ity_I64, Ity_I64, Ity_V128); - -+ /* s390 specific */ -+ case Iop_MAddF32: -+ case Iop_MSubF32: -+ QUATERNARY(ity_RMode,Ity_F32,Ity_F32,Ity_F32, Ity_F32); -+ -+ case Iop_F64HLtoF128: -+ BINARY(Ity_F64,Ity_F64, Ity_F128); -+ -+ case Iop_F128HItoF64: -+ case Iop_F128LOtoF64: -+ UNARY(Ity_F128, Ity_F64); -+ -+ case Iop_AddF128: -+ case Iop_SubF128: -+ case Iop_MulF128: -+ case Iop_DivF128: -+ TERNARY(ity_RMode,Ity_F128,Ity_F128, Ity_F128); -+ -+ case Iop_NegF128: -+ case Iop_AbsF128: -+ UNARY(Ity_F128, Ity_F128); -+ -+ case Iop_SqrtF128: -+ BINARY(ity_RMode,Ity_F128, Ity_F128); -+ -+ case Iop_I32StoF128: UNARY(Ity_I32, Ity_F128); -+ case Iop_I64StoF128: UNARY(Ity_I64, Ity_F128); -+ -+ case Iop_F128toI32S: BINARY(ity_RMode,Ity_F128, Ity_I32); -+ case Iop_F128toI64S: BINARY(ity_RMode,Ity_F128, Ity_I64); -+ -+ case Iop_F32toF128: UNARY(Ity_F32, Ity_F128); -+ case Iop_F64toF128: UNARY(Ity_F64, Ity_F128); -+ -+ case Iop_F128toF32: BINARY(ity_RMode,Ity_F128, Ity_F32); -+ case Iop_F128toF64: BINARY(ity_RMode,Ity_F128, Ity_F64); -+ - default: - ppIROp(op); - vpanic("typeOfPrimop"); -@@ -2520,6 +2631,8 @@ - case Ico_U16: return Ity_I16; - case Ico_U32: return Ity_I32; - case Ico_U64: return Ity_I64; -+ case Ico_F32: return Ity_F32; -+ case Ico_F32i: return Ity_F32; - case Ico_F64: return Ity_F64; - case Ico_F64i: return Ity_F64; - case Ico_V128: return Ity_V128; -@@ -2579,7 +2692,7 @@ - case Ity_INVALID: case Ity_I1: - case Ity_I8: case Ity_I16: case Ity_I32: - case Ity_I64: case Ity_I128: -- case Ity_F32: case Ity_F64: -+ case Ity_F32: case Ity_F64: case Ity_F128: - case Ity_V128: - return True; - default: -@@ -3415,6 +3528,8 @@ - case Ico_U16: return toBool( c1->Ico.U16 == c2->Ico.U16 ); - case Ico_U32: return toBool( c1->Ico.U32 == c2->Ico.U32 ); - case Ico_U64: return toBool( c1->Ico.U64 == c2->Ico.U64 ); -+ case Ico_F32: return toBool( c1->Ico.F32 == c2->Ico.F32 ); -+ case Ico_F32i: return toBool( c1->Ico.F32i == c2->Ico.F32i ); - case Ico_F64: return toBool( c1->Ico.F64 == c2->Ico.F64 ); - case Ico_F64i: return toBool( c1->Ico.F64i == c2->Ico.F64i ); - case Ico_V128: return toBool( c1->Ico.V128 == c2->Ico.V128 ); -@@ -3439,6 +3554,7 @@ - case Ity_I128: return 16; - case Ity_F32: return 4; - case Ity_F64: return 8; -+ case Ity_F128: return 16; - case Ity_V128: return 16; - default: vex_printf("\n"); ppIRType(ty); vex_printf("\n"); - vpanic("sizeofIRType"); ---- VEX/priv/ir_opt.c -+++ VEX/priv/ir_opt.c -@@ -4506,7 +4506,7 @@ - case Ity_I1: case Ity_I8: case Ity_I16: - case Ity_I32: case Ity_I64: case Ity_I128: - break; -- case Ity_F32: case Ity_F64: case Ity_V128: -+ case Ity_F32: case Ity_F64: case Ity_F128: case Ity_V128: - *hasVorFtemps = True; - break; - default: ---- VEX/priv/main_main.c -+++ VEX/priv/main_main.c -@@ -40,6 +40,7 @@ - #include "libvex_guest_arm.h" - #include "libvex_guest_ppc32.h" - #include "libvex_guest_ppc64.h" -+#include "libvex_guest_s390x.h" - - #include "main_globals.h" - #include "main_util.h" -@@ -50,12 +51,14 @@ - #include "host_amd64_defs.h" - #include "host_ppc_defs.h" - #include "host_arm_defs.h" -+#include "host_s390_defs.h" - - #include "guest_generic_bb_to_IR.h" - #include "guest_x86_defs.h" - #include "guest_amd64_defs.h" - #include "guest_arm_defs.h" - #include "guest_ppc_defs.h" -+#include "guest_s390_defs.h" - - #include "host_generic_simd128.h" - -@@ -195,7 +198,7 @@ - HInstrArray* rcode; - Int i, j, k, out_used, guest_sizeB; - Int offB_TISTART, offB_TILEN; -- UChar insn_bytes[32]; -+ UChar insn_bytes[48]; - IRType guest_word_type; - IRType host_word_type; - Bool mode64; -@@ -316,6 +319,25 @@ - vassert(vta->dispatch == NULL); /* return-to-dispatcher scheme */ - break; - -+ case VexArchS390X: -+ mode64 = True; -+ getAllocableRegs_S390 ( &n_available_real_regs, -+ &available_real_regs, mode64 ); -+ isMove = (Bool(*)(HInstr*,HReg*,HReg*)) isMove_S390Instr; -+ getRegUsage = (void(*)(HRegUsage*,HInstr*, Bool)) getRegUsage_S390Instr; -+ mapRegs = (void(*)(HRegRemap*,HInstr*, Bool)) mapRegs_S390Instr; -+ genSpill = (void(*)(HInstr**,HInstr**,HReg,Int,Bool)) genSpill_S390; -+ genReload = (void(*)(HInstr**,HInstr**,HReg,Int,Bool)) genReload_S390; -+ ppInstr = (void(*)(HInstr*, Bool)) ppS390Instr; -+ ppReg = (void(*)(HReg)) ppHRegS390; -+ iselSB = iselSB_S390; -+ emit = (Int(*)(UChar*,Int,HInstr*,Bool,void*)) emit_S390Instr; -+ host_is_bigendian = True; -+ host_word_type = Ity_I64; -+ vassert(are_valid_hwcaps(VexArchS390X, vta->archinfo_host.hwcaps)); -+ vassert(vta->dispatch == NULL); /* return-to-dispatcher scheme */ -+ break; -+ - case VexArchARM: - mode64 = False; - getAllocableRegs_ARM ( &n_available_real_regs, -@@ -407,6 +429,22 @@ - vassert(sizeof( ((VexGuestPPC64State*)0)->guest_NRADDR_GPR2) == 8); - break; - -+ case VexArchS390X: -+ preciseMemExnsFn = guest_s390x_state_requires_precise_mem_exns; -+ disInstrFn = disInstr_S390; -+ specHelper = guest_s390x_spechelper; -+ guest_sizeB = sizeof(VexGuestS390XState); -+ guest_word_type = Ity_I64; -+ guest_layout = &s390xGuest_layout; -+ offB_TISTART = offsetof(VexGuestS390XState,guest_TISTART); -+ offB_TILEN = offsetof(VexGuestS390XState,guest_TILEN); -+ vassert(are_valid_hwcaps(VexArchS390X, vta->archinfo_guest.hwcaps)); -+ vassert(0 == sizeof(VexGuestS390XState) % 16); -+ vassert(sizeof( ((VexGuestS390XState*)0)->guest_TISTART ) == 8); -+ vassert(sizeof( ((VexGuestS390XState*)0)->guest_TILEN ) == 8); -+ vassert(sizeof( ((VexGuestS390XState*)0)->guest_NRADDR ) == 8); -+ break; -+ - case VexArchARM: - preciseMemExnsFn = guest_arm_state_requires_precise_mem_exns; - disInstrFn = disInstr_ARM; -@@ -644,7 +682,8 @@ - ppInstr(rcode->arr[i], mode64); - vex_printf("\n"); - } -- j = (*emit)( insn_bytes, 32, rcode->arr[i], mode64, vta->dispatch ); -+ j = (*emit)( insn_bytes, sizeof insn_bytes, rcode->arr[i], mode64, -+ vta->dispatch ); - if (vex_traceflags & VEX_TRACE_ASM) { - for (k = 0; k < j; k++) - if (insn_bytes[k] < 16) -@@ -716,6 +755,7 @@ - case VexArchARM: return "ARM"; - case VexArchPPC32: return "PPC32"; - case VexArchPPC64: return "PPC64"; -+ case VexArchS390X: return "S390X"; - default: return "VexArch???"; - } - } -@@ -887,6 +927,25 @@ - return NULL; - } - -+static HChar* show_hwcaps_s390x ( UInt hwcaps ) -+{ -+ const UInt LD = VEX_HWCAPS_S390X_LDISP; -+ const UInt EI = VEX_HWCAPS_S390X_EIMM; -+ const UInt GE = VEX_HWCAPS_S390X_GIE; -+ const UInt DF = VEX_HWCAPS_S390X_DFP; -+ -+ if (hwcaps == (LD)) return "s390x-ldisp"; -+ if (hwcaps == (LD|EI)) return "s390x-ldisp-eimm"; -+ if (hwcaps == (LD|GE)) return "s390x-ldisp-gie"; -+ if (hwcaps == (LD|DF)) return "s390x-ldisp-dfp"; -+ if (hwcaps == (LD|EI|GE)) return "s390x-ldisp-eimm-gie"; -+ if (hwcaps == (LD|EI|DF)) return "s390x-ldisp-eimm-dfp"; -+ if (hwcaps == (LD|GE|DF)) return "s390x-ldisp-gie-dfp"; -+ if (hwcaps == (LD|EI|GE|DF)) return "s390x-ldisp-eimm-gie-dfp"; -+ -+ return NULL; -+} -+ - /* ---- */ - static HChar* show_hwcaps ( VexArch arch, UInt hwcaps ) - { -@@ -896,6 +955,7 @@ - case VexArchPPC32: return show_hwcaps_ppc32(hwcaps); - case VexArchPPC64: return show_hwcaps_ppc64(hwcaps); - case VexArchARM: return show_hwcaps_arm(hwcaps); -+ case VexArchS390X: return show_hwcaps_s390x(hwcaps); - default: return NULL; - } - } ---- VEX/pub/libvex_basictypes.h -+++ VEX/pub/libvex_basictypes.h -@@ -151,6 +151,9 @@ - #elif defined(_AIX) && defined(__64BIT__) - # define VEX_HOST_WORDSIZE 8 - -+#elif defined(__s390x__) -+# define VEX_HOST_WORDSIZE 8 -+ - #else - # error "Vex: Fatal: Can't establish the host architecture" - #endif ---- VEX/pub/libvex_guest_s390x.h -+++ VEX/pub/libvex_guest_s390x.h -@@ -0,0 +1,174 @@ -+/* -*- mode: C; c-basic-offset: 3; -*- */ -+ -+/*---------------------------------------------------------------*/ -+/*--- begin libvex_guest_s390x.h ---*/ -+/*---------------------------------------------------------------*/ -+ -+/* -+ This file is part of Valgrind, a dynamic binary instrumentation -+ framework. -+ -+ Copyright IBM Corp. 2010,2011 -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA -+ 02110-1301, USA. -+ -+ The GNU General Public License is contained in the file COPYING. -+*/ -+ -+#ifndef __LIBVEX_PUB_GUEST_S390X_H -+#define __LIBVEX_PUB_GUEST_S390X_H -+ -+#include "libvex_basictypes.h" -+#include "libvex_emwarn.h" -+ -+/*------------------------------------------------------------*/ -+/*--- Vex's representation of the s390 CPU state. ---*/ -+/*------------------------------------------------------------*/ -+ -+typedef struct { -+ -+/*------------------------------------------------------------*/ -+/*--- ar registers ---*/ -+/*------------------------------------------------------------*/ -+ -+ /* 0 */ UInt guest_a0; -+ /* 4 */ UInt guest_a1; -+ /* 8 */ UInt guest_a2; -+ /* 12 */ UInt guest_a3; -+ /* 16 */ UInt guest_a4; -+ /* 20 */ UInt guest_a5; -+ /* 24 */ UInt guest_a6; -+ /* 28 */ UInt guest_a7; -+ /* 32 */ UInt guest_a8; -+ /* 36 */ UInt guest_a9; -+ /* 40 */ UInt guest_a10; -+ /* 44 */ UInt guest_a11; -+ /* 48 */ UInt guest_a12; -+ /* 52 */ UInt guest_a13; -+ /* 56 */ UInt guest_a14; -+ /* 60 */ UInt guest_a15; -+ -+/*------------------------------------------------------------*/ -+/*--- fpr registers ---*/ -+/*------------------------------------------------------------*/ -+ -+ /* 64 */ ULong guest_f0; -+ /* 72 */ ULong guest_f1; -+ /* 80 */ ULong guest_f2; -+ /* 88 */ ULong guest_f3; -+ /* 96 */ ULong guest_f4; -+ /* 104 */ ULong guest_f5; -+ /* 112 */ ULong guest_f6; -+ /* 120 */ ULong guest_f7; -+ /* 128 */ ULong guest_f8; -+ /* 136 */ ULong guest_f9; -+ /* 144 */ ULong guest_f10; -+ /* 152 */ ULong guest_f11; -+ /* 160 */ ULong guest_f12; -+ /* 168 */ ULong guest_f13; -+ /* 176 */ ULong guest_f14; -+ /* 184 */ ULong guest_f15; -+ -+/*------------------------------------------------------------*/ -+/*--- gpr registers ---*/ -+/*------------------------------------------------------------*/ -+ -+ /* 192 */ ULong guest_r0; -+ /* 200 */ ULong guest_r1; -+ /* 208 */ ULong guest_r2; -+ /* 216 */ ULong guest_r3; -+ /* 224 */ ULong guest_r4; -+ /* 232 */ ULong guest_r5; -+ /* 240 */ ULong guest_r6; -+ /* 248 */ ULong guest_r7; -+ /* 256 */ ULong guest_r8; -+ /* 264 */ ULong guest_r9; -+ /* 272 */ ULong guest_r10; -+ /* 280 */ ULong guest_r11; -+ /* 288 */ ULong guest_r12; -+ /* 296 */ ULong guest_r13; -+ /* 304 */ ULong guest_r14; -+ /* 312 */ ULong guest_r15; -+ -+/*------------------------------------------------------------*/ -+/*--- S390 miscellaneous registers ---*/ -+/*------------------------------------------------------------*/ -+ -+ /* 320 */ ULong guest_counter; -+ /* 328 */ UInt guest_fpc; -+ /* 4-byte hole to enforce alignment requirements */ -+ /* 336 */ ULong guest_IA; -+ -+/*------------------------------------------------------------*/ -+/*--- S390 pseudo registers ---*/ -+/*------------------------------------------------------------*/ -+ -+ /* 344 */ ULong guest_SYSNO; -+ -+/*------------------------------------------------------------*/ -+/*--- 4-word thunk used to calculate the condition code ---*/ -+/*------------------------------------------------------------*/ -+ -+ /* 352 */ ULong guest_CC_OP; -+ /* 360 */ ULong guest_CC_DEP1; -+ /* 368 */ ULong guest_CC_DEP2; -+ /* 376 */ ULong guest_CC_NDEP; -+ -+/*------------------------------------------------------------*/ -+/*--- Pseudo registers. Required by all architectures ---*/ -+/*------------------------------------------------------------*/ -+ -+ /* See comments at bottom of libvex.h */ -+ /* 384 */ ULong guest_NRADDR; -+ /* 392 */ ULong guest_TISTART; -+ /* 400 */ ULong guest_TILEN; -+ -+ /* Used when backing up to restart a syscall that has -+ been interrupted by a signal. See also comment in -+ libvex_ir.h */ -+ /* 408 */ ULong guest_IP_AT_SYSCALL; -+ -+ /* Emulation warnings; see comments in libvex_emwarn.h */ -+ /* 416 */ UInt guest_EMWARN; -+ -+/*------------------------------------------------------------*/ -+/*--- Force alignment to 16 bytes ---*/ -+/*------------------------------------------------------------*/ -+ /* 420 */ UChar padding[12]; -+ -+ /* 432 */ /* This is the size of the guest state */ -+} VexGuestS390XState; -+ -+ -+/*------------------------------------------------------------*/ -+/*--- Function prototypes ---*/ -+/*------------------------------------------------------------*/ -+ -+void LibVEX_GuestS390X_initialise(VexGuestS390XState *); -+ -+/*------------------------------------------------------------*/ -+/*--- Dedicated registers ---*/ -+/*------------------------------------------------------------*/ -+ -+#define guest_LR guest_r14 /* Link register */ -+#define guest_SP guest_r15 /* Stack pointer */ -+#define guest_FP guest_r11 /* Frame pointer */ -+ -+/*---------------------------------------------------------------*/ -+/*--- end libvex_guest_s390x.h ---*/ -+/*---------------------------------------------------------------*/ -+ -+#endif /* __LIBVEX_PUB_GUEST_S390X_H */ ---- VEX/pub/libvex.h -+++ VEX/pub/libvex.h -@@ -56,7 +56,8 @@ - VexArchAMD64, - VexArchARM, - VexArchPPC32, -- VexArchPPC64 -+ VexArchPPC64, -+ VexArchS390X - } - VexArch; - -@@ -93,6 +94,18 @@ - #define VEX_HWCAPS_PPC64_GX (1<<14) /* Graphics extns - (fres,frsqrte,fsel,stfiwx) */ - -+/* s390x: baseline capability is z/Architecture with long displacement */ -+#define VEX_HWCAPS_S390X_LDISP (1<<13) /* Long-displacement facility */ -+#define VEX_HWCAPS_S390X_EIMM (1<<14) /* Extended-immediate facility */ -+#define VEX_HWCAPS_S390X_GIE (1<<15) /* General-instruction-extension -+ facility */ -+#define VEX_HWCAPS_S390X_DFP (1<<16) /* Decimal floating point facility */ -+/* Special value representing all available s390x hwcaps */ -+#define VEX_HWCAPS_S390X_ALL (VEX_HWCAPS_S390X_LDISP | \ -+ VEX_HWCAPS_S390X_EIMM | \ -+ VEX_HWCAPS_S390X_GIE | \ -+ VEX_HWCAPS_S390X_DFP) -+ - /* arm: baseline capability is ARMv4 */ - /* Bits 5:0 - architecture level (e.g. 5 for v5, 6 for v6 etc) */ - #define VEX_HWCAPS_ARM_VFP (1<<6) /* VFP extension */ ---- VEX/pub/libvex_ir.h -+++ VEX/pub/libvex_ir.h -@@ -227,6 +227,7 @@ - Ity_I128, /* 128-bit scalar */ - Ity_F32, /* IEEE 754 float */ - Ity_F64, /* IEEE 754 double */ -+ Ity_F128, /* 128-bit floating point; implementation defined */ - Ity_V128 /* 128-bit SIMD */ - } - IRType; -@@ -261,6 +262,9 @@ - Ico_U16, - Ico_U32, - Ico_U64, -+ Ico_F32, /* 32-bit IEEE754 floating */ -+ Ico_F32i, /* 32-bit unsigned int to be interpreted literally -+ as a IEEE754 single value. */ - Ico_F64, /* 64-bit IEEE754 floating */ - Ico_F64i, /* 64-bit unsigned int to be interpreted literally - as a IEEE754 double value. */ -@@ -282,6 +286,8 @@ - UShort U16; - UInt U32; - ULong U64; -+ Float F32; -+ UInt F32i; - Double F64; - ULong F64i; - UShort V128; /* 16-bit value; see Ico_V128 comment above */ -@@ -295,6 +301,8 @@ - extern IRConst* IRConst_U16 ( UShort ); - extern IRConst* IRConst_U32 ( UInt ); - extern IRConst* IRConst_U64 ( ULong ); -+extern IRConst* IRConst_F32 ( Float ); -+extern IRConst* IRConst_F32i ( UInt ); - extern IRConst* IRConst_F64 ( Double ); - extern IRConst* IRConst_F64i ( ULong ); - extern IRConst* IRConst_V128 ( UShort ); -@@ -469,6 +477,9 @@ - // of which lo half is div and hi half is mod - Iop_DivModS128to64, // ditto, signed - -+ Iop_DivModS64to64, // :: I64,I64 -> I128 -+ // of which lo half is div and hi half is mod -+ - /* Integer conversions. Some of these are redundant (eg - Iop_64to8 is the same as Iop_64to32 and then Iop_32to8), but - having a complete set reduces the typical dynamic size of IR -@@ -552,6 +563,8 @@ - */ - /* :: F64 x F64 -> IRCmpF64Result(I32) */ - Iop_CmpF64, -+ Iop_CmpF32, -+ Iop_CmpF128, - - /* --- Int to/from FP conversions. --- */ - -@@ -606,6 +619,14 @@ - - Iop_I32UtoF64, /* unsigned I32 -> F64 */ - -+ Iop_F32toI16S, /* IRRoundingMode(I32) x F32 -> signed I16 */ -+ Iop_F32toI32S, /* IRRoundingMode(I32) x F32 -> signed I32 */ -+ Iop_F32toI64S, /* IRRoundingMode(I32) x F32 -> signed I64 */ -+ -+ Iop_I16StoF32, /* signed I16 -> F32 */ -+ Iop_I32StoF32, /* IRRoundingMode(I32) x signed I32 -> F32 */ -+ Iop_I64StoF32, /* IRRoundingMode(I32) x signed I64 -> F32 */ -+ - /* Conversion between floating point formats */ - Iop_F32toF64, /* F32 -> F64 */ - Iop_F64toF32, /* IRRoundingMode(I32) x F64 -> F32 */ -@@ -615,6 +636,30 @@ - Iop_ReinterpF64asI64, Iop_ReinterpI64asF64, - Iop_ReinterpF32asI32, Iop_ReinterpI32asF32, - -+ /* Support for 128-bit floating point */ -+ Iop_F64HLtoF128,/* (high half of F128,low half of F128) -> F128 */ -+ Iop_F128HItoF64,/* F128 -> high half of F128 into a F64 register */ -+ Iop_F128LOtoF64,/* F128 -> low half of F128 into a F64 register */ -+ -+ /* :: IRRoundingMode(I32) x F128 x F128 -> F128 */ -+ Iop_AddF128, Iop_SubF128, Iop_MulF128, Iop_DivF128, -+ -+ /* :: F128 -> F128 */ -+ Iop_NegF128, Iop_AbsF128, -+ -+ /* :: IRRoundingMode(I32) x F128 -> F128 */ -+ Iop_SqrtF128, -+ -+ Iop_I32StoF128, /* signed I32 -> F128 */ -+ Iop_I64StoF128, /* signed I64 -> F128 */ -+ Iop_F32toF128, /* F32 -> F128 */ -+ Iop_F64toF128, /* F64 -> F128 */ -+ -+ Iop_F128toI32S, /* IRRoundingMode(I32) x F128 -> signed I32 */ -+ Iop_F128toI64S, /* IRRoundingMode(I32) x F128 -> signed I64 */ -+ Iop_F128toF64, /* IRRoundingMode(I32) x F128 -> F64 */ -+ Iop_F128toF32, /* IRRoundingMode(I32) x F128 -> F32 */ -+ - /* --- guest x86/amd64 specifics, not mandated by 754. --- */ - - /* Binary ops, with rounding. */ -@@ -642,11 +687,19 @@ - Iop_RoundF32toInt, /* F32 value to nearest integral value (still - as F32) */ - -+ /* --- guest s390 specifics, not mandated by 754. --- */ -+ -+ /* Fused multiply-add/sub */ -+ /* :: IRRoundingMode(I32) x F32 x F32 x F32 -> F32 -+ (computes op3 * op2 +/- op1 */ -+ Iop_MAddF32, Iop_MSubF32, -+ - /* --- guest ppc32/64 specifics, not mandated by 754. --- */ - - /* Ternary operations, with rounding. */ - /* Fused multiply-add/sub, with 112-bit intermediate -- precision */ -+ precision for ppc. -+ Also used to implement fused multiply-add/sub for s390. */ - /* :: IRRoundingMode(I32) x F64 x F64 x F64 -> F64 - (computes arg2 * arg3 +/- arg4) */ - Iop_MAddF64, Iop_MSubF64, -@@ -1228,6 +1281,8 @@ - } - IRCmpF64Result; - -+typedef IRCmpF64Result IRCmpF32Result; -+typedef IRCmpF64Result IRCmpF128Result; - - /* ------------------ Expressions ------------------ */ - ---- VEX/pub/libvex_s390x.h -+++ VEX/pub/libvex_s390x.h -@@ -0,0 +1,61 @@ -+/* -*- mode: C; c-basic-offset: 3; -*- */ -+ -+#ifndef __LIBVEX_PUB_S390X_H -+#define __LIBVEX_PUB_S390X_H -+ -+/* This file includes definitions for s390. -+ -+ It must be suitable for inclusion in assembler source files. */ -+ -+ -+/*--------------------------------------------------------------*/ -+/*--- Dedicated registers ---*/ -+/*--------------------------------------------------------------*/ -+ -+#define S390_REGNO_RETURN_VALUE 2 -+#define S390_REGNO_DISPATCH_CTR 12 /* Holds VG_(dispatch_ctr) */ -+#define S390_REGNO_GUEST_STATE_POINTER 13 -+#define S390_REGNO_LINK_REGISTER 14 -+#define S390_REGNO_STACK_POINTER 15 -+ -+ -+/*--------------------------------------------------------------*/ -+/*--- Offsets in the stack frame allocated by the dispatcher ---*/ -+/*--------------------------------------------------------------*/ -+ -+/* Where client's FPC register is saved. */ -+#define S390_OFFSET_SAVED_FPC_C 160+88 -+ -+/* Where valgrind's FPC register is saved. */ -+#define S390_OFFSET_SAVED_FPC_V 160+80 -+ -+/* Where client code will save the link register before calling a helper. */ -+#define S390_OFFSET_SAVED_LR 160+72 -+ -+/* Location of saved guest state pointer */ -+#define S390_OFFSET_SAVED_GSP 160+64 -+ -+/* Size of frame allocated by VG_(run_innerloop) -+ Need size for -+ 8 FPRs -+ + 2 GPRs (SAVED_GSP and SAVED_LR) -+ + 2 FPCs (SAVED_FPC_C and SAVED_FPC_V). -+ -+ Additionally, we need a standard frame for helper functions being called -+ from client code. (See figure 1-16 in zSeries ABI) */ -+#define S390_INNERLOOP_FRAME_SIZE ((8+2+2)*8 + 160) -+ -+ -+/*--------------------------------------------------------------*/ -+/*--- Miscellaneous ---*/ -+/*--------------------------------------------------------------*/ -+ -+/* Number of arguments that can be passed in registers */ -+#define S390_NUM_GPRPARMS 5 -+ -+ -+/*--------------------------------------------------------------------*/ -+/*--- libvex_s390x.h ---*/ -+/*--------------------------------------------------------------------*/ -+ -+#endif /* __LIBVEX_PUB_S390X_H */ diff --git a/valgrind-3.6.1-kernel3.patch b/valgrind-3.6.1-kernel3.patch deleted file mode 100644 index 15bb5c6..0000000 --- a/valgrind-3.6.1-kernel3.patch +++ /dev/null @@ -1,15 +0,0 @@ ---- configure.in -+++ configure.in -@@ -225,9 +225,9 @@ case "${host_os}" in - kernel=`uname -r` - - case "${kernel}" in -- 2.6.*) -- AC_MSG_RESULT([2.6 family (${kernel})]) -- AC_DEFINE([KERNEL_2_6], 1, [Define to 1 if you're using Linux 2.6.x]) -+ 2.6.*|3.*) -+ AC_MSG_RESULT([2.6.x/3.x family (${kernel})]) -+ AC_DEFINE([KERNEL_2_6], 1, [Define to 1 if you're using Linux 2.6.x or Linux 3.x]) - ;; - - 2.4.*) diff --git a/valgrind-3.6.1.tar.bz2 b/valgrind-3.6.1.tar.bz2 deleted file mode 100644 index bbd00c2..0000000 --- a/valgrind-3.6.1.tar.bz2 +++ /dev/null @@ -1,3 +0,0 @@ -version https://git-lfs.github.com/spec/v1 -oid sha256:49bdcc4fbcf060049b5f0dcfd8a187a6e90e0b0e57309f633b64e44430726a0e -size 5974836 diff --git a/valgrind-3.7.0.tar.bz2 b/valgrind-3.7.0.tar.bz2 new file mode 100644 index 0000000..de16982 --- /dev/null +++ b/valgrind-3.7.0.tar.bz2 @@ -0,0 +1,3 @@ +version https://git-lfs.github.com/spec/v1 +oid sha256:5d62c0330f1481fe2c593249192fa68ff454c19c34343978cc9ce91aa324cbf6 +size 6624216 diff --git a/valgrind-r11643.diff b/valgrind-r11643.diff deleted file mode 100644 index 1115a1c..0000000 --- a/valgrind-r11643.diff +++ /dev/null @@ -1,20 +0,0 @@ ------------------------------------------------------------------------- -r11643 | sewardj | 2011-03-14 10:53:44 +0100 (Mo, 14. Mär 2011) | 3 Zeilen - -Build fix for older s390x-linux assemblers. Fixes #264800. -(Florian Krohm, britzel@acm.org) - ------------------------------------------------------------------------- -Index: helgrind/tests/tc03_re_excl.c -=================================================================== ---- helgrind/tests/tc03_re_excl.c (Revision 11642) -+++ helgrind/tests/tc03_re_excl.c (Revision 11643) -@@ -10,7 +10,7 @@ - /* A simple function to "use" a value, so that gcc can't - possibly optimise it into nothing. */ - static void use ( int x ) { -- __asm__ __volatile__( "nop" : : "r"(x) : "cc","memory" ); -+ __asm__ __volatile__( "" : : "r"(x) : "cc","memory" ); - } - - static void* worker_thread ( void* argV ) diff --git a/valgrind-r11644.diff b/valgrind-r11644.diff deleted file mode 100644 index a822ff9..0000000 --- a/valgrind-r11644.diff +++ /dev/null @@ -1,35 +0,0 @@ ------------------------------------------------------------------------- -r11644 | sewardj | 2011-03-15 09:13:08 +0100 (Di, 15. Mär 2011) | 3 Zeilen - -Some fixes for the faultstatus testcase. Fixes #253206. -(Christian Borntraeger, borntraeger@de.ibm.com) - ------------------------------------------------------------------------- -Index: none/tests/faultstatus.c -=================================================================== ---- none/tests/faultstatus.c (Revision 11643) -+++ none/tests/faultstatus.c (Revision 11644) -@@ -70,7 +70,13 @@ static int testcode(int code, int want) - - static int testaddr(void *addr, volatile void *want) - { -+ /* Some architectures (e.g. s390) just provide enough information to -+ resolve the page fault, but do not provide the offset within a page */ -+#if defined(__s390__) -+ if (addr != (void *) ((unsigned long) want & ~0xffful)) { -+#else - if (addr != want) { -+#endif - fprintf(stderr, " FAIL: expected si_addr==%p, not %p\n", want, addr); - return 0; - } -@@ -132,7 +138,8 @@ int main() - for(i = 0; i < sizeof(sigs)/sizeof(*sigs); i++) - sigaction(sigs[i], &sa, NULL); - -- fd = open("faultstatus.tmp", O_CREAT|O_TRUNC|O_EXCL, 0600); -+ /* we need O_RDWR for the truncate below */ -+ fd = open("faultstatus.tmp", O_CREAT|O_TRUNC|O_EXCL|O_RDWR, 0600); - if (fd == -1) { - perror("tmpfile"); - exit(1); diff --git a/valgrind-vex-r2106.diff b/valgrind-vex-r2106.diff deleted file mode 100644 index d4977c8..0000000 --- a/valgrind-vex-r2106.diff +++ /dev/null @@ -1,62 +0,0 @@ ------------------------------------------------------------------------- -r2106 | sewardj | 2011-03-07 19:34:34 +0100 (Mo, 07. Mär 2011) | 4 Zeilen - -Add folding rules for Clz32 and Clz64. See bug 243404 comment 52. -(Florian Krohn, britzel@acm.org). - - ------------------------------------------------------------------------- ---- priv/ir_opt.c -+++ priv/ir_opt.c -@@ -956,6 +956,31 @@ static IRExpr* mkOnesOfPrimopResultType - } - } - -+/* Helpers for folding Clz32/64. */ -+static UInt fold_Clz64 ( ULong value ) -+{ -+ UInt i; -+ vassert(value != 0ULL); /* no defined semantics for arg==0 */ -+ for (i = 0; i < 64; ++i) { -+ if (value & (((ULong)1) << (63 - i))) return i; -+ } -+ vassert(0); -+ /*NOTREACHED*/ -+ return 0; -+} -+ -+static UInt fold_Clz32 ( UInt value ) -+{ -+ UInt i; -+ vassert(value != 0); /* no defined semantics for arg==0 */ -+ for (i = 0; i < 32; ++i) { -+ if (value & (((UInt)1) << (31 - i))) return i; -+ } -+ vassert(0); -+ /*NOTREACHED*/ -+ return 0; -+} -+ - - static IRExpr* fold_Expr ( IRExpr* e ) - { -@@ -1154,6 +1179,19 @@ static IRExpr* fold_Expr ( IRExpr* e ) - break; - } - -+ case Iop_Clz32: { -+ UInt u32 = e->Iex.Unop.arg->Iex.Const.con->Ico.U32; -+ if (u32 != 0) -+ e2 = IRExpr_Const(IRConst_U32(fold_Clz32(u32))); -+ break; -+ } -+ case Iop_Clz64: { -+ ULong u64 = e->Iex.Unop.arg->Iex.Const.con->Ico.U64; -+ if (u64 != 0ULL) -+ e2 = IRExpr_Const(IRConst_U64(fold_Clz64(u64))); -+ break; -+ } -+ - default: - goto unhandled; - } diff --git a/valgrind-vex-r2109.diff b/valgrind-vex-r2109.diff deleted file mode 100644 index 3b8cbb3..0000000 --- a/valgrind-vex-r2109.diff +++ /dev/null @@ -1,28 +0,0 @@ ---- pub/libvex.h -+++ pub/libvex.h -@@ -381,15 +381,25 @@ - /* Initialise the library. You must call this first. */ - - extern void LibVEX_Init ( -+ - /* failure exit function */ -+# if __cplusplus == 1 && __GNUC__ && __GNUC__ <= 3 -+ /* g++ 3.x doesn't understand attributes on function parameters. -+ See #265762. */ -+# else - __attribute__ ((noreturn)) -+# endif - void (*failure_exit) ( void ), -+ - /* logging output function */ - void (*log_bytes) ( HChar*, Int nbytes ), -+ - /* debug paranoia level */ - Int debuglevel, -+ - /* Are we supporting valgrind checking? */ - Bool valgrind_support, -+ - /* Control ... */ - /*READONLY*/VexControl* vcon - ); diff --git a/valgrind.changes b/valgrind.changes index 4b9c3b7..b3a372a 100644 --- a/valgrind.changes +++ b/valgrind.changes @@ -1,3 +1,25 @@ +------------------------------------------------------------------- +Wed Nov 9 20:01:00 CET 2011 - dmueller@suse.de + +- update to 3.7.0 (bnc#724215): + * Support for IBM z/Architecture (s390x) running Linux. Valgrind can + analyse 64-bit programs running on z/Architecture. Most user space + instructions up to and including z10 are supported. + See README.s390 for more details. + * Support for the IBM Power ISA 2.06 (Power7 instructions) + * Further solidification of support for SSE 4.2 in 64-bit mode + * Memcheck: + * - reduction of memory use in some circumstances + * - improved handling of freed memory for finding more errors + * - fix of a longstanding bug that could cause false negatives + * Helgrind: + * - Helgrind: performance improvements and major memory use reductions + * GDB server: Valgrind now has an embedded GDB server. That means it + is possible to control a Valgrind run from GDB, doing all the usual + things that GDB can do (single stepping, breakpoints, examining + data, etc). Tool-specific functionality is also available. + * Over 160 bugs have been fixed. + ------------------------------------------------------------------- Tue Oct 25 01:14:42 CEST 2011 - ro@suse.de diff --git a/valgrind.spec b/valgrind.spec index 6e9d8f4..9e4ccfb 100644 --- a/valgrind.spec +++ b/valgrind.spec @@ -27,32 +27,12 @@ License: GPLv2+ Group: Development/Tools/Debuggers Summary: Memory Management Debugger BuildRoot: %{_tmppath}/%{name}-%{version}-build -Version: 3.6.1 -Release: 11 +Version: 3.7.0 +Release: 1 Source0: %{name}-%{version}.tar.bz2 # svn di svn://svn.valgrind.org/valgrind/tags/VALGRIND_3_5_0 svn://svn.valgrind.org/valgrind/branches/VALGRIND_3_5_BRANCH > 3_5_BRANCH.diff # svn di svn://svn.valgrind.org/vex/tags/VEX_3_5_0 svn://svn.valgrind.org/vex/branches/VEX_3_5_BRANCH > VEX_3_5_BRANCH.diff Patch1: jit-register-unregister.diff -Patch3: valgrind-3.6.0.svn11566-s390x-port.diff -Patch5: valgrind-vex-r2109.diff -Patch6: valgrind-r11644.diff -Patch7: valgrind-r11643.diff -Patch8: valgrind-vex-r2106.diff -Patch9: vg_bug259977_r11687.patch -Patch10: vg_bug259977_r11688.patch -Patch11: vg_bug259977_r11689.patch -Patch12: vg_bug259977_r11690.patch -Patch14: vg_bug270794_r11697.patch -Patch15: vg_bug271042_r11699.patch -Patch16: vg_bug271043_r11700.patch -Patch17: vg_bug271043_r11765.patch -Patch41: vg_bug267630_r2127.patch -Patch42: vg_bug270851_r2130.patch -Patch43: vg_bug270856_r2136.patch -Patch44: vg_bug270851_r2148.patch -Patch45: valgrind-3.6.1-kernel3.patch -Patch46: glibc-2.14.diff -Patch47: valgrind_r12002.diff # during building the major version of glibc is built into the suppression file %define glibc_main_version %(getconf GNU_LIBC_VERSION | cut -d' ' -f2 | cut -d. -f1) %define glibc_major_version %(getconf GNU_LIBC_VERSION | cut -d' ' -f2 | cut -d. -f2) @@ -149,31 +129,8 @@ Authors: %prep %setup -q -n %{name}-%{version} cd VEX -%patch5 -%patch8 cd .. %patch1 -#%ifarch s390x -%patch3 -#%endif -%patch6 -%patch7 -%patch9 -%patch10 -%patch11 -%patch12 -%patch14 -%patch15 -%patch16 -%patch17 - -%patch41 -%patch42 -%patch43 -%patch44 -%patch45 -%patch46 -%patch47 %build %ifarch %arm @@ -230,6 +187,43 @@ cp -a README* NEWS AUTHORS COPYING COPYING.DOCS $RPM_BUILD_ROOT/%_defaultdocdir/ %endif %_libdir/valgrind/*-linux.so %_libdir/valgrind/*.supp +%_libdir/valgrind/32bit-core.xml +%_libdir/valgrind/32bit-linux.xml +%_libdir/valgrind/32bit-sse.xml +%_libdir/valgrind/64bit-core.xml +%_libdir/valgrind/64bit-linux.xml +%_libdir/valgrind/64bit-sse.xml +%_libdir/valgrind/32bit-core-valgrind-s*.xml +%_libdir/valgrind/32bit-linux-valgrind-s*.xml +%_libdir/valgrind/32bit-sse-valgrind-s*.xml +%_libdir/valgrind/64bit-core-valgrind-s*.xml +%_libdir/valgrind/64bit-linux-valgrind-s*.xml +%_libdir/valgrind/64bit-sse-valgrind-s*.xml +%_libdir/valgrind/amd64-coresse-valgrind.xml +%_libdir/valgrind/amd64-linux-valgrind.xml +%_libdir/valgrind/arm-core-valgrind-s*.xml +%_libdir/valgrind/arm-core.xml +%_libdir/valgrind/arm-vfpv3-valgrind-s*.xml +%_libdir/valgrind/arm-vfpv3.xml +%_libdir/valgrind/arm-with-vfpv3-valgrind.xml +%_libdir/valgrind/arm-with-vfpv3.xml +%_libdir/valgrind/i386-coresse-valgrind.xml +%_libdir/valgrind/i386-linux-valgrind.xml +%_libdir/valgrind/power-altivec-valgrind-s*.xml +%_libdir/valgrind/power-altivec.xml +%_libdir/valgrind/power-core.xml +%_libdir/valgrind/power-fpu-valgrind-s*.xml +%_libdir/valgrind/power-fpu.xml +%_libdir/valgrind/power-linux-valgrind-s*.xml +%_libdir/valgrind/power-linux.xml +%_libdir/valgrind/power64-core-valgrind-s*.xml +%_libdir/valgrind/power64-core.xml +%_libdir/valgrind/power64-linux-valgrind-s*.xml +%_libdir/valgrind/power64-linux.xml +%_libdir/valgrind/powerpc-altivec32l-valgrind.xml +%_libdir/valgrind/powerpc-altivec32l.xml +%_libdir/valgrind/powerpc-altivec64l-valgrind.xml +%_libdir/valgrind/powerpc-altivec64l.xml %if %suse_version > 1100 diff --git a/valgrind_r12002.diff b/valgrind_r12002.diff deleted file mode 100644 index 2080c1d..0000000 --- a/valgrind_r12002.diff +++ /dev/null @@ -1,59 +0,0 @@ ------------------------------------------------------------------------- -r12002 | dirk | 2011-08-23 22:29:10 +0200 (Tue, 23 Aug 2011) | 2 lines -Changed paths: - M /trunk/glibc-2.X.supp.in - -fix the suppressions to also match libc-2.XX.y.so - ------------------------------------------------------------------------- -Index: glibc-2.X.supp.in -=================================================================== ---- glibc-2.X.supp.in (revision 12001) -+++ glibc-2.X.supp.in (revision 12002) -@@ -168,9 +168,9 @@ - Memcheck:Param - socketcall.sendto(msg) - fun:__sendto_nocancel -- obj:/*libc-@GLIBC_VERSION@.so -- obj:/*libc-@GLIBC_VERSION@.so -- obj:/*libc-@GLIBC_VERSION@.so -+ obj:/*libc-@GLIBC_VERSION@*.so -+ obj:/*libc-@GLIBC_VERSION@*.so -+ obj:/*libc-@GLIBC_VERSION@*.so - } - { - glibc24-64bit-padding-1c -@@ -180,7 +180,7 @@ - fun:__nscd_get_map_ref - fun:nscd_get*_r - fun:*nscd* -- obj:/*libc-@GLIBC_VERSION@.so -+ obj:/*libc-@GLIBC_VERSION@*.so - } - - -@@ -199,18 +199,18 @@ - Memcheck:Param - socketcall.sendto(msg) - fun:send -- obj:/*libc-@GLIBC_VERSION@.so -- obj:/*libc-@GLIBC_VERSION@.so -- obj:/*libc-@GLIBC_VERSION@.so -+ obj:/*libc-@GLIBC_VERSION@*.so -+ obj:/*libc-@GLIBC_VERSION@*.so -+ obj:/*libc-@GLIBC_VERSION@*.so - } - { - X11-64bit-padding-4b - Memcheck:Param - socketcall.send(msg) - fun:send -- obj:/*libc-@GLIBC_VERSION@.so -- obj:/*libc-@GLIBC_VERSION@.so -- obj:/*libc-@GLIBC_VERSION@.so -+ obj:/*libc-@GLIBC_VERSION@*.so -+ obj:/*libc-@GLIBC_VERSION@*.so -+ obj:/*libc-@GLIBC_VERSION@*.so - } - - ##----------------------------------------------------------------------## diff --git a/vg_bug259977_r11687.patch b/vg_bug259977_r11687.patch deleted file mode 100644 index daf8d49..0000000 --- a/vg_bug259977_r11687.patch +++ /dev/null @@ -1,918 +0,0 @@ -Index: memcheck/mc_leakcheck.c -=================================================================== ---- memcheck/mc_leakcheck.c.orig -+++ memcheck/mc_leakcheck.c -@@ -43,12 +43,11 @@ - #include "pub_tool_options.h" - #include "pub_tool_oset.h" - #include "pub_tool_signals.h" -+#include "pub_tool_libcsetjmp.h" // setjmp facilities - #include "pub_tool_tooliface.h" // Needed for mc_include.h - - #include "mc_include.h" - --#include // For jmp_buf -- - /*------------------------------------------------------------*/ - /*--- An overview of leak checking. ---*/ - /*------------------------------------------------------------*/ -@@ -636,7 +635,7 @@ lc_push_if_a_chunk_ptr(Addr ptr, Int cli - } - - --static jmp_buf memscan_jmpbuf; -+static VG_MINIMAL_JMP_BUF memscan_jmpbuf; - - static - void scan_all_valid_memory_catcher ( Int sigNo, Addr addr ) -@@ -644,7 +643,7 @@ void scan_all_valid_memory_catcher ( Int - if (0) - VG_(printf)("OUCH! sig=%d addr=%#lx\n", sigNo, addr); - if (sigNo == VKI_SIGSEGV || sigNo == VKI_SIGBUS) -- __builtin_longjmp(memscan_jmpbuf, 1); -+ VG_MINIMAL_LONGJMP(memscan_jmpbuf); - } - - // Scan a block of memory between [start, start+len). This range may -@@ -686,7 +685,7 @@ lc_scan_memory(Addr start, SizeT len, Bo - } - } - -- if (__builtin_setjmp(memscan_jmpbuf) == 0) { -+ if (VG_MINIMAL_SETJMP(memscan_jmpbuf) == 0) { - if ( MC_(is_valid_aligned_word)(ptr) ) { - lc_scanned_szB += sizeof(Addr); - addr = *(Addr *)ptr; -Index: include/pub_tool_libcsetjmp.h -=================================================================== ---- /dev/null -+++ include/pub_tool_libcsetjmp.h -@@ -0,0 +1,76 @@ -+ -+/*--------------------------------------------------------------------*/ -+/*--- A minimal setjmp/longjmp facility. pub_tool_libcsetjmp.h ---*/ -+/*--------------------------------------------------------------------*/ -+ -+/* -+ This file is part of Valgrind, a dynamic binary instrumentation -+ framework. -+ -+ Copyright (C) 2010-2010 Mozilla Inc -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA -+ 02111-1307, USA. -+ -+ The GNU General Public License is contained in the file COPYING. -+*/ -+ -+/* Contributed by Julian Seward */ -+ -+#ifndef __PUB_TOOL_LIBCSETJMP_H -+#define __PUB_TOOL_LIBCSETJMP_H -+ -+//-------------------------------------------------------------------- -+// PURPOSE: Provides a minimal setjmp/longjmp facility, that saves/ -+// restores integer registers, but not necessarily anything more. -+//-------------------------------------------------------------------- -+ -+ -+/* This provides an extremely minimal setjmp/longjmp facility, in -+ which only the host's integer registers are saved/restored. Or at -+ least, that is the minimal guaranteed functionality. -+ -+ Until Apr 2011 we used __builtin_setjmp and __builtin_longjmp, but -+ it appears that that is not always correctly implemented. See -+ https://bugs.kde.org/show_bug.cgi?id=259977. So this module wraps -+ those functions up and facilitates replacing them with our own -+ implementations where necessary. -+*/ -+ -+/* --- !!! --- EXTERNAL HEADERS start --- !!! --- */ -+#include -+/* --- !!! --- EXTERNAL HEADERS end --- !!! --- */ -+ -+ -+/* Don't use jmp_buf, __builtin_setjmp or __builtin_longjmp directly. -+ They don't always work reliably. Instead use these macros, which -+ provide the opportunity to supply alternative implementations as -+ necessary. -+ -+ Note that the abstraction is done with macros (ick) rather than -+ functions and typedefs, since wrapping __builtin_setjmp up in a -+ second function (eg, VG_(minimal_setjmp)) doesn't seem to work for -+ whatever reason -- returns via a VG_(minimal_longjmp) go wrong. -+*/ -+#define VG_MINIMAL_JMP_BUF jmp_buf -+#define VG_MINIMAL_SETJMP(_env) __builtin_setjmp((_env)) -+#define VG_MINIMAL_LONGJMP(_env) __builtin_longjmp((_env),1) -+ -+ -+#endif // __PUB_TOOL_LIBCSETJMP_H -+ -+/*--------------------------------------------------------------------*/ -+/*--- end pub_tool_libcsetjmp.h ---*/ -+/*--------------------------------------------------------------------*/ -Index: include/Makefile.am -=================================================================== ---- include/Makefile.am.orig -+++ include/Makefile.am -@@ -18,6 +18,7 @@ nobase_pkginclude_HEADERS = \ - pub_tool_libcfile.h \ - pub_tool_libcprint.h \ - pub_tool_libcproc.h \ -+ pub_tool_libcsetjmp.h \ - pub_tool_libcsignal.h \ - pub_tool_machine.h \ - pub_tool_mallocfree.h \ -Index: coregrind/m_translate.c -=================================================================== ---- coregrind/m_translate.c.orig -+++ coregrind/m_translate.c -@@ -53,6 +53,7 @@ - #include "pub_core_dispatch.h" // VG_(run_innerloop__dispatch_{un}profiled) - // VG_(run_a_noredir_translation__return_point) - -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" // VexGuestArchState - #include "pub_core_trampoline.h" // VG_(ppctoc_magic_redirect_return_stub) - -Index: coregrind/m_sigframe/sigframe-s390x-linux.c -=================================================================== ---- coregrind/m_sigframe/sigframe-s390x-linux.c.orig -+++ coregrind/m_sigframe/sigframe-s390x-linux.c -@@ -33,6 +33,7 @@ - #include "pub_core_basics.h" - #include "pub_core_vki.h" - #include "pub_core_vkiscnums.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_aspacemgr.h" - #include "pub_core_libcbase.h" -Index: coregrind/m_sigframe/sigframe-ppc32-linux.c -=================================================================== ---- coregrind/m_sigframe/sigframe-ppc32-linux.c.orig -+++ coregrind/m_sigframe/sigframe-ppc32-linux.c -@@ -36,6 +36,7 @@ - #include "pub_core_basics.h" - #include "pub_core_vki.h" - #include "pub_core_vkiscnums.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_aspacemgr.h" - #include "pub_core_libcbase.h" -Index: coregrind/m_sigframe/sigframe-amd64-linux.c -=================================================================== ---- coregrind/m_sigframe/sigframe-amd64-linux.c.orig -+++ coregrind/m_sigframe/sigframe-amd64-linux.c -@@ -33,6 +33,7 @@ - - #include "pub_core_basics.h" - #include "pub_core_vki.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_aspacemgr.h" - #include "pub_core_libcbase.h" -Index: coregrind/m_sigframe/sigframe-ppc64-linux.c -=================================================================== ---- coregrind/m_sigframe/sigframe-ppc64-linux.c.orig -+++ coregrind/m_sigframe/sigframe-ppc64-linux.c -@@ -36,6 +36,7 @@ - #include "pub_core_basics.h" - #include "pub_core_vki.h" - #include "pub_core_vkiscnums.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_aspacemgr.h" - #include "pub_core_libcbase.h" -Index: coregrind/m_sigframe/sigframe-arm-linux.c -=================================================================== ---- coregrind/m_sigframe/sigframe-arm-linux.c.orig -+++ coregrind/m_sigframe/sigframe-arm-linux.c -@@ -38,6 +38,7 @@ - #include "pub_core_basics.h" - #include "pub_core_vki.h" - #include "pub_core_vkiscnums.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_aspacemgr.h" - #include "pub_core_libcbase.h" -Index: coregrind/m_sigframe/sigframe-x86-linux.c -=================================================================== ---- coregrind/m_sigframe/sigframe-x86-linux.c.orig -+++ coregrind/m_sigframe/sigframe-x86-linux.c -@@ -33,6 +33,7 @@ - - #include "pub_core_basics.h" - #include "pub_core_vki.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_aspacemgr.h" /* find_segment */ - #include "pub_core_libcbase.h" -Index: coregrind/m_execontext.c -=================================================================== ---- coregrind/m_execontext.c.orig -+++ coregrind/m_execontext.c -@@ -37,6 +37,7 @@ - #include "pub_core_stacktrace.h" - #include "pub_core_machine.h" // VG_(get_IP) - #include "pub_core_vki.h" // To keep pub_core_threadstate.h happy -+#include "pub_core_libcsetjmp.h" // Ditto - #include "pub_core_threadstate.h" // VG_(is_valid_tid) - #include "pub_core_execontext.h" // self - -Index: coregrind/m_syswrap/syswrap-ppc64-linux.c -=================================================================== ---- coregrind/m_syswrap/syswrap-ppc64-linux.c.orig -+++ coregrind/m_syswrap/syswrap-ppc64-linux.c -@@ -33,6 +33,7 @@ - #include "pub_core_basics.h" - #include "pub_core_vki.h" - #include "pub_core_vkiscnums.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_aspacemgr.h" - #include "pub_core_debuglog.h" -Index: coregrind/m_syswrap/syswrap-linux.c -=================================================================== ---- coregrind/m_syswrap/syswrap-linux.c.orig -+++ coregrind/m_syswrap/syswrap-linux.c -@@ -33,6 +33,7 @@ - #include "pub_core_basics.h" - #include "pub_core_vki.h" - #include "pub_core_vkiscnums.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_aspacemgr.h" - #include "pub_core_debuginfo.h" // VG_(di_notify_*) -Index: coregrind/m_syswrap/syswrap-amd64-linux.c -=================================================================== ---- coregrind/m_syswrap/syswrap-amd64-linux.c.orig -+++ coregrind/m_syswrap/syswrap-amd64-linux.c -@@ -33,6 +33,7 @@ - #include "pub_core_basics.h" - #include "pub_core_vki.h" - #include "pub_core_vkiscnums.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_aspacemgr.h" - #include "pub_core_debuglog.h" -Index: coregrind/m_syswrap/syswrap-arm-linux.c -=================================================================== ---- coregrind/m_syswrap/syswrap-arm-linux.c.orig -+++ coregrind/m_syswrap/syswrap-arm-linux.c -@@ -35,6 +35,7 @@ - #include "pub_core_basics.h" - #include "pub_core_vki.h" - #include "pub_core_vkiscnums.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_aspacemgr.h" - #include "pub_core_debuglog.h" -Index: coregrind/m_syswrap/syswrap-generic.c -=================================================================== ---- coregrind/m_syswrap/syswrap-generic.c.orig -+++ coregrind/m_syswrap/syswrap-generic.c -@@ -34,6 +34,7 @@ - #include "pub_core_basics.h" - #include "pub_core_vki.h" - #include "pub_core_vkiscnums.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_debuginfo.h" // VG_(di_notify_*) - #include "pub_core_aspacemgr.h" -Index: coregrind/m_syswrap/syswrap-ppc32-linux.c -=================================================================== ---- coregrind/m_syswrap/syswrap-ppc32-linux.c.orig -+++ coregrind/m_syswrap/syswrap-ppc32-linux.c -@@ -33,6 +33,7 @@ - #include "pub_core_basics.h" - #include "pub_core_vki.h" - #include "pub_core_vkiscnums.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_aspacemgr.h" - #include "pub_core_debuglog.h" -Index: coregrind/m_syswrap/syswrap-x86-linux.c -=================================================================== ---- coregrind/m_syswrap/syswrap-x86-linux.c.orig -+++ coregrind/m_syswrap/syswrap-x86-linux.c -@@ -38,6 +38,7 @@ - #include "pub_core_basics.h" - #include "pub_core_vki.h" - #include "pub_core_vkiscnums.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_aspacemgr.h" - #include "pub_core_debuglog.h" -Index: coregrind/m_syswrap/syswrap-s390x-linux.c -=================================================================== ---- coregrind/m_syswrap/syswrap-s390x-linux.c.orig -+++ coregrind/m_syswrap/syswrap-s390x-linux.c -@@ -34,6 +34,7 @@ - #include "pub_core_basics.h" - #include "pub_core_vki.h" - #include "pub_core_vkiscnums.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_aspacemgr.h" - #include "pub_core_debuglog.h" -Index: coregrind/m_syswrap/syswrap-main.c -=================================================================== ---- coregrind/m_syswrap/syswrap-main.c.orig -+++ coregrind/m_syswrap/syswrap-main.c -@@ -34,6 +34,7 @@ - #include "pub_core_aspacemgr.h" - #include "pub_core_vki.h" - #include "pub_core_vkiscnums.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_libcbase.h" - #include "pub_core_libcassert.h" -@@ -2266,7 +2267,7 @@ void ML_(wqthread_continue_NORETURN)(Thr - sci->status.what = SsIdle; - - vg_assert(tst->sched_jmpbuf_valid); -- __builtin_longjmp(tst->sched_jmpbuf, True); -+ VG_MINIMAL_LONGJMP(tst->sched_jmpbuf, True); - - /* NOTREACHED */ - vg_assert(0); -Index: coregrind/m_syswrap/syswrap-linux-variants.c -=================================================================== ---- coregrind/m_syswrap/syswrap-linux-variants.c.orig -+++ coregrind/m_syswrap/syswrap-linux-variants.c -@@ -48,6 +48,7 @@ - - #include "pub_core_basics.h" - #include "pub_core_vki.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_aspacemgr.h" - #include "pub_core_debuginfo.h" // VG_(di_notify_*) -Index: coregrind/m_libcassert.c -=================================================================== ---- coregrind/m_libcassert.c.orig -+++ coregrind/m_libcassert.c -@@ -31,6 +31,7 @@ - #include "pub_core_basics.h" - #include "pub_core_vki.h" - #include "pub_core_vkiscnums.h" -+#include "pub_core_libcsetjmp.h" // to keep threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_libcbase.h" - #include "pub_core_libcassert.h" -Index: coregrind/m_libcsetjmp.c -=================================================================== ---- /dev/null -+++ coregrind/m_libcsetjmp.c -@@ -0,0 +1,44 @@ -+ -+/*--------------------------------------------------------------------*/ -+/*--- A minimal setjmp/longjmp implementation. m_libcsetjmp.c ---*/ -+/*--------------------------------------------------------------------*/ -+ -+/* -+ This file is part of Valgrind, a dynamic binary instrumentation -+ framework. -+ -+ Copyright (C) 2010-2010 Mozilla Inc -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA -+ 02111-1307, USA. -+ -+ The GNU General Public License is contained in the file COPYING. -+*/ -+ -+/* Contributed by Julian Seward */ -+ -+ -+#include "pub_core_basics.h" -+#include "pub_core_libcsetjmp.h" /* self */ -+ -+ -+/* See include/pub_tool_libcsetjmp.h for background and rationale. */ -+ -+/* No alternative implementations at present. */ -+ -+ -+/*--------------------------------------------------------------------*/ -+/*--- end ---*/ -+/*--------------------------------------------------------------------*/ -Index: coregrind/m_errormgr.c -=================================================================== ---- coregrind/m_errormgr.c.orig -+++ coregrind/m_errormgr.c -@@ -30,6 +30,7 @@ - - #include "pub_core_basics.h" - #include "pub_core_vki.h" -+#include "pub_core_libcsetjmp.h" - #include "pub_core_threadstate.h" // For VG_N_THREADS - #include "pub_core_debugger.h" - #include "pub_core_debuginfo.h" -Index: coregrind/m_machine.c -=================================================================== ---- coregrind/m_machine.c.orig -+++ coregrind/m_machine.c -@@ -30,6 +30,7 @@ - - #include "pub_core_basics.h" - #include "pub_core_vki.h" -+#include "pub_core_libcsetjmp.h" // setjmp facilities - #include "pub_core_threadstate.h" - #include "pub_core_libcassert.h" - #include "pub_core_libcbase.h" -@@ -418,11 +419,14 @@ Int VG_(machine_arm_archlevel) = 4; - /* fixs390: anything for s390x here ? */ - - /* For hwcaps detection on ppc32/64 and arm we'll need to do SIGILL -- testing, so we need a jmp_buf. */ --#if defined(VGA_ppc32) || defined(VGA_ppc64) || defined(VGA_arm) || defined(VGA_s390x) --#include // For jmp_buf --static jmp_buf env_unsup_insn; --static void handler_unsup_insn ( Int x ) { __builtin_longjmp(env_unsup_insn,1); } -+ testing, so we need a VG_MINIMAL_JMP_BUF. */ -+#if defined(VGA_ppc32) || defined(VGA_ppc64) \ -+ || defined(VGA_arm) || defined(VGA_s390x) -+#include "pub_tool_libcsetjmp.h" -+static VG_MINIMAL_JMP_BUF env_unsup_insn; -+static void handler_unsup_insn ( Int x ) { -+ VG_MINIMAL_LONGJMP(env_unsup_insn); -+} - #endif - - -@@ -462,7 +466,7 @@ static void find_ppc_dcbz_sz(VexArchInfo - vg_assert(dcbz_szB == 32 || dcbz_szB == 64 || dcbz_szB == 128); - - /* dcbzl clears 128B on G5/PPC970, and usually 32B on other platforms */ -- if (__builtin_setjmp(env_unsup_insn)) { -+ if (VG_MINIMAL_SETJMP(env_unsup_insn)) { - dcbzl_szB = 0; /* indicates unsupported */ - } - else { -@@ -692,7 +696,7 @@ Bool VG_(machine_get_hwcaps)( void ) - - /* standard FP insns */ - have_F = True; -- if (__builtin_setjmp(env_unsup_insn)) { -+ if (VG_MINIMAL_SETJMP(env_unsup_insn)) { - have_F = False; - } else { - __asm__ __volatile__(".long 0xFC000090"); /*fmr 0,0 */ -@@ -700,7 +704,7 @@ Bool VG_(machine_get_hwcaps)( void ) - - /* Altivec insns */ - have_V = True; -- if (__builtin_setjmp(env_unsup_insn)) { -+ if (VG_MINIMAL_SETJMP(env_unsup_insn)) { - have_V = False; - } else { - /* Unfortunately some older assemblers don't speak Altivec (or -@@ -713,7 +717,7 @@ Bool VG_(machine_get_hwcaps)( void ) - - /* General-Purpose optional (fsqrt, fsqrts) */ - have_FX = True; -- if (__builtin_setjmp(env_unsup_insn)) { -+ if (VG_MINIMAL_SETJMP(env_unsup_insn)) { - have_FX = False; - } else { - __asm__ __volatile__(".long 0xFC00002C"); /*fsqrt 0,0 */ -@@ -721,7 +725,7 @@ Bool VG_(machine_get_hwcaps)( void ) - - /* Graphics optional (stfiwx, fres, frsqrte, fsel) */ - have_GX = True; -- if (__builtin_setjmp(env_unsup_insn)) { -+ if (VG_MINIMAL_SETJMP(env_unsup_insn)) { - have_GX = False; - } else { - __asm__ __volatile__(".long 0xFC000034"); /* frsqrte 0,0 */ -@@ -811,7 +815,7 @@ Bool VG_(machine_get_hwcaps)( void ) - - /* standard FP insns */ - have_F = True; -- if (__builtin_setjmp(env_unsup_insn)) { -+ if (VG_MINIMAL_SETJMP(env_unsup_insn)) { - have_F = False; - } else { - __asm__ __volatile__("fmr 0,0"); -@@ -819,7 +823,7 @@ Bool VG_(machine_get_hwcaps)( void ) - - /* Altivec insns */ - have_V = True; -- if (__builtin_setjmp(env_unsup_insn)) { -+ if (VG_MINIMAL_SETJMP(env_unsup_insn)) { - have_V = False; - } else { - __asm__ __volatile__(".long 0x10000484"); /*vor 0,0,0*/ -@@ -827,7 +831,7 @@ Bool VG_(machine_get_hwcaps)( void ) - - /* General-Purpose optional (fsqrt, fsqrts) */ - have_FX = True; -- if (__builtin_setjmp(env_unsup_insn)) { -+ if (VG_MINIMAL_SETJMP(env_unsup_insn)) { - have_FX = False; - } else { - __asm__ __volatile__(".long 0xFC00002C"); /*fsqrt 0,0*/ -@@ -835,7 +839,7 @@ Bool VG_(machine_get_hwcaps)( void ) - - /* Graphics optional (stfiwx, fres, frsqrte, fsel) */ - have_GX = True; -- if (__builtin_setjmp(env_unsup_insn)) { -+ if (VG_MINIMAL_SETJMP(env_unsup_insn)) { - have_GX = False; - } else { - __asm__ __volatile__(".long 0xFC000034"); /*frsqrte 0,0*/ -@@ -902,7 +906,7 @@ Bool VG_(machine_get_hwcaps)( void ) - is not supported on z900. */ - - have_LDISP = True; -- if (__builtin_setjmp(env_unsup_insn)) { -+ if (VG_MINIMAL_SETJMP(env_unsup_insn)) { - have_LDISP = False; - } else { - /* BASR loads the address of the next insn into r1. Needed to avoid -@@ -913,7 +917,7 @@ Bool VG_(machine_get_hwcaps)( void ) - } - - have_EIMM = True; -- if (__builtin_setjmp(env_unsup_insn)) { -+ if (VG_MINIMAL_SETJMP(env_unsup_insn)) { - have_EIMM = False; - } else { - __asm__ __volatile__(".long 0xc0090000\n\t" /* iilf r0,0 */ -@@ -921,7 +925,7 @@ Bool VG_(machine_get_hwcaps)( void ) - } - - have_GIE = True; -- if (__builtin_setjmp(env_unsup_insn)) { -+ if (VG_MINIMAL_SETJMP(env_unsup_insn)) { - have_GIE = False; - } else { - __asm__ __volatile__(".long 0xc2010000\n\t" /* msfi r0,0 */ -@@ -929,7 +933,7 @@ Bool VG_(machine_get_hwcaps)( void ) - } - - have_DFP = True; -- if (__builtin_setjmp(env_unsup_insn)) { -+ if (VG_MINIMAL_SETJMP(env_unsup_insn)) { - have_DFP = False; - } else { - __asm__ __volatile__(".long 0xb3d20000" -@@ -1007,7 +1011,7 @@ Bool VG_(machine_get_hwcaps)( void ) - - /* VFP insns */ - have_VFP = True; -- if (__builtin_setjmp(env_unsup_insn)) { -+ if (VG_MINIMAL_SETJMP(env_unsup_insn)) { - have_VFP = False; - } else { - __asm__ __volatile__(".word 0xEEB02B42"); /* VMOV.F64 d2, d2 */ -@@ -1019,7 +1023,7 @@ Bool VG_(machine_get_hwcaps)( void ) - - /* NEON insns */ - have_NEON = True; -- if (__builtin_setjmp(env_unsup_insn)) { -+ if (VG_MINIMAL_SETJMP(env_unsup_insn)) { - have_NEON = False; - } else { - __asm__ __volatile__(".word 0xF2244154"); /* VMOV q2, q2 */ -@@ -1029,7 +1033,7 @@ Bool VG_(machine_get_hwcaps)( void ) - archlevel = 5; /* v5 will be base level */ - if (archlevel < 7) { - archlevel = 7; -- if (__builtin_setjmp(env_unsup_insn)) { -+ if (VG_MINIMAL_SETJMP(env_unsup_insn)) { - archlevel = 5; - } else { - __asm__ __volatile__(".word 0xF45FF000"); /* PLI [PC,#-0] */ -@@ -1037,7 +1041,7 @@ Bool VG_(machine_get_hwcaps)( void ) - } - if (archlevel < 6) { - archlevel = 6; -- if (__builtin_setjmp(env_unsup_insn)) { -+ if (VG_MINIMAL_SETJMP(env_unsup_insn)) { - archlevel = 5; - } else { - __asm__ __volatile__(".word 0xE6822012"); /* PKHBT r2, r2, r2 */ -Index: coregrind/m_mallocfree.c -=================================================================== ---- coregrind/m_mallocfree.c.orig -+++ coregrind/m_mallocfree.c -@@ -38,6 +38,7 @@ - #include "pub_core_libcprint.h" - #include "pub_core_mallocfree.h" - #include "pub_core_options.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" // For VG_INVALID_THREADID - #include "pub_core_tooliface.h" - #include "valgrind.h" -Index: coregrind/pub_core_basics.h -=================================================================== ---- coregrind/pub_core_basics.h.orig -+++ coregrind/pub_core_basics.h -@@ -64,9 +64,6 @@ - # error Unknown arch - #endif - --// For jmp_buf --#include -- - - /* --------------------------------------------------------------------- - A struct to hold starting values for stack unwinding. -Index: coregrind/m_initimg/initimg-pathscan.c -=================================================================== ---- coregrind/m_initimg/initimg-pathscan.c.orig -+++ coregrind/m_initimg/initimg-pathscan.c -@@ -44,7 +44,6 @@ - #include "pub_core_ume.h" - #include "pub_core_options.h" - #include "pub_core_tooliface.h" /* VG_TRACK */ --#include "pub_core_threadstate.h" /* ThreadArchState */ - #include "pub_core_initimg.h" /* self */ - - #include "priv_initimg_pathscan.h" -Index: coregrind/m_initimg/initimg-linux.c -=================================================================== ---- coregrind/m_initimg/initimg-linux.c.orig -+++ coregrind/m_initimg/initimg-linux.c -@@ -48,6 +48,7 @@ - #include "pub_core_options.h" - #include "pub_core_syscall.h" - #include "pub_core_tooliface.h" /* VG_TRACK */ -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" /* ThreadArchState */ - #include "priv_initimg_pathscan.h" - #include "pub_core_initimg.h" /* self */ -Index: coregrind/m_debuginfo/debuginfo.c -=================================================================== ---- coregrind/m_debuginfo/debuginfo.c.orig -+++ coregrind/m_debuginfo/debuginfo.c -@@ -31,6 +31,7 @@ - - #include "pub_core_basics.h" - #include "pub_core_vki.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_debuginfo.h" /* self */ - #include "pub_core_demangle.h" -Index: coregrind/m_debuginfo/readdwarf3.c -=================================================================== ---- coregrind/m_debuginfo/readdwarf3.c.orig -+++ coregrind/m_debuginfo/readdwarf3.c -@@ -139,6 +139,7 @@ - #include "pub_core_libcbase.h" - #include "pub_core_libcassert.h" - #include "pub_core_libcprint.h" -+#include "pub_core_libcsetjmp.h" // setjmp facilities - #include "pub_core_options.h" - #include "pub_core_tooliface.h" /* VG_(needs) */ - #include "pub_core_xarray.h" -@@ -3952,18 +3953,14 @@ void new_dwarf3_reader_wrk ( - /*--- ---*/ - /*------------------------------------------------------------*/ - --/* --- !!! --- EXTERNAL HEADERS start --- !!! --- */ --#include /* For jmp_buf */ --/* --- !!! --- EXTERNAL HEADERS end --- !!! --- */ -- --static Bool d3rd_jmpbuf_valid = False; --static HChar* d3rd_jmpbuf_reason = NULL; --static jmp_buf d3rd_jmpbuf; -+static Bool d3rd_jmpbuf_valid = False; -+static HChar* d3rd_jmpbuf_reason = NULL; -+static VG_MINIMAL_JMP_BUF d3rd_jmpbuf; - - static __attribute__((noreturn)) void barf ( HChar* reason ) { - vg_assert(d3rd_jmpbuf_valid); - d3rd_jmpbuf_reason = reason; -- __builtin_longjmp(&d3rd_jmpbuf, 1); -+ VG_MINIMAL_LONGJMP(d3rd_jmpbuf); - /*NOTREACHED*/ - vg_assert(0); - } -@@ -3991,7 +3988,7 @@ ML_(new_dwarf3_reader) ( - vg_assert(d3rd_jmpbuf_reason == NULL); - - d3rd_jmpbuf_valid = True; -- jumped = __builtin_setjmp(&d3rd_jmpbuf); -+ jumped = VG_MINIMAL_SETJMP(d3rd_jmpbuf); - if (jumped == 0) { - /* try this ... */ - new_dwarf3_reader_wrk( di, barf, -Index: coregrind/m_debugger.c -=================================================================== ---- coregrind/m_debugger.c.orig -+++ coregrind/m_debugger.c -@@ -30,6 +30,7 @@ - - #include "pub_core_basics.h" - #include "pub_core_vki.h" -+#include "pub_core_libcsetjmp.h" - #include "pub_core_threadstate.h" - #include "pub_core_xarray.h" - #include "pub_core_clientstate.h" -Index: coregrind/m_coredump/coredump-elf.c -=================================================================== ---- coregrind/m_coredump/coredump-elf.c.orig -+++ coregrind/m_coredump/coredump-elf.c -@@ -42,6 +42,7 @@ - #include "pub_core_libcproc.h" // VG_(geteuid), VG_(getegid) - #include "pub_core_libcassert.h" // VG_(exit), vg_assert - #include "pub_core_mallocfree.h" // VG_(malloc), VG_(free) -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_xarray.h" - #include "pub_core_clientstate.h" -Index: coregrind/m_signals.c -=================================================================== ---- coregrind/m_signals.c.orig -+++ coregrind/m_signals.c -@@ -197,6 +197,7 @@ - #include "pub_core_vki.h" - #include "pub_core_vkiscnums.h" - #include "pub_core_debuglog.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_xarray.h" - #include "pub_core_clientstate.h" -@@ -1777,7 +1778,7 @@ static void resume_scheduler(ThreadId ti - if (tst->sched_jmpbuf_valid) { - /* Can't continue; must longjmp back to the scheduler and thus - enter the sighandler immediately. */ -- __builtin_longjmp(tst->sched_jmpbuf, True); -+ VG_MINIMAL_LONGJMP(tst->sched_jmpbuf); - } - } - -Index: coregrind/m_stacktrace.c -=================================================================== ---- coregrind/m_stacktrace.c.orig -+++ coregrind/m_stacktrace.c -@@ -30,6 +30,7 @@ - - #include "pub_core_basics.h" - #include "pub_core_vki.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_debuginfo.h" // XXX: circular dependency - #include "pub_core_aspacemgr.h" // For VG_(is_addressable)() -Index: coregrind/m_main.c -=================================================================== ---- coregrind/m_main.c.orig -+++ coregrind/m_main.c -@@ -31,6 +31,7 @@ - #include "pub_core_basics.h" - #include "pub_core_vki.h" - #include "pub_core_vkiscnums.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_xarray.h" - #include "pub_core_clientstate.h" -Index: coregrind/m_scheduler/scheduler.c -=================================================================== ---- coregrind/m_scheduler/scheduler.c.orig -+++ coregrind/m_scheduler/scheduler.c -@@ -61,6 +61,7 @@ - #include "pub_core_debuglog.h" - #include "pub_core_vki.h" - #include "pub_core_vkiscnums.h" // __NR_sched_yield -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_aspacemgr.h" - #include "pub_core_clreq.h" // for VG_USERREQ__* -@@ -581,7 +582,7 @@ void VG_(scheduler_init_phase2) ( Thread - do { \ - ThreadState * volatile _qq_tst = VG_(get_ThreadState)(tid); \ - \ -- (jumped) = __builtin_setjmp(_qq_tst->sched_jmpbuf); \ -+ (jumped) = VG_MINIMAL_SETJMP(_qq_tst->sched_jmpbuf); \ - if ((jumped) == 0) { \ - vg_assert(!_qq_tst->sched_jmpbuf_valid); \ - _qq_tst->sched_jmpbuf_valid = True; \ -Index: coregrind/pub_core_libcsetjmp.h -=================================================================== ---- /dev/null -+++ coregrind/pub_core_libcsetjmp.h -@@ -0,0 +1,49 @@ -+ -+/*--------------------------------------------------------------------*/ -+/*--- A minimal setjmp/longjmp facility. pub_core_libcsetjmp.h ---*/ -+/*--------------------------------------------------------------------*/ -+ -+/* -+ This file is part of Valgrind, a dynamic binary instrumentation -+ framework. -+ -+ Copyright (C) 2010-2010 Mozilla Inc -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA -+ 02111-1307, USA. -+ -+ The GNU General Public License is contained in the file COPYING. -+*/ -+ -+/* Contributed by Julian Seward */ -+ -+#ifndef __PUB_CORE_LIBCSETJMP_H -+#define __PUB_CORE_LIBCSETJMP_H -+ -+//-------------------------------------------------------------------- -+// PURPOSE: Provides a minimal setjmp/longjmp facility, that saves/ -+// restores integer registers, but not necessarily anything more. -+//-------------------------------------------------------------------- -+ -+// No core-only exports; everything in this module is visible to both -+// the core and tools. -+ -+#include "pub_tool_libcsetjmp.h" -+ -+#endif // __PUB_CORE_LIBCSETJMP_H -+ -+/*--------------------------------------------------------------------*/ -+/*--- end pub_core_libcsetjmp.h ---*/ -+/*--------------------------------------------------------------------*/ -Index: coregrind/m_threadstate.c -=================================================================== ---- coregrind/m_threadstate.c.orig -+++ coregrind/m_threadstate.c -@@ -30,6 +30,7 @@ - - #include "pub_core_basics.h" - #include "pub_core_vki.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_libcassert.h" - -Index: coregrind/Makefile.am -=================================================================== ---- coregrind/Makefile.am.orig -+++ coregrind/Makefile.am -@@ -154,6 +154,7 @@ noinst_HEADERS = \ - pub_core_libcfile.h \ - pub_core_libcprint.h \ - pub_core_libcproc.h \ -+ pub_core_libcsetjmp.h \ - pub_core_libcsignal.h \ - pub_core_mach.h \ - pub_core_machine.h \ -@@ -239,6 +240,7 @@ COREGRIND_SOURCES_COMMON = \ - m_libcfile.c \ - m_libcprint.c \ - m_libcproc.c \ -+ m_libcsetjmp.c \ - m_libcsignal.c \ - m_machine.c \ - m_main.c \ -Index: coregrind/pub_core_threadstate.h -=================================================================== ---- coregrind/pub_core_threadstate.h.orig -+++ coregrind/pub_core_threadstate.h -@@ -355,8 +355,8 @@ typedef struct { - ThreadOSstate os_state; - - /* Per-thread jmp_buf to resume scheduler after a signal */ -- Bool sched_jmpbuf_valid; -- jmp_buf sched_jmpbuf; -+ Bool sched_jmpbuf_valid; -+ VG_MINIMAL_JMP_BUF sched_jmpbuf; - } - ThreadState; - diff --git a/vg_bug259977_r11688.patch b/vg_bug259977_r11688.patch deleted file mode 100644 index 28debca..0000000 --- a/vg_bug259977_r11688.patch +++ /dev/null @@ -1,199 +0,0 @@ -Index: memcheck/mc_leakcheck.c -=================================================================== ---- memcheck/mc_leakcheck.c (revision 11687) -+++ memcheck/mc_leakcheck.c (revision 11688) -@@ -635,7 +635,7 @@ - } - - --static VG_MINIMAL_JMP_BUF memscan_jmpbuf; -+static VG_MINIMAL_JMP_BUF(memscan_jmpbuf); - - static - void scan_all_valid_memory_catcher ( Int sigNo, Addr addr ) -Index: include/pub_tool_libcsetjmp.h -=================================================================== ---- include/pub_tool_libcsetjmp.h (revision 11687) -+++ include/pub_tool_libcsetjmp.h (revision 11688) -@@ -64,10 +64,21 @@ - second function (eg, VG_(minimal_setjmp)) doesn't seem to work for - whatever reason -- returns via a VG_(minimal_longjmp) go wrong. - */ --#define VG_MINIMAL_JMP_BUF jmp_buf -+ -+#if defined(VGP_ppc32_linux) -+ -+#define VG_MINIMAL_JMP_BUF(_name) UInt _name [32+1+1] -+Int VG_MINIMAL_SETJMP(VG_MINIMAL_JMP_BUF(_env)); -+void VG_MINIMAL_LONGJMP(VG_MINIMAL_JMP_BUF(_env)); -+ -+#else -+ -+/* The default implementation. */ -+#define VG_MINIMAL_JMP_BUF(_name) jmp_buf _name - #define VG_MINIMAL_SETJMP(_env) __builtin_setjmp((_env)) - #define VG_MINIMAL_LONGJMP(_env) __builtin_longjmp((_env),1) - -+#endif - - #endif // __PUB_TOOL_LIBCSETJMP_H - -Index: coregrind/m_libcsetjmp.c -=================================================================== ---- coregrind/m_libcsetjmp.c (revision 11687) -+++ coregrind/m_libcsetjmp.c (revision 11688) -@@ -36,9 +36,114 @@ - - /* See include/pub_tool_libcsetjmp.h for background and rationale. */ - --/* No alternative implementations at present. */ -+/* The only alternative implementations are for ppc{32,64}-linux. See -+ #259977. */ - -+#if defined(VGP_ppc32_linux) - -+__asm__( -+".text" "\n" -+"" "\n" -+".global VG_MINIMAL_SETJMP" "\n" // r3 = jmp_buf -+"VG_MINIMAL_SETJMP:" "\n" -+" stw 0, 0(3)" "\n" -+" stw 1, 4(3)" "\n" -+" stw 2, 8(3)" "\n" -+" stw 3, 12(3)" "\n" -+" stw 4, 16(3)" "\n" -+" stw 5, 20(3)" "\n" -+" stw 6, 24(3)" "\n" -+" stw 7, 28(3)" "\n" -+" stw 8, 32(3)" "\n" -+" stw 9, 36(3)" "\n" -+" stw 10, 40(3)" "\n" -+" stw 11, 44(3)" "\n" -+" stw 12, 48(3)" "\n" -+" stw 13, 52(3)" "\n" -+" stw 14, 56(3)" "\n" -+" stw 15, 60(3)" "\n" -+" stw 16, 64(3)" "\n" -+" stw 17, 68(3)" "\n" -+" stw 18, 72(3)" "\n" -+" stw 19, 76(3)" "\n" -+" stw 20, 80(3)" "\n" -+" stw 21, 84(3)" "\n" -+" stw 22, 88(3)" "\n" -+" stw 23, 92(3)" "\n" -+" stw 24, 96(3)" "\n" -+" stw 25, 100(3)" "\n" -+" stw 26, 104(3)" "\n" -+" stw 27, 108(3)" "\n" -+" stw 28, 112(3)" "\n" -+" stw 29, 116(3)" "\n" -+" stw 30, 120(3)" "\n" -+" stw 31, 124(3)" "\n" -+ // must use a caller-save register here as scratch, hence r4 -+" mflr 4" "\n" -+" stw 4, 128(3)" "\n" -+" mfcr 4" "\n" -+" stw 4, 132(3)" "\n" -+" li 3, 0" "\n" -+" blr" "\n" -+"" "\n" -+ -+ -+".global VG_MINIMAL_LONGJMP" "\n" -+"VG_MINIMAL_LONGJMP:" "\n" // r3 = jmp_buf -+ // do r4 = 1 -+ // and park it in the restore slot for r3 (the ret reg) -+" li 4, 1" "\n" -+" stw 4, 12(3)" "\n" -+ // restore everything except r3 -+ // then r3 last of all -+ // then blr -+" lwz 0, 128(3)" "\n" -+" mtlr 0" "\n" -+" lwz 0, 132(3)" "\n" -+" mtcr 0" "\n" -+" lwz 0, 0(3)" "\n" -+" lwz 1, 4(3)" "\n" -+" lwz 2, 8(3)" "\n" -+ // r3 is done at the end -+" lwz 4, 16(3)" "\n" -+" lwz 5, 20(3)" "\n" -+" lwz 6, 24(3)" "\n" -+" lwz 7, 28(3)" "\n" -+" lwz 8, 32(3)" "\n" -+" lwz 9, 36(3)" "\n" -+" lwz 10, 40(3)" "\n" -+" lwz 11, 44(3)" "\n" -+" lwz 12, 48(3)" "\n" -+" lwz 13, 52(3)" "\n" -+" lwz 14, 56(3)" "\n" -+" lwz 15, 60(3)" "\n" -+" lwz 16, 64(3)" "\n" -+" lwz 17, 68(3)" "\n" -+" lwz 18, 72(3)" "\n" -+" lwz 19, 76(3)" "\n" -+" lwz 20, 80(3)" "\n" -+" lwz 21, 84(3)" "\n" -+" lwz 22, 88(3)" "\n" -+" lwz 23, 92(3)" "\n" -+" lwz 24, 96(3)" "\n" -+" lwz 25, 100(3)" "\n" -+" lwz 26, 104(3)" "\n" -+" lwz 27, 108(3)" "\n" -+" lwz 28, 112(3)" "\n" -+" lwz 29, 116(3)" "\n" -+" lwz 30, 120(3)" "\n" -+" lwz 31, 124(3)" "\n" -+" lwz 3, 12(3)" "\n" -+" blr" "\n" -+"" "\n" -+ -+ -+".previous" "\n" -+); -+ -+#endif /* VGP_ppc32_linux */ -+ -+ - /*--------------------------------------------------------------------*/ - /*--- end ---*/ - /*--------------------------------------------------------------------*/ -Index: coregrind/m_machine.c -=================================================================== ---- coregrind/m_machine.c (revision 11687) -+++ coregrind/m_machine.c (revision 11688) -@@ -423,7 +423,7 @@ - #if defined(VGA_ppc32) || defined(VGA_ppc64) \ - || defined(VGA_arm) || defined(VGA_s390x) - #include "pub_tool_libcsetjmp.h" --static VG_MINIMAL_JMP_BUF env_unsup_insn; -+static VG_MINIMAL_JMP_BUF(env_unsup_insn); - static void handler_unsup_insn ( Int x ) { - VG_MINIMAL_LONGJMP(env_unsup_insn); - } -Index: coregrind/m_debuginfo/readdwarf3.c -=================================================================== ---- coregrind/m_debuginfo/readdwarf3.c (revision 11687) -+++ coregrind/m_debuginfo/readdwarf3.c (revision 11688) -@@ -3955,7 +3955,7 @@ - - static Bool d3rd_jmpbuf_valid = False; - static HChar* d3rd_jmpbuf_reason = NULL; --static VG_MINIMAL_JMP_BUF d3rd_jmpbuf; -+static VG_MINIMAL_JMP_BUF(d3rd_jmpbuf); - - static __attribute__((noreturn)) void barf ( HChar* reason ) { - vg_assert(d3rd_jmpbuf_valid); -Index: coregrind/pub_core_threadstate.h -=================================================================== ---- coregrind/pub_core_threadstate.h (revision 11687) -+++ coregrind/pub_core_threadstate.h (revision 11688) -@@ -356,7 +356,7 @@ - - /* Per-thread jmp_buf to resume scheduler after a signal */ - Bool sched_jmpbuf_valid; -- VG_MINIMAL_JMP_BUF sched_jmpbuf; -+ VG_MINIMAL_JMP_BUF(sched_jmpbuf); - } - ThreadState; - diff --git a/vg_bug259977_r11689.patch b/vg_bug259977_r11689.patch deleted file mode 100644 index a8d0afb..0000000 --- a/vg_bug259977_r11689.patch +++ /dev/null @@ -1,188 +0,0 @@ -Index: include/pub_tool_libcsetjmp.h -=================================================================== ---- include/pub_tool_libcsetjmp.h (revision 11688) -+++ include/pub_tool_libcsetjmp.h (revision 11689) -@@ -71,6 +71,12 @@ - Int VG_MINIMAL_SETJMP(VG_MINIMAL_JMP_BUF(_env)); - void VG_MINIMAL_LONGJMP(VG_MINIMAL_JMP_BUF(_env)); - -+#elif defined(VGP_ppc64_linux) -+ -+#define VG_MINIMAL_JMP_BUF(_name) ULong _name [32+1+1] -+Int VG_MINIMAL_SETJMP(VG_MINIMAL_JMP_BUF(_env)); -+void VG_MINIMAL_LONGJMP(VG_MINIMAL_JMP_BUF(_env)); -+ - #else - - /* The default implementation. */ -Index: coregrind/m_libcsetjmp.c -=================================================================== ---- coregrind/m_libcsetjmp.c (revision 11688) -+++ coregrind/m_libcsetjmp.c (revision 11689) -@@ -39,11 +39,13 @@ - /* The only alternative implementations are for ppc{32,64}-linux. See - #259977. */ - -+/* ------------ ppc32-linux ------------ */ -+ - #if defined(VGP_ppc32_linux) - - __asm__( - ".text" "\n" --"" "\n" -+"" "\n" - ".global VG_MINIMAL_SETJMP" "\n" // r3 = jmp_buf - "VG_MINIMAL_SETJMP:" "\n" - " stw 0, 0(3)" "\n" -@@ -85,7 +87,7 @@ - " stw 4, 132(3)" "\n" - " li 3, 0" "\n" - " blr" "\n" --"" "\n" -+"" "\n" - - - ".global VG_MINIMAL_LONGJMP" "\n" -@@ -135,15 +137,140 @@ - " lwz 31, 124(3)" "\n" - " lwz 3, 12(3)" "\n" - " blr" "\n" --"" "\n" -+"" "\n" - -- - ".previous" "\n" - ); - - #endif /* VGP_ppc32_linux */ - - -+/* ------------ ppc64-linux ------------ */ -+ -+#if defined(VGP_ppc64_linux) -+ -+__asm__( -+".section \".toc\",\"aw\"" "\n" -+ -+".section \".text\"" "\n" -+".align 2" "\n" -+".p2align 4,,15" "\n" -+".globl VG_MINIMAL_SETJMP" "\n" -+ -+".section \".opd\",\"aw\"" "\n" -+".align 3" "\n" -+"VG_MINIMAL_SETJMP:" "\n" -+".quad .L.VG_MINIMAL_SETJMP,.TOC.@tocbase,0" "\n" -+".previous" "\n" -+ -+".type VG_MINIMAL_SETJMP, @function" "\n" -+".L.VG_MINIMAL_SETJMP:" "\n" -+" std 0, 0(3)" "\n" -+" std 1, 8(3)" "\n" -+" std 2, 16(3)" "\n" -+" std 3, 24(3)" "\n" -+" std 4, 32(3)" "\n" -+" std 5, 40(3)" "\n" -+" std 6, 48(3)" "\n" -+" std 7, 56(3)" "\n" -+" std 8, 64(3)" "\n" -+" std 9, 72(3)" "\n" -+" std 10, 80(3)" "\n" -+" std 11, 88(3)" "\n" -+" std 12, 96(3)" "\n" -+" std 13, 104(3)" "\n" -+" std 14, 112(3)" "\n" -+" std 15, 120(3)" "\n" -+" std 16, 128(3)" "\n" -+" std 17, 136(3)" "\n" -+" std 18, 144(3)" "\n" -+" std 19, 152(3)" "\n" -+" std 20, 160(3)" "\n" -+" std 21, 168(3)" "\n" -+" std 22, 176(3)" "\n" -+" std 23, 184(3)" "\n" -+" std 24, 192(3)" "\n" -+" std 25, 200(3)" "\n" -+" std 26, 208(3)" "\n" -+" std 27, 216(3)" "\n" -+" std 28, 224(3)" "\n" -+" std 29, 232(3)" "\n" -+" std 30, 240(3)" "\n" -+" std 31, 248(3)" "\n" -+ // must use a caller-save register here as scratch, hence r4 -+" mflr 4" "\n" -+" std 4, 256(3)" "\n" -+" mfcr 4" "\n" -+" std 4, 264(3)" "\n" -+" li 3, 0" "\n" -+" blr" "\n" -+"" "\n" -+ -+ -+".globl VG_MINIMAL_LONGJMP" "\n" -+ -+".section \".opd\",\"aw\"" "\n" -+".align 3" "\n" -+"VG_MINIMAL_LONGJMP:" "\n" -+".quad .L.VG_MINIMAL_LONGJMP,.TOC.@tocbase,0" "\n" -+".previous" "\n" -+ -+".type VG_MINIMAL_LONGJMP, @function" "\n" -+".L.VG_MINIMAL_LONGJMP:" "\n" -+ // do r4 = 1 -+ // and park it in the restore slot for r3 (the ret reg) -+" li 4, 1" "\n" -+" std 4, 24(3)" "\n" -+ // restore everything except r3 -+ // then r3 last of all -+ // then blr -+" ld 0, 256(3)" "\n" -+" mtlr 0" "\n" -+" ld 0, 264(3)" "\n" -+" mtcr 0" "\n" -+" ld 0, 0(3)" "\n" -+" ld 1, 8(3)" "\n" -+" ld 2, 16(3)" "\n" -+ // r3 is done at the end -+" ld 4, 32(3)" "\n" -+" ld 5, 40(3)" "\n" -+" ld 6, 48(3)" "\n" -+" ld 7, 56(3)" "\n" -+" ld 8, 64(3)" "\n" -+" ld 9, 72(3)" "\n" -+" ld 10, 80(3)" "\n" -+" ld 11, 88(3)" "\n" -+" ld 12, 96(3)" "\n" -+" ld 13, 104(3)" "\n" -+" ld 14, 112(3)" "\n" -+" ld 15, 120(3)" "\n" -+" ld 16, 128(3)" "\n" -+" ld 17, 136(3)" "\n" -+" ld 18, 144(3)" "\n" -+" ld 19, 152(3)" "\n" -+" ld 20, 160(3)" "\n" -+" ld 21, 168(3)" "\n" -+" ld 22, 176(3)" "\n" -+" ld 23, 184(3)" "\n" -+" ld 24, 192(3)" "\n" -+" ld 25, 200(3)" "\n" -+" ld 26, 208(3)" "\n" -+" ld 27, 216(3)" "\n" -+" ld 28, 224(3)" "\n" -+" ld 29, 232(3)" "\n" -+" ld 30, 240(3)" "\n" -+" ld 31, 248(3)" "\n" -+" ld 3, 24(3)" "\n" -+" blr" "\n" -+"" "\n" -+ -+".previous" "\n" -+".previous" "\n" -+); -+ -+ -+#endif /* VGP_ppc64_linux */ -+ - /*--------------------------------------------------------------------*/ - /*--- end ---*/ - /*--------------------------------------------------------------------*/ diff --git a/vg_bug259977_r11690.patch b/vg_bug259977_r11690.patch deleted file mode 100644 index e860d99..0000000 --- a/vg_bug259977_r11690.patch +++ /dev/null @@ -1,97 +0,0 @@ -Index: coregrind/m_sigframe/sigframe-x86-darwin.c -=================================================================== ---- coregrind/m_sigframe/sigframe-x86-darwin.c (revision 11689) -+++ coregrind/m_sigframe/sigframe-x86-darwin.c (revision 11690) -@@ -34,6 +34,7 @@ - #include "pub_core_basics.h" - #include "pub_core_vki.h" - #include "pub_core_vkiscnums.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_aspacemgr.h" - #include "pub_core_libcbase.h" -Index: coregrind/m_sigframe/sigframe-amd64-darwin.c -=================================================================== ---- coregrind/m_sigframe/sigframe-amd64-darwin.c (revision 11689) -+++ coregrind/m_sigframe/sigframe-amd64-darwin.c (revision 11690) -@@ -34,6 +34,7 @@ - #include "pub_core_basics.h" - #include "pub_core_vki.h" - #include "pub_core_vkiscnums.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_aspacemgr.h" - #include "pub_core_libcbase.h" -Index: coregrind/m_syswrap/syswrap-x86-darwin.c -=================================================================== ---- coregrind/m_syswrap/syswrap-x86-darwin.c (revision 11689) -+++ coregrind/m_syswrap/syswrap-x86-darwin.c (revision 11690) -@@ -32,6 +32,7 @@ - - #include "pub_core_basics.h" - #include "pub_core_vki.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_aspacemgr.h" - #include "pub_core_xarray.h" -Index: coregrind/m_syswrap/syswrap-amd64-darwin.c -=================================================================== ---- coregrind/m_syswrap/syswrap-amd64-darwin.c (revision 11689) -+++ coregrind/m_syswrap/syswrap-amd64-darwin.c (revision 11690) -@@ -32,6 +32,7 @@ - - #include "pub_core_basics.h" - #include "pub_core_vki.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_aspacemgr.h" - #include "pub_core_xarray.h" -Index: coregrind/m_syswrap/syswrap-main.c -=================================================================== ---- coregrind/m_syswrap/syswrap-main.c (revision 11689) -+++ coregrind/m_syswrap/syswrap-main.c (revision 11690) -@@ -2267,7 +2267,7 @@ - sci->status.what = SsIdle; - - vg_assert(tst->sched_jmpbuf_valid); -- VG_MINIMAL_LONGJMP(tst->sched_jmpbuf, True); -+ VG_MINIMAL_LONGJMP(tst->sched_jmpbuf); - - /* NOTREACHED */ - vg_assert(0); -Index: coregrind/m_syswrap/syswrap-darwin.c -=================================================================== ---- coregrind/m_syswrap/syswrap-darwin.c (revision 11689) -+++ coregrind/m_syswrap/syswrap-darwin.c (revision 11690) -@@ -33,6 +33,7 @@ - #include "pub_core_basics.h" - #include "pub_core_vki.h" - #include "pub_core_vkiscnums.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - #include "pub_core_aspacemgr.h" - #include "pub_core_xarray.h" -Index: coregrind/m_initimg/initimg-darwin.c -=================================================================== ---- coregrind/m_initimg/initimg-darwin.c (revision 11689) -+++ coregrind/m_initimg/initimg-darwin.c (revision 11690) -@@ -47,6 +47,7 @@ - #include "pub_core_ume.h" - #include "pub_core_options.h" - #include "pub_core_tooliface.h" /* VG_TRACK */ -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" /* ThreadArchState */ - #include "priv_initimg_pathscan.h" - #include "pub_core_initimg.h" /* self */ -Index: coregrind/m_coredump/coredump-macho.c -=================================================================== ---- coregrind/m_coredump/coredump-macho.c (revision 11689) -+++ coregrind/m_coredump/coredump-macho.c (revision 11690) -@@ -33,6 +33,7 @@ - #include "pub_core_basics.h" - #include "pub_core_vki.h" - #include "pub_core_coredump.h" -+#include "pub_core_libcsetjmp.h" // to keep _threadstate.h happy - #include "pub_core_threadstate.h" - - void VG_(make_coredump)(ThreadId tid, const vki_siginfo_t *si, UInt max_size) diff --git a/vg_bug267630_r2127.patch b/vg_bug267630_r2127.patch deleted file mode 100644 index 794b71b..0000000 --- a/vg_bug267630_r2127.patch +++ /dev/null @@ -1,3096 +0,0 @@ -Index: VEX/priv/guest_ppc_helpers.c -=================================================================== ---- VEX/priv/guest_ppc_helpers.c.orig -+++ VEX/priv/guest_ppc_helpers.c -@@ -385,74 +385,74 @@ void LibVEX_GuestPPC32_initialise ( /*OU - vex_state->guest_GPR30 = 0; - vex_state->guest_GPR31 = 0; - -- vex_state->guest_FPR0 = 0; -- vex_state->guest_FPR1 = 0; -- vex_state->guest_FPR2 = 0; -- vex_state->guest_FPR3 = 0; -- vex_state->guest_FPR4 = 0; -- vex_state->guest_FPR5 = 0; -- vex_state->guest_FPR6 = 0; -- vex_state->guest_FPR7 = 0; -- vex_state->guest_FPR8 = 0; -- vex_state->guest_FPR9 = 0; -- vex_state->guest_FPR10 = 0; -- vex_state->guest_FPR11 = 0; -- vex_state->guest_FPR12 = 0; -- vex_state->guest_FPR13 = 0; -- vex_state->guest_FPR14 = 0; -- vex_state->guest_FPR15 = 0; -- vex_state->guest_FPR16 = 0; -- vex_state->guest_FPR17 = 0; -- vex_state->guest_FPR18 = 0; -- vex_state->guest_FPR19 = 0; -- vex_state->guest_FPR20 = 0; -- vex_state->guest_FPR21 = 0; -- vex_state->guest_FPR22 = 0; -- vex_state->guest_FPR23 = 0; -- vex_state->guest_FPR24 = 0; -- vex_state->guest_FPR25 = 0; -- vex_state->guest_FPR26 = 0; -- vex_state->guest_FPR27 = 0; -- vex_state->guest_FPR28 = 0; -- vex_state->guest_FPR29 = 0; -- vex_state->guest_FPR30 = 0; -- vex_state->guest_FPR31 = 0; - - /* Initialise the vector state. */ - # define VECZERO(_vr) _vr[0]=_vr[1]=_vr[2]=_vr[3] = 0; - -- VECZERO(vex_state->guest_VR0 ); -- VECZERO(vex_state->guest_VR1 ); -- VECZERO(vex_state->guest_VR2 ); -- VECZERO(vex_state->guest_VR3 ); -- VECZERO(vex_state->guest_VR4 ); -- VECZERO(vex_state->guest_VR5 ); -- VECZERO(vex_state->guest_VR6 ); -- VECZERO(vex_state->guest_VR7 ); -- VECZERO(vex_state->guest_VR8 ); -- VECZERO(vex_state->guest_VR9 ); -- VECZERO(vex_state->guest_VR10); -- VECZERO(vex_state->guest_VR11); -- VECZERO(vex_state->guest_VR12); -- VECZERO(vex_state->guest_VR13); -- VECZERO(vex_state->guest_VR14); -- VECZERO(vex_state->guest_VR15); -- VECZERO(vex_state->guest_VR16); -- VECZERO(vex_state->guest_VR17); -- VECZERO(vex_state->guest_VR18); -- VECZERO(vex_state->guest_VR19); -- VECZERO(vex_state->guest_VR20); -- VECZERO(vex_state->guest_VR21); -- VECZERO(vex_state->guest_VR22); -- VECZERO(vex_state->guest_VR23); -- VECZERO(vex_state->guest_VR24); -- VECZERO(vex_state->guest_VR25); -- VECZERO(vex_state->guest_VR26); -- VECZERO(vex_state->guest_VR27); -- VECZERO(vex_state->guest_VR28); -- VECZERO(vex_state->guest_VR29); -- VECZERO(vex_state->guest_VR30); -- VECZERO(vex_state->guest_VR31); -+ VECZERO(vex_state->guest_VSR0 ); -+ VECZERO(vex_state->guest_VSR1 ); -+ VECZERO(vex_state->guest_VSR2 ); -+ VECZERO(vex_state->guest_VSR3 ); -+ VECZERO(vex_state->guest_VSR4 ); -+ VECZERO(vex_state->guest_VSR5 ); -+ VECZERO(vex_state->guest_VSR6 ); -+ VECZERO(vex_state->guest_VSR7 ); -+ VECZERO(vex_state->guest_VSR8 ); -+ VECZERO(vex_state->guest_VSR9 ); -+ VECZERO(vex_state->guest_VSR10); -+ VECZERO(vex_state->guest_VSR11); -+ VECZERO(vex_state->guest_VSR12); -+ VECZERO(vex_state->guest_VSR13); -+ VECZERO(vex_state->guest_VSR14); -+ VECZERO(vex_state->guest_VSR15); -+ VECZERO(vex_state->guest_VSR16); -+ VECZERO(vex_state->guest_VSR17); -+ VECZERO(vex_state->guest_VSR18); -+ VECZERO(vex_state->guest_VSR19); -+ VECZERO(vex_state->guest_VSR20); -+ VECZERO(vex_state->guest_VSR21); -+ VECZERO(vex_state->guest_VSR22); -+ VECZERO(vex_state->guest_VSR23); -+ VECZERO(vex_state->guest_VSR24); -+ VECZERO(vex_state->guest_VSR25); -+ VECZERO(vex_state->guest_VSR26); -+ VECZERO(vex_state->guest_VSR27); -+ VECZERO(vex_state->guest_VSR28); -+ VECZERO(vex_state->guest_VSR29); -+ VECZERO(vex_state->guest_VSR30); -+ VECZERO(vex_state->guest_VSR31); -+ VECZERO(vex_state->guest_VSR32); -+ VECZERO(vex_state->guest_VSR33); -+ VECZERO(vex_state->guest_VSR34); -+ VECZERO(vex_state->guest_VSR35); -+ VECZERO(vex_state->guest_VSR36); -+ VECZERO(vex_state->guest_VSR37); -+ VECZERO(vex_state->guest_VSR38); -+ VECZERO(vex_state->guest_VSR39); -+ VECZERO(vex_state->guest_VSR40); -+ VECZERO(vex_state->guest_VSR41); -+ VECZERO(vex_state->guest_VSR42); -+ VECZERO(vex_state->guest_VSR43); -+ VECZERO(vex_state->guest_VSR44); -+ VECZERO(vex_state->guest_VSR45); -+ VECZERO(vex_state->guest_VSR46); -+ VECZERO(vex_state->guest_VSR47); -+ VECZERO(vex_state->guest_VSR48); -+ VECZERO(vex_state->guest_VSR49); -+ VECZERO(vex_state->guest_VSR50); -+ VECZERO(vex_state->guest_VSR51); -+ VECZERO(vex_state->guest_VSR52); -+ VECZERO(vex_state->guest_VSR53); -+ VECZERO(vex_state->guest_VSR54); -+ VECZERO(vex_state->guest_VSR55); -+ VECZERO(vex_state->guest_VSR56); -+ VECZERO(vex_state->guest_VSR57); -+ VECZERO(vex_state->guest_VSR58); -+ VECZERO(vex_state->guest_VSR59); -+ VECZERO(vex_state->guest_VSR60); -+ VECZERO(vex_state->guest_VSR61); -+ VECZERO(vex_state->guest_VSR62); -+ VECZERO(vex_state->guest_VSR63); - - # undef VECZERO - -@@ -542,74 +542,73 @@ void LibVEX_GuestPPC64_initialise ( /*OU - vex_state->guest_GPR30 = 0; - vex_state->guest_GPR31 = 0; - -- vex_state->guest_FPR0 = 0; -- vex_state->guest_FPR1 = 0; -- vex_state->guest_FPR2 = 0; -- vex_state->guest_FPR3 = 0; -- vex_state->guest_FPR4 = 0; -- vex_state->guest_FPR5 = 0; -- vex_state->guest_FPR6 = 0; -- vex_state->guest_FPR7 = 0; -- vex_state->guest_FPR8 = 0; -- vex_state->guest_FPR9 = 0; -- vex_state->guest_FPR10 = 0; -- vex_state->guest_FPR11 = 0; -- vex_state->guest_FPR12 = 0; -- vex_state->guest_FPR13 = 0; -- vex_state->guest_FPR14 = 0; -- vex_state->guest_FPR15 = 0; -- vex_state->guest_FPR16 = 0; -- vex_state->guest_FPR17 = 0; -- vex_state->guest_FPR18 = 0; -- vex_state->guest_FPR19 = 0; -- vex_state->guest_FPR20 = 0; -- vex_state->guest_FPR21 = 0; -- vex_state->guest_FPR22 = 0; -- vex_state->guest_FPR23 = 0; -- vex_state->guest_FPR24 = 0; -- vex_state->guest_FPR25 = 0; -- vex_state->guest_FPR26 = 0; -- vex_state->guest_FPR27 = 0; -- vex_state->guest_FPR28 = 0; -- vex_state->guest_FPR29 = 0; -- vex_state->guest_FPR30 = 0; -- vex_state->guest_FPR31 = 0; -- - /* Initialise the vector state. */ - # define VECZERO(_vr) _vr[0]=_vr[1]=_vr[2]=_vr[3] = 0; - -- VECZERO(vex_state->guest_VR0 ); -- VECZERO(vex_state->guest_VR1 ); -- VECZERO(vex_state->guest_VR2 ); -- VECZERO(vex_state->guest_VR3 ); -- VECZERO(vex_state->guest_VR4 ); -- VECZERO(vex_state->guest_VR5 ); -- VECZERO(vex_state->guest_VR6 ); -- VECZERO(vex_state->guest_VR7 ); -- VECZERO(vex_state->guest_VR8 ); -- VECZERO(vex_state->guest_VR9 ); -- VECZERO(vex_state->guest_VR10); -- VECZERO(vex_state->guest_VR11); -- VECZERO(vex_state->guest_VR12); -- VECZERO(vex_state->guest_VR13); -- VECZERO(vex_state->guest_VR14); -- VECZERO(vex_state->guest_VR15); -- VECZERO(vex_state->guest_VR16); -- VECZERO(vex_state->guest_VR17); -- VECZERO(vex_state->guest_VR18); -- VECZERO(vex_state->guest_VR19); -- VECZERO(vex_state->guest_VR20); -- VECZERO(vex_state->guest_VR21); -- VECZERO(vex_state->guest_VR22); -- VECZERO(vex_state->guest_VR23); -- VECZERO(vex_state->guest_VR24); -- VECZERO(vex_state->guest_VR25); -- VECZERO(vex_state->guest_VR26); -- VECZERO(vex_state->guest_VR27); -- VECZERO(vex_state->guest_VR28); -- VECZERO(vex_state->guest_VR29); -- VECZERO(vex_state->guest_VR30); -- VECZERO(vex_state->guest_VR31); -+ VECZERO(vex_state->guest_VSR0 ); -+ VECZERO(vex_state->guest_VSR1 ); -+ VECZERO(vex_state->guest_VSR2 ); -+ VECZERO(vex_state->guest_VSR3 ); -+ VECZERO(vex_state->guest_VSR4 ); -+ VECZERO(vex_state->guest_VSR5 ); -+ VECZERO(vex_state->guest_VSR6 ); -+ VECZERO(vex_state->guest_VSR7 ); -+ VECZERO(vex_state->guest_VSR8 ); -+ VECZERO(vex_state->guest_VSR9 ); -+ VECZERO(vex_state->guest_VSR10); -+ VECZERO(vex_state->guest_VSR11); -+ VECZERO(vex_state->guest_VSR12); -+ VECZERO(vex_state->guest_VSR13); -+ VECZERO(vex_state->guest_VSR14); -+ VECZERO(vex_state->guest_VSR15); -+ VECZERO(vex_state->guest_VSR16); -+ VECZERO(vex_state->guest_VSR17); -+ VECZERO(vex_state->guest_VSR18); -+ VECZERO(vex_state->guest_VSR19); -+ VECZERO(vex_state->guest_VSR20); -+ VECZERO(vex_state->guest_VSR21); -+ VECZERO(vex_state->guest_VSR22); -+ VECZERO(vex_state->guest_VSR23); -+ VECZERO(vex_state->guest_VSR24); -+ VECZERO(vex_state->guest_VSR25); -+ VECZERO(vex_state->guest_VSR26); -+ VECZERO(vex_state->guest_VSR27); -+ VECZERO(vex_state->guest_VSR28); -+ VECZERO(vex_state->guest_VSR29); -+ VECZERO(vex_state->guest_VSR30); -+ VECZERO(vex_state->guest_VSR31); -+ VECZERO(vex_state->guest_VSR32); -+ VECZERO(vex_state->guest_VSR33); -+ VECZERO(vex_state->guest_VSR34); -+ VECZERO(vex_state->guest_VSR35); -+ VECZERO(vex_state->guest_VSR36); -+ VECZERO(vex_state->guest_VSR37); -+ VECZERO(vex_state->guest_VSR38); -+ VECZERO(vex_state->guest_VSR39); -+ VECZERO(vex_state->guest_VSR40); -+ VECZERO(vex_state->guest_VSR41); -+ VECZERO(vex_state->guest_VSR42); -+ VECZERO(vex_state->guest_VSR43); -+ VECZERO(vex_state->guest_VSR44); -+ VECZERO(vex_state->guest_VSR45); -+ VECZERO(vex_state->guest_VSR46); -+ VECZERO(vex_state->guest_VSR47); -+ VECZERO(vex_state->guest_VSR48); -+ VECZERO(vex_state->guest_VSR49); -+ VECZERO(vex_state->guest_VSR50); -+ VECZERO(vex_state->guest_VSR51); -+ VECZERO(vex_state->guest_VSR52); -+ VECZERO(vex_state->guest_VSR53); -+ VECZERO(vex_state->guest_VSR54); -+ VECZERO(vex_state->guest_VSR55); -+ VECZERO(vex_state->guest_VSR56); -+ VECZERO(vex_state->guest_VSR57); -+ VECZERO(vex_state->guest_VSR58); -+ VECZERO(vex_state->guest_VSR59); -+ VECZERO(vex_state->guest_VSR60); -+ VECZERO(vex_state->guest_VSR61); -+ VECZERO(vex_state->guest_VSR62); -+ VECZERO(vex_state->guest_VSR63); - - # undef VECZERO - -Index: VEX/priv/guest_ppc_toIR.c -=================================================================== ---- VEX/priv/guest_ppc_toIR.c.orig -+++ VEX/priv/guest_ppc_toIR.c -@@ -1,4 +1,5 @@ - -+ - /*--------------------------------------------------------------------*/ - /*--- begin guest_ppc_toIR.c ---*/ - /*--------------------------------------------------------------------*/ -@@ -257,22 +258,52 @@ static UChar ifieldRegDS( UInt instr ) { - return toUChar( IFIELD( instr, 21, 5 ) ); - } - -+/* Extract XT (destination register) field, instr[0,25:21] */ -+static UChar ifieldRegXT ( UInt instr ) -+{ -+ UChar upper_bit = toUChar (IFIELD (instr, 0, 1)); -+ UChar lower_bits = toUChar (IFIELD (instr, 21, 5)); -+ return (upper_bit << 5) | lower_bits; -+} -+ -+/* Extract XS (store source register) field, instr[0,25:21] */ -+static inline UChar ifieldRegXS ( UInt instr ) -+{ -+ return ifieldRegXT ( instr ); -+} -+ - /* Extract RA (1st source register) field, instr[20:16] */ - static UChar ifieldRegA ( UInt instr ) { - return toUChar( IFIELD( instr, 16, 5 ) ); - } - -+/* Extract XA (1st source register) field, instr[2,20:16] */ -+static UChar ifieldRegXA ( UInt instr ) -+{ -+ UChar upper_bit = toUChar (IFIELD (instr, 2, 1)); -+ UChar lower_bits = toUChar (IFIELD (instr, 16, 5)); -+ return (upper_bit << 5) | lower_bits; -+} -+ - /* Extract RB (2nd source register) field, instr[15:11] */ - static UChar ifieldRegB ( UInt instr ) { - return toUChar( IFIELD( instr, 11, 5 ) ); - } - -+/* Extract XB (2nd source register) field, instr[1,15:11] */ -+static UChar ifieldRegXB ( UInt instr ) -+{ -+ UChar upper_bit = toUChar (IFIELD (instr, 1, 1)); -+ UChar lower_bits = toUChar (IFIELD (instr, 11, 5)); -+ return (upper_bit << 5) | lower_bits; -+} -+ - /* Extract RC (3rd source register) field, instr[10:6] */ - static UChar ifieldRegC ( UInt instr ) { - return toUChar( IFIELD( instr, 6, 5 ) ); - } - --/* Extract 2nd lowest bit, instr[1] */ -+/* Extract bit 10, instr[10] */ - static UChar ifieldBIT10 ( UInt instr ) { - return toUChar( IFIELD( instr, 10, 1 ) ); - } -@@ -297,6 +328,16 @@ static UInt ifieldUIMM26 ( UInt instr ) - return instr & 0x3FFFFFF; - } - -+/* Extract DM field, instr[9:8] */ -+static UChar ifieldDM ( UInt instr ) { -+ return toUChar( IFIELD( instr, 8, 2 ) ); -+} -+ -+/* Extract SHW field, instr[9:8] */ -+static inline UChar ifieldSHW ( UInt instr ) -+{ -+ return ifieldDM ( instr ); -+} - - /*------------------------------------------------------------*/ - /*--- Guest-state identifiers ---*/ -@@ -506,6 +547,12 @@ static IRExpr* mkU64 ( ULong i ) - return IRExpr_Const(IRConst_U64(i)); - } - -+static IRExpr* mkV128 ( UShort i ) -+{ -+ vassert(i == 0 || i == 0xffff); -+ return IRExpr_Const(IRConst_V128(i)); -+} -+ - /* This generates a normal (non load-linked) load. */ - static IRExpr* loadBE ( IRType ty, IRExpr* addr ) - { -@@ -932,43 +979,44 @@ static void putIReg ( UInt archreg, IREx - } - - -+/* Floating point egisters are mapped to VSX registers[0..31]. */ - static Int floatGuestRegOffset ( UInt archreg ) - { - vassert(archreg < 32); - - switch (archreg) { -- case 0: return offsetofPPCGuestState(guest_FPR0); -- case 1: return offsetofPPCGuestState(guest_FPR1); -- case 2: return offsetofPPCGuestState(guest_FPR2); -- case 3: return offsetofPPCGuestState(guest_FPR3); -- case 4: return offsetofPPCGuestState(guest_FPR4); -- case 5: return offsetofPPCGuestState(guest_FPR5); -- case 6: return offsetofPPCGuestState(guest_FPR6); -- case 7: return offsetofPPCGuestState(guest_FPR7); -- case 8: return offsetofPPCGuestState(guest_FPR8); -- case 9: return offsetofPPCGuestState(guest_FPR9); -- case 10: return offsetofPPCGuestState(guest_FPR10); -- case 11: return offsetofPPCGuestState(guest_FPR11); -- case 12: return offsetofPPCGuestState(guest_FPR12); -- case 13: return offsetofPPCGuestState(guest_FPR13); -- case 14: return offsetofPPCGuestState(guest_FPR14); -- case 15: return offsetofPPCGuestState(guest_FPR15); -- case 16: return offsetofPPCGuestState(guest_FPR16); -- case 17: return offsetofPPCGuestState(guest_FPR17); -- case 18: return offsetofPPCGuestState(guest_FPR18); -- case 19: return offsetofPPCGuestState(guest_FPR19); -- case 20: return offsetofPPCGuestState(guest_FPR20); -- case 21: return offsetofPPCGuestState(guest_FPR21); -- case 22: return offsetofPPCGuestState(guest_FPR22); -- case 23: return offsetofPPCGuestState(guest_FPR23); -- case 24: return offsetofPPCGuestState(guest_FPR24); -- case 25: return offsetofPPCGuestState(guest_FPR25); -- case 26: return offsetofPPCGuestState(guest_FPR26); -- case 27: return offsetofPPCGuestState(guest_FPR27); -- case 28: return offsetofPPCGuestState(guest_FPR28); -- case 29: return offsetofPPCGuestState(guest_FPR29); -- case 30: return offsetofPPCGuestState(guest_FPR30); -- case 31: return offsetofPPCGuestState(guest_FPR31); -+ case 0: return offsetofPPCGuestState(guest_VSR0); -+ case 1: return offsetofPPCGuestState(guest_VSR1); -+ case 2: return offsetofPPCGuestState(guest_VSR2); -+ case 3: return offsetofPPCGuestState(guest_VSR3); -+ case 4: return offsetofPPCGuestState(guest_VSR4); -+ case 5: return offsetofPPCGuestState(guest_VSR5); -+ case 6: return offsetofPPCGuestState(guest_VSR6); -+ case 7: return offsetofPPCGuestState(guest_VSR7); -+ case 8: return offsetofPPCGuestState(guest_VSR8); -+ case 9: return offsetofPPCGuestState(guest_VSR9); -+ case 10: return offsetofPPCGuestState(guest_VSR10); -+ case 11: return offsetofPPCGuestState(guest_VSR11); -+ case 12: return offsetofPPCGuestState(guest_VSR12); -+ case 13: return offsetofPPCGuestState(guest_VSR13); -+ case 14: return offsetofPPCGuestState(guest_VSR14); -+ case 15: return offsetofPPCGuestState(guest_VSR15); -+ case 16: return offsetofPPCGuestState(guest_VSR16); -+ case 17: return offsetofPPCGuestState(guest_VSR17); -+ case 18: return offsetofPPCGuestState(guest_VSR18); -+ case 19: return offsetofPPCGuestState(guest_VSR19); -+ case 20: return offsetofPPCGuestState(guest_VSR20); -+ case 21: return offsetofPPCGuestState(guest_VSR21); -+ case 22: return offsetofPPCGuestState(guest_VSR22); -+ case 23: return offsetofPPCGuestState(guest_VSR23); -+ case 24: return offsetofPPCGuestState(guest_VSR24); -+ case 25: return offsetofPPCGuestState(guest_VSR25); -+ case 26: return offsetofPPCGuestState(guest_VSR26); -+ case 27: return offsetofPPCGuestState(guest_VSR27); -+ case 28: return offsetofPPCGuestState(guest_VSR28); -+ case 29: return offsetofPPCGuestState(guest_VSR29); -+ case 30: return offsetofPPCGuestState(guest_VSR30); -+ case 31: return offsetofPPCGuestState(guest_VSR31); - default: break; - } - vpanic("floatGuestRegOffset(ppc)"); /*notreached*/ -@@ -988,44 +1036,117 @@ static void putFReg ( UInt archreg, IREx - stmt( IRStmt_Put(floatGuestRegOffset(archreg), e) ); - } - -+static Int vsxGuestRegOffset ( UInt archreg ) -+{ -+ vassert(archreg < 64); -+ switch (archreg) { -+ case 0: return offsetofPPCGuestState(guest_VSR0); -+ case 1: return offsetofPPCGuestState(guest_VSR1); -+ case 2: return offsetofPPCGuestState(guest_VSR2); -+ case 3: return offsetofPPCGuestState(guest_VSR3); -+ case 4: return offsetofPPCGuestState(guest_VSR4); -+ case 5: return offsetofPPCGuestState(guest_VSR5); -+ case 6: return offsetofPPCGuestState(guest_VSR6); -+ case 7: return offsetofPPCGuestState(guest_VSR7); -+ case 8: return offsetofPPCGuestState(guest_VSR8); -+ case 9: return offsetofPPCGuestState(guest_VSR9); -+ case 10: return offsetofPPCGuestState(guest_VSR10); -+ case 11: return offsetofPPCGuestState(guest_VSR11); -+ case 12: return offsetofPPCGuestState(guest_VSR12); -+ case 13: return offsetofPPCGuestState(guest_VSR13); -+ case 14: return offsetofPPCGuestState(guest_VSR14); -+ case 15: return offsetofPPCGuestState(guest_VSR15); -+ case 16: return offsetofPPCGuestState(guest_VSR16); -+ case 17: return offsetofPPCGuestState(guest_VSR17); -+ case 18: return offsetofPPCGuestState(guest_VSR18); -+ case 19: return offsetofPPCGuestState(guest_VSR19); -+ case 20: return offsetofPPCGuestState(guest_VSR20); -+ case 21: return offsetofPPCGuestState(guest_VSR21); -+ case 22: return offsetofPPCGuestState(guest_VSR22); -+ case 23: return offsetofPPCGuestState(guest_VSR23); -+ case 24: return offsetofPPCGuestState(guest_VSR24); -+ case 25: return offsetofPPCGuestState(guest_VSR25); -+ case 26: return offsetofPPCGuestState(guest_VSR26); -+ case 27: return offsetofPPCGuestState(guest_VSR27); -+ case 28: return offsetofPPCGuestState(guest_VSR28); -+ case 29: return offsetofPPCGuestState(guest_VSR29); -+ case 30: return offsetofPPCGuestState(guest_VSR30); -+ case 31: return offsetofPPCGuestState(guest_VSR31); -+ case 32: return offsetofPPCGuestState(guest_VSR32); -+ case 33: return offsetofPPCGuestState(guest_VSR33); -+ case 34: return offsetofPPCGuestState(guest_VSR34); -+ case 35: return offsetofPPCGuestState(guest_VSR35); -+ case 36: return offsetofPPCGuestState(guest_VSR36); -+ case 37: return offsetofPPCGuestState(guest_VSR37); -+ case 38: return offsetofPPCGuestState(guest_VSR38); -+ case 39: return offsetofPPCGuestState(guest_VSR39); -+ case 40: return offsetofPPCGuestState(guest_VSR40); -+ case 41: return offsetofPPCGuestState(guest_VSR41); -+ case 42: return offsetofPPCGuestState(guest_VSR42); -+ case 43: return offsetofPPCGuestState(guest_VSR43); -+ case 44: return offsetofPPCGuestState(guest_VSR44); -+ case 45: return offsetofPPCGuestState(guest_VSR45); -+ case 46: return offsetofPPCGuestState(guest_VSR46); -+ case 47: return offsetofPPCGuestState(guest_VSR47); -+ case 48: return offsetofPPCGuestState(guest_VSR48); -+ case 49: return offsetofPPCGuestState(guest_VSR49); -+ case 50: return offsetofPPCGuestState(guest_VSR50); -+ case 51: return offsetofPPCGuestState(guest_VSR51); -+ case 52: return offsetofPPCGuestState(guest_VSR52); -+ case 53: return offsetofPPCGuestState(guest_VSR53); -+ case 54: return offsetofPPCGuestState(guest_VSR54); -+ case 55: return offsetofPPCGuestState(guest_VSR55); -+ case 56: return offsetofPPCGuestState(guest_VSR56); -+ case 57: return offsetofPPCGuestState(guest_VSR57); -+ case 58: return offsetofPPCGuestState(guest_VSR58); -+ case 59: return offsetofPPCGuestState(guest_VSR59); -+ case 60: return offsetofPPCGuestState(guest_VSR60); -+ case 61: return offsetofPPCGuestState(guest_VSR61); -+ case 62: return offsetofPPCGuestState(guest_VSR62); -+ case 63: return offsetofPPCGuestState(guest_VSR63); -+ default: break; -+ } -+ vpanic("vsxGuestRegOffset(ppc)"); /*notreached*/ -+} - -+/* Vector registers are mapped to VSX registers[32..63]. */ - static Int vectorGuestRegOffset ( UInt archreg ) - { - vassert(archreg < 32); - - switch (archreg) { -- case 0: return offsetofPPCGuestState(guest_VR0); -- case 1: return offsetofPPCGuestState(guest_VR1); -- case 2: return offsetofPPCGuestState(guest_VR2); -- case 3: return offsetofPPCGuestState(guest_VR3); -- case 4: return offsetofPPCGuestState(guest_VR4); -- case 5: return offsetofPPCGuestState(guest_VR5); -- case 6: return offsetofPPCGuestState(guest_VR6); -- case 7: return offsetofPPCGuestState(guest_VR7); -- case 8: return offsetofPPCGuestState(guest_VR8); -- case 9: return offsetofPPCGuestState(guest_VR9); -- case 10: return offsetofPPCGuestState(guest_VR10); -- case 11: return offsetofPPCGuestState(guest_VR11); -- case 12: return offsetofPPCGuestState(guest_VR12); -- case 13: return offsetofPPCGuestState(guest_VR13); -- case 14: return offsetofPPCGuestState(guest_VR14); -- case 15: return offsetofPPCGuestState(guest_VR15); -- case 16: return offsetofPPCGuestState(guest_VR16); -- case 17: return offsetofPPCGuestState(guest_VR17); -- case 18: return offsetofPPCGuestState(guest_VR18); -- case 19: return offsetofPPCGuestState(guest_VR19); -- case 20: return offsetofPPCGuestState(guest_VR20); -- case 21: return offsetofPPCGuestState(guest_VR21); -- case 22: return offsetofPPCGuestState(guest_VR22); -- case 23: return offsetofPPCGuestState(guest_VR23); -- case 24: return offsetofPPCGuestState(guest_VR24); -- case 25: return offsetofPPCGuestState(guest_VR25); -- case 26: return offsetofPPCGuestState(guest_VR26); -- case 27: return offsetofPPCGuestState(guest_VR27); -- case 28: return offsetofPPCGuestState(guest_VR28); -- case 29: return offsetofPPCGuestState(guest_VR29); -- case 30: return offsetofPPCGuestState(guest_VR30); -- case 31: return offsetofPPCGuestState(guest_VR31); -+ case 0: return offsetofPPCGuestState(guest_VSR32); -+ case 1: return offsetofPPCGuestState(guest_VSR33); -+ case 2: return offsetofPPCGuestState(guest_VSR34); -+ case 3: return offsetofPPCGuestState(guest_VSR35); -+ case 4: return offsetofPPCGuestState(guest_VSR36); -+ case 5: return offsetofPPCGuestState(guest_VSR37); -+ case 6: return offsetofPPCGuestState(guest_VSR38); -+ case 7: return offsetofPPCGuestState(guest_VSR39); -+ case 8: return offsetofPPCGuestState(guest_VSR40); -+ case 9: return offsetofPPCGuestState(guest_VSR41); -+ case 10: return offsetofPPCGuestState(guest_VSR42); -+ case 11: return offsetofPPCGuestState(guest_VSR43); -+ case 12: return offsetofPPCGuestState(guest_VSR44); -+ case 13: return offsetofPPCGuestState(guest_VSR45); -+ case 14: return offsetofPPCGuestState(guest_VSR46); -+ case 15: return offsetofPPCGuestState(guest_VSR47); -+ case 16: return offsetofPPCGuestState(guest_VSR48); -+ case 17: return offsetofPPCGuestState(guest_VSR49); -+ case 18: return offsetofPPCGuestState(guest_VSR50); -+ case 19: return offsetofPPCGuestState(guest_VSR51); -+ case 20: return offsetofPPCGuestState(guest_VSR52); -+ case 21: return offsetofPPCGuestState(guest_VSR53); -+ case 22: return offsetofPPCGuestState(guest_VSR54); -+ case 23: return offsetofPPCGuestState(guest_VSR55); -+ case 24: return offsetofPPCGuestState(guest_VSR56); -+ case 25: return offsetofPPCGuestState(guest_VSR57); -+ case 26: return offsetofPPCGuestState(guest_VSR58); -+ case 27: return offsetofPPCGuestState(guest_VSR59); -+ case 28: return offsetofPPCGuestState(guest_VSR60); -+ case 29: return offsetofPPCGuestState(guest_VSR61); -+ case 30: return offsetofPPCGuestState(guest_VSR62); -+ case 31: return offsetofPPCGuestState(guest_VSR63); - default: break; - } - vpanic("vextorGuestRegOffset(ppc)"); /*notreached*/ -@@ -1045,6 +1166,22 @@ static void putVReg ( UInt archreg, IREx - stmt( IRStmt_Put(vectorGuestRegOffset(archreg), e) ); - } - -+/* Get contents of VSX guest register */ -+static IRExpr* getVSReg ( UInt archreg ) -+{ -+ vassert(archreg < 64); -+ return IRExpr_Get( vsxGuestRegOffset(archreg), Ity_V128 ); -+} -+ -+/* Ditto, but write to a VSX reg instead. */ -+static void putVSReg ( UInt archreg, IRExpr* e ) -+{ -+ vassert(archreg < 64); -+ vassert(typeOfIRExpr(irsb->tyenv, e) == Ity_V128); -+ stmt( IRStmt_Put(vsxGuestRegOffset(archreg), e) ); -+} -+ -+ - static Int guestCR321offset ( UInt cr ) - { - switch (cr) { -@@ -1075,6 +1212,42 @@ static Int guestCR0offset ( UInt cr ) - } - } - -+/* Generate an IR sequence to do a popcount operation on the supplied -+ * IRTemp, and return an IRTemp holding the result. -+ */ -+static IRTemp gen_POPCOUNT ( IRTemp src ) -+{ -+ Int i, shift[6]; -+ IRTemp old = IRTemp_INVALID; -+ IRTemp nyu = IRTemp_INVALID; -+ IRTemp mask[6]; -+ -+ vassert(typeOfIRExpr(irsb->tyenv,mkexpr(src)) == Ity_I64); -+ for (i = 0; i < 6; i++) { -+ mask[i] = newTemp( Ity_I64 ); -+ shift[i] = 1 << i; -+ } -+ assign( mask[0], mkU64( 0x5555555555555555ULL ) ); -+ assign( mask[1], mkU64( 0x3333333333333333ULL ) ); -+ assign( mask[2], mkU64( 0x0F0F0F0F0F0F0F0FULL ) ); -+ assign( mask[3], mkU64( 0x00FF00FF00FF00FFULL ) ); -+ assign( mask[4], mkU64( 0x0000FFFF0000FFFFULL ) ); -+ assign( mask[5], mkU64( 0x00000000FFFFFFFFULL ) ); -+ old = src; -+ for (i = 0; i < 6; i++) { -+ nyu = newTemp( Ity_I64 ); -+ assign( nyu, -+ binop( Iop_Add64, -+ binop( Iop_And64, mkexpr( old ), mkexpr( mask[i] ) ), -+ binop( Iop_And64, -+ binop( Iop_Shr64, mkexpr( old ), mkU8( shift[i] ) ), -+ mkexpr( mask[i] ) ) ) ); -+ old = nyu; -+ } -+ return nyu; -+} -+ -+ - // ROTL(src32/64, rot_amt5/6) - static IRExpr* /* :: Ity_I32/64 */ ROTL ( IRExpr* src, - IRExpr* rot_amt ) -@@ -2345,6 +2518,80 @@ static void putGST_field ( PPC_GST reg, - } - } - -+/*------------------------------------------------------------*/ -+/* Helpers for VSX instructions that do floating point -+ * operations and need to determine if a src contains a -+ * special FP value. -+ * -+ *------------------------------------------------------------*/ -+ -+#define NONZERO_FRAC_MASK 0x000fffffffffffffULL -+#define FP_FRAC_PART(x) binop( Iop_And64, \ -+ mkexpr( x ), \ -+ mkU64( NONZERO_FRAC_MASK ) ) -+ -+// Returns exponent part of floating point as I32 -+static IRExpr * fp_exp_part(IRTemp src) -+{ -+ IRExpr * exp; -+ if (!mode64) -+ exp = binop( Iop_And32, binop( Iop_Shr32, unop( Iop_64HIto32, -+ mkexpr( src ) ), -+ mkU8( 20 ) ), mkU32( 0x7ff ) ); -+ else -+ exp = unop( Iop_64to32, -+ binop( Iop_And64, -+ binop( Iop_Shr64, mkexpr( src ), mkU8( 52 ) ), -+ mkU64( 0x7ff ) ) ); -+ return exp; -+} -+ -+ -+// Infinity: exp = 7ff and fraction is zero; s = 0/1 -+static IRExpr * is_Inf(IRTemp src) -+{ -+ IRExpr * Inf_exp, * hi32, * low32; -+ IRTemp frac_part = newTemp(Ity_I64); -+ -+ assign( frac_part, FP_FRAC_PART(src) ); -+ Inf_exp = binop( Iop_CmpEQ32, fp_exp_part( src ), mkU32( 0x7ff ) ); -+ hi32 = unop( Iop_64HIto32, mkexpr( frac_part ) ); -+ low32 = unop( Iop_64to32, mkexpr( frac_part ) ); -+ return mkAND1( Inf_exp, binop( Iop_CmpEQ32, binop( Iop_Or32, low32, hi32 ), -+ mkU32( 0 ) ) ); -+} -+ -+// Zero: exp is zero and fraction is zero; s = 0/1 -+static IRExpr * is_Zero(IRTemp src) -+{ -+#define SIGN_MASK 0x7fffffffffffffffULL -+ IRExpr * hi32, * low32; -+ IRTemp sign_less_part = newTemp(Ity_I64); -+ -+ assign( sign_less_part, binop( Iop_And64, mkexpr( src ), mkU64( SIGN_MASK ) ) ); -+ hi32 = unop( Iop_64HIto32, mkexpr( sign_less_part ) ); -+ low32 = unop( Iop_64to32, mkexpr( sign_less_part ) ); -+ return binop( Iop_CmpEQ32, binop( Iop_Or32, low32, hi32 ), -+ mkU32( 0 ) ); -+} -+ -+/* SNAN: s = 1/0; exp = 0x7ff; fraction is nonzero, with highest bit '1' -+ * QNAN: s = 1/0; exp = 0x7ff; fraction is nonzero, with highest bit '0' -+ * This function returns an IRExpr value of '1' for any type of NaN. -+ */ -+static IRExpr * is_NaN(IRTemp src) -+{ -+ IRExpr * NaN_exp, * hi32, * low32; -+ IRTemp frac_part = newTemp(Ity_I64); -+ -+ assign( frac_part, FP_FRAC_PART(src) ); -+ hi32 = unop( Iop_64HIto32, mkexpr( frac_part ) ); -+ low32 = unop( Iop_64to32, mkexpr( frac_part ) ); -+ NaN_exp = binop( Iop_CmpEQ32, fp_exp_part( src ), mkU32( 0x7ffULL ) ); -+ -+ return mkAND1( NaN_exp, binop( Iop_CmpNE32, binop( Iop_Or32, low32, hi32 ), -+ mkU32( 0 ) ) ); -+} - - - /*------------------------------------------------------------*/ -@@ -3264,6 +3511,13 @@ static Bool dis_int_logic ( UInt theInst - putFReg( rS_addr, mkexpr(frA)); - return True; - } -+ case 0x1FA: // popcntd (population count doubleword -+ { -+ DIP("popcntd r%u,r%u\n", rA_addr, rS_addr); -+ IRTemp result = gen_POPCOUNT(rS); -+ putIReg( rA_addr, mkexpr(result) ); -+ return True; -+ } - - default: - vex_printf("dis_int_logic(ppc)(opc2)\n"); -@@ -5485,7 +5739,23 @@ static Bool dis_int_ldst_rev ( UInt theI - putIReg( rD_addr, mkWidenFrom32(ty, mkexpr(w2), - /* Signed */False) ); - break; -- -+ -+ case 0x214: // ldbrx (Load Doubleword Byte-Reverse Indexed) -+ { -+ IRExpr * nextAddr; -+ IRTemp w3 = newTemp( Ity_I32 ); -+ IRTemp w4 = newTemp( Ity_I32 ); -+ DIP("ldbrx r%u,r%u,r%u\n", rD_addr, rA_addr, rB_addr); -+ assign( w1, loadBE( Ity_I32, mkexpr( EA ) ) ); -+ assign( w2, gen_byterev32( w1 ) ); -+ nextAddr = binop( mkSzOp( ty, Iop_Add8 ), mkexpr( EA ), -+ ty == Ity_I64 ? mkU64( 4 ) : mkU32( 4 ) ); -+ assign( w3, loadBE( Ity_I32, nextAddr ) ); -+ assign( w4, gen_byterev32( w3 ) ); -+ putIReg( rD_addr, binop( Iop_32HLto64, mkexpr( w4 ), mkexpr( w2 ) ) ); -+ break; -+ } -+ - case 0x396: // sthbrx (Store Half Word Byte-Reverse Indexed, PPC32 p523) - DIP("sthbrx r%u,r%u,r%u\n", rS_addr, rA_addr, rB_addr); - assign( w1, mkNarrowTo32(ty, getIReg(rS_addr)) ); -@@ -6059,6 +6329,17 @@ static Bool dis_fp_load ( UInt theInstr - binop(Iop_32HLto64, mkexpr(iHi), mkexpr(iLo))) ); - break; - -+ case 0x377: // lfiwzx (Load floating-point as integer word, zero indexed -+ { -+ IRTemp dw = newTemp( Ity_I64 ); -+ DIP("lfiwzx fr%u,r%u,r%u\n", frD_addr, rA_addr, rB_addr); -+ assign( EA, ea_rAor0_idxd( rA_addr, rB_addr ) ); -+ assign( iLo, loadBE(Ity_I32, mkexpr(EA)) ); -+ assign( dw, binop( Iop_32HLto64, mkU32( 0 ), mkexpr( iLo ) ) ); -+ putFReg( frD_addr, unop( Iop_ReinterpI64asF64, mkexpr( dw ) ) ); -+ break; -+ } -+ - default: - vex_printf("dis_fp_load(ppc)(opc2)\n"); - return False; -@@ -6591,7 +6872,238 @@ static Bool dis_fp_multadd ( UInt theIns - return True; - } - -+/* -+ * fe_flag is set to 1 if any of the following conditions occurs: -+ * - The double-precision floating-point operand in register FRA is a NaN or an -+ * Infinity. -+ * - The double-precision floating-point operand in register FRB is a Zero, a -+ * NaN, or an Infinity. -+ * - e_b is less than or equal to -1022. -+ * - e_b is greater than or equal to 1021. -+ * - The double-precision floating-point operand in register FRA is not a zero -+ * and the difference, e_a - e_b, is greater than or equal to 1023. -+ * - The double-precision floating-point operand in register FRA is not a zero -+ * and the difference, e_a - e_b, is less than or equal to -1021. -+ * - The double-precision floating-point operand in register FRA is not a zero -+ * and e_a is less than or equal to -970 -+ * Otherwise fe_flag is set to 0. -+ * -+ * fg_flag is set to 1 if either of the following conditions occurs. -+ * - The double-precision floating-point operand in register FRA is an Infinity. -+ * - The double-precision floating-point operand in register FRB is a Zero, an -+ * Infinity, or a denormalized value. -+ * Otherwise fg_flag is set to 0. -+ * -+ */ -+static Bool dis_fp_ftdiv ( UInt theInstr ) -+{ -+ UChar opc1 = ifieldOPC(theInstr); -+ UChar crfD = toUChar( IFIELD( theInstr, 23, 3 ) ); -+ UChar b21to22 = toUChar( IFIELD( theInstr, 21, 2 ) ); -+ UChar frA_addr = ifieldRegA(theInstr); -+ UChar frB_addr = ifieldRegB(theInstr); -+ UChar b0 = ifieldBIT0(theInstr); -+ -+ // The following temps are for holding intermediate results -+ IRTemp frA_I64 = newTemp(Ity_I64); -+ IRTemp frB_I64 = newTemp(Ity_I64); -+ IRTemp e_a = newTemp(Ity_I32); -+ IRTemp e_b = newTemp(Ity_I32); -+ IRTemp frA_exp_shR = newTemp(Ity_I32); -+ IRTemp frB_exp_shR = newTemp(Ity_I32); -+ -+ UInt bias = 1023; -+ -+ /* The following variables hold boolean results from tests -+ * that are OR'ed together for setting the fe_ and fg_ flags. -+ * For some cases, the booleans are used more than once, so -+ * I make those IRTemp's instead of IRExpr's. -+ */ -+ IRExpr * fraNaN, * frbNaN, * frbDenorm; -+ IRExpr * eb_LTE, * eb_GTE, * ea_eb_GTE, * ea_eb_LTE, * ea_LTE; -+ IRTemp fraInf_tmp = newTemp(Ity_I1); -+ IRTemp frbZero_tmp = newTemp(Ity_I1); -+ IRTemp frbInf_tmp = newTemp(Ity_I1); -+ IRTemp fraNotZero_tmp = newTemp(Ity_I1); -+ -+/* The following are the flags that are set by OR'ing the results of -+ * all the tests done for ftdiv. These flags are the input to the specified CR. -+ */ -+ IRExpr * fe_flag, * fl_flag, * fg_flag; -+ -+ -+ if (opc1 != 0x3F || b21to22 != 0 || b0 != 0) { -+ vex_printf("dis_fp_ftdiv(ppc)(instr)\n"); -+ return False; -+ } - -+ // Create temps that will be used throughout the following tests. -+ assign( frA_I64, unop( Iop_ReinterpF64asI64, getFReg( frA_addr ) ) ); -+ assign( frB_I64, unop( Iop_ReinterpF64asI64, getFReg( frB_addr ) ) ); -+ assign( frA_exp_shR, fp_exp_part( frA_I64 ) ); -+ assign( frB_exp_shR, fp_exp_part( frB_I64 ) ); -+ /* Let e_[a|b] be the unbiased exponent: i.e. exp - 1023. */ -+ assign(e_a, binop( Iop_Sub32, mkexpr(frA_exp_shR), mkU32( bias ) )); -+ assign(e_b, binop( Iop_Sub32, mkexpr(frB_exp_shR), mkU32( bias ) )); -+ -+ -+ ////////////////// fe_flag tests BEGIN ////////////////////// -+ /* We first do all tests that may result in setting fe_flag to '1'. */ -+ -+ /* -+ * Test if the double-precision floating-point operand in register FRA is -+ * a NaN: -+ * exp = 7ff and fraction is non-zero; s = 0/1 -+ */ -+ fraNaN = is_NaN(frA_I64); -+ /* -+ * Test if the double-precision floating-point operand in register FRA is -+ * an Infinity. -+ * exp = 7ff and fraction is zero; s = 0/1 -+ */ -+ assign(fraInf_tmp, is_Inf(frA_I64)); -+ -+ /* -+ * Test if the double-precision floating-point operand in register FRB is -+ * a NaN: -+ * exp = 7ff and fraction is non-zero; s = 0/1 -+ */ -+ frbNaN = is_NaN(frB_I64); -+ /* -+ * Test if the double-precision floating-point operand in register FRB is -+ * an Infinity. -+ * exp = 7ff and fraction is zero; s = 0/1 -+ */ -+ assign( frbInf_tmp, is_Inf(frB_I64) ); -+ /* -+ * Test if the double-precision floating-point operand in register FRB is -+ * a Zero. -+ * exp is zero and fraction is zero; s = 0/1 -+ */ -+ assign( frbZero_tmp, is_Zero(frB_I64) ); -+ -+ /* -+ * Test if e_b <= -1022 -+ */ -+ { -+ UInt test_value = 0xfffffc02; //Int test_value = -1022; -+ eb_LTE = binop(Iop_CmpLE32S, mkexpr(e_b), mkU32(test_value)); -+ } -+ -+ /* -+ * Test if e_b >= 1021 -+ * ==> 1021 < e_b -+ */ -+ { -+ Int test_value = 1021; -+ eb_GTE = binop(Iop_CmpLT32S, mkU32(test_value), mkexpr(e_b)); -+ } -+ -+ /* -+ * Test if FRA != Zero and (e_a - e_b) >= 1023 -+ * ==> FRA != Zero && (1023 < (e_a - e_b) -+ */ -+ assign( fraNotZero_tmp, unop( Iop_Not1, is_Zero( frA_I64 ) ) ); -+ ea_eb_GTE = mkAND1( mkexpr( fraNotZero_tmp ), -+ binop( Iop_CmpLT32S, mkU32( bias ), -+ binop( Iop_Sub32, mkexpr( e_a ), -+ mkexpr( e_b ) ) ) ); -+ -+ /* -+ * Test if FRA != Zero and (e_a - e_b) <= -1021 -+ */ -+ { -+ UInt test_value = 0xfffffc03; //Int test_value = -1021; -+ -+ ea_eb_LTE = mkAND1( mkexpr( fraNotZero_tmp ), -+ binop( Iop_CmpLE32S, -+ binop( Iop_Sub32, -+ mkexpr( e_a ), -+ mkexpr( e_b ) ), -+ mkU32( test_value ) ) ); -+ } -+ -+ /* -+ * Test if FRA != Zero and e_a <= -970 -+ */ -+ { -+ UInt test_value = 0xfffffc36; //Int test_value = -970; -+ -+ ea_LTE = mkAND1( mkexpr( fraNotZero_tmp ), binop( Iop_CmpLE32S, -+ mkexpr( e_a ), -+ mkU32( test_value ) ) ); -+ } -+ ////////////////// fe_flag tests END ////////////////////// -+ -+ ////////////////// fg_flag tests BEGIN ////////////////////// -+ /* -+ * The following tests were already performed above in the fe_flag -+ * tests. So these conditions will result in both fe_ and fg_ flags -+ * being set. -+ * - Test if FRA is an Infinity -+ * - Test if FRB ix Zero -+ * - Test if FRB is an Infinity -+ */ -+ -+ /* -+ * Test if FRB holds a denormalized value. A denormalized value is one where -+ * the exp is 0 and the fraction is non-zero. -+ */ -+ { -+ IRExpr * hi32, * low32, * fraction_is_nonzero; -+ IRTemp frac_part = newTemp(Ity_I64); -+ -+ assign( frac_part, FP_FRAC_PART(frB_I64) ); -+ hi32 = unop( Iop_64HIto32, mkexpr( frac_part ) ); -+ low32 = unop( Iop_64to32, mkexpr( frac_part ) ); -+ fraction_is_nonzero = binop( Iop_CmpNE32, binop( Iop_Or32, low32, hi32 ), -+ mkU32( 0 ) ); -+ frbDenorm = mkAND1( binop( Iop_CmpEQ32, mkexpr( frB_exp_shR ), -+ mkU32( 0x0ULL ) ), fraction_is_nonzero ); -+ -+ } -+ ////////////////// fg_flag tests END ////////////////////// -+ -+ ///////////////////////// -+ /* The CR field consists of fl_flag || fg_flag || fe_flag || 0b0 -+ * where fl_flag == 1 on ppc64. -+ */ -+ fl_flag = unop(Iop_Not32, mkU32(0xFFFFFE)); -+ -+ -+ fe_flag -+ = mkOR1( -+ fraNaN, -+ mkOR1( -+ mkexpr( fraInf_tmp ), -+ mkOR1( -+ mkexpr( frbZero_tmp ), -+ mkOR1( -+ frbNaN, -+ mkOR1( -+ mkexpr( frbInf_tmp ), -+ mkOR1( eb_LTE, -+ mkOR1( eb_GTE, -+ mkOR1( ea_eb_GTE, -+ mkOR1( ea_eb_LTE, -+ ea_LTE ) ) ) ) ) ) ) ) ); -+ -+ fe_flag = unop(Iop_1Uto32, fe_flag); -+ -+ fg_flag = mkOR1( mkexpr( fraInf_tmp ), mkOR1( mkexpr( frbZero_tmp ), -+ mkOR1( mkexpr( frbInf_tmp ), -+ frbDenorm ) ) ); -+ fg_flag = unop(Iop_1Uto32, fg_flag); -+ -+ putGST_field( PPC_GST_CR, binop( Iop_Or32, -+ binop( Iop_Or32, -+ binop( Iop_Shl32, fl_flag, mkU8( 3 ) ), -+ binop( Iop_Shl32, fg_flag, mkU8( 2 ) ) ), -+ binop( Iop_Shl32, fe_flag, mkU8( 1 ) ) ), crfD ); -+ -+ DIP("ftdiv crf%d,fr%u,fr%u\n", crfD, frA_addr, frB_addr); -+ return True; -+} - - /* - Floating Point Compare Instructions -@@ -6721,13 +7233,34 @@ static Bool dis_fp_round ( UInt theInstr - simulating exceptions, the exception status will appear to be - zero. Hence cr1 should be cleared if this is a . form insn. */ - Bool clear_CR1 = True; -- -- if (opc1 != 0x3F || b16to20 != 0) { -+ if ((!(opc1 == 0x3F || opc1 == 0x3B)) || b16to20 != 0) { - vex_printf("dis_fp_round(ppc)(instr)\n"); - return False; - } - - assign( frB, getFReg(frB_addr)); -+ // TODO : add support here for fcfdus -+ if (opc1 == 0x3B) { -+ /* The fcfid[u]s instructions (from ISA 2.06) are a bit odd because -+ * they're very similar to the other instructions handled here, but have -+ * a different primary opcode. -+ */ -+ switch (opc2) { -+ case 0x34E: // fcfids (Float convert from signed DWord to single precision) -+ DIP("fcfids%s fr%u,fr%u\n", flag_rC ? ".":"", frD_addr, frB_addr); -+ assign( r_tmp64, unop( Iop_ReinterpF64asI64, mkexpr(frB)) ); -+ assign( frD, binop( Iop_RoundF64toF32, rm, binop( Iop_I64StoF64, rm, -+ mkexpr( r_tmp64 ) ) ) ); -+ goto putFR; -+ -+ case 0x3Ce: // fcfidus (Float convert from unsigned DWord to single precision) -+ DIP("fcfidus%s fr%u,fr%u\n", flag_rC ? ".":"", frD_addr, frB_addr); -+ assign( r_tmp64, unop( Iop_ReinterpF64asI64, mkexpr(frB)) ); -+ assign( frD, binop( Iop_I64UtoF32, rm, mkexpr( r_tmp64 ) ) ); -+ goto putFR; -+ } -+ } -+ - - switch (opc2) { - case 0x00C: // frsp (Float Round to Single, PPC32 p423) -@@ -6780,6 +7313,12 @@ static Bool dis_fp_round ( UInt theInstr - binop(Iop_I64StoF64, rm, mkexpr(r_tmp64)) ); - break; - -+ case 0x3CE: // fcfidu (Float convert from unsigned DWord) -+ DIP("fcfidu%s fr%u,fr%u\n", flag_rC ? ".":"", frD_addr, frB_addr); -+ assign( r_tmp64, unop( Iop_ReinterpF64asI64, mkexpr(frB)) ); -+ assign( frD, binop( Iop_I64UtoF64, rm, mkexpr( r_tmp64 ) ) ); -+ break; -+ - case 0x188: case 0x1A8: case 0x1C8: case 0x1E8: // frin, friz, frip, frim - switch(opc2) { - case 0x188: // frin (Floating Round to Integer Nearest) -@@ -6830,7 +7369,7 @@ static Bool dis_fp_round ( UInt theInstr - vex_printf("dis_fp_round(ppc)(opc2)\n"); - return False; - } -- -+putFR: - putFReg( frD_addr, mkexpr(frD) ); - - if (set_FPRF) { -@@ -7271,6 +7810,722 @@ static Bool dis_av_procctl ( UInt theIns - } - - /* -+ * -+ */ -+static Bool -+dis_vx_conv ( UInt theInstr, UInt opc2 ) -+{ -+ /* XX2-Form */ -+ UChar opc1 = ifieldOPC( theInstr ); -+ UChar XT = ifieldRegXT( theInstr ); -+ UChar XB = ifieldRegXB( theInstr ); -+ IRTemp frB = newTemp(Ity_F64); -+ IRTemp r_tmp64 = newTemp(Ity_I64); -+ IRExpr* rm = get_IR_roundingmode(); -+ -+ if (opc1 != 0x3C) { -+ vex_printf( "dis_vx_conv(ppc)(instr)\n" ); -+ return False; -+ } -+ -+ assign(frB, unop(Iop_ReinterpI64asF64, unop(Iop_V128HIto64, getVSReg( XB )))); -+ /* For all the VSX convert instructions, the contents of doubleword element 1 -+ * of VSX[XT] are undefined after the operation; therefore, we can simply -+ * move the entire array element where it makes sense to do so. -+ */ -+ -+ switch (opc2) { -+ case 0x2B0: -+ // xscvdpsxds (VSX Scalar truncate Double-Precision to integer and Convert -+ // to Signed Integer Doubleword format with Saturate) -+ DIP("xscvdpsxds fr%u,fr%u\n", (UInt)XT, (UInt)XB); -+ putVSReg( XT, -+ binop( Iop_64HLtoV128, binop( Iop_F64toI64S, -+ mkU32( Irrm_ZERO ), -+ mkexpr( frB ) ), mkU64( 0 ) ) ); -+ break; -+ case 0x2F0: -+ // xscvsxddp (VSX Scalar Convert and round Signed Integer Doubleword to -+ // Double-Precision format) -+ DIP("xscvsxddp v%u,v%u\n", (UInt)XT, (UInt)XB); -+ -+ assign( r_tmp64, unop( Iop_ReinterpF64asI64, mkexpr(frB)) ); -+ putVSReg( XT, -+ binop( Iop_64HLtoV128, unop( Iop_ReinterpF64asI64, -+ binop( Iop_I64StoF64, rm, -+ mkexpr( r_tmp64 ) ) ), -+ mkU64( 0 ) ) ); -+ break; -+ case 0x2D0: -+ // xscvuxddp (VSX Scalar Convert and round Unsigned Integer Doubleword to -+ // Double-Precision format) -+ DIP("xscvuxddp v%u,v%u\n", (UInt)XT, (UInt)XB); -+ -+ assign( r_tmp64, unop( Iop_ReinterpF64asI64, mkexpr(frB)) ); -+ putVSReg( XT, -+ binop( Iop_64HLtoV128, unop( Iop_ReinterpF64asI64, -+ binop( Iop_I64UtoF64, rm, -+ mkexpr( r_tmp64 ) ) ), -+ mkU64( 0 ) ) ); -+ break; -+ -+ default: -+ vex_printf( "dis_vx_conv(ppc)(opc2)\n" ); -+ return False; -+ } -+ return True; -+} -+ -+/* -+ * VSX Scalar Floating Point Arithmetic Instructions -+ */ -+static Bool -+dis_vx_arith ( UInt theInstr, UInt opc2 ) -+{ -+ /* XX3-Form */ -+ UChar opc1 = ifieldOPC( theInstr ); -+ UChar XT = ifieldRegXT( theInstr ); -+ UChar XA = ifieldRegXA( theInstr ); -+ UChar XB = ifieldRegXB( theInstr ); -+ IRExpr* rm = get_IR_roundingmode(); -+ IRTemp frA = newTemp(Ity_F64); -+ IRTemp frB = newTemp(Ity_F64); -+ -+ if (opc1 != 0x3C) { -+ vex_printf( "dis_vx_arith(ppc)(instr)\n" ); -+ return False; -+ } -+ -+ assign(frA, unop(Iop_ReinterpI64asF64, unop(Iop_V128HIto64, getVSReg( XA )))); -+ assign(frB, unop(Iop_ReinterpI64asF64, unop(Iop_V128HIto64, getVSReg( XB )))); -+ -+ /* For all the VSX sclar arithmetic instructions, the contents of doubleword element 1 -+ * of VSX[XT] are undefined after the operation; therefore, we can simply set -+ * element to zero where it makes sense to do so. -+ */ -+ switch (opc2) { -+ case 0x080: // xsadddp (VSX scalar add double-precision) -+ DIP("xsadddp v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); -+ putVSReg( XT, binop( Iop_64HLtoV128, unop( Iop_ReinterpF64asI64, -+ triop( Iop_AddF64, rm, -+ mkexpr( frA ), -+ mkexpr( frB ) ) ), -+ mkU64( 0 ) ) ); -+ break; -+ case 0x0E0: // xsdivdp (VSX scalar divide double-precision) -+ DIP("xsdivdp v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); -+ putVSReg( XT, binop( Iop_64HLtoV128, unop( Iop_ReinterpF64asI64, -+ triop( Iop_DivF64, rm, -+ mkexpr( frA ), -+ mkexpr( frB ) ) ), -+ mkU64( 0 ) ) ); -+ break; -+ case 0x084: case 0x0A4: // xsmaddadp, xsmaddmdp (VSX scalar multiply-add double-precision) -+ { -+ IRTemp frT = newTemp(Ity_F64); -+ Bool mdp = opc2 == 0x0A4; -+ DIP("xsmadd%sdp v%d,v%d,v%d\n", mdp ? "m" : "a", (UInt)XT, (UInt)XA, (UInt)XB); -+ assign( frT, unop( Iop_ReinterpI64asF64, unop( Iop_V128HIto64, -+ getVSReg( XT ) ) ) ); -+ putVSReg( XT, binop( Iop_64HLtoV128, unop( Iop_ReinterpF64asI64, -+ qop( Iop_MAddF64, rm, -+ mkexpr( frA ), -+ mkexpr( mdp ? frT : frB ), -+ mkexpr( mdp ? frB : frT ) ) ), -+ mkU64( 0 ) ) ); -+ break; -+ } -+ case 0x0C4: case 0x0E4: // xsmsubadp, xsmsubmdp (VSX scalar multiply-subtract double-precision) -+ { -+ IRTemp frT = newTemp(Ity_F64); -+ Bool mdp = opc2 == 0x0E4; -+ DIP("xsmsub%sdp v%d,v%d,v%d\n", mdp ? "m" : "a", (UInt)XT, (UInt)XA, (UInt)XB); -+ assign( frT, unop( Iop_ReinterpI64asF64, unop( Iop_V128HIto64, -+ getVSReg( XT ) ) ) ); -+ putVSReg( XT, binop( Iop_64HLtoV128, unop( Iop_ReinterpF64asI64, -+ qop( Iop_MSubF64, rm, -+ mkexpr( frA ), -+ mkexpr( mdp ? frT : frB ), -+ mkexpr( mdp ? frB : frT ) ) ), -+ mkU64( 0 ) ) ); -+ break; -+ } -+ case 0x284: case 0x2A4: // xsnmaddadp, xsnmaddmdp (VSX scalar multiply-add double-precision) -+ { -+ /* TODO: mpj -- Naturally, I expected to be able to leverage the implementation -+ * of fnmadd and use pretty much the same code. However, that code has a bug in the -+ * way it blindly negates the signbit, even if the floating point result is a NaN. -+ * So, the TODO is to fix fnmadd (which I'll do in a different patch). -+ */ -+ ULong signbit_mask = 0x8000000000000000ULL; -+ Bool mdp = opc2 == 0x2A4; -+ IRTemp frT = newTemp(Ity_F64); -+ IRTemp maddResult = newTemp(Ity_I64); -+ IRTemp negatedResult = newTemp(Ity_I64); -+ IRTemp signbit_32 = newTemp(Ity_I32); -+ IRTemp resultantSignbit = newTemp(Ity_I1); -+ -+ DIP("xsnmadd%sdp v%d,v%d,v%d\n", mdp ? "m" : "a", (UInt)XT, (UInt)XA, (UInt)XB); -+ assign( frT, unop( Iop_ReinterpI64asF64, unop( Iop_V128HIto64, -+ getVSReg( XT ) ) ) ); -+ assign( maddResult, unop( Iop_ReinterpF64asI64, qop( Iop_MAddF64, rm, -+ mkexpr( frA ), -+ mkexpr( mdp ? frT : frB ), -+ mkexpr( mdp ? frB : frT ) ) ) ); -+ assign( signbit_32, binop( Iop_Shr32, -+ unop( Iop_64HIto32, -+ binop( Iop_And64, mkexpr( maddResult ), -+ mkU64( signbit_mask ) ) ), -+ mkU8( 31 ) ) ); -+ /* We negate the signbit if and only if the intermediate result from the -+ * multiply-add was NOT a NaN. This is an XNOR predicate. -+ */ -+ assign( resultantSignbit, -+ unop( Iop_Not1, -+ binop( Iop_CmpEQ32, -+ binop( Iop_Xor32, mkexpr( signbit_32 ), -+ unop( Iop_1Uto32, -+ is_NaN( maddResult ) ) ), -+ mkU32( 1 ) ) ) ); -+ -+ assign( negatedResult, -+ binop( Iop_Or64, binop( Iop_And64, mkexpr( maddResult ), -+ mkU64( ~signbit_mask ) ), -+ binop( Iop_32HLto64, -+ binop( Iop_Shl32, -+ unop( Iop_1Uto32, -+ mkexpr( resultantSignbit ) ), -+ mkU8( 31 ) ), mkU32( 0 ) ) ) ); -+ -+ putVSReg( XT, binop( Iop_64HLtoV128, mkexpr( negatedResult ), -+ mkU64( 0 ) ) ); -+ break; -+ } -+ case 0x0C0: // xsmuldp (VSX Scalar Multiply Double-Precision) -+ DIP("xsmuldp v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); -+ putVSReg( XT, binop( Iop_64HLtoV128, unop( Iop_ReinterpF64asI64, -+ triop( Iop_MulF64, rm, -+ mkexpr( frA ), -+ mkexpr( frB ) ) ), -+ mkU64( 0 ) ) ); -+ break; -+ case 0x0A0: // xssubdp (VSX Scalar Subtract Double-Precision) -+ DIP("xssubdp v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); -+ putVSReg( XT, binop( Iop_64HLtoV128, unop( Iop_ReinterpF64asI64, -+ triop( Iop_SubF64, rm, -+ mkexpr( frA ), -+ mkexpr( frB ) ) ), -+ mkU64( 0 ) ) ); -+ break; -+ -+ default: -+ vex_printf( "dis_vx_arith(ppc)(opc2)\n" ); -+ return False; -+ } -+ return True; -+} -+ -+/* -+ * VSX Floating Point Compare Instructions -+ */ -+static Bool -+dis_vx_cmp( UInt theInstr, UInt opc2 ) -+{ -+ /* XX3-Form and XX2-Form */ -+ UChar opc1 = ifieldOPC( theInstr ); -+ UChar crfD = toUChar( IFIELD( theInstr, 23, 3 ) ); -+ IRTemp ccPPC32 = newTemp(Ity_I32); -+ IRTemp ccIR = newTemp(Ity_I32); -+ UChar XA = ifieldRegXA ( theInstr ); -+ UChar XB = ifieldRegXB ( theInstr ); -+ IRTemp frA = newTemp(Ity_F64); -+ IRTemp frB = newTemp(Ity_F64); -+ -+ if (opc1 != 0x3C) { -+ vex_printf( "dis_vx_cmp(ppc)(instr)\n" ); -+ return False; -+ } -+ -+ assign(frA, unop(Iop_ReinterpI64asF64, unop(Iop_V128HIto64, getVSReg( XA )))); -+ assign(frB, unop(Iop_ReinterpI64asF64, unop(Iop_V128HIto64, getVSReg( XB )))); -+ switch (opc2) { -+ case 0x08C: case 0x0AC: // xscmpudp, xscmpodp -+ /* Note: Differences between xscmpudp and xscmpodp are only in -+ * exception flag settings, which aren't supported anyway. */ -+ DIP("xscmp%sdp crf%d,fr%u,fr%u\n", opc2 == 0x08c ? "u" : "o", -+ crfD, (UInt)XA, (UInt)XB); -+ assign( ccIR, binop(Iop_CmpF64, mkexpr(frA), mkexpr(frB)) ); -+ -+ /* Map compare result from IR to PPC32 */ -+ /* -+ FP cmp result | PPC | IR -+ -------------------------- -+ UN | 0x1 | 0x45 -+ EQ | 0x2 | 0x40 -+ GT | 0x4 | 0x00 -+ LT | 0x8 | 0x01 -+ */ -+ -+ // ccPPC32 = Shl(1, (~(ccIR>>5) & 2) -+ // | ((ccIR ^ (ccIR>>6)) & 1) -+ assign( -+ ccPPC32, -+ binop( -+ Iop_Shl32, -+ mkU32(1), -+ unop( -+ Iop_32to8, -+ binop( -+ Iop_Or32, -+ binop( -+ Iop_And32, -+ unop( -+ Iop_Not32, -+ binop(Iop_Shr32, mkexpr(ccIR), mkU8(5)) -+ ), -+ mkU32(2) -+ ), -+ binop( -+ Iop_And32, -+ binop( -+ Iop_Xor32, -+ mkexpr(ccIR), -+ binop(Iop_Shr32, mkexpr(ccIR), mkU8(6)) -+ ), -+ mkU32(1) -+ ) -+ ) -+ ) -+ ) -+ ); -+ -+ putGST_field( PPC_GST_CR, mkexpr(ccPPC32), crfD ); -+ -+ break; -+ default: -+ vex_printf( "dis_vx_cmp(ppc)(opc2)\n" ); -+ return False; -+ } -+ return True; -+} -+/* -+ * VSX Move Instructions -+ */ -+static Bool -+dis_vx_move( UInt theInstr, UInt opc2 ) -+{ -+ /* XX3-Form and XX2-Form */ -+ UChar opc1 = ifieldOPC( theInstr ); -+ UChar XT = ifieldRegXT ( theInstr ); -+ UChar XA = ifieldRegXA ( theInstr ); -+ UChar XB = ifieldRegXB ( theInstr ); -+ IRTemp vA = newTemp( Ity_V128 ); -+ IRTemp vB = newTemp( Ity_V128 ); -+ -+ if (opc1 != 0x3C) { -+ vex_printf( "dis_vx_move(ppc)(instr)\n" ); -+ return False; -+ } -+ -+ assign( vA, getVSReg( XA ) ); -+ assign( vB, getVSReg( XB ) ); -+ -+ /* For all the VSX move instructions, the contents of doubleword element 1 -+ * of VSX[XT] are undefined after the operation; therefore, we can simply -+ * move the entire array element where it makes sense to do so. -+ */ -+ -+ switch (opc2) { -+ case 0x2B2: // xsabsdp (VSX scalar absolute value double-precision -+ { -+ /* Move abs val of dw 0 of VSX[XB] to dw 0 of VSX[XT]. */ -+ IRTemp absVal = newTemp(Ity_V128); -+ assign(absVal, binop(Iop_ShrV128, binop(Iop_ShlV128, mkexpr(vB), mkU8(1)), mkU8(1))); -+ DIP("xsabsdp v%d,v%d\n", (UInt)XT, (UInt)XB); -+ putVSReg(XT, mkexpr(absVal)); -+ break; -+ } -+ case 0x2C0: // xscpsgndp -+ { -+ /* Scalar copy sign double-precision */ -+ IRTemp vecA_signbit = newTemp(Ity_V128); -+ IRTemp vecB_no_signbit = newTemp(Ity_V128); -+ IRTemp vec_result = newTemp(Ity_V128); -+ DIP("xscpsgndp v%d,v%d v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); -+ assign( vecB_no_signbit, binop( Iop_ShrV128, binop( Iop_ShlV128, -+ mkexpr( vB ), -+ mkU8( 1 ) ), -+ mkU8( 1 ) ) ); -+ assign( vecA_signbit, binop( Iop_ShlV128, binop( Iop_ShrV128, -+ mkexpr( vA ), -+ mkU8( 127 ) ), -+ mkU8( 127 ) ) ); -+ assign( vec_result, binop( Iop_OrV128, mkexpr(vecA_signbit), mkexpr( vecB_no_signbit ) ) ); -+ putVSReg(XT, mkexpr(vec_result)); -+ break; -+ } -+ case 0x2D2: // xsnabsdp -+ { -+ /* Scalar negative absolute value double-precision */ -+ IRTemp vec_neg_signbit = newTemp(Ity_V128); -+ DIP("xsnabsdp v%d,v%d\n", (UInt)XT, (UInt)XB); -+ assign( vec_neg_signbit, unop( Iop_NotV128, binop( Iop_ShrV128, -+ mkV128( 0xffff ), -+ mkU8( 1 ) ) ) ); -+ putVSReg(XT, binop(Iop_OrV128, mkexpr(vec_neg_signbit), mkexpr(vB))); -+ break; -+ } -+ case 0x2F2: // xsnegdp -+ { -+ /* Scalar negate double-precision */ -+ IRTemp vecB_no_signbit = newTemp(Ity_V128); -+ IRTemp vecB_signbit_comp = newTemp(Ity_V128); -+ DIP("xsnabsdp v%d,v%d\n", (UInt)XT, (UInt)XB); -+ assign( vecB_no_signbit, binop( Iop_ShrV128, binop( Iop_ShlV128, -+ mkexpr( vB ), -+ mkU8( 1 ) ), -+ mkU8( 1 ) ) ); -+ assign( vecB_signbit_comp, binop( Iop_ShlV128, -+ unop( Iop_NotV128, -+ binop( Iop_ShrV128, -+ mkexpr( vB ), -+ mkU8( 127 ) ) ), -+ mkU8( 127 ) ) ); -+ putVSReg( XT, binop( Iop_OrV128, mkexpr( vecB_no_signbit ), -+ mkexpr( vecB_signbit_comp ) ) ); -+ break; -+ } -+ -+ default: -+ vex_printf( "dis_vx_move(ppc)(opc2)\n" ); -+ return False; -+ } -+ return True; -+} -+ -+/* -+ * VSX Logical Instructions -+ */ -+static Bool -+dis_vx_logic ( UInt theInstr, UInt opc2 ) -+{ -+ /* XX3-Form */ -+ UChar opc1 = ifieldOPC( theInstr ); -+ UChar XT = ifieldRegXT ( theInstr ); -+ UChar XA = ifieldRegXA ( theInstr ); -+ UChar XB = ifieldRegXB ( theInstr ); -+ IRTemp vA = newTemp( Ity_V128 ); -+ IRTemp vB = newTemp( Ity_V128 ); -+ -+ if (opc1 != 0x3C) { -+ vex_printf( "dis_vx_logic(ppc)(instr)\n" ); -+ return False; -+ } -+ -+ assign( vA, getVSReg( XA ) ); -+ assign( vB, getVSReg( XB ) ); -+ -+ switch (opc2) { -+ case 0x268: // xxlxor -+ DIP("xxlxor v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); -+ putVSReg( XT, binop( Iop_XorV128, mkexpr( vA ), mkexpr( vB ) ) ); -+ break; -+ case 0x248: // xxlor -+ DIP("xxlor v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); -+ putVSReg( XT, binop( Iop_OrV128, mkexpr( vA ), mkexpr( vB ) ) ); -+ break; -+ case 0x288: // xxlnor -+ DIP("xxlnor v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); -+ putVSReg( XT, unop( Iop_NotV128, binop( Iop_OrV128, mkexpr( vA ), -+ mkexpr( vB ) ) ) ); -+ break; -+ case 0x208: // xxland -+ DIP("xxland v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); -+ putVSReg( XT, binop( Iop_AndV128, mkexpr( vA ), mkexpr( vB ) ) ); -+ break; -+ case 0x228: //xxlandc -+ DIP("xxlandc v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); -+ putVSReg( XT, binop( Iop_AndV128, mkexpr( vA ), unop( Iop_NotV128, -+ mkexpr( vB ) ) ) ); -+ break; -+ default: -+ vex_printf( "dis_vx_logic(ppc)(opc2)\n" ); -+ return False; -+ } -+ return True; -+} -+ -+/* -+ * VSX Load Instructions -+ * NOTE: VSX supports word-aligned storage access. -+ */ -+static Bool -+dis_vx_load ( UInt theInstr ) -+{ -+ /* XX1-Form */ -+ UChar opc1 = ifieldOPC( theInstr ); -+ UChar XT = ifieldRegXT ( theInstr ); -+ UChar rA_addr = ifieldRegA( theInstr ); -+ UChar rB_addr = ifieldRegB( theInstr ); -+ UInt opc2 = ifieldOPClo10( theInstr ); -+ -+ IRType ty = mode64 ? Ity_I64 : Ity_I32; -+ IRTemp EA = newTemp( ty ); -+ -+ if (opc1 != 0x1F) { -+ vex_printf( "dis_vx_load(ppc)(instr)\n" ); -+ return False; -+ } -+ -+ assign( EA, ea_rAor0_idxd( rA_addr, rB_addr ) ); -+ -+ switch (opc2) { -+ case 0x24C: // lxsdx -+ { -+ IRExpr * exp; -+ DIP("lxsdx %d,r%u,r%u\n", (UInt)XT, rA_addr, rB_addr); -+ exp = loadBE( Ity_I64, mkexpr( EA ) ); -+ // We need to pass an expression of type Ity_V128 with putVSReg, but the load -+ // we just performed is only a DW. But since the contents of VSR[XT] element 1 -+ // are undefined after this operation, we can just do a splat op. -+ putVSReg( XT, binop( Iop_64HLtoV128, exp, exp ) ); -+ break; -+ } -+ case 0x34C: // lxvd2x -+ { -+ IROp addOp = ty == Ity_I64 ? Iop_Add64 : Iop_Add32; -+ IRExpr * high, *low; -+ ULong ea_off = 8; -+ IRExpr* high_addr; -+ DIP("lxvd2x %d,r%u,r%u\n", (UInt)XT, rA_addr, rB_addr); -+ high = loadBE( Ity_I64, mkexpr( EA ) ); -+ high_addr = binop( addOp, mkexpr( EA ), ty == Ity_I64 ? mkU64( ea_off ) -+ : mkU32( ea_off ) ); -+ low = loadBE( Ity_I64, high_addr ); -+ putVSReg( XT, binop( Iop_64HLtoV128, high, low ) ); -+ break; -+ } -+ case 0x14C: // lxvdsx -+ { -+ IRTemp data = newTemp(Ity_I64); -+ DIP("lxvdsx %d,r%u,r%u\n", (UInt)XT, rA_addr, rB_addr); -+ assign( data, loadBE( Ity_I64, mkexpr( EA ) ) ); -+ putVSReg( XT, binop( Iop_64HLtoV128, mkexpr( data ), mkexpr( data ) ) ); -+ break; -+ } -+ case 0x30C: -+ { -+ IRExpr * t3, *t2, *t1, *t0; -+ UInt ea_off = 0; -+ IRExpr* irx_addr; -+ -+ DIP("lxvw4x %d,r%u,r%u\n", (UInt)XT, rA_addr, rB_addr); -+ t3 = loadBE( Ity_I32, mkexpr( EA ) ); -+ ea_off += 4; -+ irx_addr = binop( mkSzOp( ty, Iop_Add8 ), mkexpr( EA ), -+ ty == Ity_I64 ? mkU64( ea_off ) : mkU32( ea_off ) ); -+ t2 = loadBE( Ity_I32, irx_addr ); -+ ea_off += 4; -+ irx_addr = binop( mkSzOp( ty, Iop_Add8 ), mkexpr( EA ), -+ ty == Ity_I64 ? mkU64( ea_off ) : mkU32( ea_off ) ); -+ t1 = loadBE( Ity_I32, irx_addr ); -+ ea_off += 4; -+ irx_addr = binop( mkSzOp( ty, Iop_Add8 ), mkexpr( EA ), -+ ty == Ity_I64 ? mkU64( ea_off ) : mkU32( ea_off ) ); -+ t0 = loadBE( Ity_I32, irx_addr ); -+ putVSReg( XT, binop( Iop_64HLtoV128, binop( Iop_32HLto64, t3, t2 ), -+ binop( Iop_32HLto64, t1, t0 ) ) ); -+ break; -+ } -+ default: -+ vex_printf( "dis_vx_load(ppc)(opc2)\n" ); -+ return False; -+ } -+ return True; -+} -+ -+/* -+ * VSX Store Instructions -+ * NOTE: VSX supports word-aligned storage access. -+ */ -+static Bool -+dis_vx_store ( UInt theInstr ) -+{ -+ /* XX1-Form */ -+ UChar opc1 = ifieldOPC( theInstr ); -+ UChar XS = ifieldRegXS( theInstr ); -+ UChar rA_addr = ifieldRegA( theInstr ); -+ UChar rB_addr = ifieldRegB( theInstr ); -+ IRTemp vS = newTemp( Ity_V128 ); -+ UInt opc2 = ifieldOPClo10( theInstr ); -+ -+ IRType ty = mode64 ? Ity_I64 : Ity_I32; -+ IRTemp EA = newTemp( ty ); -+ -+ if (opc1 != 0x1F) { -+ vex_printf( "dis_vx_store(ppc)(instr)\n" ); -+ return False; -+ } -+ -+ assign( EA, ea_rAor0_idxd( rA_addr, rB_addr ) ); -+ assign( vS, getVSReg( XS ) ); -+ -+ switch (opc2) { -+ case 0x2CC: -+ { -+ IRExpr * high64; -+ DIP("stxsdx %d,r%u,r%u\n", (UInt)XS, rA_addr, rB_addr); -+ high64 = unop( Iop_V128HIto64, mkexpr( vS ) ); -+ storeBE( mkexpr( EA ), high64 ); -+ break; -+ } -+ case 0x3CC: -+ { -+ IRExpr * high64, *low64; -+ DIP("stxvd2x %d,r%u,r%u\n", (UInt)XS, rA_addr, rB_addr); -+ high64 = unop( Iop_V128HIto64, mkexpr( vS ) ); -+ low64 = unop( Iop_V128to64, mkexpr( vS ) ); -+ storeBE( mkexpr( EA ), high64 ); -+ storeBE( binop( mkSzOp( ty, Iop_Add8 ), mkexpr( EA ), ty == Ity_I64 ? mkU64( 8 ) -+ : mkU32( 8 ) ), low64 ); -+ break; -+ } -+ case 0x38C: -+ { -+ UInt ea_off = 0; -+ IRExpr* irx_addr; -+ IRTemp hi64 = newTemp( Ity_I64 ); -+ IRTemp lo64 = newTemp( Ity_I64 ); -+ -+ DIP("stxvw4x %d,r%u,r%u\n", (UInt)XS, rA_addr, rB_addr); -+ -+ // This instruction supports word-aligned stores, so EA may not be -+ // quad-word aligned. Therefore, do 4 individual word-size stores. -+ assign( hi64, unop( Iop_V128HIto64, mkexpr( vS ) ) ); -+ assign( lo64, unop( Iop_V128to64, mkexpr( vS ) ) ); -+ -+ storeBE( mkexpr( EA ), unop( Iop_64HIto32, mkexpr( hi64 ) ) ); -+ ea_off += 4; -+ irx_addr = binop( mkSzOp( ty, Iop_Add8 ), mkexpr( EA ), -+ ty == Ity_I64 ? mkU64( ea_off ) : mkU32( ea_off ) ); -+ storeBE( irx_addr, unop( Iop_64to32, mkexpr( hi64 ) ) ); -+ ea_off += 4; -+ irx_addr = binop( mkSzOp( ty, Iop_Add8 ), mkexpr( EA ), -+ ty == Ity_I64 ? mkU64( ea_off ) : mkU32( ea_off ) ); -+ storeBE( irx_addr, unop( Iop_64HIto32, mkexpr( lo64 ) ) ); -+ ea_off += 4; -+ irx_addr = binop( mkSzOp( ty, Iop_Add8 ), mkexpr( EA ), -+ ty == Ity_I64 ? mkU64( ea_off ) : mkU32( ea_off ) ); -+ storeBE( irx_addr, unop( Iop_64to32, mkexpr( lo64 ) ) ); -+ -+ break; -+ } -+ default: -+ vex_printf( "dis_vx_store(ppc)(opc2)\n" ); -+ return False; -+ } -+ return True; -+} -+ -+/* -+ * VSX Permute Instructions -+ */ -+static Bool -+dis_vx_permute( UInt theInstr, UInt opc2 ) -+{ -+ /* XX3-Form */ -+ UChar opc1 = ifieldOPC( theInstr ); -+ UChar XT = ifieldRegXT ( theInstr ); -+ UChar XA = ifieldRegXA ( theInstr ); -+ UChar XB = ifieldRegXB ( theInstr ); -+ IRTemp vT = newTemp( Ity_V128 ); -+ IRTemp vA = newTemp( Ity_V128 ); -+ IRTemp vB = newTemp( Ity_V128 ); -+ -+ if (opc1 != 0x3C) { -+ vex_printf( "dis_vx_permute(ppc)(instr)\n" ); -+ return False; -+ } -+ -+ assign( vA, getVSReg( XA ) ); -+ assign( vB, getVSReg( XB ) ); -+ -+ switch (opc2) { -+ case 0x8: // xxsldwi (VSX Shift Left Double by Word Immediate) -+ { -+ UChar SHW = ifieldSHW ( theInstr ); -+ IRTemp result = newTemp(Ity_V128); -+ if ( SHW != 0 ) { -+ IRTemp hi = newTemp(Ity_V128); -+ IRTemp lo = newTemp(Ity_V128); -+ assign( hi, binop(Iop_ShlV128, mkexpr(vA), mkU8(SHW*32)) ); -+ assign( lo, binop(Iop_ShrV128, mkexpr(vB), mkU8(128-SHW*32)) ); -+ assign ( result, binop(Iop_OrV128, mkexpr(hi), mkexpr(lo)) ); -+ } else -+ assign ( result, mkexpr(vA) ); -+ DIP("xxsldwi v%d,v%d,v%d,%d\n", (UInt)XT, (UInt)XA, (UInt)XB, (UInt)SHW); -+ putVSReg( XT, mkexpr(result) ); -+ break; -+ } -+ case 0x28: // xpermdi (VSX Permute Doubleword Immediate) -+ { -+ UChar DM = ifieldDM ( theInstr ); -+ IRTemp hi = newTemp(Ity_I64); -+ IRTemp lo = newTemp(Ity_I64); -+ -+ if (DM & 0x2) -+ assign( hi, unop(Iop_V128to64, mkexpr(vA)) ); -+ else -+ assign( hi, unop(Iop_V128HIto64, mkexpr(vA)) ); -+ -+ if (DM & 0x1) -+ assign( lo, unop(Iop_V128to64, mkexpr(vB)) ); -+ else -+ assign( lo, unop(Iop_V128HIto64, mkexpr(vB)) ); -+ -+ assign( vT, binop(Iop_64HLtoV128, mkexpr(hi), mkexpr(lo)) ); -+ -+ DIP("xxpermdi v%d,v%d,v%d,0x%x\n", (UInt)XT, (UInt)XA, (UInt)XB, (UInt)DM); -+ putVSReg( XT, mkexpr( vT ) ); -+ break; -+ } -+ case 0x48: // xxmrghw (VSX Merge High Word) -+ case 0xc8: // xxmrglw (VSX Merge Low Word) -+ { -+ char type = (opc2 == 0x48) ? 'h' : 'l'; -+ IROp word_op = (opc2 == 0x48) ? Iop_V128HIto64 : Iop_V128to64; -+ IRTemp a64 = newTemp(Ity_I64); -+ IRTemp ahi32 = newTemp(Ity_I32); -+ IRTemp alo32 = newTemp(Ity_I32); -+ IRTemp b64 = newTemp(Ity_I64); -+ IRTemp bhi32 = newTemp(Ity_I32); -+ IRTemp blo32 = newTemp(Ity_I32); -+ -+ assign( a64, unop(word_op, mkexpr(vA)) ); -+ assign( ahi32, unop(Iop_64HIto32, mkexpr(a64)) ); -+ assign( alo32, unop(Iop_64to32, mkexpr(a64)) ); -+ -+ assign( b64, unop(word_op, mkexpr(vB)) ); -+ assign( bhi32, unop(Iop_64HIto32, mkexpr(b64)) ); -+ assign( blo32, unop(Iop_64to32, mkexpr(b64)) ); -+ -+ assign( vT, binop(Iop_64HLtoV128, -+ binop(Iop_32HLto64, mkexpr(ahi32), mkexpr(bhi32)), -+ binop(Iop_32HLto64, mkexpr(alo32), mkexpr(blo32))) ); -+ -+ DIP("xxmrg%cw v%d,v%d,v%d\n", type, (UInt)XT, (UInt)XA, (UInt)XB); -+ putVSReg( XT, mkexpr( vT ) ); -+ break; -+ } -+ -+ default: -+ vex_printf( "dis_vx_permute(ppc)(opc2)\n" ); -+ return False; -+ } -+ return True; -+} -+ -+/* - AltiVec Load Instructions - */ - static Bool dis_av_load ( VexAbiInfo* vbi, UInt theInstr ) -@@ -7400,7 +8655,6 @@ static Bool dis_av_load ( VexAbiInfo* vb - return True; - } - -- - /* - AltiVec Store Instructions - */ -@@ -9238,8 +10492,221 @@ static Bool dis_av_fp_convert ( UInt the - } - - -+/* The 0x3C primary opcode (VSX category) uses several different forms of -+ * extended opcodes: -+ * o XX2-form: -+ * - [10:2] (IBM notation [21:29]) -+ * o XX3-form variants: -+ * - variant 1: [10:3] (IBM notation [21:28]) -+ * - variant 2: [9:3] (IBM notation [22:28]) -+ * - variant 3: [7:3] (IBM notation [24:28]) -+ * o XX-4 form: -+ * - [10:6] (IBM notation [21:25]) -+ * -+ * The XX2-form needs bit 0 masked from the standard extended opcode -+ * as returned by ifieldOPClo10; the XX3-form needs bits 0 and 1 masked; -+ * and the XX4-form needs bits 0, 1, and 2 masked. Additionally, the -+ * XX4 and XX3 (variants 2 and 3) forms need certain bits masked on the -+ * front end since their encoding does not begin at bit 21 like the standard -+ * format. -+ * -+ * The get_VSX60_opc2() function uses the vsx_insn array below to obtain the -+ * secondary opcode for such VSX instructions. -+ * -+*/ -+ -+ -+struct vsx_insn { -+ UInt opcode; -+ Char * name; -+}; -+ -+// ATTENTION: Keep this array sorted on the opcocde!!! -+static struct vsx_insn vsx_all[] = { -+ { 0x8, "xxsldwi" }, -+ { 0x18, "xxsel" }, -+ { 0x28, "xxpermdi" }, -+ { 0x48, "xxmrghw" }, -+ { 0x80, "xsadddp" }, -+ { 0x84, "xsmaddadp" }, -+ { 0x8c, "xscmpudp" }, -+ { 0x90, "xscvdpuxws" }, -+ { 0x92, "xsrdpi" }, -+ { 0x94, "xsrsqrtedp" }, -+ { 0x96, "xssqrtdp" }, -+ { 0xa0, "xssubdp" }, -+ { 0xa4, "xsmaddmdp" }, -+ { 0xac, "xscmpodp" }, -+ { 0xb0, "xscvdpsxws" }, -+ { 0xb2, "xsrdpiz" }, -+ { 0xb4, "xsredp" }, -+ { 0xc0, "xsmuldp" }, -+ { 0xc4, "xsmsubadp" }, -+ { 0xc8, "xxmrglw" }, -+ { 0xd2, "xsrdpip" }, -+ { 0xd4, "xstsqrtdp" }, -+ { 0xd6, "xsrdpic" }, -+ { 0xe0, "xsdivdp" }, -+ { 0xe4, "xsmsubmdp" }, -+ { 0xf2, "xsrdpim" }, -+ { 0xf4, "xstdivdp" }, -+ { 0x100, "xvaddsp" }, -+ { 0x104, "xvmaddasp" }, -+ { 0x10c, "xvcmpeqsp" }, -+ { 0x110, "xvcvspuxws" }, -+ { 0x112, "xvrspi" }, -+ { 0x114, "xvrsqrtesp" }, -+ { 0x116, "xvsqrtsp" }, -+ { 0x120, "xvsubsp" }, -+ { 0x124, "xvmaddmsp" }, -+ { 0x12c, "xvcmpgtsp" }, -+ { 0x130, "xvcvspsxws" }, -+ { 0x132, "xvrspiz" }, -+ { 0x134, "xvresp" }, -+ { 0x140, "xvmulsp" }, -+ { 0x144, "xvmsubasp" }, -+ { 0x148, "xxspltw" }, -+ { 0x14c, "xvcmpgesp" }, -+ { 0x150, "xvcvuxwsp" }, -+ { 0x152, "xvrspip" }, -+ { 0x154, "xvtsqrtsp" }, -+ { 0x156, "xvrspic" }, -+ { 0x160, "xvdivsp" }, -+ { 0x164, "xvmsubmsp" }, -+ { 0x170, "xvcvsxwsp" }, -+ { 0x172, "xvrspim" }, -+ { 0x174, "xvtdivsp" }, -+ { 0x180, "xvadddp" }, -+ { 0x184, "xvmaddadp" }, -+ { 0x18c, "xvcmpeqdp" }, -+ { 0x190, "xvcvdpuxws" }, -+ { 0x192, "xvrdpi" }, -+ { 0x194, "xvrsqrtedp" }, -+ { 0x196, "xvsqrtdp" }, -+ { 0x1a0, "xvsubdp" }, -+ { 0x1a4, "xvmaddmdp" }, -+ { 0x1ac, "xvcmpgtdp" }, -+ { 0x1b0, "xvcvdpsxws" }, -+ { 0x1b2, "xvrdpiz" }, -+ { 0x1b4, "xvredp" }, -+ { 0x1c0, "xvmuldp" }, -+ { 0x1c4, "xvmsubadp" }, -+ { 0x1cc, "xvcmpgedp" }, -+ { 0x1d0, "xvcvuxwdp" }, -+ { 0x1d2, "xvrdpip" }, -+ { 0x1d4, "xvtsqrtdp" }, -+ { 0x1d6, "xvrdpic" }, -+ { 0x1e0, "xvdivdp" }, -+ { 0x1e4, "xvmsubmdp" }, -+ { 0x1f0, "xvcvsxwdp" }, -+ { 0x1f2, "xvrdpim" }, -+ { 0x1f4, "xvtdivdp" }, -+ { 0x208, "xxland" }, -+ { 0x212, "xscvdpsp" }, -+ { 0x228, "xxlandc" }, -+ { 0x248 , "xxlor" }, -+ { 0x268, "xxlxor" }, -+ { 0x280, "xsmaxdp" }, -+ { 0x284, "xsnmaddadp" }, -+ { 0x288, "xxlnor" }, -+ { 0x290, "xscvdpuxds" }, -+ { 0x292, "xscvspdp" }, -+ { 0x2a0, "xsmindp" }, -+ { 0x2a4, "xsnmaddmdp" }, -+ { 0x2b0, "xscvdpsxds" }, -+ { 0x2b2, "xsabsdp" }, -+ { 0x2c0, "xscpsgndp" }, -+ { 0x2c4, "xsnmsubadp" }, -+ { 0x2d0, "xscvuxddp" }, -+ { 0x2d2, "xsnabsdp" }, -+ { 0x2e4, "xsnmsubmdp" }, -+ { 0x2f0, "xscvsxddp" }, -+ { 0x2f2, "xsnegdp" }, -+ { 0x300, "xvmaxsp" }, -+ { 0x304, "xvnmaddasp" }, -+ { 0x30c, "xvcmpeqsp." }, -+ { 0x310, "xvcvspuxds" }, -+ { 0x312, "xvcvdpsp" }, -+ { 0x320, "xvminsp" }, -+ { 0x324, "xvnmaddmsp" }, -+ { 0x32c, "xvcmpgtsp." }, -+ { 0x330, "xvcvspsxds" }, -+ { 0x332, "xvabssp" }, -+ { 0x340, "xvcpsgnsp" }, -+ { 0x344, "xvnmsubasp" }, -+ { 0x34c, "xvcmpgesp." }, -+ { 0x350, "xvcvuxdsp" }, -+ { 0x352, "xvnabssp" }, -+ { 0x364, "xvnmsubmsp" }, -+ { 0x370, "xvcvsxdsp" }, -+ { 0x372, "xvnegsp" }, -+ { 0x380, "xvmaxdp" }, -+ { 0x384, "xvnmaddadp" }, -+ { 0x38c, "xvcmpeqdp." }, -+ { 0x390, "xvcvdpuxds" }, -+ { 0x392, "xvcvspdp" }, -+ { 0x3a0, "xvmindp" }, -+ { 0x3a4, "xvnmaddmdp" }, -+ { 0x3ac, "xvcmpgtdp." }, -+ { 0x3b0, "xvcvdpsxds" }, -+ { 0x3b2, "xvabsdp" }, -+ { 0x3c0, "xvcpsgndp" }, -+ { 0x3c4, "xvnmsubadp" }, -+ { 0x3cc, "xvcmpgedp." }, -+ { 0x3d0, "xvcvuxddp" }, -+ { 0x3d2, "xvnabsdp" }, -+ { 0x3e4, "xvnmsubmdp" }, -+ { 0x3f0, "xvcvsxddp" }, -+ { 0x3f2, "xvnegdp" } -+}; -+#define VSX_ALL_LEN 135 -+ -+// ATTENTION: This search function assumes vsx_all array is sorted. -+static Int findVSXextOpCode(UInt opcode) -+{ -+ Int low, mid, high; -+ low = 0; -+ high = VSX_ALL_LEN - 1; -+ while (low <= high) { -+ mid = (low + high)/2; -+ if (opcode < vsx_all[mid].opcode) -+ high = mid - 1; -+ else if (opcode > vsx_all[mid].opcode) -+ low = mid + 1; -+ else -+ return mid; -+ } -+ return -1; -+} - - -+/* The full 10-bit extended opcode retrieved via ifieldOPClo10 is -+ * passed, and we then try to match it up with one of the above -+ * VSX forms. -+ */ -+static UInt get_VSX60_opc2(UInt opc2_full) -+{ -+#define XX2_MASK 0x000003FE -+#define XX3_1_MASK 0x000003FC -+#define XX3_2_MASK 0x000001FC -+#define XX3_3_MASK 0x0000007C -+#define XX4_MASK 0x000003E0 -+ Int ret; -+ UInt vsxExtOpcode = 0; -+ -+ if (( ret = findVSXextOpCode(opc2_full & XX2_MASK)) >= 0) -+ vsxExtOpcode = vsx_all[ret].opcode; -+ else if (( ret = findVSXextOpCode(opc2_full & XX3_1_MASK)) >= 0) -+ vsxExtOpcode = vsx_all[ret].opcode; -+ else if (( ret = findVSXextOpCode(opc2_full & XX3_2_MASK)) >= 0) -+ vsxExtOpcode = vsx_all[ret].opcode; -+ else if (( ret = findVSXextOpCode(opc2_full & XX3_3_MASK)) >= 0) -+ vsxExtOpcode = vsx_all[ret].opcode; -+ else if (( ret = findVSXextOpCode(opc2_full & XX4_MASK)) >= 0) -+ vsxExtOpcode = vsx_all[ret].opcode; -+ -+ return vsxExtOpcode; -+} - - /*------------------------------------------------------------*/ - /*--- Disassemble a single instruction ---*/ -@@ -9268,6 +10735,7 @@ DisResult disInstr_PPC_WRK ( - Bool allow_V = False; - Bool allow_FX = False; - Bool allow_GX = False; -+ Bool allow_VX = False; - UInt hwcaps = archinfo->hwcaps; - Long delta; - -@@ -9277,11 +10745,13 @@ DisResult disInstr_PPC_WRK ( - allow_V = (0 != (hwcaps & VEX_HWCAPS_PPC64_V)); - allow_FX = (0 != (hwcaps & VEX_HWCAPS_PPC64_FX)); - allow_GX = (0 != (hwcaps & VEX_HWCAPS_PPC64_GX)); -+ allow_VX = (0 != (hwcaps & VEX_HWCAPS_PPC64_VX)); - } else { - allow_F = (0 != (hwcaps & VEX_HWCAPS_PPC32_F)); - allow_V = (0 != (hwcaps & VEX_HWCAPS_PPC32_V)); - allow_FX = (0 != (hwcaps & VEX_HWCAPS_PPC32_FX)); - allow_GX = (0 != (hwcaps & VEX_HWCAPS_PPC32_GX)); -+ allow_VX = (0 != (hwcaps & VEX_HWCAPS_PPC32_VX)); - } - - /* The running delta */ -@@ -9473,6 +10943,20 @@ DisResult disInstr_PPC_WRK ( - - case 0x3B: - if (!allow_F) goto decode_noF; -+ opc2 = ifieldOPClo10(theInstr); -+ switch (opc2) { -+ case 0x3CE: // fcfidus (implemented as native insn -+ if (!allow_VX) -+ goto decode_noVX; -+ if (dis_fp_round( theInstr )) -+ goto decode_success; -+ goto decode_failure; -+ case 0x34E: // fcfids -+ if (dis_fp_round( theInstr )) -+ goto decode_success; -+ goto decode_failure; -+ } -+ - opc2 = IFIELD(theInstr, 1, 5); - switch (opc2) { - /* Floating Point Arith Instructions */ -@@ -9499,12 +10983,64 @@ DisResult disInstr_PPC_WRK ( - if (!allow_GX) goto decode_noGX; - if (dis_fp_arith(theInstr)) goto decode_success; - goto decode_failure; -- -+ - default: - goto decode_failure; - } - break; - -+ case 0x3C: // VSX instructions (except load/store) -+ { -+ UInt vsxOpc2 = get_VSX60_opc2(opc2); -+ /* The vsxOpc2 returned is the "normalized" value, representing the -+ * instructions secondary opcode as taken from the standard secondary -+ * opcode field [21:30] (IBM notatition), even if the actual field -+ * is non-standard. These normalized values are given in the opcode -+ * appendices of the ISA 2.06 document. -+ */ -+ if (vsxOpc2 == 0) -+ goto decode_failure; -+ -+ switch (vsxOpc2) { -+ case 0x8: case 0x28: case 0x48: case 0xc8: // xxsldwi, xxpermdi, xxmrghw, xxmrglw -+ if (dis_vx_permute(theInstr, vsxOpc2)) goto decode_success; -+ goto decode_failure; -+ case 0x268: case 0x248: case 0x288: case 0x208: case 0x228: // xxlxor, xxlor, xxlnor, xxland, xxlandc -+ if (dis_vx_logic(theInstr, vsxOpc2)) goto decode_success; -+ goto decode_failure; -+ case 0x2B2: // xsabsdp -+ if (dis_vx_move(theInstr, vsxOpc2)) goto decode_success; -+ goto decode_failure; -+ case 0x2C0: // xscpsgndp -+ if (dis_vx_move(theInstr, vsxOpc2)) goto decode_success; -+ goto decode_failure; -+ case 0x2D2: // xsnabsdp -+ if (dis_vx_move(theInstr, vsxOpc2)) goto decode_success; -+ goto decode_failure; -+ case 0x2F2: // xsnegdp -+ if (dis_vx_move(theInstr, vsxOpc2)) goto decode_success; -+ goto decode_failure; -+ case 0x08C: case 0x0AC: // xscmpudp, xscmpodp -+ if (dis_vx_cmp(theInstr, vsxOpc2)) goto decode_success; -+ goto decode_failure; -+ case 0x080: case 0x0E0: // xsadddp, xsdivdp -+ case 0x084: case 0x0A4: // xsmaddadp, xsmaddmdp -+ case 0x0C4: case 0x0E4: // xsmsubadp, xsmsubmdp -+ case 0x284: case 0x2A4: // xsnmaddadp, xsnmaddmdp -+ case 0x0C0: // xsmuldp -+ case 0x0A0: // xssubdp -+ if (dis_vx_arith(theInstr, vsxOpc2)) goto decode_success; -+ goto decode_failure; -+ case 0x2B0: case 0x2F0: case 0x2D0: // xscvdpsxds, xscvsxddp, xscvuxddp -+ if (dis_vx_conv(theInstr, vsxOpc2)) goto decode_success; -+ goto decode_failure; -+ -+ default: -+ goto decode_failure; -+ } -+ break; -+ } -+ - /* 64bit Integer Stores */ - case 0x3E: // std, stdu - if (!mode64) goto decode_failure; -@@ -9555,6 +11091,10 @@ DisResult disInstr_PPC_WRK ( - if (dis_fp_cmp(theInstr)) goto decode_success; - goto decode_failure; - -+ case 0x080: // ftdiv -+ if (dis_fp_ftdiv(theInstr)) goto decode_success; -+ goto decode_failure; -+ - /* Floating Point Rounding/Conversion Instructions */ - case 0x00C: // frsp - case 0x00E: // fctiw -@@ -9564,6 +11104,11 @@ DisResult disInstr_PPC_WRK ( - case 0x34E: // fcfid - if (dis_fp_round(theInstr)) goto decode_success; - goto decode_failure; -+ case 0x3CE: // fcfidu (implemented as native insn) -+ if (!allow_VX) goto decode_noVX; -+ if (dis_fp_round(theInstr)) goto decode_success; -+ goto decode_failure; -+ - - /* Power6 rounding stuff */ - case 0x1E8: // frim -@@ -9730,7 +11275,7 @@ DisResult disInstr_PPC_WRK ( - - /* Integer Load and Store with Byte Reverse Instructions */ - case 0x316: case 0x216: case 0x396: // lhbrx, lwbrx, sthbrx -- case 0x296: // stwbrx -+ case 0x296: case 0x214: // stwbrx, ldbrx - if (dis_int_ldst_rev( theInstr )) goto decode_success; - goto decode_failure; - -@@ -9815,6 +11360,11 @@ DisResult disInstr_PPC_WRK ( - if (dis_fp_load( theInstr )) goto decode_success; - goto decode_failure; - -+ case 0x377: // lfiwzx -+ if (!allow_F) goto decode_noF; -+ if (dis_fp_load( theInstr )) goto decode_success; -+ goto decode_failure; -+ - /* AltiVec instructions */ - - /* AV Cache Control - Data streams */ -@@ -9838,6 +11388,26 @@ DisResult disInstr_PPC_WRK ( - if (dis_av_store( theInstr )) goto decode_success; - goto decode_failure; - -+ /* VSX Load */ -+ case 0x24C: // lxsdx -+ case 0x34C: // lxvd2x -+ case 0x14C: // lxvdsx -+ case 0x30C: // lxvw4x -+ if (dis_vx_load( theInstr )) goto decode_success; -+ goto decode_failure; -+ -+ /* VSX Store */ -+ case 0x2CC: // stxsdx -+ case 0x3CC: // stxvd2x -+ case 0x38C: // stxvw4x -+ if (dis_vx_store( theInstr )) goto decode_success; -+ goto decode_failure; -+ -+ /* Miscellaneous ISA 2.06 instructions */ -+ case 0x1FA: // popcntd -+ if (dis_int_logic( theInstr )) goto decode_success; -+ goto decode_failure; -+ - default: - /* Deal with some other cases that we would otherwise have - punted on. */ -@@ -10023,6 +11593,10 @@ DisResult disInstr_PPC_WRK ( - vassert(!allow_V); - vex_printf("disInstr(ppc): declined to decode an AltiVec insn.\n"); - goto decode_failure; -+ decode_noVX: -+ vassert(!allow_VX); -+ vex_printf("disInstr(ppc): declined to decode a VSX insn.\n"); -+ goto decode_failure; - decode_noFX: - vassert(!allow_FX); - vex_printf("disInstr(ppc): " -@@ -10105,10 +11679,10 @@ DisResult disInstr_PPC ( IRSB* ir - - /* do some sanity checks */ - mask32 = VEX_HWCAPS_PPC32_F | VEX_HWCAPS_PPC32_V -- | VEX_HWCAPS_PPC32_FX | VEX_HWCAPS_PPC32_GX; -+ | VEX_HWCAPS_PPC32_FX | VEX_HWCAPS_PPC32_GX | VEX_HWCAPS_PPC32_VX; - -- mask64 = VEX_HWCAPS_PPC64_V -- | VEX_HWCAPS_PPC64_FX | VEX_HWCAPS_PPC64_GX; -+ mask64 = VEX_HWCAPS_PPC64_V | VEX_HWCAPS_PPC64_FX -+ | VEX_HWCAPS_PPC64_GX | VEX_HWCAPS_PPC64_VX; - - if (mode64) { - vassert((hwcaps_guest & mask32) == 0); -Index: VEX/priv/host_ppc_defs.c -=================================================================== ---- VEX/priv/host_ppc_defs.c.orig -+++ VEX/priv/host_ppc_defs.c -@@ -962,12 +962,14 @@ PPCInstr* PPCInstr_FpRSP ( HReg dst, HRe - i->Pin.FpRSP.src = src; - return i; - } --PPCInstr* PPCInstr_FpCftI ( Bool fromI, Bool int32, -- HReg dst, HReg src ) { -+PPCInstr* PPCInstr_FpCftI ( Bool fromI, Bool int32, Bool syned, -+ Bool dst64, HReg dst, HReg src ) { - PPCInstr* i = LibVEX_Alloc(sizeof(PPCInstr)); - i->tag = Pin_FpCftI; - i->Pin.FpCftI.fromI = fromI; - i->Pin.FpCftI.int32 = int32; -+ i->Pin.FpCftI.syned = syned; -+ i->Pin.FpCftI.dst64 = dst64; - i->Pin.FpCftI.dst = dst; - i->Pin.FpCftI.src = src; - vassert(!(int32 && fromI)); /* no such insn ("fcfiw"). */ -@@ -1433,15 +1435,21 @@ void ppPPCInstr ( PPCInstr* i, Bool mode - ppHRegPPC(i->Pin.FpRSP.src); - return; - case Pin_FpCftI: { -- HChar* str = "fc???"; -+ HChar* str = "fc?????"; - if (i->Pin.FpCftI.fromI == False && i->Pin.FpCftI.int32 == False) - str = "fctid"; - else - if (i->Pin.FpCftI.fromI == False && i->Pin.FpCftI.int32 == True) - str = "fctiw"; - else -- if (i->Pin.FpCftI.fromI == True && i->Pin.FpCftI.int32 == False) -- str = "fcfid"; -+ if (i->Pin.FpCftI.fromI == True && i->Pin.FpCftI.int32 == False) { -+ if (i->Pin.FpCftI.syned == True) -+ str = "fcfid"; -+ else if (i->Pin.FpCftI.dst64 == True) -+ str = "fcfidu"; -+ else -+ str = "fcfidus"; -+ } - vex_printf("%s ", str); - ppHRegPPC(i->Pin.FpCftI.dst); - vex_printf(","); -@@ -3385,9 +3393,19 @@ Int emit_PPCInstr ( UChar* buf, Int nbuf - goto done; - } - if (i->Pin.FpCftI.fromI == True && i->Pin.FpCftI.int32 == False) { -- // fcfid (conv i64 to f64), PPC64 p434 -- p = mkFormX(p, 63, fr_dst, 0, fr_src, 846, 0); -- goto done; -+ if (i->Pin.FpCftI.syned == True) { -+ // fcfid (conv i64 to f64), PPC64 p434 -+ p = mkFormX(p, 63, fr_dst, 0, fr_src, 846, 0); -+ goto done; -+ } else if (i->Pin.FpCftI.dst64 == True) { -+ // fcfidu (conv u64 to f64) -+ p = mkFormX(p, 63, fr_dst, 0, fr_src, 974, 0); -+ goto done; -+ } else { -+ // fcfidus (conv u64 to f32) -+ p = mkFormX(p, 59, fr_dst, 0, fr_src, 974, 0); -+ goto done; -+ } - } - goto bad; - } -Index: VEX/priv/host_ppc_defs.h -=================================================================== ---- VEX/priv/host_ppc_defs.h.orig -+++ VEX/priv/host_ppc_defs.h -@@ -667,6 +667,8 @@ typedef - struct { - Bool fromI; /* False==F->I, True==I->F */ - Bool int32; /* True== I is 32, False==I is 64 */ -+ Bool syned; -+ Bool dst64; /* True==dest is 64bit; False==dest is 32bit */ - HReg src; - HReg dst; - } FpCftI; -@@ -811,8 +813,8 @@ extern PPCInstr* PPCInstr_FpMulAcc ( P - extern PPCInstr* PPCInstr_FpLdSt ( Bool isLoad, UChar sz, HReg, PPCAMode* ); - extern PPCInstr* PPCInstr_FpSTFIW ( HReg addr, HReg data ); - extern PPCInstr* PPCInstr_FpRSP ( HReg dst, HReg src ); --extern PPCInstr* PPCInstr_FpCftI ( Bool fromI, Bool int32, -- HReg dst, HReg src ); -+extern PPCInstr* PPCInstr_FpCftI ( Bool fromI, Bool int32, Bool syned, -+ Bool dst64, HReg dst, HReg src ); - extern PPCInstr* PPCInstr_FpCMov ( PPCCondCode, HReg dst, HReg src ); - extern PPCInstr* PPCInstr_FpLdFPSCR ( HReg src ); - extern PPCInstr* PPCInstr_FpCmp ( HReg dst, HReg srcL, HReg srcR ); -Index: VEX/priv/host_ppc_isel.c -=================================================================== ---- VEX/priv/host_ppc_isel.c.orig -+++ VEX/priv/host_ppc_isel.c -@@ -126,7 +126,10 @@ fnabs[.] if . - - fadd[.] if . y y - fadds[.] if . y y --fcfid[.] (i64->dbl) if . y y -+fcfid[.] (Si64->dbl) if . y y -+fcfidU[.] (Ui64->dbl) if . y y -+fcfids[.] (Si64->sngl) if . Y Y -+fcfidus[.] (Ui64->sngl) if . Y Y - fcmpo (cmp, result n n n - fcmpu to crfD) n n n - fctid[.] (dbl->i64) if . ->undef y -@@ -559,7 +562,7 @@ PPCAMode* genGuestArrayOffset ( ISelEnv* - - if (bias < -100 || bias > 100) /* somewhat arbitrarily */ - vpanic("genGuestArrayOffset(ppc host)(3)"); -- if (descr->base < 0 || descr->base > 4000) /* somewhat arbitrarily */ -+ if (descr->base < 0 || descr->base > 5000) /* somewhat arbitrarily */ - vpanic("genGuestArrayOffset(ppc host)(4)"); - - /* Compute off into a reg, %off. Then return: -@@ -1468,8 +1471,8 @@ static HReg iselWordExpr_R_wrk ( ISelEnv - set_FPU_rounding_mode( env, e->Iex.Binop.arg1 ); - - sub_from_sp( env, 16 ); -- addInstr(env, PPCInstr_FpCftI(False/*F->I*/, True/*int32*/, -- ftmp, fsrc)); -+ addInstr(env, PPCInstr_FpCftI(False/*F->I*/, True/*int32*/, True, -+ False, ftmp, fsrc)); - addInstr(env, PPCInstr_FpSTFIW(r1, ftmp)); - addInstr(env, PPCInstr_Load(4, idst, zero_r1, mode64)); - -@@ -1496,8 +1499,8 @@ static HReg iselWordExpr_R_wrk ( ISelEnv - set_FPU_rounding_mode( env, e->Iex.Binop.arg1 ); - - sub_from_sp( env, 16 ); -- addInstr(env, PPCInstr_FpCftI(False/*F->I*/, False/*int64*/, -- ftmp, fsrc)); -+ addInstr(env, PPCInstr_FpCftI(False/*F->I*/, False/*int64*/, True, -+ True, ftmp, fsrc)); - addInstr(env, PPCInstr_FpLdSt(False/*store*/, 8, ftmp, zero_r1)); - addInstr(env, PPCInstr_Load(8, idst, zero_r1, True/*mode64*/)); - add_to_sp( env, 16 ); -@@ -2400,8 +2403,10 @@ static PPCCondCode iselCondCode_wrk ( IS - switch (e->Iex.Binop.op) { - case Iop_CmpEQ32: return mk_PPCCondCode( Pct_TRUE, Pcf_7EQ ); - case Iop_CmpNE32: return mk_PPCCondCode( Pct_FALSE, Pcf_7EQ ); -- case Iop_CmpLT32U: return mk_PPCCondCode( Pct_TRUE, Pcf_7LT ); -- case Iop_CmpLE32U: return mk_PPCCondCode( Pct_FALSE, Pcf_7GT ); -+ case Iop_CmpLT32U: case Iop_CmpLT32S: -+ return mk_PPCCondCode( Pct_TRUE, Pcf_7LT ); -+ case Iop_CmpLE32U: case Iop_CmpLE32S: -+ return mk_PPCCondCode( Pct_FALSE, Pcf_7GT ); - default: vpanic("iselCondCode(ppc): CmpXX32"); - } - } -@@ -2746,8 +2751,8 @@ static void iselInt64Expr_wrk ( HReg* rH - set_FPU_rounding_mode( env, e->Iex.Binop.arg1 ); - - sub_from_sp( env, 16 ); -- addInstr(env, PPCInstr_FpCftI(False/*F->I*/, False/*int64*/, -- ftmp, fsrc)); -+ addInstr(env, PPCInstr_FpCftI(False/*F->I*/, False/*int64*/, True, -+ True, ftmp, fsrc)); - addInstr(env, PPCInstr_FpLdSt(False/*store*/, 8, ftmp, zero_r1)); - addInstr(env, PPCInstr_Load(4, tHi, zero_r1, False/*mode32*/)); - addInstr(env, PPCInstr_Load(4, tLo, four_r1, False/*mode32*/)); -@@ -3185,7 +3190,8 @@ static HReg iselDblExpr_wrk ( ISelEnv* e - return r_dst; - } - -- if (e->Iex.Binop.op == Iop_I64StoF64) { -+ if (e->Iex.Binop.op == Iop_I64StoF64 || e->Iex.Binop.op == Iop_I64UtoF64 -+ || e->Iex.Binop.op == Iop_I64UtoF32) { - if (mode64) { - HReg fdst = newVRegF(env); - HReg isrc = iselWordExpr_R(env, e->Iex.Binop.arg2); -@@ -3200,6 +3206,8 @@ static HReg iselDblExpr_wrk ( ISelEnv* e - addInstr(env, PPCInstr_Store(8, zero_r1, isrc, True/*mode64*/)); - addInstr(env, PPCInstr_FpLdSt(True/*load*/, 8, fdst, zero_r1)); - addInstr(env, PPCInstr_FpCftI(True/*I->F*/, False/*int64*/, -+ e->Iex.Binop.op == Iop_I64StoF64 ? True : False, -+ e->Iex.Binop.op == Iop_I64UtoF32 ? False : True, - fdst, fdst)); - - add_to_sp( env, 16 ); -@@ -3226,6 +3234,8 @@ static HReg iselDblExpr_wrk ( ISelEnv* e - addInstr(env, PPCInstr_Store(4, four_r1, isrcLo, False/*mode32*/)); - addInstr(env, PPCInstr_FpLdSt(True/*load*/, 8, fdst, zero_r1)); - addInstr(env, PPCInstr_FpCftI(True/*I->F*/, False/*int64*/, -+ e->Iex.Binop.op == Iop_I64StoF64 ? True : False, -+ e->Iex.Binop.op == Iop_I64UtoF32 ? False : True, - fdst, fdst)); - - add_to_sp( env, 16 ); -@@ -4129,10 +4139,10 @@ HInstrArray* iselSB_PPC ( IRSB* bb, VexA - - /* do some sanity checks */ - mask32 = VEX_HWCAPS_PPC32_F | VEX_HWCAPS_PPC32_V -- | VEX_HWCAPS_PPC32_FX | VEX_HWCAPS_PPC32_GX; -+ | VEX_HWCAPS_PPC32_FX | VEX_HWCAPS_PPC32_GX | VEX_HWCAPS_PPC32_VX; - -- mask64 = VEX_HWCAPS_PPC64_V -- | VEX_HWCAPS_PPC64_FX | VEX_HWCAPS_PPC64_GX; -+ mask64 = VEX_HWCAPS_PPC64_V | VEX_HWCAPS_PPC64_FX -+ | VEX_HWCAPS_PPC64_GX | VEX_HWCAPS_PPC64_VX; - - if (mode64) { - vassert((hwcaps_host & mask32) == 0); -Index: VEX/priv/ir_defs.c -=================================================================== ---- VEX/priv/ir_defs.c.orig -+++ VEX/priv/ir_defs.c -@@ -362,6 +362,8 @@ void ppIROp ( IROp op ) - case Iop_I16StoF64: vex_printf("I16StoF64"); return; - case Iop_I32StoF64: vex_printf("I32StoF64"); return; - case Iop_I64StoF64: vex_printf("I64StoF64"); return; -+ case Iop_I64UtoF64: vex_printf("I64UtoF64"); return; -+ case Iop_I64UtoF32: vex_printf("I64UtoF32"); return; - - case Iop_I32UtoF64: vex_printf("I32UtoF64"); return; - -@@ -2262,6 +2264,8 @@ void typeOfPrimop ( IROp op, - case Iop_I16StoF64: UNARY(Ity_I16, Ity_F64); - case Iop_I32StoF64: UNARY(Ity_I32, Ity_F64); - case Iop_I64StoF64: BINARY(ity_RMode,Ity_I64, Ity_F64); -+ case Iop_I64UtoF64: BINARY(ity_RMode,Ity_I64, Ity_F64); -+ case Iop_I64UtoF32: BINARY(ity_RMode,Ity_I64, Ity_F64); - - case Iop_I32UtoF64: UNARY(Ity_I32, Ity_F64); - -Index: VEX/priv/main_main.c -=================================================================== ---- VEX/priv/main_main.c.orig -+++ VEX/priv/main_main.c -@@ -855,6 +855,7 @@ static HChar* show_hwcaps_ppc32 ( UInt h - const UInt V = VEX_HWCAPS_PPC32_V; - const UInt FX = VEX_HWCAPS_PPC32_FX; - const UInt GX = VEX_HWCAPS_PPC32_GX; -+ const UInt VX = VEX_HWCAPS_PPC32_VX; - UInt c = hwcaps; - if (c == 0) return "ppc32-int"; - if (c == F) return "ppc32-int-flt"; -@@ -865,6 +866,7 @@ static HChar* show_hwcaps_ppc32 ( UInt h - if (c == (F|V|FX)) return "ppc32-int-flt-vmx-FX"; - if (c == (F|V|GX)) return "ppc32-int-flt-vmx-GX"; - if (c == (F|V|FX|GX)) return "ppc32-int-flt-vmx-FX-GX"; -+ if (c == (F|V|FX|GX|VX)) return "ppc32-int-flt-vmx-FX-GX-VX"; - return NULL; - } - -@@ -875,6 +877,7 @@ static HChar* show_hwcaps_ppc64 ( UInt h - const UInt V = VEX_HWCAPS_PPC64_V; - const UInt FX = VEX_HWCAPS_PPC64_FX; - const UInt GX = VEX_HWCAPS_PPC64_GX; -+ const UInt VX = VEX_HWCAPS_PPC64_VX; - UInt c = hwcaps; - if (c == 0) return "ppc64-int-flt"; - if (c == FX) return "ppc64-int-flt-FX"; -@@ -884,6 +887,7 @@ static HChar* show_hwcaps_ppc64 ( UInt h - if (c == (V|FX)) return "ppc64-int-flt-vmx-FX"; - if (c == (V|GX)) return "ppc64-int-flt-vmx-GX"; - if (c == (V|FX|GX)) return "ppc64-int-flt-vmx-FX-GX"; -+ if (c == (V|FX|GX|VX)) return "ppc64-int-flt-vmx-FX-GX-VX"; - return NULL; - } - -Index: VEX/pub/libvex_guest_ppc32.h -=================================================================== ---- VEX/pub/libvex_guest_ppc32.h.orig -+++ VEX/pub/libvex_guest_ppc32.h -@@ -82,120 +82,128 @@ typedef - /* 120 */ UInt guest_GPR30; - /* 124 */ UInt guest_GPR31; - -- // Floating Point Registers -- /* 128 */ ULong guest_FPR0; -- /* 136 */ ULong guest_FPR1; -- /* 144 */ ULong guest_FPR2; -- /* 152 */ ULong guest_FPR3; -- /* 160 */ ULong guest_FPR4; -- /* 168 */ ULong guest_FPR5; -- /* 176 */ ULong guest_FPR6; -- /* 184 */ ULong guest_FPR7; -- /* 192 */ ULong guest_FPR8; -- /* 200 */ ULong guest_FPR9; -- /* 208 */ ULong guest_FPR10; -- /* 216 */ ULong guest_FPR11; -- /* 224 */ ULong guest_FPR12; -- /* 232 */ ULong guest_FPR13; -- /* 240 */ ULong guest_FPR14; -- /* 248 */ ULong guest_FPR15; -- /* 256 */ ULong guest_FPR16; -- /* 264 */ ULong guest_FPR17; -- /* 272 */ ULong guest_FPR18; -- /* 280 */ ULong guest_FPR19; -- /* 288 */ ULong guest_FPR20; -- /* 296 */ ULong guest_FPR21; -- /* 304 */ ULong guest_FPR22; -- /* 312 */ ULong guest_FPR23; -- /* 320 */ ULong guest_FPR24; -- /* 328 */ ULong guest_FPR25; -- /* 336 */ ULong guest_FPR26; -- /* 344 */ ULong guest_FPR27; -- /* 352 */ ULong guest_FPR28; -- /* 360 */ ULong guest_FPR29; -- /* 368 */ ULong guest_FPR30; -- /* 376 */ ULong guest_FPR31; -+ // Vector Registers, Floating Point Registers, and VSX Registers -+ // With ISA 2.06, the "Vector-Scalar Floating-point" category -+ // provides facilities to support vector and scalar binary floating- -+ // point operations. A unified register file is an integral part -+ // of this new facility, combining floating point and vector registers -+ // using a 64x128-bit vector. These are referred to as VSR[0..63]. -+ // The floating point registers are now mapped into double word element 0 -+ // of VSR[0..31]. The 32x128-bit vector registers defined by the "Vector -+ // Facility [Category: Vector]" are now mapped to VSR[32..63]. - -- // Vector Registers - // IMPORTANT: the user of libvex must place the guest state so as -- // to ensure that guest_VR{0..31}, and any shadows thereof, are -+ // to ensure that guest_VSR{0..63}, and any shadows thereof, are - // 16-aligned. -- /* 384 */ U128 guest_VR0; -- /* 400 */ U128 guest_VR1; -- /* 416 */ U128 guest_VR2; -- /* 432 */ U128 guest_VR3; -- /* 448 */ U128 guest_VR4; -- /* 464 */ U128 guest_VR5; -- /* 480 */ U128 guest_VR6; -- /* 496 */ U128 guest_VR7; -- /* 512 */ U128 guest_VR8; -- /* 528 */ U128 guest_VR9; -- /* 544 */ U128 guest_VR10; -- /* 560 */ U128 guest_VR11; -- /* 576 */ U128 guest_VR12; -- /* 592 */ U128 guest_VR13; -- /* 608 */ U128 guest_VR14; -- /* 624 */ U128 guest_VR15; -- /* 640 */ U128 guest_VR16; -- /* 656 */ U128 guest_VR17; -- /* 672 */ U128 guest_VR18; -- /* 688 */ U128 guest_VR19; -- /* 704 */ U128 guest_VR20; -- /* 720 */ U128 guest_VR21; -- /* 736 */ U128 guest_VR22; -- /* 752 */ U128 guest_VR23; -- /* 768 */ U128 guest_VR24; -- /* 784 */ U128 guest_VR25; -- /* 800 */ U128 guest_VR26; -- /* 816 */ U128 guest_VR27; -- /* 832 */ U128 guest_VR28; -- /* 848 */ U128 guest_VR29; -- /* 864 */ U128 guest_VR30; -- /* 880 */ U128 guest_VR31; -- -- /* 896 */ UInt guest_CIA; // IP (no arch visible register) -- /* 900 */ UInt guest_LR; // Link Register -- /* 904 */ UInt guest_CTR; // Count Register -+ -+ /* 128 */ U128 guest_VSR0; -+ /* 144 */ U128 guest_VSR1; -+ /* 160 */ U128 guest_VSR2; -+ /* 176 */ U128 guest_VSR3; -+ /* 192 */ U128 guest_VSR4; -+ /* 208 */ U128 guest_VSR5; -+ /* 224 */ U128 guest_VSR6; -+ /* 240 */ U128 guest_VSR7; -+ /* 256 */ U128 guest_VSR8; -+ /* 272 */ U128 guest_VSR9; -+ /* 288 */ U128 guest_VSR10; -+ /* 304 */ U128 guest_VSR11; -+ /* 320 */ U128 guest_VSR12; -+ /* 336 */ U128 guest_VSR13; -+ /* 352 */ U128 guest_VSR14; -+ /* 368 */ U128 guest_VSR15; -+ /* 384 */ U128 guest_VSR16; -+ /* 400 */ U128 guest_VSR17; -+ /* 416 */ U128 guest_VSR18; -+ /* 432 */ U128 guest_VSR19; -+ /* 448 */ U128 guest_VSR20; -+ /* 464 */ U128 guest_VSR21; -+ /* 480 */ U128 guest_VSR22; -+ /* 496 */ U128 guest_VSR23; -+ /* 512 */ U128 guest_VSR24; -+ /* 528 */ U128 guest_VSR25; -+ /* 544 */ U128 guest_VSR26; -+ /* 560 */ U128 guest_VSR27; -+ /* 576 */ U128 guest_VSR28; -+ /* 592 */ U128 guest_VSR29; -+ /* 608 */ U128 guest_VSR30; -+ /* 624 */ U128 guest_VSR31; -+ /* 640 */ U128 guest_VSR32; -+ /* 656 */ U128 guest_VSR33; -+ /* 672 */ U128 guest_VSR34; -+ /* 688 */ U128 guest_VSR35; -+ /* 704 */ U128 guest_VSR36; -+ /* 720 */ U128 guest_VSR37; -+ /* 736 */ U128 guest_VSR38; -+ /* 752 */ U128 guest_VSR39; -+ /* 768 */ U128 guest_VSR40; -+ /* 784 */ U128 guest_VSR41; -+ /* 800 */ U128 guest_VSR42; -+ /* 816 */ U128 guest_VSR43; -+ /* 832 */ U128 guest_VSR44; -+ /* 848 */ U128 guest_VSR45; -+ /* 864 */ U128 guest_VSR46; -+ /* 880 */ U128 guest_VSR47; -+ /* 896 */ U128 guest_VSR48; -+ /* 912 */ U128 guest_VSR49; -+ /* 928 */ U128 guest_VSR50; -+ /* 944 */ U128 guest_VSR51; -+ /* 960 */ U128 guest_VSR52; -+ /* 976 */ U128 guest_VSR53; -+ /* 992 */ U128 guest_VSR54; -+ /* 1008 */ U128 guest_VSR55; -+ /* 1024 */ U128 guest_VSR56; -+ /* 1040 */ U128 guest_VSR57; -+ /* 1056 */ U128 guest_VSR58; -+ /* 1072 */ U128 guest_VSR59; -+ /* 1088 */ U128 guest_VSR60; -+ /* 1104 */ U128 guest_VSR61; -+ /* 1120 */ U128 guest_VSR62; -+ /* 1136 */ U128 guest_VSR63; -+ -+ /* 1152 */ UInt guest_CIA; // IP (no arch visible register) -+ /* 1156 */ UInt guest_LR; // Link Register -+ /* 1160 */ UInt guest_CTR; // Count Register - - /* XER pieces */ -- /* 908 */ UChar guest_XER_SO; /* in lsb */ -- /* 909 */ UChar guest_XER_OV; /* in lsb */ -- /* 910 */ UChar guest_XER_CA; /* in lsb */ -- /* 911 */ UChar guest_XER_BC; /* all bits */ -+ /* 1164 */ UChar guest_XER_SO; /* in lsb */ -+ /* 1165 */ UChar guest_XER_OV; /* in lsb */ -+ /* 1166 */ UChar guest_XER_CA; /* in lsb */ -+ /* 1167 */ UChar guest_XER_BC; /* all bits */ - - /* CR pieces */ -- /* 912 */ UChar guest_CR0_321; /* in [3:1] */ -- /* 913 */ UChar guest_CR0_0; /* in lsb */ -- /* 914 */ UChar guest_CR1_321; /* in [3:1] */ -- /* 915 */ UChar guest_CR1_0; /* in lsb */ -- /* 916 */ UChar guest_CR2_321; /* in [3:1] */ -- /* 917 */ UChar guest_CR2_0; /* in lsb */ -- /* 918 */ UChar guest_CR3_321; /* in [3:1] */ -- /* 919 */ UChar guest_CR3_0; /* in lsb */ -- /* 920 */ UChar guest_CR4_321; /* in [3:1] */ -- /* 921 */ UChar guest_CR4_0; /* in lsb */ -- /* 922 */ UChar guest_CR5_321; /* in [3:1] */ -- /* 923 */ UChar guest_CR5_0; /* in lsb */ -- /* 924 */ UChar guest_CR6_321; /* in [3:1] */ -- /* 925 */ UChar guest_CR6_0; /* in lsb */ -- /* 926 */ UChar guest_CR7_321; /* in [3:1] */ -- /* 927 */ UChar guest_CR7_0; /* in lsb */ -+ /* 1168 */ UChar guest_CR0_321; /* in [3:1] */ -+ /* 1169 */ UChar guest_CR0_0; /* in lsb */ -+ /* 1170 */ UChar guest_CR1_321; /* in [3:1] */ -+ /* 1171 */ UChar guest_CR1_0; /* in lsb */ -+ /* 1172 */ UChar guest_CR2_321; /* in [3:1] */ -+ /* 1173 */ UChar guest_CR2_0; /* in lsb */ -+ /* 1174 */ UChar guest_CR3_321; /* in [3:1] */ -+ /* 1175 */ UChar guest_CR3_0; /* in lsb */ -+ /* 1176 */ UChar guest_CR4_321; /* in [3:1] */ -+ /* 1177 */ UChar guest_CR4_0; /* in lsb */ -+ /* 1178 */ UChar guest_CR5_321; /* in [3:1] */ -+ /* 1179 */ UChar guest_CR5_0; /* in lsb */ -+ /* 1180 */ UChar guest_CR6_321; /* in [3:1] */ -+ /* 1181 */ UChar guest_CR6_0; /* in lsb */ -+ /* 1182 */ UChar guest_CR7_321; /* in [3:1] */ -+ /* 1183 */ UChar guest_CR7_0; /* in lsb */ - - /* FP Status & Control Register fields */ -- /* 928 */ UInt guest_FPROUND; // FP Rounding Mode -+ /* 1184 */ UInt guest_FPROUND; // FP Rounding Mode - - /* Vector Save/Restore Register */ -- /* 932 */ UInt guest_VRSAVE; -+ /* 1188 */ UInt guest_VRSAVE; - - /* Vector Status and Control Register */ -- /* 936 */ UInt guest_VSCR; -+ /* 1192 */ UInt guest_VSCR; - - /* Emulation warnings */ -- /* 940 */ UInt guest_EMWARN; -+ /* 1196 */ UInt guest_EMWARN; - - /* For icbi: record start and length of area to invalidate */ -- /* 944 */ UInt guest_TISTART; -- /* 948 */ UInt guest_TILEN; -+ /* 1200 */ UInt guest_TISTART; -+ /* 1204 */ UInt guest_TILEN; - - /* Used to record the unredirected guest address at the start of - a translation whose start has been redirected. By reading -@@ -203,27 +211,27 @@ typedef - find out what the corresponding no-redirection address was. - Note, this is only set for wrap-style redirects, not for - replace-style ones. */ -- /* 952 */ UInt guest_NRADDR; -- /* 956 */ UInt guest_NRADDR_GPR2; /* needed by aix */ -+ /* 1208 */ UInt guest_NRADDR; -+ /* 1212 */ UInt guest_NRADDR_GPR2; /* needed by aix */ - - /* A grows-upwards stack for hidden saves/restores of LR and R2 - needed for function interception and wrapping on ppc32-aix5. - A horrible hack. REDIR_SP points to the highest live entry, - and so starts at -1. */ -- /* 960 */ UInt guest_REDIR_SP; -- /* 964 */ UInt guest_REDIR_STACK[VEX_GUEST_PPC32_REDIR_STACK_SIZE]; -+ /* 1216 */ UInt guest_REDIR_SP; -+ /* 1220 */ UInt guest_REDIR_STACK[VEX_GUEST_PPC32_REDIR_STACK_SIZE]; - - /* Needed for AIX (but mandated for all guest architectures): - CIA at the last SC insn. Used when backing up to restart a - syscall that has been interrupted by a signal. */ -- /* ??? */ UInt guest_IP_AT_SYSCALL; -+ /* 1348 */ UInt guest_IP_AT_SYSCALL; - - /* SPRG3, which AIUI is readonly in user space. Needed for - threading on AIX. */ -- /* ??? */ UInt guest_SPRG3_RO; -+ /* 1352 */ UInt guest_SPRG3_RO; - - /* Padding to make it have an 8-aligned size */ -- /* UInt padding; */ -+ /* 1356 */ UInt padding; - } - VexGuestPPC32State; - -Index: VEX/pub/libvex_guest_ppc64.h -=================================================================== ---- VEX/pub/libvex_guest_ppc64.h.orig -+++ VEX/pub/libvex_guest_ppc64.h -@@ -120,123 +120,131 @@ typedef - /* 240 */ ULong guest_GPR30; - /* 248 */ ULong guest_GPR31; - -- // Floating Point Registers -- /* 256 */ ULong guest_FPR0; -- /* 264 */ ULong guest_FPR1; -- /* 272 */ ULong guest_FPR2; -- /* 280 */ ULong guest_FPR3; -- /* 288 */ ULong guest_FPR4; -- /* 296 */ ULong guest_FPR5; -- /* 304 */ ULong guest_FPR6; -- /* 312 */ ULong guest_FPR7; -- /* 320 */ ULong guest_FPR8; -- /* 328 */ ULong guest_FPR9; -- /* 336 */ ULong guest_FPR10; -- /* 344 */ ULong guest_FPR11; -- /* 352 */ ULong guest_FPR12; -- /* 360 */ ULong guest_FPR13; -- /* 368 */ ULong guest_FPR14; -- /* 376 */ ULong guest_FPR15; -- /* 384 */ ULong guest_FPR16; -- /* 392 */ ULong guest_FPR17; -- /* 400 */ ULong guest_FPR18; -- /* 408 */ ULong guest_FPR19; -- /* 416 */ ULong guest_FPR20; -- /* 424 */ ULong guest_FPR21; -- /* 432 */ ULong guest_FPR22; -- /* 440 */ ULong guest_FPR23; -- /* 448 */ ULong guest_FPR24; -- /* 456 */ ULong guest_FPR25; -- /* 464 */ ULong guest_FPR26; -- /* 472 */ ULong guest_FPR27; -- /* 480 */ ULong guest_FPR28; -- /* 488 */ ULong guest_FPR29; -- /* 496 */ ULong guest_FPR30; -- /* 504 */ ULong guest_FPR31; -+ // Vector Registers, Floating Point Registers, and VSX Registers -+ // With ISA 2.06, the "Vector-Scalar Floating-point" category -+ // provides facilities to support vector and scalar binary floating- -+ // point operations. A unified register file is an integral part -+ // of this new facility, combining floating point and vector registers -+ // using a 64x128-bit vector. These are referred to as VSR[0..63]. -+ // The floating point registers are now mapped into double word element 0 -+ // of VSR[0..31]. The 32x128-bit vector registers defined by the "Vector -+ // Facility [Category: Vector]" are now mapped to VSR[32..63]. - -- // Vector Registers - // IMPORTANT: the user of libvex must place the guest state so as -- // to ensure that guest_VR{0..31}, and any shadows thereof, are -+ // to ensure that guest_VSR{0..63}, and any shadows thereof, are - // 16-aligned. -- /* 512 */ U128 guest_VR0; -- /* 528 */ U128 guest_VR1; -- /* 544 */ U128 guest_VR2; -- /* 560 */ U128 guest_VR3; -- /* 576 */ U128 guest_VR4; -- /* 592 */ U128 guest_VR5; -- /* 608 */ U128 guest_VR6; -- /* 624 */ U128 guest_VR7; -- /* 640 */ U128 guest_VR8; -- /* 656 */ U128 guest_VR9; -- /* 672 */ U128 guest_VR10; -- /* 688 */ U128 guest_VR11; -- /* 704 */ U128 guest_VR12; -- /* 720 */ U128 guest_VR13; -- /* 736 */ U128 guest_VR14; -- /* 752 */ U128 guest_VR15; -- /* 768 */ U128 guest_VR16; -- /* 784 */ U128 guest_VR17; -- /* 800 */ U128 guest_VR18; -- /* 816 */ U128 guest_VR19; -- /* 832 */ U128 guest_VR20; -- /* 848 */ U128 guest_VR21; -- /* 864 */ U128 guest_VR22; -- /* 880 */ U128 guest_VR23; -- /* 896 */ U128 guest_VR24; -- /* 912 */ U128 guest_VR25; -- /* 928 */ U128 guest_VR26; -- /* 944 */ U128 guest_VR27; -- /* 960 */ U128 guest_VR28; -- /* 976 */ U128 guest_VR29; -- /* 992 */ U128 guest_VR30; -- /* 1008 */ U128 guest_VR31; -- -- /* 1024 */ ULong guest_CIA; // IP (no arch visible register) -- /* 1032 */ ULong guest_LR; // Link Register -- /* 1040 */ ULong guest_CTR; // Count Register -+ -+ /* 256 */ U128 guest_VSR0; -+ /* 272 */ U128 guest_VSR1; -+ /* 288 */ U128 guest_VSR2; -+ /* 304 */ U128 guest_VSR3; -+ /* 320 */ U128 guest_VSR4; -+ /* 336 */ U128 guest_VSR5; -+ /* 352 */ U128 guest_VSR6; -+ /* 368 */ U128 guest_VSR7; -+ /* 384 */ U128 guest_VSR8; -+ /* 400 */ U128 guest_VSR9; -+ /* 416 */ U128 guest_VSR10; -+ /* 432 */ U128 guest_VSR11; -+ /* 448 */ U128 guest_VSR12; -+ /* 464 */ U128 guest_VSR13; -+ /* 480 */ U128 guest_VSR14; -+ /* 496 */ U128 guest_VSR15; -+ /* 512 */ U128 guest_VSR16; -+ /* 528 */ U128 guest_VSR17; -+ /* 544 */ U128 guest_VSR18; -+ /* 560 */ U128 guest_VSR19; -+ /* 576 */ U128 guest_VSR20; -+ /* 592 */ U128 guest_VSR21; -+ /* 608 */ U128 guest_VSR22; -+ /* 624 */ U128 guest_VSR23; -+ /* 640 */ U128 guest_VSR24; -+ /* 656 */ U128 guest_VSR25; -+ /* 672 */ U128 guest_VSR26; -+ /* 688 */ U128 guest_VSR27; -+ /* 704 */ U128 guest_VSR28; -+ /* 720 */ U128 guest_VSR29; -+ /* 736 */ U128 guest_VSR30; -+ /* 752 */ U128 guest_VSR31; -+ /* 768 */ U128 guest_VSR32; -+ /* 784 */ U128 guest_VSR33; -+ /* 800 */ U128 guest_VSR34; -+ /* 816 */ U128 guest_VSR35; -+ /* 832 */ U128 guest_VSR36; -+ /* 848 */ U128 guest_VSR37; -+ /* 864 */ U128 guest_VSR38; -+ /* 880 */ U128 guest_VSR39; -+ /* 896 */ U128 guest_VSR40; -+ /* 912 */ U128 guest_VSR41; -+ /* 928 */ U128 guest_VSR42; -+ /* 944 */ U128 guest_VSR43; -+ /* 960 */ U128 guest_VSR44; -+ /* 976 */ U128 guest_VSR45; -+ /* 992 */ U128 guest_VSR46; -+ /* 1008 */ U128 guest_VSR47; -+ /* 1024 */ U128 guest_VSR48; -+ /* 1040 */ U128 guest_VSR49; -+ /* 1056 */ U128 guest_VSR50; -+ /* 1072 */ U128 guest_VSR51; -+ /* 1088 */ U128 guest_VSR52; -+ /* 1104 */ U128 guest_VSR53; -+ /* 1120 */ U128 guest_VSR54; -+ /* 1136 */ U128 guest_VSR55; -+ /* 1152 */ U128 guest_VSR56; -+ /* 1168 */ U128 guest_VSR57; -+ /* 1184 */ U128 guest_VSR58; -+ /* 1200 */ U128 guest_VSR59; -+ /* 1216 */ U128 guest_VSR60; -+ /* 1232 */ U128 guest_VSR61; -+ /* 1248 */ U128 guest_VSR62; -+ /* 1264 */ U128 guest_VSR63; -+ -+ /* 1280 */ ULong guest_CIA; // IP (no arch visible register) -+ /* 1288 */ ULong guest_LR; // Link Register -+ /* 1296 */ ULong guest_CTR; // Count Register - - /* XER pieces */ -- /* 1048 */ UChar guest_XER_SO; /* in lsb */ -- /* 1049 */ UChar guest_XER_OV; /* in lsb */ -- /* 1050 */ UChar guest_XER_CA; /* in lsb */ -- /* 1051 */ UChar guest_XER_BC; /* all bits */ -+ /* 1304 */ UChar guest_XER_SO; /* in lsb */ -+ /* 1305 */ UChar guest_XER_OV; /* in lsb */ -+ /* 1306 */ UChar guest_XER_CA; /* in lsb */ -+ /* 1307 */ UChar guest_XER_BC; /* all bits */ - - /* CR pieces */ -- /* 1052 */ UChar guest_CR0_321; /* in [3:1] */ -- /* 1053 */ UChar guest_CR0_0; /* in lsb */ -- /* 1054 */ UChar guest_CR1_321; /* in [3:1] */ -- /* 1055 */ UChar guest_CR1_0; /* in lsb */ -- /* 1056 */ UChar guest_CR2_321; /* in [3:1] */ -- /* 1057 */ UChar guest_CR2_0; /* in lsb */ -- /* 1058 */ UChar guest_CR3_321; /* in [3:1] */ -- /* 1059 */ UChar guest_CR3_0; /* in lsb */ -- /* 1060 */ UChar guest_CR4_321; /* in [3:1] */ -- /* 1061 */ UChar guest_CR4_0; /* in lsb */ -- /* 1062 */ UChar guest_CR5_321; /* in [3:1] */ -- /* 1063 */ UChar guest_CR5_0; /* in lsb */ -- /* 1064 */ UChar guest_CR6_321; /* in [3:1] */ -- /* 1065 */ UChar guest_CR6_0; /* in lsb */ -- /* 1066 */ UChar guest_CR7_321; /* in [3:1] */ -- /* 1067 */ UChar guest_CR7_0; /* in lsb */ -+ /* 1308 */ UChar guest_CR0_321; /* in [3:1] */ -+ /* 1309 */ UChar guest_CR0_0; /* in lsb */ -+ /* 1310 */ UChar guest_CR1_321; /* in [3:1] */ -+ /* 1311 */ UChar guest_CR1_0; /* in lsb */ -+ /* 1312 */ UChar guest_CR2_321; /* in [3:1] */ -+ /* 1313 */ UChar guest_CR2_0; /* in lsb */ -+ /* 1314 */ UChar guest_CR3_321; /* in [3:1] */ -+ /* 1315 */ UChar guest_CR3_0; /* in lsb */ -+ /* 1316 */ UChar guest_CR4_321; /* in [3:1] */ -+ /* 1317 */ UChar guest_CR4_0; /* in lsb */ -+ /* 1318 */ UChar guest_CR5_321; /* in [3:1] */ -+ /* 1319 */ UChar guest_CR5_0; /* in lsb */ -+ /* 1320 */ UChar guest_CR6_321; /* in [3:1] */ -+ /* 1321 */ UChar guest_CR6_0; /* in lsb */ -+ /* 1322 */ UChar guest_CR7_321; /* in [3:1] */ -+ /* 1323 */ UChar guest_CR7_0; /* in lsb */ - - /* FP Status & Control Register fields */ -- /* 1068 */ UInt guest_FPROUND; // FP Rounding Mode -+ /* 1324 */ UInt guest_FPROUND; // FP Rounding Mode - - /* Vector Save/Restore Register */ -- /* 1072 */ UInt guest_VRSAVE; -+ /* 1328 */ UInt guest_VRSAVE; - - /* Vector Status and Control Register */ -- /* 1076 */ UInt guest_VSCR; -+ /* 1332 */ UInt guest_VSCR; - - /* Emulation warnings */ -- /* 1080 */ UInt guest_EMWARN; -+ /* 1336 */ UInt guest_EMWARN; - - /* gcc adds 4 bytes padding here: pre-empt it. */ -- /* 1084 */ UInt padding; -+ /* 1340 */ UInt padding; - - /* For icbi: record start and length of area to invalidate */ -- /* 1088 */ ULong guest_TISTART; -- /* 1096 */ ULong guest_TILEN; -+ /* 1344 */ ULong guest_TISTART; -+ /* 1352 */ ULong guest_TILEN; - - /* Used to record the unredirected guest address at the start of - a translation whose start has been redirected. By reading -@@ -244,26 +252,26 @@ typedef - find out what the corresponding no-redirection address was. - Note, this is only set for wrap-style redirects, not for - replace-style ones. */ -- /* 1104 */ ULong guest_NRADDR; -- /* 1112 */ ULong guest_NRADDR_GPR2; -+ /* 1360 */ ULong guest_NRADDR; -+ /* 1368 */ ULong guest_NRADDR_GPR2; - - /* A grows-upwards stack for hidden saves/restores of LR and R2 - needed for function interception and wrapping on ppc64-linux. - A horrible hack. REDIR_SP points to the highest live entry, - and so starts at -1. */ -- /* 1120 */ ULong guest_REDIR_SP; -- /* 1128 */ ULong guest_REDIR_STACK[VEX_GUEST_PPC64_REDIR_STACK_SIZE]; -+ /* 1376 */ ULong guest_REDIR_SP; -+ /* 1384 */ ULong guest_REDIR_STACK[VEX_GUEST_PPC64_REDIR_STACK_SIZE]; - - /* Needed for AIX: CIA at the last SC insn. Used when backing up - to restart a syscall that has been interrupted by a signal. */ -- /* 1384 */ ULong guest_IP_AT_SYSCALL; -+ /* 1640 */ ULong guest_IP_AT_SYSCALL; - - /* SPRG3, which AIUI is readonly in user space. Needed for - threading on AIX. */ -- /* ???? */ ULong guest_SPRG3_RO; -+ /* 1648 */ ULong guest_SPRG3_RO; - -- /* Padding to make it have an 8-aligned size */ -- /* ???? */ ULong padding2; -+ /* Padding to make it have an 16-aligned size */ -+ /* 1656 */ ULong padding2; - } - VexGuestPPC64State; - -Index: VEX/pub/libvex.h -=================================================================== ---- VEX/pub/libvex.h.orig -+++ VEX/pub/libvex.h -@@ -87,12 +87,14 @@ typedef - #define VEX_HWCAPS_PPC32_FX (1<<10) /* FP extns (fsqrt, fsqrts) */ - #define VEX_HWCAPS_PPC32_GX (1<<11) /* Graphics extns - (fres,frsqrte,fsel,stfiwx) */ -+#define VEX_HWCAPS_PPC32_VX (1<<12) /* Vector-scalar floating-point (VSX); implies ISA 2.06 or higher */ - - /* ppc64: baseline capability is integer and basic FP insns */ --#define VEX_HWCAPS_PPC64_V (1<<12) /* Altivec (VMX) */ --#define VEX_HWCAPS_PPC64_FX (1<<13) /* FP extns (fsqrt, fsqrts) */ --#define VEX_HWCAPS_PPC64_GX (1<<14) /* Graphics extns -+#define VEX_HWCAPS_PPC64_V (1<<13) /* Altivec (VMX) */ -+#define VEX_HWCAPS_PPC64_FX (1<<14) /* FP extns (fsqrt, fsqrts) */ -+#define VEX_HWCAPS_PPC64_GX (1<<15) /* Graphics extns - (fres,frsqrte,fsel,stfiwx) */ -+#define VEX_HWCAPS_PPC64_VX (1<<16) /* Vector-scalar floating-point (VSX); implies ISA 2.06 or higher */ - - /* s390x: baseline capability is z/Architecture with long displacement */ - #define VEX_HWCAPS_S390X_LDISP (1<<13) /* Long-displacement facility */ -Index: VEX/pub/libvex_ir.h -=================================================================== ---- VEX/pub/libvex_ir.h.orig -+++ VEX/pub/libvex_ir.h -@@ -616,6 +616,8 @@ typedef - Iop_I16StoF64, /* signed I16 -> F64 */ - Iop_I32StoF64, /* signed I32 -> F64 */ - Iop_I64StoF64, /* IRRoundingMode(I32) x signed I64 -> F64 */ -+ Iop_I64UtoF64, /* IRRoundingMode(I32) x unsigned I64 -> F64 */ -+ Iop_I64UtoF32, /* IRRoundingMode(I32) x unsigned I64 -> F32 */ - - Iop_I32UtoF64, /* unsigned I32 -> F64 */ - diff --git a/vg_bug270794_r11697.patch b/vg_bug270794_r11697.patch deleted file mode 100644 index 8f14a70..0000000 --- a/vg_bug270794_r11697.patch +++ /dev/null @@ -1,7624 +0,0 @@ -Index: configure.in -=================================================================== ---- configure.in.orig -+++ configure.in -@@ -968,6 +968,38 @@ CFLAGS=$safe_CFLAGS - AM_CONDITIONAL([HAS_ALTIVEC], [test x$ac_have_altivec = xyes]) - - -+# Check that both: the compiler supports -mvsx and that the assembler -+# understands VSX instructions. If either of those doesn't work, -+# conclude that we can't do VSX. NOTE: basically this is a kludge -+# in that it conflates two things that should be separate -- whether -+# the compiler understands the flag vs whether the assembler -+# understands the opcodes. This really ought to be cleaned up -+# and done properly, like it is for x86/x86_64. -+ -+AC_MSG_CHECKING([for VSX]) -+ -+safe_CFLAGS=$CFLAGS -+CFLAGS="-mvsx" -+ -+AC_TRY_COMPILE( -+[ -+#include -+], [ -+ vector unsigned int v; -+ __asm__ __volatile__("xsmaddadp %vs32, %vs32, %vs33" ::: "memory","cc"); -+], -+[ -+ac_have_vsx=yes -+AC_MSG_RESULT([yes]) -+], [ -+ac_have_vsx=no -+AC_MSG_RESULT([no]) -+]) -+CFLAGS=$safe_CFLAGS -+ -+AM_CONDITIONAL(HAS_VSX, test x$ac_have_vsx = xyes) -+ -+ - # Check for pthread_create@GLIBC2.0 - AC_MSG_CHECKING([for pthread_create@GLIBC2.0()]) - -Index: coregrind/m_coredump/coredump-elf.c -=================================================================== ---- coregrind/m_coredump/coredump-elf.c.orig -+++ coregrind/m_coredump/coredump-elf.c -@@ -410,8 +410,9 @@ static void fill_fpu(const ThreadState * - - #elif defined(VGP_ppc32_linux) - /* The guest state has the FPR fields declared as ULongs, so need -- to fish out the values without converting them. */ --# define DO(n) (*fpu)[n] = *(double*)(&arch->vex.guest_FPR##n) -+ to fish out the values without converting them. -+ NOTE: The 32 FP registers map to the first 32 VSX registers.*/ -+# define DO(n) (*fpu)[n] = *(double*)(&arch->vex.guest_VSR##n) - DO(0); DO(1); DO(2); DO(3); DO(4); DO(5); DO(6); DO(7); - DO(8); DO(9); DO(10); DO(11); DO(12); DO(13); DO(14); DO(15); - DO(16); DO(17); DO(18); DO(19); DO(20); DO(21); DO(22); DO(23); -@@ -420,8 +421,9 @@ static void fill_fpu(const ThreadState * - - #elif defined(VGP_ppc64_linux) - /* The guest state has the FPR fields declared as ULongs, so need -- to fish out the values without converting them. */ --# define DO(n) (*fpu)[n] = *(double*)(&arch->vex.guest_FPR##n) -+ to fish out the values without converting them. -+ NOTE: The 32 FP registers map to the first 32 VSX registers.*/ -+# define DO(n) (*fpu)[n] = *(double*)(&arch->vex.guest_VSR##n) - DO(0); DO(1); DO(2); DO(3); DO(4); DO(5); DO(6); DO(7); - DO(8); DO(9); DO(10); DO(11); DO(12); DO(13); DO(14); DO(15); - DO(16); DO(17); DO(18); DO(19); DO(20); DO(21); DO(22); DO(23); -Index: coregrind/m_machine.c -=================================================================== ---- coregrind/m_machine.c.orig -+++ coregrind/m_machine.c -@@ -652,7 +652,7 @@ Bool VG_(machine_get_hwcaps)( void ) - vki_sigaction_fromK_t saved_sigill_act, saved_sigfpe_act; - vki_sigaction_toK_t tmp_sigill_act, tmp_sigfpe_act; - -- volatile Bool have_F, have_V, have_FX, have_GX; -+ volatile Bool have_F, have_V, have_FX, have_GX, have_VX; - Int r; - - /* This is a kludge. Really we ought to back-convert saved_act -@@ -741,8 +741,9 @@ Bool VG_(machine_get_hwcaps)( void ) - vg_assert(r == 0); - r = VG_(sigprocmask)(VKI_SIG_SETMASK, &saved_set, NULL); - vg_assert(r == 0); -- VG_(debugLog)(1, "machine", "F %d V %d FX %d GX %d\n", -- (Int)have_F, (Int)have_V, (Int)have_FX, (Int)have_GX); -+ VG_(debugLog)(1, "machine", "F %d V %d FX %d GX %d VX %d\n", -+ (Int)have_F, (Int)have_V, (Int)have_FX, -+ (Int)have_GX, (Int)have_VX); - /* Make FP a prerequisite for VMX (bogusly so), and for FX and GX. */ - if (have_V && !have_F) - have_V = False; -@@ -761,6 +762,7 @@ Bool VG_(machine_get_hwcaps)( void ) - if (have_V) vai.hwcaps |= VEX_HWCAPS_PPC32_V; - if (have_FX) vai.hwcaps |= VEX_HWCAPS_PPC32_FX; - if (have_GX) vai.hwcaps |= VEX_HWCAPS_PPC32_GX; -+ if (have_VX) vai.hwcaps |= VEX_HWCAPS_PPC32_VX; - - /* But we're not done yet: VG_(machine_ppc32_set_clszB) must be - called before we're ready to go. */ -@@ -774,7 +776,7 @@ Bool VG_(machine_get_hwcaps)( void ) - vki_sigaction_fromK_t saved_sigill_act, saved_sigfpe_act; - vki_sigaction_toK_t tmp_sigill_act, tmp_sigfpe_act; - -- volatile Bool have_F, have_V, have_FX, have_GX; -+ volatile Bool have_F, have_V, have_FX, have_GX, have_VX; - Int r; - - /* This is a kludge. Really we ought to back-convert saved_act -@@ -845,6 +847,14 @@ Bool VG_(machine_get_hwcaps)( void ) - __asm__ __volatile__(".long 0xFC000034"); /*frsqrte 0,0*/ - } - -+ /* VSX support implies Power ISA 2.06 */ -+ have_VX = True; -+ if (VG_MINIMAL_SETJMP(env_unsup_insn)) { -+ have_VX = False; -+ } else { -+ __asm__ __volatile__(".long 0xf0000564"); /* xsabsdp XT,XB */ -+ } -+ - /* determine dcbz/dcbzl sizes while we still have the signal - * handlers registered */ - find_ppc_dcbz_sz(&vai); -@@ -852,8 +862,9 @@ Bool VG_(machine_get_hwcaps)( void ) - VG_(sigaction)(VKI_SIGILL, &saved_sigill_act, NULL); - VG_(sigaction)(VKI_SIGFPE, &saved_sigfpe_act, NULL); - VG_(sigprocmask)(VKI_SIG_SETMASK, &saved_set, NULL); -- VG_(debugLog)(1, "machine", "F %d V %d FX %d GX %d\n", -- (Int)have_F, (Int)have_V, (Int)have_FX, (Int)have_GX); -+ VG_(debugLog)(1, "machine", "F %d V %d FX %d GX %d VX %d\n", -+ (Int)have_F, (Int)have_V, (Int)have_FX, -+ (Int)have_GX, (Int)have_VX); - /* on ppc64, if we don't even have FP, just give up. */ - if (!have_F) - return False; -@@ -866,6 +877,7 @@ Bool VG_(machine_get_hwcaps)( void ) - if (have_V) vai.hwcaps |= VEX_HWCAPS_PPC64_V; - if (have_FX) vai.hwcaps |= VEX_HWCAPS_PPC64_FX; - if (have_GX) vai.hwcaps |= VEX_HWCAPS_PPC64_GX; -+ if (have_VX) vai.hwcaps |= VEX_HWCAPS_PPC64_VX; - - /* But we're not done yet: VG_(machine_ppc64_set_clszB) must be - called before we're ready to go. */ -Index: coregrind/m_scheduler/scheduler.c -=================================================================== ---- coregrind/m_scheduler/scheduler.c.orig -+++ coregrind/m_scheduler/scheduler.c -@@ -658,13 +658,13 @@ static void do_pre_run_checks ( ThreadSt - # if defined(VGA_ppc32) || defined(VGA_ppc64) - /* ppc guest_state vector regs must be 16 byte aligned for - loads/stores. This is important! */ -- vg_assert(VG_IS_16_ALIGNED(& tst->arch.vex.guest_VR0)); -- vg_assert(VG_IS_16_ALIGNED(& tst->arch.vex_shadow1.guest_VR0)); -- vg_assert(VG_IS_16_ALIGNED(& tst->arch.vex_shadow2.guest_VR0)); -+ vg_assert(VG_IS_16_ALIGNED(& tst->arch.vex.guest_VSR0)); -+ vg_assert(VG_IS_16_ALIGNED(& tst->arch.vex_shadow1.guest_VSR0)); -+ vg_assert(VG_IS_16_ALIGNED(& tst->arch.vex_shadow2.guest_VSR0)); - /* be extra paranoid .. */ -- vg_assert(VG_IS_16_ALIGNED(& tst->arch.vex.guest_VR1)); -- vg_assert(VG_IS_16_ALIGNED(& tst->arch.vex_shadow1.guest_VR1)); -- vg_assert(VG_IS_16_ALIGNED(& tst->arch.vex_shadow2.guest_VR1)); -+ vg_assert(VG_IS_16_ALIGNED(& tst->arch.vex.guest_VSR1)); -+ vg_assert(VG_IS_16_ALIGNED(& tst->arch.vex_shadow1.guest_VSR1)); -+ vg_assert(VG_IS_16_ALIGNED(& tst->arch.vex_shadow2.guest_VSR1)); - # endif - - # if defined(VGA_arm) -Index: exp-ptrcheck/h_main.c -=================================================================== ---- exp-ptrcheck/h_main.c.orig -+++ exp-ptrcheck/h_main.c -@@ -1574,77 +1574,118 @@ static void get_IntRegInfo ( /*OUT*/IntR - if (o == GOF(CR7_0)) goto none; - } - -+ // With ISA 2.06, the "Vector-Scalar Floating-point" category -+ // provides facilities to support vector and scalar binary floating- -+ // point operations. A unified register file is an integral part -+ // of this new facility, combining floating point and vector registers -+ // using a 64x128-bit vector. These are referred to as VSR[0..63]. -+ // The floating point registers are now mapped into double word element 0 -+ // of VSR[0..31]. The 32x128-bit vector registers defined by the "Vector -+ // Facility [Category: Vector]" are now mapped to VSR[32..63]. -+ - /* Exact accesses to FP registers */ -- if (o == GOF(FPR0) && is8) goto none; -- if (o == GOF(FPR1) && is8) goto none; -- if (o == GOF(FPR2) && is8) goto none; -- if (o == GOF(FPR3) && is8) goto none; -- if (o == GOF(FPR4) && is8) goto none; -- if (o == GOF(FPR5) && is8) goto none; -- if (o == GOF(FPR6) && is8) goto none; -- if (o == GOF(FPR7) && is8) goto none; -- if (o == GOF(FPR8) && is8) goto none; -- if (o == GOF(FPR9) && is8) goto none; -- if (o == GOF(FPR10) && is8) goto none; -- if (o == GOF(FPR11) && is8) goto none; -- if (o == GOF(FPR12) && is8) goto none; -- if (o == GOF(FPR13) && is8) goto none; -- if (o == GOF(FPR14) && is8) goto none; -- if (o == GOF(FPR15) && is8) goto none; -- if (o == GOF(FPR16) && is8) goto none; -- if (o == GOF(FPR17) && is8) goto none; -- if (o == GOF(FPR18) && is8) goto none; -- if (o == GOF(FPR19) && is8) goto none; -- if (o == GOF(FPR20) && is8) goto none; -- if (o == GOF(FPR21) && is8) goto none; -- if (o == GOF(FPR22) && is8) goto none; -- if (o == GOF(FPR23) && is8) goto none; -- if (o == GOF(FPR24) && is8) goto none; -- if (o == GOF(FPR25) && is8) goto none; -- if (o == GOF(FPR26) && is8) goto none; -- if (o == GOF(FPR27) && is8) goto none; -- if (o == GOF(FPR28) && is8) goto none; -- if (o == GOF(FPR29) && is8) goto none; -- if (o == GOF(FPR30) && is8) goto none; -- if (o == GOF(FPR31) && is8) goto none; -+ if (o == GOF(VSR0) && is8) goto none; -+ if (o == GOF(VSR1) && is8) goto none; -+ if (o == GOF(VSR2) && is8) goto none; -+ if (o == GOF(VSR3) && is8) goto none; -+ if (o == GOF(VSR4) && is8) goto none; -+ if (o == GOF(VSR5) && is8) goto none; -+ if (o == GOF(VSR6) && is8) goto none; -+ if (o == GOF(VSR7) && is8) goto none; -+ if (o == GOF(VSR8) && is8) goto none; -+ if (o == GOF(VSR9) && is8) goto none; -+ if (o == GOF(VSR10) && is8) goto none; -+ if (o == GOF(VSR11) && is8) goto none; -+ if (o == GOF(VSR12) && is8) goto none; -+ if (o == GOF(VSR13) && is8) goto none; -+ if (o == GOF(VSR14) && is8) goto none; -+ if (o == GOF(VSR15) && is8) goto none; -+ if (o == GOF(VSR16) && is8) goto none; -+ if (o == GOF(VSR17) && is8) goto none; -+ if (o == GOF(VSR18) && is8) goto none; -+ if (o == GOF(VSR19) && is8) goto none; -+ if (o == GOF(VSR20) && is8) goto none; -+ if (o == GOF(VSR21) && is8) goto none; -+ if (o == GOF(VSR22) && is8) goto none; -+ if (o == GOF(VSR23) && is8) goto none; -+ if (o == GOF(VSR24) && is8) goto none; -+ if (o == GOF(VSR25) && is8) goto none; -+ if (o == GOF(VSR26) && is8) goto none; -+ if (o == GOF(VSR27) && is8) goto none; -+ if (o == GOF(VSR28) && is8) goto none; -+ if (o == GOF(VSR29) && is8) goto none; -+ if (o == GOF(VSR30) && is8) goto none; -+ if (o == GOF(VSR31) && is8) goto none; - - /* FP admin related */ - if (o == GOF(FPROUND) && is4) goto none; - if (o == GOF(EMWARN) && is4) goto none; - -- /* Altivec registers */ -- if (o == GOF(VR0) && sz == 16) goto none; -- if (o == GOF(VR1) && sz == 16) goto none; -- if (o == GOF(VR2) && sz == 16) goto none; -- if (o == GOF(VR3) && sz == 16) goto none; -- if (o == GOF(VR4) && sz == 16) goto none; -- if (o == GOF(VR5) && sz == 16) goto none; -- if (o == GOF(VR6) && sz == 16) goto none; -- if (o == GOF(VR7) && sz == 16) goto none; -- if (o == GOF(VR8) && sz == 16) goto none; -- if (o == GOF(VR9) && sz == 16) goto none; -- if (o == GOF(VR10) && sz == 16) goto none; -- if (o == GOF(VR11) && sz == 16) goto none; -- if (o == GOF(VR12) && sz == 16) goto none; -- if (o == GOF(VR13) && sz == 16) goto none; -- if (o == GOF(VR14) && sz == 16) goto none; -- if (o == GOF(VR15) && sz == 16) goto none; -- if (o == GOF(VR16) && sz == 16) goto none; -- if (o == GOF(VR17) && sz == 16) goto none; -- if (o == GOF(VR18) && sz == 16) goto none; -- if (o == GOF(VR19) && sz == 16) goto none; -- if (o == GOF(VR20) && sz == 16) goto none; -- if (o == GOF(VR21) && sz == 16) goto none; -- if (o == GOF(VR22) && sz == 16) goto none; -- if (o == GOF(VR23) && sz == 16) goto none; -- if (o == GOF(VR24) && sz == 16) goto none; -- if (o == GOF(VR25) && sz == 16) goto none; -- if (o == GOF(VR26) && sz == 16) goto none; -- if (o == GOF(VR27) && sz == 16) goto none; -- if (o == GOF(VR28) && sz == 16) goto none; -- if (o == GOF(VR29) && sz == 16) goto none; -- if (o == GOF(VR30) && sz == 16) goto none; -- if (o == GOF(VR31) && sz == 16) goto none; -+ /* Vector registers */ -+ if (o == GOF(VSR0) && sz == 16) goto none; -+ if (o == GOF(VSR1) && sz == 16) goto none; -+ if (o == GOF(VSR2) && sz == 16) goto none; -+ if (o == GOF(VSR3) && sz == 16) goto none; -+ if (o == GOF(VSR4) && sz == 16) goto none; -+ if (o == GOF(VSR5) && sz == 16) goto none; -+ if (o == GOF(VSR6) && sz == 16) goto none; -+ if (o == GOF(VSR7) && sz == 16) goto none; -+ if (o == GOF(VSR8) && sz == 16) goto none; -+ if (o == GOF(VSR9) && sz == 16) goto none; -+ if (o == GOF(VSR10) && sz == 16) goto none; -+ if (o == GOF(VSR11) && sz == 16) goto none; -+ if (o == GOF(VSR12) && sz == 16) goto none; -+ if (o == GOF(VSR13) && sz == 16) goto none; -+ if (o == GOF(VSR14) && sz == 16) goto none; -+ if (o == GOF(VSR15) && sz == 16) goto none; -+ if (o == GOF(VSR16) && sz == 16) goto none; -+ if (o == GOF(VSR17) && sz == 16) goto none; -+ if (o == GOF(VSR18) && sz == 16) goto none; -+ if (o == GOF(VSR19) && sz == 16) goto none; -+ if (o == GOF(VSR20) && sz == 16) goto none; -+ if (o == GOF(VSR21) && sz == 16) goto none; -+ if (o == GOF(VSR22) && sz == 16) goto none; -+ if (o == GOF(VSR23) && sz == 16) goto none; -+ if (o == GOF(VSR24) && sz == 16) goto none; -+ if (o == GOF(VSR25) && sz == 16) goto none; -+ if (o == GOF(VSR26) && sz == 16) goto none; -+ if (o == GOF(VSR27) && sz == 16) goto none; -+ if (o == GOF(VSR28) && sz == 16) goto none; -+ if (o == GOF(VSR29) && sz == 16) goto none; -+ if (o == GOF(VSR30) && sz == 16) goto none; -+ if (o == GOF(VSR31) && sz == 16) goto none; -+ if (o == GOF(VSR32) && sz == 16) goto none; -+ if (o == GOF(VSR33) && sz == 16) goto none; -+ if (o == GOF(VSR34) && sz == 16) goto none; -+ if (o == GOF(VSR35) && sz == 16) goto none; -+ if (o == GOF(VSR36) && sz == 16) goto none; -+ if (o == GOF(VSR37) && sz == 16) goto none; -+ if (o == GOF(VSR38) && sz == 16) goto none; -+ if (o == GOF(VSR39) && sz == 16) goto none; -+ if (o == GOF(VSR40) && sz == 16) goto none; -+ if (o == GOF(VSR41) && sz == 16) goto none; -+ if (o == GOF(VSR42) && sz == 16) goto none; -+ if (o == GOF(VSR43) && sz == 16) goto none; -+ if (o == GOF(VSR44) && sz == 16) goto none; -+ if (o == GOF(VSR45) && sz == 16) goto none; -+ if (o == GOF(VSR46) && sz == 16) goto none; -+ if (o == GOF(VSR47) && sz == 16) goto none; -+ if (o == GOF(VSR48) && sz == 16) goto none; -+ if (o == GOF(VSR49) && sz == 16) goto none; -+ if (o == GOF(VSR50) && sz == 16) goto none; -+ if (o == GOF(VSR51) && sz == 16) goto none; -+ if (o == GOF(VSR52) && sz == 16) goto none; -+ if (o == GOF(VSR53) && sz == 16) goto none; -+ if (o == GOF(VSR54) && sz == 16) goto none; -+ if (o == GOF(VSR55) && sz == 16) goto none; -+ if (o == GOF(VSR56) && sz == 16) goto none; -+ if (o == GOF(VSR57) && sz == 16) goto none; -+ if (o == GOF(VSR58) && sz == 16) goto none; -+ if (o == GOF(VSR59) && sz == 16) goto none; -+ if (o == GOF(VSR60) && sz == 16) goto none; -+ if (o == GOF(VSR61) && sz == 16) goto none; -+ if (o == GOF(VSR62) && sz == 16) goto none; -+ if (o == GOF(VSR63) && sz == 16) goto none; - - /* Altivec admin related */ - if (o == GOF(VRSAVE) && is4) goto none; -@@ -1737,77 +1778,118 @@ static void get_IntRegInfo ( /*OUT*/IntR - if (o == GOF(CR7_0)) goto none; - } - -+ // With ISA 2.06, the "Vector-Scalar Floating-point" category -+ // provides facilities to support vector and scalar binary floating- -+ // point operations. A unified register file is an integral part -+ // of this new facility, combining floating point and vector registers -+ // using a 64x128-bit vector. These are referred to as VSR[0..63]. -+ // The floating point registers are now mapped into double word element 0 -+ // of VSR[0..31]. The 32x128-bit vector registers defined by the "Vector -+ // Facility [Category: Vector]" are now mapped to VSR[32..63]. -+ - /* Exact accesses to FP registers */ -- if (o == GOF(FPR0) && is8) goto none; -- if (o == GOF(FPR1) && is8) goto none; -- if (o == GOF(FPR2) && is8) goto none; -- if (o == GOF(FPR3) && is8) goto none; -- if (o == GOF(FPR4) && is8) goto none; -- if (o == GOF(FPR5) && is8) goto none; -- if (o == GOF(FPR6) && is8) goto none; -- if (o == GOF(FPR7) && is8) goto none; -- if (o == GOF(FPR8) && is8) goto none; -- if (o == GOF(FPR9) && is8) goto none; -- if (o == GOF(FPR10) && is8) goto none; -- if (o == GOF(FPR11) && is8) goto none; -- if (o == GOF(FPR12) && is8) goto none; -- if (o == GOF(FPR13) && is8) goto none; -- if (o == GOF(FPR14) && is8) goto none; -- if (o == GOF(FPR15) && is8) goto none; -- if (o == GOF(FPR16) && is8) goto none; -- if (o == GOF(FPR17) && is8) goto none; -- if (o == GOF(FPR18) && is8) goto none; -- if (o == GOF(FPR19) && is8) goto none; -- if (o == GOF(FPR20) && is8) goto none; -- if (o == GOF(FPR21) && is8) goto none; -- if (o == GOF(FPR22) && is8) goto none; -- if (o == GOF(FPR23) && is8) goto none; -- if (o == GOF(FPR24) && is8) goto none; -- if (o == GOF(FPR25) && is8) goto none; -- if (o == GOF(FPR26) && is8) goto none; -- if (o == GOF(FPR27) && is8) goto none; -- if (o == GOF(FPR28) && is8) goto none; -- if (o == GOF(FPR29) && is8) goto none; -- if (o == GOF(FPR30) && is8) goto none; -- if (o == GOF(FPR31) && is8) goto none; -+ if (o == GOF(VSR0) && is8) goto none; -+ if (o == GOF(VSR1) && is8) goto none; -+ if (o == GOF(VSR2) && is8) goto none; -+ if (o == GOF(VSR3) && is8) goto none; -+ if (o == GOF(VSR4) && is8) goto none; -+ if (o == GOF(VSR5) && is8) goto none; -+ if (o == GOF(VSR6) && is8) goto none; -+ if (o == GOF(VSR7) && is8) goto none; -+ if (o == GOF(VSR8) && is8) goto none; -+ if (o == GOF(VSR9) && is8) goto none; -+ if (o == GOF(VSR10) && is8) goto none; -+ if (o == GOF(VSR11) && is8) goto none; -+ if (o == GOF(VSR12) && is8) goto none; -+ if (o == GOF(VSR13) && is8) goto none; -+ if (o == GOF(VSR14) && is8) goto none; -+ if (o == GOF(VSR15) && is8) goto none; -+ if (o == GOF(VSR16) && is8) goto none; -+ if (o == GOF(VSR17) && is8) goto none; -+ if (o == GOF(VSR18) && is8) goto none; -+ if (o == GOF(VSR19) && is8) goto none; -+ if (o == GOF(VSR20) && is8) goto none; -+ if (o == GOF(VSR21) && is8) goto none; -+ if (o == GOF(VSR22) && is8) goto none; -+ if (o == GOF(VSR23) && is8) goto none; -+ if (o == GOF(VSR24) && is8) goto none; -+ if (o == GOF(VSR25) && is8) goto none; -+ if (o == GOF(VSR26) && is8) goto none; -+ if (o == GOF(VSR27) && is8) goto none; -+ if (o == GOF(VSR28) && is8) goto none; -+ if (o == GOF(VSR29) && is8) goto none; -+ if (o == GOF(VSR30) && is8) goto none; -+ if (o == GOF(VSR31) && is8) goto none; - - /* FP admin related */ - if (o == GOF(FPROUND) && is4) goto none; - if (o == GOF(EMWARN) && is4) goto none; - -- /* Altivec registers */ -- if (o == GOF(VR0) && sz == 16) goto none; -- if (o == GOF(VR1) && sz == 16) goto none; -- if (o == GOF(VR2) && sz == 16) goto none; -- if (o == GOF(VR3) && sz == 16) goto none; -- if (o == GOF(VR4) && sz == 16) goto none; -- if (o == GOF(VR5) && sz == 16) goto none; -- if (o == GOF(VR6) && sz == 16) goto none; -- if (o == GOF(VR7) && sz == 16) goto none; -- if (o == GOF(VR8) && sz == 16) goto none; -- if (o == GOF(VR9) && sz == 16) goto none; -- if (o == GOF(VR10) && sz == 16) goto none; -- if (o == GOF(VR11) && sz == 16) goto none; -- if (o == GOF(VR12) && sz == 16) goto none; -- if (o == GOF(VR13) && sz == 16) goto none; -- if (o == GOF(VR14) && sz == 16) goto none; -- if (o == GOF(VR15) && sz == 16) goto none; -- if (o == GOF(VR16) && sz == 16) goto none; -- if (o == GOF(VR17) && sz == 16) goto none; -- if (o == GOF(VR18) && sz == 16) goto none; -- if (o == GOF(VR19) && sz == 16) goto none; -- if (o == GOF(VR20) && sz == 16) goto none; -- if (o == GOF(VR21) && sz == 16) goto none; -- if (o == GOF(VR22) && sz == 16) goto none; -- if (o == GOF(VR23) && sz == 16) goto none; -- if (o == GOF(VR24) && sz == 16) goto none; -- if (o == GOF(VR25) && sz == 16) goto none; -- if (o == GOF(VR26) && sz == 16) goto none; -- if (o == GOF(VR27) && sz == 16) goto none; -- if (o == GOF(VR28) && sz == 16) goto none; -- if (o == GOF(VR29) && sz == 16) goto none; -- if (o == GOF(VR30) && sz == 16) goto none; -- if (o == GOF(VR31) && sz == 16) goto none; -+ /* Vector registers */ -+ if (o == GOF(VSR0) && sz == 16) goto none; -+ if (o == GOF(VSR1) && sz == 16) goto none; -+ if (o == GOF(VSR2) && sz == 16) goto none; -+ if (o == GOF(VSR3) && sz == 16) goto none; -+ if (o == GOF(VSR4) && sz == 16) goto none; -+ if (o == GOF(VSR5) && sz == 16) goto none; -+ if (o == GOF(VSR6) && sz == 16) goto none; -+ if (o == GOF(VSR7) && sz == 16) goto none; -+ if (o == GOF(VSR8) && sz == 16) goto none; -+ if (o == GOF(VSR9) && sz == 16) goto none; -+ if (o == GOF(VSR10) && sz == 16) goto none; -+ if (o == GOF(VSR11) && sz == 16) goto none; -+ if (o == GOF(VSR12) && sz == 16) goto none; -+ if (o == GOF(VSR13) && sz == 16) goto none; -+ if (o == GOF(VSR14) && sz == 16) goto none; -+ if (o == GOF(VSR15) && sz == 16) goto none; -+ if (o == GOF(VSR16) && sz == 16) goto none; -+ if (o == GOF(VSR17) && sz == 16) goto none; -+ if (o == GOF(VSR18) && sz == 16) goto none; -+ if (o == GOF(VSR19) && sz == 16) goto none; -+ if (o == GOF(VSR20) && sz == 16) goto none; -+ if (o == GOF(VSR21) && sz == 16) goto none; -+ if (o == GOF(VSR22) && sz == 16) goto none; -+ if (o == GOF(VSR23) && sz == 16) goto none; -+ if (o == GOF(VSR24) && sz == 16) goto none; -+ if (o == GOF(VSR25) && sz == 16) goto none; -+ if (o == GOF(VSR26) && sz == 16) goto none; -+ if (o == GOF(VSR27) && sz == 16) goto none; -+ if (o == GOF(VSR28) && sz == 16) goto none; -+ if (o == GOF(VSR29) && sz == 16) goto none; -+ if (o == GOF(VSR30) && sz == 16) goto none; -+ if (o == GOF(VSR31) && sz == 16) goto none; -+ if (o == GOF(VSR32) && sz == 16) goto none; -+ if (o == GOF(VSR33) && sz == 16) goto none; -+ if (o == GOF(VSR34) && sz == 16) goto none; -+ if (o == GOF(VSR35) && sz == 16) goto none; -+ if (o == GOF(VSR36) && sz == 16) goto none; -+ if (o == GOF(VSR37) && sz == 16) goto none; -+ if (o == GOF(VSR38) && sz == 16) goto none; -+ if (o == GOF(VSR39) && sz == 16) goto none; -+ if (o == GOF(VSR40) && sz == 16) goto none; -+ if (o == GOF(VSR41) && sz == 16) goto none; -+ if (o == GOF(VSR42) && sz == 16) goto none; -+ if (o == GOF(VSR43) && sz == 16) goto none; -+ if (o == GOF(VSR44) && sz == 16) goto none; -+ if (o == GOF(VSR45) && sz == 16) goto none; -+ if (o == GOF(VSR46) && sz == 16) goto none; -+ if (o == GOF(VSR47) && sz == 16) goto none; -+ if (o == GOF(VSR48) && sz == 16) goto none; -+ if (o == GOF(VSR49) && sz == 16) goto none; -+ if (o == GOF(VSR50) && sz == 16) goto none; -+ if (o == GOF(VSR51) && sz == 16) goto none; -+ if (o == GOF(VSR52) && sz == 16) goto none; -+ if (o == GOF(VSR53) && sz == 16) goto none; -+ if (o == GOF(VSR54) && sz == 16) goto none; -+ if (o == GOF(VSR55) && sz == 16) goto none; -+ if (o == GOF(VSR56) && sz == 16) goto none; -+ if (o == GOF(VSR57) && sz == 16) goto none; -+ if (o == GOF(VSR58) && sz == 16) goto none; -+ if (o == GOF(VSR59) && sz == 16) goto none; -+ if (o == GOF(VSR60) && sz == 16) goto none; -+ if (o == GOF(VSR61) && sz == 16) goto none; -+ if (o == GOF(VSR62) && sz == 16) goto none; -+ if (o == GOF(VSR63) && sz == 16) goto none; - - /* Altivec admin related */ - if (o == GOF(VRSAVE) && is4) goto none; -Index: memcheck/mc_machine.c -=================================================================== ---- memcheck/mc_machine.c.orig -+++ memcheck/mc_machine.c -@@ -200,98 +200,139 @@ static Int get_otrack_shadow_offset_wrk - if (o == GOF(VRSAVE) && sz == 4) return -1; - if (o == GOF(REDIR_SP) && sz == 8) return -1; - -- tl_assert(SZB(FPR0) == 8); -- if (o == GOF(FPR0) && sz == 8) return o; -- if (o == GOF(FPR1) && sz == 8) return o; -- if (o == GOF(FPR2) && sz == 8) return o; -- if (o == GOF(FPR3) && sz == 8) return o; -- if (o == GOF(FPR4) && sz == 8) return o; -- if (o == GOF(FPR5) && sz == 8) return o; -- if (o == GOF(FPR6) && sz == 8) return o; -- if (o == GOF(FPR7) && sz == 8) return o; -- if (o == GOF(FPR8) && sz == 8) return o; -- if (o == GOF(FPR9) && sz == 8) return o; -- if (o == GOF(FPR10) && sz == 8) return o; -- if (o == GOF(FPR11) && sz == 8) return o; -- if (o == GOF(FPR12) && sz == 8) return o; -- if (o == GOF(FPR13) && sz == 8) return o; -- if (o == GOF(FPR14) && sz == 8) return o; -- if (o == GOF(FPR15) && sz == 8) return o; -- if (o == GOF(FPR16) && sz == 8) return o; -- if (o == GOF(FPR17) && sz == 8) return o; -- if (o == GOF(FPR18) && sz == 8) return o; -- if (o == GOF(FPR19) && sz == 8) return o; -- if (o == GOF(FPR20) && sz == 8) return o; -- if (o == GOF(FPR21) && sz == 8) return o; -- if (o == GOF(FPR22) && sz == 8) return o; -- if (o == GOF(FPR23) && sz == 8) return o; -- if (o == GOF(FPR24) && sz == 8) return o; -- if (o == GOF(FPR25) && sz == 8) return o; -- if (o == GOF(FPR26) && sz == 8) return o; -- if (o == GOF(FPR27) && sz == 8) return o; -- if (o == GOF(FPR28) && sz == 8) return o; -- if (o == GOF(FPR29) && sz == 8) return o; -- if (o == GOF(FPR30) && sz == 8) return o; -- if (o == GOF(FPR31) && sz == 8) return o; -+ // With ISA 2.06, the "Vector-Scalar Floating-point" category -+ // provides facilities to support vector and scalar binary floating- -+ // point operations. A unified register file is an integral part -+ // of this new facility, combining floating point and vector registers -+ // using a 64x128-bit vector. These are referred to as VSR[0..63]. -+ // The floating point registers are now mapped into double word element 0 -+ // of VSR[0..31]. The 32x128-bit vector registers defined by the "Vector -+ // Facility [Category: Vector]" are now mapped to VSR[32..63]. -+ -+ // Floating point registers . . . -+ if (o == GOF(VSR0) && sz == 8) return o; -+ if (o == GOF(VSR1) && sz == 8) return o; -+ if (o == GOF(VSR2) && sz == 8) return o; -+ if (o == GOF(VSR3) && sz == 8) return o; -+ if (o == GOF(VSR4) && sz == 8) return o; -+ if (o == GOF(VSR5) && sz == 8) return o; -+ if (o == GOF(VSR6) && sz == 8) return o; -+ if (o == GOF(VSR7) && sz == 8) return o; -+ if (o == GOF(VSR8) && sz == 8) return o; -+ if (o == GOF(VSR9) && sz == 8) return o; -+ if (o == GOF(VSR10) && sz == 8) return o; -+ if (o == GOF(VSR11) && sz == 8) return o; -+ if (o == GOF(VSR12) && sz == 8) return o; -+ if (o == GOF(VSR13) && sz == 8) return o; -+ if (o == GOF(VSR14) && sz == 8) return o; -+ if (o == GOF(VSR15) && sz == 8) return o; -+ if (o == GOF(VSR16) && sz == 8) return o; -+ if (o == GOF(VSR17) && sz == 8) return o; -+ if (o == GOF(VSR18) && sz == 8) return o; -+ if (o == GOF(VSR19) && sz == 8) return o; -+ if (o == GOF(VSR20) && sz == 8) return o; -+ if (o == GOF(VSR21) && sz == 8) return o; -+ if (o == GOF(VSR22) && sz == 8) return o; -+ if (o == GOF(VSR23) && sz == 8) return o; -+ if (o == GOF(VSR24) && sz == 8) return o; -+ if (o == GOF(VSR25) && sz == 8) return o; -+ if (o == GOF(VSR26) && sz == 8) return o; -+ if (o == GOF(VSR27) && sz == 8) return o; -+ if (o == GOF(VSR28) && sz == 8) return o; -+ if (o == GOF(VSR29) && sz == 8) return o; -+ if (o == GOF(VSR30) && sz == 8) return o; -+ if (o == GOF(VSR31) && sz == 8) return o; - - /* For the various byte sized XER/CR pieces, use offset 8 -- in VR0 .. VR31. */ -- tl_assert(SZB(VR0) == 16); -- if (o == GOF(XER_SO) && sz == 1) return 8 +GOF(VR0); -- if (o == GOF(XER_OV) && sz == 1) return 8 +GOF(VR1); -- if (o == GOF(XER_CA) && sz == 1) return 8 +GOF(VR2); -- if (o == GOF(XER_BC) && sz == 1) return 8 +GOF(VR3); -- -- if (o == GOF(CR0_321) && sz == 1) return 8 +GOF(VR4); -- if (o == GOF(CR0_0) && sz == 1) return 8 +GOF(VR5); -- if (o == GOF(CR1_321) && sz == 1) return 8 +GOF(VR6); -- if (o == GOF(CR1_0) && sz == 1) return 8 +GOF(VR7); -- if (o == GOF(CR2_321) && sz == 1) return 8 +GOF(VR8); -- if (o == GOF(CR2_0) && sz == 1) return 8 +GOF(VR9); -- if (o == GOF(CR3_321) && sz == 1) return 8 +GOF(VR10); -- if (o == GOF(CR3_0) && sz == 1) return 8 +GOF(VR11); -- if (o == GOF(CR4_321) && sz == 1) return 8 +GOF(VR12); -- if (o == GOF(CR4_0) && sz == 1) return 8 +GOF(VR13); -- if (o == GOF(CR5_321) && sz == 1) return 8 +GOF(VR14); -- if (o == GOF(CR5_0) && sz == 1) return 8 +GOF(VR15); -- if (o == GOF(CR6_321) && sz == 1) return 8 +GOF(VR16); -- if (o == GOF(CR6_0) && sz == 1) return 8 +GOF(VR17); -- if (o == GOF(CR7_321) && sz == 1) return 8 +GOF(VR18); -- if (o == GOF(CR7_0) && sz == 1) return 8 +GOF(VR19); -- -- /* Vector registers .. use offset 0 in VR0 .. VR31. */ -- if (o >= GOF(VR0) && o+sz <= GOF(VR0) +SZB(VR0)) return 0+ GOF(VR0); -- if (o >= GOF(VR1) && o+sz <= GOF(VR1) +SZB(VR1)) return 0+ GOF(VR1); -- if (o >= GOF(VR2) && o+sz <= GOF(VR2) +SZB(VR2)) return 0+ GOF(VR2); -- if (o >= GOF(VR3) && o+sz <= GOF(VR3) +SZB(VR3)) return 0+ GOF(VR3); -- if (o >= GOF(VR4) && o+sz <= GOF(VR4) +SZB(VR4)) return 0+ GOF(VR4); -- if (o >= GOF(VR5) && o+sz <= GOF(VR5) +SZB(VR5)) return 0+ GOF(VR5); -- if (o >= GOF(VR6) && o+sz <= GOF(VR6) +SZB(VR6)) return 0+ GOF(VR6); -- if (o >= GOF(VR7) && o+sz <= GOF(VR7) +SZB(VR7)) return 0+ GOF(VR7); -- if (o >= GOF(VR8) && o+sz <= GOF(VR8) +SZB(VR8)) return 0+ GOF(VR8); -- if (o >= GOF(VR9) && o+sz <= GOF(VR9) +SZB(VR9)) return 0+ GOF(VR9); -- if (o >= GOF(VR10) && o+sz <= GOF(VR10)+SZB(VR10)) return 0+ GOF(VR10); -- if (o >= GOF(VR11) && o+sz <= GOF(VR11)+SZB(VR11)) return 0+ GOF(VR11); -- if (o >= GOF(VR12) && o+sz <= GOF(VR12)+SZB(VR12)) return 0+ GOF(VR12); -- if (o >= GOF(VR13) && o+sz <= GOF(VR13)+SZB(VR13)) return 0+ GOF(VR13); -- if (o >= GOF(VR14) && o+sz <= GOF(VR14)+SZB(VR14)) return 0+ GOF(VR14); -- if (o >= GOF(VR15) && o+sz <= GOF(VR15)+SZB(VR15)) return 0+ GOF(VR15); -- if (o >= GOF(VR16) && o+sz <= GOF(VR16)+SZB(VR16)) return 0+ GOF(VR16); -- if (o >= GOF(VR17) && o+sz <= GOF(VR17)+SZB(VR17)) return 0+ GOF(VR17); -- if (o >= GOF(VR18) && o+sz <= GOF(VR18)+SZB(VR18)) return 0+ GOF(VR18); -- if (o >= GOF(VR19) && o+sz <= GOF(VR19)+SZB(VR19)) return 0+ GOF(VR19); -- if (o >= GOF(VR20) && o+sz <= GOF(VR20)+SZB(VR20)) return 0+ GOF(VR20); -- if (o >= GOF(VR21) && o+sz <= GOF(VR21)+SZB(VR21)) return 0+ GOF(VR21); -- if (o >= GOF(VR22) && o+sz <= GOF(VR22)+SZB(VR22)) return 0+ GOF(VR22); -- if (o >= GOF(VR23) && o+sz <= GOF(VR23)+SZB(VR23)) return 0+ GOF(VR23); -- if (o >= GOF(VR24) && o+sz <= GOF(VR24)+SZB(VR24)) return 0+ GOF(VR24); -- if (o >= GOF(VR25) && o+sz <= GOF(VR25)+SZB(VR25)) return 0+ GOF(VR25); -- if (o >= GOF(VR26) && o+sz <= GOF(VR26)+SZB(VR26)) return 0+ GOF(VR26); -- if (o >= GOF(VR27) && o+sz <= GOF(VR27)+SZB(VR27)) return 0+ GOF(VR27); -- if (o >= GOF(VR28) && o+sz <= GOF(VR28)+SZB(VR28)) return 0+ GOF(VR28); -- if (o >= GOF(VR29) && o+sz <= GOF(VR29)+SZB(VR29)) return 0+ GOF(VR29); -- if (o >= GOF(VR30) && o+sz <= GOF(VR30)+SZB(VR30)) return 0+ GOF(VR30); -- if (o >= GOF(VR31) && o+sz <= GOF(VR31)+SZB(VR31)) return 0+ GOF(VR31); -+ in VSR0 .. VSR19. */ -+ tl_assert(SZB(VSR0) == 16); -+ if (o == GOF(XER_SO) && sz == 1) return 8 +GOF(VSR0); -+ if (o == GOF(XER_OV) && sz == 1) return 8 +GOF(VSR1); -+ if (o == GOF(XER_CA) && sz == 1) return 8 +GOF(VSR2); -+ if (o == GOF(XER_BC) && sz == 1) return 8 +GOF(VSR3); -+ -+ if (o == GOF(CR0_321) && sz == 1) return 8 +GOF(VSR4); -+ if (o == GOF(CR0_0) && sz == 1) return 8 +GOF(VSR5); -+ if (o == GOF(CR1_321) && sz == 1) return 8 +GOF(VSR6); -+ if (o == GOF(CR1_0) && sz == 1) return 8 +GOF(VSR7); -+ if (o == GOF(CR2_321) && sz == 1) return 8 +GOF(VSR8); -+ if (o == GOF(CR2_0) && sz == 1) return 8 +GOF(VSR9); -+ if (o == GOF(CR3_321) && sz == 1) return 8 +GOF(VSR10); -+ if (o == GOF(CR3_0) && sz == 1) return 8 +GOF(VSR11); -+ if (o == GOF(CR4_321) && sz == 1) return 8 +GOF(VSR12); -+ if (o == GOF(CR4_0) && sz == 1) return 8 +GOF(VSR13); -+ if (o == GOF(CR5_321) && sz == 1) return 8 +GOF(VSR14); -+ if (o == GOF(CR5_0) && sz == 1) return 8 +GOF(VSR15); -+ if (o == GOF(CR6_321) && sz == 1) return 8 +GOF(VSR16); -+ if (o == GOF(CR6_0) && sz == 1) return 8 +GOF(VSR17); -+ if (o == GOF(CR7_321) && sz == 1) return 8 +GOF(VSR18); -+ if (o == GOF(CR7_0) && sz == 1) return 8 +GOF(VSR19); -+ -+ /* Vector registers .. use offset 0 in VSR0 .. VSR63. */ -+ if (o >= GOF(VSR0) && o+sz <= GOF(VSR0) +SZB(VSR0)) return 0+ GOF(VSR0); -+ if (o >= GOF(VSR1) && o+sz <= GOF(VSR1) +SZB(VSR1)) return 0+ GOF(VSR1); -+ if (o >= GOF(VSR2) && o+sz <= GOF(VSR2) +SZB(VSR2)) return 0+ GOF(VSR2); -+ if (o >= GOF(VSR3) && o+sz <= GOF(VSR3) +SZB(VSR3)) return 0+ GOF(VSR3); -+ if (o >= GOF(VSR4) && o+sz <= GOF(VSR4) +SZB(VSR4)) return 0+ GOF(VSR4); -+ if (o >= GOF(VSR5) && o+sz <= GOF(VSR5) +SZB(VSR5)) return 0+ GOF(VSR5); -+ if (o >= GOF(VSR6) && o+sz <= GOF(VSR6) +SZB(VSR6)) return 0+ GOF(VSR6); -+ if (o >= GOF(VSR7) && o+sz <= GOF(VSR7) +SZB(VSR7)) return 0+ GOF(VSR7); -+ if (o >= GOF(VSR8) && o+sz <= GOF(VSR8) +SZB(VSR8)) return 0+ GOF(VSR8); -+ if (o >= GOF(VSR9) && o+sz <= GOF(VSR9) +SZB(VSR9)) return 0+ GOF(VSR9); -+ if (o >= GOF(VSR10) && o+sz <= GOF(VSR10)+SZB(VSR10)) return 0+ GOF(VSR10); -+ if (o >= GOF(VSR11) && o+sz <= GOF(VSR11)+SZB(VSR11)) return 0+ GOF(VSR11); -+ if (o >= GOF(VSR12) && o+sz <= GOF(VSR12)+SZB(VSR12)) return 0+ GOF(VSR12); -+ if (o >= GOF(VSR13) && o+sz <= GOF(VSR13)+SZB(VSR13)) return 0+ GOF(VSR13); -+ if (o >= GOF(VSR14) && o+sz <= GOF(VSR14)+SZB(VSR14)) return 0+ GOF(VSR14); -+ if (o >= GOF(VSR15) && o+sz <= GOF(VSR15)+SZB(VSR15)) return 0+ GOF(VSR15); -+ if (o >= GOF(VSR16) && o+sz <= GOF(VSR16)+SZB(VSR16)) return 0+ GOF(VSR16); -+ if (o >= GOF(VSR17) && o+sz <= GOF(VSR17)+SZB(VSR17)) return 0+ GOF(VSR17); -+ if (o >= GOF(VSR18) && o+sz <= GOF(VSR18)+SZB(VSR18)) return 0+ GOF(VSR18); -+ if (o >= GOF(VSR19) && o+sz <= GOF(VSR19)+SZB(VSR19)) return 0+ GOF(VSR19); -+ if (o >= GOF(VSR20) && o+sz <= GOF(VSR20)+SZB(VSR20)) return 0+ GOF(VSR20); -+ if (o >= GOF(VSR21) && o+sz <= GOF(VSR21)+SZB(VSR21)) return 0+ GOF(VSR21); -+ if (o >= GOF(VSR22) && o+sz <= GOF(VSR22)+SZB(VSR22)) return 0+ GOF(VSR22); -+ if (o >= GOF(VSR23) && o+sz <= GOF(VSR23)+SZB(VSR23)) return 0+ GOF(VSR23); -+ if (o >= GOF(VSR24) && o+sz <= GOF(VSR24)+SZB(VSR24)) return 0+ GOF(VSR24); -+ if (o >= GOF(VSR25) && o+sz <= GOF(VSR25)+SZB(VSR25)) return 0+ GOF(VSR25); -+ if (o >= GOF(VSR26) && o+sz <= GOF(VSR26)+SZB(VSR26)) return 0+ GOF(VSR26); -+ if (o >= GOF(VSR27) && o+sz <= GOF(VSR27)+SZB(VSR27)) return 0+ GOF(VSR27); -+ if (o >= GOF(VSR28) && o+sz <= GOF(VSR28)+SZB(VSR28)) return 0+ GOF(VSR28); -+ if (o >= GOF(VSR29) && o+sz <= GOF(VSR29)+SZB(VSR29)) return 0+ GOF(VSR29); -+ if (o >= GOF(VSR30) && o+sz <= GOF(VSR30)+SZB(VSR30)) return 0+ GOF(VSR30); -+ if (o >= GOF(VSR31) && o+sz <= GOF(VSR31)+SZB(VSR31)) return 0+ GOF(VSR31); -+ if (o >= GOF(VSR32) && o+sz <= GOF(VSR32)+SZB(VSR32)) return 0+ GOF(VSR32); -+ if (o >= GOF(VSR33) && o+sz <= GOF(VSR33)+SZB(VSR33)) return 0+ GOF(VSR33); -+ if (o >= GOF(VSR34) && o+sz <= GOF(VSR34)+SZB(VSR34)) return 0+ GOF(VSR34); -+ if (o >= GOF(VSR35) && o+sz <= GOF(VSR35)+SZB(VSR35)) return 0+ GOF(VSR35); -+ if (o >= GOF(VSR36) && o+sz <= GOF(VSR36)+SZB(VSR36)) return 0+ GOF(VSR36); -+ if (o >= GOF(VSR37) && o+sz <= GOF(VSR37)+SZB(VSR37)) return 0+ GOF(VSR37); -+ if (o >= GOF(VSR38) && o+sz <= GOF(VSR38)+SZB(VSR38)) return 0+ GOF(VSR38); -+ if (o >= GOF(VSR39) && o+sz <= GOF(VSR39)+SZB(VSR39)) return 0+ GOF(VSR39); -+ if (o >= GOF(VSR40) && o+sz <= GOF(VSR40)+SZB(VSR40)) return 0+ GOF(VSR40); -+ if (o >= GOF(VSR41) && o+sz <= GOF(VSR41)+SZB(VSR41)) return 0+ GOF(VSR41); -+ if (o >= GOF(VSR42) && o+sz <= GOF(VSR42)+SZB(VSR42)) return 0+ GOF(VSR42); -+ if (o >= GOF(VSR43) && o+sz <= GOF(VSR43)+SZB(VSR43)) return 0+ GOF(VSR43); -+ if (o >= GOF(VSR44) && o+sz <= GOF(VSR44)+SZB(VSR44)) return 0+ GOF(VSR44); -+ if (o >= GOF(VSR45) && o+sz <= GOF(VSR45)+SZB(VSR45)) return 0+ GOF(VSR45); -+ if (o >= GOF(VSR46) && o+sz <= GOF(VSR46)+SZB(VSR46)) return 0+ GOF(VSR46); -+ if (o >= GOF(VSR47) && o+sz <= GOF(VSR47)+SZB(VSR47)) return 0+ GOF(VSR47); -+ if (o >= GOF(VSR48) && o+sz <= GOF(VSR48)+SZB(VSR48)) return 0+ GOF(VSR48); -+ if (o >= GOF(VSR49) && o+sz <= GOF(VSR49)+SZB(VSR49)) return 0+ GOF(VSR49); -+ if (o >= GOF(VSR50) && o+sz <= GOF(VSR50)+SZB(VSR50)) return 0+ GOF(VSR50); -+ if (o >= GOF(VSR51) && o+sz <= GOF(VSR51)+SZB(VSR51)) return 0+ GOF(VSR51); -+ if (o >= GOF(VSR52) && o+sz <= GOF(VSR52)+SZB(VSR52)) return 0+ GOF(VSR52); -+ if (o >= GOF(VSR53) && o+sz <= GOF(VSR53)+SZB(VSR53)) return 0+ GOF(VSR53); -+ if (o >= GOF(VSR54) && o+sz <= GOF(VSR54)+SZB(VSR54)) return 0+ GOF(VSR54); -+ if (o >= GOF(VSR55) && o+sz <= GOF(VSR55)+SZB(VSR55)) return 0+ GOF(VSR55); -+ if (o >= GOF(VSR56) && o+sz <= GOF(VSR56)+SZB(VSR56)) return 0+ GOF(VSR56); -+ if (o >= GOF(VSR57) && o+sz <= GOF(VSR57)+SZB(VSR57)) return 0+ GOF(VSR57); -+ if (o >= GOF(VSR58) && o+sz <= GOF(VSR58)+SZB(VSR58)) return 0+ GOF(VSR58); -+ if (o >= GOF(VSR59) && o+sz <= GOF(VSR59)+SZB(VSR59)) return 0+ GOF(VSR59); -+ if (o >= GOF(VSR60) && o+sz <= GOF(VSR60)+SZB(VSR60)) return 0+ GOF(VSR60); -+ if (o >= GOF(VSR61) && o+sz <= GOF(VSR61)+SZB(VSR61)) return 0+ GOF(VSR61); -+ if (o >= GOF(VSR62) && o+sz <= GOF(VSR62)+SZB(VSR62)) return 0+ GOF(VSR62); -+ if (o >= GOF(VSR63) && o+sz <= GOF(VSR63)+SZB(VSR63)) return 0+ GOF(VSR63); - - VG_(printf)("MC_(get_otrack_shadow_offset)(ppc64)(off=%d,sz=%d)\n", - offset,szB); -@@ -359,98 +400,139 @@ static Int get_otrack_shadow_offset_wrk - if (o == GOF(REDIR_SP) && sz == 4) return -1; - if (o == GOF(SPRG3_RO) && sz == 4) return -1; - -- tl_assert(SZB(FPR0) == 8); -- if (o == GOF(FPR0) && sz == 8) return o; -- if (o == GOF(FPR1) && sz == 8) return o; -- if (o == GOF(FPR2) && sz == 8) return o; -- if (o == GOF(FPR3) && sz == 8) return o; -- if (o == GOF(FPR4) && sz == 8) return o; -- if (o == GOF(FPR5) && sz == 8) return o; -- if (o == GOF(FPR6) && sz == 8) return o; -- if (o == GOF(FPR7) && sz == 8) return o; -- if (o == GOF(FPR8) && sz == 8) return o; -- if (o == GOF(FPR9) && sz == 8) return o; -- if (o == GOF(FPR10) && sz == 8) return o; -- if (o == GOF(FPR11) && sz == 8) return o; -- if (o == GOF(FPR12) && sz == 8) return o; -- if (o == GOF(FPR13) && sz == 8) return o; -- if (o == GOF(FPR14) && sz == 8) return o; -- if (o == GOF(FPR15) && sz == 8) return o; -- if (o == GOF(FPR16) && sz == 8) return o; -- if (o == GOF(FPR17) && sz == 8) return o; -- if (o == GOF(FPR18) && sz == 8) return o; -- if (o == GOF(FPR19) && sz == 8) return o; -- if (o == GOF(FPR20) && sz == 8) return o; -- if (o == GOF(FPR21) && sz == 8) return o; -- if (o == GOF(FPR22) && sz == 8) return o; -- if (o == GOF(FPR23) && sz == 8) return o; -- if (o == GOF(FPR24) && sz == 8) return o; -- if (o == GOF(FPR25) && sz == 8) return o; -- if (o == GOF(FPR26) && sz == 8) return o; -- if (o == GOF(FPR27) && sz == 8) return o; -- if (o == GOF(FPR28) && sz == 8) return o; -- if (o == GOF(FPR29) && sz == 8) return o; -- if (o == GOF(FPR30) && sz == 8) return o; -- if (o == GOF(FPR31) && sz == 8) return o; -+ // With ISA 2.06, the "Vector-Scalar Floating-point" category -+ // provides facilities to support vector and scalar binary floating- -+ // point operations. A unified register file is an integral part -+ // of this new facility, combining floating point and vector registers -+ // using a 64x128-bit vector. These are referred to as VSR[0..63]. -+ // The floating point registers are now mapped into double word element 0 -+ // of VSR[0..31]. The 32x128-bit vector registers defined by the "Vector -+ // Facility [Category: Vector]" are now mapped to VSR[32..63]. -+ -+ // Floating point registers . . . -+ if (o == GOF(VSR0) && sz == 8) return o; -+ if (o == GOF(VSR1) && sz == 8) return o; -+ if (o == GOF(VSR2) && sz == 8) return o; -+ if (o == GOF(VSR3) && sz == 8) return o; -+ if (o == GOF(VSR4) && sz == 8) return o; -+ if (o == GOF(VSR5) && sz == 8) return o; -+ if (o == GOF(VSR6) && sz == 8) return o; -+ if (o == GOF(VSR7) && sz == 8) return o; -+ if (o == GOF(VSR8) && sz == 8) return o; -+ if (o == GOF(VSR9) && sz == 8) return o; -+ if (o == GOF(VSR10) && sz == 8) return o; -+ if (o == GOF(VSR11) && sz == 8) return o; -+ if (o == GOF(VSR12) && sz == 8) return o; -+ if (o == GOF(VSR13) && sz == 8) return o; -+ if (o == GOF(VSR14) && sz == 8) return o; -+ if (o == GOF(VSR15) && sz == 8) return o; -+ if (o == GOF(VSR16) && sz == 8) return o; -+ if (o == GOF(VSR17) && sz == 8) return o; -+ if (o == GOF(VSR18) && sz == 8) return o; -+ if (o == GOF(VSR19) && sz == 8) return o; -+ if (o == GOF(VSR20) && sz == 8) return o; -+ if (o == GOF(VSR21) && sz == 8) return o; -+ if (o == GOF(VSR22) && sz == 8) return o; -+ if (o == GOF(VSR23) && sz == 8) return o; -+ if (o == GOF(VSR24) && sz == 8) return o; -+ if (o == GOF(VSR25) && sz == 8) return o; -+ if (o == GOF(VSR26) && sz == 8) return o; -+ if (o == GOF(VSR27) && sz == 8) return o; -+ if (o == GOF(VSR28) && sz == 8) return o; -+ if (o == GOF(VSR29) && sz == 8) return o; -+ if (o == GOF(VSR30) && sz == 8) return o; -+ if (o == GOF(VSR31) && sz == 8) return o; - - /* For the various byte sized XER/CR pieces, use offset 8 -- in VR0 .. VR31. */ -- tl_assert(SZB(VR0) == 16); -- if (o == GOF(XER_SO) && sz == 1) return 8 +GOF(VR0); -- if (o == GOF(XER_OV) && sz == 1) return 8 +GOF(VR1); -- if (o == GOF(XER_CA) && sz == 1) return 8 +GOF(VR2); -- if (o == GOF(XER_BC) && sz == 1) return 8 +GOF(VR3); -- -- if (o == GOF(CR0_321) && sz == 1) return 8 +GOF(VR4); -- if (o == GOF(CR0_0) && sz == 1) return 8 +GOF(VR5); -- if (o == GOF(CR1_321) && sz == 1) return 8 +GOF(VR6); -- if (o == GOF(CR1_0) && sz == 1) return 8 +GOF(VR7); -- if (o == GOF(CR2_321) && sz == 1) return 8 +GOF(VR8); -- if (o == GOF(CR2_0) && sz == 1) return 8 +GOF(VR9); -- if (o == GOF(CR3_321) && sz == 1) return 8 +GOF(VR10); -- if (o == GOF(CR3_0) && sz == 1) return 8 +GOF(VR11); -- if (o == GOF(CR4_321) && sz == 1) return 8 +GOF(VR12); -- if (o == GOF(CR4_0) && sz == 1) return 8 +GOF(VR13); -- if (o == GOF(CR5_321) && sz == 1) return 8 +GOF(VR14); -- if (o == GOF(CR5_0) && sz == 1) return 8 +GOF(VR15); -- if (o == GOF(CR6_321) && sz == 1) return 8 +GOF(VR16); -- if (o == GOF(CR6_0) && sz == 1) return 8 +GOF(VR17); -- if (o == GOF(CR7_321) && sz == 1) return 8 +GOF(VR18); -- if (o == GOF(CR7_0) && sz == 1) return 8 +GOF(VR19); -- -- /* Vector registers .. use offset 0 in VR0 .. VR31. */ -- if (o >= GOF(VR0) && o+sz <= GOF(VR0) +SZB(VR0)) return 0+ GOF(VR0); -- if (o >= GOF(VR1) && o+sz <= GOF(VR1) +SZB(VR1)) return 0+ GOF(VR1); -- if (o >= GOF(VR2) && o+sz <= GOF(VR2) +SZB(VR2)) return 0+ GOF(VR2); -- if (o >= GOF(VR3) && o+sz <= GOF(VR3) +SZB(VR3)) return 0+ GOF(VR3); -- if (o >= GOF(VR4) && o+sz <= GOF(VR4) +SZB(VR4)) return 0+ GOF(VR4); -- if (o >= GOF(VR5) && o+sz <= GOF(VR5) +SZB(VR5)) return 0+ GOF(VR5); -- if (o >= GOF(VR6) && o+sz <= GOF(VR6) +SZB(VR6)) return 0+ GOF(VR6); -- if (o >= GOF(VR7) && o+sz <= GOF(VR7) +SZB(VR7)) return 0+ GOF(VR7); -- if (o >= GOF(VR8) && o+sz <= GOF(VR8) +SZB(VR8)) return 0+ GOF(VR8); -- if (o >= GOF(VR9) && o+sz <= GOF(VR9) +SZB(VR9)) return 0+ GOF(VR9); -- if (o >= GOF(VR10) && o+sz <= GOF(VR10)+SZB(VR10)) return 0+ GOF(VR10); -- if (o >= GOF(VR11) && o+sz <= GOF(VR11)+SZB(VR11)) return 0+ GOF(VR11); -- if (o >= GOF(VR12) && o+sz <= GOF(VR12)+SZB(VR12)) return 0+ GOF(VR12); -- if (o >= GOF(VR13) && o+sz <= GOF(VR13)+SZB(VR13)) return 0+ GOF(VR13); -- if (o >= GOF(VR14) && o+sz <= GOF(VR14)+SZB(VR14)) return 0+ GOF(VR14); -- if (o >= GOF(VR15) && o+sz <= GOF(VR15)+SZB(VR15)) return 0+ GOF(VR15); -- if (o >= GOF(VR16) && o+sz <= GOF(VR16)+SZB(VR16)) return 0+ GOF(VR16); -- if (o >= GOF(VR17) && o+sz <= GOF(VR17)+SZB(VR17)) return 0+ GOF(VR17); -- if (o >= GOF(VR18) && o+sz <= GOF(VR18)+SZB(VR18)) return 0+ GOF(VR18); -- if (o >= GOF(VR19) && o+sz <= GOF(VR19)+SZB(VR19)) return 0+ GOF(VR19); -- if (o >= GOF(VR20) && o+sz <= GOF(VR20)+SZB(VR20)) return 0+ GOF(VR20); -- if (o >= GOF(VR21) && o+sz <= GOF(VR21)+SZB(VR21)) return 0+ GOF(VR21); -- if (o >= GOF(VR22) && o+sz <= GOF(VR22)+SZB(VR22)) return 0+ GOF(VR22); -- if (o >= GOF(VR23) && o+sz <= GOF(VR23)+SZB(VR23)) return 0+ GOF(VR23); -- if (o >= GOF(VR24) && o+sz <= GOF(VR24)+SZB(VR24)) return 0+ GOF(VR24); -- if (o >= GOF(VR25) && o+sz <= GOF(VR25)+SZB(VR25)) return 0+ GOF(VR25); -- if (o >= GOF(VR26) && o+sz <= GOF(VR26)+SZB(VR26)) return 0+ GOF(VR26); -- if (o >= GOF(VR27) && o+sz <= GOF(VR27)+SZB(VR27)) return 0+ GOF(VR27); -- if (o >= GOF(VR28) && o+sz <= GOF(VR28)+SZB(VR28)) return 0+ GOF(VR28); -- if (o >= GOF(VR29) && o+sz <= GOF(VR29)+SZB(VR29)) return 0+ GOF(VR29); -- if (o >= GOF(VR30) && o+sz <= GOF(VR30)+SZB(VR30)) return 0+ GOF(VR30); -- if (o >= GOF(VR31) && o+sz <= GOF(VR31)+SZB(VR31)) return 0+ GOF(VR31); -+ in VSR0 .. VSR19. */ -+ tl_assert(SZB(VSR0) == 16); -+ if (o == GOF(XER_SO) && sz == 1) return 8 +GOF(VSR0); -+ if (o == GOF(XER_OV) && sz == 1) return 8 +GOF(VSR1); -+ if (o == GOF(XER_CA) && sz == 1) return 8 +GOF(VSR2); -+ if (o == GOF(XER_BC) && sz == 1) return 8 +GOF(VSR3); -+ -+ if (o == GOF(CR0_321) && sz == 1) return 8 +GOF(VSR4); -+ if (o == GOF(CR0_0) && sz == 1) return 8 +GOF(VSR5); -+ if (o == GOF(CR1_321) && sz == 1) return 8 +GOF(VSR6); -+ if (o == GOF(CR1_0) && sz == 1) return 8 +GOF(VSR7); -+ if (o == GOF(CR2_321) && sz == 1) return 8 +GOF(VSR8); -+ if (o == GOF(CR2_0) && sz == 1) return 8 +GOF(VSR9); -+ if (o == GOF(CR3_321) && sz == 1) return 8 +GOF(VSR10); -+ if (o == GOF(CR3_0) && sz == 1) return 8 +GOF(VSR11); -+ if (o == GOF(CR4_321) && sz == 1) return 8 +GOF(VSR12); -+ if (o == GOF(CR4_0) && sz == 1) return 8 +GOF(VSR13); -+ if (o == GOF(CR5_321) && sz == 1) return 8 +GOF(VSR14); -+ if (o == GOF(CR5_0) && sz == 1) return 8 +GOF(VSR15); -+ if (o == GOF(CR6_321) && sz == 1) return 8 +GOF(VSR16); -+ if (o == GOF(CR6_0) && sz == 1) return 8 +GOF(VSR17); -+ if (o == GOF(CR7_321) && sz == 1) return 8 +GOF(VSR18); -+ if (o == GOF(CR7_0) && sz == 1) return 8 +GOF(VSR19); -+ -+ /* Vector registers .. use offset 0 in VSR0 .. VSR63. */ -+ if (o >= GOF(VSR0) && o+sz <= GOF(VSR0) +SZB(VSR0)) return 0+ GOF(VSR0); -+ if (o >= GOF(VSR1) && o+sz <= GOF(VSR1) +SZB(VSR1)) return 0+ GOF(VSR1); -+ if (o >= GOF(VSR2) && o+sz <= GOF(VSR2) +SZB(VSR2)) return 0+ GOF(VSR2); -+ if (o >= GOF(VSR3) && o+sz <= GOF(VSR3) +SZB(VSR3)) return 0+ GOF(VSR3); -+ if (o >= GOF(VSR4) && o+sz <= GOF(VSR4) +SZB(VSR4)) return 0+ GOF(VSR4); -+ if (o >= GOF(VSR5) && o+sz <= GOF(VSR5) +SZB(VSR5)) return 0+ GOF(VSR5); -+ if (o >= GOF(VSR6) && o+sz <= GOF(VSR6) +SZB(VSR6)) return 0+ GOF(VSR6); -+ if (o >= GOF(VSR7) && o+sz <= GOF(VSR7) +SZB(VSR7)) return 0+ GOF(VSR7); -+ if (o >= GOF(VSR8) && o+sz <= GOF(VSR8) +SZB(VSR8)) return 0+ GOF(VSR8); -+ if (o >= GOF(VSR9) && o+sz <= GOF(VSR9) +SZB(VSR9)) return 0+ GOF(VSR9); -+ if (o >= GOF(VSR10) && o+sz <= GOF(VSR10)+SZB(VSR10)) return 0+ GOF(VSR10); -+ if (o >= GOF(VSR11) && o+sz <= GOF(VSR11)+SZB(VSR11)) return 0+ GOF(VSR11); -+ if (o >= GOF(VSR12) && o+sz <= GOF(VSR12)+SZB(VSR12)) return 0+ GOF(VSR12); -+ if (o >= GOF(VSR13) && o+sz <= GOF(VSR13)+SZB(VSR13)) return 0+ GOF(VSR13); -+ if (o >= GOF(VSR14) && o+sz <= GOF(VSR14)+SZB(VSR14)) return 0+ GOF(VSR14); -+ if (o >= GOF(VSR15) && o+sz <= GOF(VSR15)+SZB(VSR15)) return 0+ GOF(VSR15); -+ if (o >= GOF(VSR16) && o+sz <= GOF(VSR16)+SZB(VSR16)) return 0+ GOF(VSR16); -+ if (o >= GOF(VSR17) && o+sz <= GOF(VSR17)+SZB(VSR17)) return 0+ GOF(VSR17); -+ if (o >= GOF(VSR18) && o+sz <= GOF(VSR18)+SZB(VSR18)) return 0+ GOF(VSR18); -+ if (o >= GOF(VSR19) && o+sz <= GOF(VSR19)+SZB(VSR19)) return 0+ GOF(VSR19); -+ if (o >= GOF(VSR20) && o+sz <= GOF(VSR20)+SZB(VSR20)) return 0+ GOF(VSR20); -+ if (o >= GOF(VSR21) && o+sz <= GOF(VSR21)+SZB(VSR21)) return 0+ GOF(VSR21); -+ if (o >= GOF(VSR22) && o+sz <= GOF(VSR22)+SZB(VSR22)) return 0+ GOF(VSR22); -+ if (o >= GOF(VSR23) && o+sz <= GOF(VSR23)+SZB(VSR23)) return 0+ GOF(VSR23); -+ if (o >= GOF(VSR24) && o+sz <= GOF(VSR24)+SZB(VSR24)) return 0+ GOF(VSR24); -+ if (o >= GOF(VSR25) && o+sz <= GOF(VSR25)+SZB(VSR25)) return 0+ GOF(VSR25); -+ if (o >= GOF(VSR26) && o+sz <= GOF(VSR26)+SZB(VSR26)) return 0+ GOF(VSR26); -+ if (o >= GOF(VSR27) && o+sz <= GOF(VSR27)+SZB(VSR27)) return 0+ GOF(VSR27); -+ if (o >= GOF(VSR28) && o+sz <= GOF(VSR28)+SZB(VSR28)) return 0+ GOF(VSR28); -+ if (o >= GOF(VSR29) && o+sz <= GOF(VSR29)+SZB(VSR29)) return 0+ GOF(VSR29); -+ if (o >= GOF(VSR30) && o+sz <= GOF(VSR30)+SZB(VSR30)) return 0+ GOF(VSR30); -+ if (o >= GOF(VSR31) && o+sz <= GOF(VSR31)+SZB(VSR31)) return 0+ GOF(VSR31); -+ if (o >= GOF(VSR32) && o+sz <= GOF(VSR32)+SZB(VSR32)) return 0+ GOF(VSR32); -+ if (o >= GOF(VSR33) && o+sz <= GOF(VSR33)+SZB(VSR33)) return 0+ GOF(VSR33); -+ if (o >= GOF(VSR34) && o+sz <= GOF(VSR34)+SZB(VSR34)) return 0+ GOF(VSR34); -+ if (o >= GOF(VSR35) && o+sz <= GOF(VSR35)+SZB(VSR35)) return 0+ GOF(VSR35); -+ if (o >= GOF(VSR36) && o+sz <= GOF(VSR36)+SZB(VSR36)) return 0+ GOF(VSR36); -+ if (o >= GOF(VSR37) && o+sz <= GOF(VSR37)+SZB(VSR37)) return 0+ GOF(VSR37); -+ if (o >= GOF(VSR38) && o+sz <= GOF(VSR38)+SZB(VSR38)) return 0+ GOF(VSR38); -+ if (o >= GOF(VSR39) && o+sz <= GOF(VSR39)+SZB(VSR39)) return 0+ GOF(VSR39); -+ if (o >= GOF(VSR40) && o+sz <= GOF(VSR40)+SZB(VSR40)) return 0+ GOF(VSR40); -+ if (o >= GOF(VSR41) && o+sz <= GOF(VSR41)+SZB(VSR41)) return 0+ GOF(VSR41); -+ if (o >= GOF(VSR42) && o+sz <= GOF(VSR42)+SZB(VSR42)) return 0+ GOF(VSR42); -+ if (o >= GOF(VSR43) && o+sz <= GOF(VSR43)+SZB(VSR43)) return 0+ GOF(VSR43); -+ if (o >= GOF(VSR44) && o+sz <= GOF(VSR44)+SZB(VSR44)) return 0+ GOF(VSR44); -+ if (o >= GOF(VSR45) && o+sz <= GOF(VSR45)+SZB(VSR45)) return 0+ GOF(VSR45); -+ if (o >= GOF(VSR46) && o+sz <= GOF(VSR46)+SZB(VSR46)) return 0+ GOF(VSR46); -+ if (o >= GOF(VSR47) && o+sz <= GOF(VSR47)+SZB(VSR47)) return 0+ GOF(VSR47); -+ if (o >= GOF(VSR48) && o+sz <= GOF(VSR48)+SZB(VSR48)) return 0+ GOF(VSR48); -+ if (o >= GOF(VSR49) && o+sz <= GOF(VSR49)+SZB(VSR49)) return 0+ GOF(VSR49); -+ if (o >= GOF(VSR50) && o+sz <= GOF(VSR50)+SZB(VSR50)) return 0+ GOF(VSR50); -+ if (o >= GOF(VSR51) && o+sz <= GOF(VSR51)+SZB(VSR51)) return 0+ GOF(VSR51); -+ if (o >= GOF(VSR52) && o+sz <= GOF(VSR52)+SZB(VSR52)) return 0+ GOF(VSR52); -+ if (o >= GOF(VSR53) && o+sz <= GOF(VSR53)+SZB(VSR53)) return 0+ GOF(VSR53); -+ if (o >= GOF(VSR54) && o+sz <= GOF(VSR54)+SZB(VSR54)) return 0+ GOF(VSR54); -+ if (o >= GOF(VSR55) && o+sz <= GOF(VSR55)+SZB(VSR55)) return 0+ GOF(VSR55); -+ if (o >= GOF(VSR56) && o+sz <= GOF(VSR56)+SZB(VSR56)) return 0+ GOF(VSR56); -+ if (o >= GOF(VSR57) && o+sz <= GOF(VSR57)+SZB(VSR57)) return 0+ GOF(VSR57); -+ if (o >= GOF(VSR58) && o+sz <= GOF(VSR58)+SZB(VSR58)) return 0+ GOF(VSR58); -+ if (o >= GOF(VSR59) && o+sz <= GOF(VSR59)+SZB(VSR59)) return 0+ GOF(VSR59); -+ if (o >= GOF(VSR60) && o+sz <= GOF(VSR60)+SZB(VSR60)) return 0+ GOF(VSR60); -+ if (o >= GOF(VSR61) && o+sz <= GOF(VSR61)+SZB(VSR61)) return 0+ GOF(VSR61); -+ if (o >= GOF(VSR62) && o+sz <= GOF(VSR62)+SZB(VSR62)) return 0+ GOF(VSR62); -+ if (o >= GOF(VSR63) && o+sz <= GOF(VSR63)+SZB(VSR63)) return 0+ GOF(VSR63); - - VG_(printf)("MC_(get_otrack_shadow_offset)(ppc32)(off=%d,sz=%d)\n", - offset,szB); -Index: memcheck/mc_main.c -=================================================================== ---- memcheck/mc_main.c.orig -+++ memcheck/mc_main.c -@@ -3864,7 +3864,7 @@ static UInt mb_get_origin_for_guest_offs - static void mc_post_reg_write ( CorePart part, ThreadId tid, - PtrdiffT offset, SizeT size) - { --# define MAX_REG_WRITE_SIZE 1408 -+# define MAX_REG_WRITE_SIZE 1664 - UChar area[MAX_REG_WRITE_SIZE]; - tl_assert(size <= MAX_REG_WRITE_SIZE); - VG_(memset)(area, V_BITS8_DEFINED, size); -Index: memcheck/mc_translate.c -=================================================================== ---- memcheck/mc_translate.c.orig -+++ memcheck/mc_translate.c -@@ -2936,6 +2936,7 @@ IRAtom* expr2vbits_Binop ( MCEnv* mce, - case Iop_RoundF64toF32: - case Iop_F64toI64S: - case Iop_I64StoF64: -+ case Iop_I64UtoF64: - case Iop_SinF64: - case Iop_CosF64: - case Iop_TanF64: -@@ -2972,6 +2973,7 @@ IRAtom* expr2vbits_Binop ( MCEnv* mce, - case Iop_F64toI32U: - case Iop_F64toI32S: - case Iop_F64toF32: -+ case Iop_I64UtoF32: - /* First arg is I32 (rounding mode), second is F64 (data). */ - return mkLazy2(mce, Ity_I32, vatom1, vatom2); - -@@ -3452,6 +3454,7 @@ IRExpr* expr2vbits_Unop ( MCEnv* mce, IR - return mkPCast16x8(mce, - assignNew('V', mce, Ity_V128, unop(op, mkPCast8x16(mce, vatom)))); - -+ case Iop_I64UtoF32: - default: - ppIROp(op); - VG_(tool_panic)("memcheck:expr2vbits_Unop"); -Index: none/tests/ppc32/Makefile.am -=================================================================== ---- none/tests/ppc32/Makefile.am.orig -+++ none/tests/ppc32/Makefile.am -@@ -23,13 +23,15 @@ EXTRA_DIST = \ - tw.stderr.exp tw.stdout.exp tw.vgtest \ - xlc_dbl_u32.stderr.exp xlc_dbl_u32.stdout.exp xlc_dbl_u32.vgtest \ - power5+_round.stderr.exp power5+_round.stdout.exp power5+_round.vgtest \ -- power6_bcmp.stderr.exp power6_bcmp.stdout.exp power6_bcmp.vgtest -+ power6_bcmp.stderr.exp power6_bcmp.stdout.exp power6_bcmp.vgtest \ -+ test_isa_2_06_part1.stderr.exp test_isa_2_06_part1.stdout.exp test_isa_2_06_part1.vgtest - - check_PROGRAMS = \ - bug129390-ppc32 \ - bug139050-ppc32 \ - ldstrev lsw jm-insns mftocrf mcrfs round test_fx test_gx \ -- testVMX twi tw xlc_dbl_u32 power5+_round power6_bcmp -+ testVMX twi tw xlc_dbl_u32 power5+_round power6_bcmp \ -+ test_isa_2_06_part1 - - AM_CFLAGS += @FLAG_M32@ - AM_CXXFLAGS += @FLAG_M32@ -@@ -41,8 +43,20 @@ else - ALTIVEC_FLAG = - endif - -+if HAS_VSX -+BUILD_FLAG_VSX = -mvsx -+VSX_FLAG = -DHAS_VSX -+else -+BUILD_FLAG_VSX = -+VSX_FLAG = -+endif -+ - jm_insns_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames -maltivec \ - @FLAG_M32@ $(ALTIVEC_FLAG) - - testVMX_CFLAGS = $(AM_CFLAGS) -O -g -Wall -maltivec -mabi=altivec -DALTIVEC \ - -DGCC_COMPILER @FLAG_M32@ -+ -+test_isa_2_06_part1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(VSX_FLAG) \ -+ @FLAG_M32@ $(ALTIVEC_FLAG) $(BUILD_FLAG_VSX) -+ -Index: none/tests/ppc32/test_isa_2_06_part1.c -=================================================================== ---- /dev/null -+++ none/tests/ppc32/test_isa_2_06_part1.c -@@ -0,0 +1,2189 @@ -+/* Copyright (C) 2011 IBM -+ -+ Author: Maynard Johnson -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA -+ 02111-1307, USA. -+ -+ The GNU General Public License is contained in the file COPYING. -+ */ -+ -+#ifdef HAS_VSX -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#ifndef __powerpc64__ -+typedef uint32_t HWord_t; -+#else -+typedef uint64_t HWord_t; -+#endif /* __powerpc64__ */ -+ -+static int errors; -+register HWord_t r14 __asm__ ("r14"); -+register HWord_t r15 __asm__ ("r15"); -+register HWord_t r16 __asm__ ("r16"); -+register HWord_t r17 __asm__ ("r17"); -+register double f14 __asm__ ("fr14"); -+register double f15 __asm__ ("fr15"); -+register double f16 __asm__ ("fr16"); -+register double f17 __asm__ ("fr17"); -+ -+static volatile unsigned int cond_reg; -+ -+#define ALLCR "cr0","cr1","cr2","cr3","cr4","cr5","cr6","cr7" -+ -+#define SET_CR(_arg) \ -+ __asm__ __volatile__ ("mtcr %0" : : "b"(_arg) : ALLCR ); -+ -+#define SET_XER(_arg) \ -+ __asm__ __volatile__ ("mtxer %0" : : "b"(_arg) : "xer" ); -+ -+#define GET_CR(_lval) \ -+ __asm__ __volatile__ ("mfcr %0" : "=b"(_lval) ) -+ -+#define GET_XER(_lval) \ -+ __asm__ __volatile__ ("mfxer %0" : "=b"(_lval) ) -+ -+#define GET_CR_XER(_lval_cr,_lval_xer) \ -+ do { GET_CR(_lval_cr); GET_XER(_lval_xer); } while (0) -+ -+#define SET_CR_ZERO \ -+ SET_CR(0) -+ -+#define SET_XER_ZERO \ -+ SET_XER(0) -+ -+#define SET_CR_XER_ZERO \ -+ do { SET_CR_ZERO; SET_XER_ZERO; } while (0) -+ -+#define SET_FPSCR_ZERO \ -+ do { double _d = 0.0; \ -+ __asm__ __volatile__ ("mtfsf 0xFF, %0" : : "f"(_d) ); \ -+ } while (0) -+ -+ -+typedef void (*test_func_t)(void); -+typedef struct ldst_test ldst_test_t; -+typedef struct vsx_logic_test logic_test_t; -+typedef struct xs_conv_test xs_conv_test_t; -+typedef struct p7_fp_test fp_test_t; -+typedef struct vx_fp_test vx_fp_test_t; -+typedef struct vsx_move_test move_test_t; -+typedef struct vsx_permute_test permute_test_t; -+typedef struct test_table test_table_t; -+ -+static double *fargs = NULL; -+static int nb_fargs; -+ -+/* These functions below that construct a table of floating point -+ * values were lifted from none/tests/ppc32/jm-insns.c. -+ */ -+ -+#if defined (DEBUG_ARGS_BUILD) -+#define AB_DPRINTF(fmt, args...) do { fprintf(stderr, fmt , ##args); } while (0) -+#else -+#define AB_DPRINTF(fmt, args...) do { } while (0) -+#endif -+ -+static inline void register_farg (void *farg, -+ int s, uint16_t _exp, uint64_t mant) -+{ -+ uint64_t tmp; -+ -+ tmp = ((uint64_t)s << 63) | ((uint64_t)_exp << 52) | mant; -+ *(uint64_t *)farg = tmp; -+ AB_DPRINTF("%d %03x %013llx => %016llx %0e\n", -+ s, _exp, mant, *(uint64_t *)farg, *(double *)farg); -+} -+ -+static void build_fargs_table(void) -+/* -+ * Double precision: -+ * Sign goes from zero to one (1 bit) -+ * Exponent goes from 0 to ((1 << 12) - 1) (11 bits) -+ * Mantissa goes from 1 to ((1 << 52) - 1) (52 bits) -+ * + special values: -+ * +0.0 : 0 0x000 0x0000000000000 => 0x0000000000000000 -+ * -0.0 : 1 0x000 0x0000000000000 => 0x8000000000000000 -+ * +infinity : 0 0x7FF 0x0000000000000 => 0x7FF0000000000000 -+ * -infinity : 1 0x7FF 0x0000000000000 => 0xFFF0000000000000 -+ * +QNaN : 0 0x7FF 0x7FFFFFFFFFFFF => 0x7FF7FFFFFFFFFFFF -+ * -QNaN : 1 0x7FF 0x7FFFFFFFFFFFF => 0xFFF7FFFFFFFFFFFF -+ * +SNaN : 0 0x7FF 0x8000000000000 => 0x7FF8000000000000 -+ * -SNaN : 1 0x7FF 0x8000000000000 => 0xFFF8000000000000 -+ * (8 values) -+ * -+ * Single precision -+ * Sign: 1 bit -+ * Exponent: 8 bits -+ * Mantissa: 23 bits -+ * +0.0 : 0 0x00 0x000000 => 0x00000000 -+ * -0.0 : 1 0x00 0x000000 => 0x80000000 -+ * +infinity : 0 0xFF 0x000000 => 0x7F800000 -+ * -infinity : 1 0xFF 0x000000 => 0xFF800000 -+ * +QNaN : 0 0xFF 0x3FFFFF => 0x7FBFFFFF -+ * -QNaN : 1 0xFF 0x3FFFFF => 0xFFBFFFFF -+ * +SNaN : 0 0xFF 0x400000 => 0x7FC00000 -+ * -SNaN : 1 0xFF 0x400000 => 0xFFC00000 -+*/ -+{ -+ uint64_t mant; -+ uint16_t _exp, e1; -+ int s; -+ int i=0; -+ -+ if (nb_fargs) -+ return; -+ -+ fargs = malloc( 16 * sizeof(double) ); -+ for (s = 0; s < 2; s++) { -+ for (e1 = 0x001;; e1 = ((e1 + 1) << 13) + 7) { -+ if (e1 >= 0x400) -+ e1 = 0x3fe; -+ _exp = e1; -+ for (mant = 0x0000000000001ULL; mant < (1ULL << 52); -+ /* Add 'random' bits */ -+ mant = ((mant + 0x4A6) << 29) + 0x359) { -+ register_farg( &fargs[i++], s, _exp, mant ); -+ } -+ if (e1 == 0x3fe) -+ break; -+ } -+ } -+ // add a few smaller values to fargs . . . -+ s = 0; -+ _exp = 0x002; -+ mant = 0x0000000000b01ULL; -+ register_farg(&fargs[i++], s, _exp, mant); -+ -+ _exp = 0x000; -+ mant = 0x00000203f0b3dULL; -+ register_farg(&fargs[i++], s, _exp, mant); -+ -+ mant = 0x00000005a203dULL; -+ register_farg(&fargs[i++], s, _exp, mant); -+ -+ s = 1; -+ _exp = 0x002; -+ mant = 0x0000000000b01ULL; -+ register_farg(&fargs[i++], s, _exp, mant); -+ -+ _exp = 0x000; -+ mant = 0x00000203f0b3dULL; -+ register_farg(&fargs[i++], s, _exp, mant); -+ -+ nb_fargs = i; -+} -+ -+ -+typedef struct ftdiv_test { -+ int fra_idx; -+ int frb_idx; -+ int cr_flags; -+} ftdiv_test_args_t; -+ -+typedef struct fp_test_args { -+ int fra_idx; -+ int frb_idx; -+ int cr_flags; -+ unsigned long long dp_bin_result; -+} fp_test_args_t; -+ -+unsigned long long xscvuxddp_results[] = { -+ 0x43cfec0000000000ULL, -+ 0x43d013c000000000ULL, -+ 0x4338000000b77501ULL, -+ 0x43dffa0000000001ULL, -+ 0x4372321456990000ULL, -+ 0x0000000000000000ULL, -+ 0x43e0000000000000ULL, -+ 0x43dffc0000000000ULL, -+ 0x43effe0000000000ULL, -+ 0x43dffe0000000000ULL, -+ 0x43efff0000000000ULL, -+ 0x43dffe0000000000ULL, -+ 0x43efff0000000000ULL, -+ 0x43e00106800000f0ULL, -+ 0x43e81a0ca1eb40f6ULL -+}; -+ -+unsigned long long xscvsxddp_results[] = { -+ 0x43cfec0000000000ULL, -+ 0x43d013c000000000ULL, -+ 0x4338000000b77501ULL, -+ 0x43dffa0000000001ULL, -+ 0x4372321456990000ULL, -+ 0x0000000000000000ULL, -+ 0xc3e0000000000000ULL, -+ 0x43dffc0000000000ULL, -+ 0xc330000000000000ULL, -+ 0x43dffe0000000000ULL, -+ 0xc320000000000002ULL, -+ 0x43dffe0000000000ULL, -+ 0xc320000000000000ULL, -+ 0xc3dffdf2fffffe20ULL, -+ 0xc3cf97cd7852fc26ULL, -+}; -+ -+unsigned long long xscvdpsxds_results[] = { -+ 0x0000000000000000ULL, -+ 0x000000000000003eULL, -+ 0x0000000000000000ULL, -+ 0x7fffffffffffffffULL, -+ 0x0000000000000000ULL, -+ 0x0000000000000000ULL, -+ 0x0000000000000000ULL, -+ 0x7fffffffffffffffULL, -+ 0x8000000000000000ULL, -+ 0x8000000000000000ULL, -+ 0x8000000000000000ULL, -+ 0x8000000000000000ULL, -+ 0x8000000000000000ULL, -+ 0x0000000000000000ULL, -+ 0xffffffffffffbe6cULL -+}; -+ -+ftdiv_test_args_t ftdiv_tests[] = { -+ {0, 1, 0x8}, -+ {9, 1, 0xa}, -+ {1, 12, 0xa}, -+ {0, 2, 0xa}, -+ {1, 3, 0xa}, -+ {3, 0, 0xa}, -+ {0, 3, 0xa}, -+ {4, 0, 0xa}, -+ {7, 1, 0xe}, -+ {8, 1, 0xe}, -+ {1, 7, 0xe}, -+ {0, 13, 0xe}, -+ {5, 5, 0xe}, -+ {5, 6, 0xe}, -+}; -+ -+fp_test_args_t xscmpX_tests[] = { -+ {8, 8, 0x2, 0ULL}, -+ {8, 14, 0x8, 0ULL}, -+ {8, 6, 0x8, 0ULL}, -+ {8, 5, 0x8, 0ULL}, -+ {8, 4, 0x8, 0ULL}, -+ {8, 7, 0x8, 0ULL}, -+ {8, 9, 0x1, 0ULL}, -+ {8, 11, 0x1, 0ULL}, -+ {14, 8, 0x4, 0ULL}, -+ {14, 14, 0x2, 0ULL}, -+ {14, 6, 0x8, 0ULL}, -+ {14, 5, 0x8, 0ULL}, -+ {14, 4, 0x8, 0ULL}, -+ {14, 7, 0x8, 0ULL}, -+ {14, 9, 0x1, 0ULL}, -+ {14, 11, 0x1, 0ULL}, -+ {6, 8, 0x4, 0ULL}, -+ {6, 14, 0x4, 0ULL}, -+ {6, 6, 0x2, 0ULL}, -+ {6, 5, 0x2, 0ULL}, -+ {6, 4, 0x8, 0ULL}, -+ {6, 7, 0x8, 0ULL}, -+ {6, 9, 0x1, 0ULL}, -+ {6, 11, 0x1, 0ULL}, -+ {5, 8, 0x4, 0ULL}, -+ {5, 14, 0x4, 0ULL}, -+ {5, 6, 0x2, 0ULL}, -+ {5, 5, 0x2, 0ULL}, -+ {5, 4, 0x8, 0ULL}, -+ {5, 7, 0x8, 0ULL}, -+ {5, 9, 0x1, 0ULL}, -+ {5, 11, 0x1, 0ULL}, -+ {4, 8, 0x4, 0ULL}, -+ {4, 14, 0x4, 0ULL}, -+ {4, 6, 0x4, 0ULL}, -+ {4, 5, 0x4, 0ULL}, -+ {4, 1, 0x8, 0ULL}, -+ {4, 7, 0x8, 0ULL}, -+ {4, 9, 0x1, 0ULL}, -+ {4, 11, 0x1, 0ULL}, -+ {7, 8, 0x4, 0ULL}, -+ {7, 14, 0x4, 0ULL}, -+ {7, 6, 0x4, 0ULL}, -+ {7, 5, 0x4, 0ULL}, -+ {7, 4, 0x4, 0ULL}, -+ {7, 7, 0x2, 0ULL}, -+ {7, 9, 0x1, 0ULL}, -+ {7, 11, 0x1, 0ULL}, -+ {10, 8, 0x1, 0ULL}, -+ {10, 14, 0x1, 0ULL}, -+ {10, 6, 0x1, 0ULL}, -+ {10, 5, 0x1, 0ULL}, -+ {10, 4, 0x1, 0ULL}, -+ {10, 7, 0x1, 0ULL}, -+ {10, 9, 0x1, 0ULL}, -+ {10, 11, 0x1, 0ULL}, -+ {12, 8, 0x1, 0ULL}, -+ {12, 14, 0x1, 0ULL}, -+ {12, 6, 0x1, 0ULL}, -+ {12, 5, 0x1, 0ULL}, -+ {12, 4, 0x1, 0ULL}, -+ {12, 7, 0x1, 0ULL}, -+ {12, 9, 0x1, 0ULL}, -+ {12, 11, 0x1, 0ULL}, -+}; -+ -+fp_test_args_t xsadddp_tests[] = { -+ {8, 8, 0x0, 0xfff0000000000000ULL}, -+ {8, 14, 0x0, 0xfff0000000000000ULL}, -+ {8, 6, 0x0, 0xfff0000000000000ULL}, -+ {8, 5, 0x0, 0xfff0000000000000ULL}, -+ {8, 4, 0x0, 0xfff0000000000000ULL}, -+ {8, 7, 0x0, 0x7ff8000000000000ULL}, -+ {8, 9, 0x0, 0x7fffffffffffffffULL}, -+ {8, 11, 0x0, 0x7ff8000000000000ULL}, -+ {14, 8, 0x0, 0xfff0000000000000ULL}, -+ {14, 14, 0x0, 0xc0e0650f5a07b353ULL}, -+ {14, 6, 0x0, 0xc0d0650f5a07b353ULL}, -+ {14, 5, 0x0, 0xc0d0650f5a07b353ULL}, -+ {14, 4, 0x0, 0xc0d0650f5a07b353ULL}, -+ {14, 7, 0x0, 0x7ff0000000000000ULL}, -+ {14, 9, 0x0, 0x7fffffffffffffffULL}, -+ {14, 11, 0x0, 0x7ff8000000000000ULL}, -+ {6, 8, 0x0, 0xfff0000000000000ULL}, -+ {6, 14, 0x0, 0xc0d0650f5a07b353ULL}, -+ {6, 6, 0x0, 0x8000000000000000ULL}, -+ {6, 5, 0x0, 0x0000000000000000ULL}, -+ {6, 4, 0x0, 0x0123214569900000ULL}, -+ {6, 7, 0x0, 0x7ff0000000000000ULL}, -+ {6, 9, 0x0, 0x7fffffffffffffffULL}, -+ {6, 11, 0x0, 0x7ff8000000000000ULL}, -+ {5, 8, 0x0, 0xfff0000000000000ULL}, -+ {5, 14, 0x0, 0xc0d0650f5a07b353ULL}, -+ {5, 6, 0x0, 0x0000000000000000ULL}, -+ {5, 5, 0x0, 0x0000000000000000ULL}, -+ {5, 4, 0x0, 0x0123214569900000ULL}, -+ {5, 7, 0x0, 0x7ff0000000000000ULL}, -+ {5, 9, 0x0, 0x7fffffffffffffffULL}, -+ {5, 11, 0x0, 0x7ff8000000000000ULL}, -+ {4, 8, 0x0, 0xfff0000000000000ULL}, -+ {4, 14, 0x0, 0xc0d0650f5a07b353ULL}, -+ {4, 6, 0x0, 0x0123214569900000ULL}, -+ {4, 5, 0x0, 0x0123214569900000ULL}, -+ {4, 1, 0x0, 0x404f000000000000ULL}, -+ {4, 7, 0x0, 0x7ff0000000000000ULL}, -+ {4, 9, 0x0, 0x7fffffffffffffffULL}, -+ {4, 11, 0x0, 0x7ff8000000000000ULL}, -+ {7, 8, 0x0, 0x7ff8000000000000ULL}, -+ {7, 14, 0x0, 0x7ff0000000000000ULL}, -+ {7, 6, 0x0, 0x7ff0000000000000ULL}, -+ {7, 5, 0x0, 0x7ff0000000000000ULL}, -+ {7, 4, 0x0, 0x7ff0000000000000ULL}, -+ {7, 7, 0x0, 0x7ff0000000000000ULL}, -+ {7, 9, 0x0, 0x7fffffffffffffffULL}, -+ {7, 11, 0x0, 0x7ff8000000000000ULL}, -+ {10, 8, 0x0, 0xffffffffffffffffULL}, -+ {10, 14, 0x0, 0xffffffffffffffffULL}, -+ {10, 6, 0x0, 0xffffffffffffffffULL}, -+ {10, 5, 0x0, 0xffffffffffffffffULL}, -+ {10, 4, 0x0, 0xffffffffffffffffULL}, -+ {10, 7, 0x0, 0xffffffffffffffffULL}, -+ {10, 9, 0x0, 0xffffffffffffffffULL}, -+ {10, 11, 0x0, 0xffffffffffffffffULL}, -+ {12, 8, 0x0, 0xfff8000000000000ULL}, -+ {12, 14, 0x0, 0xfff8000000000000ULL}, -+ {12, 6, 0x0, 0xfff8000000000000ULL}, -+ {12, 5, 0x0, 0xfff8000000000000ULL}, -+ {12, 4, 0x0, 0xfff8000000000000ULL}, -+ {12, 7, 0x0, 0xfff8000000000000ULL}, -+ {12, 9, 0x0, 0xfff8000000000000ULL}, -+ {12, 11, 0x0, 0xfff8000000000000ULL}, -+}; -+ -+fp_test_args_t xsdivdp_tests[] = { -+ {8, 8, 0x0, 0x7ff8000000000000ULL}, -+ {8, 14, 0x0, 0x7ff0000000000000ULL}, -+ {8, 6, 0x0, 0x7ff0000000000000ULL}, -+ {8, 5, 0x0, 0xfff0000000000000ULL}, -+ {8, 4, 0x0, 0xfff0000000000000ULL}, -+ {8, 7, 0x0, 0x7ff8000000000000ULL}, -+ {8, 9, 0x0, 0x7fffffffffffffffULL}, -+ {8, 11, 0x0, 0x7ff8000000000000ULL}, -+ {14, 8, 0x0, 0x0000000000000000ULL}, -+ {14, 14, 0x0, 0x3ff0000000000000ULL}, -+ {14, 6, 0x0, 0x7ff0000000000000ULL}, -+ {14, 5, 0x0, 0xfff0000000000000ULL}, -+ {14, 4, 0x0, 0xff9b6cb57ca13c00ULL}, -+ {14, 7, 0x0, 0x8000000000000000ULL}, -+ {14, 9, 0x0, 0x7fffffffffffffffULL}, -+ {14, 11, 0x0, 0x7ff8000000000000ULL}, -+ {6, 8, 0x0, 0x0000000000000000ULL}, -+ {6, 14, 0x0, 0x0000000000000000ULL}, -+ {6, 6, 0x0, 0x7ff8000000000000ULL}, -+ {6, 5, 0x0, 0x7ff8000000000000ULL}, -+ {6, 4, 0x0, 0x8000000000000000ULL}, -+ {6, 7, 0x0, 0x8000000000000000ULL}, -+ {6, 9, 0x0, 0x7fffffffffffffffULL}, -+ {6, 11, 0x0, 0x7ff8000000000000ULL}, -+ {5, 8, 0x0, 0x8000000000000000ULL}, -+ {5, 14, 0x0, 0x8000000000000000ULL}, -+ {5, 6, 0x0, 0x7ff8000000000000ULL}, -+ {5, 5, 0x0, 0x7ff8000000000000ULL}, -+ {5, 4, 0x0, 0x0000000000000000ULL}, -+ {5, 7, 0x0, 0x0000000000000000ULL}, -+ {5, 9, 0x0, 0x7fffffffffffffffULL}, -+ {5, 11, 0x0, 0x7ff8000000000000ULL}, -+ {4, 8, 0x0, 0x8000000000000000ULL}, -+ {4, 14, 0x0, 0x8042ab59d8b6ec87ULL}, -+ {4, 6, 0x0, 0xfff0000000000000ULL}, -+ {4, 5, 0x0, 0x7ff0000000000000ULL}, -+ {4, 1, 0x0, 0x00c3bf3f64b5ad6bULL}, -+ {4, 7, 0x0, 0x0000000000000000ULL}, -+ {4, 9, 0x0, 0x7fffffffffffffffULL}, -+ {4, 11, 0x0, 0x7ff8000000000000ULL}, -+ {7, 8, 0x0, 0x7ff8000000000000ULL}, -+ {7, 14, 0x0, 0xfff0000000000000ULL}, -+ {7, 6, 0x0, 0xfff0000000000000ULL}, -+ {7, 5, 0x0, 0x7ff0000000000000ULL}, -+ {7, 4, 0x0, 0x7ff0000000000000ULL}, -+ {7, 7, 0x0, 0x7ff8000000000000ULL}, -+ {7, 9, 0x0, 0x7fffffffffffffffULL}, -+ {7, 11, 0x0, 0x7ff8000000000000ULL}, -+ {10, 8, 0x0, 0xffffffffffffffffULL}, -+ {10, 14, 0x0, 0xffffffffffffffffULL}, -+ {10, 6, 0x0, 0xffffffffffffffffULL}, -+ {10, 5, 0x0, 0xffffffffffffffffULL}, -+ {10, 4, 0x0, 0xffffffffffffffffULL}, -+ {10, 7, 0x0, 0xffffffffffffffffULL}, -+ {10, 9, 0x0, 0xffffffffffffffffULL}, -+ {10, 11, 0x0, 0xffffffffffffffffULL}, -+ {12, 8, 0x0, 0xfff8000000000000ULL}, -+ {12, 14, 0x0, 0xfff8000000000000ULL}, -+ {12, 6, 0x0, 0xfff8000000000000ULL}, -+ {12, 5, 0x0, 0xfff8000000000000ULL}, -+ {12, 4, 0x0, 0xfff8000000000000ULL}, -+ {12, 7, 0x0, 0xfff8000000000000ULL}, -+ {12, 9, 0x0, 0xfff8000000000000ULL}, -+ {12, 11, 0x0, 0xfff8000000000000ULL}, -+}; -+ -+fp_test_args_t xsmaddXdp_tests[] = { -+ {8, 8, 0x0, 0x7ff8000000000000ULL}, -+ {8, 14, 0x0, 0xfff0000000000000ULL}, -+ {8, 6, 0x0, 0x7ff0000000000000ULL}, -+ {8, 5, 0x0, 0xfff0000000000000ULL}, -+ {8, 4, 0x0, 0x7ff0000000000000ULL}, -+ {8, 7, 0x0, 0x7ff8000000000000ULL}, -+ {8, 9, 0x0, 0x7fffffffffffffffULL}, -+ {8, 11, 0x0, 0x7ff8000000000000ULL}, -+ {14, 8, 0x0, 0xfff0000000000000ULL}, -+ {14, 14, 0x0, 0xc0d0650f5a07b353ULL}, -+ {14, 6, 0x0, 0x41b0cc9d05eec2a7ULL}, -+ {14, 5, 0x0, 0x82039a19ca8fcb5fULL}, -+ {14, 4, 0x0, 0x41b0cc9d05eec2a7ULL}, -+ {14, 7, 0x0, 0x7ff0000000000000ULL}, -+ {14, 9, 0x0, 0x7fffffffffffffffULL}, -+ {14, 11, 0x0, 0x7ff8000000000000ULL}, -+ {6, 8, 0x0, 0xfff0000000000000ULL}, -+ {6, 14, 0x0, 0xc0d0650f5a07b353ULL}, -+ {6, 6, 0x0, 0x0000000000000000ULL}, -+ {6, 5, 0x0, 0x0000000000000000ULL}, -+ {6, 4, 0x0, 0x0123214569900000ULL}, -+ {6, 7, 0x0, 0x7ff0000000000000ULL}, -+ {6, 9, 0x0, 0x7fffffffffffffffULL}, -+ {6, 11, 0x0, 0x7ff8000000000000ULL}, -+ {5, 8, 0x0, 0xfff0000000000000ULL}, -+ {5, 14, 0x0, 0xc0d0650f5a07b353ULL}, -+ {5, 6, 0x0, 0x8000000000000000ULL}, -+ {5, 5, 0x0, 0x0000000000000000ULL}, -+ {5, 4, 0x0, 0x0123214569900000ULL}, -+ {5, 7, 0x0, 0x7ff0000000000000ULL}, -+ {5, 9, 0x0, 0x7fffffffffffffffULL}, -+ {5, 11, 0x0, 0x7ff8000000000000ULL}, -+ {4, 8, 0x0, 0xfff0000000000000ULL}, -+ {4, 14, 0x0, 0xc0d0650f5a07b353ULL}, -+ {4, 6, 0x0, 0x82039a19ca8fcb5fULL}, -+ {4, 5, 0x0, 0x0000000000000000ULL}, -+ {4, 1, 0x0, 0x404f000000000000ULL}, -+ {4, 7, 0x0, 0x7ff0000000000000ULL}, -+ {4, 9, 0x0, 0x7fffffffffffffffULL}, -+ {4, 11, 0x0, 0x7ff8000000000000ULL}, -+ {7, 8, 0x0, 0xfff0000000000000ULL}, -+ {7, 14, 0x0, 0x7ff0000000000000ULL}, -+ {7, 6, 0x0, 0xfff0000000000000ULL}, -+ {7, 5, 0x0, 0x7ff0000000000000ULL}, -+ {7, 4, 0x0, 0xfff0000000000000ULL}, -+ {7, 7, 0x0, 0x7ff0000000000000ULL}, -+ {7, 9, 0x0, 0x7fffffffffffffffULL}, -+ {7, 11, 0x0, 0x7ff8000000000000ULL}, -+ {10, 8, 0x0, 0xffffffffffffffffULL}, -+ {10, 14, 0x0, 0xffffffffffffffffULL}, -+ {10, 6, 0x0, 0xffffffffffffffffULL}, -+ {10, 5, 0x0, 0xffffffffffffffffULL}, -+ {10, 4, 0x0, 0xffffffffffffffffULL}, -+ {10, 7, 0x0, 0xffffffffffffffffULL}, -+ {10, 9, 0x0, 0xffffffffffffffffULL}, -+ {10, 11, 0x0, 0xffffffffffffffffULL}, -+ {12, 8, 0x0, 0xfff8000000000000ULL}, -+ {12, 14, 0x0, 0xfff8000000000000ULL}, -+ {12, 6, 0x0, 0xfff8000000000000ULL}, -+ {12, 5, 0x0, 0xfff8000000000000ULL}, -+ {12, 4, 0x0, 0xfff8000000000000ULL}, -+ {12, 7, 0x0, 0xfff8000000000000ULL}, -+ {12, 9, 0x0, 0xfff8000000000000ULL}, -+ {12, 11, 0x0, 0xfff8000000000000ULL}, -+}; -+ -+fp_test_args_t xsmsubXdp_tests[] = { -+ {8, 8, 0x0, 0x7ff0000000000000ULL}, -+ {8, 14, 0x0, 0xfff0000000000000ULL}, -+ {8, 6, 0x0, 0x7ff0000000000000ULL}, -+ {8, 5, 0x0, 0xfff0000000000000ULL}, -+ {8, 4, 0x0, 0x7ff0000000000000ULL}, -+ {8, 7, 0x0, 0xfff0000000000000ULL}, -+ {8, 9, 0x0, 0x7fffffffffffffffULL}, -+ {8, 11, 0x0, 0x7ff8000000000000ULL}, -+ {14, 8, 0x0, 0x7ff0000000000000ULL}, -+ {14, 14, 0x0, 0x40d0650f5a07b353ULL}, -+ {14, 6, 0x0, 0x41b0cc9d05eec2a7ULL}, -+ {14, 5, 0x0, 0x82039a19ca8fcb5fULL}, -+ {14, 4, 0x0, 0x41b0cc9d05eec2a7ULL}, -+ {14, 7, 0x0, 0xfff0000000000000ULL}, -+ {14, 9, 0x0, 0x7fffffffffffffffULL}, -+ {14, 11, 0x0, 0x7ff8000000000000ULL}, -+ {6, 8, 0x0, 0x7ff0000000000000ULL}, -+ {6, 14, 0x0, 0x40d0650f5a07b353ULL}, -+ {6, 6, 0x0, 0x0000000000000000ULL}, -+ {6, 5, 0x0, 0x8000000000000000ULL}, -+ {6, 4, 0x0, 0x8123214569900000ULL}, -+ {6, 7, 0x0, 0xfff0000000000000ULL}, -+ {6, 9, 0x0, 0x7fffffffffffffffULL}, -+ {6, 11, 0x0, 0x7ff8000000000000ULL}, -+ {5, 8, 0x0, 0x7ff0000000000000ULL}, -+ {5, 14, 0x0, 0x40d0650f5a07b353ULL}, -+ {5, 6, 0x0, 0x0000000000000000ULL}, -+ {5, 5, 0x0, 0x0000000000000000ULL}, -+ {5, 4, 0x0, 0x8123214569900000ULL}, -+ {5, 7, 0x0, 0xfff0000000000000ULL}, -+ {5, 9, 0x0, 0x7fffffffffffffffULL}, -+ {5, 11, 0x0, 0x7ff8000000000000ULL}, -+ {4, 8, 0x0, 0x7ff0000000000000ULL}, -+ {4, 14, 0x0, 0x40d0650f5a07b353ULL}, -+ {4, 6, 0x0, 0x82039a19ca8fcb5fULL}, -+ {4, 5, 0x0, 0x0000000000000000ULL}, -+ {4, 1, 0x0, 0xc04f000000000000ULL}, -+ {4, 7, 0x0, 0xfff0000000000000ULL}, -+ {4, 9, 0x0, 0x7fffffffffffffffULL}, -+ {4, 11, 0x0, 0x7ff8000000000000ULL}, -+ {7, 8, 0x0, 0x7ff8000000000000ULL}, -+ {7, 14, 0x0, 0x7ff0000000000000ULL}, -+ {7, 6, 0x0, 0xfff0000000000000ULL}, -+ {7, 5, 0x0, 0x7ff0000000000000ULL}, -+ {7, 4, 0x0, 0xfff0000000000000ULL}, -+ {7, 7, 0x0, 0x7ff8000000000000ULL}, -+ {7, 9, 0x0, 0x7fffffffffffffffULL}, -+ {7, 11, 0x0, 0x7ff8000000000000ULL}, -+ {10, 8, 0x0, 0xffffffffffffffffULL}, -+ {10, 14, 0x0, 0xffffffffffffffffULL}, -+ {10, 6, 0x0, 0xffffffffffffffffULL}, -+ {10, 5, 0x0, 0xffffffffffffffffULL}, -+ {10, 4, 0x0, 0xffffffffffffffffULL}, -+ {10, 7, 0x0, 0xffffffffffffffffULL}, -+ {10, 9, 0x0, 0xffffffffffffffffULL}, -+ {10, 11, 0x0, 0xffffffffffffffffULL}, -+ {12, 8, 0x0, 0xfff8000000000000ULL}, -+ {12, 14, 0x0, 0xfff8000000000000ULL}, -+ {12, 6, 0x0, 0xfff8000000000000ULL}, -+ {12, 5, 0x0, 0xfff8000000000000ULL}, -+ {12, 4, 0x0, 0xfff8000000000000ULL}, -+ {12, 7, 0x0, 0xfff8000000000000ULL}, -+ {12, 9, 0x0, 0xfff8000000000000ULL}, -+ {12, 11, 0x0, 0xfff8000000000000ULL}, -+}; -+ -+fp_test_args_t xsnmaddXdp_tests[] = { -+ {8, 8, 0x0, 0x7ff8000000000000ULL}, -+ {8, 14, 0x0, 0x7ff0000000000000ULL}, -+ {8, 6, 0x0, 0xfff0000000000000ULL}, -+ {8, 5, 0x0, 0x7ff0000000000000ULL}, -+ {8, 4, 0x0, 0xfff0000000000000ULL}, -+ {8, 7, 0x0, 0x7ff8000000000000ULL}, -+ {8, 9, 0x0, 0x7fffffffffffffffULL}, -+ {8, 11, 0x0, 0x7ff8000000000000ULL}, -+ {14, 8, 0x0, 0x7ff0000000000000ULL}, -+ {14, 14, 0x0, 0x40d0650f5a07b353ULL}, -+ {14, 6, 0x0, 0xc1b0cc9d05eec2a7ULL}, -+ {14, 5, 0x0, 0x02039a19ca8fcb5fULL}, -+ {14, 4, 0x0, 0xc1b0cc9d05eec2a7ULL}, -+ {14, 7, 0x0, 0xfff0000000000000ULL}, -+ {14, 9, 0x0, 0x7fffffffffffffffULL}, -+ {14, 11, 0x0, 0x7ff8000000000000ULL}, -+ {6, 8, 0x0, 0x7ff0000000000000ULL}, -+ {6, 14, 0x0, 0x40d0650f5a07b353ULL}, -+ {6, 6, 0x0, 0x8000000000000000ULL}, -+ {6, 5, 0x0, 0x8000000000000000ULL}, -+ {6, 4, 0x0, 0x8123214569900000ULL}, -+ {6, 7, 0x0, 0xfff0000000000000ULL}, -+ {6, 9, 0x0, 0x7fffffffffffffffULL}, -+ {6, 11, 0x0, 0x7ff8000000000000ULL}, -+ {5, 8, 0x0, 0x7ff0000000000000ULL}, -+ {5, 14, 0x0, 0x40d0650f5a07b353ULL}, -+ {5, 6, 0x0, 0x0000000000000000ULL}, -+ {5, 5, 0x0, 0x8000000000000000ULL}, -+ {5, 4, 0x0, 0x8123214569900000ULL}, -+ {5, 7, 0x0, 0xfff0000000000000ULL}, -+ {5, 9, 0x0, 0x7fffffffffffffffULL}, -+ {5, 11, 0x0, 0x7ff8000000000000ULL}, -+ {4, 8, 0x0, 0x7ff0000000000000ULL}, -+ {4, 14, 0x0, 0x40d0650f5a07b353ULL}, -+ {4, 6, 0x0, 0x02039a19ca8fcb5fULL}, -+ {4, 5, 0x0, 0x8000000000000000ULL}, -+ {4, 1, 0x0, 0xc04f000000000000ULL}, -+ {4, 7, 0x0, 0xfff0000000000000ULL}, -+ {4, 9, 0x0, 0x7fffffffffffffffULL}, -+ {4, 11, 0x0, 0x7ff8000000000000ULL}, -+ {7, 8, 0x0, 0x7ff0000000000000ULL}, -+ {7, 14, 0x0, 0xfff0000000000000ULL}, -+ {7, 6, 0x0, 0x7ff0000000000000ULL}, -+ {7, 5, 0x0, 0xfff0000000000000ULL}, -+ {7, 4, 0x0, 0x7ff0000000000000ULL}, -+ {7, 7, 0x0, 0xfff0000000000000ULL}, -+ {7, 9, 0x0, 0x7fffffffffffffffULL}, -+ {7, 11, 0x0, 0x7ff8000000000000ULL}, -+ {10, 8, 0x0, 0xffffffffffffffffULL}, -+ {10, 14, 0x0, 0xffffffffffffffffULL}, -+ {10, 6, 0x0, 0xffffffffffffffffULL}, -+ {10, 5, 0x0, 0xffffffffffffffffULL}, -+ {10, 4, 0x0, 0xffffffffffffffffULL}, -+ {10, 7, 0x0, 0xffffffffffffffffULL}, -+ {10, 9, 0x0, 0xffffffffffffffffULL}, -+ {10, 11, 0x0, 0xffffffffffffffffULL}, -+ {12, 8, 0x0, 0xfff8000000000000ULL}, -+ {12, 14, 0x0, 0xfff8000000000000ULL}, -+ {12, 6, 0x0, 0xfff8000000000000ULL}, -+ {12, 5, 0x0, 0xfff8000000000000ULL}, -+ {12, 4, 0x0, 0xfff8000000000000ULL}, -+ {12, 7, 0x0, 0xfff8000000000000ULL}, -+ {12, 9, 0x0, 0xfff8000000000000ULL}, -+ {12, 11, 0x0, 0xfff8000000000000ULL}, -+}; -+ -+fp_test_args_t xsmuldp_tests[] = { -+ {8, 8, 0x0, 0x7ff0000000000000ULL}, -+ {8, 14, 0x0, 0x7ff0000000000000ULL}, -+ {8, 6, 0x0, 0x7ff8000000000000ULL}, -+ {8, 5, 0x0, 0x7ff8000000000000ULL}, -+ {8, 4, 0x0, 0xfff0000000000000ULL}, -+ {8, 7, 0x0, 0xfff0000000000000ULL}, -+ {8, 9, 0x0, 0x7fffffffffffffffULL}, -+ {8, 11, 0x0, 0x7ff8000000000000ULL}, -+ {14, 8, 0x0, 0x7ff0000000000000ULL}, -+ {14, 14, 0x0, 0x41b0cc9d05eec2a7ULL}, -+ {14, 6, 0x0, 0x0000000000000000ULL}, -+ {14, 5, 0x0, 0x8000000000000000ULL}, -+ {14, 4, 0x0, 0x82039a19ca8fcb5fULL}, -+ {14, 7, 0x0, 0xfff0000000000000ULL}, -+ {14, 9, 0x0, 0x7fffffffffffffffULL}, -+ {14, 11, 0x0, 0x7ff8000000000000ULL}, -+ {6, 8, 0x0, 0x7ff8000000000000ULL}, -+ {6, 14, 0x0, 0x0000000000000000ULL}, -+ {6, 6, 0x0, 0x0000000000000000ULL}, -+ {6, 5, 0x0, 0x8000000000000000ULL}, -+ {6, 4, 0x0, 0x8000000000000000ULL}, -+ {6, 7, 0x0, 0x7ff8000000000000ULL}, -+ {6, 9, 0x0, 0x7fffffffffffffffULL}, -+ {6, 11, 0x0, 0x7ff8000000000000ULL}, -+ {5, 8, 0x0, 0x7ff8000000000000ULL}, -+ {5, 14, 0x0, 0x8000000000000000ULL}, -+ {5, 6, 0x0, 0x8000000000000000ULL}, -+ {5, 5, 0x0, 0x0000000000000000ULL}, -+ {5, 4, 0x0, 0x0000000000000000ULL}, -+ {5, 7, 0x0, 0x7ff8000000000000ULL}, -+ {5, 9, 0x0, 0x7fffffffffffffffULL}, -+ {5, 11, 0x0, 0x7ff8000000000000ULL}, -+ {4, 8, 0x0, 0xfff0000000000000ULL}, -+ {4, 14, 0x0, 0x82039a19ca8fcb5fULL}, -+ {4, 6, 0x0, 0x8000000000000000ULL}, -+ {4, 5, 0x0, 0x0000000000000000ULL}, -+ {4, 1, 0x0, 0x0182883b3e438000ULL}, -+ {4, 7, 0x0, 0x7ff0000000000000ULL}, -+ {4, 9, 0x0, 0x7fffffffffffffffULL}, -+ {4, 11, 0x0, 0x7ff8000000000000ULL}, -+ {7, 8, 0x0, 0xfff0000000000000ULL}, -+ {7, 14, 0x0, 0xfff0000000000000ULL}, -+ {7, 6, 0x0, 0x7ff8000000000000ULL}, -+ {7, 5, 0x0, 0x7ff8000000000000ULL}, -+ {7, 4, 0x0, 0x7ff0000000000000ULL}, -+ {7, 7, 0x0, 0x7ff0000000000000ULL}, -+ {7, 9, 0x0, 0x7fffffffffffffffULL}, -+ {7, 11, 0x0, 0x7ff8000000000000ULL}, -+ {10, 8, 0x0, 0xffffffffffffffffULL}, -+ {10, 14, 0x0, 0xffffffffffffffffULL}, -+ {10, 6, 0x0, 0xffffffffffffffffULL}, -+ {10, 5, 0x0, 0xffffffffffffffffULL}, -+ {10, 4, 0x0, 0xffffffffffffffffULL}, -+ {10, 7, 0x0, 0xffffffffffffffffULL}, -+ {10, 9, 0x0, 0xffffffffffffffffULL}, -+ {10, 11, 0x0, 0xffffffffffffffffULL}, -+ {12, 8, 0x0, 0xfff8000000000000ULL}, -+ {12, 14, 0x0, 0xfff8000000000000ULL}, -+ {12, 6, 0x0, 0xfff8000000000000ULL}, -+ {12, 5, 0x0, 0xfff8000000000000ULL}, -+ {12, 4, 0x0, 0xfff8000000000000ULL}, -+ {12, 7, 0x0, 0xfff8000000000000ULL}, -+ {12, 9, 0x0, 0xfff8000000000000ULL}, -+ {12, 11, 0x0, 0xfff8000000000000ULL}, -+}; -+ -+fp_test_args_t xssubdp_tests[] = { -+ {8, 8, 0x0, 0x7ff8000000000000ULL}, -+ {8, 14, 0x0, 0xfff0000000000000ULL}, -+ {8, 6, 0x0, 0xfff0000000000000ULL}, -+ {8, 5, 0x0, 0xfff0000000000000ULL}, -+ {8, 4, 0x0, 0xfff0000000000000ULL}, -+ {8, 7, 0x0, 0xfff0000000000000ULL}, -+ {8, 9, 0x0, 0x7fffffffffffffffULL}, -+ {8, 11, 0x0, 0x7ff8000000000000ULL}, -+ {14, 8, 0x0, 0x7ff0000000000000ULL}, -+ {14, 14, 0x0, 0x0000000000000000ULL}, -+ {14, 6, 0x0, 0xc0d0650f5a07b353ULL}, -+ {14, 5, 0x0, 0xc0d0650f5a07b353ULL}, -+ {14, 4, 0x0, 0xc0d0650f5a07b353ULL}, -+ {14, 7, 0x0, 0xfff0000000000000ULL}, -+ {14, 9, 0x0, 0x7fffffffffffffffULL}, -+ {14, 11, 0x0, 0x7ff8000000000000ULL}, -+ {6, 8, 0x0, 0x7ff0000000000000ULL}, -+ {6, 14, 0x0, 0x40d0650f5a07b353ULL}, -+ {6, 6, 0x0, 0x0000000000000000ULL}, -+ {6, 5, 0x0, 0x8000000000000000ULL}, -+ {6, 4, 0x0, 0x8123214569900000ULL}, -+ {6, 7, 0x0, 0xfff0000000000000ULL}, -+ {6, 9, 0x0, 0x7fffffffffffffffULL}, -+ {6, 11, 0x0, 0x7ff8000000000000ULL}, -+ {5, 8, 0x0, 0x7ff0000000000000ULL}, -+ {5, 14, 0x0, 0x40d0650f5a07b353ULL}, -+ {5, 6, 0x0, 0x0000000000000000ULL}, -+ {5, 5, 0x0, 0x0000000000000000ULL}, -+ {5, 4, 0x0, 0x8123214569900000ULL}, -+ {5, 7, 0x0, 0xfff0000000000000ULL}, -+ {5, 9, 0x0, 0x7fffffffffffffffULL}, -+ {5, 11, 0x0, 0x7ff8000000000000ULL}, -+ {4, 8, 0x0, 0x7ff0000000000000ULL}, -+ {4, 14, 0x0, 0x40d0650f5a07b353ULL}, -+ {4, 6, 0x0, 0x0123214569900000ULL}, -+ {4, 5, 0x0, 0x0123214569900000ULL}, -+ {4, 1, 0x0, 0xc04f000000000000ULL}, -+ {4, 7, 0x0, 0xfff0000000000000ULL}, -+ {4, 9, 0x0, 0x7fffffffffffffffULL}, -+ {4, 11, 0x0, 0x7ff8000000000000ULL}, -+ {7, 8, 0x0, 0x7ff0000000000000ULL}, -+ {7, 14, 0x0, 0x7ff0000000000000ULL}, -+ {7, 6, 0x0, 0x7ff0000000000000ULL}, -+ {7, 5, 0x0, 0x7ff0000000000000ULL}, -+ {7, 4, 0x0, 0x7ff0000000000000ULL}, -+ {7, 7, 0x0, 0x7ff8000000000000ULL}, -+ {7, 9, 0x0, 0x7fffffffffffffffULL}, -+ {7, 11, 0x0, 0x7ff8000000000000ULL}, -+ {10, 8, 0x0, 0xffffffffffffffffULL}, -+ {10, 14, 0x0, 0xffffffffffffffffULL}, -+ {10, 6, 0x0, 0xffffffffffffffffULL}, -+ {10, 5, 0x0, 0xffffffffffffffffULL}, -+ {10, 4, 0x0, 0xffffffffffffffffULL}, -+ {10, 7, 0x0, 0xffffffffffffffffULL}, -+ {10, 9, 0x0, 0xffffffffffffffffULL}, -+ {10, 11, 0x0, 0xffffffffffffffffULL}, -+ {12, 8, 0x0, 0xfff8000000000000ULL}, -+ {12, 14, 0x0, 0xfff8000000000000ULL}, -+ {12, 6, 0x0, 0xfff8000000000000ULL}, -+ {12, 5, 0x0, 0xfff8000000000000ULL}, -+ {12, 4, 0x0, 0xfff8000000000000ULL}, -+ {12, 7, 0x0, 0xfff8000000000000ULL}, -+ {12, 9, 0x0, 0xfff8000000000000ULL}, -+ {12, 11, 0x0, 0xfff8000000000000ULL}, -+}; -+ -+ -+ -+static int nb_special_fargs; -+static double * spec_fargs; -+ -+static void build_special_fargs_table(void) -+{ -+ /* The special floating point values created below are for -+ * use in the ftdiv tests for setting the fe_flag and fg_flag, -+ * but they can also be used for other tests (e.g., xscmpudp). -+ * -+ * Note that fl_flag is 'always '1' on ppc64 Linux. -+ * -+ Entry Sign Exp fraction Special value -+ 0 0 3fd 0x8000000000000ULL Positive finite number -+ 1 0 404 0xf000000000000ULL ... -+ 2 0 001 0x8000000b77501ULL ... -+ 3 0 7fe 0x800000000051bULL ... -+ 4 0 012 0x3214569900000ULL ... -+ 5 0 000 0x0000000000000ULL +0.0 (+zero) -+ 6 1 000 0x0000000000000ULL -0.0 (-zero) -+ 7 0 7ff 0x0000000000000ULL +infinity -+ 8 1 7ff 0x0000000000000ULL -infinity -+ 9 0 7ff 0x7FFFFFFFFFFFFULL +QNaN -+ 10 1 7ff 0x7FFFFFFFFFFFFULL -QNaN -+ 11 0 7ff 0x8000000000000ULL +SNaN -+ 12 1 7ff 0x8000000000000ULL -SNaN -+ 13 1 000 0x8340000078000ULL Denormalized val (zero exp and non-zero fraction) -+ 14 1 40d 0x0650f5a07b353ULL Negative finite number -+ */ -+ -+ uint64_t mant; -+ uint16_t _exp; -+ int s; -+ int i = 0; -+ -+ if (spec_fargs) -+ return; -+ -+ spec_fargs = malloc( 16 * sizeof(double) ); -+ -+ // #0 -+ s = 0; -+ _exp = 0x3fd; -+ mant = 0x8000000000000ULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ // #1 -+ s = 0; -+ _exp = 0x404; -+ mant = 0xf000000000000ULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ /* None of the ftdiv tests succeed. -+ * FRA = value #0; FRB = value #1 -+ * ea_ = -2; e_b = 5 -+ * fl_flag || fg_flag || fe_flag = 100 -+ */ -+ -+ /************************************************* -+ * fe_flag tests -+ * -+ *************************************************/ -+ -+ /* fe_flag <- 1 if FRA is a NaN -+ * FRA = value #9; FRB = value #1 -+ * e_a = 1024; e_b = 5 -+ * fl_flag || fg_flag || fe_flag = 101 -+ */ -+ -+ /* fe_flag <- 1 if FRB is a NaN -+ * FRA = value #1; FRB = value #12 -+ * e_a = 5; e_b = 1024 -+ * fl_flag || fg_flag || fe_flag = 101 -+ */ -+ -+ /* fe_flag <- 1 if e_b <= -1022 -+ * FRA = value #0; FRB = value #2 -+ * e_a = -2; e_b = -1022 -+ * fl_flag || fg_flag || fe_flag = 101 -+ * -+ */ -+ // #2 -+ s = 0; -+ _exp = 0x001; -+ mant = 0x8000000b77501ULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ /* fe_flag <- 1 if e_b >= 1021 -+ * FRA = value #1; FRB = value #3 -+ * e_a = 5; e_b = 1023 -+ * fl_flag || fg_flag || fe_flag = 101 -+ */ -+ // #3 -+ s = 0; -+ _exp = 0x7fe; -+ mant = 0x800000000051bULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ /* fe_flag <- 1 if FRA != 0 && e_a - e_b >= 1023 -+ * Let FRA = value #3 and FRB be value #0. -+ * e_a = 1023; e_b = -2 -+ * fl_flag || fg_flag || fe_flag = 101 -+ */ -+ -+ /* fe_flag <- 1 if FRA != 0 && e_a - e_b <= -1023 -+ * Let FRA = value #0 above and FRB be value #3 above -+ * e_a = -2; e_b = 1023 -+ * fl_flag || fg_flag || fe_flag = 101 -+ */ -+ -+ /* fe_flag <- 1 if FRA != 0 && e_a <= -970 -+ * Let FRA = value #4 and FRB be value #0 -+ * e_a = -1005; e_b = -2 -+ * fl_flag || fg_flag || fe_flag = 101 -+ */ -+ // #4 -+ s = 0; -+ _exp = 0x012; -+ mant = 0x3214569900000ULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ /************************************************* -+ * fg_flag tests -+ * -+ *************************************************/ -+ /* fg_flag <- 1 if FRA is an Infinity -+ * NOTE: FRA = Inf also sets fe_flag -+ * Do two tests, using values #7 and #8 (+/- Inf) for FRA. -+ * Test 1: -+ * Let FRA be value #7 and FRB be value #1 -+ * e_a = 1024; e_b = 5 -+ * fl_flag || fg_flag || fe_flag = 111 -+ * -+ * Test 2: -+ * Let FRA be value #8 and FRB be value #1 -+ * e_a = 1024; e_b = 5 -+ * fl_flag || fg_flag || fe_flag = 111 -+ * -+ */ -+ -+ /* fg_flag <- 1 if FRB is an Infinity -+ * NOTE: FRB = Inf also sets fe_flag -+ * Let FRA be value #1 and FRB be value #7 -+ * e_a = 5; e_b = 1024 -+ * fl_flag || fg_flag || fe_flag = 111 -+ */ -+ -+ /* fg_flag <- 1 if FRB is denormalized -+ * NOTE: e_b < -1022 ==> fe_flag <- 1 -+ * Let FRA be value #0 and FRB be value #13 -+ * e_a = -2; e_b = -1023 -+ * fl_flag || fg_flag || fe_flag = 111 -+ */ -+ -+ /* fg_flag <- 1 if FRB is +zero -+ * NOTE: FRA = Inf also sets fe_flag -+ * Let FRA = val #5; FRB = val #5 -+ * ea_ = -1023; e_b = -1023 -+ * fl_flag || fg_flag || fe_flag = 111 -+ */ -+ -+ /* fg_flag <- 1 if FRB is -zero -+ * NOTE: FRA = Inf also sets fe_flag -+ * Let FRA = val #5; FRB = val #6 -+ * ea_ = -1023; e_b = -1023 -+ * fl_flag || fg_flag || fe_flag = 111 -+ */ -+ -+ /* Special values */ -+ /* +0.0 : 0 0x000 0x0000000000000 */ -+ // #5 -+ s = 0; -+ _exp = 0x000; -+ mant = 0x0000000000000ULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ /* -0.0 : 1 0x000 0x0000000000000 */ -+ // #6 -+ s = 1; -+ _exp = 0x000; -+ mant = 0x0000000000000ULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ /* +infinity : 0 0x7FF 0x0000000000000 */ -+ // #7 -+ s = 0; -+ _exp = 0x7FF; -+ mant = 0x0000000000000ULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ /* -infinity : 1 0x7FF 0x0000000000000 */ -+ // #8 -+ s = 1; -+ _exp = 0x7FF; -+ mant = 0x0000000000000ULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ /* +QNaN : 0 0x7FF 0x7FFFFFFFFFFFF */ -+ // #9 -+ s = 0; -+ _exp = 0x7FF; -+ mant = 0x7FFFFFFFFFFFFULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ /* -QNaN : 1 0x7FF 0x7FFFFFFFFFFFF */ -+ // #10 -+ s = 1; -+ _exp = 0x7FF; -+ mant = 0x7FFFFFFFFFFFFULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ /* +SNaN : 0 0x7FF 0x8000000000000 */ -+ // #11 -+ s = 0; -+ _exp = 0x7FF; -+ mant = 0x8000000000000ULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ /* -SNaN : 1 0x7FF 0x8000000000000 */ -+ // #12 -+ s = 1; -+ _exp = 0x7FF; -+ mant = 0x8000000000000ULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ /* denormalized value */ -+ // #13 -+ s = 1; -+ _exp = 0x000; -+ mant = 0x8340000078000ULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ /* Negative finite number */ -+ // #14 -+ s = 1; -+ _exp = 0x40d; -+ mant = 0x0650f5a07b353ULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ nb_special_fargs = i; -+} -+ -+ -+struct test_table -+{ -+ test_func_t test_category; -+ char * name; -+}; -+ -+struct p7_fp_test -+{ -+ test_func_t test_func; -+ const char *name; -+ int single; // 1=single precision result; 0=double precision result -+}; -+ -+typedef enum { -+ VX_FP_CMP, -+ VX_FP_SMA, -+ VX_FP_SMS, -+ VX_FP_SNMA, -+ VX_FP_OTHER -+} vx_fp_test_type; -+ -+struct vx_fp_test -+{ -+ test_func_t test_func; -+ const char *name; -+ fp_test_args_t * targs; -+ int num_tests; -+ vx_fp_test_type test_type; -+}; -+ -+struct xs_conv_test -+{ -+ test_func_t test_func; -+ const char *name; -+ unsigned long long * results; -+ int num_tests; -+}; -+ -+typedef enum { -+ VSX_LOAD =1, -+ VSX_LOAD_SPLAT, -+ VSX_STORE -+} vsx_ldst_type; -+ -+struct ldst_test -+{ -+ test_func_t test_func; -+ const char *name; -+ void * base_addr; -+ uint32_t offset; -+ int num_words_to_process; -+ vsx_ldst_type type; -+}; -+ -+typedef enum { -+ VSX_AND = 1, -+ VSX_XOR, -+ VSX_ANDC, -+ VSX_OR, -+ VSX_NOR -+} vsx_log_op; -+ -+struct vsx_logic_test -+{ -+ test_func_t test_func; -+ const char *name; -+ vsx_log_op op; -+}; -+ -+struct vsx_move_test -+{ -+ test_func_t test_func; -+ const char *name; -+ int xa_idx, xb_idx; -+ unsigned long long expected_result; -+}; -+ -+struct vsx_permute_test -+{ -+ test_func_t test_func; -+ const char *name; -+ unsigned int xa[4]; -+ unsigned int xb[4]; -+ unsigned int expected_output[4]; -+}; -+ -+static vector unsigned int vec_out, vec_inA, vec_inB; -+ -+static void test_lxsdx(void) -+{ -+ __asm__ __volatile__ ("lxsdx %x0, %1, %2" : "=wa" (vec_out): "b" (r14),"r" (r15)); -+} -+ -+static void -+test_lxvd2x(void) -+{ -+ __asm__ __volatile__ ("lxvd2x %x0, %1, %2" : "=wa" (vec_out): "b" (r14),"r" (r15)); -+} -+ -+static void test_lxvdsx(void) -+{ -+ __asm__ __volatile__ ("lxvdsx %x0, %1, %2" : "=wa" (vec_out): "b" (r14),"r" (r15)); -+} -+ -+static void test_lxvw4x(void) -+{ -+ __asm__ __volatile__ ("lxvw4x %x0, %1, %2" : "=wa" (vec_out): "b" (r14),"r" (r15)); -+} -+ -+static void test_stxsdx(void) -+{ -+ __asm__ __volatile__ ("stxsdx %x0, %1, %2" : : "wa" (vec_inA), "b" (r14),"r" (r15)); -+} -+ -+static void test_stxvd2x(void) -+{ -+ __asm__ __volatile__ ("stxvd2x %x0, %1, %2" : : "wa" (vec_inA), "b" (r14),"r" (r15)); -+} -+ -+static void test_stxvw4x(void) -+{ -+ __asm__ __volatile__ ("stxvw4x %x0, %1, %2" : : "wa" (vec_inA), "b" (r14),"r" (r15)); -+} -+ -+static void test_xxlxor(void) -+{ -+ __asm__ __volatile__ ("xxlxor %x0, %x1, %x2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxlor(void) -+{ -+ __asm__ __volatile__ ("xxlor %x0, %x1, %x2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxlnor(void) -+{ -+ __asm__ __volatile__ ("xxlnor %x0, %x1, %x2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxland(void) -+{ -+ __asm__ __volatile__ ("xxland %x0, %x1, %x2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxlandc(void) -+{ -+ __asm__ __volatile__ ("xxlandc %x0, %x1, %x2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxmrghw(void) -+{ -+ __asm__ __volatile__ ("xxmrghw %x0, %x1, %x2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxmrglw(void) -+{ -+ __asm__ __volatile__ ("xxmrglw %x0, %x1, %x2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxpermdi_00(void) -+{ -+ __asm__ __volatile__ ("xxpermdi %x0, %x1, %x2, 0x0" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxpermdi_01(void) -+{ -+ __asm__ __volatile__ ("xxpermdi %x0, %x1, %x2, 0x1" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxpermdi_10(void) -+{ -+ __asm__ __volatile__ ("xxpermdi %x0, %x1, %x2, 0x2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxpermdi_11(void) -+{ -+ __asm__ __volatile__ ("xxpermdi %x0, %x1, %x2, 0x3" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxsldwi_0(void) -+{ -+ __asm__ __volatile__ ("xxsldwi %x0, %x1, %x2, 0" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxsldwi_1(void) -+{ -+ __asm__ __volatile__ ("xxsldwi %x0, %x1, %x2, 1" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxsldwi_2(void) -+{ -+ __asm__ __volatile__ ("xxsldwi %x0, %x1, %x2, 2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxsldwi_3(void) -+{ -+ __asm__ __volatile__ ("xxsldwi %x0, %x1, %x2, 3" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_fcfids (void) -+{ -+ __asm__ __volatile__ ("fcfids %0, %1" : "=f" (f17): "d" (f14)); -+} -+ -+static void test_fcfidus (void) -+{ -+ __asm__ __volatile__ ("fcfidus %0, %1" : "=f" (f17): "d" (f14)); -+} -+ -+static void test_fcfidu (void) -+{ -+ __asm__ __volatile__ ("fcfidu %0, %1" : "=f" (f17): "d" (f14)); -+} -+ -+static void test_xsabsdp (void) -+{ -+ __asm__ __volatile__ ("xsabsdp %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB)); -+} -+ -+static void test_xscpsgndp (void) -+{ -+ __asm__ __volatile__ ("xscpsgndp %x0, %x1, %x2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xsnabsdp (void) -+{ -+ __asm__ __volatile__ ("xsnabsdp %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB)); -+} -+ -+static void test_xsnegdp (void) -+{ -+ __asm__ __volatile__ ("xsnegdp %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB)); -+} -+ -+static int do_cmpudp; -+static void test_xscmp (void) -+{ -+ if (do_cmpudp) -+ __asm__ __volatile__ ("xscmpudp cr1, %x0, %x1" : : "wa" (vec_inA),"wa" (vec_inB)); -+ else -+ __asm__ __volatile__ ("xscmpodp cr1, %x0, %x1" : : "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xsadddp(void) -+{ -+ __asm__ __volatile__ ("xsadddp %x0, %x1, %x2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xsdivdp(void) -+{ -+ __asm__ __volatile__ ("xsdivdp %x0, %x1, %x2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static int do_adp; -+static void test_xsmadd(void) -+{ -+ if (do_adp) -+ __asm__ __volatile__ ("xsmaddadp %x0, %x1, %x2" : "+wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+ else -+ __asm__ __volatile__ ("xsmaddmdp %x0, %x1, %x2" : "+wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xsmsub(void) -+{ -+ if (do_adp) -+ __asm__ __volatile__ ("xsmsubadp %x0, %x1, %x2" : "+wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+ else -+ __asm__ __volatile__ ("xsmsubmdp %x0, %x1, %x2" : "+wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xsnmadd(void) -+{ -+ if (do_adp) -+ __asm__ __volatile__ ("xsnmaddadp %x0, %x1, %x2" : "+wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+ else -+ __asm__ __volatile__ ("xsnmaddmdp %x0, %x1, %x2" : "+wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xsmuldp(void) -+{ -+ __asm__ __volatile__ ("xsmuldp %x0, %x1, %x2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xssubdp(void) -+{ -+ __asm__ __volatile__ ("xssubdp %x0, %x1, %x2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xscvdpsxds (void) -+{ -+ __asm__ __volatile__ ("xscvdpsxds %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB)); -+} -+ -+static void test_xscvsxddp (void) -+{ -+ __asm__ __volatile__ ("xscvsxddp %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB)); -+} -+ -+static void test_xscvuxddp (void) -+{ -+ __asm__ __volatile__ ("xscvuxddp %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB)); -+} -+ -+static unsigned int vstg[] __attribute__ ((aligned (16))) = { 0, 0, 0,0, -+ 0, 0, 0, 0 }; -+ -+#define NUM_VSTG_INTS (sizeof vstg/sizeof vstg[0]) -+#define NUM_VSTG_VECS (NUM_VSTG_INTS/4) -+ -+static unsigned int viargs[] __attribute__ ((aligned (16))) = { 0x01234567, -+ 0x89abcdef, -+ 0x00112233, -+ 0x44556677, -+ 0x8899aabb, -+ 0x91929394, -+ 0xa1a2a3a4, -+ 0xb1b2b3b4, -+ 0xc1c2c3c4, -+ 0xd1d2d3d4, -+ 0x7a6b5d3e -+}; -+#define NUM_VIARGS_INTS (sizeof viargs/sizeof viargs[0]) -+#define NUM_VIARGS_VECS (NUM_VIARGS_INTS/4) -+ -+static ldst_test_t ldst_tests[] = { { &test_lxsdx, "lxsdx", viargs, 0, 2, VSX_LOAD }, -+ { &test_lxsdx, "lxsdx", viargs, 4, 2, VSX_LOAD }, -+ { &test_lxvd2x, "lxvd2x", viargs, 0, 4, VSX_LOAD }, -+ { &test_lxvd2x, "lxvd2x", viargs, 4, 4, VSX_LOAD }, -+ { &test_lxvdsx, "lxvdsx", viargs, 0, 4, VSX_LOAD_SPLAT }, -+ { &test_lxvdsx, "lxvdsx", viargs, 4, 4, VSX_LOAD_SPLAT }, -+ { &test_lxvw4x, "lxvw4x", viargs, 0, 4, VSX_LOAD }, -+ { &test_lxvw4x, "lxvw4x", viargs, 4, 4, VSX_LOAD }, -+ { &test_stxsdx, "stxsdx", vstg, 0, 2, VSX_STORE }, -+ { &test_stxsdx, "stxsdx", vstg, 4, 2, VSX_STORE }, -+ { &test_stxvd2x, "stxvd2x", vstg, 0, 4, VSX_STORE }, -+ { &test_stxvd2x, "stxvd2x", vstg, 4, 4, VSX_STORE }, -+ { &test_stxvw4x, "stxvw4x", vstg, 0, 4, VSX_STORE }, -+ { &test_stxvw4x, "stxvw4x", vstg, 4, 4, VSX_STORE }, -+ { NULL, NULL, NULL, 0, 0, 0 } }; -+ -+static logic_test_t logic_tests[] = { { &test_xxlxor, "xxlxor", VSX_XOR }, -+ { &test_xxlor, "xxlor", VSX_OR } , -+ { &test_xxlnor, "xxlnor", VSX_NOR }, -+ { &test_xxland, "xxland", VSX_AND }, -+ { &test_xxlandc, "xxlandc", VSX_ANDC }, -+ { NULL, NULL}}; -+ -+static move_test_t move_tests[] = { { &test_xsabsdp, "xsabsdp", 0, 4, 0x0899aabb91929394ULL }, -+ { &test_xscpsgndp, "xscpsgndp", 4, 0, 0x8123456789abcdefULL }, -+ { &test_xsnabsdp, "xsnabsdp", 7, 3, 0xc45566778899aabbULL, }, -+ { &test_xsnegdp, "xsnegdp", 0, 7, 0x31b2b3b4c1c2c3c4ULL, }, -+ { NULL, NULL, 0, 0, 0 } -+ -+}; -+ -+static permute_test_t permute_tests[] = -+{ -+ { &test_xxmrghw, "xxmrghw", -+ { 0x11111111, 0x22222222, 0x33333333, 0x44444444 }, /* XA input */ -+ { 0x55555555, 0x66666666, 0x77777777, 0x88888888 }, /* XB input */ -+ { 0x11111111, 0x55555555, 0x22222222, 0x66666666 } /* XT expected output */ -+ }, -+ { &test_xxmrghw, "xxmrghw", -+ { 0x00112233, 0x44556677, 0x8899aabb, 0xccddeeff }, /* XA input */ -+ { 0x11111111, 0x22222222, 0x33333333, 0x44444444 }, /* XB input */ -+ { 0x00112233, 0x11111111, 0x44556677, 0x22222222 } /* XT expected output */ -+ }, -+ { &test_xxmrglw, "xxmrglw", -+ { 0x11111111, 0x22222222, 0x33333333, 0x44444444 }, /* XA input */ -+ { 0x55555555, 0x66666666, 0x77777777, 0x88888888 }, /* XB input */ -+ { 0x33333333, 0x77777777, 0x44444444, 0x88888888 } /* XT expected output */ -+ }, -+ { &test_xxmrglw, "xxmrglw", -+ { 0x00112233, 0x44556677, 0x8899aabb, 0xccddeeff}, /* XA input */ -+ { 0x11111111, 0x22222222, 0x33333333, 0x44444444}, /* XB input */ -+ { 0x8899aabb, 0x33333333, 0xccddeeff, 0x44444444} /* XT expected output */ -+ }, -+ { &test_xxpermdi_00, "xxpermdi DM=00", -+ { 0x11111111, 0x22222222, 0x33333333, 0x44444444 }, /* XA input */ -+ { 0x55555555, 0x66666666, 0x77777777, 0x88888888 }, /* XB input */ -+ { 0x11111111, 0x22222222, 0x55555555, 0x66666666 } /* XT expected output */ -+ }, -+ { &test_xxpermdi_01, "xxpermdi DM=01", -+ { 0x11111111, 0x22222222, 0x33333333, 0x44444444 }, /* XA input */ -+ { 0x55555555, 0x66666666, 0x77777777, 0x88888888 }, /* XB input */ -+ { 0x11111111, 0x22222222, 0x77777777, 0x88888888 } /* XT expected output */ -+ }, -+ { &test_xxpermdi_10, "xxpermdi DM=10", -+ { 0x11111111, 0x22222222, 0x33333333, 0x44444444 }, /* XA input */ -+ { 0x55555555, 0x66666666, 0x77777777, 0x88888888 }, /* XB input */ -+ { 0x33333333, 0x44444444, 0x55555555, 0x66666666 } /* XT expected output */ -+ }, -+ { &test_xxpermdi_11, "xxpermdi DM=11", -+ { 0x11111111, 0x22222222, 0x33333333, 0x44444444 }, /* XA input */ -+ { 0x55555555, 0x66666666, 0x77777777, 0x88888888 }, /* XB input */ -+ { 0x33333333, 0x44444444, 0x77777777, 0x88888888 } /* XT expected output */ -+ }, -+ { &test_xxsldwi_0, "xxsldwi SHW=0", -+ { 0x11111111, 0x22222222, 0x33333333, 0x44444444 }, /* XA input */ -+ { 0x55555555, 0x66666666, 0x77777777, 0x88888888 }, /* XB input */ -+ { 0x11111111, 0x22222222, 0x33333333, 0x44444444 } /* XT expected output */ -+ }, -+ { &test_xxsldwi_1, "xxsldwi SHW=1", -+ { 0x11111111, 0x22222222, 0x33333333, 0x44444444 }, /* XA input */ -+ { 0x55555555, 0x66666666, 0x77777777, 0x88888888 }, /* XB input */ -+ { 0x22222222, 0x33333333, 0x44444444, 0x55555555 } /* XT expected output */ -+ }, -+ { &test_xxsldwi_2, "xxsldwi SHW=2", -+ { 0x11111111, 0x22222222, 0x33333333, 0x44444444 }, /* XA input */ -+ { 0x55555555, 0x66666666, 0x77777777, 0x88888888 }, /* XB input */ -+ { 0x33333333, 0x44444444, 0x55555555, 0x66666666 } /* XT expected output */ -+ }, -+ { &test_xxsldwi_3, "xxsldwi SHW=3", -+ { 0x11111111, 0x22222222, 0x33333333, 0x44444444 }, /* XA input */ -+ { 0x55555555, 0x66666666, 0x77777777, 0x88888888 }, /* XB input */ -+ { 0x44444444, 0x55555555, 0x66666666, 0x77777777 } /* XT expected output */ -+ }, -+ { NULL, NULL } -+}; -+ -+static fp_test_t fp_tests[] = { { &test_fcfids, "fcfids", 1 }, -+ { &test_fcfidus, "fcfidus", 1 }, -+ { &test_fcfidu, "fcfidu", 1 }, -+ { NULL, NULL, 0 }, -+ -+}; -+ -+static vx_fp_test_t vx_fp_tests[] = { -+ { &test_xscmp, "xscmp", xscmpX_tests, 64, VX_FP_CMP}, -+ { &test_xsadddp, "xsadddp", xsadddp_tests, 64, VX_FP_OTHER}, -+ { &test_xsdivdp, "xsdivdp", xsdivdp_tests, 64, VX_FP_OTHER}, -+ { &test_xsmadd, "xsmadd", xsmaddXdp_tests, 64, VX_FP_SMA}, -+ { &test_xsmsub, "xsmsub", xsmsubXdp_tests, 64, VX_FP_SMS}, -+ { &test_xsnmadd, "xsnmadd", xsnmaddXdp_tests, 64, VX_FP_SNMA}, -+ { & test_xsmuldp, "xsmuldp", xsmuldp_tests, 64, VX_FP_OTHER}, -+ { & test_xssubdp, "xssubdp", xssubdp_tests, 64, VX_FP_OTHER}, -+ { NULL, NULL, NULL, 0, 0 } -+}; -+ -+static xs_conv_test_t xs_conv_tests[] = { -+ { &test_xscvdpsxds, "xscvdpsxds", xscvdpsxds_results, 15}, -+ { &test_xscvsxddp, "xscvsxddp", xscvsxddp_results, 15}, -+ { &test_xscvuxddp, "xscvuxddp", xscvuxddp_results, 15}, -+ { NULL, NULL, NULL, 0} -+}; -+ -+#ifdef __powerpc64__ -+static void test_ldbrx(void) -+{ -+ int i, equality; -+ HWord_t reg_out; -+ unsigned char * byteIn, * byteOut; -+ r14 = (HWord_t)viargs; -+ // Just try the instruction an arbitrary number of times at different r15 offsets. -+ for (i = 0; i < 3; i++) { -+ int j, k; -+ reg_out = 0; -+ r15 = i * 4; -+ equality = 1; -+ __asm__ __volatile__ ("ldbrx %0, %1, %2" : "=r" (reg_out): "b" (r14),"r" (r15)); -+ byteIn = ((unsigned char *)(r14 + r15)); -+ byteOut = (unsigned char *)®_out; -+ -+ printf("ldbrx:"); -+ for (k = 0; k < 7; k++) { -+ printf( " %02x", (byteIn[k])); -+ } -+ printf(" (reverse) =>"); -+ for (j = 0; j < 8; j++) { -+ printf( " %02x", (byteOut[j])); -+ } -+ printf("\n"); -+ for (j = 0, k = 7; j < 8; j++, k--) { -+ equality &= (byteIn[k] == byteOut[j]); -+ } -+ if (!equality) { -+ printf("FAILED: load with byte reversal is incorrect\n"); -+ errors++; -+ } -+ } -+ printf( "\n" ); -+} -+ -+static void -+test_popcntd(void) -+{ -+ uint64_t res; -+ unsigned long long src = 0x9182736405504536ULL; -+ int i, answer = 0; -+ r14 = src; -+ __asm__ __volatile__ ("popcntd %0, %1" : "=r" (res): "r" (r14)); -+ for (i = 0; i < 64; i++) { -+ answer += (r14 & 1ULL); -+ r14 = r14 >> 1; -+ } -+ printf("popcntd: 0x%llx => %d\n", src, (int)res); -+ if (res!= answer) { -+ printf("Error: unexpected result from popcntd\n"); -+ errors++; -+ } -+ printf( "\n" ); -+} -+#endif -+ -+static void -+test_lfiwzx(void) -+{ -+ unsigned int i; -+ unsigned int * src; -+ uint64_t reg_out; -+ r14 = (HWord_t)viargs; -+ // Just try the instruction an arbitrary number of times at different r15 offsets. -+ for (i = 0; i < 3; i++) { -+ reg_out = 0; -+ r15 = i * 4; -+ __asm__ __volatile__ ("lfiwzx %0, %1, %2" : "=d" (reg_out): "b" (r14),"r" (r15)); -+ src = ((unsigned int *)(r14 + r15)); -+ printf("lfiwzx: %u => %llu.00\n", *src, (unsigned long long)reg_out); -+ -+ if (reg_out > 0xFFFFFFFFULL || *src != (unsigned int)reg_out) { -+ printf("FAILED: integer load to FP register is incorrect\n"); -+ errors++; -+ } -+ } -+ printf( "\n" ); -+} -+ -+static void test_vx_fp_ops(void) -+{ -+ -+ test_func_t func; -+ int k; -+ char * test_name = (char *)malloc(20); -+ k = 0; -+ -+ build_special_fargs_table(); -+ while ((func = vx_fp_tests[k].test_func)) { -+ int i, condreg, repeat = 0; -+ unsigned int flags; -+ unsigned long long * frap, * frbp, * dst; -+ vx_fp_test_t test_group = vx_fp_tests[k]; -+ vx_fp_test_type test_type = test_group.test_type; -+ -+ switch (test_type) { -+ case VX_FP_CMP: -+ strcpy(test_name, "xscmp"); -+ if (!repeat) { -+ repeat = 1; -+ strcat(test_name, "udp"); -+ do_cmpudp = 1; -+ } -+ break; -+ case VX_FP_SMA: -+ case VX_FP_SMS: -+ case VX_FP_SNMA: -+ if (test_type == VX_FP_SMA) -+ strcpy(test_name, "xsmadd"); -+ else if (test_type == VX_FP_SMS) -+ strcpy(test_name, "xsmsub"); -+ else -+ strcpy(test_name, "xsnmadd"); -+ if (!repeat) { -+ repeat = 1; -+ strcat(test_name, "adp"); -+ do_adp = 1; -+ } -+ break; -+ case VX_FP_OTHER: -+ strcpy(test_name, test_group.name); -+ break; -+ default: -+ printf("ERROR: Invalid VX FP test type %d\n", test_type); -+ exit(1); -+ } -+ -+again: -+ for (i = 0; i < test_group.num_tests; i++) { -+ unsigned int * inA, * inB, * pv; -+ -+ fp_test_args_t aTest = test_group.targs[i]; -+ inA = (unsigned int *)&spec_fargs[aTest.fra_idx]; -+ inB = (unsigned int *)&spec_fargs[aTest.frb_idx]; -+ frap = (unsigned long long *)&spec_fargs[aTest.fra_idx]; -+ frbp = (unsigned long long *)&spec_fargs[aTest.frb_idx]; -+ // Only need to copy one doubleword into each vector's element 0 -+ memcpy(&vec_inA, inA, 8); -+ memcpy(&vec_inB, inB, 8); -+ -+ switch (test_type) { -+ case VX_FP_CMP: -+ SET_FPSCR_ZERO; -+ SET_CR_XER_ZERO; -+ (*func)(); -+ GET_CR(flags); -+ condreg = (flags & 0x0f000000) >> 24; -+ printf("#%d: %s %016llx <=> %016llx ? %x (CRx)\n", i, test_name, *frap, *frbp, condreg); -+ // printf("\tFRA: %e; FRB: %e\n", spec_fargs[aTest.fra_idx], spec_fargs[aTest.frb_idx]); -+ if ( condreg != aTest.cr_flags) { -+ printf("Error: Expected CR flags 0x%x; actual flags: 0x%x\n", aTest.cr_flags, condreg); -+ errors++; -+ } -+ break; -+ case VX_FP_SMA: -+ case VX_FP_SMS: -+ case VX_FP_SNMA: -+ case VX_FP_OTHER: -+ { -+ int idx; -+ unsigned long long vsr_XT; -+ pv = (unsigned int *)&vec_out; -+ // clear vec_out -+ for (idx = 0; idx < 4; idx++, pv++) -+ *pv = 0; -+ -+ if (test_type != VX_FP_OTHER) { -+ /* Then we need a third src argument, which is stored in element 0 of -+ * VSX[XT] -- i.e., vec_out. For the xsmdp cases, VSX[XT] holds -+ * src3 and VSX[XB] holds src2; for the xsadp cases, VSX[XT] holds -+ * src2 and VSX[XB] holds src3. The fp_test_args_t that holds the test -+ * data (input args, result) contain only two inputs, so I arbitrarily -+ * use spec_fargs elements 4 and 14 (alternating) for the third source -+ * argument. We can use the same input data for a given pair of -+ * adp/mdp-type instructions by swapping the src2 and src3 arguments; thus -+ * the expected result should be the same. -+ */ -+ int extra_arg_idx; -+ if (i % 2) -+ extra_arg_idx = 4; -+ else -+ extra_arg_idx = 14; -+ -+ //memcpy(&vec_out, &spec_fargs[14], 8); -+ -+ if (repeat) { -+ /* We're on the first time through of one of the VX_FP_SMx -+ * test types, meaning we're testing a xsadp case, thus we -+ * have to swap inputs as described above: -+ * src2 <= VSX[XT] -+ * src3 <= VSX[XB] -+ */ -+ memcpy(&vec_out, inB, 8); // src2 -+ memcpy(&vec_inB, &spec_fargs[extra_arg_idx], 8); //src3 -+ frbp = (unsigned long long *)&spec_fargs[extra_arg_idx]; -+ } else { -+ // Don't need to init src2, as it's done before the switch() -+ memcpy(&vec_out, &spec_fargs[extra_arg_idx], 8); //src3 -+ } -+ memcpy(&vsr_XT, &vec_out, 8); -+ } -+ -+ (*func)(); -+ dst = (unsigned long long *) &vec_out; -+ if (test_type == VX_FP_OTHER) -+ printf("#%d: %s %016llx %016llx = %016llx\n", i, test_name, *frap, *frbp, *dst); -+ else -+ printf( "#%d: %s %016llx %016llx %016llx = %016llx\n", i, -+ test_name, vsr_XT, *frap, *frbp, *dst ); -+ -+ if ( *dst != aTest.dp_bin_result) { -+ printf("Error: Expected result %016llx; actual result %016llx\n", aTest.dp_bin_result, *dst); -+ errors++; -+ } -+ /* -+ { -+ // Debug code. Keep this block commented out except when debugging. -+ double result, expected; -+ memcpy(&result, dst, 8); -+ memcpy(&expected, &aTest.dp_bin_result, 8); -+ printf( "\tFRA + FRB: %e + %e: Expected = %e; Actual = %e\n", -+ spec_fargs[aTest.fra_idx], spec_fargs[aTest.frb_idx], -+ expected, result ); -+ } -+ */ -+ break; -+ } -+ } -+ -+ -+ } -+ printf( "\n" ); -+ -+ if (repeat) { -+ repeat = 0; -+ switch (test_type) { -+ case VX_FP_CMP: -+ strcpy(test_name, "xscmp"); -+ strcat(test_name, "odp"); -+ do_cmpudp = 0; -+ break; -+ case VX_FP_SMA: -+ case VX_FP_SMS: -+ case VX_FP_SNMA: -+ if (test_type == VX_FP_SMA) -+ strcpy(test_name, "xsmadd"); -+ else if (test_type == VX_FP_SMS) -+ strcpy(test_name, "xsmsub"); -+ else -+ strcpy(test_name, "xsnmadd"); -+ strcat(test_name, "mdp"); -+ do_adp = 0; -+ break; -+ case VX_FP_OTHER: -+ break; -+ } -+ goto again; -+ } -+ k++; -+ } -+ printf( "\n" ); -+ free(test_name); -+} -+ -+static void test_xs_conv_ops(void) -+{ -+ -+ test_func_t func; -+ int k = 0; -+ -+ build_special_fargs_table(); -+ while ((func = xs_conv_tests[k].test_func)) { -+ int i; -+ unsigned long long * frbp, * dst; -+ xs_conv_test_t test_group = xs_conv_tests[k]; -+ for (i = 0; i < test_group.num_tests; i++) { -+ unsigned int * inB, * pv; -+ int idx; -+ unsigned long long exp_result = test_group.results[i]; -+ inB = (unsigned int *)&spec_fargs[i]; -+ frbp = (unsigned long long *)&spec_fargs[i]; -+ memcpy(&vec_inB, inB, 8); -+ pv = (unsigned int *)&vec_out; -+ // clear vec_out -+ for (idx = 0; idx < 4; idx++, pv++) -+ *pv = 0; -+ (*func)(); -+ dst = (unsigned long long *) &vec_out; -+ printf("#%d: %s %016llx => %016llx\n", i, test_group.name, *frbp, *dst); -+ -+ if ( *dst != exp_result) { -+ printf("Error: Expected result %016llx; actual result %016llx\n", exp_result, *dst); -+ errors++; -+ } -+ } -+ k++; -+ printf("\n"); -+ } -+ printf( "\n" ); -+} -+ -+static void do_load_test(ldst_test_t loadTest) -+{ -+ test_func_t func; -+ unsigned int *src, *dst; -+ int splat = loadTest.type == VSX_LOAD_SPLAT ? 1: 0; -+ int i, j, m, equality; -+ i = j = 0; -+ -+ func = loadTest.test_func; -+ for (i = 0, r14 = (HWord_t) loadTest.base_addr; i < NUM_VIARGS_VECS; i++) { -+ int again; -+ j = 0; -+ r14 += i * 16; -+ do { -+ unsigned int * pv = (unsigned int *)&vec_out; -+ int idx; -+ // clear vec_out -+ for (idx = 0; idx < 4; idx++, pv+=idx) -+ *pv = 0; -+ -+ again = 0; -+ r15 = j; -+ -+ // execute test insn -+ (*func)(); -+ -+ src = (unsigned int*) (((unsigned char *)r14) + j); -+ dst = (unsigned int*) &vec_out; -+ -+ printf( "%s:", loadTest.name); -+ for (m = 0; m < loadTest.num_words_to_process; m++) { -+ printf( " %08x", src[splat ? m % 2 : m]); -+ } -+ printf( " =>"); -+ for (m = 0; m < loadTest.num_words_to_process; m++) { -+ printf( " %08x", dst[m]); -+ } -+ printf("\n"); -+ equality = 1; -+ for (m = 0; m < loadTest.num_words_to_process; m++) { -+ equality = equality && (src[splat ? m % 2 : m] == dst[m]); -+ } -+ -+ if (!equality) { -+ printf("FAILED: loaded vector is incorrect\n"); -+ errors++; -+ } -+ -+ if (j == 0 && loadTest.offset) { -+ again = 1; -+ j += loadTest.offset; -+ } -+ } -+ while (again); -+ } -+} -+ -+static void -+do_store_test ( ldst_test_t storeTest ) -+{ -+ test_func_t func; -+ unsigned int *src, *dst; -+ int i, j, m, equality; -+ i = j = 0; -+ -+ func = storeTest.test_func; -+ r14 = (HWord_t) storeTest.base_addr; -+ r15 = (HWord_t) storeTest.offset; -+ unsigned int * pv = (unsigned int *) storeTest.base_addr; -+ int idx; -+ // clear out storage destination -+ for (idx = 0; idx < 4; idx++, pv += idx) -+ *pv = 0; -+ -+ memcpy(&vec_inA, &viargs[0], sizeof(vector unsigned char)); -+ -+ // execute test insn -+ (*func)(); -+ src = &viargs[0]; -+ dst = (unsigned int*) (((unsigned char *) r14) + storeTest.offset); -+ -+ printf( "%s:", storeTest.name ); -+ for (m = 0; m < storeTest.num_words_to_process; m++) { -+ printf( " %08x", src[m] ); -+ } -+ printf( " =>" ); -+ for (m = 0; m < storeTest.num_words_to_process; m++) { -+ printf( " %08x", dst[m] ); -+ } -+ printf( "\n" ); -+ equality = 1; -+ for (m = 0; m < storeTest.num_words_to_process; m++) { -+ equality = equality && (src[m] == dst[m]); -+ } -+ -+ if (!equality) { -+ printf( "FAILED: vector store result is incorrect\n" ); -+ errors++; -+ } -+ -+} -+ -+ -+static void test_ldst(void) -+{ -+ int k = 0; -+ -+ while (ldst_tests[k].test_func) { -+ if (ldst_tests[k].type == VSX_STORE) -+ do_store_test(ldst_tests[k]); -+ else -+ do_load_test(ldst_tests[k]); -+ k++; -+ printf("\n"); -+ } -+} -+ -+static void test_ftdiv(void) -+{ -+ int i, num_tests, crx; -+ unsigned int flags; -+ unsigned long long * frap, * frbp; -+ build_special_fargs_table(); -+ -+ num_tests = sizeof ftdiv_tests/sizeof ftdiv_tests[0]; -+ -+ for (i = 0; i < num_tests; i++) { -+ ftdiv_test_args_t aTest = ftdiv_tests[i]; -+ f14 = spec_fargs[aTest.fra_idx]; -+ f15 = spec_fargs[aTest.frb_idx]; -+ frap = (unsigned long long *)&spec_fargs[aTest.fra_idx]; -+ frbp = (unsigned long long *)&spec_fargs[aTest.frb_idx]; -+ SET_FPSCR_ZERO; -+ SET_CR_XER_ZERO; -+ __asm__ __volatile__ ("ftdiv cr1, %0, %1" : : "d" (f14), "d" (f15)); -+ GET_CR(flags); -+ crx = (flags & 0x0f000000) >> 24; -+ printf( "ftdiv: %016llx <=> %016llx ? %x (CRx)\n", *frap, *frbp, crx); -+// printf("\tFRA: %e; FRB: %e\n", f14, f15); -+ if ( crx != aTest.cr_flags) { -+ printf("Error: Expected CR flags 0x%x; actual flags: 0x%x\n", aTest.cr_flags, crx); -+ errors++; -+ } -+ } -+ printf( "\n" ); -+} -+ -+ -+static void test_p7_fpops ( void ) -+{ -+ int k = 0; -+ test_func_t func; -+ -+ build_fargs_table(); -+ while ((func = fp_tests[k].test_func)) { -+ float res; -+ double resd; -+ unsigned long long u0; -+ int i; -+ int res32 = strcmp(fp_tests[k].name, "fcfidu"); -+ -+ for (i = 0; i < nb_fargs; i++) { -+ u0 = *(unsigned long long *) (&fargs[i]); -+ f14 = fargs[i]; -+ (*func)(); -+ if (res32) { -+ res = f17; -+ printf( "%s %016llx => (raw sp) %08x)", -+ fp_tests[k].name, u0, *((unsigned int *)&res)); -+ } else { -+ resd = f17; -+ printf( "%s %016llx => (raw sp) %016llx)", -+ fp_tests[k].name, u0, *(unsigned long long *)(&resd)); -+ } -+ printf( "\n" ); -+ } -+ -+ k++; -+ printf( "\n" ); -+ } -+} -+ -+static void test_vsx_logic(void) -+{ -+ logic_test_t aTest; -+ test_func_t func; -+ int equality, k; -+ k = 0; -+ -+ while ((func = logic_tests[k].test_func)) { -+ unsigned int * pv; -+ int startA, startB; -+ unsigned int * inA, * inB, * dst; -+ int idx, i; -+ startA = 0; -+ aTest = logic_tests[k]; -+ for (i = 0; i <= (NUM_VIARGS_INTS - (NUM_VIARGS_VECS * sizeof(int))); i++, startA++) { -+ startB = startA + 4; -+ pv = (unsigned int *)&vec_out; -+ inA = &viargs[startA]; -+ inB = &viargs[startB]; -+ memcpy(&vec_inA, inA, sizeof(vector unsigned char)); -+ memcpy(&vec_inB, inB, sizeof(vector unsigned char)); -+ // clear vec_out -+ for (idx = 0; idx < 4; idx++, pv++) -+ *pv = 0; -+ -+ // execute test insn -+ (*func)(); -+ dst = (unsigned int*) &vec_out; -+ -+ printf( "%s:", aTest.name); -+ printf( " %08x %08x %08x %08x %s", inA[0], inA[1], inA[2], inA[3], aTest.name); -+ printf( " %08x %08x %08x %08x", inB[0], inB[1], inB[2], inB[3]); -+ printf(" => %08x %08x %08x %08x\n", dst[0], dst[1], dst[2], dst[3]); -+ -+ equality = 1; -+ for (idx = 0; idx < 4; idx++) { -+ switch (aTest.op) { -+ case VSX_AND: -+ equality &= (dst[idx] == (inA[idx] & inB[idx])); -+ break; -+ case VSX_ANDC: -+ equality &= (dst[idx] == (inA[idx] & ~inB[idx])); -+ break; -+ case VSX_NOR: -+ equality &= (dst[idx] == ~(inA[idx] | inB[idx])); -+ break; -+ case VSX_XOR: -+ equality &= (dst[idx] == (inA[idx] ^ inB[idx])); -+ break; -+ case VSX_OR: -+ equality &= (dst[idx] == (inA[idx] | inB[idx])); -+ break; -+ default: -+ fprintf(stderr, "Error in test_vsx_logic(): unknown VSX logical op %d\n", aTest.op); -+ exit(1); -+ } -+ } -+ if (!equality) { -+ printf( "FAILED: vector out is incorrect\n" ); -+ errors++; -+ } -+ } -+ k++; -+ } -+ printf( "\n" ); -+} -+ -+static void test_move_ops (void) -+{ -+ move_test_t aTest; -+ test_func_t func; -+ int equality, k; -+ k = 0; -+ -+ while ((func = move_tests[k].test_func)) { -+ unsigned int * pv; -+ int startA, startB; -+ unsigned int * inA, * inB, * dst; -+ unsigned long long exp_out; -+ int idx; -+ aTest = move_tests[k]; -+ exp_out = aTest.expected_result; -+ startA = aTest.xa_idx; -+ startB = aTest.xb_idx; -+ pv = (unsigned int *)&vec_out; -+ inA = &viargs[startA]; -+ inB = &viargs[startB]; -+ memcpy(&vec_inA, inA, sizeof(vector unsigned char)); -+ memcpy(&vec_inB, inB, sizeof(vector unsigned char)); -+ // clear vec_out -+ for (idx = 0; idx < 4; idx++, pv++) -+ *pv = 0; -+ -+ // execute test insn -+ (*func)(); -+ dst = (unsigned int*) &vec_out; -+ -+ printf( "%s:", aTest.name); -+ printf( " %08x %08x %s", inA[0], inA[1], aTest.name); -+ printf( " %08x %08xx", inB[0], inB[1]); -+ printf(" => %08x %08x\n", dst[0], dst[1]); -+ -+ equality = 1; -+ pv = (unsigned int *)&exp_out; -+ for (idx = 0; idx < 2; idx++) { -+ equality &= (dst[idx] == pv[idx]); -+ } -+ if (!equality) { -+ printf( "FAILED: vector out is incorrect\n" ); -+ errors++; -+ } -+ k++; -+ printf( "\n" ); -+ } -+} -+ -+static void test_permute_ops (void) -+{ -+ permute_test_t *aTest; -+ unsigned int *dst = (unsigned int *) &vec_out; -+ -+ for (aTest = &(permute_tests[0]); aTest->test_func != NULL; aTest++) -+ { -+ /* Grab test input and clear output vector. */ -+ memcpy(&vec_inA, aTest->xa, sizeof(vec_inA)); -+ memcpy(&vec_inB, aTest->xb, sizeof(vec_inB)); -+ memset(dst, 0, sizeof(vec_out)); -+ -+ /* execute test insn */ -+ aTest->test_func(); -+ -+ printf( "%s:\n", aTest->name); -+ printf( " XA[%08x,%08x,%08x,%08x]\n", -+ aTest->xa[0], aTest->xa[1], aTest->xa[2], aTest->xa[3]); -+ printf( " XB[%08x,%08x,%08x,%08x]\n", -+ aTest->xb[0], aTest->xb[1], aTest->xb[2], aTest->xb[3]); -+ printf( " => XT[%08x,%08x,%08x,%08x]\n", -+ dst[0], dst[1], dst[2], dst[3]); -+ -+ if (memcmp (dst, &aTest->expected_output, sizeof(vec_out))) -+ { -+ printf( "FAILED: vector out is incorrect\n" ); -+ errors++; -+ } -+ } -+ printf( "\n" ); -+} -+ -+static test_table_t all_tests[] = { { &test_ldst, -+ "Test VSX load/store instructions" }, -+ { &test_vsx_logic, -+ "Test VSX logic instructions" }, -+#ifdef __powerpc64__ -+ { &test_ldbrx, -+ "Test ldbrx instruction" }, -+ { &test_popcntd, -+ "Test popcntd instruction" }, -+#endif -+ { &test_lfiwzx, -+ "Test lfiwzx instruction" }, -+ { &test_p7_fpops, -+ "Test P7 floating point convert instructions"}, -+ { &test_ftdiv, -+ "Test ftdiv instruction" }, -+ { &test_move_ops, -+ "Test VSX move instructions"}, -+ { &test_permute_ops, -+ "Test VSX permute instructions"}, -+ { &test_vx_fp_ops, -+ "Test VSX floating point instructions"}, -+ { &test_xs_conv_ops, -+ "Test VSX scalar integer conversion instructions" }, -+ { NULL, NULL } -+}; -+#endif // HAS_VSX -+ -+int main(int argc, char *argv[]) -+{ -+#ifdef HAS_VSX -+ -+ test_table_t aTest; -+ test_func_t func; -+ int i = 0; -+ -+ while ((func = all_tests[i].test_category)) { -+ aTest = all_tests[i]; -+ printf( "%s\n", aTest.name ); -+ (*func)(); -+ i++; -+ } -+ if (errors) -+ printf("Testcase FAILED with %d errors \n", errors); -+ else -+ printf("Testcase PASSED\n"); -+ -+#endif // HAS _VSX -+ -+ return 0; -+} -Index: none/tests/ppc32/test_isa_2_06_part1.stderr.exp -=================================================================== ---- /dev/null -+++ none/tests/ppc32/test_isa_2_06_part1.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ -Index: none/tests/ppc32/test_isa_2_06_part1.stdout.exp -=================================================================== ---- /dev/null -+++ none/tests/ppc32/test_isa_2_06_part1.stdout.exp -@@ -0,0 +1,1023 @@ -+Test VSX load/store instructions -+lxsdx: 01234567 89abcdef => 01234567 89abcdef -+lxsdx: 8899aabb 91929394 => 8899aabb 91929394 -+ -+lxsdx: 01234567 89abcdef => 01234567 89abcdef -+lxsdx: 89abcdef 00112233 => 89abcdef 00112233 -+lxsdx: 8899aabb 91929394 => 8899aabb 91929394 -+lxsdx: 91929394 a1a2a3a4 => 91929394 a1a2a3a4 -+ -+lxvd2x: 01234567 89abcdef 00112233 44556677 => 01234567 89abcdef 00112233 44556677 -+lxvd2x: 8899aabb 91929394 a1a2a3a4 b1b2b3b4 => 8899aabb 91929394 a1a2a3a4 b1b2b3b4 -+ -+lxvd2x: 01234567 89abcdef 00112233 44556677 => 01234567 89abcdef 00112233 44556677 -+lxvd2x: 89abcdef 00112233 44556677 8899aabb => 89abcdef 00112233 44556677 8899aabb -+lxvd2x: 8899aabb 91929394 a1a2a3a4 b1b2b3b4 => 8899aabb 91929394 a1a2a3a4 b1b2b3b4 -+lxvd2x: 91929394 a1a2a3a4 b1b2b3b4 c1c2c3c4 => 91929394 a1a2a3a4 b1b2b3b4 c1c2c3c4 -+ -+lxvdsx: 01234567 89abcdef 01234567 89abcdef => 01234567 89abcdef 01234567 89abcdef -+lxvdsx: 8899aabb 91929394 8899aabb 91929394 => 8899aabb 91929394 8899aabb 91929394 -+ -+lxvdsx: 01234567 89abcdef 01234567 89abcdef => 01234567 89abcdef 01234567 89abcdef -+lxvdsx: 89abcdef 00112233 89abcdef 00112233 => 89abcdef 00112233 89abcdef 00112233 -+lxvdsx: 8899aabb 91929394 8899aabb 91929394 => 8899aabb 91929394 8899aabb 91929394 -+lxvdsx: 91929394 a1a2a3a4 91929394 a1a2a3a4 => 91929394 a1a2a3a4 91929394 a1a2a3a4 -+ -+lxvw4x: 01234567 89abcdef 00112233 44556677 => 01234567 89abcdef 00112233 44556677 -+lxvw4x: 8899aabb 91929394 a1a2a3a4 b1b2b3b4 => 8899aabb 91929394 a1a2a3a4 b1b2b3b4 -+ -+lxvw4x: 01234567 89abcdef 00112233 44556677 => 01234567 89abcdef 00112233 44556677 -+lxvw4x: 89abcdef 00112233 44556677 8899aabb => 89abcdef 00112233 44556677 8899aabb -+lxvw4x: 8899aabb 91929394 a1a2a3a4 b1b2b3b4 => 8899aabb 91929394 a1a2a3a4 b1b2b3b4 -+lxvw4x: 91929394 a1a2a3a4 b1b2b3b4 c1c2c3c4 => 91929394 a1a2a3a4 b1b2b3b4 c1c2c3c4 -+ -+stxsdx: 01234567 89abcdef => 01234567 89abcdef -+ -+stxsdx: 01234567 89abcdef => 01234567 89abcdef -+ -+stxvd2x: 01234567 89abcdef 00112233 44556677 => 01234567 89abcdef 00112233 44556677 -+ -+stxvd2x: 01234567 89abcdef 00112233 44556677 => 01234567 89abcdef 00112233 44556677 -+ -+stxvw4x: 01234567 89abcdef 00112233 44556677 => 01234567 89abcdef 00112233 44556677 -+ -+stxvw4x: 01234567 89abcdef 00112233 44556677 => 01234567 89abcdef 00112233 44556677 -+ -+Test VSX logic instructions -+xxlxor: 01234567 89abcdef 00112233 44556677 xxlxor 8899aabb 91929394 a1a2a3a4 b1b2b3b4 => 89baefdc 18395e7b a1b38197 f5e7d5c3 -+xxlxor: 89abcdef 00112233 44556677 8899aabb xxlxor 91929394 a1a2a3a4 b1b2b3b4 c1c2c3c4 => 18395e7b a1b38197 f5e7d5c3 495b697f -+xxlxor: 00112233 44556677 8899aabb 91929394 xxlxor a1a2a3a4 b1b2b3b4 c1c2c3c4 d1d2d3d4 => a1b38197 f5e7d5c3 495b697f 40404040 -+xxlxor: 44556677 8899aabb 91929394 a1a2a3a4 xxlxor b1b2b3b4 c1c2c3c4 d1d2d3d4 7a6b5d3e => f5e7d5c3 495b697f 40404040 dbc9fe9a -+xxlor: 01234567 89abcdef 00112233 44556677 xxlor 8899aabb 91929394 a1a2a3a4 b1b2b3b4 => 89bbefff 99bbdfff a1b3a3b7 f5f7f7f7 -+xxlor: 89abcdef 00112233 44556677 8899aabb xxlor 91929394 a1a2a3a4 b1b2b3b4 c1c2c3c4 => 99bbdfff a1b3a3b7 f5f7f7f7 c9dbebff -+xxlor: 00112233 44556677 8899aabb 91929394 xxlor a1a2a3a4 b1b2b3b4 c1c2c3c4 d1d2d3d4 => a1b3a3b7 f5f7f7f7 c9dbebff d1d2d3d4 -+xxlor: 44556677 8899aabb 91929394 a1a2a3a4 xxlor b1b2b3b4 c1c2c3c4 d1d2d3d4 7a6b5d3e => f5f7f7f7 c9dbebff d1d2d3d4 fbebffbe -+xxlnor: 01234567 89abcdef 00112233 44556677 xxlnor 8899aabb 91929394 a1a2a3a4 b1b2b3b4 => 76441000 66442000 5e4c5c48 0a080808 -+xxlnor: 89abcdef 00112233 44556677 8899aabb xxlnor 91929394 a1a2a3a4 b1b2b3b4 c1c2c3c4 => 66442000 5e4c5c48 0a080808 36241400 -+xxlnor: 00112233 44556677 8899aabb 91929394 xxlnor a1a2a3a4 b1b2b3b4 c1c2c3c4 d1d2d3d4 => 5e4c5c48 0a080808 36241400 2e2d2c2b -+xxlnor: 44556677 8899aabb 91929394 a1a2a3a4 xxlnor b1b2b3b4 c1c2c3c4 d1d2d3d4 7a6b5d3e => 0a080808 36241400 2e2d2c2b 04140041 -+xxland: 01234567 89abcdef 00112233 44556677 xxland 8899aabb 91929394 a1a2a3a4 b1b2b3b4 => 00010023 81828184 00002220 00102234 -+xxland: 89abcdef 00112233 44556677 8899aabb xxland 91929394 a1a2a3a4 b1b2b3b4 c1c2c3c4 => 81828184 00002220 00102234 80808280 -+xxland: 00112233 44556677 8899aabb 91929394 xxland a1a2a3a4 b1b2b3b4 c1c2c3c4 d1d2d3d4 => 00002220 00102234 80808280 91929394 -+xxland: 44556677 8899aabb 91929394 a1a2a3a4 xxland b1b2b3b4 c1c2c3c4 d1d2d3d4 7a6b5d3e => 00102234 80808280 91929394 20220124 -+xxlandc: 01234567 89abcdef 00112233 44556677 xxlandc 8899aabb 91929394 a1a2a3a4 b1b2b3b4 => 01224544 08294c6b 00110013 44454443 -+xxlandc: 89abcdef 00112233 44556677 8899aabb xxlandc 91929394 a1a2a3a4 b1b2b3b4 c1c2c3c4 => 08294c6b 00110013 44454443 0819283b -+xxlandc: 00112233 44556677 8899aabb 91929394 xxlandc a1a2a3a4 b1b2b3b4 c1c2c3c4 d1d2d3d4 => 00110013 44454443 0819283b 00000000 -+xxlandc: 44556677 8899aabb 91929394 a1a2a3a4 xxlandc b1b2b3b4 c1c2c3c4 d1d2d3d4 7a6b5d3e => 44454443 0819283b 00000000 8180a280 -+ -+Test lfiwzx instruction -+lfiwzx: 19088743 => 19088743.00 -+lfiwzx: 2309737967 => 2309737967.00 -+lfiwzx: 1122867 => 1122867.00 -+ -+Test P7 floating point convert instructions -+fcfids 0010000000000001 => (raw sp) 59800000) -+fcfids 00100094e0000359 => (raw sp) 598004a7) -+fcfids 3fe0000000000001 => (raw sp) 5e7f8000) -+fcfids 3fe00094e0000359 => (raw sp) 5e7f8002) -+fcfids 8010000000000001 => (raw sp) deffe000) -+fcfids 80100094e0000359 => (raw sp) deffdfff) -+fcfids bfe0000000000001 => (raw sp) de804000) -+fcfids bfe00094e0000359 => (raw sp) de803fff) -+fcfids 0020000000000b01 => (raw sp) 5a000000) -+fcfids 00000000203f0b3d => (raw sp) 4e00fc2d) -+fcfids 00000000005a203d => (raw sp) 4ab4407a) -+fcfids 8020000000000b01 => (raw sp) deffc000) -+fcfids 80000000203f0b3d => (raw sp) df000000) -+ -+fcfidus 0010000000000001 => (raw sp) 59800000) -+fcfidus 00100094e0000359 => (raw sp) 598004a7) -+fcfidus 3fe0000000000001 => (raw sp) 5e7f8000) -+fcfidus 3fe00094e0000359 => (raw sp) 5e7f8002) -+fcfidus 8010000000000001 => (raw sp) 5f001000) -+fcfidus 80100094e0000359 => (raw sp) 5f001001) -+fcfidus bfe0000000000001 => (raw sp) 5f3fe000) -+fcfidus bfe00094e0000359 => (raw sp) 5f3fe001) -+fcfidus 0020000000000b01 => (raw sp) 5a000000) -+fcfidus 00000000203f0b3d => (raw sp) 4e00fc2d) -+fcfidus 00000000005a203d => (raw sp) 4ab4407a) -+fcfidus 8020000000000b01 => (raw sp) 5f002000) -+fcfidus 80000000203f0b3d => (raw sp) 5f000000) -+ -+fcfidu 0010000000000001 => (raw sp) 4330000000000001) -+fcfidu 00100094e0000359 => (raw sp) 43300094e0000359) -+fcfidu 3fe0000000000001 => (raw sp) 43cff00000000000) -+fcfidu 3fe00094e0000359 => (raw sp) 43cff0004a700002) -+fcfidu 8010000000000001 => (raw sp) 43e0020000000000) -+fcfidu 80100094e0000359 => (raw sp) 43e00200129c0000) -+fcfidu bfe0000000000001 => (raw sp) 43e7fc0000000000) -+fcfidu bfe00094e0000359 => (raw sp) 43e7fc00129c0000) -+fcfidu 0020000000000b01 => (raw sp) 4340000000000580) -+fcfidu 00000000203f0b3d => (raw sp) 41c01f859e800000) -+fcfidu 00000000005a203d => (raw sp) 4156880f40000000) -+fcfidu 8020000000000b01 => (raw sp) 43e0040000000001) -+fcfidu 80000000203f0b3d => (raw sp) 43e00000000407e1) -+ -+Test ftdiv instruction -+ftdiv: 3fd8000000000000 <=> 404f000000000000 ? 8 (CRx) -+ftdiv: 7ff7ffffffffffff <=> 404f000000000000 ? a (CRx) -+ftdiv: 404f000000000000 <=> fff8000000000000 ? a (CRx) -+ftdiv: 3fd8000000000000 <=> 0018000000b77501 ? a (CRx) -+ftdiv: 404f000000000000 <=> 7fe800000000051b ? a (CRx) -+ftdiv: 7fe800000000051b <=> 3fd8000000000000 ? a (CRx) -+ftdiv: 3fd8000000000000 <=> 7fe800000000051b ? a (CRx) -+ftdiv: 0123214569900000 <=> 3fd8000000000000 ? a (CRx) -+ftdiv: 7ff0000000000000 <=> 404f000000000000 ? e (CRx) -+ftdiv: fff0000000000000 <=> 404f000000000000 ? e (CRx) -+ftdiv: 404f000000000000 <=> 7ff0000000000000 ? e (CRx) -+ftdiv: 3fd8000000000000 <=> 8008340000078000 ? e (CRx) -+ftdiv: 0000000000000000 <=> 0000000000000000 ? e (CRx) -+ftdiv: 0000000000000000 <=> 8000000000000000 ? e (CRx) -+ -+Test VSX move instructions -+xsabsdp: 01234567 89abcdef xsabsdp 8899aabb 91929394x => 0899aabb 91929394 -+ -+xscpsgndp: 8899aabb 91929394 xscpsgndp 01234567 89abcdefx => 81234567 89abcdef -+ -+xsnabsdp: b1b2b3b4 c1c2c3c4 xsnabsdp 44556677 8899aabbx => c4556677 8899aabb -+ -+xsnegdp: 01234567 89abcdef xsnegdp b1b2b3b4 c1c2c3c4x => 31b2b3b4 c1c2c3c4 -+ -+Test VSX permute instructions -+xxmrghw: -+ XA[11111111,22222222,33333333,44444444] -+ XB[55555555,66666666,77777777,88888888] -+ => XT[11111111,55555555,22222222,66666666] -+xxmrghw: -+ XA[00112233,44556677,8899aabb,ccddeeff] -+ XB[11111111,22222222,33333333,44444444] -+ => XT[00112233,11111111,44556677,22222222] -+xxmrglw: -+ XA[11111111,22222222,33333333,44444444] -+ XB[55555555,66666666,77777777,88888888] -+ => XT[33333333,77777777,44444444,88888888] -+xxmrglw: -+ XA[00112233,44556677,8899aabb,ccddeeff] -+ XB[11111111,22222222,33333333,44444444] -+ => XT[8899aabb,33333333,ccddeeff,44444444] -+xxpermdi DM=00: -+ XA[11111111,22222222,33333333,44444444] -+ XB[55555555,66666666,77777777,88888888] -+ => XT[11111111,22222222,55555555,66666666] -+xxpermdi DM=01: -+ XA[11111111,22222222,33333333,44444444] -+ XB[55555555,66666666,77777777,88888888] -+ => XT[11111111,22222222,77777777,88888888] -+xxpermdi DM=10: -+ XA[11111111,22222222,33333333,44444444] -+ XB[55555555,66666666,77777777,88888888] -+ => XT[33333333,44444444,55555555,66666666] -+xxpermdi DM=11: -+ XA[11111111,22222222,33333333,44444444] -+ XB[55555555,66666666,77777777,88888888] -+ => XT[33333333,44444444,77777777,88888888] -+xxsldwi SHW=0: -+ XA[11111111,22222222,33333333,44444444] -+ XB[55555555,66666666,77777777,88888888] -+ => XT[11111111,22222222,33333333,44444444] -+xxsldwi SHW=1: -+ XA[11111111,22222222,33333333,44444444] -+ XB[55555555,66666666,77777777,88888888] -+ => XT[22222222,33333333,44444444,55555555] -+xxsldwi SHW=2: -+ XA[11111111,22222222,33333333,44444444] -+ XB[55555555,66666666,77777777,88888888] -+ => XT[33333333,44444444,55555555,66666666] -+xxsldwi SHW=3: -+ XA[11111111,22222222,33333333,44444444] -+ XB[55555555,66666666,77777777,88888888] -+ => XT[44444444,55555555,66666666,77777777] -+ -+Test VSX floating point instructions -+#0: xscmpudp fff0000000000000 <=> fff0000000000000 ? 2 (CRx) -+#1: xscmpudp fff0000000000000 <=> c0d0650f5a07b353 ? 8 (CRx) -+#2: xscmpudp fff0000000000000 <=> 8000000000000000 ? 8 (CRx) -+#3: xscmpudp fff0000000000000 <=> 0000000000000000 ? 8 (CRx) -+#4: xscmpudp fff0000000000000 <=> 0123214569900000 ? 8 (CRx) -+#5: xscmpudp fff0000000000000 <=> 7ff0000000000000 ? 8 (CRx) -+#6: xscmpudp fff0000000000000 <=> 7ff7ffffffffffff ? 1 (CRx) -+#7: xscmpudp fff0000000000000 <=> 7ff8000000000000 ? 1 (CRx) -+#8: xscmpudp c0d0650f5a07b353 <=> fff0000000000000 ? 4 (CRx) -+#9: xscmpudp c0d0650f5a07b353 <=> c0d0650f5a07b353 ? 2 (CRx) -+#10: xscmpudp c0d0650f5a07b353 <=> 8000000000000000 ? 8 (CRx) -+#11: xscmpudp c0d0650f5a07b353 <=> 0000000000000000 ? 8 (CRx) -+#12: xscmpudp c0d0650f5a07b353 <=> 0123214569900000 ? 8 (CRx) -+#13: xscmpudp c0d0650f5a07b353 <=> 7ff0000000000000 ? 8 (CRx) -+#14: xscmpudp c0d0650f5a07b353 <=> 7ff7ffffffffffff ? 1 (CRx) -+#15: xscmpudp c0d0650f5a07b353 <=> 7ff8000000000000 ? 1 (CRx) -+#16: xscmpudp 8000000000000000 <=> fff0000000000000 ? 4 (CRx) -+#17: xscmpudp 8000000000000000 <=> c0d0650f5a07b353 ? 4 (CRx) -+#18: xscmpudp 8000000000000000 <=> 8000000000000000 ? 2 (CRx) -+#19: xscmpudp 8000000000000000 <=> 0000000000000000 ? 2 (CRx) -+#20: xscmpudp 8000000000000000 <=> 0123214569900000 ? 8 (CRx) -+#21: xscmpudp 8000000000000000 <=> 7ff0000000000000 ? 8 (CRx) -+#22: xscmpudp 8000000000000000 <=> 7ff7ffffffffffff ? 1 (CRx) -+#23: xscmpudp 8000000000000000 <=> 7ff8000000000000 ? 1 (CRx) -+#24: xscmpudp 0000000000000000 <=> fff0000000000000 ? 4 (CRx) -+#25: xscmpudp 0000000000000000 <=> c0d0650f5a07b353 ? 4 (CRx) -+#26: xscmpudp 0000000000000000 <=> 8000000000000000 ? 2 (CRx) -+#27: xscmpudp 0000000000000000 <=> 0000000000000000 ? 2 (CRx) -+#28: xscmpudp 0000000000000000 <=> 0123214569900000 ? 8 (CRx) -+#29: xscmpudp 0000000000000000 <=> 7ff0000000000000 ? 8 (CRx) -+#30: xscmpudp 0000000000000000 <=> 7ff7ffffffffffff ? 1 (CRx) -+#31: xscmpudp 0000000000000000 <=> 7ff8000000000000 ? 1 (CRx) -+#32: xscmpudp 0123214569900000 <=> fff0000000000000 ? 4 (CRx) -+#33: xscmpudp 0123214569900000 <=> c0d0650f5a07b353 ? 4 (CRx) -+#34: xscmpudp 0123214569900000 <=> 8000000000000000 ? 4 (CRx) -+#35: xscmpudp 0123214569900000 <=> 0000000000000000 ? 4 (CRx) -+#36: xscmpudp 0123214569900000 <=> 404f000000000000 ? 8 (CRx) -+#37: xscmpudp 0123214569900000 <=> 7ff0000000000000 ? 8 (CRx) -+#38: xscmpudp 0123214569900000 <=> 7ff7ffffffffffff ? 1 (CRx) -+#39: xscmpudp 0123214569900000 <=> 7ff8000000000000 ? 1 (CRx) -+#40: xscmpudp 7ff0000000000000 <=> fff0000000000000 ? 4 (CRx) -+#41: xscmpudp 7ff0000000000000 <=> c0d0650f5a07b353 ? 4 (CRx) -+#42: xscmpudp 7ff0000000000000 <=> 8000000000000000 ? 4 (CRx) -+#43: xscmpudp 7ff0000000000000 <=> 0000000000000000 ? 4 (CRx) -+#44: xscmpudp 7ff0000000000000 <=> 0123214569900000 ? 4 (CRx) -+#45: xscmpudp 7ff0000000000000 <=> 7ff0000000000000 ? 2 (CRx) -+#46: xscmpudp 7ff0000000000000 <=> 7ff7ffffffffffff ? 1 (CRx) -+#47: xscmpudp 7ff0000000000000 <=> 7ff8000000000000 ? 1 (CRx) -+#48: xscmpudp fff7ffffffffffff <=> fff0000000000000 ? 1 (CRx) -+#49: xscmpudp fff7ffffffffffff <=> c0d0650f5a07b353 ? 1 (CRx) -+#50: xscmpudp fff7ffffffffffff <=> 8000000000000000 ? 1 (CRx) -+#51: xscmpudp fff7ffffffffffff <=> 0000000000000000 ? 1 (CRx) -+#52: xscmpudp fff7ffffffffffff <=> 0123214569900000 ? 1 (CRx) -+#53: xscmpudp fff7ffffffffffff <=> 7ff0000000000000 ? 1 (CRx) -+#54: xscmpudp fff7ffffffffffff <=> 7ff7ffffffffffff ? 1 (CRx) -+#55: xscmpudp fff7ffffffffffff <=> 7ff8000000000000 ? 1 (CRx) -+#56: xscmpudp fff8000000000000 <=> fff0000000000000 ? 1 (CRx) -+#57: xscmpudp fff8000000000000 <=> c0d0650f5a07b353 ? 1 (CRx) -+#58: xscmpudp fff8000000000000 <=> 8000000000000000 ? 1 (CRx) -+#59: xscmpudp fff8000000000000 <=> 0000000000000000 ? 1 (CRx) -+#60: xscmpudp fff8000000000000 <=> 0123214569900000 ? 1 (CRx) -+#61: xscmpudp fff8000000000000 <=> 7ff0000000000000 ? 1 (CRx) -+#62: xscmpudp fff8000000000000 <=> 7ff7ffffffffffff ? 1 (CRx) -+#63: xscmpudp fff8000000000000 <=> 7ff8000000000000 ? 1 (CRx) -+ -+#0: xscmpodp fff0000000000000 <=> fff0000000000000 ? 2 (CRx) -+#1: xscmpodp fff0000000000000 <=> c0d0650f5a07b353 ? 8 (CRx) -+#2: xscmpodp fff0000000000000 <=> 8000000000000000 ? 8 (CRx) -+#3: xscmpodp fff0000000000000 <=> 0000000000000000 ? 8 (CRx) -+#4: xscmpodp fff0000000000000 <=> 0123214569900000 ? 8 (CRx) -+#5: xscmpodp fff0000000000000 <=> 7ff0000000000000 ? 8 (CRx) -+#6: xscmpodp fff0000000000000 <=> 7ff7ffffffffffff ? 1 (CRx) -+#7: xscmpodp fff0000000000000 <=> 7ff8000000000000 ? 1 (CRx) -+#8: xscmpodp c0d0650f5a07b353 <=> fff0000000000000 ? 4 (CRx) -+#9: xscmpodp c0d0650f5a07b353 <=> c0d0650f5a07b353 ? 2 (CRx) -+#10: xscmpodp c0d0650f5a07b353 <=> 8000000000000000 ? 8 (CRx) -+#11: xscmpodp c0d0650f5a07b353 <=> 0000000000000000 ? 8 (CRx) -+#12: xscmpodp c0d0650f5a07b353 <=> 0123214569900000 ? 8 (CRx) -+#13: xscmpodp c0d0650f5a07b353 <=> 7ff0000000000000 ? 8 (CRx) -+#14: xscmpodp c0d0650f5a07b353 <=> 7ff7ffffffffffff ? 1 (CRx) -+#15: xscmpodp c0d0650f5a07b353 <=> 7ff8000000000000 ? 1 (CRx) -+#16: xscmpodp 8000000000000000 <=> fff0000000000000 ? 4 (CRx) -+#17: xscmpodp 8000000000000000 <=> c0d0650f5a07b353 ? 4 (CRx) -+#18: xscmpodp 8000000000000000 <=> 8000000000000000 ? 2 (CRx) -+#19: xscmpodp 8000000000000000 <=> 0000000000000000 ? 2 (CRx) -+#20: xscmpodp 8000000000000000 <=> 0123214569900000 ? 8 (CRx) -+#21: xscmpodp 8000000000000000 <=> 7ff0000000000000 ? 8 (CRx) -+#22: xscmpodp 8000000000000000 <=> 7ff7ffffffffffff ? 1 (CRx) -+#23: xscmpodp 8000000000000000 <=> 7ff8000000000000 ? 1 (CRx) -+#24: xscmpodp 0000000000000000 <=> fff0000000000000 ? 4 (CRx) -+#25: xscmpodp 0000000000000000 <=> c0d0650f5a07b353 ? 4 (CRx) -+#26: xscmpodp 0000000000000000 <=> 8000000000000000 ? 2 (CRx) -+#27: xscmpodp 0000000000000000 <=> 0000000000000000 ? 2 (CRx) -+#28: xscmpodp 0000000000000000 <=> 0123214569900000 ? 8 (CRx) -+#29: xscmpodp 0000000000000000 <=> 7ff0000000000000 ? 8 (CRx) -+#30: xscmpodp 0000000000000000 <=> 7ff7ffffffffffff ? 1 (CRx) -+#31: xscmpodp 0000000000000000 <=> 7ff8000000000000 ? 1 (CRx) -+#32: xscmpodp 0123214569900000 <=> fff0000000000000 ? 4 (CRx) -+#33: xscmpodp 0123214569900000 <=> c0d0650f5a07b353 ? 4 (CRx) -+#34: xscmpodp 0123214569900000 <=> 8000000000000000 ? 4 (CRx) -+#35: xscmpodp 0123214569900000 <=> 0000000000000000 ? 4 (CRx) -+#36: xscmpodp 0123214569900000 <=> 404f000000000000 ? 8 (CRx) -+#37: xscmpodp 0123214569900000 <=> 7ff0000000000000 ? 8 (CRx) -+#38: xscmpodp 0123214569900000 <=> 7ff7ffffffffffff ? 1 (CRx) -+#39: xscmpodp 0123214569900000 <=> 7ff8000000000000 ? 1 (CRx) -+#40: xscmpodp 7ff0000000000000 <=> fff0000000000000 ? 4 (CRx) -+#41: xscmpodp 7ff0000000000000 <=> c0d0650f5a07b353 ? 4 (CRx) -+#42: xscmpodp 7ff0000000000000 <=> 8000000000000000 ? 4 (CRx) -+#43: xscmpodp 7ff0000000000000 <=> 0000000000000000 ? 4 (CRx) -+#44: xscmpodp 7ff0000000000000 <=> 0123214569900000 ? 4 (CRx) -+#45: xscmpodp 7ff0000000000000 <=> 7ff0000000000000 ? 2 (CRx) -+#46: xscmpodp 7ff0000000000000 <=> 7ff7ffffffffffff ? 1 (CRx) -+#47: xscmpodp 7ff0000000000000 <=> 7ff8000000000000 ? 1 (CRx) -+#48: xscmpodp fff7ffffffffffff <=> fff0000000000000 ? 1 (CRx) -+#49: xscmpodp fff7ffffffffffff <=> c0d0650f5a07b353 ? 1 (CRx) -+#50: xscmpodp fff7ffffffffffff <=> 8000000000000000 ? 1 (CRx) -+#51: xscmpodp fff7ffffffffffff <=> 0000000000000000 ? 1 (CRx) -+#52: xscmpodp fff7ffffffffffff <=> 0123214569900000 ? 1 (CRx) -+#53: xscmpodp fff7ffffffffffff <=> 7ff0000000000000 ? 1 (CRx) -+#54: xscmpodp fff7ffffffffffff <=> 7ff7ffffffffffff ? 1 (CRx) -+#55: xscmpodp fff7ffffffffffff <=> 7ff8000000000000 ? 1 (CRx) -+#56: xscmpodp fff8000000000000 <=> fff0000000000000 ? 1 (CRx) -+#57: xscmpodp fff8000000000000 <=> c0d0650f5a07b353 ? 1 (CRx) -+#58: xscmpodp fff8000000000000 <=> 8000000000000000 ? 1 (CRx) -+#59: xscmpodp fff8000000000000 <=> 0000000000000000 ? 1 (CRx) -+#60: xscmpodp fff8000000000000 <=> 0123214569900000 ? 1 (CRx) -+#61: xscmpodp fff8000000000000 <=> 7ff0000000000000 ? 1 (CRx) -+#62: xscmpodp fff8000000000000 <=> 7ff7ffffffffffff ? 1 (CRx) -+#63: xscmpodp fff8000000000000 <=> 7ff8000000000000 ? 1 (CRx) -+ -+#0: xsadddp fff0000000000000 fff0000000000000 = fff0000000000000 -+#1: xsadddp fff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#2: xsadddp fff0000000000000 8000000000000000 = fff0000000000000 -+#3: xsadddp fff0000000000000 0000000000000000 = fff0000000000000 -+#4: xsadddp fff0000000000000 0123214569900000 = fff0000000000000 -+#5: xsadddp fff0000000000000 7ff0000000000000 = 7ff8000000000000 -+#6: xsadddp fff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#7: xsadddp fff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#8: xsadddp c0d0650f5a07b353 fff0000000000000 = fff0000000000000 -+#9: xsadddp c0d0650f5a07b353 c0d0650f5a07b353 = c0e0650f5a07b353 -+#10: xsadddp c0d0650f5a07b353 8000000000000000 = c0d0650f5a07b353 -+#11: xsadddp c0d0650f5a07b353 0000000000000000 = c0d0650f5a07b353 -+#12: xsadddp c0d0650f5a07b353 0123214569900000 = c0d0650f5a07b353 -+#13: xsadddp c0d0650f5a07b353 7ff0000000000000 = 7ff0000000000000 -+#14: xsadddp c0d0650f5a07b353 7ff7ffffffffffff = 7fffffffffffffff -+#15: xsadddp c0d0650f5a07b353 7ff8000000000000 = 7ff8000000000000 -+#16: xsadddp 8000000000000000 fff0000000000000 = fff0000000000000 -+#17: xsadddp 8000000000000000 c0d0650f5a07b353 = c0d0650f5a07b353 -+#18: xsadddp 8000000000000000 8000000000000000 = 8000000000000000 -+#19: xsadddp 8000000000000000 0000000000000000 = 0000000000000000 -+#20: xsadddp 8000000000000000 0123214569900000 = 0123214569900000 -+#21: xsadddp 8000000000000000 7ff0000000000000 = 7ff0000000000000 -+#22: xsadddp 8000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#23: xsadddp 8000000000000000 7ff8000000000000 = 7ff8000000000000 -+#24: xsadddp 0000000000000000 fff0000000000000 = fff0000000000000 -+#25: xsadddp 0000000000000000 c0d0650f5a07b353 = c0d0650f5a07b353 -+#26: xsadddp 0000000000000000 8000000000000000 = 0000000000000000 -+#27: xsadddp 0000000000000000 0000000000000000 = 0000000000000000 -+#28: xsadddp 0000000000000000 0123214569900000 = 0123214569900000 -+#29: xsadddp 0000000000000000 7ff0000000000000 = 7ff0000000000000 -+#30: xsadddp 0000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#31: xsadddp 0000000000000000 7ff8000000000000 = 7ff8000000000000 -+#32: xsadddp 0123214569900000 fff0000000000000 = fff0000000000000 -+#33: xsadddp 0123214569900000 c0d0650f5a07b353 = c0d0650f5a07b353 -+#34: xsadddp 0123214569900000 8000000000000000 = 0123214569900000 -+#35: xsadddp 0123214569900000 0000000000000000 = 0123214569900000 -+#36: xsadddp 0123214569900000 404f000000000000 = 404f000000000000 -+#37: xsadddp 0123214569900000 7ff0000000000000 = 7ff0000000000000 -+#38: xsadddp 0123214569900000 7ff7ffffffffffff = 7fffffffffffffff -+#39: xsadddp 0123214569900000 7ff8000000000000 = 7ff8000000000000 -+#40: xsadddp 7ff0000000000000 fff0000000000000 = 7ff8000000000000 -+#41: xsadddp 7ff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#42: xsadddp 7ff0000000000000 8000000000000000 = 7ff0000000000000 -+#43: xsadddp 7ff0000000000000 0000000000000000 = 7ff0000000000000 -+#44: xsadddp 7ff0000000000000 0123214569900000 = 7ff0000000000000 -+#45: xsadddp 7ff0000000000000 7ff0000000000000 = 7ff0000000000000 -+#46: xsadddp 7ff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#47: xsadddp 7ff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#48: xsadddp fff7ffffffffffff fff0000000000000 = ffffffffffffffff -+#49: xsadddp fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#50: xsadddp fff7ffffffffffff 8000000000000000 = ffffffffffffffff -+#51: xsadddp fff7ffffffffffff 0000000000000000 = ffffffffffffffff -+#52: xsadddp fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#53: xsadddp fff7ffffffffffff 7ff0000000000000 = ffffffffffffffff -+#54: xsadddp fff7ffffffffffff 7ff7ffffffffffff = ffffffffffffffff -+#55: xsadddp fff7ffffffffffff 7ff8000000000000 = ffffffffffffffff -+#56: xsadddp fff8000000000000 fff0000000000000 = fff8000000000000 -+#57: xsadddp fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#58: xsadddp fff8000000000000 8000000000000000 = fff8000000000000 -+#59: xsadddp fff8000000000000 0000000000000000 = fff8000000000000 -+#60: xsadddp fff8000000000000 0123214569900000 = fff8000000000000 -+#61: xsadddp fff8000000000000 7ff0000000000000 = fff8000000000000 -+#62: xsadddp fff8000000000000 7ff7ffffffffffff = fff8000000000000 -+#63: xsadddp fff8000000000000 7ff8000000000000 = fff8000000000000 -+ -+#0: xsdivdp fff0000000000000 fff0000000000000 = 7ff8000000000000 -+#1: xsdivdp fff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#2: xsdivdp fff0000000000000 8000000000000000 = 7ff0000000000000 -+#3: xsdivdp fff0000000000000 0000000000000000 = fff0000000000000 -+#4: xsdivdp fff0000000000000 0123214569900000 = fff0000000000000 -+#5: xsdivdp fff0000000000000 7ff0000000000000 = 7ff8000000000000 -+#6: xsdivdp fff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#7: xsdivdp fff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#8: xsdivdp c0d0650f5a07b353 fff0000000000000 = 0000000000000000 -+#9: xsdivdp c0d0650f5a07b353 c0d0650f5a07b353 = 3ff0000000000000 -+#10: xsdivdp c0d0650f5a07b353 8000000000000000 = 7ff0000000000000 -+#11: xsdivdp c0d0650f5a07b353 0000000000000000 = fff0000000000000 -+#12: xsdivdp c0d0650f5a07b353 0123214569900000 = ff9b6cb57ca13c00 -+#13: xsdivdp c0d0650f5a07b353 7ff0000000000000 = 8000000000000000 -+#14: xsdivdp c0d0650f5a07b353 7ff7ffffffffffff = 7fffffffffffffff -+#15: xsdivdp c0d0650f5a07b353 7ff8000000000000 = 7ff8000000000000 -+#16: xsdivdp 8000000000000000 fff0000000000000 = 0000000000000000 -+#17: xsdivdp 8000000000000000 c0d0650f5a07b353 = 0000000000000000 -+#18: xsdivdp 8000000000000000 8000000000000000 = 7ff8000000000000 -+#19: xsdivdp 8000000000000000 0000000000000000 = 7ff8000000000000 -+#20: xsdivdp 8000000000000000 0123214569900000 = 8000000000000000 -+#21: xsdivdp 8000000000000000 7ff0000000000000 = 8000000000000000 -+#22: xsdivdp 8000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#23: xsdivdp 8000000000000000 7ff8000000000000 = 7ff8000000000000 -+#24: xsdivdp 0000000000000000 fff0000000000000 = 8000000000000000 -+#25: xsdivdp 0000000000000000 c0d0650f5a07b353 = 8000000000000000 -+#26: xsdivdp 0000000000000000 8000000000000000 = 7ff8000000000000 -+#27: xsdivdp 0000000000000000 0000000000000000 = 7ff8000000000000 -+#28: xsdivdp 0000000000000000 0123214569900000 = 0000000000000000 -+#29: xsdivdp 0000000000000000 7ff0000000000000 = 0000000000000000 -+#30: xsdivdp 0000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#31: xsdivdp 0000000000000000 7ff8000000000000 = 7ff8000000000000 -+#32: xsdivdp 0123214569900000 fff0000000000000 = 8000000000000000 -+#33: xsdivdp 0123214569900000 c0d0650f5a07b353 = 8042ab59d8b6ec87 -+#34: xsdivdp 0123214569900000 8000000000000000 = fff0000000000000 -+#35: xsdivdp 0123214569900000 0000000000000000 = 7ff0000000000000 -+#36: xsdivdp 0123214569900000 404f000000000000 = 00c3bf3f64b5ad6b -+#37: xsdivdp 0123214569900000 7ff0000000000000 = 0000000000000000 -+#38: xsdivdp 0123214569900000 7ff7ffffffffffff = 7fffffffffffffff -+#39: xsdivdp 0123214569900000 7ff8000000000000 = 7ff8000000000000 -+#40: xsdivdp 7ff0000000000000 fff0000000000000 = 7ff8000000000000 -+#41: xsdivdp 7ff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#42: xsdivdp 7ff0000000000000 8000000000000000 = fff0000000000000 -+#43: xsdivdp 7ff0000000000000 0000000000000000 = 7ff0000000000000 -+#44: xsdivdp 7ff0000000000000 0123214569900000 = 7ff0000000000000 -+#45: xsdivdp 7ff0000000000000 7ff0000000000000 = 7ff8000000000000 -+#46: xsdivdp 7ff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#47: xsdivdp 7ff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#48: xsdivdp fff7ffffffffffff fff0000000000000 = ffffffffffffffff -+#49: xsdivdp fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#50: xsdivdp fff7ffffffffffff 8000000000000000 = ffffffffffffffff -+#51: xsdivdp fff7ffffffffffff 0000000000000000 = ffffffffffffffff -+#52: xsdivdp fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#53: xsdivdp fff7ffffffffffff 7ff0000000000000 = ffffffffffffffff -+#54: xsdivdp fff7ffffffffffff 7ff7ffffffffffff = ffffffffffffffff -+#55: xsdivdp fff7ffffffffffff 7ff8000000000000 = ffffffffffffffff -+#56: xsdivdp fff8000000000000 fff0000000000000 = fff8000000000000 -+#57: xsdivdp fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#58: xsdivdp fff8000000000000 8000000000000000 = fff8000000000000 -+#59: xsdivdp fff8000000000000 0000000000000000 = fff8000000000000 -+#60: xsdivdp fff8000000000000 0123214569900000 = fff8000000000000 -+#61: xsdivdp fff8000000000000 7ff0000000000000 = fff8000000000000 -+#62: xsdivdp fff8000000000000 7ff7ffffffffffff = fff8000000000000 -+#63: xsdivdp fff8000000000000 7ff8000000000000 = fff8000000000000 -+ -+#0: xsmaddadp fff0000000000000 fff0000000000000 c0d0650f5a07b353 = 7ff8000000000000 -+#1: xsmaddadp c0d0650f5a07b353 fff0000000000000 0123214569900000 = fff0000000000000 -+#2: xsmaddadp 8000000000000000 fff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#3: xsmaddadp 0000000000000000 fff0000000000000 0123214569900000 = fff0000000000000 -+#4: xsmaddadp 0123214569900000 fff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#5: xsmaddadp 7ff0000000000000 fff0000000000000 0123214569900000 = 7ff8000000000000 -+#6: xsmaddadp 7ff7ffffffffffff fff0000000000000 c0d0650f5a07b353 = 7fffffffffffffff -+#7: xsmaddadp 7ff8000000000000 fff0000000000000 0123214569900000 = 7ff8000000000000 -+#8: xsmaddadp fff0000000000000 c0d0650f5a07b353 c0d0650f5a07b353 = fff0000000000000 -+#9: xsmaddadp c0d0650f5a07b353 c0d0650f5a07b353 0123214569900000 = c0d0650f5a07b353 -+#10: xsmaddadp 8000000000000000 c0d0650f5a07b353 c0d0650f5a07b353 = 41b0cc9d05eec2a7 -+#11: xsmaddadp 0000000000000000 c0d0650f5a07b353 0123214569900000 = 82039a19ca8fcb5f -+#12: xsmaddadp 0123214569900000 c0d0650f5a07b353 c0d0650f5a07b353 = 41b0cc9d05eec2a7 -+#13: xsmaddadp 7ff0000000000000 c0d0650f5a07b353 0123214569900000 = 7ff0000000000000 -+#14: xsmaddadp 7ff7ffffffffffff c0d0650f5a07b353 c0d0650f5a07b353 = 7fffffffffffffff -+#15: xsmaddadp 7ff8000000000000 c0d0650f5a07b353 0123214569900000 = 7ff8000000000000 -+#16: xsmaddadp fff0000000000000 8000000000000000 c0d0650f5a07b353 = fff0000000000000 -+#17: xsmaddadp c0d0650f5a07b353 8000000000000000 0123214569900000 = c0d0650f5a07b353 -+#18: xsmaddadp 8000000000000000 8000000000000000 c0d0650f5a07b353 = 0000000000000000 -+#19: xsmaddadp 0000000000000000 8000000000000000 0123214569900000 = 0000000000000000 -+#20: xsmaddadp 0123214569900000 8000000000000000 c0d0650f5a07b353 = 0123214569900000 -+#21: xsmaddadp 7ff0000000000000 8000000000000000 0123214569900000 = 7ff0000000000000 -+#22: xsmaddadp 7ff7ffffffffffff 8000000000000000 c0d0650f5a07b353 = 7fffffffffffffff -+#23: xsmaddadp 7ff8000000000000 8000000000000000 0123214569900000 = 7ff8000000000000 -+#24: xsmaddadp fff0000000000000 0000000000000000 c0d0650f5a07b353 = fff0000000000000 -+#25: xsmaddadp c0d0650f5a07b353 0000000000000000 0123214569900000 = c0d0650f5a07b353 -+#26: xsmaddadp 8000000000000000 0000000000000000 c0d0650f5a07b353 = 8000000000000000 -+#27: xsmaddadp 0000000000000000 0000000000000000 0123214569900000 = 0000000000000000 -+#28: xsmaddadp 0123214569900000 0000000000000000 c0d0650f5a07b353 = 0123214569900000 -+#29: xsmaddadp 7ff0000000000000 0000000000000000 0123214569900000 = 7ff0000000000000 -+#30: xsmaddadp 7ff7ffffffffffff 0000000000000000 c0d0650f5a07b353 = 7fffffffffffffff -+#31: xsmaddadp 7ff8000000000000 0000000000000000 0123214569900000 = 7ff8000000000000 -+#32: xsmaddadp fff0000000000000 0123214569900000 c0d0650f5a07b353 = fff0000000000000 -+#33: xsmaddadp c0d0650f5a07b353 0123214569900000 0123214569900000 = c0d0650f5a07b353 -+#34: xsmaddadp 8000000000000000 0123214569900000 c0d0650f5a07b353 = 82039a19ca8fcb5f -+#35: xsmaddadp 0000000000000000 0123214569900000 0123214569900000 = 0000000000000000 -+#36: xsmaddadp 404f000000000000 0123214569900000 c0d0650f5a07b353 = 404f000000000000 -+#37: xsmaddadp 7ff0000000000000 0123214569900000 0123214569900000 = 7ff0000000000000 -+#38: xsmaddadp 7ff7ffffffffffff 0123214569900000 c0d0650f5a07b353 = 7fffffffffffffff -+#39: xsmaddadp 7ff8000000000000 0123214569900000 0123214569900000 = 7ff8000000000000 -+#40: xsmaddadp fff0000000000000 7ff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#41: xsmaddadp c0d0650f5a07b353 7ff0000000000000 0123214569900000 = 7ff0000000000000 -+#42: xsmaddadp 8000000000000000 7ff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#43: xsmaddadp 0000000000000000 7ff0000000000000 0123214569900000 = 7ff0000000000000 -+#44: xsmaddadp 0123214569900000 7ff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#45: xsmaddadp 7ff0000000000000 7ff0000000000000 0123214569900000 = 7ff0000000000000 -+#46: xsmaddadp 7ff7ffffffffffff 7ff0000000000000 c0d0650f5a07b353 = 7fffffffffffffff -+#47: xsmaddadp 7ff8000000000000 7ff0000000000000 0123214569900000 = 7ff8000000000000 -+#48: xsmaddadp fff0000000000000 fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#49: xsmaddadp c0d0650f5a07b353 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#50: xsmaddadp 8000000000000000 fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#51: xsmaddadp 0000000000000000 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#52: xsmaddadp 0123214569900000 fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#53: xsmaddadp 7ff0000000000000 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#54: xsmaddadp 7ff7ffffffffffff fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#55: xsmaddadp 7ff8000000000000 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#56: xsmaddadp fff0000000000000 fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#57: xsmaddadp c0d0650f5a07b353 fff8000000000000 0123214569900000 = fff8000000000000 -+#58: xsmaddadp 8000000000000000 fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#59: xsmaddadp 0000000000000000 fff8000000000000 0123214569900000 = fff8000000000000 -+#60: xsmaddadp 0123214569900000 fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#61: xsmaddadp 7ff0000000000000 fff8000000000000 0123214569900000 = fff8000000000000 -+#62: xsmaddadp 7ff7ffffffffffff fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#63: xsmaddadp 7ff8000000000000 fff8000000000000 0123214569900000 = fff8000000000000 -+ -+#0: xsmaddmdp c0d0650f5a07b353 fff0000000000000 fff0000000000000 = 7ff8000000000000 -+#1: xsmaddmdp 0123214569900000 fff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#2: xsmaddmdp c0d0650f5a07b353 fff0000000000000 8000000000000000 = 7ff0000000000000 -+#3: xsmaddmdp 0123214569900000 fff0000000000000 0000000000000000 = fff0000000000000 -+#4: xsmaddmdp c0d0650f5a07b353 fff0000000000000 0123214569900000 = 7ff0000000000000 -+#5: xsmaddmdp 0123214569900000 fff0000000000000 7ff0000000000000 = 7ff8000000000000 -+#6: xsmaddmdp c0d0650f5a07b353 fff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#7: xsmaddmdp 0123214569900000 fff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#8: xsmaddmdp c0d0650f5a07b353 c0d0650f5a07b353 fff0000000000000 = fff0000000000000 -+#9: xsmaddmdp 0123214569900000 c0d0650f5a07b353 c0d0650f5a07b353 = c0d0650f5a07b353 -+#10: xsmaddmdp c0d0650f5a07b353 c0d0650f5a07b353 8000000000000000 = 41b0cc9d05eec2a7 -+#11: xsmaddmdp 0123214569900000 c0d0650f5a07b353 0000000000000000 = 82039a19ca8fcb5f -+#12: xsmaddmdp c0d0650f5a07b353 c0d0650f5a07b353 0123214569900000 = 41b0cc9d05eec2a7 -+#13: xsmaddmdp 0123214569900000 c0d0650f5a07b353 7ff0000000000000 = 7ff0000000000000 -+#14: xsmaddmdp c0d0650f5a07b353 c0d0650f5a07b353 7ff7ffffffffffff = 7fffffffffffffff -+#15: xsmaddmdp 0123214569900000 c0d0650f5a07b353 7ff8000000000000 = 7ff8000000000000 -+#16: xsmaddmdp c0d0650f5a07b353 8000000000000000 fff0000000000000 = fff0000000000000 -+#17: xsmaddmdp 0123214569900000 8000000000000000 c0d0650f5a07b353 = c0d0650f5a07b353 -+#18: xsmaddmdp c0d0650f5a07b353 8000000000000000 8000000000000000 = 0000000000000000 -+#19: xsmaddmdp 0123214569900000 8000000000000000 0000000000000000 = 0000000000000000 -+#20: xsmaddmdp c0d0650f5a07b353 8000000000000000 0123214569900000 = 0123214569900000 -+#21: xsmaddmdp 0123214569900000 8000000000000000 7ff0000000000000 = 7ff0000000000000 -+#22: xsmaddmdp c0d0650f5a07b353 8000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#23: xsmaddmdp 0123214569900000 8000000000000000 7ff8000000000000 = 7ff8000000000000 -+#24: xsmaddmdp c0d0650f5a07b353 0000000000000000 fff0000000000000 = fff0000000000000 -+#25: xsmaddmdp 0123214569900000 0000000000000000 c0d0650f5a07b353 = c0d0650f5a07b353 -+#26: xsmaddmdp c0d0650f5a07b353 0000000000000000 8000000000000000 = 8000000000000000 -+#27: xsmaddmdp 0123214569900000 0000000000000000 0000000000000000 = 0000000000000000 -+#28: xsmaddmdp c0d0650f5a07b353 0000000000000000 0123214569900000 = 0123214569900000 -+#29: xsmaddmdp 0123214569900000 0000000000000000 7ff0000000000000 = 7ff0000000000000 -+#30: xsmaddmdp c0d0650f5a07b353 0000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#31: xsmaddmdp 0123214569900000 0000000000000000 7ff8000000000000 = 7ff8000000000000 -+#32: xsmaddmdp c0d0650f5a07b353 0123214569900000 fff0000000000000 = fff0000000000000 -+#33: xsmaddmdp 0123214569900000 0123214569900000 c0d0650f5a07b353 = c0d0650f5a07b353 -+#34: xsmaddmdp c0d0650f5a07b353 0123214569900000 8000000000000000 = 82039a19ca8fcb5f -+#35: xsmaddmdp 0123214569900000 0123214569900000 0000000000000000 = 0000000000000000 -+#36: xsmaddmdp c0d0650f5a07b353 0123214569900000 404f000000000000 = 404f000000000000 -+#37: xsmaddmdp 0123214569900000 0123214569900000 7ff0000000000000 = 7ff0000000000000 -+#38: xsmaddmdp c0d0650f5a07b353 0123214569900000 7ff7ffffffffffff = 7fffffffffffffff -+#39: xsmaddmdp 0123214569900000 0123214569900000 7ff8000000000000 = 7ff8000000000000 -+#40: xsmaddmdp c0d0650f5a07b353 7ff0000000000000 fff0000000000000 = fff0000000000000 -+#41: xsmaddmdp 0123214569900000 7ff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#42: xsmaddmdp c0d0650f5a07b353 7ff0000000000000 8000000000000000 = fff0000000000000 -+#43: xsmaddmdp 0123214569900000 7ff0000000000000 0000000000000000 = 7ff0000000000000 -+#44: xsmaddmdp c0d0650f5a07b353 7ff0000000000000 0123214569900000 = fff0000000000000 -+#45: xsmaddmdp 0123214569900000 7ff0000000000000 7ff0000000000000 = 7ff0000000000000 -+#46: xsmaddmdp c0d0650f5a07b353 7ff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#47: xsmaddmdp 0123214569900000 7ff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#48: xsmaddmdp c0d0650f5a07b353 fff7ffffffffffff fff0000000000000 = ffffffffffffffff -+#49: xsmaddmdp 0123214569900000 fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#50: xsmaddmdp c0d0650f5a07b353 fff7ffffffffffff 8000000000000000 = ffffffffffffffff -+#51: xsmaddmdp 0123214569900000 fff7ffffffffffff 0000000000000000 = ffffffffffffffff -+#52: xsmaddmdp c0d0650f5a07b353 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#53: xsmaddmdp 0123214569900000 fff7ffffffffffff 7ff0000000000000 = ffffffffffffffff -+#54: xsmaddmdp c0d0650f5a07b353 fff7ffffffffffff 7ff7ffffffffffff = ffffffffffffffff -+#55: xsmaddmdp 0123214569900000 fff7ffffffffffff 7ff8000000000000 = ffffffffffffffff -+#56: xsmaddmdp c0d0650f5a07b353 fff8000000000000 fff0000000000000 = fff8000000000000 -+#57: xsmaddmdp 0123214569900000 fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#58: xsmaddmdp c0d0650f5a07b353 fff8000000000000 8000000000000000 = fff8000000000000 -+#59: xsmaddmdp 0123214569900000 fff8000000000000 0000000000000000 = fff8000000000000 -+#60: xsmaddmdp c0d0650f5a07b353 fff8000000000000 0123214569900000 = fff8000000000000 -+#61: xsmaddmdp 0123214569900000 fff8000000000000 7ff0000000000000 = fff8000000000000 -+#62: xsmaddmdp c0d0650f5a07b353 fff8000000000000 7ff7ffffffffffff = fff8000000000000 -+#63: xsmaddmdp 0123214569900000 fff8000000000000 7ff8000000000000 = fff8000000000000 -+ -+#0: xsmsubadp fff0000000000000 fff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#1: xsmsubadp c0d0650f5a07b353 fff0000000000000 0123214569900000 = fff0000000000000 -+#2: xsmsubadp 8000000000000000 fff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#3: xsmsubadp 0000000000000000 fff0000000000000 0123214569900000 = fff0000000000000 -+#4: xsmsubadp 0123214569900000 fff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#5: xsmsubadp 7ff0000000000000 fff0000000000000 0123214569900000 = fff0000000000000 -+#6: xsmsubadp 7ff7ffffffffffff fff0000000000000 c0d0650f5a07b353 = 7fffffffffffffff -+#7: xsmsubadp 7ff8000000000000 fff0000000000000 0123214569900000 = 7ff8000000000000 -+#8: xsmsubadp fff0000000000000 c0d0650f5a07b353 c0d0650f5a07b353 = 7ff0000000000000 -+#9: xsmsubadp c0d0650f5a07b353 c0d0650f5a07b353 0123214569900000 = 40d0650f5a07b353 -+#10: xsmsubadp 8000000000000000 c0d0650f5a07b353 c0d0650f5a07b353 = 41b0cc9d05eec2a7 -+#11: xsmsubadp 0000000000000000 c0d0650f5a07b353 0123214569900000 = 82039a19ca8fcb5f -+#12: xsmsubadp 0123214569900000 c0d0650f5a07b353 c0d0650f5a07b353 = 41b0cc9d05eec2a7 -+#13: xsmsubadp 7ff0000000000000 c0d0650f5a07b353 0123214569900000 = fff0000000000000 -+#14: xsmsubadp 7ff7ffffffffffff c0d0650f5a07b353 c0d0650f5a07b353 = 7fffffffffffffff -+#15: xsmsubadp 7ff8000000000000 c0d0650f5a07b353 0123214569900000 = 7ff8000000000000 -+#16: xsmsubadp fff0000000000000 8000000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#17: xsmsubadp c0d0650f5a07b353 8000000000000000 0123214569900000 = 40d0650f5a07b353 -+#18: xsmsubadp 8000000000000000 8000000000000000 c0d0650f5a07b353 = 0000000000000000 -+#19: xsmsubadp 0000000000000000 8000000000000000 0123214569900000 = 8000000000000000 -+#20: xsmsubadp 0123214569900000 8000000000000000 c0d0650f5a07b353 = 8123214569900000 -+#21: xsmsubadp 7ff0000000000000 8000000000000000 0123214569900000 = fff0000000000000 -+#22: xsmsubadp 7ff7ffffffffffff 8000000000000000 c0d0650f5a07b353 = 7fffffffffffffff -+#23: xsmsubadp 7ff8000000000000 8000000000000000 0123214569900000 = 7ff8000000000000 -+#24: xsmsubadp fff0000000000000 0000000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#25: xsmsubadp c0d0650f5a07b353 0000000000000000 0123214569900000 = 40d0650f5a07b353 -+#26: xsmsubadp 8000000000000000 0000000000000000 c0d0650f5a07b353 = 0000000000000000 -+#27: xsmsubadp 0000000000000000 0000000000000000 0123214569900000 = 0000000000000000 -+#28: xsmsubadp 0123214569900000 0000000000000000 c0d0650f5a07b353 = 8123214569900000 -+#29: xsmsubadp 7ff0000000000000 0000000000000000 0123214569900000 = fff0000000000000 -+#30: xsmsubadp 7ff7ffffffffffff 0000000000000000 c0d0650f5a07b353 = 7fffffffffffffff -+#31: xsmsubadp 7ff8000000000000 0000000000000000 0123214569900000 = 7ff8000000000000 -+#32: xsmsubadp fff0000000000000 0123214569900000 c0d0650f5a07b353 = 7ff0000000000000 -+#33: xsmsubadp c0d0650f5a07b353 0123214569900000 0123214569900000 = 40d0650f5a07b353 -+#34: xsmsubadp 8000000000000000 0123214569900000 c0d0650f5a07b353 = 82039a19ca8fcb5f -+#35: xsmsubadp 0000000000000000 0123214569900000 0123214569900000 = 0000000000000000 -+#36: xsmsubadp 404f000000000000 0123214569900000 c0d0650f5a07b353 = c04f000000000000 -+#37: xsmsubadp 7ff0000000000000 0123214569900000 0123214569900000 = fff0000000000000 -+#38: xsmsubadp 7ff7ffffffffffff 0123214569900000 c0d0650f5a07b353 = 7fffffffffffffff -+#39: xsmsubadp 7ff8000000000000 0123214569900000 0123214569900000 = 7ff8000000000000 -+#40: xsmsubadp fff0000000000000 7ff0000000000000 c0d0650f5a07b353 = 7ff8000000000000 -+#41: xsmsubadp c0d0650f5a07b353 7ff0000000000000 0123214569900000 = 7ff0000000000000 -+#42: xsmsubadp 8000000000000000 7ff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#43: xsmsubadp 0000000000000000 7ff0000000000000 0123214569900000 = 7ff0000000000000 -+#44: xsmsubadp 0123214569900000 7ff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#45: xsmsubadp 7ff0000000000000 7ff0000000000000 0123214569900000 = 7ff8000000000000 -+#46: xsmsubadp 7ff7ffffffffffff 7ff0000000000000 c0d0650f5a07b353 = 7fffffffffffffff -+#47: xsmsubadp 7ff8000000000000 7ff0000000000000 0123214569900000 = 7ff8000000000000 -+#48: xsmsubadp fff0000000000000 fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#49: xsmsubadp c0d0650f5a07b353 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#50: xsmsubadp 8000000000000000 fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#51: xsmsubadp 0000000000000000 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#52: xsmsubadp 0123214569900000 fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#53: xsmsubadp 7ff0000000000000 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#54: xsmsubadp 7ff7ffffffffffff fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#55: xsmsubadp 7ff8000000000000 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#56: xsmsubadp fff0000000000000 fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#57: xsmsubadp c0d0650f5a07b353 fff8000000000000 0123214569900000 = fff8000000000000 -+#58: xsmsubadp 8000000000000000 fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#59: xsmsubadp 0000000000000000 fff8000000000000 0123214569900000 = fff8000000000000 -+#60: xsmsubadp 0123214569900000 fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#61: xsmsubadp 7ff0000000000000 fff8000000000000 0123214569900000 = fff8000000000000 -+#62: xsmsubadp 7ff7ffffffffffff fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#63: xsmsubadp 7ff8000000000000 fff8000000000000 0123214569900000 = fff8000000000000 -+ -+#0: xsmsubmdp c0d0650f5a07b353 fff0000000000000 fff0000000000000 = 7ff0000000000000 -+#1: xsmsubmdp 0123214569900000 fff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#2: xsmsubmdp c0d0650f5a07b353 fff0000000000000 8000000000000000 = 7ff0000000000000 -+#3: xsmsubmdp 0123214569900000 fff0000000000000 0000000000000000 = fff0000000000000 -+#4: xsmsubmdp c0d0650f5a07b353 fff0000000000000 0123214569900000 = 7ff0000000000000 -+#5: xsmsubmdp 0123214569900000 fff0000000000000 7ff0000000000000 = fff0000000000000 -+#6: xsmsubmdp c0d0650f5a07b353 fff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#7: xsmsubmdp 0123214569900000 fff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#8: xsmsubmdp c0d0650f5a07b353 c0d0650f5a07b353 fff0000000000000 = 7ff0000000000000 -+#9: xsmsubmdp 0123214569900000 c0d0650f5a07b353 c0d0650f5a07b353 = 40d0650f5a07b353 -+#10: xsmsubmdp c0d0650f5a07b353 c0d0650f5a07b353 8000000000000000 = 41b0cc9d05eec2a7 -+#11: xsmsubmdp 0123214569900000 c0d0650f5a07b353 0000000000000000 = 82039a19ca8fcb5f -+#12: xsmsubmdp c0d0650f5a07b353 c0d0650f5a07b353 0123214569900000 = 41b0cc9d05eec2a7 -+#13: xsmsubmdp 0123214569900000 c0d0650f5a07b353 7ff0000000000000 = fff0000000000000 -+#14: xsmsubmdp c0d0650f5a07b353 c0d0650f5a07b353 7ff7ffffffffffff = 7fffffffffffffff -+#15: xsmsubmdp 0123214569900000 c0d0650f5a07b353 7ff8000000000000 = 7ff8000000000000 -+#16: xsmsubmdp c0d0650f5a07b353 8000000000000000 fff0000000000000 = 7ff0000000000000 -+#17: xsmsubmdp 0123214569900000 8000000000000000 c0d0650f5a07b353 = 40d0650f5a07b353 -+#18: xsmsubmdp c0d0650f5a07b353 8000000000000000 8000000000000000 = 0000000000000000 -+#19: xsmsubmdp 0123214569900000 8000000000000000 0000000000000000 = 8000000000000000 -+#20: xsmsubmdp c0d0650f5a07b353 8000000000000000 0123214569900000 = 8123214569900000 -+#21: xsmsubmdp 0123214569900000 8000000000000000 7ff0000000000000 = fff0000000000000 -+#22: xsmsubmdp c0d0650f5a07b353 8000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#23: xsmsubmdp 0123214569900000 8000000000000000 7ff8000000000000 = 7ff8000000000000 -+#24: xsmsubmdp c0d0650f5a07b353 0000000000000000 fff0000000000000 = 7ff0000000000000 -+#25: xsmsubmdp 0123214569900000 0000000000000000 c0d0650f5a07b353 = 40d0650f5a07b353 -+#26: xsmsubmdp c0d0650f5a07b353 0000000000000000 8000000000000000 = 0000000000000000 -+#27: xsmsubmdp 0123214569900000 0000000000000000 0000000000000000 = 0000000000000000 -+#28: xsmsubmdp c0d0650f5a07b353 0000000000000000 0123214569900000 = 8123214569900000 -+#29: xsmsubmdp 0123214569900000 0000000000000000 7ff0000000000000 = fff0000000000000 -+#30: xsmsubmdp c0d0650f5a07b353 0000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#31: xsmsubmdp 0123214569900000 0000000000000000 7ff8000000000000 = 7ff8000000000000 -+#32: xsmsubmdp c0d0650f5a07b353 0123214569900000 fff0000000000000 = 7ff0000000000000 -+#33: xsmsubmdp 0123214569900000 0123214569900000 c0d0650f5a07b353 = 40d0650f5a07b353 -+#34: xsmsubmdp c0d0650f5a07b353 0123214569900000 8000000000000000 = 82039a19ca8fcb5f -+#35: xsmsubmdp 0123214569900000 0123214569900000 0000000000000000 = 0000000000000000 -+#36: xsmsubmdp c0d0650f5a07b353 0123214569900000 404f000000000000 = c04f000000000000 -+#37: xsmsubmdp 0123214569900000 0123214569900000 7ff0000000000000 = fff0000000000000 -+#38: xsmsubmdp c0d0650f5a07b353 0123214569900000 7ff7ffffffffffff = 7fffffffffffffff -+#39: xsmsubmdp 0123214569900000 0123214569900000 7ff8000000000000 = 7ff8000000000000 -+#40: xsmsubmdp c0d0650f5a07b353 7ff0000000000000 fff0000000000000 = 7ff8000000000000 -+#41: xsmsubmdp 0123214569900000 7ff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#42: xsmsubmdp c0d0650f5a07b353 7ff0000000000000 8000000000000000 = fff0000000000000 -+#43: xsmsubmdp 0123214569900000 7ff0000000000000 0000000000000000 = 7ff0000000000000 -+#44: xsmsubmdp c0d0650f5a07b353 7ff0000000000000 0123214569900000 = fff0000000000000 -+#45: xsmsubmdp 0123214569900000 7ff0000000000000 7ff0000000000000 = 7ff8000000000000 -+#46: xsmsubmdp c0d0650f5a07b353 7ff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#47: xsmsubmdp 0123214569900000 7ff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#48: xsmsubmdp c0d0650f5a07b353 fff7ffffffffffff fff0000000000000 = ffffffffffffffff -+#49: xsmsubmdp 0123214569900000 fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#50: xsmsubmdp c0d0650f5a07b353 fff7ffffffffffff 8000000000000000 = ffffffffffffffff -+#51: xsmsubmdp 0123214569900000 fff7ffffffffffff 0000000000000000 = ffffffffffffffff -+#52: xsmsubmdp c0d0650f5a07b353 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#53: xsmsubmdp 0123214569900000 fff7ffffffffffff 7ff0000000000000 = ffffffffffffffff -+#54: xsmsubmdp c0d0650f5a07b353 fff7ffffffffffff 7ff7ffffffffffff = ffffffffffffffff -+#55: xsmsubmdp 0123214569900000 fff7ffffffffffff 7ff8000000000000 = ffffffffffffffff -+#56: xsmsubmdp c0d0650f5a07b353 fff8000000000000 fff0000000000000 = fff8000000000000 -+#57: xsmsubmdp 0123214569900000 fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#58: xsmsubmdp c0d0650f5a07b353 fff8000000000000 8000000000000000 = fff8000000000000 -+#59: xsmsubmdp 0123214569900000 fff8000000000000 0000000000000000 = fff8000000000000 -+#60: xsmsubmdp c0d0650f5a07b353 fff8000000000000 0123214569900000 = fff8000000000000 -+#61: xsmsubmdp 0123214569900000 fff8000000000000 7ff0000000000000 = fff8000000000000 -+#62: xsmsubmdp c0d0650f5a07b353 fff8000000000000 7ff7ffffffffffff = fff8000000000000 -+#63: xsmsubmdp 0123214569900000 fff8000000000000 7ff8000000000000 = fff8000000000000 -+ -+#0: xsnmaddadp fff0000000000000 fff0000000000000 c0d0650f5a07b353 = 7ff8000000000000 -+#1: xsnmaddadp c0d0650f5a07b353 fff0000000000000 0123214569900000 = 7ff0000000000000 -+#2: xsnmaddadp 8000000000000000 fff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#3: xsnmaddadp 0000000000000000 fff0000000000000 0123214569900000 = 7ff0000000000000 -+#4: xsnmaddadp 0123214569900000 fff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#5: xsnmaddadp 7ff0000000000000 fff0000000000000 0123214569900000 = 7ff8000000000000 -+#6: xsnmaddadp 7ff7ffffffffffff fff0000000000000 c0d0650f5a07b353 = 7fffffffffffffff -+#7: xsnmaddadp 7ff8000000000000 fff0000000000000 0123214569900000 = 7ff8000000000000 -+#8: xsnmaddadp fff0000000000000 c0d0650f5a07b353 c0d0650f5a07b353 = 7ff0000000000000 -+#9: xsnmaddadp c0d0650f5a07b353 c0d0650f5a07b353 0123214569900000 = 40d0650f5a07b353 -+#10: xsnmaddadp 8000000000000000 c0d0650f5a07b353 c0d0650f5a07b353 = c1b0cc9d05eec2a7 -+#11: xsnmaddadp 0000000000000000 c0d0650f5a07b353 0123214569900000 = 02039a19ca8fcb5f -+#12: xsnmaddadp 0123214569900000 c0d0650f5a07b353 c0d0650f5a07b353 = c1b0cc9d05eec2a7 -+#13: xsnmaddadp 7ff0000000000000 c0d0650f5a07b353 0123214569900000 = fff0000000000000 -+#14: xsnmaddadp 7ff7ffffffffffff c0d0650f5a07b353 c0d0650f5a07b353 = 7fffffffffffffff -+#15: xsnmaddadp 7ff8000000000000 c0d0650f5a07b353 0123214569900000 = 7ff8000000000000 -+#16: xsnmaddadp fff0000000000000 8000000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#17: xsnmaddadp c0d0650f5a07b353 8000000000000000 0123214569900000 = 40d0650f5a07b353 -+#18: xsnmaddadp 8000000000000000 8000000000000000 c0d0650f5a07b353 = 8000000000000000 -+#19: xsnmaddadp 0000000000000000 8000000000000000 0123214569900000 = 8000000000000000 -+#20: xsnmaddadp 0123214569900000 8000000000000000 c0d0650f5a07b353 = 8123214569900000 -+#21: xsnmaddadp 7ff0000000000000 8000000000000000 0123214569900000 = fff0000000000000 -+#22: xsnmaddadp 7ff7ffffffffffff 8000000000000000 c0d0650f5a07b353 = 7fffffffffffffff -+#23: xsnmaddadp 7ff8000000000000 8000000000000000 0123214569900000 = 7ff8000000000000 -+#24: xsnmaddadp fff0000000000000 0000000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#25: xsnmaddadp c0d0650f5a07b353 0000000000000000 0123214569900000 = 40d0650f5a07b353 -+#26: xsnmaddadp 8000000000000000 0000000000000000 c0d0650f5a07b353 = 0000000000000000 -+#27: xsnmaddadp 0000000000000000 0000000000000000 0123214569900000 = 8000000000000000 -+#28: xsnmaddadp 0123214569900000 0000000000000000 c0d0650f5a07b353 = 8123214569900000 -+#29: xsnmaddadp 7ff0000000000000 0000000000000000 0123214569900000 = fff0000000000000 -+#30: xsnmaddadp 7ff7ffffffffffff 0000000000000000 c0d0650f5a07b353 = 7fffffffffffffff -+#31: xsnmaddadp 7ff8000000000000 0000000000000000 0123214569900000 = 7ff8000000000000 -+#32: xsnmaddadp fff0000000000000 0123214569900000 c0d0650f5a07b353 = 7ff0000000000000 -+#33: xsnmaddadp c0d0650f5a07b353 0123214569900000 0123214569900000 = 40d0650f5a07b353 -+#34: xsnmaddadp 8000000000000000 0123214569900000 c0d0650f5a07b353 = 02039a19ca8fcb5f -+#35: xsnmaddadp 0000000000000000 0123214569900000 0123214569900000 = 8000000000000000 -+#36: xsnmaddadp 404f000000000000 0123214569900000 c0d0650f5a07b353 = c04f000000000000 -+#37: xsnmaddadp 7ff0000000000000 0123214569900000 0123214569900000 = fff0000000000000 -+#38: xsnmaddadp 7ff7ffffffffffff 0123214569900000 c0d0650f5a07b353 = 7fffffffffffffff -+#39: xsnmaddadp 7ff8000000000000 0123214569900000 0123214569900000 = 7ff8000000000000 -+#40: xsnmaddadp fff0000000000000 7ff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#41: xsnmaddadp c0d0650f5a07b353 7ff0000000000000 0123214569900000 = fff0000000000000 -+#42: xsnmaddadp 8000000000000000 7ff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#43: xsnmaddadp 0000000000000000 7ff0000000000000 0123214569900000 = fff0000000000000 -+#44: xsnmaddadp 0123214569900000 7ff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#45: xsnmaddadp 7ff0000000000000 7ff0000000000000 0123214569900000 = fff0000000000000 -+#46: xsnmaddadp 7ff7ffffffffffff 7ff0000000000000 c0d0650f5a07b353 = 7fffffffffffffff -+#47: xsnmaddadp 7ff8000000000000 7ff0000000000000 0123214569900000 = 7ff8000000000000 -+#48: xsnmaddadp fff0000000000000 fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#49: xsnmaddadp c0d0650f5a07b353 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#50: xsnmaddadp 8000000000000000 fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#51: xsnmaddadp 0000000000000000 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#52: xsnmaddadp 0123214569900000 fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#53: xsnmaddadp 7ff0000000000000 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#54: xsnmaddadp 7ff7ffffffffffff fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#55: xsnmaddadp 7ff8000000000000 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#56: xsnmaddadp fff0000000000000 fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#57: xsnmaddadp c0d0650f5a07b353 fff8000000000000 0123214569900000 = fff8000000000000 -+#58: xsnmaddadp 8000000000000000 fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#59: xsnmaddadp 0000000000000000 fff8000000000000 0123214569900000 = fff8000000000000 -+#60: xsnmaddadp 0123214569900000 fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#61: xsnmaddadp 7ff0000000000000 fff8000000000000 0123214569900000 = fff8000000000000 -+#62: xsnmaddadp 7ff7ffffffffffff fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#63: xsnmaddadp 7ff8000000000000 fff8000000000000 0123214569900000 = fff8000000000000 -+ -+#0: xsnmaddmdp c0d0650f5a07b353 fff0000000000000 fff0000000000000 = 7ff8000000000000 -+#1: xsnmaddmdp 0123214569900000 fff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#2: xsnmaddmdp c0d0650f5a07b353 fff0000000000000 8000000000000000 = fff0000000000000 -+#3: xsnmaddmdp 0123214569900000 fff0000000000000 0000000000000000 = 7ff0000000000000 -+#4: xsnmaddmdp c0d0650f5a07b353 fff0000000000000 0123214569900000 = fff0000000000000 -+#5: xsnmaddmdp 0123214569900000 fff0000000000000 7ff0000000000000 = 7ff8000000000000 -+#6: xsnmaddmdp c0d0650f5a07b353 fff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#7: xsnmaddmdp 0123214569900000 fff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#8: xsnmaddmdp c0d0650f5a07b353 c0d0650f5a07b353 fff0000000000000 = 7ff0000000000000 -+#9: xsnmaddmdp 0123214569900000 c0d0650f5a07b353 c0d0650f5a07b353 = 40d0650f5a07b353 -+#10: xsnmaddmdp c0d0650f5a07b353 c0d0650f5a07b353 8000000000000000 = c1b0cc9d05eec2a7 -+#11: xsnmaddmdp 0123214569900000 c0d0650f5a07b353 0000000000000000 = 02039a19ca8fcb5f -+#12: xsnmaddmdp c0d0650f5a07b353 c0d0650f5a07b353 0123214569900000 = c1b0cc9d05eec2a7 -+#13: xsnmaddmdp 0123214569900000 c0d0650f5a07b353 7ff0000000000000 = fff0000000000000 -+#14: xsnmaddmdp c0d0650f5a07b353 c0d0650f5a07b353 7ff7ffffffffffff = 7fffffffffffffff -+#15: xsnmaddmdp 0123214569900000 c0d0650f5a07b353 7ff8000000000000 = 7ff8000000000000 -+#16: xsnmaddmdp c0d0650f5a07b353 8000000000000000 fff0000000000000 = 7ff0000000000000 -+#17: xsnmaddmdp 0123214569900000 8000000000000000 c0d0650f5a07b353 = 40d0650f5a07b353 -+#18: xsnmaddmdp c0d0650f5a07b353 8000000000000000 8000000000000000 = 8000000000000000 -+#19: xsnmaddmdp 0123214569900000 8000000000000000 0000000000000000 = 8000000000000000 -+#20: xsnmaddmdp c0d0650f5a07b353 8000000000000000 0123214569900000 = 8123214569900000 -+#21: xsnmaddmdp 0123214569900000 8000000000000000 7ff0000000000000 = fff0000000000000 -+#22: xsnmaddmdp c0d0650f5a07b353 8000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#23: xsnmaddmdp 0123214569900000 8000000000000000 7ff8000000000000 = 7ff8000000000000 -+#24: xsnmaddmdp c0d0650f5a07b353 0000000000000000 fff0000000000000 = 7ff0000000000000 -+#25: xsnmaddmdp 0123214569900000 0000000000000000 c0d0650f5a07b353 = 40d0650f5a07b353 -+#26: xsnmaddmdp c0d0650f5a07b353 0000000000000000 8000000000000000 = 0000000000000000 -+#27: xsnmaddmdp 0123214569900000 0000000000000000 0000000000000000 = 8000000000000000 -+#28: xsnmaddmdp c0d0650f5a07b353 0000000000000000 0123214569900000 = 8123214569900000 -+#29: xsnmaddmdp 0123214569900000 0000000000000000 7ff0000000000000 = fff0000000000000 -+#30: xsnmaddmdp c0d0650f5a07b353 0000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#31: xsnmaddmdp 0123214569900000 0000000000000000 7ff8000000000000 = 7ff8000000000000 -+#32: xsnmaddmdp c0d0650f5a07b353 0123214569900000 fff0000000000000 = 7ff0000000000000 -+#33: xsnmaddmdp 0123214569900000 0123214569900000 c0d0650f5a07b353 = 40d0650f5a07b353 -+#34: xsnmaddmdp c0d0650f5a07b353 0123214569900000 8000000000000000 = 02039a19ca8fcb5f -+#35: xsnmaddmdp 0123214569900000 0123214569900000 0000000000000000 = 8000000000000000 -+#36: xsnmaddmdp c0d0650f5a07b353 0123214569900000 404f000000000000 = c04f000000000000 -+#37: xsnmaddmdp 0123214569900000 0123214569900000 7ff0000000000000 = fff0000000000000 -+#38: xsnmaddmdp c0d0650f5a07b353 0123214569900000 7ff7ffffffffffff = 7fffffffffffffff -+#39: xsnmaddmdp 0123214569900000 0123214569900000 7ff8000000000000 = 7ff8000000000000 -+#40: xsnmaddmdp c0d0650f5a07b353 7ff0000000000000 fff0000000000000 = 7ff0000000000000 -+#41: xsnmaddmdp 0123214569900000 7ff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#42: xsnmaddmdp c0d0650f5a07b353 7ff0000000000000 8000000000000000 = 7ff0000000000000 -+#43: xsnmaddmdp 0123214569900000 7ff0000000000000 0000000000000000 = fff0000000000000 -+#44: xsnmaddmdp c0d0650f5a07b353 7ff0000000000000 0123214569900000 = 7ff0000000000000 -+#45: xsnmaddmdp 0123214569900000 7ff0000000000000 7ff0000000000000 = fff0000000000000 -+#46: xsnmaddmdp c0d0650f5a07b353 7ff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#47: xsnmaddmdp 0123214569900000 7ff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#48: xsnmaddmdp c0d0650f5a07b353 fff7ffffffffffff fff0000000000000 = ffffffffffffffff -+#49: xsnmaddmdp 0123214569900000 fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#50: xsnmaddmdp c0d0650f5a07b353 fff7ffffffffffff 8000000000000000 = ffffffffffffffff -+#51: xsnmaddmdp 0123214569900000 fff7ffffffffffff 0000000000000000 = ffffffffffffffff -+#52: xsnmaddmdp c0d0650f5a07b353 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#53: xsnmaddmdp 0123214569900000 fff7ffffffffffff 7ff0000000000000 = ffffffffffffffff -+#54: xsnmaddmdp c0d0650f5a07b353 fff7ffffffffffff 7ff7ffffffffffff = ffffffffffffffff -+#55: xsnmaddmdp 0123214569900000 fff7ffffffffffff 7ff8000000000000 = ffffffffffffffff -+#56: xsnmaddmdp c0d0650f5a07b353 fff8000000000000 fff0000000000000 = fff8000000000000 -+#57: xsnmaddmdp 0123214569900000 fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#58: xsnmaddmdp c0d0650f5a07b353 fff8000000000000 8000000000000000 = fff8000000000000 -+#59: xsnmaddmdp 0123214569900000 fff8000000000000 0000000000000000 = fff8000000000000 -+#60: xsnmaddmdp c0d0650f5a07b353 fff8000000000000 0123214569900000 = fff8000000000000 -+#61: xsnmaddmdp 0123214569900000 fff8000000000000 7ff0000000000000 = fff8000000000000 -+#62: xsnmaddmdp c0d0650f5a07b353 fff8000000000000 7ff7ffffffffffff = fff8000000000000 -+#63: xsnmaddmdp 0123214569900000 fff8000000000000 7ff8000000000000 = fff8000000000000 -+ -+#0: xsmuldp fff0000000000000 fff0000000000000 = 7ff0000000000000 -+#1: xsmuldp fff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#2: xsmuldp fff0000000000000 8000000000000000 = 7ff8000000000000 -+#3: xsmuldp fff0000000000000 0000000000000000 = 7ff8000000000000 -+#4: xsmuldp fff0000000000000 0123214569900000 = fff0000000000000 -+#5: xsmuldp fff0000000000000 7ff0000000000000 = fff0000000000000 -+#6: xsmuldp fff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#7: xsmuldp fff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#8: xsmuldp c0d0650f5a07b353 fff0000000000000 = 7ff0000000000000 -+#9: xsmuldp c0d0650f5a07b353 c0d0650f5a07b353 = 41b0cc9d05eec2a7 -+#10: xsmuldp c0d0650f5a07b353 8000000000000000 = 0000000000000000 -+#11: xsmuldp c0d0650f5a07b353 0000000000000000 = 8000000000000000 -+#12: xsmuldp c0d0650f5a07b353 0123214569900000 = 82039a19ca8fcb5f -+#13: xsmuldp c0d0650f5a07b353 7ff0000000000000 = fff0000000000000 -+#14: xsmuldp c0d0650f5a07b353 7ff7ffffffffffff = 7fffffffffffffff -+#15: xsmuldp c0d0650f5a07b353 7ff8000000000000 = 7ff8000000000000 -+#16: xsmuldp 8000000000000000 fff0000000000000 = 7ff8000000000000 -+#17: xsmuldp 8000000000000000 c0d0650f5a07b353 = 0000000000000000 -+#18: xsmuldp 8000000000000000 8000000000000000 = 0000000000000000 -+#19: xsmuldp 8000000000000000 0000000000000000 = 8000000000000000 -+#20: xsmuldp 8000000000000000 0123214569900000 = 8000000000000000 -+#21: xsmuldp 8000000000000000 7ff0000000000000 = 7ff8000000000000 -+#22: xsmuldp 8000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#23: xsmuldp 8000000000000000 7ff8000000000000 = 7ff8000000000000 -+#24: xsmuldp 0000000000000000 fff0000000000000 = 7ff8000000000000 -+#25: xsmuldp 0000000000000000 c0d0650f5a07b353 = 8000000000000000 -+#26: xsmuldp 0000000000000000 8000000000000000 = 8000000000000000 -+#27: xsmuldp 0000000000000000 0000000000000000 = 0000000000000000 -+#28: xsmuldp 0000000000000000 0123214569900000 = 0000000000000000 -+#29: xsmuldp 0000000000000000 7ff0000000000000 = 7ff8000000000000 -+#30: xsmuldp 0000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#31: xsmuldp 0000000000000000 7ff8000000000000 = 7ff8000000000000 -+#32: xsmuldp 0123214569900000 fff0000000000000 = fff0000000000000 -+#33: xsmuldp 0123214569900000 c0d0650f5a07b353 = 82039a19ca8fcb5f -+#34: xsmuldp 0123214569900000 8000000000000000 = 8000000000000000 -+#35: xsmuldp 0123214569900000 0000000000000000 = 0000000000000000 -+#36: xsmuldp 0123214569900000 404f000000000000 = 0182883b3e438000 -+#37: xsmuldp 0123214569900000 7ff0000000000000 = 7ff0000000000000 -+#38: xsmuldp 0123214569900000 7ff7ffffffffffff = 7fffffffffffffff -+#39: xsmuldp 0123214569900000 7ff8000000000000 = 7ff8000000000000 -+#40: xsmuldp 7ff0000000000000 fff0000000000000 = fff0000000000000 -+#41: xsmuldp 7ff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#42: xsmuldp 7ff0000000000000 8000000000000000 = 7ff8000000000000 -+#43: xsmuldp 7ff0000000000000 0000000000000000 = 7ff8000000000000 -+#44: xsmuldp 7ff0000000000000 0123214569900000 = 7ff0000000000000 -+#45: xsmuldp 7ff0000000000000 7ff0000000000000 = 7ff0000000000000 -+#46: xsmuldp 7ff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#47: xsmuldp 7ff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#48: xsmuldp fff7ffffffffffff fff0000000000000 = ffffffffffffffff -+#49: xsmuldp fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#50: xsmuldp fff7ffffffffffff 8000000000000000 = ffffffffffffffff -+#51: xsmuldp fff7ffffffffffff 0000000000000000 = ffffffffffffffff -+#52: xsmuldp fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#53: xsmuldp fff7ffffffffffff 7ff0000000000000 = ffffffffffffffff -+#54: xsmuldp fff7ffffffffffff 7ff7ffffffffffff = ffffffffffffffff -+#55: xsmuldp fff7ffffffffffff 7ff8000000000000 = ffffffffffffffff -+#56: xsmuldp fff8000000000000 fff0000000000000 = fff8000000000000 -+#57: xsmuldp fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#58: xsmuldp fff8000000000000 8000000000000000 = fff8000000000000 -+#59: xsmuldp fff8000000000000 0000000000000000 = fff8000000000000 -+#60: xsmuldp fff8000000000000 0123214569900000 = fff8000000000000 -+#61: xsmuldp fff8000000000000 7ff0000000000000 = fff8000000000000 -+#62: xsmuldp fff8000000000000 7ff7ffffffffffff = fff8000000000000 -+#63: xsmuldp fff8000000000000 7ff8000000000000 = fff8000000000000 -+ -+#0: xssubdp fff0000000000000 fff0000000000000 = 7ff8000000000000 -+#1: xssubdp fff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#2: xssubdp fff0000000000000 8000000000000000 = fff0000000000000 -+#3: xssubdp fff0000000000000 0000000000000000 = fff0000000000000 -+#4: xssubdp fff0000000000000 0123214569900000 = fff0000000000000 -+#5: xssubdp fff0000000000000 7ff0000000000000 = fff0000000000000 -+#6: xssubdp fff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#7: xssubdp fff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#8: xssubdp c0d0650f5a07b353 fff0000000000000 = 7ff0000000000000 -+#9: xssubdp c0d0650f5a07b353 c0d0650f5a07b353 = 0000000000000000 -+#10: xssubdp c0d0650f5a07b353 8000000000000000 = c0d0650f5a07b353 -+#11: xssubdp c0d0650f5a07b353 0000000000000000 = c0d0650f5a07b353 -+#12: xssubdp c0d0650f5a07b353 0123214569900000 = c0d0650f5a07b353 -+#13: xssubdp c0d0650f5a07b353 7ff0000000000000 = fff0000000000000 -+#14: xssubdp c0d0650f5a07b353 7ff7ffffffffffff = 7fffffffffffffff -+#15: xssubdp c0d0650f5a07b353 7ff8000000000000 = 7ff8000000000000 -+#16: xssubdp 8000000000000000 fff0000000000000 = 7ff0000000000000 -+#17: xssubdp 8000000000000000 c0d0650f5a07b353 = 40d0650f5a07b353 -+#18: xssubdp 8000000000000000 8000000000000000 = 0000000000000000 -+#19: xssubdp 8000000000000000 0000000000000000 = 8000000000000000 -+#20: xssubdp 8000000000000000 0123214569900000 = 8123214569900000 -+#21: xssubdp 8000000000000000 7ff0000000000000 = fff0000000000000 -+#22: xssubdp 8000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#23: xssubdp 8000000000000000 7ff8000000000000 = 7ff8000000000000 -+#24: xssubdp 0000000000000000 fff0000000000000 = 7ff0000000000000 -+#25: xssubdp 0000000000000000 c0d0650f5a07b353 = 40d0650f5a07b353 -+#26: xssubdp 0000000000000000 8000000000000000 = 0000000000000000 -+#27: xssubdp 0000000000000000 0000000000000000 = 0000000000000000 -+#28: xssubdp 0000000000000000 0123214569900000 = 8123214569900000 -+#29: xssubdp 0000000000000000 7ff0000000000000 = fff0000000000000 -+#30: xssubdp 0000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#31: xssubdp 0000000000000000 7ff8000000000000 = 7ff8000000000000 -+#32: xssubdp 0123214569900000 fff0000000000000 = 7ff0000000000000 -+#33: xssubdp 0123214569900000 c0d0650f5a07b353 = 40d0650f5a07b353 -+#34: xssubdp 0123214569900000 8000000000000000 = 0123214569900000 -+#35: xssubdp 0123214569900000 0000000000000000 = 0123214569900000 -+#36: xssubdp 0123214569900000 404f000000000000 = c04f000000000000 -+#37: xssubdp 0123214569900000 7ff0000000000000 = fff0000000000000 -+#38: xssubdp 0123214569900000 7ff7ffffffffffff = 7fffffffffffffff -+#39: xssubdp 0123214569900000 7ff8000000000000 = 7ff8000000000000 -+#40: xssubdp 7ff0000000000000 fff0000000000000 = 7ff0000000000000 -+#41: xssubdp 7ff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#42: xssubdp 7ff0000000000000 8000000000000000 = 7ff0000000000000 -+#43: xssubdp 7ff0000000000000 0000000000000000 = 7ff0000000000000 -+#44: xssubdp 7ff0000000000000 0123214569900000 = 7ff0000000000000 -+#45: xssubdp 7ff0000000000000 7ff0000000000000 = 7ff8000000000000 -+#46: xssubdp 7ff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#47: xssubdp 7ff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#48: xssubdp fff7ffffffffffff fff0000000000000 = ffffffffffffffff -+#49: xssubdp fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#50: xssubdp fff7ffffffffffff 8000000000000000 = ffffffffffffffff -+#51: xssubdp fff7ffffffffffff 0000000000000000 = ffffffffffffffff -+#52: xssubdp fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#53: xssubdp fff7ffffffffffff 7ff0000000000000 = ffffffffffffffff -+#54: xssubdp fff7ffffffffffff 7ff7ffffffffffff = ffffffffffffffff -+#55: xssubdp fff7ffffffffffff 7ff8000000000000 = ffffffffffffffff -+#56: xssubdp fff8000000000000 fff0000000000000 = fff8000000000000 -+#57: xssubdp fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#58: xssubdp fff8000000000000 8000000000000000 = fff8000000000000 -+#59: xssubdp fff8000000000000 0000000000000000 = fff8000000000000 -+#60: xssubdp fff8000000000000 0123214569900000 = fff8000000000000 -+#61: xssubdp fff8000000000000 7ff0000000000000 = fff8000000000000 -+#62: xssubdp fff8000000000000 7ff7ffffffffffff = fff8000000000000 -+#63: xssubdp fff8000000000000 7ff8000000000000 = fff8000000000000 -+ -+ -+Test VSX scalar integer conversion instructions -+#0: xscvdpsxds 3fd8000000000000 => 0000000000000000 -+#1: xscvdpsxds 404f000000000000 => 000000000000003e -+#2: xscvdpsxds 0018000000b77501 => 0000000000000000 -+#3: xscvdpsxds 7fe800000000051b => 7fffffffffffffff -+#4: xscvdpsxds 0123214569900000 => 0000000000000000 -+#5: xscvdpsxds 0000000000000000 => 0000000000000000 -+#6: xscvdpsxds 8000000000000000 => 0000000000000000 -+#7: xscvdpsxds 7ff0000000000000 => 7fffffffffffffff -+#8: xscvdpsxds fff0000000000000 => 8000000000000000 -+#9: xscvdpsxds 7ff7ffffffffffff => 8000000000000000 -+#10: xscvdpsxds fff7ffffffffffff => 8000000000000000 -+#11: xscvdpsxds 7ff8000000000000 => 8000000000000000 -+#12: xscvdpsxds fff8000000000000 => 8000000000000000 -+#13: xscvdpsxds 8008340000078000 => 0000000000000000 -+#14: xscvdpsxds c0d0650f5a07b353 => ffffffffffffbe6c -+ -+#0: xscvsxddp 3fd8000000000000 => 43cfec0000000000 -+#1: xscvsxddp 404f000000000000 => 43d013c000000000 -+#2: xscvsxddp 0018000000b77501 => 4338000000b77501 -+#3: xscvsxddp 7fe800000000051b => 43dffa0000000001 -+#4: xscvsxddp 0123214569900000 => 4372321456990000 -+#5: xscvsxddp 0000000000000000 => 0000000000000000 -+#6: xscvsxddp 8000000000000000 => c3e0000000000000 -+#7: xscvsxddp 7ff0000000000000 => 43dffc0000000000 -+#8: xscvsxddp fff0000000000000 => c330000000000000 -+#9: xscvsxddp 7ff7ffffffffffff => 43dffe0000000000 -+#10: xscvsxddp fff7ffffffffffff => c320000000000002 -+#11: xscvsxddp 7ff8000000000000 => 43dffe0000000000 -+#12: xscvsxddp fff8000000000000 => c320000000000000 -+#13: xscvsxddp 8008340000078000 => c3dffdf2fffffe20 -+#14: xscvsxddp c0d0650f5a07b353 => c3cf97cd7852fc26 -+ -+#0: xscvuxddp 3fd8000000000000 => 43cfec0000000000 -+#1: xscvuxddp 404f000000000000 => 43d013c000000000 -+#2: xscvuxddp 0018000000b77501 => 4338000000b77501 -+#3: xscvuxddp 7fe800000000051b => 43dffa0000000001 -+#4: xscvuxddp 0123214569900000 => 4372321456990000 -+#5: xscvuxddp 0000000000000000 => 0000000000000000 -+#6: xscvuxddp 8000000000000000 => 43e0000000000000 -+#7: xscvuxddp 7ff0000000000000 => 43dffc0000000000 -+#8: xscvuxddp fff0000000000000 => 43effe0000000000 -+#9: xscvuxddp 7ff7ffffffffffff => 43dffe0000000000 -+#10: xscvuxddp fff7ffffffffffff => 43efff0000000000 -+#11: xscvuxddp 7ff8000000000000 => 43dffe0000000000 -+#12: xscvuxddp fff8000000000000 => 43efff0000000000 -+#13: xscvuxddp 8008340000078000 => 43e00106800000f0 -+#14: xscvuxddp c0d0650f5a07b353 => 43e81a0ca1eb40f6 -+ -+ -+Testcase PASSED -Index: none/tests/ppc32/test_isa_2_06_part1.vgtest -=================================================================== ---- /dev/null -+++ none/tests/ppc32/test_isa_2_06_part1.vgtest -@@ -0,0 +1,2 @@ -+prereq: ../../../tests/check_isa-2_06_cap -+prog: test_isa_2_06_part1 -Index: none/tests/ppc64/Makefile.am -=================================================================== ---- none/tests/ppc64/Makefile.am.orig -+++ none/tests/ppc64/Makefile.am -@@ -13,10 +13,11 @@ EXTRA_DIST = \ - twi_tdi.stderr.exp twi_tdi.stdout.exp twi_tdi.vgtest \ - tw_td.stderr.exp tw_td.stdout.exp tw_td.vgtest \ - power6_bcmp.stderr.exp power6_bcmp.stdout.exp power6_bcmp.vgtest \ -- power6_mf_gpr.stderr.exp power6_mf_gpr.stdout.exp power6_mf_gpr.vgtest -+ power6_mf_gpr.stderr.exp power6_mf_gpr.stdout.exp power6_mf_gpr.vgtest \ -+ test_isa_2_06_part1.stderr.exp test_isa_2_06_part1.stdout.exp test_isa_2_06_part1.vgtest - - check_PROGRAMS = \ -- jm-insns lsw round std_reg_imm twi_tdi tw_td power6_bcmp power6_mf_gpr -+ jm-insns lsw round std_reg_imm twi_tdi tw_td power6_bcmp power6_mf_gpr test_isa_2_06_part1 - - AM_CFLAGS += @FLAG_M64@ - AM_CXXFLAGS += @FLAG_M64@ -@@ -28,6 +29,17 @@ else - ALTIVEC_FLAG = - endif - -+if HAS_VSX -+BUILD_FLAG_VSX = -mvsx -+VSX_FLAG = -DHAS_VSX -+else -+VSX_FLAG = -+BUILD_FLAG_VSX = -+endif -+ -+test_isa_2_06_part1_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames $(VSX_FLAG) \ -+ @FLAG_M64@ $(ALTIVEC_FLAG) $(BUILD_FLAG_VSX) -+ - jm_insns_CFLAGS = $(AM_CFLAGS) -Winline -Wall -O -g -mregnames -maltivec \ - @FLAG_M64@ $(ALTIVEC_FLAG) - -Index: none/tests/ppc64/test_isa_2_06_part1.c -=================================================================== ---- /dev/null -+++ none/tests/ppc64/test_isa_2_06_part1.c -@@ -0,0 +1,2189 @@ -+/* Copyright (C) 2011 IBM -+ -+ Author: Maynard Johnson -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License as -+ published by the Free Software Foundation; either version 2 of the -+ License, or (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, but -+ WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA -+ 02111-1307, USA. -+ -+ The GNU General Public License is contained in the file COPYING. -+ */ -+ -+#ifdef HAS_VSX -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#ifndef __powerpc64__ -+typedef uint32_t HWord_t; -+#else -+typedef uint64_t HWord_t; -+#endif /* __powerpc64__ */ -+ -+static int errors; -+register HWord_t r14 __asm__ ("r14"); -+register HWord_t r15 __asm__ ("r15"); -+register HWord_t r16 __asm__ ("r16"); -+register HWord_t r17 __asm__ ("r17"); -+register double f14 __asm__ ("fr14"); -+register double f15 __asm__ ("fr15"); -+register double f16 __asm__ ("fr16"); -+register double f17 __asm__ ("fr17"); -+ -+static volatile unsigned int cond_reg; -+ -+#define ALLCR "cr0","cr1","cr2","cr3","cr4","cr5","cr6","cr7" -+ -+#define SET_CR(_arg) \ -+ __asm__ __volatile__ ("mtcr %0" : : "b"(_arg) : ALLCR ); -+ -+#define SET_XER(_arg) \ -+ __asm__ __volatile__ ("mtxer %0" : : "b"(_arg) : "xer" ); -+ -+#define GET_CR(_lval) \ -+ __asm__ __volatile__ ("mfcr %0" : "=b"(_lval) ) -+ -+#define GET_XER(_lval) \ -+ __asm__ __volatile__ ("mfxer %0" : "=b"(_lval) ) -+ -+#define GET_CR_XER(_lval_cr,_lval_xer) \ -+ do { GET_CR(_lval_cr); GET_XER(_lval_xer); } while (0) -+ -+#define SET_CR_ZERO \ -+ SET_CR(0) -+ -+#define SET_XER_ZERO \ -+ SET_XER(0) -+ -+#define SET_CR_XER_ZERO \ -+ do { SET_CR_ZERO; SET_XER_ZERO; } while (0) -+ -+#define SET_FPSCR_ZERO \ -+ do { double _d = 0.0; \ -+ __asm__ __volatile__ ("mtfsf 0xFF, %0" : : "f"(_d) ); \ -+ } while (0) -+ -+ -+typedef void (*test_func_t)(void); -+typedef struct ldst_test ldst_test_t; -+typedef struct vsx_logic_test logic_test_t; -+typedef struct xs_conv_test xs_conv_test_t; -+typedef struct p7_fp_test fp_test_t; -+typedef struct vx_fp_test vx_fp_test_t; -+typedef struct vsx_move_test move_test_t; -+typedef struct vsx_permute_test permute_test_t; -+typedef struct test_table test_table_t; -+ -+static double *fargs = NULL; -+static int nb_fargs; -+ -+/* These functions below that construct a table of floating point -+ * values were lifted from none/tests/ppc32/jm-insns.c. -+ */ -+ -+#if defined (DEBUG_ARGS_BUILD) -+#define AB_DPRINTF(fmt, args...) do { fprintf(stderr, fmt , ##args); } while (0) -+#else -+#define AB_DPRINTF(fmt, args...) do { } while (0) -+#endif -+ -+static inline void register_farg (void *farg, -+ int s, uint16_t _exp, uint64_t mant) -+{ -+ uint64_t tmp; -+ -+ tmp = ((uint64_t)s << 63) | ((uint64_t)_exp << 52) | mant; -+ *(uint64_t *)farg = tmp; -+ AB_DPRINTF("%d %03x %013llx => %016llx %0e\n", -+ s, _exp, mant, *(uint64_t *)farg, *(double *)farg); -+} -+ -+static void build_fargs_table(void) -+/* -+ * Double precision: -+ * Sign goes from zero to one (1 bit) -+ * Exponent goes from 0 to ((1 << 12) - 1) (11 bits) -+ * Mantissa goes from 1 to ((1 << 52) - 1) (52 bits) -+ * + special values: -+ * +0.0 : 0 0x000 0x0000000000000 => 0x0000000000000000 -+ * -0.0 : 1 0x000 0x0000000000000 => 0x8000000000000000 -+ * +infinity : 0 0x7FF 0x0000000000000 => 0x7FF0000000000000 -+ * -infinity : 1 0x7FF 0x0000000000000 => 0xFFF0000000000000 -+ * +QNaN : 0 0x7FF 0x7FFFFFFFFFFFF => 0x7FF7FFFFFFFFFFFF -+ * -QNaN : 1 0x7FF 0x7FFFFFFFFFFFF => 0xFFF7FFFFFFFFFFFF -+ * +SNaN : 0 0x7FF 0x8000000000000 => 0x7FF8000000000000 -+ * -SNaN : 1 0x7FF 0x8000000000000 => 0xFFF8000000000000 -+ * (8 values) -+ * -+ * Single precision -+ * Sign: 1 bit -+ * Exponent: 8 bits -+ * Mantissa: 23 bits -+ * +0.0 : 0 0x00 0x000000 => 0x00000000 -+ * -0.0 : 1 0x00 0x000000 => 0x80000000 -+ * +infinity : 0 0xFF 0x000000 => 0x7F800000 -+ * -infinity : 1 0xFF 0x000000 => 0xFF800000 -+ * +QNaN : 0 0xFF 0x3FFFFF => 0x7FBFFFFF -+ * -QNaN : 1 0xFF 0x3FFFFF => 0xFFBFFFFF -+ * +SNaN : 0 0xFF 0x400000 => 0x7FC00000 -+ * -SNaN : 1 0xFF 0x400000 => 0xFFC00000 -+*/ -+{ -+ uint64_t mant; -+ uint16_t _exp, e1; -+ int s; -+ int i=0; -+ -+ if (nb_fargs) -+ return; -+ -+ fargs = malloc( 16 * sizeof(double) ); -+ for (s = 0; s < 2; s++) { -+ for (e1 = 0x001;; e1 = ((e1 + 1) << 13) + 7) { -+ if (e1 >= 0x400) -+ e1 = 0x3fe; -+ _exp = e1; -+ for (mant = 0x0000000000001ULL; mant < (1ULL << 52); -+ /* Add 'random' bits */ -+ mant = ((mant + 0x4A6) << 29) + 0x359) { -+ register_farg( &fargs[i++], s, _exp, mant ); -+ } -+ if (e1 == 0x3fe) -+ break; -+ } -+ } -+ // add a few smaller values to fargs . . . -+ s = 0; -+ _exp = 0x002; -+ mant = 0x0000000000b01ULL; -+ register_farg(&fargs[i++], s, _exp, mant); -+ -+ _exp = 0x000; -+ mant = 0x00000203f0b3dULL; -+ register_farg(&fargs[i++], s, _exp, mant); -+ -+ mant = 0x00000005a203dULL; -+ register_farg(&fargs[i++], s, _exp, mant); -+ -+ s = 1; -+ _exp = 0x002; -+ mant = 0x0000000000b01ULL; -+ register_farg(&fargs[i++], s, _exp, mant); -+ -+ _exp = 0x000; -+ mant = 0x00000203f0b3dULL; -+ register_farg(&fargs[i++], s, _exp, mant); -+ -+ nb_fargs = i; -+} -+ -+ -+typedef struct ftdiv_test { -+ int fra_idx; -+ int frb_idx; -+ int cr_flags; -+} ftdiv_test_args_t; -+ -+typedef struct fp_test_args { -+ int fra_idx; -+ int frb_idx; -+ int cr_flags; -+ unsigned long long dp_bin_result; -+} fp_test_args_t; -+ -+unsigned long long xscvuxddp_results[] = { -+ 0x43cfec0000000000ULL, -+ 0x43d013c000000000ULL, -+ 0x4338000000b77501ULL, -+ 0x43dffa0000000001ULL, -+ 0x4372321456990000ULL, -+ 0x0000000000000000ULL, -+ 0x43e0000000000000ULL, -+ 0x43dffc0000000000ULL, -+ 0x43effe0000000000ULL, -+ 0x43dffe0000000000ULL, -+ 0x43efff0000000000ULL, -+ 0x43dffe0000000000ULL, -+ 0x43efff0000000000ULL, -+ 0x43e00106800000f0ULL, -+ 0x43e81a0ca1eb40f6ULL -+}; -+ -+unsigned long long xscvsxddp_results[] = { -+ 0x43cfec0000000000ULL, -+ 0x43d013c000000000ULL, -+ 0x4338000000b77501ULL, -+ 0x43dffa0000000001ULL, -+ 0x4372321456990000ULL, -+ 0x0000000000000000ULL, -+ 0xc3e0000000000000ULL, -+ 0x43dffc0000000000ULL, -+ 0xc330000000000000ULL, -+ 0x43dffe0000000000ULL, -+ 0xc320000000000002ULL, -+ 0x43dffe0000000000ULL, -+ 0xc320000000000000ULL, -+ 0xc3dffdf2fffffe20ULL, -+ 0xc3cf97cd7852fc26ULL, -+}; -+ -+unsigned long long xscvdpsxds_results[] = { -+ 0x0000000000000000ULL, -+ 0x000000000000003eULL, -+ 0x0000000000000000ULL, -+ 0x7fffffffffffffffULL, -+ 0x0000000000000000ULL, -+ 0x0000000000000000ULL, -+ 0x0000000000000000ULL, -+ 0x7fffffffffffffffULL, -+ 0x8000000000000000ULL, -+ 0x8000000000000000ULL, -+ 0x8000000000000000ULL, -+ 0x8000000000000000ULL, -+ 0x8000000000000000ULL, -+ 0x0000000000000000ULL, -+ 0xffffffffffffbe6cULL -+}; -+ -+ftdiv_test_args_t ftdiv_tests[] = { -+ {0, 1, 0x8}, -+ {9, 1, 0xa}, -+ {1, 12, 0xa}, -+ {0, 2, 0xa}, -+ {1, 3, 0xa}, -+ {3, 0, 0xa}, -+ {0, 3, 0xa}, -+ {4, 0, 0xa}, -+ {7, 1, 0xe}, -+ {8, 1, 0xe}, -+ {1, 7, 0xe}, -+ {0, 13, 0xe}, -+ {5, 5, 0xe}, -+ {5, 6, 0xe}, -+}; -+ -+fp_test_args_t xscmpX_tests[] = { -+ {8, 8, 0x2, 0ULL}, -+ {8, 14, 0x8, 0ULL}, -+ {8, 6, 0x8, 0ULL}, -+ {8, 5, 0x8, 0ULL}, -+ {8, 4, 0x8, 0ULL}, -+ {8, 7, 0x8, 0ULL}, -+ {8, 9, 0x1, 0ULL}, -+ {8, 11, 0x1, 0ULL}, -+ {14, 8, 0x4, 0ULL}, -+ {14, 14, 0x2, 0ULL}, -+ {14, 6, 0x8, 0ULL}, -+ {14, 5, 0x8, 0ULL}, -+ {14, 4, 0x8, 0ULL}, -+ {14, 7, 0x8, 0ULL}, -+ {14, 9, 0x1, 0ULL}, -+ {14, 11, 0x1, 0ULL}, -+ {6, 8, 0x4, 0ULL}, -+ {6, 14, 0x4, 0ULL}, -+ {6, 6, 0x2, 0ULL}, -+ {6, 5, 0x2, 0ULL}, -+ {6, 4, 0x8, 0ULL}, -+ {6, 7, 0x8, 0ULL}, -+ {6, 9, 0x1, 0ULL}, -+ {6, 11, 0x1, 0ULL}, -+ {5, 8, 0x4, 0ULL}, -+ {5, 14, 0x4, 0ULL}, -+ {5, 6, 0x2, 0ULL}, -+ {5, 5, 0x2, 0ULL}, -+ {5, 4, 0x8, 0ULL}, -+ {5, 7, 0x8, 0ULL}, -+ {5, 9, 0x1, 0ULL}, -+ {5, 11, 0x1, 0ULL}, -+ {4, 8, 0x4, 0ULL}, -+ {4, 14, 0x4, 0ULL}, -+ {4, 6, 0x4, 0ULL}, -+ {4, 5, 0x4, 0ULL}, -+ {4, 1, 0x8, 0ULL}, -+ {4, 7, 0x8, 0ULL}, -+ {4, 9, 0x1, 0ULL}, -+ {4, 11, 0x1, 0ULL}, -+ {7, 8, 0x4, 0ULL}, -+ {7, 14, 0x4, 0ULL}, -+ {7, 6, 0x4, 0ULL}, -+ {7, 5, 0x4, 0ULL}, -+ {7, 4, 0x4, 0ULL}, -+ {7, 7, 0x2, 0ULL}, -+ {7, 9, 0x1, 0ULL}, -+ {7, 11, 0x1, 0ULL}, -+ {10, 8, 0x1, 0ULL}, -+ {10, 14, 0x1, 0ULL}, -+ {10, 6, 0x1, 0ULL}, -+ {10, 5, 0x1, 0ULL}, -+ {10, 4, 0x1, 0ULL}, -+ {10, 7, 0x1, 0ULL}, -+ {10, 9, 0x1, 0ULL}, -+ {10, 11, 0x1, 0ULL}, -+ {12, 8, 0x1, 0ULL}, -+ {12, 14, 0x1, 0ULL}, -+ {12, 6, 0x1, 0ULL}, -+ {12, 5, 0x1, 0ULL}, -+ {12, 4, 0x1, 0ULL}, -+ {12, 7, 0x1, 0ULL}, -+ {12, 9, 0x1, 0ULL}, -+ {12, 11, 0x1, 0ULL}, -+}; -+ -+fp_test_args_t xsadddp_tests[] = { -+ {8, 8, 0x0, 0xfff0000000000000ULL}, -+ {8, 14, 0x0, 0xfff0000000000000ULL}, -+ {8, 6, 0x0, 0xfff0000000000000ULL}, -+ {8, 5, 0x0, 0xfff0000000000000ULL}, -+ {8, 4, 0x0, 0xfff0000000000000ULL}, -+ {8, 7, 0x0, 0x7ff8000000000000ULL}, -+ {8, 9, 0x0, 0x7fffffffffffffffULL}, -+ {8, 11, 0x0, 0x7ff8000000000000ULL}, -+ {14, 8, 0x0, 0xfff0000000000000ULL}, -+ {14, 14, 0x0, 0xc0e0650f5a07b353ULL}, -+ {14, 6, 0x0, 0xc0d0650f5a07b353ULL}, -+ {14, 5, 0x0, 0xc0d0650f5a07b353ULL}, -+ {14, 4, 0x0, 0xc0d0650f5a07b353ULL}, -+ {14, 7, 0x0, 0x7ff0000000000000ULL}, -+ {14, 9, 0x0, 0x7fffffffffffffffULL}, -+ {14, 11, 0x0, 0x7ff8000000000000ULL}, -+ {6, 8, 0x0, 0xfff0000000000000ULL}, -+ {6, 14, 0x0, 0xc0d0650f5a07b353ULL}, -+ {6, 6, 0x0, 0x8000000000000000ULL}, -+ {6, 5, 0x0, 0x0000000000000000ULL}, -+ {6, 4, 0x0, 0x0123214569900000ULL}, -+ {6, 7, 0x0, 0x7ff0000000000000ULL}, -+ {6, 9, 0x0, 0x7fffffffffffffffULL}, -+ {6, 11, 0x0, 0x7ff8000000000000ULL}, -+ {5, 8, 0x0, 0xfff0000000000000ULL}, -+ {5, 14, 0x0, 0xc0d0650f5a07b353ULL}, -+ {5, 6, 0x0, 0x0000000000000000ULL}, -+ {5, 5, 0x0, 0x0000000000000000ULL}, -+ {5, 4, 0x0, 0x0123214569900000ULL}, -+ {5, 7, 0x0, 0x7ff0000000000000ULL}, -+ {5, 9, 0x0, 0x7fffffffffffffffULL}, -+ {5, 11, 0x0, 0x7ff8000000000000ULL}, -+ {4, 8, 0x0, 0xfff0000000000000ULL}, -+ {4, 14, 0x0, 0xc0d0650f5a07b353ULL}, -+ {4, 6, 0x0, 0x0123214569900000ULL}, -+ {4, 5, 0x0, 0x0123214569900000ULL}, -+ {4, 1, 0x0, 0x404f000000000000ULL}, -+ {4, 7, 0x0, 0x7ff0000000000000ULL}, -+ {4, 9, 0x0, 0x7fffffffffffffffULL}, -+ {4, 11, 0x0, 0x7ff8000000000000ULL}, -+ {7, 8, 0x0, 0x7ff8000000000000ULL}, -+ {7, 14, 0x0, 0x7ff0000000000000ULL}, -+ {7, 6, 0x0, 0x7ff0000000000000ULL}, -+ {7, 5, 0x0, 0x7ff0000000000000ULL}, -+ {7, 4, 0x0, 0x7ff0000000000000ULL}, -+ {7, 7, 0x0, 0x7ff0000000000000ULL}, -+ {7, 9, 0x0, 0x7fffffffffffffffULL}, -+ {7, 11, 0x0, 0x7ff8000000000000ULL}, -+ {10, 8, 0x0, 0xffffffffffffffffULL}, -+ {10, 14, 0x0, 0xffffffffffffffffULL}, -+ {10, 6, 0x0, 0xffffffffffffffffULL}, -+ {10, 5, 0x0, 0xffffffffffffffffULL}, -+ {10, 4, 0x0, 0xffffffffffffffffULL}, -+ {10, 7, 0x0, 0xffffffffffffffffULL}, -+ {10, 9, 0x0, 0xffffffffffffffffULL}, -+ {10, 11, 0x0, 0xffffffffffffffffULL}, -+ {12, 8, 0x0, 0xfff8000000000000ULL}, -+ {12, 14, 0x0, 0xfff8000000000000ULL}, -+ {12, 6, 0x0, 0xfff8000000000000ULL}, -+ {12, 5, 0x0, 0xfff8000000000000ULL}, -+ {12, 4, 0x0, 0xfff8000000000000ULL}, -+ {12, 7, 0x0, 0xfff8000000000000ULL}, -+ {12, 9, 0x0, 0xfff8000000000000ULL}, -+ {12, 11, 0x0, 0xfff8000000000000ULL}, -+}; -+ -+fp_test_args_t xsdivdp_tests[] = { -+ {8, 8, 0x0, 0x7ff8000000000000ULL}, -+ {8, 14, 0x0, 0x7ff0000000000000ULL}, -+ {8, 6, 0x0, 0x7ff0000000000000ULL}, -+ {8, 5, 0x0, 0xfff0000000000000ULL}, -+ {8, 4, 0x0, 0xfff0000000000000ULL}, -+ {8, 7, 0x0, 0x7ff8000000000000ULL}, -+ {8, 9, 0x0, 0x7fffffffffffffffULL}, -+ {8, 11, 0x0, 0x7ff8000000000000ULL}, -+ {14, 8, 0x0, 0x0000000000000000ULL}, -+ {14, 14, 0x0, 0x3ff0000000000000ULL}, -+ {14, 6, 0x0, 0x7ff0000000000000ULL}, -+ {14, 5, 0x0, 0xfff0000000000000ULL}, -+ {14, 4, 0x0, 0xff9b6cb57ca13c00ULL}, -+ {14, 7, 0x0, 0x8000000000000000ULL}, -+ {14, 9, 0x0, 0x7fffffffffffffffULL}, -+ {14, 11, 0x0, 0x7ff8000000000000ULL}, -+ {6, 8, 0x0, 0x0000000000000000ULL}, -+ {6, 14, 0x0, 0x0000000000000000ULL}, -+ {6, 6, 0x0, 0x7ff8000000000000ULL}, -+ {6, 5, 0x0, 0x7ff8000000000000ULL}, -+ {6, 4, 0x0, 0x8000000000000000ULL}, -+ {6, 7, 0x0, 0x8000000000000000ULL}, -+ {6, 9, 0x0, 0x7fffffffffffffffULL}, -+ {6, 11, 0x0, 0x7ff8000000000000ULL}, -+ {5, 8, 0x0, 0x8000000000000000ULL}, -+ {5, 14, 0x0, 0x8000000000000000ULL}, -+ {5, 6, 0x0, 0x7ff8000000000000ULL}, -+ {5, 5, 0x0, 0x7ff8000000000000ULL}, -+ {5, 4, 0x0, 0x0000000000000000ULL}, -+ {5, 7, 0x0, 0x0000000000000000ULL}, -+ {5, 9, 0x0, 0x7fffffffffffffffULL}, -+ {5, 11, 0x0, 0x7ff8000000000000ULL}, -+ {4, 8, 0x0, 0x8000000000000000ULL}, -+ {4, 14, 0x0, 0x8042ab59d8b6ec87ULL}, -+ {4, 6, 0x0, 0xfff0000000000000ULL}, -+ {4, 5, 0x0, 0x7ff0000000000000ULL}, -+ {4, 1, 0x0, 0x00c3bf3f64b5ad6bULL}, -+ {4, 7, 0x0, 0x0000000000000000ULL}, -+ {4, 9, 0x0, 0x7fffffffffffffffULL}, -+ {4, 11, 0x0, 0x7ff8000000000000ULL}, -+ {7, 8, 0x0, 0x7ff8000000000000ULL}, -+ {7, 14, 0x0, 0xfff0000000000000ULL}, -+ {7, 6, 0x0, 0xfff0000000000000ULL}, -+ {7, 5, 0x0, 0x7ff0000000000000ULL}, -+ {7, 4, 0x0, 0x7ff0000000000000ULL}, -+ {7, 7, 0x0, 0x7ff8000000000000ULL}, -+ {7, 9, 0x0, 0x7fffffffffffffffULL}, -+ {7, 11, 0x0, 0x7ff8000000000000ULL}, -+ {10, 8, 0x0, 0xffffffffffffffffULL}, -+ {10, 14, 0x0, 0xffffffffffffffffULL}, -+ {10, 6, 0x0, 0xffffffffffffffffULL}, -+ {10, 5, 0x0, 0xffffffffffffffffULL}, -+ {10, 4, 0x0, 0xffffffffffffffffULL}, -+ {10, 7, 0x0, 0xffffffffffffffffULL}, -+ {10, 9, 0x0, 0xffffffffffffffffULL}, -+ {10, 11, 0x0, 0xffffffffffffffffULL}, -+ {12, 8, 0x0, 0xfff8000000000000ULL}, -+ {12, 14, 0x0, 0xfff8000000000000ULL}, -+ {12, 6, 0x0, 0xfff8000000000000ULL}, -+ {12, 5, 0x0, 0xfff8000000000000ULL}, -+ {12, 4, 0x0, 0xfff8000000000000ULL}, -+ {12, 7, 0x0, 0xfff8000000000000ULL}, -+ {12, 9, 0x0, 0xfff8000000000000ULL}, -+ {12, 11, 0x0, 0xfff8000000000000ULL}, -+}; -+ -+fp_test_args_t xsmaddXdp_tests[] = { -+ {8, 8, 0x0, 0x7ff8000000000000ULL}, -+ {8, 14, 0x0, 0xfff0000000000000ULL}, -+ {8, 6, 0x0, 0x7ff0000000000000ULL}, -+ {8, 5, 0x0, 0xfff0000000000000ULL}, -+ {8, 4, 0x0, 0x7ff0000000000000ULL}, -+ {8, 7, 0x0, 0x7ff8000000000000ULL}, -+ {8, 9, 0x0, 0x7fffffffffffffffULL}, -+ {8, 11, 0x0, 0x7ff8000000000000ULL}, -+ {14, 8, 0x0, 0xfff0000000000000ULL}, -+ {14, 14, 0x0, 0xc0d0650f5a07b353ULL}, -+ {14, 6, 0x0, 0x41b0cc9d05eec2a7ULL}, -+ {14, 5, 0x0, 0x82039a19ca8fcb5fULL}, -+ {14, 4, 0x0, 0x41b0cc9d05eec2a7ULL}, -+ {14, 7, 0x0, 0x7ff0000000000000ULL}, -+ {14, 9, 0x0, 0x7fffffffffffffffULL}, -+ {14, 11, 0x0, 0x7ff8000000000000ULL}, -+ {6, 8, 0x0, 0xfff0000000000000ULL}, -+ {6, 14, 0x0, 0xc0d0650f5a07b353ULL}, -+ {6, 6, 0x0, 0x0000000000000000ULL}, -+ {6, 5, 0x0, 0x0000000000000000ULL}, -+ {6, 4, 0x0, 0x0123214569900000ULL}, -+ {6, 7, 0x0, 0x7ff0000000000000ULL}, -+ {6, 9, 0x0, 0x7fffffffffffffffULL}, -+ {6, 11, 0x0, 0x7ff8000000000000ULL}, -+ {5, 8, 0x0, 0xfff0000000000000ULL}, -+ {5, 14, 0x0, 0xc0d0650f5a07b353ULL}, -+ {5, 6, 0x0, 0x8000000000000000ULL}, -+ {5, 5, 0x0, 0x0000000000000000ULL}, -+ {5, 4, 0x0, 0x0123214569900000ULL}, -+ {5, 7, 0x0, 0x7ff0000000000000ULL}, -+ {5, 9, 0x0, 0x7fffffffffffffffULL}, -+ {5, 11, 0x0, 0x7ff8000000000000ULL}, -+ {4, 8, 0x0, 0xfff0000000000000ULL}, -+ {4, 14, 0x0, 0xc0d0650f5a07b353ULL}, -+ {4, 6, 0x0, 0x82039a19ca8fcb5fULL}, -+ {4, 5, 0x0, 0x0000000000000000ULL}, -+ {4, 1, 0x0, 0x404f000000000000ULL}, -+ {4, 7, 0x0, 0x7ff0000000000000ULL}, -+ {4, 9, 0x0, 0x7fffffffffffffffULL}, -+ {4, 11, 0x0, 0x7ff8000000000000ULL}, -+ {7, 8, 0x0, 0xfff0000000000000ULL}, -+ {7, 14, 0x0, 0x7ff0000000000000ULL}, -+ {7, 6, 0x0, 0xfff0000000000000ULL}, -+ {7, 5, 0x0, 0x7ff0000000000000ULL}, -+ {7, 4, 0x0, 0xfff0000000000000ULL}, -+ {7, 7, 0x0, 0x7ff0000000000000ULL}, -+ {7, 9, 0x0, 0x7fffffffffffffffULL}, -+ {7, 11, 0x0, 0x7ff8000000000000ULL}, -+ {10, 8, 0x0, 0xffffffffffffffffULL}, -+ {10, 14, 0x0, 0xffffffffffffffffULL}, -+ {10, 6, 0x0, 0xffffffffffffffffULL}, -+ {10, 5, 0x0, 0xffffffffffffffffULL}, -+ {10, 4, 0x0, 0xffffffffffffffffULL}, -+ {10, 7, 0x0, 0xffffffffffffffffULL}, -+ {10, 9, 0x0, 0xffffffffffffffffULL}, -+ {10, 11, 0x0, 0xffffffffffffffffULL}, -+ {12, 8, 0x0, 0xfff8000000000000ULL}, -+ {12, 14, 0x0, 0xfff8000000000000ULL}, -+ {12, 6, 0x0, 0xfff8000000000000ULL}, -+ {12, 5, 0x0, 0xfff8000000000000ULL}, -+ {12, 4, 0x0, 0xfff8000000000000ULL}, -+ {12, 7, 0x0, 0xfff8000000000000ULL}, -+ {12, 9, 0x0, 0xfff8000000000000ULL}, -+ {12, 11, 0x0, 0xfff8000000000000ULL}, -+}; -+ -+fp_test_args_t xsmsubXdp_tests[] = { -+ {8, 8, 0x0, 0x7ff0000000000000ULL}, -+ {8, 14, 0x0, 0xfff0000000000000ULL}, -+ {8, 6, 0x0, 0x7ff0000000000000ULL}, -+ {8, 5, 0x0, 0xfff0000000000000ULL}, -+ {8, 4, 0x0, 0x7ff0000000000000ULL}, -+ {8, 7, 0x0, 0xfff0000000000000ULL}, -+ {8, 9, 0x0, 0x7fffffffffffffffULL}, -+ {8, 11, 0x0, 0x7ff8000000000000ULL}, -+ {14, 8, 0x0, 0x7ff0000000000000ULL}, -+ {14, 14, 0x0, 0x40d0650f5a07b353ULL}, -+ {14, 6, 0x0, 0x41b0cc9d05eec2a7ULL}, -+ {14, 5, 0x0, 0x82039a19ca8fcb5fULL}, -+ {14, 4, 0x0, 0x41b0cc9d05eec2a7ULL}, -+ {14, 7, 0x0, 0xfff0000000000000ULL}, -+ {14, 9, 0x0, 0x7fffffffffffffffULL}, -+ {14, 11, 0x0, 0x7ff8000000000000ULL}, -+ {6, 8, 0x0, 0x7ff0000000000000ULL}, -+ {6, 14, 0x0, 0x40d0650f5a07b353ULL}, -+ {6, 6, 0x0, 0x0000000000000000ULL}, -+ {6, 5, 0x0, 0x8000000000000000ULL}, -+ {6, 4, 0x0, 0x8123214569900000ULL}, -+ {6, 7, 0x0, 0xfff0000000000000ULL}, -+ {6, 9, 0x0, 0x7fffffffffffffffULL}, -+ {6, 11, 0x0, 0x7ff8000000000000ULL}, -+ {5, 8, 0x0, 0x7ff0000000000000ULL}, -+ {5, 14, 0x0, 0x40d0650f5a07b353ULL}, -+ {5, 6, 0x0, 0x0000000000000000ULL}, -+ {5, 5, 0x0, 0x0000000000000000ULL}, -+ {5, 4, 0x0, 0x8123214569900000ULL}, -+ {5, 7, 0x0, 0xfff0000000000000ULL}, -+ {5, 9, 0x0, 0x7fffffffffffffffULL}, -+ {5, 11, 0x0, 0x7ff8000000000000ULL}, -+ {4, 8, 0x0, 0x7ff0000000000000ULL}, -+ {4, 14, 0x0, 0x40d0650f5a07b353ULL}, -+ {4, 6, 0x0, 0x82039a19ca8fcb5fULL}, -+ {4, 5, 0x0, 0x0000000000000000ULL}, -+ {4, 1, 0x0, 0xc04f000000000000ULL}, -+ {4, 7, 0x0, 0xfff0000000000000ULL}, -+ {4, 9, 0x0, 0x7fffffffffffffffULL}, -+ {4, 11, 0x0, 0x7ff8000000000000ULL}, -+ {7, 8, 0x0, 0x7ff8000000000000ULL}, -+ {7, 14, 0x0, 0x7ff0000000000000ULL}, -+ {7, 6, 0x0, 0xfff0000000000000ULL}, -+ {7, 5, 0x0, 0x7ff0000000000000ULL}, -+ {7, 4, 0x0, 0xfff0000000000000ULL}, -+ {7, 7, 0x0, 0x7ff8000000000000ULL}, -+ {7, 9, 0x0, 0x7fffffffffffffffULL}, -+ {7, 11, 0x0, 0x7ff8000000000000ULL}, -+ {10, 8, 0x0, 0xffffffffffffffffULL}, -+ {10, 14, 0x0, 0xffffffffffffffffULL}, -+ {10, 6, 0x0, 0xffffffffffffffffULL}, -+ {10, 5, 0x0, 0xffffffffffffffffULL}, -+ {10, 4, 0x0, 0xffffffffffffffffULL}, -+ {10, 7, 0x0, 0xffffffffffffffffULL}, -+ {10, 9, 0x0, 0xffffffffffffffffULL}, -+ {10, 11, 0x0, 0xffffffffffffffffULL}, -+ {12, 8, 0x0, 0xfff8000000000000ULL}, -+ {12, 14, 0x0, 0xfff8000000000000ULL}, -+ {12, 6, 0x0, 0xfff8000000000000ULL}, -+ {12, 5, 0x0, 0xfff8000000000000ULL}, -+ {12, 4, 0x0, 0xfff8000000000000ULL}, -+ {12, 7, 0x0, 0xfff8000000000000ULL}, -+ {12, 9, 0x0, 0xfff8000000000000ULL}, -+ {12, 11, 0x0, 0xfff8000000000000ULL}, -+}; -+ -+fp_test_args_t xsnmaddXdp_tests[] = { -+ {8, 8, 0x0, 0x7ff8000000000000ULL}, -+ {8, 14, 0x0, 0x7ff0000000000000ULL}, -+ {8, 6, 0x0, 0xfff0000000000000ULL}, -+ {8, 5, 0x0, 0x7ff0000000000000ULL}, -+ {8, 4, 0x0, 0xfff0000000000000ULL}, -+ {8, 7, 0x0, 0x7ff8000000000000ULL}, -+ {8, 9, 0x0, 0x7fffffffffffffffULL}, -+ {8, 11, 0x0, 0x7ff8000000000000ULL}, -+ {14, 8, 0x0, 0x7ff0000000000000ULL}, -+ {14, 14, 0x0, 0x40d0650f5a07b353ULL}, -+ {14, 6, 0x0, 0xc1b0cc9d05eec2a7ULL}, -+ {14, 5, 0x0, 0x02039a19ca8fcb5fULL}, -+ {14, 4, 0x0, 0xc1b0cc9d05eec2a7ULL}, -+ {14, 7, 0x0, 0xfff0000000000000ULL}, -+ {14, 9, 0x0, 0x7fffffffffffffffULL}, -+ {14, 11, 0x0, 0x7ff8000000000000ULL}, -+ {6, 8, 0x0, 0x7ff0000000000000ULL}, -+ {6, 14, 0x0, 0x40d0650f5a07b353ULL}, -+ {6, 6, 0x0, 0x8000000000000000ULL}, -+ {6, 5, 0x0, 0x8000000000000000ULL}, -+ {6, 4, 0x0, 0x8123214569900000ULL}, -+ {6, 7, 0x0, 0xfff0000000000000ULL}, -+ {6, 9, 0x0, 0x7fffffffffffffffULL}, -+ {6, 11, 0x0, 0x7ff8000000000000ULL}, -+ {5, 8, 0x0, 0x7ff0000000000000ULL}, -+ {5, 14, 0x0, 0x40d0650f5a07b353ULL}, -+ {5, 6, 0x0, 0x0000000000000000ULL}, -+ {5, 5, 0x0, 0x8000000000000000ULL}, -+ {5, 4, 0x0, 0x8123214569900000ULL}, -+ {5, 7, 0x0, 0xfff0000000000000ULL}, -+ {5, 9, 0x0, 0x7fffffffffffffffULL}, -+ {5, 11, 0x0, 0x7ff8000000000000ULL}, -+ {4, 8, 0x0, 0x7ff0000000000000ULL}, -+ {4, 14, 0x0, 0x40d0650f5a07b353ULL}, -+ {4, 6, 0x0, 0x02039a19ca8fcb5fULL}, -+ {4, 5, 0x0, 0x8000000000000000ULL}, -+ {4, 1, 0x0, 0xc04f000000000000ULL}, -+ {4, 7, 0x0, 0xfff0000000000000ULL}, -+ {4, 9, 0x0, 0x7fffffffffffffffULL}, -+ {4, 11, 0x0, 0x7ff8000000000000ULL}, -+ {7, 8, 0x0, 0x7ff0000000000000ULL}, -+ {7, 14, 0x0, 0xfff0000000000000ULL}, -+ {7, 6, 0x0, 0x7ff0000000000000ULL}, -+ {7, 5, 0x0, 0xfff0000000000000ULL}, -+ {7, 4, 0x0, 0x7ff0000000000000ULL}, -+ {7, 7, 0x0, 0xfff0000000000000ULL}, -+ {7, 9, 0x0, 0x7fffffffffffffffULL}, -+ {7, 11, 0x0, 0x7ff8000000000000ULL}, -+ {10, 8, 0x0, 0xffffffffffffffffULL}, -+ {10, 14, 0x0, 0xffffffffffffffffULL}, -+ {10, 6, 0x0, 0xffffffffffffffffULL}, -+ {10, 5, 0x0, 0xffffffffffffffffULL}, -+ {10, 4, 0x0, 0xffffffffffffffffULL}, -+ {10, 7, 0x0, 0xffffffffffffffffULL}, -+ {10, 9, 0x0, 0xffffffffffffffffULL}, -+ {10, 11, 0x0, 0xffffffffffffffffULL}, -+ {12, 8, 0x0, 0xfff8000000000000ULL}, -+ {12, 14, 0x0, 0xfff8000000000000ULL}, -+ {12, 6, 0x0, 0xfff8000000000000ULL}, -+ {12, 5, 0x0, 0xfff8000000000000ULL}, -+ {12, 4, 0x0, 0xfff8000000000000ULL}, -+ {12, 7, 0x0, 0xfff8000000000000ULL}, -+ {12, 9, 0x0, 0xfff8000000000000ULL}, -+ {12, 11, 0x0, 0xfff8000000000000ULL}, -+}; -+ -+fp_test_args_t xsmuldp_tests[] = { -+ {8, 8, 0x0, 0x7ff0000000000000ULL}, -+ {8, 14, 0x0, 0x7ff0000000000000ULL}, -+ {8, 6, 0x0, 0x7ff8000000000000ULL}, -+ {8, 5, 0x0, 0x7ff8000000000000ULL}, -+ {8, 4, 0x0, 0xfff0000000000000ULL}, -+ {8, 7, 0x0, 0xfff0000000000000ULL}, -+ {8, 9, 0x0, 0x7fffffffffffffffULL}, -+ {8, 11, 0x0, 0x7ff8000000000000ULL}, -+ {14, 8, 0x0, 0x7ff0000000000000ULL}, -+ {14, 14, 0x0, 0x41b0cc9d05eec2a7ULL}, -+ {14, 6, 0x0, 0x0000000000000000ULL}, -+ {14, 5, 0x0, 0x8000000000000000ULL}, -+ {14, 4, 0x0, 0x82039a19ca8fcb5fULL}, -+ {14, 7, 0x0, 0xfff0000000000000ULL}, -+ {14, 9, 0x0, 0x7fffffffffffffffULL}, -+ {14, 11, 0x0, 0x7ff8000000000000ULL}, -+ {6, 8, 0x0, 0x7ff8000000000000ULL}, -+ {6, 14, 0x0, 0x0000000000000000ULL}, -+ {6, 6, 0x0, 0x0000000000000000ULL}, -+ {6, 5, 0x0, 0x8000000000000000ULL}, -+ {6, 4, 0x0, 0x8000000000000000ULL}, -+ {6, 7, 0x0, 0x7ff8000000000000ULL}, -+ {6, 9, 0x0, 0x7fffffffffffffffULL}, -+ {6, 11, 0x0, 0x7ff8000000000000ULL}, -+ {5, 8, 0x0, 0x7ff8000000000000ULL}, -+ {5, 14, 0x0, 0x8000000000000000ULL}, -+ {5, 6, 0x0, 0x8000000000000000ULL}, -+ {5, 5, 0x0, 0x0000000000000000ULL}, -+ {5, 4, 0x0, 0x0000000000000000ULL}, -+ {5, 7, 0x0, 0x7ff8000000000000ULL}, -+ {5, 9, 0x0, 0x7fffffffffffffffULL}, -+ {5, 11, 0x0, 0x7ff8000000000000ULL}, -+ {4, 8, 0x0, 0xfff0000000000000ULL}, -+ {4, 14, 0x0, 0x82039a19ca8fcb5fULL}, -+ {4, 6, 0x0, 0x8000000000000000ULL}, -+ {4, 5, 0x0, 0x0000000000000000ULL}, -+ {4, 1, 0x0, 0x0182883b3e438000ULL}, -+ {4, 7, 0x0, 0x7ff0000000000000ULL}, -+ {4, 9, 0x0, 0x7fffffffffffffffULL}, -+ {4, 11, 0x0, 0x7ff8000000000000ULL}, -+ {7, 8, 0x0, 0xfff0000000000000ULL}, -+ {7, 14, 0x0, 0xfff0000000000000ULL}, -+ {7, 6, 0x0, 0x7ff8000000000000ULL}, -+ {7, 5, 0x0, 0x7ff8000000000000ULL}, -+ {7, 4, 0x0, 0x7ff0000000000000ULL}, -+ {7, 7, 0x0, 0x7ff0000000000000ULL}, -+ {7, 9, 0x0, 0x7fffffffffffffffULL}, -+ {7, 11, 0x0, 0x7ff8000000000000ULL}, -+ {10, 8, 0x0, 0xffffffffffffffffULL}, -+ {10, 14, 0x0, 0xffffffffffffffffULL}, -+ {10, 6, 0x0, 0xffffffffffffffffULL}, -+ {10, 5, 0x0, 0xffffffffffffffffULL}, -+ {10, 4, 0x0, 0xffffffffffffffffULL}, -+ {10, 7, 0x0, 0xffffffffffffffffULL}, -+ {10, 9, 0x0, 0xffffffffffffffffULL}, -+ {10, 11, 0x0, 0xffffffffffffffffULL}, -+ {12, 8, 0x0, 0xfff8000000000000ULL}, -+ {12, 14, 0x0, 0xfff8000000000000ULL}, -+ {12, 6, 0x0, 0xfff8000000000000ULL}, -+ {12, 5, 0x0, 0xfff8000000000000ULL}, -+ {12, 4, 0x0, 0xfff8000000000000ULL}, -+ {12, 7, 0x0, 0xfff8000000000000ULL}, -+ {12, 9, 0x0, 0xfff8000000000000ULL}, -+ {12, 11, 0x0, 0xfff8000000000000ULL}, -+}; -+ -+fp_test_args_t xssubdp_tests[] = { -+ {8, 8, 0x0, 0x7ff8000000000000ULL}, -+ {8, 14, 0x0, 0xfff0000000000000ULL}, -+ {8, 6, 0x0, 0xfff0000000000000ULL}, -+ {8, 5, 0x0, 0xfff0000000000000ULL}, -+ {8, 4, 0x0, 0xfff0000000000000ULL}, -+ {8, 7, 0x0, 0xfff0000000000000ULL}, -+ {8, 9, 0x0, 0x7fffffffffffffffULL}, -+ {8, 11, 0x0, 0x7ff8000000000000ULL}, -+ {14, 8, 0x0, 0x7ff0000000000000ULL}, -+ {14, 14, 0x0, 0x0000000000000000ULL}, -+ {14, 6, 0x0, 0xc0d0650f5a07b353ULL}, -+ {14, 5, 0x0, 0xc0d0650f5a07b353ULL}, -+ {14, 4, 0x0, 0xc0d0650f5a07b353ULL}, -+ {14, 7, 0x0, 0xfff0000000000000ULL}, -+ {14, 9, 0x0, 0x7fffffffffffffffULL}, -+ {14, 11, 0x0, 0x7ff8000000000000ULL}, -+ {6, 8, 0x0, 0x7ff0000000000000ULL}, -+ {6, 14, 0x0, 0x40d0650f5a07b353ULL}, -+ {6, 6, 0x0, 0x0000000000000000ULL}, -+ {6, 5, 0x0, 0x8000000000000000ULL}, -+ {6, 4, 0x0, 0x8123214569900000ULL}, -+ {6, 7, 0x0, 0xfff0000000000000ULL}, -+ {6, 9, 0x0, 0x7fffffffffffffffULL}, -+ {6, 11, 0x0, 0x7ff8000000000000ULL}, -+ {5, 8, 0x0, 0x7ff0000000000000ULL}, -+ {5, 14, 0x0, 0x40d0650f5a07b353ULL}, -+ {5, 6, 0x0, 0x0000000000000000ULL}, -+ {5, 5, 0x0, 0x0000000000000000ULL}, -+ {5, 4, 0x0, 0x8123214569900000ULL}, -+ {5, 7, 0x0, 0xfff0000000000000ULL}, -+ {5, 9, 0x0, 0x7fffffffffffffffULL}, -+ {5, 11, 0x0, 0x7ff8000000000000ULL}, -+ {4, 8, 0x0, 0x7ff0000000000000ULL}, -+ {4, 14, 0x0, 0x40d0650f5a07b353ULL}, -+ {4, 6, 0x0, 0x0123214569900000ULL}, -+ {4, 5, 0x0, 0x0123214569900000ULL}, -+ {4, 1, 0x0, 0xc04f000000000000ULL}, -+ {4, 7, 0x0, 0xfff0000000000000ULL}, -+ {4, 9, 0x0, 0x7fffffffffffffffULL}, -+ {4, 11, 0x0, 0x7ff8000000000000ULL}, -+ {7, 8, 0x0, 0x7ff0000000000000ULL}, -+ {7, 14, 0x0, 0x7ff0000000000000ULL}, -+ {7, 6, 0x0, 0x7ff0000000000000ULL}, -+ {7, 5, 0x0, 0x7ff0000000000000ULL}, -+ {7, 4, 0x0, 0x7ff0000000000000ULL}, -+ {7, 7, 0x0, 0x7ff8000000000000ULL}, -+ {7, 9, 0x0, 0x7fffffffffffffffULL}, -+ {7, 11, 0x0, 0x7ff8000000000000ULL}, -+ {10, 8, 0x0, 0xffffffffffffffffULL}, -+ {10, 14, 0x0, 0xffffffffffffffffULL}, -+ {10, 6, 0x0, 0xffffffffffffffffULL}, -+ {10, 5, 0x0, 0xffffffffffffffffULL}, -+ {10, 4, 0x0, 0xffffffffffffffffULL}, -+ {10, 7, 0x0, 0xffffffffffffffffULL}, -+ {10, 9, 0x0, 0xffffffffffffffffULL}, -+ {10, 11, 0x0, 0xffffffffffffffffULL}, -+ {12, 8, 0x0, 0xfff8000000000000ULL}, -+ {12, 14, 0x0, 0xfff8000000000000ULL}, -+ {12, 6, 0x0, 0xfff8000000000000ULL}, -+ {12, 5, 0x0, 0xfff8000000000000ULL}, -+ {12, 4, 0x0, 0xfff8000000000000ULL}, -+ {12, 7, 0x0, 0xfff8000000000000ULL}, -+ {12, 9, 0x0, 0xfff8000000000000ULL}, -+ {12, 11, 0x0, 0xfff8000000000000ULL}, -+}; -+ -+ -+ -+static int nb_special_fargs; -+static double * spec_fargs; -+ -+static void build_special_fargs_table(void) -+{ -+ /* The special floating point values created below are for -+ * use in the ftdiv tests for setting the fe_flag and fg_flag, -+ * but they can also be used for other tests (e.g., xscmpudp). -+ * -+ * Note that fl_flag is 'always '1' on ppc64 Linux. -+ * -+ Entry Sign Exp fraction Special value -+ 0 0 3fd 0x8000000000000ULL Positive finite number -+ 1 0 404 0xf000000000000ULL ... -+ 2 0 001 0x8000000b77501ULL ... -+ 3 0 7fe 0x800000000051bULL ... -+ 4 0 012 0x3214569900000ULL ... -+ 5 0 000 0x0000000000000ULL +0.0 (+zero) -+ 6 1 000 0x0000000000000ULL -0.0 (-zero) -+ 7 0 7ff 0x0000000000000ULL +infinity -+ 8 1 7ff 0x0000000000000ULL -infinity -+ 9 0 7ff 0x7FFFFFFFFFFFFULL +QNaN -+ 10 1 7ff 0x7FFFFFFFFFFFFULL -QNaN -+ 11 0 7ff 0x8000000000000ULL +SNaN -+ 12 1 7ff 0x8000000000000ULL -SNaN -+ 13 1 000 0x8340000078000ULL Denormalized val (zero exp and non-zero fraction) -+ 14 1 40d 0x0650f5a07b353ULL Negative finite number -+ */ -+ -+ uint64_t mant; -+ uint16_t _exp; -+ int s; -+ int i = 0; -+ -+ if (spec_fargs) -+ return; -+ -+ spec_fargs = malloc( 16 * sizeof(double) ); -+ -+ // #0 -+ s = 0; -+ _exp = 0x3fd; -+ mant = 0x8000000000000ULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ // #1 -+ s = 0; -+ _exp = 0x404; -+ mant = 0xf000000000000ULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ /* None of the ftdiv tests succeed. -+ * FRA = value #0; FRB = value #1 -+ * ea_ = -2; e_b = 5 -+ * fl_flag || fg_flag || fe_flag = 100 -+ */ -+ -+ /************************************************* -+ * fe_flag tests -+ * -+ *************************************************/ -+ -+ /* fe_flag <- 1 if FRA is a NaN -+ * FRA = value #9; FRB = value #1 -+ * e_a = 1024; e_b = 5 -+ * fl_flag || fg_flag || fe_flag = 101 -+ */ -+ -+ /* fe_flag <- 1 if FRB is a NaN -+ * FRA = value #1; FRB = value #12 -+ * e_a = 5; e_b = 1024 -+ * fl_flag || fg_flag || fe_flag = 101 -+ */ -+ -+ /* fe_flag <- 1 if e_b <= -1022 -+ * FRA = value #0; FRB = value #2 -+ * e_a = -2; e_b = -1022 -+ * fl_flag || fg_flag || fe_flag = 101 -+ * -+ */ -+ // #2 -+ s = 0; -+ _exp = 0x001; -+ mant = 0x8000000b77501ULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ /* fe_flag <- 1 if e_b >= 1021 -+ * FRA = value #1; FRB = value #3 -+ * e_a = 5; e_b = 1023 -+ * fl_flag || fg_flag || fe_flag = 101 -+ */ -+ // #3 -+ s = 0; -+ _exp = 0x7fe; -+ mant = 0x800000000051bULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ /* fe_flag <- 1 if FRA != 0 && e_a - e_b >= 1023 -+ * Let FRA = value #3 and FRB be value #0. -+ * e_a = 1023; e_b = -2 -+ * fl_flag || fg_flag || fe_flag = 101 -+ */ -+ -+ /* fe_flag <- 1 if FRA != 0 && e_a - e_b <= -1023 -+ * Let FRA = value #0 above and FRB be value #3 above -+ * e_a = -2; e_b = 1023 -+ * fl_flag || fg_flag || fe_flag = 101 -+ */ -+ -+ /* fe_flag <- 1 if FRA != 0 && e_a <= -970 -+ * Let FRA = value #4 and FRB be value #0 -+ * e_a = -1005; e_b = -2 -+ * fl_flag || fg_flag || fe_flag = 101 -+ */ -+ // #4 -+ s = 0; -+ _exp = 0x012; -+ mant = 0x3214569900000ULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ /************************************************* -+ * fg_flag tests -+ * -+ *************************************************/ -+ /* fg_flag <- 1 if FRA is an Infinity -+ * NOTE: FRA = Inf also sets fe_flag -+ * Do two tests, using values #7 and #8 (+/- Inf) for FRA. -+ * Test 1: -+ * Let FRA be value #7 and FRB be value #1 -+ * e_a = 1024; e_b = 5 -+ * fl_flag || fg_flag || fe_flag = 111 -+ * -+ * Test 2: -+ * Let FRA be value #8 and FRB be value #1 -+ * e_a = 1024; e_b = 5 -+ * fl_flag || fg_flag || fe_flag = 111 -+ * -+ */ -+ -+ /* fg_flag <- 1 if FRB is an Infinity -+ * NOTE: FRB = Inf also sets fe_flag -+ * Let FRA be value #1 and FRB be value #7 -+ * e_a = 5; e_b = 1024 -+ * fl_flag || fg_flag || fe_flag = 111 -+ */ -+ -+ /* fg_flag <- 1 if FRB is denormalized -+ * NOTE: e_b < -1022 ==> fe_flag <- 1 -+ * Let FRA be value #0 and FRB be value #13 -+ * e_a = -2; e_b = -1023 -+ * fl_flag || fg_flag || fe_flag = 111 -+ */ -+ -+ /* fg_flag <- 1 if FRB is +zero -+ * NOTE: FRA = Inf also sets fe_flag -+ * Let FRA = val #5; FRB = val #5 -+ * ea_ = -1023; e_b = -1023 -+ * fl_flag || fg_flag || fe_flag = 111 -+ */ -+ -+ /* fg_flag <- 1 if FRB is -zero -+ * NOTE: FRA = Inf also sets fe_flag -+ * Let FRA = val #5; FRB = val #6 -+ * ea_ = -1023; e_b = -1023 -+ * fl_flag || fg_flag || fe_flag = 111 -+ */ -+ -+ /* Special values */ -+ /* +0.0 : 0 0x000 0x0000000000000 */ -+ // #5 -+ s = 0; -+ _exp = 0x000; -+ mant = 0x0000000000000ULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ /* -0.0 : 1 0x000 0x0000000000000 */ -+ // #6 -+ s = 1; -+ _exp = 0x000; -+ mant = 0x0000000000000ULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ /* +infinity : 0 0x7FF 0x0000000000000 */ -+ // #7 -+ s = 0; -+ _exp = 0x7FF; -+ mant = 0x0000000000000ULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ /* -infinity : 1 0x7FF 0x0000000000000 */ -+ // #8 -+ s = 1; -+ _exp = 0x7FF; -+ mant = 0x0000000000000ULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ /* +QNaN : 0 0x7FF 0x7FFFFFFFFFFFF */ -+ // #9 -+ s = 0; -+ _exp = 0x7FF; -+ mant = 0x7FFFFFFFFFFFFULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ /* -QNaN : 1 0x7FF 0x7FFFFFFFFFFFF */ -+ // #10 -+ s = 1; -+ _exp = 0x7FF; -+ mant = 0x7FFFFFFFFFFFFULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ /* +SNaN : 0 0x7FF 0x8000000000000 */ -+ // #11 -+ s = 0; -+ _exp = 0x7FF; -+ mant = 0x8000000000000ULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ /* -SNaN : 1 0x7FF 0x8000000000000 */ -+ // #12 -+ s = 1; -+ _exp = 0x7FF; -+ mant = 0x8000000000000ULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ /* denormalized value */ -+ // #13 -+ s = 1; -+ _exp = 0x000; -+ mant = 0x8340000078000ULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ /* Negative finite number */ -+ // #14 -+ s = 1; -+ _exp = 0x40d; -+ mant = 0x0650f5a07b353ULL; -+ register_farg(&spec_fargs[i++], s, _exp, mant); -+ -+ nb_special_fargs = i; -+} -+ -+ -+struct test_table -+{ -+ test_func_t test_category; -+ char * name; -+}; -+ -+struct p7_fp_test -+{ -+ test_func_t test_func; -+ const char *name; -+ int single; // 1=single precision result; 0=double precision result -+}; -+ -+typedef enum { -+ VX_FP_CMP, -+ VX_FP_SMA, -+ VX_FP_SMS, -+ VX_FP_SNMA, -+ VX_FP_OTHER -+} vx_fp_test_type; -+ -+struct vx_fp_test -+{ -+ test_func_t test_func; -+ const char *name; -+ fp_test_args_t * targs; -+ int num_tests; -+ vx_fp_test_type test_type; -+}; -+ -+struct xs_conv_test -+{ -+ test_func_t test_func; -+ const char *name; -+ unsigned long long * results; -+ int num_tests; -+}; -+ -+typedef enum { -+ VSX_LOAD =1, -+ VSX_LOAD_SPLAT, -+ VSX_STORE -+} vsx_ldst_type; -+ -+struct ldst_test -+{ -+ test_func_t test_func; -+ const char *name; -+ void * base_addr; -+ uint32_t offset; -+ int num_words_to_process; -+ vsx_ldst_type type; -+}; -+ -+typedef enum { -+ VSX_AND = 1, -+ VSX_XOR, -+ VSX_ANDC, -+ VSX_OR, -+ VSX_NOR -+} vsx_log_op; -+ -+struct vsx_logic_test -+{ -+ test_func_t test_func; -+ const char *name; -+ vsx_log_op op; -+}; -+ -+struct vsx_move_test -+{ -+ test_func_t test_func; -+ const char *name; -+ int xa_idx, xb_idx; -+ unsigned long long expected_result; -+}; -+ -+struct vsx_permute_test -+{ -+ test_func_t test_func; -+ const char *name; -+ unsigned int xa[4]; -+ unsigned int xb[4]; -+ unsigned int expected_output[4]; -+}; -+ -+static vector unsigned int vec_out, vec_inA, vec_inB; -+ -+static void test_lxsdx(void) -+{ -+ __asm__ __volatile__ ("lxsdx %x0, %1, %2" : "=wa" (vec_out): "b" (r14),"r" (r15)); -+} -+ -+static void -+test_lxvd2x(void) -+{ -+ __asm__ __volatile__ ("lxvd2x %x0, %1, %2" : "=wa" (vec_out): "b" (r14),"r" (r15)); -+} -+ -+static void test_lxvdsx(void) -+{ -+ __asm__ __volatile__ ("lxvdsx %x0, %1, %2" : "=wa" (vec_out): "b" (r14),"r" (r15)); -+} -+ -+static void test_lxvw4x(void) -+{ -+ __asm__ __volatile__ ("lxvw4x %x0, %1, %2" : "=wa" (vec_out): "b" (r14),"r" (r15)); -+} -+ -+static void test_stxsdx(void) -+{ -+ __asm__ __volatile__ ("stxsdx %x0, %1, %2" : : "wa" (vec_inA), "b" (r14),"r" (r15)); -+} -+ -+static void test_stxvd2x(void) -+{ -+ __asm__ __volatile__ ("stxvd2x %x0, %1, %2" : : "wa" (vec_inA), "b" (r14),"r" (r15)); -+} -+ -+static void test_stxvw4x(void) -+{ -+ __asm__ __volatile__ ("stxvw4x %x0, %1, %2" : : "wa" (vec_inA), "b" (r14),"r" (r15)); -+} -+ -+static void test_xxlxor(void) -+{ -+ __asm__ __volatile__ ("xxlxor %x0, %x1, %x2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxlor(void) -+{ -+ __asm__ __volatile__ ("xxlor %x0, %x1, %x2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxlnor(void) -+{ -+ __asm__ __volatile__ ("xxlnor %x0, %x1, %x2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxland(void) -+{ -+ __asm__ __volatile__ ("xxland %x0, %x1, %x2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxlandc(void) -+{ -+ __asm__ __volatile__ ("xxlandc %x0, %x1, %x2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxmrghw(void) -+{ -+ __asm__ __volatile__ ("xxmrghw %x0, %x1, %x2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxmrglw(void) -+{ -+ __asm__ __volatile__ ("xxmrglw %x0, %x1, %x2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxpermdi_00(void) -+{ -+ __asm__ __volatile__ ("xxpermdi %x0, %x1, %x2, 0x0" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxpermdi_01(void) -+{ -+ __asm__ __volatile__ ("xxpermdi %x0, %x1, %x2, 0x1" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxpermdi_10(void) -+{ -+ __asm__ __volatile__ ("xxpermdi %x0, %x1, %x2, 0x2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxpermdi_11(void) -+{ -+ __asm__ __volatile__ ("xxpermdi %x0, %x1, %x2, 0x3" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxsldwi_0(void) -+{ -+ __asm__ __volatile__ ("xxsldwi %x0, %x1, %x2, 0" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxsldwi_1(void) -+{ -+ __asm__ __volatile__ ("xxsldwi %x0, %x1, %x2, 1" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxsldwi_2(void) -+{ -+ __asm__ __volatile__ ("xxsldwi %x0, %x1, %x2, 2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xxsldwi_3(void) -+{ -+ __asm__ __volatile__ ("xxsldwi %x0, %x1, %x2, 3" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_fcfids (void) -+{ -+ __asm__ __volatile__ ("fcfids %0, %1" : "=f" (f17): "d" (f14)); -+} -+ -+static void test_fcfidus (void) -+{ -+ __asm__ __volatile__ ("fcfidus %0, %1" : "=f" (f17): "d" (f14)); -+} -+ -+static void test_fcfidu (void) -+{ -+ __asm__ __volatile__ ("fcfidu %0, %1" : "=f" (f17): "d" (f14)); -+} -+ -+static void test_xsabsdp (void) -+{ -+ __asm__ __volatile__ ("xsabsdp %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB)); -+} -+ -+static void test_xscpsgndp (void) -+{ -+ __asm__ __volatile__ ("xscpsgndp %x0, %x1, %x2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xsnabsdp (void) -+{ -+ __asm__ __volatile__ ("xsnabsdp %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB)); -+} -+ -+static void test_xsnegdp (void) -+{ -+ __asm__ __volatile__ ("xsnegdp %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB)); -+} -+ -+static int do_cmpudp; -+static void test_xscmp (void) -+{ -+ if (do_cmpudp) -+ __asm__ __volatile__ ("xscmpudp cr1, %x0, %x1" : : "wa" (vec_inA),"wa" (vec_inB)); -+ else -+ __asm__ __volatile__ ("xscmpodp cr1, %x0, %x1" : : "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xsadddp(void) -+{ -+ __asm__ __volatile__ ("xsadddp %x0, %x1, %x2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xsdivdp(void) -+{ -+ __asm__ __volatile__ ("xsdivdp %x0, %x1, %x2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static int do_adp; -+static void test_xsmadd(void) -+{ -+ if (do_adp) -+ __asm__ __volatile__ ("xsmaddadp %x0, %x1, %x2" : "+wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+ else -+ __asm__ __volatile__ ("xsmaddmdp %x0, %x1, %x2" : "+wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xsmsub(void) -+{ -+ if (do_adp) -+ __asm__ __volatile__ ("xsmsubadp %x0, %x1, %x2" : "+wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+ else -+ __asm__ __volatile__ ("xsmsubmdp %x0, %x1, %x2" : "+wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xsnmadd(void) -+{ -+ if (do_adp) -+ __asm__ __volatile__ ("xsnmaddadp %x0, %x1, %x2" : "+wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+ else -+ __asm__ __volatile__ ("xsnmaddmdp %x0, %x1, %x2" : "+wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xsmuldp(void) -+{ -+ __asm__ __volatile__ ("xsmuldp %x0, %x1, %x2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xssubdp(void) -+{ -+ __asm__ __volatile__ ("xssubdp %x0, %x1, %x2" : "=wa" (vec_out): "wa" (vec_inA),"wa" (vec_inB)); -+} -+ -+static void test_xscvdpsxds (void) -+{ -+ __asm__ __volatile__ ("xscvdpsxds %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB)); -+} -+ -+static void test_xscvsxddp (void) -+{ -+ __asm__ __volatile__ ("xscvsxddp %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB)); -+} -+ -+static void test_xscvuxddp (void) -+{ -+ __asm__ __volatile__ ("xscvuxddp %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB)); -+} -+ -+static unsigned int vstg[] __attribute__ ((aligned (16))) = { 0, 0, 0,0, -+ 0, 0, 0, 0 }; -+ -+#define NUM_VSTG_INTS (sizeof vstg/sizeof vstg[0]) -+#define NUM_VSTG_VECS (NUM_VSTG_INTS/4) -+ -+static unsigned int viargs[] __attribute__ ((aligned (16))) = { 0x01234567, -+ 0x89abcdef, -+ 0x00112233, -+ 0x44556677, -+ 0x8899aabb, -+ 0x91929394, -+ 0xa1a2a3a4, -+ 0xb1b2b3b4, -+ 0xc1c2c3c4, -+ 0xd1d2d3d4, -+ 0x7a6b5d3e -+}; -+#define NUM_VIARGS_INTS (sizeof viargs/sizeof viargs[0]) -+#define NUM_VIARGS_VECS (NUM_VIARGS_INTS/4) -+ -+static ldst_test_t ldst_tests[] = { { &test_lxsdx, "lxsdx", viargs, 0, 2, VSX_LOAD }, -+ { &test_lxsdx, "lxsdx", viargs, 4, 2, VSX_LOAD }, -+ { &test_lxvd2x, "lxvd2x", viargs, 0, 4, VSX_LOAD }, -+ { &test_lxvd2x, "lxvd2x", viargs, 4, 4, VSX_LOAD }, -+ { &test_lxvdsx, "lxvdsx", viargs, 0, 4, VSX_LOAD_SPLAT }, -+ { &test_lxvdsx, "lxvdsx", viargs, 4, 4, VSX_LOAD_SPLAT }, -+ { &test_lxvw4x, "lxvw4x", viargs, 0, 4, VSX_LOAD }, -+ { &test_lxvw4x, "lxvw4x", viargs, 4, 4, VSX_LOAD }, -+ { &test_stxsdx, "stxsdx", vstg, 0, 2, VSX_STORE }, -+ { &test_stxsdx, "stxsdx", vstg, 4, 2, VSX_STORE }, -+ { &test_stxvd2x, "stxvd2x", vstg, 0, 4, VSX_STORE }, -+ { &test_stxvd2x, "stxvd2x", vstg, 4, 4, VSX_STORE }, -+ { &test_stxvw4x, "stxvw4x", vstg, 0, 4, VSX_STORE }, -+ { &test_stxvw4x, "stxvw4x", vstg, 4, 4, VSX_STORE }, -+ { NULL, NULL, NULL, 0, 0, 0 } }; -+ -+static logic_test_t logic_tests[] = { { &test_xxlxor, "xxlxor", VSX_XOR }, -+ { &test_xxlor, "xxlor", VSX_OR } , -+ { &test_xxlnor, "xxlnor", VSX_NOR }, -+ { &test_xxland, "xxland", VSX_AND }, -+ { &test_xxlandc, "xxlandc", VSX_ANDC }, -+ { NULL, NULL}}; -+ -+static move_test_t move_tests[] = { { &test_xsabsdp, "xsabsdp", 0, 4, 0x0899aabb91929394ULL }, -+ { &test_xscpsgndp, "xscpsgndp", 4, 0, 0x8123456789abcdefULL }, -+ { &test_xsnabsdp, "xsnabsdp", 7, 3, 0xc45566778899aabbULL, }, -+ { &test_xsnegdp, "xsnegdp", 0, 7, 0x31b2b3b4c1c2c3c4ULL, }, -+ { NULL, NULL, 0, 0, 0 } -+ -+}; -+ -+static permute_test_t permute_tests[] = -+{ -+ { &test_xxmrghw, "xxmrghw", -+ { 0x11111111, 0x22222222, 0x33333333, 0x44444444 }, /* XA input */ -+ { 0x55555555, 0x66666666, 0x77777777, 0x88888888 }, /* XB input */ -+ { 0x11111111, 0x55555555, 0x22222222, 0x66666666 } /* XT expected output */ -+ }, -+ { &test_xxmrghw, "xxmrghw", -+ { 0x00112233, 0x44556677, 0x8899aabb, 0xccddeeff }, /* XA input */ -+ { 0x11111111, 0x22222222, 0x33333333, 0x44444444 }, /* XB input */ -+ { 0x00112233, 0x11111111, 0x44556677, 0x22222222 } /* XT expected output */ -+ }, -+ { &test_xxmrglw, "xxmrglw", -+ { 0x11111111, 0x22222222, 0x33333333, 0x44444444 }, /* XA input */ -+ { 0x55555555, 0x66666666, 0x77777777, 0x88888888 }, /* XB input */ -+ { 0x33333333, 0x77777777, 0x44444444, 0x88888888 } /* XT expected output */ -+ }, -+ { &test_xxmrglw, "xxmrglw", -+ { 0x00112233, 0x44556677, 0x8899aabb, 0xccddeeff}, /* XA input */ -+ { 0x11111111, 0x22222222, 0x33333333, 0x44444444}, /* XB input */ -+ { 0x8899aabb, 0x33333333, 0xccddeeff, 0x44444444} /* XT expected output */ -+ }, -+ { &test_xxpermdi_00, "xxpermdi DM=00", -+ { 0x11111111, 0x22222222, 0x33333333, 0x44444444 }, /* XA input */ -+ { 0x55555555, 0x66666666, 0x77777777, 0x88888888 }, /* XB input */ -+ { 0x11111111, 0x22222222, 0x55555555, 0x66666666 } /* XT expected output */ -+ }, -+ { &test_xxpermdi_01, "xxpermdi DM=01", -+ { 0x11111111, 0x22222222, 0x33333333, 0x44444444 }, /* XA input */ -+ { 0x55555555, 0x66666666, 0x77777777, 0x88888888 }, /* XB input */ -+ { 0x11111111, 0x22222222, 0x77777777, 0x88888888 } /* XT expected output */ -+ }, -+ { &test_xxpermdi_10, "xxpermdi DM=10", -+ { 0x11111111, 0x22222222, 0x33333333, 0x44444444 }, /* XA input */ -+ { 0x55555555, 0x66666666, 0x77777777, 0x88888888 }, /* XB input */ -+ { 0x33333333, 0x44444444, 0x55555555, 0x66666666 } /* XT expected output */ -+ }, -+ { &test_xxpermdi_11, "xxpermdi DM=11", -+ { 0x11111111, 0x22222222, 0x33333333, 0x44444444 }, /* XA input */ -+ { 0x55555555, 0x66666666, 0x77777777, 0x88888888 }, /* XB input */ -+ { 0x33333333, 0x44444444, 0x77777777, 0x88888888 } /* XT expected output */ -+ }, -+ { &test_xxsldwi_0, "xxsldwi SHW=0", -+ { 0x11111111, 0x22222222, 0x33333333, 0x44444444 }, /* XA input */ -+ { 0x55555555, 0x66666666, 0x77777777, 0x88888888 }, /* XB input */ -+ { 0x11111111, 0x22222222, 0x33333333, 0x44444444 } /* XT expected output */ -+ }, -+ { &test_xxsldwi_1, "xxsldwi SHW=1", -+ { 0x11111111, 0x22222222, 0x33333333, 0x44444444 }, /* XA input */ -+ { 0x55555555, 0x66666666, 0x77777777, 0x88888888 }, /* XB input */ -+ { 0x22222222, 0x33333333, 0x44444444, 0x55555555 } /* XT expected output */ -+ }, -+ { &test_xxsldwi_2, "xxsldwi SHW=2", -+ { 0x11111111, 0x22222222, 0x33333333, 0x44444444 }, /* XA input */ -+ { 0x55555555, 0x66666666, 0x77777777, 0x88888888 }, /* XB input */ -+ { 0x33333333, 0x44444444, 0x55555555, 0x66666666 } /* XT expected output */ -+ }, -+ { &test_xxsldwi_3, "xxsldwi SHW=3", -+ { 0x11111111, 0x22222222, 0x33333333, 0x44444444 }, /* XA input */ -+ { 0x55555555, 0x66666666, 0x77777777, 0x88888888 }, /* XB input */ -+ { 0x44444444, 0x55555555, 0x66666666, 0x77777777 } /* XT expected output */ -+ }, -+ { NULL, NULL } -+}; -+ -+static fp_test_t fp_tests[] = { { &test_fcfids, "fcfids", 1 }, -+ { &test_fcfidus, "fcfidus", 1 }, -+ { &test_fcfidu, "fcfidu", 1 }, -+ { NULL, NULL, 0 }, -+ -+}; -+ -+static vx_fp_test_t vx_fp_tests[] = { -+ { &test_xscmp, "xscmp", xscmpX_tests, 64, VX_FP_CMP}, -+ { &test_xsadddp, "xsadddp", xsadddp_tests, 64, VX_FP_OTHER}, -+ { &test_xsdivdp, "xsdivdp", xsdivdp_tests, 64, VX_FP_OTHER}, -+ { &test_xsmadd, "xsmadd", xsmaddXdp_tests, 64, VX_FP_SMA}, -+ { &test_xsmsub, "xsmsub", xsmsubXdp_tests, 64, VX_FP_SMS}, -+ { &test_xsnmadd, "xsnmadd", xsnmaddXdp_tests, 64, VX_FP_SNMA}, -+ { & test_xsmuldp, "xsmuldp", xsmuldp_tests, 64, VX_FP_OTHER}, -+ { & test_xssubdp, "xssubdp", xssubdp_tests, 64, VX_FP_OTHER}, -+ { NULL, NULL, NULL, 0, 0 } -+}; -+ -+static xs_conv_test_t xs_conv_tests[] = { -+ { &test_xscvdpsxds, "xscvdpsxds", xscvdpsxds_results, 15}, -+ { &test_xscvsxddp, "xscvsxddp", xscvsxddp_results, 15}, -+ { &test_xscvuxddp, "xscvuxddp", xscvuxddp_results, 15}, -+ { NULL, NULL, NULL, 0} -+}; -+ -+#ifdef __powerpc64__ -+static void test_ldbrx(void) -+{ -+ int i, equality; -+ HWord_t reg_out; -+ unsigned char * byteIn, * byteOut; -+ r14 = (HWord_t)viargs; -+ // Just try the instruction an arbitrary number of times at different r15 offsets. -+ for (i = 0; i < 3; i++) { -+ int j, k; -+ reg_out = 0; -+ r15 = i * 4; -+ equality = 1; -+ __asm__ __volatile__ ("ldbrx %0, %1, %2" : "=r" (reg_out): "b" (r14),"r" (r15)); -+ byteIn = ((unsigned char *)(r14 + r15)); -+ byteOut = (unsigned char *)®_out; -+ -+ printf("ldbrx:"); -+ for (k = 0; k < 7; k++) { -+ printf( " %02x", (byteIn[k])); -+ } -+ printf(" (reverse) =>"); -+ for (j = 0; j < 8; j++) { -+ printf( " %02x", (byteOut[j])); -+ } -+ printf("\n"); -+ for (j = 0, k = 7; j < 8; j++, k--) { -+ equality &= (byteIn[k] == byteOut[j]); -+ } -+ if (!equality) { -+ printf("FAILED: load with byte reversal is incorrect\n"); -+ errors++; -+ } -+ } -+ printf( "\n" ); -+} -+ -+static void -+test_popcntd(void) -+{ -+ uint64_t res; -+ unsigned long long src = 0x9182736405504536ULL; -+ int i, answer = 0; -+ r14 = src; -+ __asm__ __volatile__ ("popcntd %0, %1" : "=r" (res): "r" (r14)); -+ for (i = 0; i < 64; i++) { -+ answer += (r14 & 1ULL); -+ r14 = r14 >> 1; -+ } -+ printf("popcntd: 0x%llx => %d\n", src, (int)res); -+ if (res!= answer) { -+ printf("Error: unexpected result from popcntd\n"); -+ errors++; -+ } -+ printf( "\n" ); -+} -+#endif -+ -+static void -+test_lfiwzx(void) -+{ -+ unsigned int i; -+ unsigned int * src; -+ uint64_t reg_out; -+ r14 = (HWord_t)viargs; -+ // Just try the instruction an arbitrary number of times at different r15 offsets. -+ for (i = 0; i < 3; i++) { -+ reg_out = 0; -+ r15 = i * 4; -+ __asm__ __volatile__ ("lfiwzx %0, %1, %2" : "=d" (reg_out): "b" (r14),"r" (r15)); -+ src = ((unsigned int *)(r14 + r15)); -+ printf("lfiwzx: %u => %llu.00\n", *src, (unsigned long long)reg_out); -+ -+ if (reg_out > 0xFFFFFFFFULL || *src != (unsigned int)reg_out) { -+ printf("FAILED: integer load to FP register is incorrect\n"); -+ errors++; -+ } -+ } -+ printf( "\n" ); -+} -+ -+static void test_vx_fp_ops(void) -+{ -+ -+ test_func_t func; -+ int k; -+ char * test_name = (char *)malloc(20); -+ k = 0; -+ -+ build_special_fargs_table(); -+ while ((func = vx_fp_tests[k].test_func)) { -+ int i, condreg, repeat = 0; -+ unsigned int flags; -+ unsigned long long * frap, * frbp, * dst; -+ vx_fp_test_t test_group = vx_fp_tests[k]; -+ vx_fp_test_type test_type = test_group.test_type; -+ -+ switch (test_type) { -+ case VX_FP_CMP: -+ strcpy(test_name, "xscmp"); -+ if (!repeat) { -+ repeat = 1; -+ strcat(test_name, "udp"); -+ do_cmpudp = 1; -+ } -+ break; -+ case VX_FP_SMA: -+ case VX_FP_SMS: -+ case VX_FP_SNMA: -+ if (test_type == VX_FP_SMA) -+ strcpy(test_name, "xsmadd"); -+ else if (test_type == VX_FP_SMS) -+ strcpy(test_name, "xsmsub"); -+ else -+ strcpy(test_name, "xsnmadd"); -+ if (!repeat) { -+ repeat = 1; -+ strcat(test_name, "adp"); -+ do_adp = 1; -+ } -+ break; -+ case VX_FP_OTHER: -+ strcpy(test_name, test_group.name); -+ break; -+ default: -+ printf("ERROR: Invalid VX FP test type %d\n", test_type); -+ exit(1); -+ } -+ -+again: -+ for (i = 0; i < test_group.num_tests; i++) { -+ unsigned int * inA, * inB, * pv; -+ -+ fp_test_args_t aTest = test_group.targs[i]; -+ inA = (unsigned int *)&spec_fargs[aTest.fra_idx]; -+ inB = (unsigned int *)&spec_fargs[aTest.frb_idx]; -+ frap = (unsigned long long *)&spec_fargs[aTest.fra_idx]; -+ frbp = (unsigned long long *)&spec_fargs[aTest.frb_idx]; -+ // Only need to copy one doubleword into each vector's element 0 -+ memcpy(&vec_inA, inA, 8); -+ memcpy(&vec_inB, inB, 8); -+ -+ switch (test_type) { -+ case VX_FP_CMP: -+ SET_FPSCR_ZERO; -+ SET_CR_XER_ZERO; -+ (*func)(); -+ GET_CR(flags); -+ condreg = (flags & 0x0f000000) >> 24; -+ printf("#%d: %s %016llx <=> %016llx ? %x (CRx)\n", i, test_name, *frap, *frbp, condreg); -+ // printf("\tFRA: %e; FRB: %e\n", spec_fargs[aTest.fra_idx], spec_fargs[aTest.frb_idx]); -+ if ( condreg != aTest.cr_flags) { -+ printf("Error: Expected CR flags 0x%x; actual flags: 0x%x\n", aTest.cr_flags, condreg); -+ errors++; -+ } -+ break; -+ case VX_FP_SMA: -+ case VX_FP_SMS: -+ case VX_FP_SNMA: -+ case VX_FP_OTHER: -+ { -+ int idx; -+ unsigned long long vsr_XT; -+ pv = (unsigned int *)&vec_out; -+ // clear vec_out -+ for (idx = 0; idx < 4; idx++, pv++) -+ *pv = 0; -+ -+ if (test_type != VX_FP_OTHER) { -+ /* Then we need a third src argument, which is stored in element 0 of -+ * VSX[XT] -- i.e., vec_out. For the xsmdp cases, VSX[XT] holds -+ * src3 and VSX[XB] holds src2; for the xsadp cases, VSX[XT] holds -+ * src2 and VSX[XB] holds src3. The fp_test_args_t that holds the test -+ * data (input args, result) contain only two inputs, so I arbitrarily -+ * use spec_fargs elements 4 and 14 (alternating) for the third source -+ * argument. We can use the same input data for a given pair of -+ * adp/mdp-type instructions by swapping the src2 and src3 arguments; thus -+ * the expected result should be the same. -+ */ -+ int extra_arg_idx; -+ if (i % 2) -+ extra_arg_idx = 4; -+ else -+ extra_arg_idx = 14; -+ -+ //memcpy(&vec_out, &spec_fargs[14], 8); -+ -+ if (repeat) { -+ /* We're on the first time through of one of the VX_FP_SMx -+ * test types, meaning we're testing a xsadp case, thus we -+ * have to swap inputs as described above: -+ * src2 <= VSX[XT] -+ * src3 <= VSX[XB] -+ */ -+ memcpy(&vec_out, inB, 8); // src2 -+ memcpy(&vec_inB, &spec_fargs[extra_arg_idx], 8); //src3 -+ frbp = (unsigned long long *)&spec_fargs[extra_arg_idx]; -+ } else { -+ // Don't need to init src2, as it's done before the switch() -+ memcpy(&vec_out, &spec_fargs[extra_arg_idx], 8); //src3 -+ } -+ memcpy(&vsr_XT, &vec_out, 8); -+ } -+ -+ (*func)(); -+ dst = (unsigned long long *) &vec_out; -+ if (test_type == VX_FP_OTHER) -+ printf("#%d: %s %016llx %016llx = %016llx\n", i, test_name, *frap, *frbp, *dst); -+ else -+ printf( "#%d: %s %016llx %016llx %016llx = %016llx\n", i, -+ test_name, vsr_XT, *frap, *frbp, *dst ); -+ -+ if ( *dst != aTest.dp_bin_result) { -+ printf("Error: Expected result %016llx; actual result %016llx\n", aTest.dp_bin_result, *dst); -+ errors++; -+ } -+ /* -+ { -+ // Debug code. Keep this block commented out except when debugging. -+ double result, expected; -+ memcpy(&result, dst, 8); -+ memcpy(&expected, &aTest.dp_bin_result, 8); -+ printf( "\tFRA + FRB: %e + %e: Expected = %e; Actual = %e\n", -+ spec_fargs[aTest.fra_idx], spec_fargs[aTest.frb_idx], -+ expected, result ); -+ } -+ */ -+ break; -+ } -+ } -+ -+ -+ } -+ printf( "\n" ); -+ -+ if (repeat) { -+ repeat = 0; -+ switch (test_type) { -+ case VX_FP_CMP: -+ strcpy(test_name, "xscmp"); -+ strcat(test_name, "odp"); -+ do_cmpudp = 0; -+ break; -+ case VX_FP_SMA: -+ case VX_FP_SMS: -+ case VX_FP_SNMA: -+ if (test_type == VX_FP_SMA) -+ strcpy(test_name, "xsmadd"); -+ else if (test_type == VX_FP_SMS) -+ strcpy(test_name, "xsmsub"); -+ else -+ strcpy(test_name, "xsnmadd"); -+ strcat(test_name, "mdp"); -+ do_adp = 0; -+ break; -+ case VX_FP_OTHER: -+ break; -+ } -+ goto again; -+ } -+ k++; -+ } -+ printf( "\n" ); -+ free(test_name); -+} -+ -+static void test_xs_conv_ops(void) -+{ -+ -+ test_func_t func; -+ int k = 0; -+ -+ build_special_fargs_table(); -+ while ((func = xs_conv_tests[k].test_func)) { -+ int i; -+ unsigned long long * frbp, * dst; -+ xs_conv_test_t test_group = xs_conv_tests[k]; -+ for (i = 0; i < test_group.num_tests; i++) { -+ unsigned int * inB, * pv; -+ int idx; -+ unsigned long long exp_result = test_group.results[i]; -+ inB = (unsigned int *)&spec_fargs[i]; -+ frbp = (unsigned long long *)&spec_fargs[i]; -+ memcpy(&vec_inB, inB, 8); -+ pv = (unsigned int *)&vec_out; -+ // clear vec_out -+ for (idx = 0; idx < 4; idx++, pv++) -+ *pv = 0; -+ (*func)(); -+ dst = (unsigned long long *) &vec_out; -+ printf("#%d: %s %016llx => %016llx\n", i, test_group.name, *frbp, *dst); -+ -+ if ( *dst != exp_result) { -+ printf("Error: Expected result %016llx; actual result %016llx\n", exp_result, *dst); -+ errors++; -+ } -+ } -+ k++; -+ printf("\n"); -+ } -+ printf( "\n" ); -+} -+ -+static void do_load_test(ldst_test_t loadTest) -+{ -+ test_func_t func; -+ unsigned int *src, *dst; -+ int splat = loadTest.type == VSX_LOAD_SPLAT ? 1: 0; -+ int i, j, m, equality; -+ i = j = 0; -+ -+ func = loadTest.test_func; -+ for (i = 0, r14 = (HWord_t) loadTest.base_addr; i < NUM_VIARGS_VECS; i++) { -+ int again; -+ j = 0; -+ r14 += i * 16; -+ do { -+ unsigned int * pv = (unsigned int *)&vec_out; -+ int idx; -+ // clear vec_out -+ for (idx = 0; idx < 4; idx++, pv+=idx) -+ *pv = 0; -+ -+ again = 0; -+ r15 = j; -+ -+ // execute test insn -+ (*func)(); -+ -+ src = (unsigned int*) (((unsigned char *)r14) + j); -+ dst = (unsigned int*) &vec_out; -+ -+ printf( "%s:", loadTest.name); -+ for (m = 0; m < loadTest.num_words_to_process; m++) { -+ printf( " %08x", src[splat ? m % 2 : m]); -+ } -+ printf( " =>"); -+ for (m = 0; m < loadTest.num_words_to_process; m++) { -+ printf( " %08x", dst[m]); -+ } -+ printf("\n"); -+ equality = 1; -+ for (m = 0; m < loadTest.num_words_to_process; m++) { -+ equality = equality && (src[splat ? m % 2 : m] == dst[m]); -+ } -+ -+ if (!equality) { -+ printf("FAILED: loaded vector is incorrect\n"); -+ errors++; -+ } -+ -+ if (j == 0 && loadTest.offset) { -+ again = 1; -+ j += loadTest.offset; -+ } -+ } -+ while (again); -+ } -+} -+ -+static void -+do_store_test ( ldst_test_t storeTest ) -+{ -+ test_func_t func; -+ unsigned int *src, *dst; -+ int i, j, m, equality; -+ i = j = 0; -+ -+ func = storeTest.test_func; -+ r14 = (HWord_t) storeTest.base_addr; -+ r15 = (HWord_t) storeTest.offset; -+ unsigned int * pv = (unsigned int *) storeTest.base_addr; -+ int idx; -+ // clear out storage destination -+ for (idx = 0; idx < 4; idx++, pv += idx) -+ *pv = 0; -+ -+ memcpy(&vec_inA, &viargs[0], sizeof(vector unsigned char)); -+ -+ // execute test insn -+ (*func)(); -+ src = &viargs[0]; -+ dst = (unsigned int*) (((unsigned char *) r14) + storeTest.offset); -+ -+ printf( "%s:", storeTest.name ); -+ for (m = 0; m < storeTest.num_words_to_process; m++) { -+ printf( " %08x", src[m] ); -+ } -+ printf( " =>" ); -+ for (m = 0; m < storeTest.num_words_to_process; m++) { -+ printf( " %08x", dst[m] ); -+ } -+ printf( "\n" ); -+ equality = 1; -+ for (m = 0; m < storeTest.num_words_to_process; m++) { -+ equality = equality && (src[m] == dst[m]); -+ } -+ -+ if (!equality) { -+ printf( "FAILED: vector store result is incorrect\n" ); -+ errors++; -+ } -+ -+} -+ -+ -+static void test_ldst(void) -+{ -+ int k = 0; -+ -+ while (ldst_tests[k].test_func) { -+ if (ldst_tests[k].type == VSX_STORE) -+ do_store_test(ldst_tests[k]); -+ else -+ do_load_test(ldst_tests[k]); -+ k++; -+ printf("\n"); -+ } -+} -+ -+static void test_ftdiv(void) -+{ -+ int i, num_tests, crx; -+ unsigned int flags; -+ unsigned long long * frap, * frbp; -+ build_special_fargs_table(); -+ -+ num_tests = sizeof ftdiv_tests/sizeof ftdiv_tests[0]; -+ -+ for (i = 0; i < num_tests; i++) { -+ ftdiv_test_args_t aTest = ftdiv_tests[i]; -+ f14 = spec_fargs[aTest.fra_idx]; -+ f15 = spec_fargs[aTest.frb_idx]; -+ frap = (unsigned long long *)&spec_fargs[aTest.fra_idx]; -+ frbp = (unsigned long long *)&spec_fargs[aTest.frb_idx]; -+ SET_FPSCR_ZERO; -+ SET_CR_XER_ZERO; -+ __asm__ __volatile__ ("ftdiv cr1, %0, %1" : : "d" (f14), "d" (f15)); -+ GET_CR(flags); -+ crx = (flags & 0x0f000000) >> 24; -+ printf( "ftdiv: %016llx <=> %016llx ? %x (CRx)\n", *frap, *frbp, crx); -+// printf("\tFRA: %e; FRB: %e\n", f14, f15); -+ if ( crx != aTest.cr_flags) { -+ printf("Error: Expected CR flags 0x%x; actual flags: 0x%x\n", aTest.cr_flags, crx); -+ errors++; -+ } -+ } -+ printf( "\n" ); -+} -+ -+ -+static void test_p7_fpops ( void ) -+{ -+ int k = 0; -+ test_func_t func; -+ -+ build_fargs_table(); -+ while ((func = fp_tests[k].test_func)) { -+ float res; -+ double resd; -+ unsigned long long u0; -+ int i; -+ int res32 = strcmp(fp_tests[k].name, "fcfidu"); -+ -+ for (i = 0; i < nb_fargs; i++) { -+ u0 = *(unsigned long long *) (&fargs[i]); -+ f14 = fargs[i]; -+ (*func)(); -+ if (res32) { -+ res = f17; -+ printf( "%s %016llx => (raw sp) %08x)", -+ fp_tests[k].name, u0, *((unsigned int *)&res)); -+ } else { -+ resd = f17; -+ printf( "%s %016llx => (raw sp) %016llx)", -+ fp_tests[k].name, u0, *(unsigned long long *)(&resd)); -+ } -+ printf( "\n" ); -+ } -+ -+ k++; -+ printf( "\n" ); -+ } -+} -+ -+static void test_vsx_logic(void) -+{ -+ logic_test_t aTest; -+ test_func_t func; -+ int equality, k; -+ k = 0; -+ -+ while ((func = logic_tests[k].test_func)) { -+ unsigned int * pv; -+ int startA, startB; -+ unsigned int * inA, * inB, * dst; -+ int idx, i; -+ startA = 0; -+ aTest = logic_tests[k]; -+ for (i = 0; i <= (NUM_VIARGS_INTS - (NUM_VIARGS_VECS * sizeof(int))); i++, startA++) { -+ startB = startA + 4; -+ pv = (unsigned int *)&vec_out; -+ inA = &viargs[startA]; -+ inB = &viargs[startB]; -+ memcpy(&vec_inA, inA, sizeof(vector unsigned char)); -+ memcpy(&vec_inB, inB, sizeof(vector unsigned char)); -+ // clear vec_out -+ for (idx = 0; idx < 4; idx++, pv++) -+ *pv = 0; -+ -+ // execute test insn -+ (*func)(); -+ dst = (unsigned int*) &vec_out; -+ -+ printf( "%s:", aTest.name); -+ printf( " %08x %08x %08x %08x %s", inA[0], inA[1], inA[2], inA[3], aTest.name); -+ printf( " %08x %08x %08x %08x", inB[0], inB[1], inB[2], inB[3]); -+ printf(" => %08x %08x %08x %08x\n", dst[0], dst[1], dst[2], dst[3]); -+ -+ equality = 1; -+ for (idx = 0; idx < 4; idx++) { -+ switch (aTest.op) { -+ case VSX_AND: -+ equality &= (dst[idx] == (inA[idx] & inB[idx])); -+ break; -+ case VSX_ANDC: -+ equality &= (dst[idx] == (inA[idx] & ~inB[idx])); -+ break; -+ case VSX_NOR: -+ equality &= (dst[idx] == ~(inA[idx] | inB[idx])); -+ break; -+ case VSX_XOR: -+ equality &= (dst[idx] == (inA[idx] ^ inB[idx])); -+ break; -+ case VSX_OR: -+ equality &= (dst[idx] == (inA[idx] | inB[idx])); -+ break; -+ default: -+ fprintf(stderr, "Error in test_vsx_logic(): unknown VSX logical op %d\n", aTest.op); -+ exit(1); -+ } -+ } -+ if (!equality) { -+ printf( "FAILED: vector out is incorrect\n" ); -+ errors++; -+ } -+ } -+ k++; -+ } -+ printf( "\n" ); -+} -+ -+static void test_move_ops (void) -+{ -+ move_test_t aTest; -+ test_func_t func; -+ int equality, k; -+ k = 0; -+ -+ while ((func = move_tests[k].test_func)) { -+ unsigned int * pv; -+ int startA, startB; -+ unsigned int * inA, * inB, * dst; -+ unsigned long long exp_out; -+ int idx; -+ aTest = move_tests[k]; -+ exp_out = aTest.expected_result; -+ startA = aTest.xa_idx; -+ startB = aTest.xb_idx; -+ pv = (unsigned int *)&vec_out; -+ inA = &viargs[startA]; -+ inB = &viargs[startB]; -+ memcpy(&vec_inA, inA, sizeof(vector unsigned char)); -+ memcpy(&vec_inB, inB, sizeof(vector unsigned char)); -+ // clear vec_out -+ for (idx = 0; idx < 4; idx++, pv++) -+ *pv = 0; -+ -+ // execute test insn -+ (*func)(); -+ dst = (unsigned int*) &vec_out; -+ -+ printf( "%s:", aTest.name); -+ printf( " %08x %08x %s", inA[0], inA[1], aTest.name); -+ printf( " %08x %08xx", inB[0], inB[1]); -+ printf(" => %08x %08x\n", dst[0], dst[1]); -+ -+ equality = 1; -+ pv = (unsigned int *)&exp_out; -+ for (idx = 0; idx < 2; idx++) { -+ equality &= (dst[idx] == pv[idx]); -+ } -+ if (!equality) { -+ printf( "FAILED: vector out is incorrect\n" ); -+ errors++; -+ } -+ k++; -+ printf( "\n" ); -+ } -+} -+ -+static void test_permute_ops (void) -+{ -+ permute_test_t *aTest; -+ unsigned int *dst = (unsigned int *) &vec_out; -+ -+ for (aTest = &(permute_tests[0]); aTest->test_func != NULL; aTest++) -+ { -+ /* Grab test input and clear output vector. */ -+ memcpy(&vec_inA, aTest->xa, sizeof(vec_inA)); -+ memcpy(&vec_inB, aTest->xb, sizeof(vec_inB)); -+ memset(dst, 0, sizeof(vec_out)); -+ -+ /* execute test insn */ -+ aTest->test_func(); -+ -+ printf( "%s:\n", aTest->name); -+ printf( " XA[%08x,%08x,%08x,%08x]\n", -+ aTest->xa[0], aTest->xa[1], aTest->xa[2], aTest->xa[3]); -+ printf( " XB[%08x,%08x,%08x,%08x]\n", -+ aTest->xb[0], aTest->xb[1], aTest->xb[2], aTest->xb[3]); -+ printf( " => XT[%08x,%08x,%08x,%08x]\n", -+ dst[0], dst[1], dst[2], dst[3]); -+ -+ if (memcmp (dst, &aTest->expected_output, sizeof(vec_out))) -+ { -+ printf( "FAILED: vector out is incorrect\n" ); -+ errors++; -+ } -+ } -+ printf( "\n" ); -+} -+ -+static test_table_t all_tests[] = { { &test_ldst, -+ "Test VSX load/store instructions" }, -+ { &test_vsx_logic, -+ "Test VSX logic instructions" }, -+#ifdef __powerpc64__ -+ { &test_ldbrx, -+ "Test ldbrx instruction" }, -+ { &test_popcntd, -+ "Test popcntd instruction" }, -+#endif -+ { &test_lfiwzx, -+ "Test lfiwzx instruction" }, -+ { &test_p7_fpops, -+ "Test P7 floating point convert instructions"}, -+ { &test_ftdiv, -+ "Test ftdiv instruction" }, -+ { &test_move_ops, -+ "Test VSX move instructions"}, -+ { &test_permute_ops, -+ "Test VSX permute instructions"}, -+ { &test_vx_fp_ops, -+ "Test VSX floating point instructions"}, -+ { &test_xs_conv_ops, -+ "Test VSX scalar integer conversion instructions" }, -+ { NULL, NULL } -+}; -+#endif // HAS_VSX -+ -+int main(int argc, char *argv[]) -+{ -+#ifdef HAS_VSX -+ -+ test_table_t aTest; -+ test_func_t func; -+ int i = 0; -+ -+ while ((func = all_tests[i].test_category)) { -+ aTest = all_tests[i]; -+ printf( "%s\n", aTest.name ); -+ (*func)(); -+ i++; -+ } -+ if (errors) -+ printf("Testcase FAILED with %d errors \n", errors); -+ else -+ printf("Testcase PASSED\n"); -+ -+#endif // HAS _VSX -+ -+ return 0; -+} -Index: none/tests/ppc64/test_isa_2_06_part1.stderr.exp -=================================================================== ---- /dev/null -+++ none/tests/ppc64/test_isa_2_06_part1.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ -Index: none/tests/ppc64/test_isa_2_06_part1.stdout.exp -=================================================================== ---- /dev/null -+++ none/tests/ppc64/test_isa_2_06_part1.stdout.exp -@@ -0,0 +1,1031 @@ -+Test VSX load/store instructions -+lxsdx: 01234567 89abcdef => 01234567 89abcdef -+lxsdx: 8899aabb 91929394 => 8899aabb 91929394 -+ -+lxsdx: 01234567 89abcdef => 01234567 89abcdef -+lxsdx: 89abcdef 00112233 => 89abcdef 00112233 -+lxsdx: 8899aabb 91929394 => 8899aabb 91929394 -+lxsdx: 91929394 a1a2a3a4 => 91929394 a1a2a3a4 -+ -+lxvd2x: 01234567 89abcdef 00112233 44556677 => 01234567 89abcdef 00112233 44556677 -+lxvd2x: 8899aabb 91929394 a1a2a3a4 b1b2b3b4 => 8899aabb 91929394 a1a2a3a4 b1b2b3b4 -+ -+lxvd2x: 01234567 89abcdef 00112233 44556677 => 01234567 89abcdef 00112233 44556677 -+lxvd2x: 89abcdef 00112233 44556677 8899aabb => 89abcdef 00112233 44556677 8899aabb -+lxvd2x: 8899aabb 91929394 a1a2a3a4 b1b2b3b4 => 8899aabb 91929394 a1a2a3a4 b1b2b3b4 -+lxvd2x: 91929394 a1a2a3a4 b1b2b3b4 c1c2c3c4 => 91929394 a1a2a3a4 b1b2b3b4 c1c2c3c4 -+ -+lxvdsx: 01234567 89abcdef 01234567 89abcdef => 01234567 89abcdef 01234567 89abcdef -+lxvdsx: 8899aabb 91929394 8899aabb 91929394 => 8899aabb 91929394 8899aabb 91929394 -+ -+lxvdsx: 01234567 89abcdef 01234567 89abcdef => 01234567 89abcdef 01234567 89abcdef -+lxvdsx: 89abcdef 00112233 89abcdef 00112233 => 89abcdef 00112233 89abcdef 00112233 -+lxvdsx: 8899aabb 91929394 8899aabb 91929394 => 8899aabb 91929394 8899aabb 91929394 -+lxvdsx: 91929394 a1a2a3a4 91929394 a1a2a3a4 => 91929394 a1a2a3a4 91929394 a1a2a3a4 -+ -+lxvw4x: 01234567 89abcdef 00112233 44556677 => 01234567 89abcdef 00112233 44556677 -+lxvw4x: 8899aabb 91929394 a1a2a3a4 b1b2b3b4 => 8899aabb 91929394 a1a2a3a4 b1b2b3b4 -+ -+lxvw4x: 01234567 89abcdef 00112233 44556677 => 01234567 89abcdef 00112233 44556677 -+lxvw4x: 89abcdef 00112233 44556677 8899aabb => 89abcdef 00112233 44556677 8899aabb -+lxvw4x: 8899aabb 91929394 a1a2a3a4 b1b2b3b4 => 8899aabb 91929394 a1a2a3a4 b1b2b3b4 -+lxvw4x: 91929394 a1a2a3a4 b1b2b3b4 c1c2c3c4 => 91929394 a1a2a3a4 b1b2b3b4 c1c2c3c4 -+ -+stxsdx: 01234567 89abcdef => 01234567 89abcdef -+ -+stxsdx: 01234567 89abcdef => 01234567 89abcdef -+ -+stxvd2x: 01234567 89abcdef 00112233 44556677 => 01234567 89abcdef 00112233 44556677 -+ -+stxvd2x: 01234567 89abcdef 00112233 44556677 => 01234567 89abcdef 00112233 44556677 -+ -+stxvw4x: 01234567 89abcdef 00112233 44556677 => 01234567 89abcdef 00112233 44556677 -+ -+stxvw4x: 01234567 89abcdef 00112233 44556677 => 01234567 89abcdef 00112233 44556677 -+ -+Test VSX logic instructions -+xxlxor: 01234567 89abcdef 00112233 44556677 xxlxor 8899aabb 91929394 a1a2a3a4 b1b2b3b4 => 89baefdc 18395e7b a1b38197 f5e7d5c3 -+xxlxor: 89abcdef 00112233 44556677 8899aabb xxlxor 91929394 a1a2a3a4 b1b2b3b4 c1c2c3c4 => 18395e7b a1b38197 f5e7d5c3 495b697f -+xxlxor: 00112233 44556677 8899aabb 91929394 xxlxor a1a2a3a4 b1b2b3b4 c1c2c3c4 d1d2d3d4 => a1b38197 f5e7d5c3 495b697f 40404040 -+xxlxor: 44556677 8899aabb 91929394 a1a2a3a4 xxlxor b1b2b3b4 c1c2c3c4 d1d2d3d4 7a6b5d3e => f5e7d5c3 495b697f 40404040 dbc9fe9a -+xxlor: 01234567 89abcdef 00112233 44556677 xxlor 8899aabb 91929394 a1a2a3a4 b1b2b3b4 => 89bbefff 99bbdfff a1b3a3b7 f5f7f7f7 -+xxlor: 89abcdef 00112233 44556677 8899aabb xxlor 91929394 a1a2a3a4 b1b2b3b4 c1c2c3c4 => 99bbdfff a1b3a3b7 f5f7f7f7 c9dbebff -+xxlor: 00112233 44556677 8899aabb 91929394 xxlor a1a2a3a4 b1b2b3b4 c1c2c3c4 d1d2d3d4 => a1b3a3b7 f5f7f7f7 c9dbebff d1d2d3d4 -+xxlor: 44556677 8899aabb 91929394 a1a2a3a4 xxlor b1b2b3b4 c1c2c3c4 d1d2d3d4 7a6b5d3e => f5f7f7f7 c9dbebff d1d2d3d4 fbebffbe -+xxlnor: 01234567 89abcdef 00112233 44556677 xxlnor 8899aabb 91929394 a1a2a3a4 b1b2b3b4 => 76441000 66442000 5e4c5c48 0a080808 -+xxlnor: 89abcdef 00112233 44556677 8899aabb xxlnor 91929394 a1a2a3a4 b1b2b3b4 c1c2c3c4 => 66442000 5e4c5c48 0a080808 36241400 -+xxlnor: 00112233 44556677 8899aabb 91929394 xxlnor a1a2a3a4 b1b2b3b4 c1c2c3c4 d1d2d3d4 => 5e4c5c48 0a080808 36241400 2e2d2c2b -+xxlnor: 44556677 8899aabb 91929394 a1a2a3a4 xxlnor b1b2b3b4 c1c2c3c4 d1d2d3d4 7a6b5d3e => 0a080808 36241400 2e2d2c2b 04140041 -+xxland: 01234567 89abcdef 00112233 44556677 xxland 8899aabb 91929394 a1a2a3a4 b1b2b3b4 => 00010023 81828184 00002220 00102234 -+xxland: 89abcdef 00112233 44556677 8899aabb xxland 91929394 a1a2a3a4 b1b2b3b4 c1c2c3c4 => 81828184 00002220 00102234 80808280 -+xxland: 00112233 44556677 8899aabb 91929394 xxland a1a2a3a4 b1b2b3b4 c1c2c3c4 d1d2d3d4 => 00002220 00102234 80808280 91929394 -+xxland: 44556677 8899aabb 91929394 a1a2a3a4 xxland b1b2b3b4 c1c2c3c4 d1d2d3d4 7a6b5d3e => 00102234 80808280 91929394 20220124 -+xxlandc: 01234567 89abcdef 00112233 44556677 xxlandc 8899aabb 91929394 a1a2a3a4 b1b2b3b4 => 01224544 08294c6b 00110013 44454443 -+xxlandc: 89abcdef 00112233 44556677 8899aabb xxlandc 91929394 a1a2a3a4 b1b2b3b4 c1c2c3c4 => 08294c6b 00110013 44454443 0819283b -+xxlandc: 00112233 44556677 8899aabb 91929394 xxlandc a1a2a3a4 b1b2b3b4 c1c2c3c4 d1d2d3d4 => 00110013 44454443 0819283b 00000000 -+xxlandc: 44556677 8899aabb 91929394 a1a2a3a4 xxlandc b1b2b3b4 c1c2c3c4 d1d2d3d4 7a6b5d3e => 44454443 0819283b 00000000 8180a280 -+ -+Test ldbrx instruction -+ldbrx: 01 23 45 67 89 ab cd (reverse) => ef cd ab 89 67 45 23 01 -+ldbrx: 89 ab cd ef 00 11 22 (reverse) => 33 22 11 00 ef cd ab 89 -+ldbrx: 00 11 22 33 44 55 66 (reverse) => 77 66 55 44 33 22 11 00 -+ -+Test popcntd instruction -+popcntd: 0x9182736405504536 => 24 -+ -+Test lfiwzx instruction -+lfiwzx: 19088743 => 19088743.00 -+lfiwzx: 2309737967 => 2309737967.00 -+lfiwzx: 1122867 => 1122867.00 -+ -+Test P7 floating point convert instructions -+fcfids 0010000000000001 => (raw sp) 59800000) -+fcfids 00100094e0000359 => (raw sp) 598004a7) -+fcfids 3fe0000000000001 => (raw sp) 5e7f8000) -+fcfids 3fe00094e0000359 => (raw sp) 5e7f8002) -+fcfids 8010000000000001 => (raw sp) deffe000) -+fcfids 80100094e0000359 => (raw sp) deffdfff) -+fcfids bfe0000000000001 => (raw sp) de804000) -+fcfids bfe00094e0000359 => (raw sp) de803fff) -+fcfids 0020000000000b01 => (raw sp) 5a000000) -+fcfids 00000000203f0b3d => (raw sp) 4e00fc2d) -+fcfids 00000000005a203d => (raw sp) 4ab4407a) -+fcfids 8020000000000b01 => (raw sp) deffc000) -+fcfids 80000000203f0b3d => (raw sp) df000000) -+ -+fcfidus 0010000000000001 => (raw sp) 59800000) -+fcfidus 00100094e0000359 => (raw sp) 598004a7) -+fcfidus 3fe0000000000001 => (raw sp) 5e7f8000) -+fcfidus 3fe00094e0000359 => (raw sp) 5e7f8002) -+fcfidus 8010000000000001 => (raw sp) 5f001000) -+fcfidus 80100094e0000359 => (raw sp) 5f001001) -+fcfidus bfe0000000000001 => (raw sp) 5f3fe000) -+fcfidus bfe00094e0000359 => (raw sp) 5f3fe001) -+fcfidus 0020000000000b01 => (raw sp) 5a000000) -+fcfidus 00000000203f0b3d => (raw sp) 4e00fc2d) -+fcfidus 00000000005a203d => (raw sp) 4ab4407a) -+fcfidus 8020000000000b01 => (raw sp) 5f002000) -+fcfidus 80000000203f0b3d => (raw sp) 5f000000) -+ -+fcfidu 0010000000000001 => (raw sp) 4330000000000001) -+fcfidu 00100094e0000359 => (raw sp) 43300094e0000359) -+fcfidu 3fe0000000000001 => (raw sp) 43cff00000000000) -+fcfidu 3fe00094e0000359 => (raw sp) 43cff0004a700002) -+fcfidu 8010000000000001 => (raw sp) 43e0020000000000) -+fcfidu 80100094e0000359 => (raw sp) 43e00200129c0000) -+fcfidu bfe0000000000001 => (raw sp) 43e7fc0000000000) -+fcfidu bfe00094e0000359 => (raw sp) 43e7fc00129c0000) -+fcfidu 0020000000000b01 => (raw sp) 4340000000000580) -+fcfidu 00000000203f0b3d => (raw sp) 41c01f859e800000) -+fcfidu 00000000005a203d => (raw sp) 4156880f40000000) -+fcfidu 8020000000000b01 => (raw sp) 43e0040000000001) -+fcfidu 80000000203f0b3d => (raw sp) 43e00000000407e1) -+ -+Test ftdiv instruction -+ftdiv: 3fd8000000000000 <=> 404f000000000000 ? 8 (CRx) -+ftdiv: 7ff7ffffffffffff <=> 404f000000000000 ? a (CRx) -+ftdiv: 404f000000000000 <=> fff8000000000000 ? a (CRx) -+ftdiv: 3fd8000000000000 <=> 0018000000b77501 ? a (CRx) -+ftdiv: 404f000000000000 <=> 7fe800000000051b ? a (CRx) -+ftdiv: 7fe800000000051b <=> 3fd8000000000000 ? a (CRx) -+ftdiv: 3fd8000000000000 <=> 7fe800000000051b ? a (CRx) -+ftdiv: 0123214569900000 <=> 3fd8000000000000 ? a (CRx) -+ftdiv: 7ff0000000000000 <=> 404f000000000000 ? e (CRx) -+ftdiv: fff0000000000000 <=> 404f000000000000 ? e (CRx) -+ftdiv: 404f000000000000 <=> 7ff0000000000000 ? e (CRx) -+ftdiv: 3fd8000000000000 <=> 8008340000078000 ? e (CRx) -+ftdiv: 0000000000000000 <=> 0000000000000000 ? e (CRx) -+ftdiv: 0000000000000000 <=> 8000000000000000 ? e (CRx) -+ -+Test VSX move instructions -+xsabsdp: 01234567 89abcdef xsabsdp 8899aabb 91929394x => 0899aabb 91929394 -+ -+xscpsgndp: 8899aabb 91929394 xscpsgndp 01234567 89abcdefx => 81234567 89abcdef -+ -+xsnabsdp: b1b2b3b4 c1c2c3c4 xsnabsdp 44556677 8899aabbx => c4556677 8899aabb -+ -+xsnegdp: 01234567 89abcdef xsnegdp b1b2b3b4 c1c2c3c4x => 31b2b3b4 c1c2c3c4 -+ -+Test VSX permute instructions -+xxmrghw: -+ XA[11111111,22222222,33333333,44444444] -+ XB[55555555,66666666,77777777,88888888] -+ => XT[11111111,55555555,22222222,66666666] -+xxmrghw: -+ XA[00112233,44556677,8899aabb,ccddeeff] -+ XB[11111111,22222222,33333333,44444444] -+ => XT[00112233,11111111,44556677,22222222] -+xxmrglw: -+ XA[11111111,22222222,33333333,44444444] -+ XB[55555555,66666666,77777777,88888888] -+ => XT[33333333,77777777,44444444,88888888] -+xxmrglw: -+ XA[00112233,44556677,8899aabb,ccddeeff] -+ XB[11111111,22222222,33333333,44444444] -+ => XT[8899aabb,33333333,ccddeeff,44444444] -+xxpermdi DM=00: -+ XA[11111111,22222222,33333333,44444444] -+ XB[55555555,66666666,77777777,88888888] -+ => XT[11111111,22222222,55555555,66666666] -+xxpermdi DM=01: -+ XA[11111111,22222222,33333333,44444444] -+ XB[55555555,66666666,77777777,88888888] -+ => XT[11111111,22222222,77777777,88888888] -+xxpermdi DM=10: -+ XA[11111111,22222222,33333333,44444444] -+ XB[55555555,66666666,77777777,88888888] -+ => XT[33333333,44444444,55555555,66666666] -+xxpermdi DM=11: -+ XA[11111111,22222222,33333333,44444444] -+ XB[55555555,66666666,77777777,88888888] -+ => XT[33333333,44444444,77777777,88888888] -+xxsldwi SHW=0: -+ XA[11111111,22222222,33333333,44444444] -+ XB[55555555,66666666,77777777,88888888] -+ => XT[11111111,22222222,33333333,44444444] -+xxsldwi SHW=1: -+ XA[11111111,22222222,33333333,44444444] -+ XB[55555555,66666666,77777777,88888888] -+ => XT[22222222,33333333,44444444,55555555] -+xxsldwi SHW=2: -+ XA[11111111,22222222,33333333,44444444] -+ XB[55555555,66666666,77777777,88888888] -+ => XT[33333333,44444444,55555555,66666666] -+xxsldwi SHW=3: -+ XA[11111111,22222222,33333333,44444444] -+ XB[55555555,66666666,77777777,88888888] -+ => XT[44444444,55555555,66666666,77777777] -+ -+Test VSX floating point instructions -+#0: xscmpudp fff0000000000000 <=> fff0000000000000 ? 2 (CRx) -+#1: xscmpudp fff0000000000000 <=> c0d0650f5a07b353 ? 8 (CRx) -+#2: xscmpudp fff0000000000000 <=> 8000000000000000 ? 8 (CRx) -+#3: xscmpudp fff0000000000000 <=> 0000000000000000 ? 8 (CRx) -+#4: xscmpudp fff0000000000000 <=> 0123214569900000 ? 8 (CRx) -+#5: xscmpudp fff0000000000000 <=> 7ff0000000000000 ? 8 (CRx) -+#6: xscmpudp fff0000000000000 <=> 7ff7ffffffffffff ? 1 (CRx) -+#7: xscmpudp fff0000000000000 <=> 7ff8000000000000 ? 1 (CRx) -+#8: xscmpudp c0d0650f5a07b353 <=> fff0000000000000 ? 4 (CRx) -+#9: xscmpudp c0d0650f5a07b353 <=> c0d0650f5a07b353 ? 2 (CRx) -+#10: xscmpudp c0d0650f5a07b353 <=> 8000000000000000 ? 8 (CRx) -+#11: xscmpudp c0d0650f5a07b353 <=> 0000000000000000 ? 8 (CRx) -+#12: xscmpudp c0d0650f5a07b353 <=> 0123214569900000 ? 8 (CRx) -+#13: xscmpudp c0d0650f5a07b353 <=> 7ff0000000000000 ? 8 (CRx) -+#14: xscmpudp c0d0650f5a07b353 <=> 7ff7ffffffffffff ? 1 (CRx) -+#15: xscmpudp c0d0650f5a07b353 <=> 7ff8000000000000 ? 1 (CRx) -+#16: xscmpudp 8000000000000000 <=> fff0000000000000 ? 4 (CRx) -+#17: xscmpudp 8000000000000000 <=> c0d0650f5a07b353 ? 4 (CRx) -+#18: xscmpudp 8000000000000000 <=> 8000000000000000 ? 2 (CRx) -+#19: xscmpudp 8000000000000000 <=> 0000000000000000 ? 2 (CRx) -+#20: xscmpudp 8000000000000000 <=> 0123214569900000 ? 8 (CRx) -+#21: xscmpudp 8000000000000000 <=> 7ff0000000000000 ? 8 (CRx) -+#22: xscmpudp 8000000000000000 <=> 7ff7ffffffffffff ? 1 (CRx) -+#23: xscmpudp 8000000000000000 <=> 7ff8000000000000 ? 1 (CRx) -+#24: xscmpudp 0000000000000000 <=> fff0000000000000 ? 4 (CRx) -+#25: xscmpudp 0000000000000000 <=> c0d0650f5a07b353 ? 4 (CRx) -+#26: xscmpudp 0000000000000000 <=> 8000000000000000 ? 2 (CRx) -+#27: xscmpudp 0000000000000000 <=> 0000000000000000 ? 2 (CRx) -+#28: xscmpudp 0000000000000000 <=> 0123214569900000 ? 8 (CRx) -+#29: xscmpudp 0000000000000000 <=> 7ff0000000000000 ? 8 (CRx) -+#30: xscmpudp 0000000000000000 <=> 7ff7ffffffffffff ? 1 (CRx) -+#31: xscmpudp 0000000000000000 <=> 7ff8000000000000 ? 1 (CRx) -+#32: xscmpudp 0123214569900000 <=> fff0000000000000 ? 4 (CRx) -+#33: xscmpudp 0123214569900000 <=> c0d0650f5a07b353 ? 4 (CRx) -+#34: xscmpudp 0123214569900000 <=> 8000000000000000 ? 4 (CRx) -+#35: xscmpudp 0123214569900000 <=> 0000000000000000 ? 4 (CRx) -+#36: xscmpudp 0123214569900000 <=> 404f000000000000 ? 8 (CRx) -+#37: xscmpudp 0123214569900000 <=> 7ff0000000000000 ? 8 (CRx) -+#38: xscmpudp 0123214569900000 <=> 7ff7ffffffffffff ? 1 (CRx) -+#39: xscmpudp 0123214569900000 <=> 7ff8000000000000 ? 1 (CRx) -+#40: xscmpudp 7ff0000000000000 <=> fff0000000000000 ? 4 (CRx) -+#41: xscmpudp 7ff0000000000000 <=> c0d0650f5a07b353 ? 4 (CRx) -+#42: xscmpudp 7ff0000000000000 <=> 8000000000000000 ? 4 (CRx) -+#43: xscmpudp 7ff0000000000000 <=> 0000000000000000 ? 4 (CRx) -+#44: xscmpudp 7ff0000000000000 <=> 0123214569900000 ? 4 (CRx) -+#45: xscmpudp 7ff0000000000000 <=> 7ff0000000000000 ? 2 (CRx) -+#46: xscmpudp 7ff0000000000000 <=> 7ff7ffffffffffff ? 1 (CRx) -+#47: xscmpudp 7ff0000000000000 <=> 7ff8000000000000 ? 1 (CRx) -+#48: xscmpudp fff7ffffffffffff <=> fff0000000000000 ? 1 (CRx) -+#49: xscmpudp fff7ffffffffffff <=> c0d0650f5a07b353 ? 1 (CRx) -+#50: xscmpudp fff7ffffffffffff <=> 8000000000000000 ? 1 (CRx) -+#51: xscmpudp fff7ffffffffffff <=> 0000000000000000 ? 1 (CRx) -+#52: xscmpudp fff7ffffffffffff <=> 0123214569900000 ? 1 (CRx) -+#53: xscmpudp fff7ffffffffffff <=> 7ff0000000000000 ? 1 (CRx) -+#54: xscmpudp fff7ffffffffffff <=> 7ff7ffffffffffff ? 1 (CRx) -+#55: xscmpudp fff7ffffffffffff <=> 7ff8000000000000 ? 1 (CRx) -+#56: xscmpudp fff8000000000000 <=> fff0000000000000 ? 1 (CRx) -+#57: xscmpudp fff8000000000000 <=> c0d0650f5a07b353 ? 1 (CRx) -+#58: xscmpudp fff8000000000000 <=> 8000000000000000 ? 1 (CRx) -+#59: xscmpudp fff8000000000000 <=> 0000000000000000 ? 1 (CRx) -+#60: xscmpudp fff8000000000000 <=> 0123214569900000 ? 1 (CRx) -+#61: xscmpudp fff8000000000000 <=> 7ff0000000000000 ? 1 (CRx) -+#62: xscmpudp fff8000000000000 <=> 7ff7ffffffffffff ? 1 (CRx) -+#63: xscmpudp fff8000000000000 <=> 7ff8000000000000 ? 1 (CRx) -+ -+#0: xscmpodp fff0000000000000 <=> fff0000000000000 ? 2 (CRx) -+#1: xscmpodp fff0000000000000 <=> c0d0650f5a07b353 ? 8 (CRx) -+#2: xscmpodp fff0000000000000 <=> 8000000000000000 ? 8 (CRx) -+#3: xscmpodp fff0000000000000 <=> 0000000000000000 ? 8 (CRx) -+#4: xscmpodp fff0000000000000 <=> 0123214569900000 ? 8 (CRx) -+#5: xscmpodp fff0000000000000 <=> 7ff0000000000000 ? 8 (CRx) -+#6: xscmpodp fff0000000000000 <=> 7ff7ffffffffffff ? 1 (CRx) -+#7: xscmpodp fff0000000000000 <=> 7ff8000000000000 ? 1 (CRx) -+#8: xscmpodp c0d0650f5a07b353 <=> fff0000000000000 ? 4 (CRx) -+#9: xscmpodp c0d0650f5a07b353 <=> c0d0650f5a07b353 ? 2 (CRx) -+#10: xscmpodp c0d0650f5a07b353 <=> 8000000000000000 ? 8 (CRx) -+#11: xscmpodp c0d0650f5a07b353 <=> 0000000000000000 ? 8 (CRx) -+#12: xscmpodp c0d0650f5a07b353 <=> 0123214569900000 ? 8 (CRx) -+#13: xscmpodp c0d0650f5a07b353 <=> 7ff0000000000000 ? 8 (CRx) -+#14: xscmpodp c0d0650f5a07b353 <=> 7ff7ffffffffffff ? 1 (CRx) -+#15: xscmpodp c0d0650f5a07b353 <=> 7ff8000000000000 ? 1 (CRx) -+#16: xscmpodp 8000000000000000 <=> fff0000000000000 ? 4 (CRx) -+#17: xscmpodp 8000000000000000 <=> c0d0650f5a07b353 ? 4 (CRx) -+#18: xscmpodp 8000000000000000 <=> 8000000000000000 ? 2 (CRx) -+#19: xscmpodp 8000000000000000 <=> 0000000000000000 ? 2 (CRx) -+#20: xscmpodp 8000000000000000 <=> 0123214569900000 ? 8 (CRx) -+#21: xscmpodp 8000000000000000 <=> 7ff0000000000000 ? 8 (CRx) -+#22: xscmpodp 8000000000000000 <=> 7ff7ffffffffffff ? 1 (CRx) -+#23: xscmpodp 8000000000000000 <=> 7ff8000000000000 ? 1 (CRx) -+#24: xscmpodp 0000000000000000 <=> fff0000000000000 ? 4 (CRx) -+#25: xscmpodp 0000000000000000 <=> c0d0650f5a07b353 ? 4 (CRx) -+#26: xscmpodp 0000000000000000 <=> 8000000000000000 ? 2 (CRx) -+#27: xscmpodp 0000000000000000 <=> 0000000000000000 ? 2 (CRx) -+#28: xscmpodp 0000000000000000 <=> 0123214569900000 ? 8 (CRx) -+#29: xscmpodp 0000000000000000 <=> 7ff0000000000000 ? 8 (CRx) -+#30: xscmpodp 0000000000000000 <=> 7ff7ffffffffffff ? 1 (CRx) -+#31: xscmpodp 0000000000000000 <=> 7ff8000000000000 ? 1 (CRx) -+#32: xscmpodp 0123214569900000 <=> fff0000000000000 ? 4 (CRx) -+#33: xscmpodp 0123214569900000 <=> c0d0650f5a07b353 ? 4 (CRx) -+#34: xscmpodp 0123214569900000 <=> 8000000000000000 ? 4 (CRx) -+#35: xscmpodp 0123214569900000 <=> 0000000000000000 ? 4 (CRx) -+#36: xscmpodp 0123214569900000 <=> 404f000000000000 ? 8 (CRx) -+#37: xscmpodp 0123214569900000 <=> 7ff0000000000000 ? 8 (CRx) -+#38: xscmpodp 0123214569900000 <=> 7ff7ffffffffffff ? 1 (CRx) -+#39: xscmpodp 0123214569900000 <=> 7ff8000000000000 ? 1 (CRx) -+#40: xscmpodp 7ff0000000000000 <=> fff0000000000000 ? 4 (CRx) -+#41: xscmpodp 7ff0000000000000 <=> c0d0650f5a07b353 ? 4 (CRx) -+#42: xscmpodp 7ff0000000000000 <=> 8000000000000000 ? 4 (CRx) -+#43: xscmpodp 7ff0000000000000 <=> 0000000000000000 ? 4 (CRx) -+#44: xscmpodp 7ff0000000000000 <=> 0123214569900000 ? 4 (CRx) -+#45: xscmpodp 7ff0000000000000 <=> 7ff0000000000000 ? 2 (CRx) -+#46: xscmpodp 7ff0000000000000 <=> 7ff7ffffffffffff ? 1 (CRx) -+#47: xscmpodp 7ff0000000000000 <=> 7ff8000000000000 ? 1 (CRx) -+#48: xscmpodp fff7ffffffffffff <=> fff0000000000000 ? 1 (CRx) -+#49: xscmpodp fff7ffffffffffff <=> c0d0650f5a07b353 ? 1 (CRx) -+#50: xscmpodp fff7ffffffffffff <=> 8000000000000000 ? 1 (CRx) -+#51: xscmpodp fff7ffffffffffff <=> 0000000000000000 ? 1 (CRx) -+#52: xscmpodp fff7ffffffffffff <=> 0123214569900000 ? 1 (CRx) -+#53: xscmpodp fff7ffffffffffff <=> 7ff0000000000000 ? 1 (CRx) -+#54: xscmpodp fff7ffffffffffff <=> 7ff7ffffffffffff ? 1 (CRx) -+#55: xscmpodp fff7ffffffffffff <=> 7ff8000000000000 ? 1 (CRx) -+#56: xscmpodp fff8000000000000 <=> fff0000000000000 ? 1 (CRx) -+#57: xscmpodp fff8000000000000 <=> c0d0650f5a07b353 ? 1 (CRx) -+#58: xscmpodp fff8000000000000 <=> 8000000000000000 ? 1 (CRx) -+#59: xscmpodp fff8000000000000 <=> 0000000000000000 ? 1 (CRx) -+#60: xscmpodp fff8000000000000 <=> 0123214569900000 ? 1 (CRx) -+#61: xscmpodp fff8000000000000 <=> 7ff0000000000000 ? 1 (CRx) -+#62: xscmpodp fff8000000000000 <=> 7ff7ffffffffffff ? 1 (CRx) -+#63: xscmpodp fff8000000000000 <=> 7ff8000000000000 ? 1 (CRx) -+ -+#0: xsadddp fff0000000000000 fff0000000000000 = fff0000000000000 -+#1: xsadddp fff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#2: xsadddp fff0000000000000 8000000000000000 = fff0000000000000 -+#3: xsadddp fff0000000000000 0000000000000000 = fff0000000000000 -+#4: xsadddp fff0000000000000 0123214569900000 = fff0000000000000 -+#5: xsadddp fff0000000000000 7ff0000000000000 = 7ff8000000000000 -+#6: xsadddp fff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#7: xsadddp fff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#8: xsadddp c0d0650f5a07b353 fff0000000000000 = fff0000000000000 -+#9: xsadddp c0d0650f5a07b353 c0d0650f5a07b353 = c0e0650f5a07b353 -+#10: xsadddp c0d0650f5a07b353 8000000000000000 = c0d0650f5a07b353 -+#11: xsadddp c0d0650f5a07b353 0000000000000000 = c0d0650f5a07b353 -+#12: xsadddp c0d0650f5a07b353 0123214569900000 = c0d0650f5a07b353 -+#13: xsadddp c0d0650f5a07b353 7ff0000000000000 = 7ff0000000000000 -+#14: xsadddp c0d0650f5a07b353 7ff7ffffffffffff = 7fffffffffffffff -+#15: xsadddp c0d0650f5a07b353 7ff8000000000000 = 7ff8000000000000 -+#16: xsadddp 8000000000000000 fff0000000000000 = fff0000000000000 -+#17: xsadddp 8000000000000000 c0d0650f5a07b353 = c0d0650f5a07b353 -+#18: xsadddp 8000000000000000 8000000000000000 = 8000000000000000 -+#19: xsadddp 8000000000000000 0000000000000000 = 0000000000000000 -+#20: xsadddp 8000000000000000 0123214569900000 = 0123214569900000 -+#21: xsadddp 8000000000000000 7ff0000000000000 = 7ff0000000000000 -+#22: xsadddp 8000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#23: xsadddp 8000000000000000 7ff8000000000000 = 7ff8000000000000 -+#24: xsadddp 0000000000000000 fff0000000000000 = fff0000000000000 -+#25: xsadddp 0000000000000000 c0d0650f5a07b353 = c0d0650f5a07b353 -+#26: xsadddp 0000000000000000 8000000000000000 = 0000000000000000 -+#27: xsadddp 0000000000000000 0000000000000000 = 0000000000000000 -+#28: xsadddp 0000000000000000 0123214569900000 = 0123214569900000 -+#29: xsadddp 0000000000000000 7ff0000000000000 = 7ff0000000000000 -+#30: xsadddp 0000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#31: xsadddp 0000000000000000 7ff8000000000000 = 7ff8000000000000 -+#32: xsadddp 0123214569900000 fff0000000000000 = fff0000000000000 -+#33: xsadddp 0123214569900000 c0d0650f5a07b353 = c0d0650f5a07b353 -+#34: xsadddp 0123214569900000 8000000000000000 = 0123214569900000 -+#35: xsadddp 0123214569900000 0000000000000000 = 0123214569900000 -+#36: xsadddp 0123214569900000 404f000000000000 = 404f000000000000 -+#37: xsadddp 0123214569900000 7ff0000000000000 = 7ff0000000000000 -+#38: xsadddp 0123214569900000 7ff7ffffffffffff = 7fffffffffffffff -+#39: xsadddp 0123214569900000 7ff8000000000000 = 7ff8000000000000 -+#40: xsadddp 7ff0000000000000 fff0000000000000 = 7ff8000000000000 -+#41: xsadddp 7ff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#42: xsadddp 7ff0000000000000 8000000000000000 = 7ff0000000000000 -+#43: xsadddp 7ff0000000000000 0000000000000000 = 7ff0000000000000 -+#44: xsadddp 7ff0000000000000 0123214569900000 = 7ff0000000000000 -+#45: xsadddp 7ff0000000000000 7ff0000000000000 = 7ff0000000000000 -+#46: xsadddp 7ff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#47: xsadddp 7ff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#48: xsadddp fff7ffffffffffff fff0000000000000 = ffffffffffffffff -+#49: xsadddp fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#50: xsadddp fff7ffffffffffff 8000000000000000 = ffffffffffffffff -+#51: xsadddp fff7ffffffffffff 0000000000000000 = ffffffffffffffff -+#52: xsadddp fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#53: xsadddp fff7ffffffffffff 7ff0000000000000 = ffffffffffffffff -+#54: xsadddp fff7ffffffffffff 7ff7ffffffffffff = ffffffffffffffff -+#55: xsadddp fff7ffffffffffff 7ff8000000000000 = ffffffffffffffff -+#56: xsadddp fff8000000000000 fff0000000000000 = fff8000000000000 -+#57: xsadddp fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#58: xsadddp fff8000000000000 8000000000000000 = fff8000000000000 -+#59: xsadddp fff8000000000000 0000000000000000 = fff8000000000000 -+#60: xsadddp fff8000000000000 0123214569900000 = fff8000000000000 -+#61: xsadddp fff8000000000000 7ff0000000000000 = fff8000000000000 -+#62: xsadddp fff8000000000000 7ff7ffffffffffff = fff8000000000000 -+#63: xsadddp fff8000000000000 7ff8000000000000 = fff8000000000000 -+ -+#0: xsdivdp fff0000000000000 fff0000000000000 = 7ff8000000000000 -+#1: xsdivdp fff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#2: xsdivdp fff0000000000000 8000000000000000 = 7ff0000000000000 -+#3: xsdivdp fff0000000000000 0000000000000000 = fff0000000000000 -+#4: xsdivdp fff0000000000000 0123214569900000 = fff0000000000000 -+#5: xsdivdp fff0000000000000 7ff0000000000000 = 7ff8000000000000 -+#6: xsdivdp fff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#7: xsdivdp fff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#8: xsdivdp c0d0650f5a07b353 fff0000000000000 = 0000000000000000 -+#9: xsdivdp c0d0650f5a07b353 c0d0650f5a07b353 = 3ff0000000000000 -+#10: xsdivdp c0d0650f5a07b353 8000000000000000 = 7ff0000000000000 -+#11: xsdivdp c0d0650f5a07b353 0000000000000000 = fff0000000000000 -+#12: xsdivdp c0d0650f5a07b353 0123214569900000 = ff9b6cb57ca13c00 -+#13: xsdivdp c0d0650f5a07b353 7ff0000000000000 = 8000000000000000 -+#14: xsdivdp c0d0650f5a07b353 7ff7ffffffffffff = 7fffffffffffffff -+#15: xsdivdp c0d0650f5a07b353 7ff8000000000000 = 7ff8000000000000 -+#16: xsdivdp 8000000000000000 fff0000000000000 = 0000000000000000 -+#17: xsdivdp 8000000000000000 c0d0650f5a07b353 = 0000000000000000 -+#18: xsdivdp 8000000000000000 8000000000000000 = 7ff8000000000000 -+#19: xsdivdp 8000000000000000 0000000000000000 = 7ff8000000000000 -+#20: xsdivdp 8000000000000000 0123214569900000 = 8000000000000000 -+#21: xsdivdp 8000000000000000 7ff0000000000000 = 8000000000000000 -+#22: xsdivdp 8000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#23: xsdivdp 8000000000000000 7ff8000000000000 = 7ff8000000000000 -+#24: xsdivdp 0000000000000000 fff0000000000000 = 8000000000000000 -+#25: xsdivdp 0000000000000000 c0d0650f5a07b353 = 8000000000000000 -+#26: xsdivdp 0000000000000000 8000000000000000 = 7ff8000000000000 -+#27: xsdivdp 0000000000000000 0000000000000000 = 7ff8000000000000 -+#28: xsdivdp 0000000000000000 0123214569900000 = 0000000000000000 -+#29: xsdivdp 0000000000000000 7ff0000000000000 = 0000000000000000 -+#30: xsdivdp 0000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#31: xsdivdp 0000000000000000 7ff8000000000000 = 7ff8000000000000 -+#32: xsdivdp 0123214569900000 fff0000000000000 = 8000000000000000 -+#33: xsdivdp 0123214569900000 c0d0650f5a07b353 = 8042ab59d8b6ec87 -+#34: xsdivdp 0123214569900000 8000000000000000 = fff0000000000000 -+#35: xsdivdp 0123214569900000 0000000000000000 = 7ff0000000000000 -+#36: xsdivdp 0123214569900000 404f000000000000 = 00c3bf3f64b5ad6b -+#37: xsdivdp 0123214569900000 7ff0000000000000 = 0000000000000000 -+#38: xsdivdp 0123214569900000 7ff7ffffffffffff = 7fffffffffffffff -+#39: xsdivdp 0123214569900000 7ff8000000000000 = 7ff8000000000000 -+#40: xsdivdp 7ff0000000000000 fff0000000000000 = 7ff8000000000000 -+#41: xsdivdp 7ff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#42: xsdivdp 7ff0000000000000 8000000000000000 = fff0000000000000 -+#43: xsdivdp 7ff0000000000000 0000000000000000 = 7ff0000000000000 -+#44: xsdivdp 7ff0000000000000 0123214569900000 = 7ff0000000000000 -+#45: xsdivdp 7ff0000000000000 7ff0000000000000 = 7ff8000000000000 -+#46: xsdivdp 7ff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#47: xsdivdp 7ff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#48: xsdivdp fff7ffffffffffff fff0000000000000 = ffffffffffffffff -+#49: xsdivdp fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#50: xsdivdp fff7ffffffffffff 8000000000000000 = ffffffffffffffff -+#51: xsdivdp fff7ffffffffffff 0000000000000000 = ffffffffffffffff -+#52: xsdivdp fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#53: xsdivdp fff7ffffffffffff 7ff0000000000000 = ffffffffffffffff -+#54: xsdivdp fff7ffffffffffff 7ff7ffffffffffff = ffffffffffffffff -+#55: xsdivdp fff7ffffffffffff 7ff8000000000000 = ffffffffffffffff -+#56: xsdivdp fff8000000000000 fff0000000000000 = fff8000000000000 -+#57: xsdivdp fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#58: xsdivdp fff8000000000000 8000000000000000 = fff8000000000000 -+#59: xsdivdp fff8000000000000 0000000000000000 = fff8000000000000 -+#60: xsdivdp fff8000000000000 0123214569900000 = fff8000000000000 -+#61: xsdivdp fff8000000000000 7ff0000000000000 = fff8000000000000 -+#62: xsdivdp fff8000000000000 7ff7ffffffffffff = fff8000000000000 -+#63: xsdivdp fff8000000000000 7ff8000000000000 = fff8000000000000 -+ -+#0: xsmaddadp fff0000000000000 fff0000000000000 c0d0650f5a07b353 = 7ff8000000000000 -+#1: xsmaddadp c0d0650f5a07b353 fff0000000000000 0123214569900000 = fff0000000000000 -+#2: xsmaddadp 8000000000000000 fff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#3: xsmaddadp 0000000000000000 fff0000000000000 0123214569900000 = fff0000000000000 -+#4: xsmaddadp 0123214569900000 fff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#5: xsmaddadp 7ff0000000000000 fff0000000000000 0123214569900000 = 7ff8000000000000 -+#6: xsmaddadp 7ff7ffffffffffff fff0000000000000 c0d0650f5a07b353 = 7fffffffffffffff -+#7: xsmaddadp 7ff8000000000000 fff0000000000000 0123214569900000 = 7ff8000000000000 -+#8: xsmaddadp fff0000000000000 c0d0650f5a07b353 c0d0650f5a07b353 = fff0000000000000 -+#9: xsmaddadp c0d0650f5a07b353 c0d0650f5a07b353 0123214569900000 = c0d0650f5a07b353 -+#10: xsmaddadp 8000000000000000 c0d0650f5a07b353 c0d0650f5a07b353 = 41b0cc9d05eec2a7 -+#11: xsmaddadp 0000000000000000 c0d0650f5a07b353 0123214569900000 = 82039a19ca8fcb5f -+#12: xsmaddadp 0123214569900000 c0d0650f5a07b353 c0d0650f5a07b353 = 41b0cc9d05eec2a7 -+#13: xsmaddadp 7ff0000000000000 c0d0650f5a07b353 0123214569900000 = 7ff0000000000000 -+#14: xsmaddadp 7ff7ffffffffffff c0d0650f5a07b353 c0d0650f5a07b353 = 7fffffffffffffff -+#15: xsmaddadp 7ff8000000000000 c0d0650f5a07b353 0123214569900000 = 7ff8000000000000 -+#16: xsmaddadp fff0000000000000 8000000000000000 c0d0650f5a07b353 = fff0000000000000 -+#17: xsmaddadp c0d0650f5a07b353 8000000000000000 0123214569900000 = c0d0650f5a07b353 -+#18: xsmaddadp 8000000000000000 8000000000000000 c0d0650f5a07b353 = 0000000000000000 -+#19: xsmaddadp 0000000000000000 8000000000000000 0123214569900000 = 0000000000000000 -+#20: xsmaddadp 0123214569900000 8000000000000000 c0d0650f5a07b353 = 0123214569900000 -+#21: xsmaddadp 7ff0000000000000 8000000000000000 0123214569900000 = 7ff0000000000000 -+#22: xsmaddadp 7ff7ffffffffffff 8000000000000000 c0d0650f5a07b353 = 7fffffffffffffff -+#23: xsmaddadp 7ff8000000000000 8000000000000000 0123214569900000 = 7ff8000000000000 -+#24: xsmaddadp fff0000000000000 0000000000000000 c0d0650f5a07b353 = fff0000000000000 -+#25: xsmaddadp c0d0650f5a07b353 0000000000000000 0123214569900000 = c0d0650f5a07b353 -+#26: xsmaddadp 8000000000000000 0000000000000000 c0d0650f5a07b353 = 8000000000000000 -+#27: xsmaddadp 0000000000000000 0000000000000000 0123214569900000 = 0000000000000000 -+#28: xsmaddadp 0123214569900000 0000000000000000 c0d0650f5a07b353 = 0123214569900000 -+#29: xsmaddadp 7ff0000000000000 0000000000000000 0123214569900000 = 7ff0000000000000 -+#30: xsmaddadp 7ff7ffffffffffff 0000000000000000 c0d0650f5a07b353 = 7fffffffffffffff -+#31: xsmaddadp 7ff8000000000000 0000000000000000 0123214569900000 = 7ff8000000000000 -+#32: xsmaddadp fff0000000000000 0123214569900000 c0d0650f5a07b353 = fff0000000000000 -+#33: xsmaddadp c0d0650f5a07b353 0123214569900000 0123214569900000 = c0d0650f5a07b353 -+#34: xsmaddadp 8000000000000000 0123214569900000 c0d0650f5a07b353 = 82039a19ca8fcb5f -+#35: xsmaddadp 0000000000000000 0123214569900000 0123214569900000 = 0000000000000000 -+#36: xsmaddadp 404f000000000000 0123214569900000 c0d0650f5a07b353 = 404f000000000000 -+#37: xsmaddadp 7ff0000000000000 0123214569900000 0123214569900000 = 7ff0000000000000 -+#38: xsmaddadp 7ff7ffffffffffff 0123214569900000 c0d0650f5a07b353 = 7fffffffffffffff -+#39: xsmaddadp 7ff8000000000000 0123214569900000 0123214569900000 = 7ff8000000000000 -+#40: xsmaddadp fff0000000000000 7ff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#41: xsmaddadp c0d0650f5a07b353 7ff0000000000000 0123214569900000 = 7ff0000000000000 -+#42: xsmaddadp 8000000000000000 7ff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#43: xsmaddadp 0000000000000000 7ff0000000000000 0123214569900000 = 7ff0000000000000 -+#44: xsmaddadp 0123214569900000 7ff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#45: xsmaddadp 7ff0000000000000 7ff0000000000000 0123214569900000 = 7ff0000000000000 -+#46: xsmaddadp 7ff7ffffffffffff 7ff0000000000000 c0d0650f5a07b353 = 7fffffffffffffff -+#47: xsmaddadp 7ff8000000000000 7ff0000000000000 0123214569900000 = 7ff8000000000000 -+#48: xsmaddadp fff0000000000000 fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#49: xsmaddadp c0d0650f5a07b353 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#50: xsmaddadp 8000000000000000 fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#51: xsmaddadp 0000000000000000 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#52: xsmaddadp 0123214569900000 fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#53: xsmaddadp 7ff0000000000000 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#54: xsmaddadp 7ff7ffffffffffff fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#55: xsmaddadp 7ff8000000000000 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#56: xsmaddadp fff0000000000000 fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#57: xsmaddadp c0d0650f5a07b353 fff8000000000000 0123214569900000 = fff8000000000000 -+#58: xsmaddadp 8000000000000000 fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#59: xsmaddadp 0000000000000000 fff8000000000000 0123214569900000 = fff8000000000000 -+#60: xsmaddadp 0123214569900000 fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#61: xsmaddadp 7ff0000000000000 fff8000000000000 0123214569900000 = fff8000000000000 -+#62: xsmaddadp 7ff7ffffffffffff fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#63: xsmaddadp 7ff8000000000000 fff8000000000000 0123214569900000 = fff8000000000000 -+ -+#0: xsmaddmdp c0d0650f5a07b353 fff0000000000000 fff0000000000000 = 7ff8000000000000 -+#1: xsmaddmdp 0123214569900000 fff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#2: xsmaddmdp c0d0650f5a07b353 fff0000000000000 8000000000000000 = 7ff0000000000000 -+#3: xsmaddmdp 0123214569900000 fff0000000000000 0000000000000000 = fff0000000000000 -+#4: xsmaddmdp c0d0650f5a07b353 fff0000000000000 0123214569900000 = 7ff0000000000000 -+#5: xsmaddmdp 0123214569900000 fff0000000000000 7ff0000000000000 = 7ff8000000000000 -+#6: xsmaddmdp c0d0650f5a07b353 fff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#7: xsmaddmdp 0123214569900000 fff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#8: xsmaddmdp c0d0650f5a07b353 c0d0650f5a07b353 fff0000000000000 = fff0000000000000 -+#9: xsmaddmdp 0123214569900000 c0d0650f5a07b353 c0d0650f5a07b353 = c0d0650f5a07b353 -+#10: xsmaddmdp c0d0650f5a07b353 c0d0650f5a07b353 8000000000000000 = 41b0cc9d05eec2a7 -+#11: xsmaddmdp 0123214569900000 c0d0650f5a07b353 0000000000000000 = 82039a19ca8fcb5f -+#12: xsmaddmdp c0d0650f5a07b353 c0d0650f5a07b353 0123214569900000 = 41b0cc9d05eec2a7 -+#13: xsmaddmdp 0123214569900000 c0d0650f5a07b353 7ff0000000000000 = 7ff0000000000000 -+#14: xsmaddmdp c0d0650f5a07b353 c0d0650f5a07b353 7ff7ffffffffffff = 7fffffffffffffff -+#15: xsmaddmdp 0123214569900000 c0d0650f5a07b353 7ff8000000000000 = 7ff8000000000000 -+#16: xsmaddmdp c0d0650f5a07b353 8000000000000000 fff0000000000000 = fff0000000000000 -+#17: xsmaddmdp 0123214569900000 8000000000000000 c0d0650f5a07b353 = c0d0650f5a07b353 -+#18: xsmaddmdp c0d0650f5a07b353 8000000000000000 8000000000000000 = 0000000000000000 -+#19: xsmaddmdp 0123214569900000 8000000000000000 0000000000000000 = 0000000000000000 -+#20: xsmaddmdp c0d0650f5a07b353 8000000000000000 0123214569900000 = 0123214569900000 -+#21: xsmaddmdp 0123214569900000 8000000000000000 7ff0000000000000 = 7ff0000000000000 -+#22: xsmaddmdp c0d0650f5a07b353 8000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#23: xsmaddmdp 0123214569900000 8000000000000000 7ff8000000000000 = 7ff8000000000000 -+#24: xsmaddmdp c0d0650f5a07b353 0000000000000000 fff0000000000000 = fff0000000000000 -+#25: xsmaddmdp 0123214569900000 0000000000000000 c0d0650f5a07b353 = c0d0650f5a07b353 -+#26: xsmaddmdp c0d0650f5a07b353 0000000000000000 8000000000000000 = 8000000000000000 -+#27: xsmaddmdp 0123214569900000 0000000000000000 0000000000000000 = 0000000000000000 -+#28: xsmaddmdp c0d0650f5a07b353 0000000000000000 0123214569900000 = 0123214569900000 -+#29: xsmaddmdp 0123214569900000 0000000000000000 7ff0000000000000 = 7ff0000000000000 -+#30: xsmaddmdp c0d0650f5a07b353 0000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#31: xsmaddmdp 0123214569900000 0000000000000000 7ff8000000000000 = 7ff8000000000000 -+#32: xsmaddmdp c0d0650f5a07b353 0123214569900000 fff0000000000000 = fff0000000000000 -+#33: xsmaddmdp 0123214569900000 0123214569900000 c0d0650f5a07b353 = c0d0650f5a07b353 -+#34: xsmaddmdp c0d0650f5a07b353 0123214569900000 8000000000000000 = 82039a19ca8fcb5f -+#35: xsmaddmdp 0123214569900000 0123214569900000 0000000000000000 = 0000000000000000 -+#36: xsmaddmdp c0d0650f5a07b353 0123214569900000 404f000000000000 = 404f000000000000 -+#37: xsmaddmdp 0123214569900000 0123214569900000 7ff0000000000000 = 7ff0000000000000 -+#38: xsmaddmdp c0d0650f5a07b353 0123214569900000 7ff7ffffffffffff = 7fffffffffffffff -+#39: xsmaddmdp 0123214569900000 0123214569900000 7ff8000000000000 = 7ff8000000000000 -+#40: xsmaddmdp c0d0650f5a07b353 7ff0000000000000 fff0000000000000 = fff0000000000000 -+#41: xsmaddmdp 0123214569900000 7ff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#42: xsmaddmdp c0d0650f5a07b353 7ff0000000000000 8000000000000000 = fff0000000000000 -+#43: xsmaddmdp 0123214569900000 7ff0000000000000 0000000000000000 = 7ff0000000000000 -+#44: xsmaddmdp c0d0650f5a07b353 7ff0000000000000 0123214569900000 = fff0000000000000 -+#45: xsmaddmdp 0123214569900000 7ff0000000000000 7ff0000000000000 = 7ff0000000000000 -+#46: xsmaddmdp c0d0650f5a07b353 7ff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#47: xsmaddmdp 0123214569900000 7ff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#48: xsmaddmdp c0d0650f5a07b353 fff7ffffffffffff fff0000000000000 = ffffffffffffffff -+#49: xsmaddmdp 0123214569900000 fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#50: xsmaddmdp c0d0650f5a07b353 fff7ffffffffffff 8000000000000000 = ffffffffffffffff -+#51: xsmaddmdp 0123214569900000 fff7ffffffffffff 0000000000000000 = ffffffffffffffff -+#52: xsmaddmdp c0d0650f5a07b353 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#53: xsmaddmdp 0123214569900000 fff7ffffffffffff 7ff0000000000000 = ffffffffffffffff -+#54: xsmaddmdp c0d0650f5a07b353 fff7ffffffffffff 7ff7ffffffffffff = ffffffffffffffff -+#55: xsmaddmdp 0123214569900000 fff7ffffffffffff 7ff8000000000000 = ffffffffffffffff -+#56: xsmaddmdp c0d0650f5a07b353 fff8000000000000 fff0000000000000 = fff8000000000000 -+#57: xsmaddmdp 0123214569900000 fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#58: xsmaddmdp c0d0650f5a07b353 fff8000000000000 8000000000000000 = fff8000000000000 -+#59: xsmaddmdp 0123214569900000 fff8000000000000 0000000000000000 = fff8000000000000 -+#60: xsmaddmdp c0d0650f5a07b353 fff8000000000000 0123214569900000 = fff8000000000000 -+#61: xsmaddmdp 0123214569900000 fff8000000000000 7ff0000000000000 = fff8000000000000 -+#62: xsmaddmdp c0d0650f5a07b353 fff8000000000000 7ff7ffffffffffff = fff8000000000000 -+#63: xsmaddmdp 0123214569900000 fff8000000000000 7ff8000000000000 = fff8000000000000 -+ -+#0: xsmsubadp fff0000000000000 fff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#1: xsmsubadp c0d0650f5a07b353 fff0000000000000 0123214569900000 = fff0000000000000 -+#2: xsmsubadp 8000000000000000 fff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#3: xsmsubadp 0000000000000000 fff0000000000000 0123214569900000 = fff0000000000000 -+#4: xsmsubadp 0123214569900000 fff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#5: xsmsubadp 7ff0000000000000 fff0000000000000 0123214569900000 = fff0000000000000 -+#6: xsmsubadp 7ff7ffffffffffff fff0000000000000 c0d0650f5a07b353 = 7fffffffffffffff -+#7: xsmsubadp 7ff8000000000000 fff0000000000000 0123214569900000 = 7ff8000000000000 -+#8: xsmsubadp fff0000000000000 c0d0650f5a07b353 c0d0650f5a07b353 = 7ff0000000000000 -+#9: xsmsubadp c0d0650f5a07b353 c0d0650f5a07b353 0123214569900000 = 40d0650f5a07b353 -+#10: xsmsubadp 8000000000000000 c0d0650f5a07b353 c0d0650f5a07b353 = 41b0cc9d05eec2a7 -+#11: xsmsubadp 0000000000000000 c0d0650f5a07b353 0123214569900000 = 82039a19ca8fcb5f -+#12: xsmsubadp 0123214569900000 c0d0650f5a07b353 c0d0650f5a07b353 = 41b0cc9d05eec2a7 -+#13: xsmsubadp 7ff0000000000000 c0d0650f5a07b353 0123214569900000 = fff0000000000000 -+#14: xsmsubadp 7ff7ffffffffffff c0d0650f5a07b353 c0d0650f5a07b353 = 7fffffffffffffff -+#15: xsmsubadp 7ff8000000000000 c0d0650f5a07b353 0123214569900000 = 7ff8000000000000 -+#16: xsmsubadp fff0000000000000 8000000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#17: xsmsubadp c0d0650f5a07b353 8000000000000000 0123214569900000 = 40d0650f5a07b353 -+#18: xsmsubadp 8000000000000000 8000000000000000 c0d0650f5a07b353 = 0000000000000000 -+#19: xsmsubadp 0000000000000000 8000000000000000 0123214569900000 = 8000000000000000 -+#20: xsmsubadp 0123214569900000 8000000000000000 c0d0650f5a07b353 = 8123214569900000 -+#21: xsmsubadp 7ff0000000000000 8000000000000000 0123214569900000 = fff0000000000000 -+#22: xsmsubadp 7ff7ffffffffffff 8000000000000000 c0d0650f5a07b353 = 7fffffffffffffff -+#23: xsmsubadp 7ff8000000000000 8000000000000000 0123214569900000 = 7ff8000000000000 -+#24: xsmsubadp fff0000000000000 0000000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#25: xsmsubadp c0d0650f5a07b353 0000000000000000 0123214569900000 = 40d0650f5a07b353 -+#26: xsmsubadp 8000000000000000 0000000000000000 c0d0650f5a07b353 = 0000000000000000 -+#27: xsmsubadp 0000000000000000 0000000000000000 0123214569900000 = 0000000000000000 -+#28: xsmsubadp 0123214569900000 0000000000000000 c0d0650f5a07b353 = 8123214569900000 -+#29: xsmsubadp 7ff0000000000000 0000000000000000 0123214569900000 = fff0000000000000 -+#30: xsmsubadp 7ff7ffffffffffff 0000000000000000 c0d0650f5a07b353 = 7fffffffffffffff -+#31: xsmsubadp 7ff8000000000000 0000000000000000 0123214569900000 = 7ff8000000000000 -+#32: xsmsubadp fff0000000000000 0123214569900000 c0d0650f5a07b353 = 7ff0000000000000 -+#33: xsmsubadp c0d0650f5a07b353 0123214569900000 0123214569900000 = 40d0650f5a07b353 -+#34: xsmsubadp 8000000000000000 0123214569900000 c0d0650f5a07b353 = 82039a19ca8fcb5f -+#35: xsmsubadp 0000000000000000 0123214569900000 0123214569900000 = 0000000000000000 -+#36: xsmsubadp 404f000000000000 0123214569900000 c0d0650f5a07b353 = c04f000000000000 -+#37: xsmsubadp 7ff0000000000000 0123214569900000 0123214569900000 = fff0000000000000 -+#38: xsmsubadp 7ff7ffffffffffff 0123214569900000 c0d0650f5a07b353 = 7fffffffffffffff -+#39: xsmsubadp 7ff8000000000000 0123214569900000 0123214569900000 = 7ff8000000000000 -+#40: xsmsubadp fff0000000000000 7ff0000000000000 c0d0650f5a07b353 = 7ff8000000000000 -+#41: xsmsubadp c0d0650f5a07b353 7ff0000000000000 0123214569900000 = 7ff0000000000000 -+#42: xsmsubadp 8000000000000000 7ff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#43: xsmsubadp 0000000000000000 7ff0000000000000 0123214569900000 = 7ff0000000000000 -+#44: xsmsubadp 0123214569900000 7ff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#45: xsmsubadp 7ff0000000000000 7ff0000000000000 0123214569900000 = 7ff8000000000000 -+#46: xsmsubadp 7ff7ffffffffffff 7ff0000000000000 c0d0650f5a07b353 = 7fffffffffffffff -+#47: xsmsubadp 7ff8000000000000 7ff0000000000000 0123214569900000 = 7ff8000000000000 -+#48: xsmsubadp fff0000000000000 fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#49: xsmsubadp c0d0650f5a07b353 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#50: xsmsubadp 8000000000000000 fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#51: xsmsubadp 0000000000000000 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#52: xsmsubadp 0123214569900000 fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#53: xsmsubadp 7ff0000000000000 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#54: xsmsubadp 7ff7ffffffffffff fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#55: xsmsubadp 7ff8000000000000 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#56: xsmsubadp fff0000000000000 fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#57: xsmsubadp c0d0650f5a07b353 fff8000000000000 0123214569900000 = fff8000000000000 -+#58: xsmsubadp 8000000000000000 fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#59: xsmsubadp 0000000000000000 fff8000000000000 0123214569900000 = fff8000000000000 -+#60: xsmsubadp 0123214569900000 fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#61: xsmsubadp 7ff0000000000000 fff8000000000000 0123214569900000 = fff8000000000000 -+#62: xsmsubadp 7ff7ffffffffffff fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#63: xsmsubadp 7ff8000000000000 fff8000000000000 0123214569900000 = fff8000000000000 -+ -+#0: xsmsubmdp c0d0650f5a07b353 fff0000000000000 fff0000000000000 = 7ff0000000000000 -+#1: xsmsubmdp 0123214569900000 fff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#2: xsmsubmdp c0d0650f5a07b353 fff0000000000000 8000000000000000 = 7ff0000000000000 -+#3: xsmsubmdp 0123214569900000 fff0000000000000 0000000000000000 = fff0000000000000 -+#4: xsmsubmdp c0d0650f5a07b353 fff0000000000000 0123214569900000 = 7ff0000000000000 -+#5: xsmsubmdp 0123214569900000 fff0000000000000 7ff0000000000000 = fff0000000000000 -+#6: xsmsubmdp c0d0650f5a07b353 fff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#7: xsmsubmdp 0123214569900000 fff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#8: xsmsubmdp c0d0650f5a07b353 c0d0650f5a07b353 fff0000000000000 = 7ff0000000000000 -+#9: xsmsubmdp 0123214569900000 c0d0650f5a07b353 c0d0650f5a07b353 = 40d0650f5a07b353 -+#10: xsmsubmdp c0d0650f5a07b353 c0d0650f5a07b353 8000000000000000 = 41b0cc9d05eec2a7 -+#11: xsmsubmdp 0123214569900000 c0d0650f5a07b353 0000000000000000 = 82039a19ca8fcb5f -+#12: xsmsubmdp c0d0650f5a07b353 c0d0650f5a07b353 0123214569900000 = 41b0cc9d05eec2a7 -+#13: xsmsubmdp 0123214569900000 c0d0650f5a07b353 7ff0000000000000 = fff0000000000000 -+#14: xsmsubmdp c0d0650f5a07b353 c0d0650f5a07b353 7ff7ffffffffffff = 7fffffffffffffff -+#15: xsmsubmdp 0123214569900000 c0d0650f5a07b353 7ff8000000000000 = 7ff8000000000000 -+#16: xsmsubmdp c0d0650f5a07b353 8000000000000000 fff0000000000000 = 7ff0000000000000 -+#17: xsmsubmdp 0123214569900000 8000000000000000 c0d0650f5a07b353 = 40d0650f5a07b353 -+#18: xsmsubmdp c0d0650f5a07b353 8000000000000000 8000000000000000 = 0000000000000000 -+#19: xsmsubmdp 0123214569900000 8000000000000000 0000000000000000 = 8000000000000000 -+#20: xsmsubmdp c0d0650f5a07b353 8000000000000000 0123214569900000 = 8123214569900000 -+#21: xsmsubmdp 0123214569900000 8000000000000000 7ff0000000000000 = fff0000000000000 -+#22: xsmsubmdp c0d0650f5a07b353 8000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#23: xsmsubmdp 0123214569900000 8000000000000000 7ff8000000000000 = 7ff8000000000000 -+#24: xsmsubmdp c0d0650f5a07b353 0000000000000000 fff0000000000000 = 7ff0000000000000 -+#25: xsmsubmdp 0123214569900000 0000000000000000 c0d0650f5a07b353 = 40d0650f5a07b353 -+#26: xsmsubmdp c0d0650f5a07b353 0000000000000000 8000000000000000 = 0000000000000000 -+#27: xsmsubmdp 0123214569900000 0000000000000000 0000000000000000 = 0000000000000000 -+#28: xsmsubmdp c0d0650f5a07b353 0000000000000000 0123214569900000 = 8123214569900000 -+#29: xsmsubmdp 0123214569900000 0000000000000000 7ff0000000000000 = fff0000000000000 -+#30: xsmsubmdp c0d0650f5a07b353 0000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#31: xsmsubmdp 0123214569900000 0000000000000000 7ff8000000000000 = 7ff8000000000000 -+#32: xsmsubmdp c0d0650f5a07b353 0123214569900000 fff0000000000000 = 7ff0000000000000 -+#33: xsmsubmdp 0123214569900000 0123214569900000 c0d0650f5a07b353 = 40d0650f5a07b353 -+#34: xsmsubmdp c0d0650f5a07b353 0123214569900000 8000000000000000 = 82039a19ca8fcb5f -+#35: xsmsubmdp 0123214569900000 0123214569900000 0000000000000000 = 0000000000000000 -+#36: xsmsubmdp c0d0650f5a07b353 0123214569900000 404f000000000000 = c04f000000000000 -+#37: xsmsubmdp 0123214569900000 0123214569900000 7ff0000000000000 = fff0000000000000 -+#38: xsmsubmdp c0d0650f5a07b353 0123214569900000 7ff7ffffffffffff = 7fffffffffffffff -+#39: xsmsubmdp 0123214569900000 0123214569900000 7ff8000000000000 = 7ff8000000000000 -+#40: xsmsubmdp c0d0650f5a07b353 7ff0000000000000 fff0000000000000 = 7ff8000000000000 -+#41: xsmsubmdp 0123214569900000 7ff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#42: xsmsubmdp c0d0650f5a07b353 7ff0000000000000 8000000000000000 = fff0000000000000 -+#43: xsmsubmdp 0123214569900000 7ff0000000000000 0000000000000000 = 7ff0000000000000 -+#44: xsmsubmdp c0d0650f5a07b353 7ff0000000000000 0123214569900000 = fff0000000000000 -+#45: xsmsubmdp 0123214569900000 7ff0000000000000 7ff0000000000000 = 7ff8000000000000 -+#46: xsmsubmdp c0d0650f5a07b353 7ff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#47: xsmsubmdp 0123214569900000 7ff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#48: xsmsubmdp c0d0650f5a07b353 fff7ffffffffffff fff0000000000000 = ffffffffffffffff -+#49: xsmsubmdp 0123214569900000 fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#50: xsmsubmdp c0d0650f5a07b353 fff7ffffffffffff 8000000000000000 = ffffffffffffffff -+#51: xsmsubmdp 0123214569900000 fff7ffffffffffff 0000000000000000 = ffffffffffffffff -+#52: xsmsubmdp c0d0650f5a07b353 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#53: xsmsubmdp 0123214569900000 fff7ffffffffffff 7ff0000000000000 = ffffffffffffffff -+#54: xsmsubmdp c0d0650f5a07b353 fff7ffffffffffff 7ff7ffffffffffff = ffffffffffffffff -+#55: xsmsubmdp 0123214569900000 fff7ffffffffffff 7ff8000000000000 = ffffffffffffffff -+#56: xsmsubmdp c0d0650f5a07b353 fff8000000000000 fff0000000000000 = fff8000000000000 -+#57: xsmsubmdp 0123214569900000 fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#58: xsmsubmdp c0d0650f5a07b353 fff8000000000000 8000000000000000 = fff8000000000000 -+#59: xsmsubmdp 0123214569900000 fff8000000000000 0000000000000000 = fff8000000000000 -+#60: xsmsubmdp c0d0650f5a07b353 fff8000000000000 0123214569900000 = fff8000000000000 -+#61: xsmsubmdp 0123214569900000 fff8000000000000 7ff0000000000000 = fff8000000000000 -+#62: xsmsubmdp c0d0650f5a07b353 fff8000000000000 7ff7ffffffffffff = fff8000000000000 -+#63: xsmsubmdp 0123214569900000 fff8000000000000 7ff8000000000000 = fff8000000000000 -+ -+#0: xsnmaddadp fff0000000000000 fff0000000000000 c0d0650f5a07b353 = 7ff8000000000000 -+#1: xsnmaddadp c0d0650f5a07b353 fff0000000000000 0123214569900000 = 7ff0000000000000 -+#2: xsnmaddadp 8000000000000000 fff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#3: xsnmaddadp 0000000000000000 fff0000000000000 0123214569900000 = 7ff0000000000000 -+#4: xsnmaddadp 0123214569900000 fff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#5: xsnmaddadp 7ff0000000000000 fff0000000000000 0123214569900000 = 7ff8000000000000 -+#6: xsnmaddadp 7ff7ffffffffffff fff0000000000000 c0d0650f5a07b353 = 7fffffffffffffff -+#7: xsnmaddadp 7ff8000000000000 fff0000000000000 0123214569900000 = 7ff8000000000000 -+#8: xsnmaddadp fff0000000000000 c0d0650f5a07b353 c0d0650f5a07b353 = 7ff0000000000000 -+#9: xsnmaddadp c0d0650f5a07b353 c0d0650f5a07b353 0123214569900000 = 40d0650f5a07b353 -+#10: xsnmaddadp 8000000000000000 c0d0650f5a07b353 c0d0650f5a07b353 = c1b0cc9d05eec2a7 -+#11: xsnmaddadp 0000000000000000 c0d0650f5a07b353 0123214569900000 = 02039a19ca8fcb5f -+#12: xsnmaddadp 0123214569900000 c0d0650f5a07b353 c0d0650f5a07b353 = c1b0cc9d05eec2a7 -+#13: xsnmaddadp 7ff0000000000000 c0d0650f5a07b353 0123214569900000 = fff0000000000000 -+#14: xsnmaddadp 7ff7ffffffffffff c0d0650f5a07b353 c0d0650f5a07b353 = 7fffffffffffffff -+#15: xsnmaddadp 7ff8000000000000 c0d0650f5a07b353 0123214569900000 = 7ff8000000000000 -+#16: xsnmaddadp fff0000000000000 8000000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#17: xsnmaddadp c0d0650f5a07b353 8000000000000000 0123214569900000 = 40d0650f5a07b353 -+#18: xsnmaddadp 8000000000000000 8000000000000000 c0d0650f5a07b353 = 8000000000000000 -+#19: xsnmaddadp 0000000000000000 8000000000000000 0123214569900000 = 8000000000000000 -+#20: xsnmaddadp 0123214569900000 8000000000000000 c0d0650f5a07b353 = 8123214569900000 -+#21: xsnmaddadp 7ff0000000000000 8000000000000000 0123214569900000 = fff0000000000000 -+#22: xsnmaddadp 7ff7ffffffffffff 8000000000000000 c0d0650f5a07b353 = 7fffffffffffffff -+#23: xsnmaddadp 7ff8000000000000 8000000000000000 0123214569900000 = 7ff8000000000000 -+#24: xsnmaddadp fff0000000000000 0000000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#25: xsnmaddadp c0d0650f5a07b353 0000000000000000 0123214569900000 = 40d0650f5a07b353 -+#26: xsnmaddadp 8000000000000000 0000000000000000 c0d0650f5a07b353 = 0000000000000000 -+#27: xsnmaddadp 0000000000000000 0000000000000000 0123214569900000 = 8000000000000000 -+#28: xsnmaddadp 0123214569900000 0000000000000000 c0d0650f5a07b353 = 8123214569900000 -+#29: xsnmaddadp 7ff0000000000000 0000000000000000 0123214569900000 = fff0000000000000 -+#30: xsnmaddadp 7ff7ffffffffffff 0000000000000000 c0d0650f5a07b353 = 7fffffffffffffff -+#31: xsnmaddadp 7ff8000000000000 0000000000000000 0123214569900000 = 7ff8000000000000 -+#32: xsnmaddadp fff0000000000000 0123214569900000 c0d0650f5a07b353 = 7ff0000000000000 -+#33: xsnmaddadp c0d0650f5a07b353 0123214569900000 0123214569900000 = 40d0650f5a07b353 -+#34: xsnmaddadp 8000000000000000 0123214569900000 c0d0650f5a07b353 = 02039a19ca8fcb5f -+#35: xsnmaddadp 0000000000000000 0123214569900000 0123214569900000 = 8000000000000000 -+#36: xsnmaddadp 404f000000000000 0123214569900000 c0d0650f5a07b353 = c04f000000000000 -+#37: xsnmaddadp 7ff0000000000000 0123214569900000 0123214569900000 = fff0000000000000 -+#38: xsnmaddadp 7ff7ffffffffffff 0123214569900000 c0d0650f5a07b353 = 7fffffffffffffff -+#39: xsnmaddadp 7ff8000000000000 0123214569900000 0123214569900000 = 7ff8000000000000 -+#40: xsnmaddadp fff0000000000000 7ff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#41: xsnmaddadp c0d0650f5a07b353 7ff0000000000000 0123214569900000 = fff0000000000000 -+#42: xsnmaddadp 8000000000000000 7ff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#43: xsnmaddadp 0000000000000000 7ff0000000000000 0123214569900000 = fff0000000000000 -+#44: xsnmaddadp 0123214569900000 7ff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#45: xsnmaddadp 7ff0000000000000 7ff0000000000000 0123214569900000 = fff0000000000000 -+#46: xsnmaddadp 7ff7ffffffffffff 7ff0000000000000 c0d0650f5a07b353 = 7fffffffffffffff -+#47: xsnmaddadp 7ff8000000000000 7ff0000000000000 0123214569900000 = 7ff8000000000000 -+#48: xsnmaddadp fff0000000000000 fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#49: xsnmaddadp c0d0650f5a07b353 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#50: xsnmaddadp 8000000000000000 fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#51: xsnmaddadp 0000000000000000 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#52: xsnmaddadp 0123214569900000 fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#53: xsnmaddadp 7ff0000000000000 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#54: xsnmaddadp 7ff7ffffffffffff fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#55: xsnmaddadp 7ff8000000000000 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#56: xsnmaddadp fff0000000000000 fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#57: xsnmaddadp c0d0650f5a07b353 fff8000000000000 0123214569900000 = fff8000000000000 -+#58: xsnmaddadp 8000000000000000 fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#59: xsnmaddadp 0000000000000000 fff8000000000000 0123214569900000 = fff8000000000000 -+#60: xsnmaddadp 0123214569900000 fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#61: xsnmaddadp 7ff0000000000000 fff8000000000000 0123214569900000 = fff8000000000000 -+#62: xsnmaddadp 7ff7ffffffffffff fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#63: xsnmaddadp 7ff8000000000000 fff8000000000000 0123214569900000 = fff8000000000000 -+ -+#0: xsnmaddmdp c0d0650f5a07b353 fff0000000000000 fff0000000000000 = 7ff8000000000000 -+#1: xsnmaddmdp 0123214569900000 fff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#2: xsnmaddmdp c0d0650f5a07b353 fff0000000000000 8000000000000000 = fff0000000000000 -+#3: xsnmaddmdp 0123214569900000 fff0000000000000 0000000000000000 = 7ff0000000000000 -+#4: xsnmaddmdp c0d0650f5a07b353 fff0000000000000 0123214569900000 = fff0000000000000 -+#5: xsnmaddmdp 0123214569900000 fff0000000000000 7ff0000000000000 = 7ff8000000000000 -+#6: xsnmaddmdp c0d0650f5a07b353 fff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#7: xsnmaddmdp 0123214569900000 fff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#8: xsnmaddmdp c0d0650f5a07b353 c0d0650f5a07b353 fff0000000000000 = 7ff0000000000000 -+#9: xsnmaddmdp 0123214569900000 c0d0650f5a07b353 c0d0650f5a07b353 = 40d0650f5a07b353 -+#10: xsnmaddmdp c0d0650f5a07b353 c0d0650f5a07b353 8000000000000000 = c1b0cc9d05eec2a7 -+#11: xsnmaddmdp 0123214569900000 c0d0650f5a07b353 0000000000000000 = 02039a19ca8fcb5f -+#12: xsnmaddmdp c0d0650f5a07b353 c0d0650f5a07b353 0123214569900000 = c1b0cc9d05eec2a7 -+#13: xsnmaddmdp 0123214569900000 c0d0650f5a07b353 7ff0000000000000 = fff0000000000000 -+#14: xsnmaddmdp c0d0650f5a07b353 c0d0650f5a07b353 7ff7ffffffffffff = 7fffffffffffffff -+#15: xsnmaddmdp 0123214569900000 c0d0650f5a07b353 7ff8000000000000 = 7ff8000000000000 -+#16: xsnmaddmdp c0d0650f5a07b353 8000000000000000 fff0000000000000 = 7ff0000000000000 -+#17: xsnmaddmdp 0123214569900000 8000000000000000 c0d0650f5a07b353 = 40d0650f5a07b353 -+#18: xsnmaddmdp c0d0650f5a07b353 8000000000000000 8000000000000000 = 8000000000000000 -+#19: xsnmaddmdp 0123214569900000 8000000000000000 0000000000000000 = 8000000000000000 -+#20: xsnmaddmdp c0d0650f5a07b353 8000000000000000 0123214569900000 = 8123214569900000 -+#21: xsnmaddmdp 0123214569900000 8000000000000000 7ff0000000000000 = fff0000000000000 -+#22: xsnmaddmdp c0d0650f5a07b353 8000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#23: xsnmaddmdp 0123214569900000 8000000000000000 7ff8000000000000 = 7ff8000000000000 -+#24: xsnmaddmdp c0d0650f5a07b353 0000000000000000 fff0000000000000 = 7ff0000000000000 -+#25: xsnmaddmdp 0123214569900000 0000000000000000 c0d0650f5a07b353 = 40d0650f5a07b353 -+#26: xsnmaddmdp c0d0650f5a07b353 0000000000000000 8000000000000000 = 0000000000000000 -+#27: xsnmaddmdp 0123214569900000 0000000000000000 0000000000000000 = 8000000000000000 -+#28: xsnmaddmdp c0d0650f5a07b353 0000000000000000 0123214569900000 = 8123214569900000 -+#29: xsnmaddmdp 0123214569900000 0000000000000000 7ff0000000000000 = fff0000000000000 -+#30: xsnmaddmdp c0d0650f5a07b353 0000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#31: xsnmaddmdp 0123214569900000 0000000000000000 7ff8000000000000 = 7ff8000000000000 -+#32: xsnmaddmdp c0d0650f5a07b353 0123214569900000 fff0000000000000 = 7ff0000000000000 -+#33: xsnmaddmdp 0123214569900000 0123214569900000 c0d0650f5a07b353 = 40d0650f5a07b353 -+#34: xsnmaddmdp c0d0650f5a07b353 0123214569900000 8000000000000000 = 02039a19ca8fcb5f -+#35: xsnmaddmdp 0123214569900000 0123214569900000 0000000000000000 = 8000000000000000 -+#36: xsnmaddmdp c0d0650f5a07b353 0123214569900000 404f000000000000 = c04f000000000000 -+#37: xsnmaddmdp 0123214569900000 0123214569900000 7ff0000000000000 = fff0000000000000 -+#38: xsnmaddmdp c0d0650f5a07b353 0123214569900000 7ff7ffffffffffff = 7fffffffffffffff -+#39: xsnmaddmdp 0123214569900000 0123214569900000 7ff8000000000000 = 7ff8000000000000 -+#40: xsnmaddmdp c0d0650f5a07b353 7ff0000000000000 fff0000000000000 = 7ff0000000000000 -+#41: xsnmaddmdp 0123214569900000 7ff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#42: xsnmaddmdp c0d0650f5a07b353 7ff0000000000000 8000000000000000 = 7ff0000000000000 -+#43: xsnmaddmdp 0123214569900000 7ff0000000000000 0000000000000000 = fff0000000000000 -+#44: xsnmaddmdp c0d0650f5a07b353 7ff0000000000000 0123214569900000 = 7ff0000000000000 -+#45: xsnmaddmdp 0123214569900000 7ff0000000000000 7ff0000000000000 = fff0000000000000 -+#46: xsnmaddmdp c0d0650f5a07b353 7ff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#47: xsnmaddmdp 0123214569900000 7ff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#48: xsnmaddmdp c0d0650f5a07b353 fff7ffffffffffff fff0000000000000 = ffffffffffffffff -+#49: xsnmaddmdp 0123214569900000 fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#50: xsnmaddmdp c0d0650f5a07b353 fff7ffffffffffff 8000000000000000 = ffffffffffffffff -+#51: xsnmaddmdp 0123214569900000 fff7ffffffffffff 0000000000000000 = ffffffffffffffff -+#52: xsnmaddmdp c0d0650f5a07b353 fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#53: xsnmaddmdp 0123214569900000 fff7ffffffffffff 7ff0000000000000 = ffffffffffffffff -+#54: xsnmaddmdp c0d0650f5a07b353 fff7ffffffffffff 7ff7ffffffffffff = ffffffffffffffff -+#55: xsnmaddmdp 0123214569900000 fff7ffffffffffff 7ff8000000000000 = ffffffffffffffff -+#56: xsnmaddmdp c0d0650f5a07b353 fff8000000000000 fff0000000000000 = fff8000000000000 -+#57: xsnmaddmdp 0123214569900000 fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#58: xsnmaddmdp c0d0650f5a07b353 fff8000000000000 8000000000000000 = fff8000000000000 -+#59: xsnmaddmdp 0123214569900000 fff8000000000000 0000000000000000 = fff8000000000000 -+#60: xsnmaddmdp c0d0650f5a07b353 fff8000000000000 0123214569900000 = fff8000000000000 -+#61: xsnmaddmdp 0123214569900000 fff8000000000000 7ff0000000000000 = fff8000000000000 -+#62: xsnmaddmdp c0d0650f5a07b353 fff8000000000000 7ff7ffffffffffff = fff8000000000000 -+#63: xsnmaddmdp 0123214569900000 fff8000000000000 7ff8000000000000 = fff8000000000000 -+ -+#0: xsmuldp fff0000000000000 fff0000000000000 = 7ff0000000000000 -+#1: xsmuldp fff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#2: xsmuldp fff0000000000000 8000000000000000 = 7ff8000000000000 -+#3: xsmuldp fff0000000000000 0000000000000000 = 7ff8000000000000 -+#4: xsmuldp fff0000000000000 0123214569900000 = fff0000000000000 -+#5: xsmuldp fff0000000000000 7ff0000000000000 = fff0000000000000 -+#6: xsmuldp fff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#7: xsmuldp fff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#8: xsmuldp c0d0650f5a07b353 fff0000000000000 = 7ff0000000000000 -+#9: xsmuldp c0d0650f5a07b353 c0d0650f5a07b353 = 41b0cc9d05eec2a7 -+#10: xsmuldp c0d0650f5a07b353 8000000000000000 = 0000000000000000 -+#11: xsmuldp c0d0650f5a07b353 0000000000000000 = 8000000000000000 -+#12: xsmuldp c0d0650f5a07b353 0123214569900000 = 82039a19ca8fcb5f -+#13: xsmuldp c0d0650f5a07b353 7ff0000000000000 = fff0000000000000 -+#14: xsmuldp c0d0650f5a07b353 7ff7ffffffffffff = 7fffffffffffffff -+#15: xsmuldp c0d0650f5a07b353 7ff8000000000000 = 7ff8000000000000 -+#16: xsmuldp 8000000000000000 fff0000000000000 = 7ff8000000000000 -+#17: xsmuldp 8000000000000000 c0d0650f5a07b353 = 0000000000000000 -+#18: xsmuldp 8000000000000000 8000000000000000 = 0000000000000000 -+#19: xsmuldp 8000000000000000 0000000000000000 = 8000000000000000 -+#20: xsmuldp 8000000000000000 0123214569900000 = 8000000000000000 -+#21: xsmuldp 8000000000000000 7ff0000000000000 = 7ff8000000000000 -+#22: xsmuldp 8000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#23: xsmuldp 8000000000000000 7ff8000000000000 = 7ff8000000000000 -+#24: xsmuldp 0000000000000000 fff0000000000000 = 7ff8000000000000 -+#25: xsmuldp 0000000000000000 c0d0650f5a07b353 = 8000000000000000 -+#26: xsmuldp 0000000000000000 8000000000000000 = 8000000000000000 -+#27: xsmuldp 0000000000000000 0000000000000000 = 0000000000000000 -+#28: xsmuldp 0000000000000000 0123214569900000 = 0000000000000000 -+#29: xsmuldp 0000000000000000 7ff0000000000000 = 7ff8000000000000 -+#30: xsmuldp 0000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#31: xsmuldp 0000000000000000 7ff8000000000000 = 7ff8000000000000 -+#32: xsmuldp 0123214569900000 fff0000000000000 = fff0000000000000 -+#33: xsmuldp 0123214569900000 c0d0650f5a07b353 = 82039a19ca8fcb5f -+#34: xsmuldp 0123214569900000 8000000000000000 = 8000000000000000 -+#35: xsmuldp 0123214569900000 0000000000000000 = 0000000000000000 -+#36: xsmuldp 0123214569900000 404f000000000000 = 0182883b3e438000 -+#37: xsmuldp 0123214569900000 7ff0000000000000 = 7ff0000000000000 -+#38: xsmuldp 0123214569900000 7ff7ffffffffffff = 7fffffffffffffff -+#39: xsmuldp 0123214569900000 7ff8000000000000 = 7ff8000000000000 -+#40: xsmuldp 7ff0000000000000 fff0000000000000 = fff0000000000000 -+#41: xsmuldp 7ff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#42: xsmuldp 7ff0000000000000 8000000000000000 = 7ff8000000000000 -+#43: xsmuldp 7ff0000000000000 0000000000000000 = 7ff8000000000000 -+#44: xsmuldp 7ff0000000000000 0123214569900000 = 7ff0000000000000 -+#45: xsmuldp 7ff0000000000000 7ff0000000000000 = 7ff0000000000000 -+#46: xsmuldp 7ff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#47: xsmuldp 7ff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#48: xsmuldp fff7ffffffffffff fff0000000000000 = ffffffffffffffff -+#49: xsmuldp fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#50: xsmuldp fff7ffffffffffff 8000000000000000 = ffffffffffffffff -+#51: xsmuldp fff7ffffffffffff 0000000000000000 = ffffffffffffffff -+#52: xsmuldp fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#53: xsmuldp fff7ffffffffffff 7ff0000000000000 = ffffffffffffffff -+#54: xsmuldp fff7ffffffffffff 7ff7ffffffffffff = ffffffffffffffff -+#55: xsmuldp fff7ffffffffffff 7ff8000000000000 = ffffffffffffffff -+#56: xsmuldp fff8000000000000 fff0000000000000 = fff8000000000000 -+#57: xsmuldp fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#58: xsmuldp fff8000000000000 8000000000000000 = fff8000000000000 -+#59: xsmuldp fff8000000000000 0000000000000000 = fff8000000000000 -+#60: xsmuldp fff8000000000000 0123214569900000 = fff8000000000000 -+#61: xsmuldp fff8000000000000 7ff0000000000000 = fff8000000000000 -+#62: xsmuldp fff8000000000000 7ff7ffffffffffff = fff8000000000000 -+#63: xsmuldp fff8000000000000 7ff8000000000000 = fff8000000000000 -+ -+#0: xssubdp fff0000000000000 fff0000000000000 = 7ff8000000000000 -+#1: xssubdp fff0000000000000 c0d0650f5a07b353 = fff0000000000000 -+#2: xssubdp fff0000000000000 8000000000000000 = fff0000000000000 -+#3: xssubdp fff0000000000000 0000000000000000 = fff0000000000000 -+#4: xssubdp fff0000000000000 0123214569900000 = fff0000000000000 -+#5: xssubdp fff0000000000000 7ff0000000000000 = fff0000000000000 -+#6: xssubdp fff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#7: xssubdp fff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#8: xssubdp c0d0650f5a07b353 fff0000000000000 = 7ff0000000000000 -+#9: xssubdp c0d0650f5a07b353 c0d0650f5a07b353 = 0000000000000000 -+#10: xssubdp c0d0650f5a07b353 8000000000000000 = c0d0650f5a07b353 -+#11: xssubdp c0d0650f5a07b353 0000000000000000 = c0d0650f5a07b353 -+#12: xssubdp c0d0650f5a07b353 0123214569900000 = c0d0650f5a07b353 -+#13: xssubdp c0d0650f5a07b353 7ff0000000000000 = fff0000000000000 -+#14: xssubdp c0d0650f5a07b353 7ff7ffffffffffff = 7fffffffffffffff -+#15: xssubdp c0d0650f5a07b353 7ff8000000000000 = 7ff8000000000000 -+#16: xssubdp 8000000000000000 fff0000000000000 = 7ff0000000000000 -+#17: xssubdp 8000000000000000 c0d0650f5a07b353 = 40d0650f5a07b353 -+#18: xssubdp 8000000000000000 8000000000000000 = 0000000000000000 -+#19: xssubdp 8000000000000000 0000000000000000 = 8000000000000000 -+#20: xssubdp 8000000000000000 0123214569900000 = 8123214569900000 -+#21: xssubdp 8000000000000000 7ff0000000000000 = fff0000000000000 -+#22: xssubdp 8000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#23: xssubdp 8000000000000000 7ff8000000000000 = 7ff8000000000000 -+#24: xssubdp 0000000000000000 fff0000000000000 = 7ff0000000000000 -+#25: xssubdp 0000000000000000 c0d0650f5a07b353 = 40d0650f5a07b353 -+#26: xssubdp 0000000000000000 8000000000000000 = 0000000000000000 -+#27: xssubdp 0000000000000000 0000000000000000 = 0000000000000000 -+#28: xssubdp 0000000000000000 0123214569900000 = 8123214569900000 -+#29: xssubdp 0000000000000000 7ff0000000000000 = fff0000000000000 -+#30: xssubdp 0000000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#31: xssubdp 0000000000000000 7ff8000000000000 = 7ff8000000000000 -+#32: xssubdp 0123214569900000 fff0000000000000 = 7ff0000000000000 -+#33: xssubdp 0123214569900000 c0d0650f5a07b353 = 40d0650f5a07b353 -+#34: xssubdp 0123214569900000 8000000000000000 = 0123214569900000 -+#35: xssubdp 0123214569900000 0000000000000000 = 0123214569900000 -+#36: xssubdp 0123214569900000 404f000000000000 = c04f000000000000 -+#37: xssubdp 0123214569900000 7ff0000000000000 = fff0000000000000 -+#38: xssubdp 0123214569900000 7ff7ffffffffffff = 7fffffffffffffff -+#39: xssubdp 0123214569900000 7ff8000000000000 = 7ff8000000000000 -+#40: xssubdp 7ff0000000000000 fff0000000000000 = 7ff0000000000000 -+#41: xssubdp 7ff0000000000000 c0d0650f5a07b353 = 7ff0000000000000 -+#42: xssubdp 7ff0000000000000 8000000000000000 = 7ff0000000000000 -+#43: xssubdp 7ff0000000000000 0000000000000000 = 7ff0000000000000 -+#44: xssubdp 7ff0000000000000 0123214569900000 = 7ff0000000000000 -+#45: xssubdp 7ff0000000000000 7ff0000000000000 = 7ff8000000000000 -+#46: xssubdp 7ff0000000000000 7ff7ffffffffffff = 7fffffffffffffff -+#47: xssubdp 7ff0000000000000 7ff8000000000000 = 7ff8000000000000 -+#48: xssubdp fff7ffffffffffff fff0000000000000 = ffffffffffffffff -+#49: xssubdp fff7ffffffffffff c0d0650f5a07b353 = ffffffffffffffff -+#50: xssubdp fff7ffffffffffff 8000000000000000 = ffffffffffffffff -+#51: xssubdp fff7ffffffffffff 0000000000000000 = ffffffffffffffff -+#52: xssubdp fff7ffffffffffff 0123214569900000 = ffffffffffffffff -+#53: xssubdp fff7ffffffffffff 7ff0000000000000 = ffffffffffffffff -+#54: xssubdp fff7ffffffffffff 7ff7ffffffffffff = ffffffffffffffff -+#55: xssubdp fff7ffffffffffff 7ff8000000000000 = ffffffffffffffff -+#56: xssubdp fff8000000000000 fff0000000000000 = fff8000000000000 -+#57: xssubdp fff8000000000000 c0d0650f5a07b353 = fff8000000000000 -+#58: xssubdp fff8000000000000 8000000000000000 = fff8000000000000 -+#59: xssubdp fff8000000000000 0000000000000000 = fff8000000000000 -+#60: xssubdp fff8000000000000 0123214569900000 = fff8000000000000 -+#61: xssubdp fff8000000000000 7ff0000000000000 = fff8000000000000 -+#62: xssubdp fff8000000000000 7ff7ffffffffffff = fff8000000000000 -+#63: xssubdp fff8000000000000 7ff8000000000000 = fff8000000000000 -+ -+ -+Test VSX scalar integer conversion instructions -+#0: xscvdpsxds 3fd8000000000000 => 0000000000000000 -+#1: xscvdpsxds 404f000000000000 => 000000000000003e -+#2: xscvdpsxds 0018000000b77501 => 0000000000000000 -+#3: xscvdpsxds 7fe800000000051b => 7fffffffffffffff -+#4: xscvdpsxds 0123214569900000 => 0000000000000000 -+#5: xscvdpsxds 0000000000000000 => 0000000000000000 -+#6: xscvdpsxds 8000000000000000 => 0000000000000000 -+#7: xscvdpsxds 7ff0000000000000 => 7fffffffffffffff -+#8: xscvdpsxds fff0000000000000 => 8000000000000000 -+#9: xscvdpsxds 7ff7ffffffffffff => 8000000000000000 -+#10: xscvdpsxds fff7ffffffffffff => 8000000000000000 -+#11: xscvdpsxds 7ff8000000000000 => 8000000000000000 -+#12: xscvdpsxds fff8000000000000 => 8000000000000000 -+#13: xscvdpsxds 8008340000078000 => 0000000000000000 -+#14: xscvdpsxds c0d0650f5a07b353 => ffffffffffffbe6c -+ -+#0: xscvsxddp 3fd8000000000000 => 43cfec0000000000 -+#1: xscvsxddp 404f000000000000 => 43d013c000000000 -+#2: xscvsxddp 0018000000b77501 => 4338000000b77501 -+#3: xscvsxddp 7fe800000000051b => 43dffa0000000001 -+#4: xscvsxddp 0123214569900000 => 4372321456990000 -+#5: xscvsxddp 0000000000000000 => 0000000000000000 -+#6: xscvsxddp 8000000000000000 => c3e0000000000000 -+#7: xscvsxddp 7ff0000000000000 => 43dffc0000000000 -+#8: xscvsxddp fff0000000000000 => c330000000000000 -+#9: xscvsxddp 7ff7ffffffffffff => 43dffe0000000000 -+#10: xscvsxddp fff7ffffffffffff => c320000000000002 -+#11: xscvsxddp 7ff8000000000000 => 43dffe0000000000 -+#12: xscvsxddp fff8000000000000 => c320000000000000 -+#13: xscvsxddp 8008340000078000 => c3dffdf2fffffe20 -+#14: xscvsxddp c0d0650f5a07b353 => c3cf97cd7852fc26 -+ -+#0: xscvuxddp 3fd8000000000000 => 43cfec0000000000 -+#1: xscvuxddp 404f000000000000 => 43d013c000000000 -+#2: xscvuxddp 0018000000b77501 => 4338000000b77501 -+#3: xscvuxddp 7fe800000000051b => 43dffa0000000001 -+#4: xscvuxddp 0123214569900000 => 4372321456990000 -+#5: xscvuxddp 0000000000000000 => 0000000000000000 -+#6: xscvuxddp 8000000000000000 => 43e0000000000000 -+#7: xscvuxddp 7ff0000000000000 => 43dffc0000000000 -+#8: xscvuxddp fff0000000000000 => 43effe0000000000 -+#9: xscvuxddp 7ff7ffffffffffff => 43dffe0000000000 -+#10: xscvuxddp fff7ffffffffffff => 43efff0000000000 -+#11: xscvuxddp 7ff8000000000000 => 43dffe0000000000 -+#12: xscvuxddp fff8000000000000 => 43efff0000000000 -+#13: xscvuxddp 8008340000078000 => 43e00106800000f0 -+#14: xscvuxddp c0d0650f5a07b353 => 43e81a0ca1eb40f6 -+ -+ -+Testcase PASSED -Index: none/tests/ppc64/test_isa_2_06_part1.vgtest -=================================================================== ---- /dev/null -+++ none/tests/ppc64/test_isa_2_06_part1.vgtest -@@ -0,0 +1,2 @@ -+prereq: ../../../tests/check_isa-2_06_cap -+prog: test_isa_2_06_part1 -Index: tests/check_isa-2_06_cap -=================================================================== ---- /dev/null -+++ tests/check_isa-2_06_cap -@@ -0,0 +1,11 @@ -+#!/bin/sh -+ -+# We use this script to check whether or not the processor supports Power ISA 2.06. -+ -+LD_SHOW_AUXV=1 /bin/true | grep arch_2_06 > /dev/null 2>&1 -+if [ "$?" -ne "0" ]; then -+ exit 1 -+else -+ exit 0 -+fi -+ diff --git a/vg_bug270851_r2130.patch b/vg_bug270851_r2130.patch deleted file mode 100644 index 91399d0..0000000 --- a/vg_bug270851_r2130.patch +++ /dev/null @@ -1,62 +0,0 @@ -Index: VEX/priv/ir_defs.c -=================================================================== ---- VEX/priv/ir_defs.c (revision 2129) -+++ VEX/priv/ir_defs.c (revision 2130) -@@ -2265,7 +2265,7 @@ - case Iop_I32StoF64: UNARY(Ity_I32, Ity_F64); - case Iop_I64StoF64: BINARY(ity_RMode,Ity_I64, Ity_F64); - case Iop_I64UtoF64: BINARY(ity_RMode,Ity_I64, Ity_F64); -- case Iop_I64UtoF32: BINARY(ity_RMode,Ity_I64, Ity_F64); -+ case Iop_I64UtoF32: BINARY(ity_RMode,Ity_I64, Ity_F32); - - case Iop_I32UtoF64: UNARY(Ity_I32, Ity_F64); - -Index: VEX/priv/guest_ppc_toIR.c -=================================================================== ---- VEX/priv/guest_ppc_toIR.c (revision 2129) -+++ VEX/priv/guest_ppc_toIR.c (revision 2130) -@@ -7256,7 +7256,7 @@ - case 0x3Ce: // fcfidus (Float convert from unsigned DWord to single precision) - DIP("fcfidus%s fr%u,fr%u\n", flag_rC ? ".":"", frD_addr, frB_addr); - assign( r_tmp64, unop( Iop_ReinterpF64asI64, mkexpr(frB)) ); -- assign( frD, binop( Iop_I64UtoF32, rm, mkexpr( r_tmp64 ) ) ); -+ assign( frD, unop( Iop_F32toF64, binop( Iop_I64UtoF32, rm, mkexpr( r_tmp64 ) ) ) ); - goto putFR; - } - } -Index: VEX/priv/host_ppc_isel.c -=================================================================== ---- VEX/priv/host_ppc_isel.c (revision 2129) -+++ VEX/priv/host_ppc_isel.c (revision 2130) -@@ -3190,8 +3190,7 @@ - return r_dst; - } - -- if (e->Iex.Binop.op == Iop_I64StoF64 || e->Iex.Binop.op == Iop_I64UtoF64 -- || e->Iex.Binop.op == Iop_I64UtoF32) { -+ if (e->Iex.Binop.op == Iop_I64StoF64 || e->Iex.Binop.op == Iop_I64UtoF64) { - if (mode64) { - HReg fdst = newVRegF(env); - HReg isrc = iselWordExpr_R(env, e->Iex.Binop.arg2); -@@ -3206,8 +3205,8 @@ - addInstr(env, PPCInstr_Store(8, zero_r1, isrc, True/*mode64*/)); - addInstr(env, PPCInstr_FpLdSt(True/*load*/, 8, fdst, zero_r1)); - addInstr(env, PPCInstr_FpCftI(True/*I->F*/, False/*int64*/, -- e->Iex.Binop.op == Iop_I64StoF64 ? True : False, -- e->Iex.Binop.op == Iop_I64UtoF32 ? False : True, -+ e->Iex.Binop.op == Iop_I64StoF64, -+ True/*fdst is 64 bit*/, - fdst, fdst)); - - add_to_sp( env, 16 ); -@@ -3234,8 +3233,8 @@ - addInstr(env, PPCInstr_Store(4, four_r1, isrcLo, False/*mode32*/)); - addInstr(env, PPCInstr_FpLdSt(True/*load*/, 8, fdst, zero_r1)); - addInstr(env, PPCInstr_FpCftI(True/*I->F*/, False/*int64*/, -- e->Iex.Binop.op == Iop_I64StoF64 ? True : False, -- e->Iex.Binop.op == Iop_I64UtoF32 ? False : True, -+ e->Iex.Binop.op == Iop_I64StoF64, -+ True/*fdst is 64 bit*/, - fdst, fdst)); - - add_to_sp( env, 16 ); diff --git a/vg_bug270851_r2148.patch b/vg_bug270851_r2148.patch deleted file mode 100644 index e96bce6..0000000 --- a/vg_bug270851_r2148.patch +++ /dev/null @@ -1,211 +0,0 @@ -Index: VEX/priv/host_ppc_defs.c -=================================================================== ---- VEX/priv/host_ppc_defs.c.orig -+++ VEX/priv/host_ppc_defs.c -@@ -962,17 +962,65 @@ PPCInstr* PPCInstr_FpRSP ( HReg dst, HRe - i->Pin.FpRSP.src = src; - return i; - } -+ -+/* -+Valid combo | fromI | int32 | syned | flt64 | -+-------------------------------------------- -+ | n n n n | -+-------------------------------------------- -+ F64->I64U | n n n y | -+-------------------------------------------- -+ | n n y n | -+-------------------------------------------- -+ F64->I64S | n n y y | -+-------------------------------------------- -+ | n y n n | -+-------------------------------------------- -+ F64->I32U | n y n y | -+-------------------------------------------- -+ | n y y n | -+-------------------------------------------- -+ F64->I32S | n y y y | -+-------------------------------------------- -+ I64U->F32 | y n n n | -+-------------------------------------------- -+ I64U->F64 | y n n y | -+-------------------------------------------- -+ | y n y n | -+-------------------------------------------- -+ I64S->F64 | y n y y | -+-------------------------------------------- -+ | y y n n | -+-------------------------------------------- -+ | y y n y | -+-------------------------------------------- -+ | y y y n | -+-------------------------------------------- -+ | y y y y | -+-------------------------------------------- -+*/ - PPCInstr* PPCInstr_FpCftI ( Bool fromI, Bool int32, Bool syned, -- Bool dst64, HReg dst, HReg src ) { -+ Bool flt64, HReg dst, HReg src ) { -+ Bool tmp = fromI | int32 | syned | flt64; -+ vassert(tmp == True || tmp == False); // iow, no high bits set -+ UShort conversion = 0; -+ conversion = (fromI << 3) | (int32 << 2) | (syned << 1) | flt64; -+ switch (conversion) { -+ // Supported conversion operations -+ case 1: case 3: case 5: case 7: -+ case 8: case 9: case 11: -+ break; -+ default: -+ vpanic("PPCInstr_FpCftI(ppc_host)"); -+ } - PPCInstr* i = LibVEX_Alloc(sizeof(PPCInstr)); - i->tag = Pin_FpCftI; - i->Pin.FpCftI.fromI = fromI; - i->Pin.FpCftI.int32 = int32; - i->Pin.FpCftI.syned = syned; -- i->Pin.FpCftI.dst64 = dst64; -+ i->Pin.FpCftI.flt64 = flt64; - i->Pin.FpCftI.dst = dst; - i->Pin.FpCftI.src = src; -- vassert(!(int32 && fromI)); /* no such insn ("fcfiw"). */ - return i; - } - PPCInstr* PPCInstr_FpCMov ( PPCCondCode cond, HReg dst, HReg src ) { -@@ -1445,7 +1493,7 @@ void ppPPCInstr ( PPCInstr* i, Bool mode - if (i->Pin.FpCftI.fromI == True && i->Pin.FpCftI.int32 == False) { - if (i->Pin.FpCftI.syned == True) - str = "fcfid"; -- else if (i->Pin.FpCftI.dst64 == True) -+ else if (i->Pin.FpCftI.flt64 == True) - str = "fcfidu"; - else - str = "fcfidus"; -@@ -3397,7 +3445,7 @@ Int emit_PPCInstr ( UChar* buf, Int nbuf - // fcfid (conv i64 to f64), PPC64 p434 - p = mkFormX(p, 63, fr_dst, 0, fr_src, 846, 0); - goto done; -- } else if (i->Pin.FpCftI.dst64 == True) { -+ } else if (i->Pin.FpCftI.flt64 == True) { - // fcfidu (conv u64 to f64) - p = mkFormX(p, 63, fr_dst, 0, fr_src, 974, 0); - goto done; -Index: VEX/priv/host_ppc_defs.h -=================================================================== ---- VEX/priv/host_ppc_defs.h.orig -+++ VEX/priv/host_ppc_defs.h -@@ -461,7 +461,7 @@ typedef - Pin_FpLdSt, /* FP load/store */ - Pin_FpSTFIW, /* stfiwx */ - Pin_FpRSP, /* FP round IEEE754 double to IEEE754 single */ -- Pin_FpCftI, /* fcfid/fctid/fctiw */ -+ Pin_FpCftI, /* fcfid[u,s,us]/fctid[u]/fctiw[u] */ - Pin_FpCMov, /* FP floating point conditional move */ - Pin_FpLdFPSCR, /* mtfsf */ - Pin_FpCmp, /* FP compare, generating value into int reg */ -@@ -662,13 +662,15 @@ typedef - HReg src; - HReg dst; - } FpRSP; -- /* fcfid/fctid/fctiw. Note there's no fcfiw so fromI==True -- && int32==True is not allowed. */ -+ /* fcfid[u,s,us]/fctid[u]/fctiw[u]. Only some combinations -+ of the various fields are allowed. This is asserted for -+ and documented in the code for the constructor, -+ PPCInstr_FpCftI, in host_ppc_defs.c. */ - struct { -- Bool fromI; /* False==F->I, True==I->F */ -- Bool int32; /* True== I is 32, False==I is 64 */ -+ Bool fromI; /* True== I->F, False== F->I */ -+ Bool int32; /* True== I is 32, False== I is 64 */ - Bool syned; -- Bool dst64; /* True==dest is 64bit; False==dest is 32bit */ -+ Bool flt64; /* True== F is 64, False== F is 32 */ - HReg src; - HReg dst; - } FpCftI; -Index: VEX/priv/host_ppc_isel.c -=================================================================== ---- VEX/priv/host_ppc_isel.c.orig -+++ VEX/priv/host_ppc_isel.c -@@ -1471,8 +1471,9 @@ static HReg iselWordExpr_R_wrk ( ISelEnv - set_FPU_rounding_mode( env, e->Iex.Binop.arg1 ); - - sub_from_sp( env, 16 ); -- addInstr(env, PPCInstr_FpCftI(False/*F->I*/, True/*int32*/, True, -- False, ftmp, fsrc)); -+ addInstr(env, PPCInstr_FpCftI(False/*F->I*/, True/*int32*/, -+ True/*syned*/, True/*flt64*/, -+ ftmp, fsrc)); - addInstr(env, PPCInstr_FpSTFIW(r1, ftmp)); - addInstr(env, PPCInstr_Load(4, idst, zero_r1, mode64)); - -@@ -2959,6 +2960,8 @@ static HReg iselFltExpr ( ISelEnv* env, - /* DO NOT CALL THIS DIRECTLY */ - static HReg iselFltExpr_wrk ( ISelEnv* env, IRExpr* e ) - { -+ Bool mode64 = env->mode64; -+ - IRType ty = typeOfIRExpr(env->type_env,e); - vassert(ty == Ity_F32); - -@@ -3027,6 +3030,60 @@ static HReg iselFltExpr_wrk ( ISelEnv* e - return fdst; - } - -+ if (e->tag == Iex_Binop && e->Iex.Binop.op == Iop_I64UtoF32) { -+ if (mode64) { -+ HReg fdst = newVRegF(env); -+ HReg isrc = iselWordExpr_R(env, e->Iex.Binop.arg2); -+ HReg r1 = StackFramePtr(env->mode64); -+ PPCAMode* zero_r1 = PPCAMode_IR( 0, r1 ); -+ -+ /* Set host rounding mode */ -+ set_FPU_rounding_mode( env, e->Iex.Binop.arg1 ); -+ -+ sub_from_sp( env, 16 ); -+ -+ addInstr(env, PPCInstr_Store(8, zero_r1, isrc, True/*mode64*/)); -+ addInstr(env, PPCInstr_FpLdSt(True/*load*/, 8, fdst, zero_r1)); -+ addInstr(env, PPCInstr_FpCftI(True/*I->F*/, False/*int64*/, -+ False, False, -+ fdst, fdst)); -+ -+ add_to_sp( env, 16 ); -+ -+ ///* Restore default FPU rounding. */ -+ //set_FPU_rounding_default( env ); -+ return fdst; -+ } else { -+ /* 32-bit mode */ -+ HReg fdst = newVRegF(env); -+ HReg isrcHi, isrcLo; -+ HReg r1 = StackFramePtr(env->mode64); -+ PPCAMode* zero_r1 = PPCAMode_IR( 0, r1 ); -+ PPCAMode* four_r1 = PPCAMode_IR( 4, r1 ); -+ -+ iselInt64Expr(&isrcHi, &isrcLo, env, e->Iex.Binop.arg2); -+ -+ /* Set host rounding mode */ -+ set_FPU_rounding_mode( env, e->Iex.Binop.arg1 ); -+ -+ sub_from_sp( env, 16 ); -+ -+ addInstr(env, PPCInstr_Store(4, zero_r1, isrcHi, False/*mode32*/)); -+ addInstr(env, PPCInstr_Store(4, four_r1, isrcLo, False/*mode32*/)); -+ addInstr(env, PPCInstr_FpLdSt(True/*load*/, 8, fdst, zero_r1)); -+ addInstr(env, PPCInstr_FpCftI(True/*I->F*/, False/*int64*/, -+ False, False, -+ fdst, fdst)); -+ -+ add_to_sp( env, 16 ); -+ -+ ///* Restore default FPU rounding. */ -+ //set_FPU_rounding_default( env ); -+ return fdst; -+ } -+ -+ } -+ - vex_printf("iselFltExpr(ppc): No such tag(%u)\n", e->tag); - ppIRExpr(e); - vpanic("iselFltExpr_wrk(ppc)"); diff --git a/vg_bug270856_r2136.patch b/vg_bug270856_r2136.patch deleted file mode 100644 index 182ce36..0000000 --- a/vg_bug270856_r2136.patch +++ /dev/null @@ -1,31 +0,0 @@ -Index: VEX/priv/host_ppc_isel.c -=================================================================== ---- VEX/priv/host_ppc_isel.c (revision 2135) -+++ VEX/priv/host_ppc_isel.c (revision 2136) -@@ -1615,6 +1615,7 @@ - case Iop_Not16: - case Iop_Not32: - case Iop_Not64: { -+ if (op_unop == Iop_Not64) vassert(mode64); - HReg r_dst = newVRegI(env); - HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg); - addInstr(env, PPCInstr_Unary(Pun_NOT,r_dst,r_src)); -@@ -2885,6 +2886,18 @@ - return; - } - -+ case Iop_Not64: { -+ HReg xLo, xHi; -+ HReg tmpLo = newVRegI(env); -+ HReg tmpHi = newVRegI(env); -+ iselInt64Expr(&xHi, &xLo, env, e->Iex.Unop.arg); -+ addInstr(env, PPCInstr_Unary(Pun_NOT,tmpLo,xLo)); -+ addInstr(env, PPCInstr_Unary(Pun_NOT,tmpHi,xHi)); -+ *rHi = tmpHi; -+ *rLo = tmpLo; -+ return; -+ } -+ - /* ReinterpF64asI64(e) */ - /* Given an IEEE754 double, produce an I64 with the same bit - pattern. */ diff --git a/vg_bug271042_r11699.patch b/vg_bug271042_r11699.patch deleted file mode 100644 index d42caf8..0000000 --- a/vg_bug271042_r11699.patch +++ /dev/null @@ -1,13 +0,0 @@ -Index: configure.in -=================================================================== ---- configure.in (revision 11698) -+++ configure.in (revision 11699) -@@ -986,7 +986,7 @@ - #include - ], [ - vector unsigned int v; -- __asm__ __volatile__("xsmaddadp %vs32, %vs32, %vs33" ::: "memory","cc"); -+ __asm__ __volatile__("xsmaddadp 32, 32, 33" ::: "memory","cc"); - ], - [ - ac_have_vsx=yes diff --git a/vg_bug271043_r11700.patch b/vg_bug271043_r11700.patch deleted file mode 100644 index 02dc7e8..0000000 --- a/vg_bug271043_r11700.patch +++ /dev/null @@ -1,22 +0,0 @@ -Index: coregrind/m_dispatch/dispatch-ppc64-linux.S -=================================================================== ---- coregrind/m_dispatch/dispatch-ppc64-linux.S (revision 11699) -+++ coregrind/m_dispatch/dispatch-ppc64-linux.S (revision 11700) -@@ -310,7 +310,7 @@ - /* start over */ - b .VG_(run_innerloop__dispatch_unprofiled) - /*NOTREACHED*/ -- .size VG_(run_innerloop), .-VG_(run_innerloop) -+ .size .VG_(run_innerloop), .-.VG_(run_innerloop) - - - /*----------------------------------------------------*/ -@@ -385,7 +385,7 @@ - /* start over */ - b .VG_(run_innerloop__dispatch_profiled) - /*NOTREACHED*/ -- .size VG_(run_a_noredir_translation), .-VG_(run_a_noredir_translation) -+ .size .VG_(run_a_noredir_translation), .-.VG_(run_a_noredir_translation) - - - /*----------------------------------------------------*/ diff --git a/vg_bug271043_r11765.patch b/vg_bug271043_r11765.patch deleted file mode 100644 index 67733dc..0000000 --- a/vg_bug271043_r11765.patch +++ /dev/null @@ -1,13 +0,0 @@ -Index: coregrind/m_syswrap/syswrap-ppc64-linux.c -=================================================================== ---- coregrind/m_syswrap/syswrap-ppc64-linux.c (revision 11764) -+++ coregrind/m_syswrap/syswrap-ppc64-linux.c (revision 11765) -@@ -1380,7 +1380,7 @@ - // _____(__NR_rt_sigsuspend, sys_rt_sigsuspend), // 178 - GENXY(__NR_pread64, sys_pread64), // 179 - --// _____(__NR_pwrite64, sys_pwrite64), // 180 -+ GENX_(__NR_pwrite64, sys_pwrite64), // 180 - GENX_(__NR_chown, sys_chown), // 181 - GENXY(__NR_getcwd, sys_getcwd), // 182 - LINXY(__NR_capget, sys_capget), // 183