From d2d9c242a704fd3061cfc82e13a9a9b1775ec0f9975d0dd731943a2a5c57e42f Mon Sep 17 00:00:00 2001 From: Dirk Mueller Date: Wed, 8 May 2019 15:38:55 +0000 Subject: [PATCH] - update to 3.15.0 (fate#327402): 3.15.0 is a feature release with many improvements and the usual collection of bug fixes. This release supports X86/Linux, AMD64/Linux, ARM32/Linux, ARM64/Linux, PPC32/Linux, PPC64BE/Linux, PPC64LE/Linux, S390X/Linux, MIPS32/Linux, MIPS64/Linux, ARM/Android, ARM64/Android, MIPS32/Android, X86/Android, X86/Solaris, AMD64/Solaris and AMD64/MacOSX 10.12. There is also preliminary support for X86/macOS 10.13 and AMD64/macOS 10.13. * ==================== CORE CHANGES =================== * The XTree Massif output format now makes use of the information obtained when specifying --read-inline-info=yes. * amd64 (x86_64): the RDRAND and F16C insn set extensions are now supported. * ==================== TOOL CHANGES ==================== * DHAT: - DHAT been thoroughly overhauled, improved, and given a GUI. As a result, it has been promoted from an experimental tool to a regular tool. Run it with --tool=dhat instead of --tool=exp-dhat. - DHAT now prints only minimal data when the program ends, instead writing the bulk of the profiling data to a file. As a result, the --show-top-n and --sort-by options have been removed. - Profile results can be viewed with the new viewer, dh_view.html. When a run ends, a short message is printed, explaining how to view the result. - See the documentation for more details. * Cachegrind: - cg_annotate has a new option, --show-percs, which prints percentages next to all event counts. * Callgrind: - callgrind_annotate has a new option, --show-percs, which prints percentages next to all event counts. - callgrind_annotate now inserts commas in call counts, and OBS-URL: https://build.opensuse.org/package/show/devel:tools/valgrind?expand=0&rev=197 --- ...-Add-z13-vector-floating-point-suppo.patch | 1626 ------------ ...-Tests-and-internals-for-z13-vector-.patch | 2339 ----------------- ...-Add-vector-register-support-for-vgd.patch | 402 --- ...-Drop-unnecessary-check-in-s390_irge.patch | 42 - ...-Fix-register-allocation-for-VRs-vs-.patch | 87 - ...-Sign-extend-immediate-operand-of-LO.patch | 45 - ...-3.0-addex-instruction-incorrectly-i.patch | 273 -- ...s390x-Fix-vector-facility-bit-number.patch | 46 - 0001-s390x-more-fixes.patch | 51 - ...lated-system-registers.-Fixes-392146.patch | 376 --- valgrind-3.14.0.tar.bz2 | 3 - valgrind-3.15.0.tar.bz2 | 3 + valgrind.changes | 77 + valgrind.spec | 24 +- 14 files changed, 83 insertions(+), 5311 deletions(-) delete mode 100644 0001-Bug-385411-s390x-Add-z13-vector-floating-point-suppo.patch delete mode 100644 0001-Bug-385411-s390x-Tests-and-internals-for-z13-vector-.patch delete mode 100644 0001-Bug-397187-s390x-Add-vector-register-support-for-vgd.patch delete mode 100644 0001-Bug-399444-s390x-Drop-unnecessary-check-in-s390_irge.patch delete mode 100644 0001-Bug-400490-s390x-Fix-register-allocation-for-VRs-vs-.patch delete mode 100644 0001-Bug-400491-s390x-Sign-extend-immediate-operand-of-LO.patch delete mode 100644 0001-Bug-402519-POWER-3.0-addex-instruction-incorrectly-i.patch delete mode 100644 0001-Bug-403552-s390x-Fix-vector-facility-bit-number.patch delete mode 100644 0001-s390x-more-fixes.patch delete mode 100644 Implement-emulated-system-registers.-Fixes-392146.patch delete mode 100644 valgrind-3.14.0.tar.bz2 create mode 100644 valgrind-3.15.0.tar.bz2 diff --git a/0001-Bug-385411-s390x-Add-z13-vector-floating-point-suppo.patch b/0001-Bug-385411-s390x-Add-z13-vector-floating-point-suppo.patch deleted file mode 100644 index 1cec7f5..0000000 --- a/0001-Bug-385411-s390x-Add-z13-vector-floating-point-suppo.patch +++ /dev/null @@ -1,1626 +0,0 @@ -From 600a0099a1eb2335a3f9563534c112e11817002b Mon Sep 17 00:00:00 2001 -From: Vadim Barkov -Date: Fri, 5 Oct 2018 13:51:49 +0300 -Subject: [PATCH] Bug 385411 s390x: Add z13 vector floating point support - -This adds support for the z/Architecture vector FP instructions that were -introduced with z13. - -The patch was contributed by Vadim Barkov, with some clean-up and minor -adjustments by Andreas Arnez. ---- - NEWS | 1 + - VEX/priv/guest_s390_defs.h | 10 +- - VEX/priv/guest_s390_helpers.c | 47 ++ - VEX/priv/guest_s390_toIR.c | 875 ++++++++++++++++++++++++++++++++-- - VEX/priv/host_s390_defs.c | 240 +++++++++- - VEX/priv/host_s390_defs.h | 16 +- - VEX/priv/host_s390_isel.c | 82 +++- - 7 files changed, 1231 insertions(+), 40 deletions(-) - -Index: valgrind-3.14.0/VEX/priv/guest_s390_defs.h -=================================================================== ---- valgrind-3.14.0.orig/VEX/priv/guest_s390_defs.h -+++ valgrind-3.14.0/VEX/priv/guest_s390_defs.h -@@ -281,7 +281,11 @@ enum { - S390_VEC_OP_VMALH = 13, - S390_VEC_OP_VCH = 14, - S390_VEC_OP_VCHL = 15, -- S390_VEC_OP_LAST = 16 // supposed to be the last element in enum -+ S390_VEC_OP_VFCE = 16, -+ S390_VEC_OP_VFCH = 17, -+ S390_VEC_OP_VFCHE = 18, -+ S390_VEC_OP_VFTCI = 19, -+ S390_VEC_OP_LAST = 20 // supposed to be the last element in enum - } s390x_vec_op_t; - - /* Arguments of s390x_dirtyhelper_vec_op(...) which are packed into one -@@ -300,8 +304,10 @@ typedef union { - - unsigned int m4 : 4; // field m4 of insn or zero if it's missing - unsigned int m5 : 4; // field m5 of insn or zero if it's missing -+ unsigned int m6 : 4; // field m6 of insn or zero if it's missing -+ unsigned int i3 : 12; // field i3 of insn or zero if it's missing - unsigned int read_only: 1; // don't write result to Guest State -- unsigned int reserved : 27; // reserved for future -+ unsigned int reserved : 11; // reserved for future - }; - ULong serialized; - } s390x_vec_op_details_t; -Index: valgrind-3.14.0/VEX/priv/guest_s390_helpers.c -=================================================================== ---- valgrind-3.14.0.orig/VEX/priv/guest_s390_helpers.c -+++ valgrind-3.14.0/VEX/priv/guest_s390_helpers.c -@@ -2498,6 +2498,10 @@ s390x_dirtyhelper_vec_op(VexGuestS390XSt - {0xe7, 0xa9}, /* VMALH */ - {0xe7, 0xfb}, /* VCH */ - {0xe7, 0xf9}, /* VCHL */ -+ {0xe7, 0xe8}, /* VFCE */ -+ {0xe7, 0xeb}, /* VFCH */ -+ {0xe7, 0xea}, /* VFCHE */ -+ {0xe7, 0x4a} /* VFTCI */ - }; - - union { -@@ -2525,6 +2529,28 @@ s390x_dirtyhelper_vec_op(VexGuestS390XSt - unsigned int rxb : 4; - unsigned int op2 : 8; - } VRRd; -+ struct { -+ UInt op1 : 8; -+ UInt v1 : 4; -+ UInt v2 : 4; -+ UInt v3 : 4; -+ UInt : 4; -+ UInt m6 : 4; -+ UInt m5 : 4; -+ UInt m4 : 4; -+ UInt rxb : 4; -+ UInt op2 : 8; -+ } VRRc; -+ struct { -+ UInt op1 : 8; -+ UInt v1 : 4; -+ UInt v2 : 4; -+ UInt i3 : 12; -+ UInt m5 : 4; -+ UInt m4 : 4; -+ UInt rxb : 4; -+ UInt op2 : 8; -+ } VRIe; - UChar bytes[6]; - } the_insn; - -@@ -2578,6 +2604,27 @@ s390x_dirtyhelper_vec_op(VexGuestS390XSt - the_insn.VRRd.m6 = d->m5; - break; - -+ case S390_VEC_OP_VFCE: -+ case S390_VEC_OP_VFCH: -+ case S390_VEC_OP_VFCHE: -+ the_insn.VRRc.v1 = 1; -+ the_insn.VRRc.v2 = 2; -+ the_insn.VRRc.v3 = 3; -+ the_insn.VRRc.rxb = 0b1110; -+ the_insn.VRRc.m4 = d->m4; -+ the_insn.VRRc.m5 = d->m5; -+ the_insn.VRRc.m6 = d->m6; -+ break; -+ -+ case S390_VEC_OP_VFTCI: -+ the_insn.VRIe.v1 = 1; -+ the_insn.VRIe.v2 = 2; -+ the_insn.VRIe.rxb = 0b1100; -+ the_insn.VRIe.i3 = d->i3; -+ the_insn.VRIe.m4 = d->m4; -+ the_insn.VRIe.m5 = d->m5; -+ break; -+ - default: - vex_printf("operation = %d\n", d->op); - vpanic("s390x_dirtyhelper_vec_op: unknown operation"); -Index: valgrind-3.14.0/VEX/priv/guest_s390_toIR.c -=================================================================== ---- valgrind-3.14.0.orig/VEX/priv/guest_s390_toIR.c -+++ valgrind-3.14.0/VEX/priv/guest_s390_toIR.c -@@ -86,6 +86,7 @@ typedef enum { - S390_DECODE_UNKNOWN_INSN, - S390_DECODE_UNIMPLEMENTED_INSN, - S390_DECODE_UNKNOWN_SPECIAL_INSN, -+ S390_DECODE_SPECIFICATION_EXCEPTION, - S390_DECODE_ERROR - } s390_decode_t; - -@@ -421,6 +422,26 @@ yield_if(IRExpr *condition) - S390X_GUEST_OFFSET(guest_IA))); - } - -+/* Convenience macro to yield a specification exception if the given condition -+ is not met. Used to pass this type of decoding error up through the call -+ chain. */ -+#define s390_insn_assert(mnm, cond) \ -+ do { \ -+ if (!(cond)) { \ -+ dis_res->whatNext = Dis_StopHere; \ -+ dis_res->jk_StopHere = Ijk_NoDecode; \ -+ return (mnm); \ -+ } \ -+ } while (0) -+ -+/* Convenience function to check for a specification exception. */ -+static Bool -+is_specification_exception(void) -+{ -+ return (dis_res->whatNext == Dis_StopHere && -+ dis_res->jk_StopHere == Ijk_NoDecode); -+} -+ - static __inline__ IRExpr *get_fpr_dw0(UInt); - static __inline__ void put_fpr_dw0(UInt, IRExpr *); - static __inline__ IRExpr *get_dpr_dw0(UInt); -@@ -1770,6 +1791,11 @@ s390_vr_get_type(const UChar m) - /* Determine if Zero Search (ZS) flag is set in m field */ - #define s390_vr_is_zs_set(m) (((m) & 0b0010) != 0) - -+/* Check if the "Single-Element-Control" bit is set. -+ Used in vector FP instructions. -+ */ -+#define s390_vr_is_single_element_control_set(m) (((m) & 0x8) != 0) -+ - /* Generates arg1 < arg2 (or arg1 <= arg2 if allow_equal == True) expression. - Arguments must have V128 type and are treated as unsigned 128-bit numbers. - */ -@@ -2001,12 +2027,14 @@ s390_vr_offset_by_index(UInt archreg,IRT - return vr_offset(archreg) + sizeof(UShort) * index; - - case Ity_I32: -+ case Ity_F32: - if(index > 3) { - goto invalidIndex; - } - return vr_offset(archreg) + sizeof(UInt) * index; - - case Ity_I64: -+ case Ity_F64: - if(index > 1) { - goto invalidIndex; - } -@@ -2237,8 +2265,8 @@ encode_bfp_rounding_mode(UChar mode) - case S390_BFP_ROUND_PER_FPC: - rm = get_bfp_rounding_mode_from_fpc(); - break; -- case S390_BFP_ROUND_NEAREST_AWAY: /* not supported */ -- case S390_BFP_ROUND_PREPARE_SHORT: /* not supported */ -+ case S390_BFP_ROUND_NEAREST_AWAY: rm = mkU32(Irrm_NEAREST_TIE_AWAY_0); break; -+ case S390_BFP_ROUND_PREPARE_SHORT: rm = mkU32(Irrm_PREPARE_SHORTER); break; - case S390_BFP_ROUND_NEAREST_EVEN: rm = mkU32(Irrm_NEAREST); break; - case S390_BFP_ROUND_ZERO: rm = mkU32(Irrm_ZERO); break; - case S390_BFP_ROUND_POSINF: rm = mkU32(Irrm_PosINF); break; -@@ -3524,6 +3552,26 @@ s390_format_VRI_VVIM(const HChar *(*irge - s390_disasm(ENC5(MNM, VR, VR, UINT, UINT), mnm, v1, v3, i2, m4); - } - -+static void -+s390_format_VRI_VVIMM(const HChar *(*irgen)(UChar v1, UChar v2, UShort i3, -+ UChar m4, UChar m5), -+ UChar v1, UChar v2, UShort i3, UChar m4, UChar m5, -+ UChar rxb) -+{ -+ const HChar *mnm; -+ -+ if (!s390_host_has_vx) { -+ emulation_failure(EmFail_S390X_vx); -+ return; -+ } -+ -+ v1 = s390_vr_getVRindex(v1, 1, rxb); -+ v2 = s390_vr_getVRindex(v2, 2, rxb); -+ mnm = irgen(v1, v2, i3, m4, m5); -+ -+ if (vex_traceflags & VEX_TRACE_FE) -+ s390_disasm(ENC6(MNM, VR, VR, UINT, UINT, UINT), mnm, v1, v2, i3, m4, m5); -+} - - static void - s390_format_VRS_RRDVM(const HChar *(*irgen)(UChar r1, IRTemp op2addr, UChar v3, -@@ -3680,7 +3728,7 @@ s390_format_VRV_VVRDMT(const HChar *(*ir - - - static void --s390_format_VRRd_VVVVMM(const HChar *(*irgen)(UChar v1, UChar v2, UChar v3, -+s390_format_VRR_VVVVMM(const HChar *(*irgen)(UChar v1, UChar v2, UChar v3, - UChar v4, UChar m5, UChar m6), - UChar v1, UChar v2, UChar v3, UChar v4, UChar m5, - UChar m6, UChar rxb) -@@ -3794,6 +3842,92 @@ s390_format_VRRd_VVVVM(const HChar *(*ir - } - - -+static void -+s390_format_VRRa_VVMMM(const HChar *(*irgen)(UChar v1, UChar v2, UChar m3, -+ UChar m4, UChar m5), -+ UChar v1, UChar v2, UChar m3, UChar m4, UChar m5, -+ UChar rxb) -+{ -+ const HChar *mnm; -+ -+ if (!s390_host_has_vx) { -+ emulation_failure(EmFail_S390X_vx); -+ return; -+ } -+ -+ v1 = s390_vr_getVRindex(v1, 1, rxb); -+ v2 = s390_vr_getVRindex(v2, 2, rxb); -+ mnm = irgen(v1, v2, m3, m4, m5); -+ -+ if (vex_traceflags & VEX_TRACE_FE) -+ s390_disasm(ENC6(MNM, VR, VR, UINT, UINT, UINT), mnm, v1, v2, m3, m4, m5); -+} -+ -+static void -+s390_format_VRRa_VVVMM(const HChar *(*irgen)(UChar v1, UChar v2, UChar v3, -+ UChar m4, UChar m5), -+ UChar v1, UChar v2, UChar v3, UChar m4, UChar m5, -+ UChar rxb) -+{ -+ const HChar *mnm; -+ -+ if (!s390_host_has_vx) { -+ emulation_failure(EmFail_S390X_vx); -+ return; -+ } -+ -+ v1 = s390_vr_getVRindex(v1, 1, rxb); -+ v2 = s390_vr_getVRindex(v2, 2, rxb); -+ v3 = s390_vr_getVRindex(v3, 3, rxb); -+ mnm = irgen(v1, v2, v3, m4, m5); -+ -+ if (vex_traceflags & VEX_TRACE_FE) -+ s390_disasm(ENC6(MNM, VR, VR, VR, UINT, UINT), mnm, v1, v2, v3, m4, m5); -+} -+ -+static void -+s390_format_VRRa_VVMM(const HChar *(*irgen)(UChar v1, UChar v2, UChar m3, -+ UChar m4), -+ UChar v1, UChar v2, UChar m3, UChar m4, UChar rxb) -+{ -+ const HChar *mnm; -+ -+ if (!s390_host_has_vx) { -+ emulation_failure(EmFail_S390X_vx); -+ return; -+ } -+ -+ v1 = s390_vr_getVRindex(v1, 1, rxb); -+ v2 = s390_vr_getVRindex(v2, 2, rxb); -+ mnm = irgen(v1, v2, m3, m4); -+ -+ if (vex_traceflags & VEX_TRACE_FE) -+ s390_disasm(ENC5(MNM, VR, VR, UINT, UINT), mnm, v1, v2, m3, m4); -+} -+ -+static void -+s390_format_VRRa_VVVMMM(const HChar *(*irgen)(UChar v1, UChar v2, UChar v3, -+ UChar m4, UChar m5, UChar m6), -+ UChar v1, UChar v2, UChar v3, UChar m4, UChar m5, -+ UChar m6, UChar rxb) -+{ -+ const HChar *mnm; -+ -+ if (!s390_host_has_vx) { -+ emulation_failure(EmFail_S390X_vx); -+ return; -+ } -+ -+ v1 = s390_vr_getVRindex(v1, 1, rxb); -+ v2 = s390_vr_getVRindex(v2, 2, rxb); -+ v3 = s390_vr_getVRindex(v3, 3, rxb); -+ mnm = irgen(v1, v2, v3, m4, m5, m6); -+ -+ if (vex_traceflags & VEX_TRACE_FE) -+ s390_disasm(ENC6(MNM, VR, VR, VR, UINT, UINT), -+ mnm, v1, v2, v3, m4, m5, m6); -+} -+ - /*------------------------------------------------------------*/ - /*--- Build IR for opcodes ---*/ - /*------------------------------------------------------------*/ -@@ -17895,6 +18029,575 @@ s390_irgen_VMALH(UChar v1, UChar v2, UCh - return "vmalh"; - } - -+static void -+s390_vector_fp_convert(IROp op, IRType fromType, IRType toType, -+ UChar v1, UChar v2, UChar m3, UChar m4, UChar m5) -+{ -+ Bool isSingleElementOp = s390_vr_is_single_element_control_set(m4); -+ UChar maxIndex = isSingleElementOp ? 0 : 1; -+ -+ /* For Iop_F32toF64 we do this: -+ f32[0] -> f64[0] -+ f32[2] -> f64[1] -+ -+ For Iop_F64toF32 we do this: -+ f64[0] -> f32[0] -+ f64[1] -> f32[2] -+ -+ The magic below with scaling factors is used to achieve the logic -+ described above. -+ */ -+ const UChar sourceIndexScaleFactor = (op == Iop_F32toF64) ? 2 : 1; -+ const UChar destinationIndexScaleFactor = (op == Iop_F64toF32) ? 2 : 1; -+ -+ const Bool isUnary = (op == Iop_F32toF64); -+ for (UChar i = 0; i <= maxIndex; i++) { -+ IRExpr* argument = get_vr(v2, fromType, i * sourceIndexScaleFactor); -+ IRExpr* result; -+ if (!isUnary) { -+ result = binop(op, -+ mkexpr(encode_bfp_rounding_mode(m5)), -+ argument); -+ } else { -+ result = unop(op, argument); -+ } -+ put_vr(v1, toType, i * destinationIndexScaleFactor, result); -+ } -+ -+ if (isSingleElementOp) { -+ put_vr_dw1(v1, mkU64(0)); -+ } -+} -+ -+static const HChar * -+s390_irgen_VCDG(UChar v1, UChar v2, UChar m3, UChar m4, UChar m5) -+{ -+ s390_insn_assert("vcdg", m3 == 3); -+ -+ if (!s390_host_has_fpext && m5 != S390_BFP_ROUND_PER_FPC) { -+ emulation_warning(EmWarn_S390X_fpext_rounding); -+ m5 = S390_BFP_ROUND_PER_FPC; -+ } -+ -+ s390_vector_fp_convert(Iop_I64StoF64, Ity_I64, Ity_F64, v1, v2, m3, m4, m5); -+ -+ return "vcdg"; -+} -+ -+static const HChar * -+s390_irgen_VCDLG(UChar v1, UChar v2, UChar m3, UChar m4, UChar m5) -+{ -+ s390_insn_assert("vcdlg", m3 == 3); -+ -+ if (!s390_host_has_fpext && m5 != S390_BFP_ROUND_PER_FPC) { -+ emulation_warning(EmWarn_S390X_fpext_rounding); -+ m5 = S390_BFP_ROUND_PER_FPC; -+ } -+ -+ s390_vector_fp_convert(Iop_I64UtoF64, Ity_I64, Ity_F64, v1, v2, m3, m4, m5); -+ -+ return "vcdlg"; -+} -+ -+static const HChar * -+s390_irgen_VCGD(UChar v1, UChar v2, UChar m3, UChar m4, UChar m5) -+{ -+ s390_insn_assert("vcgd", m3 == 3); -+ -+ if (!s390_host_has_fpext && m5 != S390_BFP_ROUND_PER_FPC) { -+ emulation_warning(EmWarn_S390X_fpext_rounding); -+ m5 = S390_BFP_ROUND_PER_FPC; -+ } -+ -+ s390_vector_fp_convert(Iop_F64toI64S, Ity_F64, Ity_I64, v1, v2, m3, m4, m5); -+ -+ return "vcgd"; -+} -+ -+static const HChar * -+s390_irgen_VCLGD(UChar v1, UChar v2, UChar m3, UChar m4, UChar m5) -+{ -+ s390_insn_assert("vclgd", m3 == 3); -+ -+ if (!s390_host_has_fpext && m5 != S390_BFP_ROUND_PER_FPC) { -+ emulation_warning(EmWarn_S390X_fpext_rounding); -+ m5 = S390_BFP_ROUND_PER_FPC; -+ } -+ -+ s390_vector_fp_convert(Iop_F64toI64U, Ity_F64, Ity_I64, v1, v2, m3, m4, m5); -+ -+ return "vclgd"; -+} -+ -+static const HChar * -+s390_irgen_VFI(UChar v1, UChar v2, UChar m3, UChar m4, UChar m5) -+{ -+ s390_insn_assert("vfi", m3 == 3); -+ -+ if (!s390_host_has_fpext && m5 != S390_BFP_ROUND_PER_FPC) { -+ emulation_warning(EmWarn_S390X_fpext_rounding); -+ m5 = S390_BFP_ROUND_PER_FPC; -+ } -+ -+ s390_vector_fp_convert(Iop_RoundF64toInt, Ity_F64, Ity_F64, -+ v1, v2, m3, m4, m5); -+ -+ return "vcgld"; -+} -+ -+static const HChar * -+s390_irgen_VLDE(UChar v1, UChar v2, UChar m3, UChar m4, UChar m5) -+{ -+ s390_insn_assert("vlde", m3 == 2); -+ -+ s390_vector_fp_convert(Iop_F32toF64, Ity_F32, Ity_F64, v1, v2, m3, m4, m5); -+ -+ return "vlde"; -+} -+ -+static const HChar * -+s390_irgen_VLED(UChar v1, UChar v2, UChar m3, UChar m4, UChar m5) -+{ -+ s390_insn_assert("vled", m3 == 3); -+ -+ if (!s390_host_has_fpext && m5 != S390_BFP_ROUND_PER_FPC) { -+ m5 = S390_BFP_ROUND_PER_FPC; -+ } -+ -+ s390_vector_fp_convert(Iop_F64toF32, Ity_F64, Ity_F32, v1, v2, m3, m4, m5); -+ -+ return "vled"; -+} -+ -+static const HChar * -+s390_irgen_VFPSO(UChar v1, UChar v2, UChar m3, UChar m4, UChar m5) -+{ -+ s390_insn_assert("vfpso", m3 == 3); -+ -+ IRExpr* result; -+ switch (m5) { -+ case 0: { -+ /* Invert sign */ -+ if (!s390_vr_is_single_element_control_set(m4)) { -+ result = unop(Iop_Neg64Fx2, get_vr_qw(v2)); -+ } -+ else { -+ result = binop(Iop_64HLtoV128, -+ unop(Iop_ReinterpF64asI64, -+ unop(Iop_NegF64, get_vr(v2, Ity_F64, 0))), -+ mkU64(0)); -+ } -+ break; -+ } -+ -+ case 1: { -+ /* Set sign to negative */ -+ IRExpr* highHalf = mkU64(0x8000000000000000ULL); -+ if (!s390_vr_is_single_element_control_set(m4)) { -+ IRExpr* lowHalf = highHalf; -+ IRExpr* mask = binop(Iop_64HLtoV128, highHalf, lowHalf); -+ result = binop(Iop_OrV128, get_vr_qw(v2), mask); -+ } -+ else { -+ result = binop(Iop_64HLtoV128, -+ binop(Iop_Or64, get_vr_dw0(v2), highHalf), -+ mkU64(0ULL)); -+ } -+ -+ break; -+ } -+ -+ case 2: { -+ /* Set sign to positive */ -+ if (!s390_vr_is_single_element_control_set(m4)) { -+ result = unop(Iop_Abs64Fx2, get_vr_qw(v2)); -+ } -+ else { -+ result = binop(Iop_64HLtoV128, -+ unop(Iop_ReinterpF64asI64, -+ unop(Iop_AbsF64, get_vr(v2, Ity_F64, 0))), -+ mkU64(0)); -+ } -+ -+ break; -+ } -+ -+ default: -+ vpanic("s390_irgen_VFPSO: Invalid m5 value"); -+ } -+ -+ put_vr_qw(v1, result); -+ if (s390_vr_is_single_element_control_set(m4)) { -+ put_vr_dw1(v1, mkU64(0ULL)); -+ } -+ -+ return "vfpso"; -+} -+ -+static void s390x_vec_fp_binary_op(IROp generalOp, IROp singleElementOp, -+ UChar v1, UChar v2, UChar v3, UChar m4, -+ UChar m5) -+{ -+ IRExpr* result; -+ if (!s390_vr_is_single_element_control_set(m5)) { -+ result = triop(generalOp, get_bfp_rounding_mode_from_fpc(), -+ get_vr_qw(v2), get_vr_qw(v3)); -+ } else { -+ IRExpr* highHalf = triop(singleElementOp, -+ get_bfp_rounding_mode_from_fpc(), -+ get_vr(v2, Ity_F64, 0), -+ get_vr(v3, Ity_F64, 0)); -+ result = binop(Iop_64HLtoV128, unop(Iop_ReinterpF64asI64, highHalf), -+ mkU64(0ULL)); -+ } -+ -+ put_vr_qw(v1, result); -+} -+ -+static void s390x_vec_fp_unary_op(IROp generalOp, IROp singleElementOp, -+ UChar v1, UChar v2, UChar m3, UChar m4) -+{ -+ IRExpr* result; -+ if (!s390_vr_is_single_element_control_set(m4)) { -+ result = binop(generalOp, get_bfp_rounding_mode_from_fpc(), -+ get_vr_qw(v2)); -+ } -+ else { -+ IRExpr* highHalf = binop(singleElementOp, -+ get_bfp_rounding_mode_from_fpc(), -+ get_vr(v2, Ity_F64, 0)); -+ result = binop(Iop_64HLtoV128, unop(Iop_ReinterpF64asI64, highHalf), -+ mkU64(0ULL)); -+ } -+ -+ put_vr_qw(v1, result); -+} -+ -+ -+static void -+s390_vector_fp_mulAddOrSub(IROp singleElementOp, -+ UChar v1, UChar v2, UChar v3, UChar v4, -+ UChar m5, UChar m6) -+{ -+ Bool isSingleElementOp = s390_vr_is_single_element_control_set(m5); -+ IRTemp irrm_temp = newTemp(Ity_I32); -+ assign(irrm_temp, get_bfp_rounding_mode_from_fpc()); -+ IRExpr* irrm = mkexpr(irrm_temp); -+ IRExpr* result; -+ IRExpr* highHalf = qop(singleElementOp, -+ irrm, -+ get_vr(v2, Ity_F64, 0), -+ get_vr(v3, Ity_F64, 0), -+ get_vr(v4, Ity_F64, 0)); -+ -+ if (isSingleElementOp) { -+ result = binop(Iop_64HLtoV128, unop(Iop_ReinterpF64asI64, highHalf), -+ mkU64(0ULL)); -+ } else { -+ IRExpr* lowHalf = qop(singleElementOp, -+ irrm, -+ get_vr(v2, Ity_F64, 1), -+ get_vr(v3, Ity_F64, 1), -+ get_vr(v4, Ity_F64, 1)); -+ result = binop(Iop_64HLtoV128, unop(Iop_ReinterpF64asI64, highHalf), -+ unop(Iop_ReinterpF64asI64, lowHalf)); -+ } -+ -+ put_vr_qw(v1, result); -+} -+ -+static const HChar * -+s390_irgen_VFA(UChar v1, UChar v2, UChar v3, UChar m4, UChar m5) -+{ -+ s390_insn_assert("vfa", m4 == 3); -+ s390x_vec_fp_binary_op(Iop_Add64Fx2, Iop_AddF64, v1, v2, v3, m4, m5); -+ return "vfa"; -+} -+ -+static const HChar * -+s390_irgen_VFS(UChar v1, UChar v2, UChar v3, UChar m4, UChar m5) -+{ -+ s390_insn_assert("vfs", m4 == 3); -+ s390x_vec_fp_binary_op(Iop_Sub64Fx2, Iop_SubF64, v1, v2, v3, m4, m5); -+ return "vfs"; -+} -+ -+static const HChar * -+s390_irgen_VFM(UChar v1, UChar v2, UChar v3, UChar m4, UChar m5) -+{ -+ s390_insn_assert("vfm", m4 == 3); -+ s390x_vec_fp_binary_op(Iop_Mul64Fx2, Iop_MulF64, v1, v2, v3, m4, m5); -+ return "vfm"; -+} -+ -+static const HChar * -+s390_irgen_VFD(UChar v1, UChar v2, UChar v3, UChar m4, UChar m5) -+{ -+ s390_insn_assert("vfd", m4 == 3); -+ s390x_vec_fp_binary_op(Iop_Div64Fx2, Iop_DivF64, v1, v2, v3, m4, m5); -+ return "vfd"; -+} -+ -+static const HChar * -+s390_irgen_VFSQ(UChar v1, UChar v2, UChar m3, UChar m4) -+{ -+ s390_insn_assert("vfsq", m3 == 3); -+ s390x_vec_fp_unary_op(Iop_Sqrt64Fx2, Iop_SqrtF64, v1, v2, m3, m4); -+ -+ return "vfsq"; -+} -+ -+static const HChar * -+s390_irgen_VFMA(UChar v1, UChar v2, UChar v3, UChar v4, UChar m5, UChar m6) -+{ -+ s390_insn_assert("vfma", m6 == 3); -+ s390_vector_fp_mulAddOrSub(Iop_MAddF64, v1, v2, v3, v4, m5, m6); -+ return "vfma"; -+} -+ -+static const HChar * -+s390_irgen_VFMS(UChar v1, UChar v2, UChar v3, UChar v4, UChar m5, UChar m6) -+{ -+ s390_insn_assert("vfms", m6 == 3); -+ s390_vector_fp_mulAddOrSub(Iop_MSubF64, v1, v2, v3, v4, m5, m6); -+ return "vfms"; -+} -+ -+static const HChar * -+s390_irgen_WFC(UChar v1, UChar v2, UChar m3, UChar m4) -+{ -+ s390_insn_assert("wfc", m3 == 3); -+ s390_insn_assert("wfc", m4 == 0); -+ -+ IRTemp cc_vex = newTemp(Ity_I32); -+ assign(cc_vex, binop(Iop_CmpF64, -+ get_vr(v1, Ity_F64, 0), get_vr(v2, Ity_F64, 0))); -+ -+ IRTemp cc_s390 = newTemp(Ity_I32); -+ assign(cc_s390, convert_vex_bfpcc_to_s390(cc_vex)); -+ s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False); -+ -+ return "wfc"; -+} -+ -+static const HChar * -+s390_irgen_WFK(UChar v1, UChar v2, UChar m3, UChar m4) -+{ -+ s390_irgen_WFC(v1, v2, m3, m4); -+ -+ return "wfk"; -+} -+ -+static const HChar * -+s390_irgen_VFCE(UChar v1, UChar v2, UChar v3, UChar m4, UChar m5, UChar m6) -+{ -+ s390_insn_assert("vfce", m4 == 3); -+ -+ Bool isSingleElementOp = s390_vr_is_single_element_control_set(m5); -+ if (!s390_vr_is_cs_set(m6)) { -+ if (!isSingleElementOp) { -+ put_vr_qw(v1, binop(Iop_CmpEQ64Fx2, get_vr_qw(v2), get_vr_qw(v3))); -+ } else { -+ IRExpr* comparisonResult = binop(Iop_CmpF64, get_vr(v2, Ity_F64, 0), -+ get_vr(v3, Ity_F64, 0)); -+ IRExpr* result = mkite(binop(Iop_CmpEQ32, comparisonResult, -+ mkU32(Ircr_EQ)), -+ mkU64(0xffffffffffffffffULL), -+ mkU64(0ULL)); -+ put_vr_qw(v1, binop(Iop_64HLtoV128, result, mkU64(0ULL))); -+ } -+ } else { -+ IRDirty* d; -+ IRTemp cc = newTemp(Ity_I64); -+ -+ s390x_vec_op_details_t details = { .serialized = 0ULL }; -+ details.op = S390_VEC_OP_VFCE; -+ details.v1 = v1; -+ details.v2 = v2; -+ details.v3 = v3; -+ details.m4 = m4; -+ details.m5 = m5; -+ details.m6 = m6; -+ -+ d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_vec_op", -+ &s390x_dirtyhelper_vec_op, -+ mkIRExprVec_2(IRExpr_GSPTR(), -+ mkU64(details.serialized))); -+ -+ const UChar elementSize = isSingleElementOp ? sizeof(ULong) : sizeof(V128); -+ d->nFxState = 3; -+ vex_bzero(&d->fxState, sizeof(d->fxState)); -+ d->fxState[0].fx = Ifx_Read; -+ d->fxState[0].offset = S390X_GUEST_OFFSET(guest_v0) + v2 * sizeof(V128); -+ d->fxState[0].size = elementSize; -+ d->fxState[1].fx = Ifx_Read; -+ d->fxState[1].offset = S390X_GUEST_OFFSET(guest_v0) + v3 * sizeof(V128); -+ d->fxState[1].size = elementSize; -+ d->fxState[2].fx = Ifx_Write; -+ d->fxState[2].offset = S390X_GUEST_OFFSET(guest_v0) + v1 * sizeof(V128); -+ d->fxState[2].size = sizeof(V128); -+ -+ stmt(IRStmt_Dirty(d)); -+ s390_cc_set(cc); -+ } -+ -+ return "vfce"; -+} -+ -+static const HChar * -+s390_irgen_VFCH(UChar v1, UChar v2, UChar v3, UChar m4, UChar m5, UChar m6) -+{ -+ vassert(m4 == 3); -+ -+ Bool isSingleElementOp = s390_vr_is_single_element_control_set(m5); -+ if (!s390_vr_is_cs_set(m6)) { -+ if (!isSingleElementOp) { -+ put_vr_qw(v1, binop(Iop_CmpLE64Fx2, get_vr_qw(v3), get_vr_qw(v2))); -+ } else { -+ IRExpr* comparisonResult = binop(Iop_CmpF64, get_vr(v2, Ity_F64, 0), -+ get_vr(v3, Ity_F64, 0)); -+ IRExpr* result = mkite(binop(Iop_CmpEQ32, comparisonResult, -+ mkU32(Ircr_GT)), -+ mkU64(0xffffffffffffffffULL), -+ mkU64(0ULL)); -+ put_vr_qw(v1, binop(Iop_64HLtoV128, result, mkU64(0ULL))); -+ } -+ } -+ else { -+ IRDirty* d; -+ IRTemp cc = newTemp(Ity_I64); -+ -+ s390x_vec_op_details_t details = { .serialized = 0ULL }; -+ details.op = S390_VEC_OP_VFCH; -+ details.v1 = v1; -+ details.v2 = v2; -+ details.v3 = v3; -+ details.m4 = m4; -+ details.m5 = m5; -+ details.m6 = m6; -+ -+ d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_vec_op", -+ &s390x_dirtyhelper_vec_op, -+ mkIRExprVec_2(IRExpr_GSPTR(), -+ mkU64(details.serialized))); -+ -+ const UChar elementSize = isSingleElementOp ? sizeof(ULong) : sizeof(V128); -+ d->nFxState = 3; -+ vex_bzero(&d->fxState, sizeof(d->fxState)); -+ d->fxState[0].fx = Ifx_Read; -+ d->fxState[0].offset = S390X_GUEST_OFFSET(guest_v0) + v2 * sizeof(V128); -+ d->fxState[0].size = elementSize; -+ d->fxState[1].fx = Ifx_Read; -+ d->fxState[1].offset = S390X_GUEST_OFFSET(guest_v0) + v3 * sizeof(V128); -+ d->fxState[1].size = elementSize; -+ d->fxState[2].fx = Ifx_Write; -+ d->fxState[2].offset = S390X_GUEST_OFFSET(guest_v0) + v1 * sizeof(V128); -+ d->fxState[2].size = sizeof(V128); -+ -+ stmt(IRStmt_Dirty(d)); -+ s390_cc_set(cc); -+ } -+ -+ return "vfch"; -+} -+ -+static const HChar * -+s390_irgen_VFCHE(UChar v1, UChar v2, UChar v3, UChar m4, UChar m5, UChar m6) -+{ -+ s390_insn_assert("vfche", m4 == 3); -+ -+ Bool isSingleElementOp = s390_vr_is_single_element_control_set(m5); -+ if (!s390_vr_is_cs_set(m6)) { -+ if (!isSingleElementOp) { -+ put_vr_qw(v1, binop(Iop_CmpLT64Fx2, get_vr_qw(v3), get_vr_qw(v2))); -+ } -+ else { -+ IRExpr* comparisonResult = binop(Iop_CmpF64, get_vr(v3, Ity_F64, 0), -+ get_vr(v2, Ity_F64, 0)); -+ IRExpr* result = mkite(binop(Iop_CmpEQ32, comparisonResult, -+ mkU32(Ircr_LT)), -+ mkU64(0xffffffffffffffffULL), -+ mkU64(0ULL)); -+ put_vr_qw(v1, binop(Iop_64HLtoV128, result, mkU64(0ULL))); -+ } -+ } -+ else { -+ IRDirty* d; -+ IRTemp cc = newTemp(Ity_I64); -+ -+ s390x_vec_op_details_t details = { .serialized = 0ULL }; -+ details.op = S390_VEC_OP_VFCHE; -+ details.v1 = v1; -+ details.v2 = v2; -+ details.v3 = v3; -+ details.m4 = m4; -+ details.m5 = m5; -+ details.m6 = m6; -+ -+ d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_vec_op", -+ &s390x_dirtyhelper_vec_op, -+ mkIRExprVec_2(IRExpr_GSPTR(), -+ mkU64(details.serialized))); -+ -+ const UChar elementSize = isSingleElementOp ? sizeof(ULong) : sizeof(V128); -+ d->nFxState = 3; -+ vex_bzero(&d->fxState, sizeof(d->fxState)); -+ d->fxState[0].fx = Ifx_Read; -+ d->fxState[0].offset = S390X_GUEST_OFFSET(guest_v0) + v2 * sizeof(V128); -+ d->fxState[0].size = elementSize; -+ d->fxState[1].fx = Ifx_Read; -+ d->fxState[1].offset = S390X_GUEST_OFFSET(guest_v0) + v3 * sizeof(V128); -+ d->fxState[1].size = elementSize; -+ d->fxState[2].fx = Ifx_Write; -+ d->fxState[2].offset = S390X_GUEST_OFFSET(guest_v0) + v1 * sizeof(V128); -+ d->fxState[2].size = sizeof(V128); -+ -+ stmt(IRStmt_Dirty(d)); -+ s390_cc_set(cc); -+ } -+ -+ return "vfche"; -+} -+ -+static const HChar * -+s390_irgen_VFTCI(UChar v1, UChar v2, UShort i3, UChar m4, UChar m5) -+{ -+ s390_insn_assert("vftci", m4 == 3); -+ -+ Bool isSingleElementOp = s390_vr_is_single_element_control_set(m5); -+ -+ IRDirty* d; -+ IRTemp cc = newTemp(Ity_I64); -+ -+ s390x_vec_op_details_t details = { .serialized = 0ULL }; -+ details.op = S390_VEC_OP_VFTCI; -+ details.v1 = v1; -+ details.v2 = v2; -+ details.i3 = i3; -+ details.m4 = m4; -+ details.m5 = m5; -+ -+ d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_vec_op", -+ &s390x_dirtyhelper_vec_op, -+ mkIRExprVec_2(IRExpr_GSPTR(), -+ mkU64(details.serialized))); -+ -+ const UChar elementSize = isSingleElementOp ? sizeof(ULong) : sizeof(V128); -+ d->nFxState = 2; -+ vex_bzero(&d->fxState, sizeof(d->fxState)); -+ d->fxState[0].fx = Ifx_Read; -+ d->fxState[0].offset = S390X_GUEST_OFFSET(guest_v0) + v2 * sizeof(V128); -+ d->fxState[0].size = elementSize; -+ d->fxState[1].fx = Ifx_Write; -+ d->fxState[1].offset = S390X_GUEST_OFFSET(guest_v0) + v1 * sizeof(V128); -+ d->fxState[1].size = sizeof(V128); -+ -+ stmt(IRStmt_Dirty(d)); -+ s390_cc_set(cc); -+ -+ return "vftci"; -+} -+ - /* New insns are added here. - If an insn is contingent on a facility being installed also - check whether the list of supported facilities in function -@@ -19358,6 +20061,18 @@ s390_decode_6byte_and_irgen(const UChar - unsigned int op2 : 8; - } VRR; - struct { -+ UInt op1 : 8; -+ UInt v1 : 4; -+ UInt v2 : 4; -+ UInt v3 : 4; -+ UInt : 4; -+ UInt m5 : 4; -+ UInt m4 : 4; -+ UInt m3 : 4; -+ UInt rxb : 4; -+ UInt op2 : 8; -+ } VRRa; -+ struct { - unsigned int op1 : 8; - unsigned int v1 : 4; - unsigned int v2 : 4; -@@ -19370,6 +20085,18 @@ s390_decode_6byte_and_irgen(const UChar - unsigned int op2 : 8; - } VRRd; - struct { -+ unsigned int op1 : 8; -+ unsigned int v1 : 4; -+ unsigned int v2 : 4; -+ unsigned int v3 : 4; -+ unsigned int m6 : 4; -+ unsigned int : 4; -+ unsigned int m5 : 4; -+ unsigned int v4 : 4; -+ unsigned int rxb : 4; -+ unsigned int op2 : 8; -+ } VRRe; -+ struct { - unsigned int op1 : 8; - unsigned int v1 : 4; - unsigned int v3 : 4; -@@ -19390,6 +20117,16 @@ s390_decode_6byte_and_irgen(const UChar - unsigned int op2 : 8; - } VRId; - struct { -+ UInt op1 : 8; -+ UInt v1 : 4; -+ UInt v2 : 4; -+ UInt i3 : 12; -+ UInt m5 : 4; -+ UInt m4 : 4; -+ UInt rxb : 4; -+ UInt op2 : 8; -+ } VRIe; -+ struct { - unsigned int op1 : 8; - unsigned int v1 : 4; - unsigned int v3 : 4; -@@ -19974,7 +20711,10 @@ s390_decode_6byte_and_irgen(const UChar - case 0xe70000000046ULL: s390_format_VRI_VIM(s390_irgen_VGM, ovl.fmt.VRI.v1, - ovl.fmt.VRI.i2, ovl.fmt.VRI.m3, - ovl.fmt.VRI.rxb); goto ok; -- case 0xe7000000004aULL: /* VFTCI */ goto unimplemented; -+ case 0xe7000000004aULL: s390_format_VRI_VVIMM(s390_irgen_VFTCI, ovl.fmt.VRIe.v1, -+ ovl.fmt.VRIe.v2, ovl.fmt.VRIe.i3, -+ ovl.fmt.VRIe.m4, ovl.fmt.VRIe.m5, -+ ovl.fmt.VRIe.rxb); goto ok; - case 0xe7000000004dULL: s390_format_VRI_VVIM(s390_irgen_VREP, ovl.fmt.VRI.v1, - ovl.fmt.VRI.v3, ovl.fmt.VRI.i2, - ovl.fmt.VRI.m3, ovl.fmt.VRI.rxb); goto ok; -@@ -20087,19 +20827,27 @@ s390_decode_6byte_and_irgen(const UChar - ovl.fmt.VRR.v2, ovl.fmt.VRR.r3, - ovl.fmt.VRR.m4, ovl.fmt.VRR.rxb); goto ok; - case 0xe70000000085ULL: /* VBPERM */ goto unimplemented; -- case 0xe7000000008aULL: s390_format_VRRd_VVVVMM(s390_irgen_VSTRC, ovl.fmt.VRRd.v1, -- ovl.fmt.VRRd.v2, ovl.fmt.VRRd.v3, -- ovl.fmt.VRRd.v4, ovl.fmt.VRRd.m5, -- ovl.fmt.VRRd.m6, -- ovl.fmt.VRRd.rxb); goto ok; -+ case 0xe7000000008aULL: s390_format_VRR_VVVVMM(s390_irgen_VSTRC, ovl.fmt.VRRd.v1, -+ ovl.fmt.VRRd.v2, ovl.fmt.VRRd.v3, -+ ovl.fmt.VRRd.v4, ovl.fmt.VRRd.m5, -+ ovl.fmt.VRRd.m6, -+ ovl.fmt.VRRd.rxb); goto ok; - case 0xe7000000008cULL: s390_format_VRR_VVVV(s390_irgen_VPERM, ovl.fmt.VRR.v1, - ovl.fmt.VRR.v2, ovl.fmt.VRR.r3, - ovl.fmt.VRR.m4, ovl.fmt.VRR.rxb); goto ok; - case 0xe7000000008dULL: s390_format_VRR_VVVV(s390_irgen_VSEL, ovl.fmt.VRR.v1, - ovl.fmt.VRR.v2, ovl.fmt.VRR.r3, - ovl.fmt.VRR.m4, ovl.fmt.VRR.rxb); goto ok; -- case 0xe7000000008eULL: /* VFMS */ goto unimplemented; -- case 0xe7000000008fULL: /* VFMA */ goto unimplemented; -+ case 0xe7000000008eULL: s390_format_VRR_VVVVMM(s390_irgen_VFMS, ovl.fmt.VRRe.v1, -+ ovl.fmt.VRRe.v2, ovl.fmt.VRRe.v3, -+ ovl.fmt.VRRe.v4, ovl.fmt.VRRe.m5, -+ ovl.fmt.VRRe.m6, -+ ovl.fmt.VRRe.rxb); goto ok; -+ case 0xe7000000008fULL: s390_format_VRR_VVVVMM(s390_irgen_VFMA, ovl.fmt.VRRe.v1, -+ ovl.fmt.VRRe.v2, ovl.fmt.VRRe.v3, -+ ovl.fmt.VRRe.v4, ovl.fmt.VRRe.m5, -+ ovl.fmt.VRRe.m6, -+ ovl.fmt.VRRe.rxb); goto ok; - case 0xe70000000094ULL: s390_format_VRR_VVVM(s390_irgen_VPK, ovl.fmt.VRR.v1, - ovl.fmt.VRR.v2, ovl.fmt.VRR.r3, - ovl.fmt.VRR.m4, ovl.fmt.VRR.rxb); goto ok; -@@ -20184,17 +20932,50 @@ s390_decode_6byte_and_irgen(const UChar - ovl.fmt.VRRd.v2, ovl.fmt.VRRd.v3, - ovl.fmt.VRRd.v4, ovl.fmt.VRRd.m5, - ovl.fmt.VRRd.rxb); goto ok; -- case 0xe700000000c0ULL: /* VCLGD */ goto unimplemented; -- case 0xe700000000c1ULL: /* VCDLG */ goto unimplemented; -- case 0xe700000000c2ULL: /* VCGD */ goto unimplemented; -- case 0xe700000000c3ULL: /* VCDG */ goto unimplemented; -- case 0xe700000000c4ULL: /* VLDE */ goto unimplemented; -- case 0xe700000000c5ULL: /* VLED */ goto unimplemented; -- case 0xe700000000c7ULL: /* VFI */ goto unimplemented; -- case 0xe700000000caULL: /* WFK */ goto unimplemented; -- case 0xe700000000cbULL: /* WFC */ goto unimplemented; -- case 0xe700000000ccULL: /* VFPSO */ goto unimplemented; -- case 0xe700000000ceULL: /* VFSQ */ goto unimplemented; -+ case 0xe700000000c0ULL: s390_format_VRRa_VVMMM(s390_irgen_VCLGD, ovl.fmt.VRRa.v1, -+ ovl.fmt.VRRa.v2, ovl.fmt.VRRa.m3, -+ ovl.fmt.VRRa.m4, ovl.fmt.VRRa.m5, -+ ovl.fmt.VRRa.rxb); goto ok; -+ case 0xe700000000c1ULL: s390_format_VRRa_VVMMM(s390_irgen_VCDLG, ovl.fmt.VRRa.v1, -+ ovl.fmt.VRRa.v2, ovl.fmt.VRRa.m3, -+ ovl.fmt.VRRa.m4, ovl.fmt.VRRa.m5, -+ ovl.fmt.VRRa.rxb); goto ok; -+ case 0xe700000000c2ULL: s390_format_VRRa_VVMMM(s390_irgen_VCGD, ovl.fmt.VRRa.v1, -+ ovl.fmt.VRRa.v2, ovl.fmt.VRRa.m3, -+ ovl.fmt.VRRa.m4, ovl.fmt.VRRa.m5, -+ ovl.fmt.VRRa.rxb); goto ok; -+ case 0xe700000000c3ULL: s390_format_VRRa_VVMMM(s390_irgen_VCDG, ovl.fmt.VRRa.v1, -+ ovl.fmt.VRRa.v2, ovl.fmt.VRRa.m3, -+ ovl.fmt.VRRa.m4, ovl.fmt.VRRa.m5, -+ ovl.fmt.VRRa.rxb); goto ok; -+ case 0xe700000000c4ULL: s390_format_VRRa_VVMMM(s390_irgen_VLDE, ovl.fmt.VRRa.v1, -+ ovl.fmt.VRRa.v2, ovl.fmt.VRRa.m3, -+ ovl.fmt.VRRa.m4, ovl.fmt.VRRa.m5, -+ ovl.fmt.VRRa.rxb); goto ok; -+ case 0xe700000000c5ULL: s390_format_VRRa_VVMMM(s390_irgen_VLED, ovl.fmt.VRRa.v1, -+ ovl.fmt.VRRa.v2, ovl.fmt.VRRa.m3, -+ ovl.fmt.VRRa.m4, ovl.fmt.VRRa.m5, -+ ovl.fmt.VRRa.rxb); goto ok; -+ case 0xe700000000c7ULL: s390_format_VRRa_VVMMM(s390_irgen_VFI, ovl.fmt.VRRa.v1, -+ ovl.fmt.VRRa.v2, ovl.fmt.VRRa.m3, -+ ovl.fmt.VRRa.m4, ovl.fmt.VRRa.m5, -+ ovl.fmt.VRRa.rxb); goto ok; -+ case 0xe700000000caULL: s390_format_VRRa_VVMM(s390_irgen_WFK, ovl.fmt.VRRa.v1, -+ ovl.fmt.VRRa.v2, ovl.fmt.VRRa.m3, -+ ovl.fmt.VRRa.m4, -+ ovl.fmt.VRRa.rxb); goto ok; -+ case 0xe700000000cbULL: s390_format_VRRa_VVMM(s390_irgen_WFC, ovl.fmt.VRRa.v1, -+ ovl.fmt.VRRa.v2, ovl.fmt.VRRa.m3, -+ ovl.fmt.VRRa.m4, -+ ovl.fmt.VRRa.rxb); goto ok; -+ case 0xe700000000ccULL: s390_format_VRRa_VVMMM(s390_irgen_VFPSO, ovl.fmt.VRRa.v1, -+ ovl.fmt.VRRa.v2, ovl.fmt.VRRa.m3, -+ ovl.fmt.VRRa.m4, ovl.fmt.VRRa.m5, -+ ovl.fmt.VRRa.rxb); goto ok; -+ case 0xe700000000ceULL: s390_format_VRRa_VVMM(s390_irgen_VFSQ, ovl.fmt.VRRa.v1, -+ ovl.fmt.VRRa.v2, ovl.fmt.VRRa.m3, -+ ovl.fmt.VRRa.m4, -+ ovl.fmt.VRRa.rxb); goto ok; - case 0xe700000000d4ULL: s390_format_VRR_VVM(s390_irgen_VUPLL, ovl.fmt.VRR.v1, - ovl.fmt.VRR.v2, ovl.fmt.VRR.m4, - ovl.fmt.VRR.rxb); goto ok; -@@ -20221,13 +21002,37 @@ s390_decode_6byte_and_irgen(const UChar - case 0xe700000000dfULL: s390_format_VRR_VVM(s390_irgen_VLP, ovl.fmt.VRR.v1, - ovl.fmt.VRR.v2, ovl.fmt.VRR.m4, - ovl.fmt.VRR.rxb); goto ok; -- case 0xe700000000e2ULL: /* VFS */ goto unimplemented; -- case 0xe700000000e3ULL: /* VFA */ goto unimplemented; -- case 0xe700000000e5ULL: /* VFD */ goto unimplemented; -- case 0xe700000000e7ULL: /* VFM */ goto unimplemented; -- case 0xe700000000e8ULL: /* VFCE */ goto unimplemented; -- case 0xe700000000eaULL: /* VFCHE */ goto unimplemented; -- case 0xe700000000ebULL: /* VFCH */ goto unimplemented; -+ case 0xe700000000e2ULL: s390_format_VRRa_VVVMM(s390_irgen_VFS, ovl.fmt.VRRa.v1, -+ ovl.fmt.VRRa.v2, ovl.fmt.VRRa.v3, -+ ovl.fmt.VRRa.m3, ovl.fmt.VRRa.m4, -+ ovl.fmt.VRRa.rxb); goto ok; -+ case 0xe700000000e3ULL: s390_format_VRRa_VVVMM(s390_irgen_VFA, ovl.fmt.VRRa.v1, -+ ovl.fmt.VRRa.v2, ovl.fmt.VRRa.v3, -+ ovl.fmt.VRRa.m3, ovl.fmt.VRRa.m4, -+ ovl.fmt.VRRa.rxb); goto ok; -+ case 0xe700000000e5ULL: s390_format_VRRa_VVVMM(s390_irgen_VFD, ovl.fmt.VRRa.v1, -+ ovl.fmt.VRRa.v2, ovl.fmt.VRRa.v3, -+ ovl.fmt.VRRa.m3, ovl.fmt.VRRa.m4, -+ ovl.fmt.VRRa.rxb); goto ok; -+ case 0xe700000000e7ULL: s390_format_VRRa_VVVMM(s390_irgen_VFM, ovl.fmt.VRRa.v1, -+ ovl.fmt.VRRa.v2, ovl.fmt.VRRa.v3, -+ ovl.fmt.VRRa.m3, ovl.fmt.VRRa.m4, -+ ovl.fmt.VRRa.rxb); goto ok; -+ case 0xe700000000e8ULL: s390_format_VRRa_VVVMMM(s390_irgen_VFCE, ovl.fmt.VRRa.v1, -+ ovl.fmt.VRRa.v2, ovl.fmt.VRRa.v3, -+ ovl.fmt.VRRa.m3, ovl.fmt.VRRa.m4, -+ ovl.fmt.VRRa.m5, -+ ovl.fmt.VRRa.rxb); goto ok; -+ case 0xe700000000eaULL: s390_format_VRRa_VVVMMM(s390_irgen_VFCHE, ovl.fmt.VRRa.v1, -+ ovl.fmt.VRRa.v2, ovl.fmt.VRRa.v3, -+ ovl.fmt.VRRa.m3, ovl.fmt.VRRa.m4, -+ ovl.fmt.VRRa.m5, -+ ovl.fmt.VRRa.rxb); goto ok; -+ case 0xe700000000ebULL: s390_format_VRRa_VVVMMM(s390_irgen_VFCH, ovl.fmt.VRRa.v1, -+ ovl.fmt.VRRa.v2, ovl.fmt.VRRa.v3, -+ ovl.fmt.VRRa.m3, ovl.fmt.VRRa.m4, -+ ovl.fmt.VRRa.m5, -+ ovl.fmt.VRRa.rxb); goto ok; - case 0xe700000000eeULL: /* VFMIN */ goto unimplemented; - case 0xe700000000efULL: /* VFMAX */ goto unimplemented; - case 0xe700000000f0ULL: s390_format_VRR_VVVM(s390_irgen_VAVGL, ovl.fmt.VRR.v1, -@@ -21148,7 +21953,13 @@ s390_decode_and_irgen(const UChar *bytes - dis_res->jk_StopHere = Ijk_Boring; - } - -- if (status == S390_DECODE_OK) return insn_length; /* OK */ -+ if (status == S390_DECODE_OK) { -+ /* Adjust status if a specification exception was indicated. */ -+ if (is_specification_exception()) -+ status = S390_DECODE_SPECIFICATION_EXCEPTION; -+ else -+ return insn_length; /* OK */ -+ } - - /* Decoding failed somehow */ - if (sigill_diag) { -@@ -21166,6 +21977,10 @@ s390_decode_and_irgen(const UChar *bytes - vex_printf("unimplemented special insn: "); - break; - -+ case S390_DECODE_SPECIFICATION_EXCEPTION: -+ vex_printf("specification exception: "); -+ break; -+ - case S390_DECODE_ERROR: - vex_printf("decoding error: "); - break; -Index: valgrind-3.14.0/VEX/priv/host_s390_defs.c -=================================================================== ---- valgrind-3.14.0.orig/VEX/priv/host_s390_defs.c -+++ valgrind-3.14.0/VEX/priv/host_s390_defs.c -@@ -1711,6 +1711,23 @@ emit_VRR_VVM(UChar *p, ULong op, UChar v - return emit_6bytes(p, the_insn); - } - -+static UChar * -+emit_VRR_VVMMM(UChar *p, ULong op, UChar v1, UChar v2, UChar m3, UChar m4, -+ UChar m5) -+{ -+ ULong the_insn = op; -+ ULong rxb = s390_update_rxb(0, 1, &v1); -+ rxb = s390_update_rxb(rxb, 2, &v2); -+ -+ the_insn |= ((ULong)v1) << 36; -+ the_insn |= ((ULong)v2) << 32; -+ the_insn |= ((ULong)m5) << 20; -+ the_insn |= ((ULong)m4) << 16; -+ the_insn |= ((ULong)m3) << 12; -+ the_insn |= ((ULong)rxb) << 8; -+ -+ return emit_6bytes(p, the_insn); -+} - - static UChar * - emit_VRR_VVVM(UChar *p, ULong op, UChar v1, UChar v2, UChar v3, UChar m4) -@@ -1762,6 +1779,26 @@ emit_VRR_VVVV(UChar *p, ULong op, UChar - return emit_6bytes(p, the_insn); - } - -+static UChar * -+emit_VRRe_VVVVMM(UChar *p, ULong op, UChar v1, UChar v2, UChar v3, UChar v4, -+ UChar m5, UChar m6) -+{ -+ ULong the_insn = op; -+ ULong rxb = s390_update_rxb(0, 1, &v1); -+ rxb = s390_update_rxb(rxb, 2, &v2); -+ rxb = s390_update_rxb(rxb, 3, &v3); -+ rxb = s390_update_rxb(rxb, 4, &v4); -+ -+ the_insn |= ((ULong)v1) << 36; -+ the_insn |= ((ULong)v2) << 32; -+ the_insn |= ((ULong)v3) << 28; -+ the_insn |= ((ULong)m6) << 24; -+ the_insn |= ((ULong)m5) << 16; -+ the_insn |= ((ULong)v4) << 12; -+ the_insn |= ((ULong)rxb) << 8; -+ -+ return emit_6bytes(p, the_insn); -+} - - static UChar * - emit_VRR_VRR(UChar *p, ULong op, UChar v1, UChar r2, UChar r3) -@@ -1777,6 +1814,33 @@ emit_VRR_VRR(UChar *p, ULong op, UChar v - return emit_6bytes(p, the_insn); - } - -+static UChar * -+emit_VRR_VVVMMM(UChar *p, ULong op, UChar v1, UChar v2, UChar v3, UChar m4, -+ UChar m5, UChar m6) -+{ -+ ULong the_insn = op; -+ ULong rxb = s390_update_rxb(0, 1, &v1); -+ rxb = s390_update_rxb(rxb, 2, &v2); -+ rxb = s390_update_rxb(rxb, 3, &v3); -+ -+ the_insn |= ((ULong)v1) << 36; -+ the_insn |= ((ULong)v2) << 32; -+ the_insn |= ((ULong)v3) << 28; -+ the_insn |= ((ULong)m6) << 20; -+ the_insn |= ((ULong)m5) << 16; -+ the_insn |= ((ULong)m4) << 12; -+ the_insn |= ((ULong)rxb) << 8; -+ -+ return emit_6bytes(p, the_insn); -+} -+ -+static UChar* -+emit_VRR_VVVMM(UChar *p, ULong op, UChar v1, UChar v2, UChar v3, UChar m4, -+ UChar m5) -+{ -+ return emit_VRR_VVVMMM(p, op, v1, v2, v3, m4, m5, 0); -+} -+ - /*------------------------------------------------------------*/ - /*--- Functions to emit particular instructions ---*/ - /*------------------------------------------------------------*/ -@@ -6057,6 +6121,116 @@ s390_emit_VLVGP(UChar *p, UChar v1, UCha - return emit_VRR_VRR(p, 0xE70000000062ULL, v1, r2, r3); - } - -+static UChar * -+s390_emit_VFPSO(UChar *p, UChar v1, UChar v2, UChar m3, UChar m4, UChar m5) -+{ -+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC6(MNM, VR, VR, UINT, UINT, UINT), "vfpso", v1, v2, m3, m4, -+ m5); -+ -+ return emit_VRR_VVMMM(p, 0xE700000000CCULL, v1, v2, m3, m4, m5); -+} -+ -+static UChar * -+s390_emit_VFA(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4, UChar m5) -+{ -+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC6(MNM, VR, VR, VR, UINT, UINT), "vfa", v1, v2, v3, m4, m5); -+ -+ return emit_VRR_VVVMM(p, 0xE700000000e3ULL, v1, v2, v3, m4, m5); -+} -+ -+static UChar * -+s390_emit_VFS(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4, UChar m5) -+{ -+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC6(MNM, VR, VR, VR, UINT, UINT), "vfs", v1, v2, v3, m4, m5); -+ -+ return emit_VRR_VVVMM(p, 0xE700000000e2ULL, v1, v2, v3, m4, m5); -+} -+ -+static UChar * -+s390_emit_VFM(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4, UChar m5) -+{ -+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC6(MNM, VR, VR, VR, UINT, UINT), "vfm", v1, v2, v3, m4, m5); -+ -+ return emit_VRR_VVVMM(p, 0xE700000000e7ULL, v1, v2, v3, m4, m5); -+} -+ -+static UChar * -+s390_emit_VFD(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4, UChar m5) -+{ -+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC6(MNM, VR, VR, VR, UINT, UINT), "vfd", v1, v2, v3, m4, m5); -+ -+ return emit_VRR_VVVMM(p, 0xE700000000e5ULL, v1, v2, v3, m4, m5); -+} -+ -+static UChar * -+s390_emit_VFSQ(UChar *p, UChar v1, UChar v2, UChar m3, UChar m4) -+{ -+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC5(MNM, VR, VR, UINT, UINT), "vfsq", v1, v2, m3, m4); -+ -+ return emit_VRR_VVMMM(p, 0xE700000000CEULL, v1, v2, m3, m4, 0); -+} -+ -+static UChar * -+s390_emit_VFMA(UChar *p, UChar v1, UChar v2, UChar v3, UChar v4, UChar m5, -+ UChar m6) -+{ -+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC7(MNM, VR, VR, VR, VR, UINT, UINT), "vfma", -+ v1, v2, v3, v4, m5, m6); -+ -+ return emit_VRRe_VVVVMM(p, 0xE7000000008fULL, v1, v2, v3, v4, m5, m6); -+} -+ -+static UChar * -+s390_emit_VFMS(UChar *p, UChar v1, UChar v2, UChar v3, UChar v4, UChar m5, -+ UChar m6) -+{ -+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC7(MNM, VR, VR, VR, VR, UINT, UINT), "vfms", -+ v1, v2, v3, v4, m5, m6); -+ -+ return emit_VRRe_VVVVMM(p, 0xE7000000008eULL, v1, v2, v3, v4, m5, m6); -+} -+ -+static UChar * -+s390_emit_VFCE(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4, UChar m5, -+ UChar m6) -+{ -+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC7(MNM, VR, VR, VR, UINT, UINT, UINT), "vfce", -+ v1, v2, v3, m4, m5, m6); -+ -+ return emit_VRR_VVVMMM(p, 0xE700000000e8ULL, v1, v2, v3, m4, m5, m6); -+} -+ -+static UChar * -+s390_emit_VFCH(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4, UChar m5, -+ UChar m6) -+{ -+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC7(MNM, VR, VR, VR, UINT, UINT, UINT), "vfch", -+ v1, v2, v3, m4, m5, m6); -+ -+ return emit_VRR_VVVMMM(p, 0xE700000000ebULL, v1, v2, v3, m4, m5, m6); -+} -+ -+static UChar * -+s390_emit_VFCHE(UChar *p, UChar v1, UChar v2, UChar v3, UChar m4, UChar m5, -+ UChar m6) -+{ -+ if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM)) -+ s390_disasm(ENC7(MNM, VR, VR, VR, UINT, UINT, UINT), "vfche", -+ v1, v2, v3, m4, m5, m6); -+ -+ return emit_VRR_VVVMMM(p, 0xE700000000eaULL, v1, v2, v3, m4, m5, m6); -+} -+ - /*---------------------------------------------------------------*/ - /*--- Constructors for the various s390_insn kinds ---*/ - /*---------------------------------------------------------------*/ -@@ -7201,7 +7375,6 @@ s390_insn *s390_insn_vec_triop(UChar siz - { - s390_insn *insn = LibVEX_Alloc_inline(sizeof(s390_insn)); - -- vassert(size == 16); - - insn->tag = S390_INSN_VEC_TRIOP; - insn->size = size; -@@ -7508,6 +7681,18 @@ s390_insn_as_string(const s390_insn *ins - op = "v-vunpacku"; - break; - -+ case S390_VEC_FLOAT_NEG: -+ op = "v-vfloatneg"; -+ break; -+ -+ case S390_VEC_FLOAT_SQRT: -+ op = "v-vfloatsqrt"; -+ break; -+ -+ case S390_VEC_FLOAT_ABS: -+ op = "v-vfloatabs"; -+ break; -+ - default: - goto fail; - } -@@ -7880,6 +8065,13 @@ s390_insn_as_string(const s390_insn *ins - case S390_VEC_PWSUM_DW: op = "v-vpwsumdw"; break; - case S390_VEC_PWSUM_QW: op = "v-vpwsumqw"; break; - case S390_VEC_INIT_FROM_GPRS: op = "v-vinitfromgprs"; break; -+ case S390_VEC_FLOAT_ADD: op = "v-vfloatadd"; break; -+ case S390_VEC_FLOAT_SUB: op = "v-vfloatsub"; break; -+ case S390_VEC_FLOAT_MUL: op = "v-vfloatmul"; break; -+ case S390_VEC_FLOAT_DIV: op = "v-vfloatdiv"; break; -+ case S390_VEC_FLOAT_COMPARE_EQUAL: op = "v-vfloatcmpeq"; break; -+ case S390_VEC_FLOAT_COMPARE_LESS_OR_EQUAL: op = "v-vfloatcmple"; break; -+ case S390_VEC_FLOAT_COMPARE_LESS: op = "v-vfloatcmpl"; break; - default: goto fail; - } - s390_sprintf(buf, "%M %R, %R, %R", op, insn->variant.vec_binop.dst, -@@ -7889,6 +8081,8 @@ s390_insn_as_string(const s390_insn *ins - case S390_INSN_VEC_TRIOP: - switch (insn->variant.vec_triop.tag) { - case S390_VEC_PERM: op = "v-vperm"; break; -+ case S390_VEC_FLOAT_MADD: op = "v-vfloatmadd"; break; -+ case S390_VEC_FLOAT_MSUB: op = "v-vfloatmsub"; break; - default: goto fail; - } - s390_sprintf(buf, "%M %R, %R, %R, %R", op, insn->variant.vec_triop.dst, -@@ -9036,6 +9230,27 @@ s390_insn_unop_emit(UChar *buf, const s3 - return s390_emit_VPOPCT(buf, v1, v2, s390_getM_from_size(insn->size)); - } - -+ case S390_VEC_FLOAT_NEG: { -+ vassert(insn->variant.unop.src.tag == S390_OPND_REG); -+ vassert(insn->size == 8); -+ UChar v1 = hregNumber(insn->variant.unop.dst); -+ UChar v2 = hregNumber(insn->variant.unop.src.variant.reg); -+ return s390_emit_VFPSO(buf, v1, v2, s390_getM_from_size(insn->size), 0, 0); -+ } -+ case S390_VEC_FLOAT_ABS: { -+ vassert(insn->variant.unop.src.tag == S390_OPND_REG); -+ vassert(insn->size == 8); -+ UChar v1 = hregNumber(insn->variant.unop.dst); -+ UChar v2 = hregNumber(insn->variant.unop.src.variant.reg); -+ return s390_emit_VFPSO(buf, v1, v2, s390_getM_from_size(insn->size), 0, 2); -+ } -+ case S390_VEC_FLOAT_SQRT: { -+ vassert(insn->variant.unop.src.tag == S390_OPND_REG); -+ vassert(insn->size == 8); -+ UChar v1 = hregNumber(insn->variant.unop.dst); -+ UChar v2 = hregNumber(insn->variant.unop.src.variant.reg); -+ return s390_emit_VFSQ(buf, v1, v2, s390_getM_from_size(insn->size), 0); -+ } - default: - vpanic("s390_insn_unop_emit"); - } -@@ -11049,6 +11264,21 @@ s390_insn_vec_binop_emit(UChar *buf, con - return s390_emit_VSUMQ(buf, v1, v2, v3, s390_getM_from_size(size)); - case S390_VEC_INIT_FROM_GPRS: - return s390_emit_VLVGP(buf, v1, v2, v3); -+ case S390_VEC_FLOAT_ADD: -+ return s390_emit_VFA(buf, v1, v2, v3, s390_getM_from_size(size), 0); -+ case S390_VEC_FLOAT_SUB: -+ return s390_emit_VFS(buf, v1, v2, v3, s390_getM_from_size(size), 0); -+ case S390_VEC_FLOAT_MUL: -+ return s390_emit_VFM(buf, v1, v2, v3, s390_getM_from_size(size), 0); -+ case S390_VEC_FLOAT_DIV: -+ return s390_emit_VFD(buf, v1, v2, v3, s390_getM_from_size(size), 0); -+ case S390_VEC_FLOAT_COMPARE_EQUAL: -+ return s390_emit_VFCE(buf, v1, v2, v3, s390_getM_from_size(size), 0, 0); -+ case S390_VEC_FLOAT_COMPARE_LESS_OR_EQUAL: -+ return s390_emit_VFCH(buf, v1, v3, v2, s390_getM_from_size(size), 0, 0); -+ case S390_VEC_FLOAT_COMPARE_LESS: -+ return s390_emit_VFCHE(buf, v1, v3, v2, s390_getM_from_size(size), 0, 0); -+ - default: - goto fail; - } -@@ -11070,8 +11300,14 @@ s390_insn_vec_triop_emit(UChar *buf, con - UChar v4 = hregNumber(insn->variant.vec_triop.op3); - - switch (tag) { -- case S390_VEC_PERM: -+ case S390_VEC_PERM: { -+ vassert(insn->size == 16); - return s390_emit_VPERM(buf, v1, v2, v3, v4); -+ } -+ case S390_VEC_FLOAT_MADD: -+ return s390_emit_VFMA(buf, v1, v2, v3, v4, 0, 3); -+ case S390_VEC_FLOAT_MSUB: -+ return s390_emit_VFMS(buf, v1, v2, v3, v4, 0, 3); - default: - goto fail; - } -Index: valgrind-3.14.0/VEX/priv/host_s390_defs.h -=================================================================== ---- valgrind-3.14.0.orig/VEX/priv/host_s390_defs.h -+++ valgrind-3.14.0/VEX/priv/host_s390_defs.h -@@ -202,7 +202,10 @@ typedef enum { - S390_VEC_ABS, - S390_VEC_COUNT_LEADING_ZEROES, - S390_VEC_COUNT_TRAILING_ZEROES, -- S390_VEC_COUNT_ONES -+ S390_VEC_COUNT_ONES, -+ S390_VEC_FLOAT_NEG, -+ S390_VEC_FLOAT_ABS, -+ S390_VEC_FLOAT_SQRT - } s390_unop_t; - - /* The kind of ternary BFP operations */ -@@ -394,11 +397,20 @@ typedef enum { - S390_VEC_PWSUM_QW, - - S390_VEC_INIT_FROM_GPRS, -+ S390_VEC_FLOAT_ADD, -+ S390_VEC_FLOAT_SUB, -+ S390_VEC_FLOAT_MUL, -+ S390_VEC_FLOAT_DIV, -+ S390_VEC_FLOAT_COMPARE_EQUAL, -+ S390_VEC_FLOAT_COMPARE_LESS_OR_EQUAL, -+ S390_VEC_FLOAT_COMPARE_LESS - } s390_vec_binop_t; - - /* The vector operations with three operands */ - typedef enum { -- S390_VEC_PERM -+ S390_VEC_PERM, -+ S390_VEC_FLOAT_MADD, -+ S390_VEC_FLOAT_MSUB - } s390_vec_triop_t; - - /* The details of a CDAS insn. Carved out to keep the size of -Index: valgrind-3.14.0/VEX/priv/host_s390_isel.c -=================================================================== ---- valgrind-3.14.0.orig/VEX/priv/host_s390_isel.c -+++ valgrind-3.14.0/VEX/priv/host_s390_isel.c -@@ -787,10 +787,12 @@ get_bfp_rounding_mode(ISelEnv *env, IREx - IRRoundingMode mode = irrm->Iex.Const.con->Ico.U32; - - switch (mode) { -- case Irrm_NEAREST: return S390_BFP_ROUND_NEAREST_EVEN; -- case Irrm_ZERO: return S390_BFP_ROUND_ZERO; -- case Irrm_PosINF: return S390_BFP_ROUND_POSINF; -- case Irrm_NegINF: return S390_BFP_ROUND_NEGINF; -+ case Irrm_NEAREST_TIE_AWAY_0: return S390_BFP_ROUND_NEAREST_AWAY; -+ case Irrm_PREPARE_SHORTER: return S390_BFP_ROUND_PREPARE_SHORT; -+ case Irrm_NEAREST: return S390_BFP_ROUND_NEAREST_EVEN; -+ case Irrm_ZERO: return S390_BFP_ROUND_ZERO; -+ case Irrm_PosINF: return S390_BFP_ROUND_POSINF; -+ case Irrm_NegINF: return S390_BFP_ROUND_NEGINF; - default: - vpanic("get_bfp_rounding_mode"); - } -@@ -3871,6 +3873,17 @@ s390_isel_vec_expr_wrk(ISelEnv *env, IRE - vec_op = S390_VEC_COUNT_ONES; - goto Iop_V_wrk; - -+ case Iop_Neg64Fx2: -+ size = 8; -+ vec_op = S390_VEC_FLOAT_NEG; -+ goto Iop_V_wrk; -+ -+ case Iop_Abs64Fx2: -+ size = 8; -+ vec_op = S390_VEC_FLOAT_ABS; -+ goto Iop_V_wrk; -+ -+ - Iop_V_wrk: { - dst = newVRegV(env); - reg1 = s390_isel_vec_expr(env, arg); -@@ -4388,6 +4401,28 @@ s390_isel_vec_expr_wrk(ISelEnv *env, IRE - vec_op = S390_VEC_ELEM_ROLL_V; - goto Iop_VV_wrk; - -+ case Iop_CmpEQ64Fx2: -+ size = 8; -+ vec_op = S390_VEC_FLOAT_COMPARE_EQUAL; -+ goto Iop_VV_wrk; -+ -+ case Iop_CmpLE64Fx2: { -+ size = 8; -+ vec_op = S390_VEC_FLOAT_COMPARE_LESS_OR_EQUAL; -+ goto Iop_VV_wrk; -+ } -+ -+ case Iop_CmpLT64Fx2: { -+ size = 8; -+ vec_op = S390_VEC_FLOAT_COMPARE_LESS; -+ goto Iop_VV_wrk; -+ } -+ -+ case Iop_Sqrt64Fx2: -+ size = 8; -+ vec_op = S390_VEC_FLOAT_SQRT; -+ goto Iop_irrm_V_wrk; -+ - case Iop_ShlN8x16: - size = 1; - shift_op = S390_VEC_ELEM_SHL_INT; -@@ -4493,6 +4528,14 @@ s390_isel_vec_expr_wrk(ISelEnv *env, IRE - return dst; - } - -+ Iop_irrm_V_wrk: { -+ set_bfp_rounding_mode_in_fpc(env, arg1); -+ reg1 = s390_isel_vec_expr(env, arg2); -+ -+ addInstr(env, s390_insn_unop(size, vec_op, dst, s390_opnd_reg(reg1))); -+ return dst; -+ } -+ - case Iop_64HLtoV128: - reg1 = s390_isel_int_expr(env, arg1); - reg2 = s390_isel_int_expr(env, arg2); -@@ -4516,6 +4559,7 @@ s390_isel_vec_expr_wrk(ISelEnv *env, IRE - IRExpr* arg1 = expr->Iex.Triop.details->arg1; - IRExpr* arg2 = expr->Iex.Triop.details->arg2; - IRExpr* arg3 = expr->Iex.Triop.details->arg3; -+ IROp vec_op; - switch (op) { - case Iop_SetElem8x16: - size = 1; -@@ -4551,6 +4595,36 @@ s390_isel_vec_expr_wrk(ISelEnv *env, IRE - dst, reg1, reg2, reg3)); - return dst; - -+ case Iop_Add64Fx2: -+ size = 8; -+ vec_op = S390_VEC_FLOAT_ADD; -+ goto Iop_irrm_VV_wrk; -+ -+ case Iop_Sub64Fx2: -+ size = 8; -+ vec_op = S390_VEC_FLOAT_SUB; -+ goto Iop_irrm_VV_wrk; -+ -+ case Iop_Mul64Fx2: -+ size = 8; -+ vec_op = S390_VEC_FLOAT_MUL; -+ goto Iop_irrm_VV_wrk; -+ case Iop_Div64Fx2: -+ size = 8; -+ vec_op = S390_VEC_FLOAT_DIV; -+ goto Iop_irrm_VV_wrk; -+ -+ Iop_irrm_VV_wrk: { -+ set_bfp_rounding_mode_in_fpc(env, arg1); -+ reg1 = s390_isel_vec_expr(env, arg2); -+ reg2 = s390_isel_vec_expr(env, arg3); -+ -+ addInstr(env, s390_insn_vec_binop(size, vec_op, -+ dst, reg1, reg2)); -+ -+ return dst; -+ } -+ - default: - goto irreducible; - } diff --git a/0001-Bug-385411-s390x-Tests-and-internals-for-z13-vector-.patch b/0001-Bug-385411-s390x-Tests-and-internals-for-z13-vector-.patch deleted file mode 100644 index 52ce1e9..0000000 --- a/0001-Bug-385411-s390x-Tests-and-internals-for-z13-vector-.patch +++ /dev/null @@ -1,2339 +0,0 @@ -From 86bd889458883295b73c36696ec64dea9338a7a3 Mon Sep 17 00:00:00 2001 -From: Vadim Barkov -Date: Fri, 5 Oct 2018 13:46:44 +0300 -Subject: [PATCH] Bug 385411 s390x: Tests and internals for z13 vector FP - support - -Add test cases for the z13 vector FP support. Bring s390-opcodes.csv -up-to-date, reflecting that the z13 vector instructions are now supported. -Also remove the non-support disclaimer for the vector facility from -README.s390. - -The patch was contributed by Vadim Barkov, with some clean-up and minor -adjustments by Andreas Arnez. ---- - .gitignore | 10 + - README.s390 | 1 - - docs/internals/s390-opcodes.csv | 236 +-- - none/tests/s390x/Makefile.am | 5 +- - none/tests/s390x/vector.h | 111 +- - none/tests/s390x/vector_float.c | 275 ++++ - none/tests/s390x/vector_float.stderr.exp | 2 + - none/tests/s390x/vector_float.stdout.exp | 1808 ++++++++++++++++++++++ - none/tests/s390x/vector_float.vgtest | 2 + - 9 files changed, 2318 insertions(+), 132 deletions(-) - create mode 100644 none/tests/s390x/vector_float.c - create mode 100644 none/tests/s390x/vector_float.stderr.exp - create mode 100644 none/tests/s390x/vector_float.stdout.exp - create mode 100644 none/tests/s390x/vector_float.vgtest - -Index: valgrind-3.14.0/README.s390 -=================================================================== ---- valgrind-3.14.0.orig/README.s390 -+++ valgrind-3.14.0/README.s390 -@@ -24,7 +24,6 @@ Limitations - 4 one-byte reads/writes instead of just a single read/write. - - The transactional-execution facility is not supported; it is masked - off from HWCAP. --- The vector facility is not supported; it is masked off from HWCAP. - - - Hardware facilities -Index: valgrind-3.14.0/none/tests/s390x/Makefile.am -=================================================================== ---- valgrind-3.14.0.orig/none/tests/s390x/Makefile.am -+++ valgrind-3.14.0/none/tests/s390x/Makefile.am -@@ -18,7 +18,8 @@ INSN_TESTS = clc clcle cvb cvd icm lpr t - spechelper-cr spechelper-clr \ - spechelper-ltr spechelper-or \ - spechelper-icm-1 spechelper-icm-2 spechelper-tmll \ -- spechelper-tm laa vector lsc2 ppno vector_string vector_integer -+ spechelper-tm laa vector lsc2 ppno vector_string vector_integer \ -+ vector_float - - if BUILD_DFP_TESTS - INSN_TESTS += dfp-1 dfp-2 dfp-3 dfp-4 dfptest dfpext dfpconv srnmt pfpo -@@ -71,4 +72,4 @@ vector_CFLAGS = $(AM_CFLAGS) -march=z - lsc2_CFLAGS = -march=z13 -DS390_TESTS_NOCOLOR - vector_string_CFLAGS = $(AM_CFLAGS) -march=z13 -DS390_TEST_COUNT=5 - vector_integer_CFLAGS = $(AM_CFLAGS) -march=z13 -DS390_TEST_COUNT=4 -- -+vector_float_CFLAGS = $(AM_CFLAGS) -march=z13 -DS390_TEST_COUNT=4 -Index: valgrind-3.14.0/none/tests/s390x/vector.h -=================================================================== ---- valgrind-3.14.0.orig/none/tests/s390x/vector.h -+++ valgrind-3.14.0/none/tests/s390x/vector.h -@@ -12,17 +12,21 @@ - #endif - - /* Test the instruction exactly one time. */ --#define test_once(insn) test_##insn() -+#define test_once(insn) test_##insn () - - /* Test the instruction exactly S390_TEST_COUNT times. - "..." arguments specifies code which must be executed after each tests - */ - #define test(insn, ...) \ - for(iteration = 0; iteration < S390_TEST_COUNT; iteration++) \ -- { test_##insn(); \ -+ { test_once(insn); \ - __VA_ARGS__; \ - } - -+#define test_with_selective_printing(insn, info) \ -+ for(iteration = 0; iteration < S390_TEST_COUNT; iteration++) \ -+ { test_ ## insn ## _selective(info); } -+ - #ifdef __GNUC__ - /* GCC complains about __int128 with -pedantic */ - /* Hope that we will have int128_t in C standard someday. */ -@@ -38,18 +42,67 @@ typedef union { - - uint32_t u32[4]; - int32_t s32[4]; -+ float f32[4]; - - uint64_t u64[2]; - int64_t s64[2]; -+ double f64[2]; - - unsigned __int128 u128[1]; - __int128 s128[1]; - } V128; - -+typedef enum { -+ V128_NO_PRINTING = 0, -+ V128_V_RES_AS_INT = 1 << 0, -+ V128_V_ARG1_AS_INT = 1 << 1, -+ V128_V_ARG2_AS_INT = 1 << 2, -+ V128_V_ARG3_AS_INT = 1 << 3, -+ V128_V_RES_AS_FLOAT64 = 1 << 4, -+ V128_V_ARG1_AS_FLOAT64 = 1 << 5, -+ V128_V_ARG2_AS_FLOAT64 = 1 << 6, -+ V128_V_ARG3_AS_FLOAT64 = 1 << 7, -+ V128_V_RES_AS_FLOAT32 = 1 << 8, -+ V128_V_ARG1_AS_FLOAT32 = 1 << 9, -+ V128_V_ARG2_AS_FLOAT32 = 1 << 10, -+ V128_V_ARG3_AS_FLOAT32 = 1 << 11, -+ V128_R_RES = 1 << 12, -+ V128_R_ARG1 = 1 << 13, -+ V128_R_ARG2 = 1 << 14, -+ V128_R_ARG3 = 1 << 15, -+ V128_V_RES_EVEN_ONLY = 1 << 16, -+ V128_V_RES_ZERO_ONLY = 1 << 17, -+ V128_PRINT_ALL = (V128_V_RES_AS_INT | -+ V128_V_ARG1_AS_INT | -+ V128_V_ARG2_AS_INT | -+ V128_V_ARG3_AS_INT | -+ V128_R_RES | -+ V128_R_ARG1 | -+ V128_R_ARG2 | -+ V128_R_ARG3), -+} s390x_test_usageInfo; -+ - void print_hex(const V128 value) { - printf("%016lx | %016lx\n", value.u64[0], value.u64[1]); - } - -+void print_f32(const V128 value, int even_only, int zero_only) { -+ if (zero_only) -+ printf("%a | -- | -- | --\n", value.f32[0]); -+ else if (even_only) -+ printf("%a | -- | %a | --\n", value.f32[0], value.f32[2]); -+ else -+ printf("%a | %a | %a | %a\n", -+ value.f32[0], value.f32[1], value.f32[2], value.f32[3]); -+} -+ -+void print_f64(const V128 value, int zero_only) { -+ if (zero_only) -+ printf("%a | --\n", value.f64[0]); -+ else -+ printf("%a | %a\n", value.f64[0], value.f64[1]); -+} -+ - void print_uint64_t(const uint64_t value) { - printf("%016lx\n", value); - } -@@ -118,7 +171,7 @@ void randomize_memory_pool() - - */ - #define s390_test_generate(insn, asm_string) \ --static void test_##insn() \ -+static void test_##insn##_selective(const s390x_test_usageInfo info) \ - { \ - V128 v_result = { .u64 = {0ULL, 0ULL} }; \ - V128 v_arg1; \ -@@ -138,6 +191,7 @@ static void test_##insn() \ - "vl %%v2, %[v_arg2]\n" \ - "vl %%v3, %[v_arg3]\n" \ - "vone %%v5\n" \ -+ "srnmb 1(0)\n " \ - asm_string "\n"\ - "vst %%v5, %[v_result]\n" \ - "vst %%v1, %[v_arg1]\n" \ -@@ -162,14 +216,49 @@ static void test_##insn() \ - "v1", "v2", "v3", "v5"); \ - \ - printf("insn %s:\n", #insn); \ -- printf(" v_arg1 = "); print_hex(v_arg1); \ -- printf(" v_arg2 = "); print_hex(v_arg2); \ -- printf(" v_arg3 = "); print_hex(v_arg3); \ -- printf(" v_result = "); print_hex(v_result); \ -- printf(" r_arg1 = "); print_uint64_t(r_arg1); \ -- printf(" r_arg2 = "); print_uint64_t(r_arg2); \ -- printf(" r_arg3 = "); print_uint64_t(r_arg3); \ -- printf(" r_result = "); print_uint64_t(r_result); \ -+ if (info & V128_V_ARG1_AS_INT) \ -+ {printf(" v_arg1 = "); print_hex(v_arg1);} \ -+ if (info & V128_V_ARG2_AS_INT) \ -+ {printf(" v_arg2 = "); print_hex(v_arg2);} \ -+ if (info & V128_V_ARG3_AS_INT) \ -+ {printf(" v_arg3 = "); print_hex(v_arg3);} \ -+ if (info & V128_V_RES_AS_INT) \ -+ {printf(" v_result = "); print_hex(v_result);} \ -+ \ -+ if (info & V128_V_ARG1_AS_FLOAT64) \ -+ {printf(" v_arg1 = "); print_f64(v_arg1, 0);} \ -+ if (info & V128_V_ARG2_AS_FLOAT64) \ -+ {printf(" v_arg2 = "); print_f64(v_arg2, 0);} \ -+ if (info & V128_V_ARG3_AS_FLOAT64) \ -+ {printf(" v_arg3 = "); print_f64(v_arg3, 0);} \ -+ if (info & V128_V_RES_AS_FLOAT64) { \ -+ printf(" v_result = "); \ -+ print_f64(v_result, info & V128_V_RES_ZERO_ONLY); \ -+ } \ -+ \ -+ if (info & V128_V_ARG1_AS_FLOAT32) \ -+ {printf(" v_arg1 = "); print_f32(v_arg1, 0, 0);} \ -+ if (info & V128_V_ARG2_AS_FLOAT32) \ -+ {printf(" v_arg2 = "); print_f32(v_arg2, 0, 0);} \ -+ if (info & V128_V_ARG3_AS_FLOAT32) \ -+ {printf(" v_arg3 = "); print_f32(v_arg3, 0, 0);} \ -+ if (info & V128_V_RES_AS_FLOAT32) { \ -+ printf(" v_result = "); \ -+ print_f32(v_result, info & V128_V_RES_EVEN_ONLY, \ -+ info & V128_V_RES_ZERO_ONLY); \ -+ } \ -+ if (info & V128_R_ARG1) \ -+ {printf(" r_arg1 = "); print_uint64_t(r_arg1);} \ -+ if (info & V128_R_ARG2) \ -+ {printf(" r_arg2 = "); print_uint64_t(r_arg2);} \ -+ if (info & V128_R_ARG3) \ -+ {printf(" r_arg3 = "); print_uint64_t(r_arg3);} \ -+ if (info & V128_R_RES) \ -+ {printf(" r_result = "); print_uint64_t(r_result);} \ -+} \ -+__attribute__((unused)) static void test_##insn() \ -+{ \ -+ test_##insn##_selective (V128_PRINT_ALL); \ - } - - /* Stores CC to %[r_result]. -Index: valgrind-3.14.0/none/tests/s390x/vector_float.c -=================================================================== ---- /dev/null -+++ valgrind-3.14.0/none/tests/s390x/vector_float.c -@@ -0,0 +1,275 @@ -+#include "vector.h" -+ -+#define s390_generate_float_test(insn, asm_string) \ -+ s390_test_generate(v##insn##00, "v" #insn " " asm_string ",0, 0") \ -+ s390_test_generate(v##insn##01, "v" #insn " " asm_string ",0, 1") \ -+ s390_test_generate(v##insn##03, "v" #insn " " asm_string ",0, 3") \ -+ s390_test_generate(v##insn##04, "v" #insn " " asm_string ",0, 4") \ -+ s390_test_generate(v##insn##05, "v" #insn " " asm_string ",0, 5") \ -+ s390_test_generate(v##insn##06, "v" #insn " " asm_string ",0, 6") \ -+ s390_test_generate(v##insn##07, "v" #insn " " asm_string ",0, 7") \ -+ s390_test_generate(w##insn##00, "w" #insn " " asm_string ",0, 0") \ -+ s390_test_generate(w##insn##01, "w" #insn " " asm_string ",0, 1") \ -+ s390_test_generate(w##insn##03, "w" #insn " " asm_string ",0, 3") \ -+ s390_test_generate(w##insn##04, "w" #insn " " asm_string ",0, 4") \ -+ s390_test_generate(w##insn##05, "w" #insn " " asm_string ",0, 5") \ -+ s390_test_generate(w##insn##06, "w" #insn " " asm_string ",0, 6") \ -+ s390_test_generate(w##insn##07, "w" #insn " " asm_string ",0, 7") \ -+ -+#define s390_call_float_test(insn, info) \ -+ test_with_selective_printing(v ##insn ## 00, info); \ -+ test_with_selective_printing(v ##insn ## 01, info); \ -+ test_with_selective_printing(v ##insn ## 03, info); \ -+ test_with_selective_printing(v ##insn ## 04, info); \ -+ test_with_selective_printing(v ##insn ## 05, info); \ -+ test_with_selective_printing(v ##insn ## 06, info); \ -+ test_with_selective_printing(v ##insn ## 07, info); \ -+ test_with_selective_printing(w ##insn ## 00, info | V128_V_RES_ZERO_ONLY); \ -+ test_with_selective_printing(w ##insn ## 01, info | V128_V_RES_ZERO_ONLY); \ -+ test_with_selective_printing(w ##insn ## 03, info | V128_V_RES_ZERO_ONLY); \ -+ test_with_selective_printing(w ##insn ## 04, info | V128_V_RES_ZERO_ONLY); \ -+ test_with_selective_printing(w ##insn ## 05, info | V128_V_RES_ZERO_ONLY); \ -+ test_with_selective_printing(w ##insn ## 06, info | V128_V_RES_ZERO_ONLY); \ -+ test_with_selective_printing(w ##insn ## 07, info | V128_V_RES_ZERO_ONLY); \ -+ -+s390_generate_float_test(cdgb, " %%v5, %%v1") -+s390_generate_float_test(cdlgb, " %%v5, %%v1") -+s390_generate_float_test(cgdb, " %%v5, %%v1") -+s390_generate_float_test(clgdb, " %%v5, %%v1") -+s390_generate_float_test(fidb, " %%v5, %%v1") -+s390_generate_float_test(ledb, " %%v5, %%v1") -+ -+s390_test_generate(vldeb, "vldeb %%v5, %%v1") -+s390_test_generate(wldeb, "wldeb %%v5, %%v1") -+ -+s390_test_generate(vflcdb, "vflcdb %%v5, %%v1") -+s390_test_generate(wflcdb, "wflcdb %%v5, %%v1") -+s390_test_generate(vflndb, "vflndb %%v5, %%v1") -+s390_test_generate(wflndb, "wflndb %%v5, %%v1") -+s390_test_generate(vflpdb, "vflpdb %%v5, %%v1") -+s390_test_generate(wflpdb, "wflpdb %%v5, %%v1") -+ -+s390_test_generate(vfadb, "vfadb %%v5, %%v1, %%v2") -+s390_test_generate(wfadb, "wfadb %%v5, %%v1, %%v2") -+s390_test_generate(vfsdb, "vfsdb %%v5, %%v1, %%v2") -+s390_test_generate(wfsdb, "wfsdb %%v5, %%v1, %%v2") -+s390_test_generate(vfmdb, "vfmdb %%v5, %%v1, %%v2") -+s390_test_generate(wfmdb, "wfmdb %%v5, %%v1, %%v2") -+s390_test_generate(vfddb, "vfddb %%v5, %%v1, %%v2") -+s390_test_generate(wfddb, "wfddb %%v5, %%v1, %%v2") -+ -+s390_test_generate(vfsqdb, "vfsqdb %%v5, %%v1") -+s390_test_generate(wfsqdb, "wfsqdb %%v5, %%v1") -+ -+s390_test_generate(vfmadb, "vfmadb %%v5, %%v1, %%v2, %%v3") -+s390_test_generate(wfmadb, "wfmadb %%v5, %%v1, %%v2, %%v3") -+s390_test_generate(vfmsdb, "vfmsdb %%v5, %%v1, %%v2, %%v3") -+s390_test_generate(wfmsdb, "wfmsdb %%v5, %%v1, %%v2, %%v3") -+ -+s390_test_generate(wfcdb, "wfcdb %%v1, %%v2\n" S390_TEST_PUT_CC_TO_RESULT) -+s390_test_generate(wfkdb, "wfkdb %%v1, %%v2\n" S390_TEST_PUT_CC_TO_RESULT) -+ -+s390_test_generate(vfcedb, "vfcedb %%v5, %%v1, %%v2") -+s390_test_generate(wfcedb, "wfcedb %%v5, %%v1, %%v2") -+s390_test_generate(vfcedbs, "vfcedbs %%v5, %%v1, %%v2\n" S390_TEST_PUT_CC_TO_RESULT) -+s390_test_generate(wfcedbs, "wfcedbs %%v5, %%v1, %%v2\n" S390_TEST_PUT_CC_TO_RESULT) -+ -+s390_test_generate(vfchdb, "vfchdb %%v5, %%v1, %%v2") -+s390_test_generate(wfchdb, "wfchdb %%v5, %%v1, %%v2") -+s390_test_generate(vfchdbs, "vfchdbs %%v5, %%v1, %%v2\n" S390_TEST_PUT_CC_TO_RESULT) -+s390_test_generate(wfchdbs, "wfchdbs %%v5, %%v1, %%v2\n" S390_TEST_PUT_CC_TO_RESULT) -+ -+s390_test_generate(vfchedb, "vfchedb %%v5, %%v1, %%v2") -+s390_test_generate(wfchedb, "wfchedb %%v5, %%v1, %%v2") -+s390_test_generate(vfchedbs, "vfchedbs %%v5, %%v1, %%v2\n" S390_TEST_PUT_CC_TO_RESULT) -+s390_test_generate(wfchedbs, "wfchedbs %%v5, %%v1, %%v2\n" S390_TEST_PUT_CC_TO_RESULT) -+ -+s390_test_generate(vftcidb0, "vftcidb %%v5, %%v1, 0 \n" S390_TEST_PUT_CC_TO_RESULT) -+s390_test_generate(vftcidb1, "vftcidb %%v5, %%v1, 1 \n" S390_TEST_PUT_CC_TO_RESULT) -+s390_test_generate(vftcidb2, "vftcidb %%v5, %%v1, 2 \n" S390_TEST_PUT_CC_TO_RESULT) -+s390_test_generate(vftcidb3, "vftcidb %%v5, %%v1, 0 \n" S390_TEST_PUT_CC_TO_RESULT) -+s390_test_generate(vftcidb4, "vftcidb %%v5, %%v1, 4 \n" S390_TEST_PUT_CC_TO_RESULT) -+s390_test_generate(vftcidb8, "vftcidb %%v5, %%v1, 8 \n" S390_TEST_PUT_CC_TO_RESULT) -+s390_test_generate(vftcidb16, "vftcidb %%v5, %%v1, 16 \n" S390_TEST_PUT_CC_TO_RESULT) -+s390_test_generate(vftcidb32, "vftcidb %%v5, %%v1, 32 \n" S390_TEST_PUT_CC_TO_RESULT) -+s390_test_generate(vftcidb64, "vftcidb %%v5, %%v1, 64 \n" S390_TEST_PUT_CC_TO_RESULT) -+s390_test_generate(vftcidb128, "vftcidb %%v5, %%v1, 128 \n" S390_TEST_PUT_CC_TO_RESULT) -+s390_test_generate(vftcidb256, "vftcidb %%v5, %%v1, 256 \n" S390_TEST_PUT_CC_TO_RESULT) -+s390_test_generate(vftcidb512, "vftcidb %%v5, %%v1, 512 \n" S390_TEST_PUT_CC_TO_RESULT) -+s390_test_generate(vftcidb1024, "vftcidb %%v5, %%v1, 1024\n" S390_TEST_PUT_CC_TO_RESULT) -+s390_test_generate(vftcidb2048, "vftcidb %%v5, %%v1, 2048\n" S390_TEST_PUT_CC_TO_RESULT) -+ -+int main() -+{ -+ size_t iteration = 0; -+ -+ s390_call_float_test(cdgb, (V128_V_RES_AS_FLOAT64 | V128_V_ARG1_AS_INT)); -+ s390_call_float_test(cdlgb, (V128_V_RES_AS_FLOAT64 | V128_V_ARG1_AS_INT)); -+ s390_call_float_test(cgdb, (V128_V_RES_AS_INT | V128_V_ARG1_AS_FLOAT64)); -+ s390_call_float_test(clgdb, (V128_V_RES_AS_INT | V128_V_ARG1_AS_FLOAT64)); -+ s390_call_float_test(fidb, (V128_V_RES_AS_FLOAT64 | V128_V_ARG1_AS_FLOAT64)); -+ s390_call_float_test(ledb, (V128_V_RES_AS_FLOAT32 | V128_V_RES_EVEN_ONLY | -+ V128_V_ARG1_AS_FLOAT64)); -+ -+ test_with_selective_printing(vldeb, (V128_V_RES_AS_FLOAT64 | -+ V128_V_ARG1_AS_FLOAT64)); -+ test_with_selective_printing(wldeb, (V128_V_RES_AS_FLOAT64 | -+ V128_V_ARG1_AS_FLOAT64)); -+ -+ test_with_selective_printing(vflcdb, (V128_V_RES_AS_FLOAT64 | -+ V128_V_ARG1_AS_FLOAT64)); -+ test_with_selective_printing(wflcdb, (V128_V_RES_AS_FLOAT64 | -+ V128_V_ARG1_AS_FLOAT64)); -+ test_with_selective_printing(vflndb, (V128_V_RES_AS_FLOAT64 | -+ V128_V_ARG1_AS_FLOAT64)); -+ test_with_selective_printing(wflndb, (V128_V_RES_AS_FLOAT64 | -+ V128_V_ARG1_AS_FLOAT64)); -+ test_with_selective_printing(vflpdb, (V128_V_RES_AS_FLOAT64 | -+ V128_V_ARG1_AS_FLOAT64)); -+ test_with_selective_printing(wflpdb, (V128_V_RES_AS_FLOAT64 | -+ V128_V_ARG1_AS_FLOAT64)); -+ -+ test_with_selective_printing(vfadb, (V128_V_RES_AS_FLOAT64 | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_V_ARG2_AS_FLOAT64)); -+ test_with_selective_printing(wfadb, (V128_V_RES_AS_FLOAT64 | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_V_ARG2_AS_FLOAT64)); -+ test_with_selective_printing(vfsdb, (V128_V_RES_AS_FLOAT64 | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_V_ARG2_AS_FLOAT64)); -+ test_with_selective_printing(wfsdb, (V128_V_RES_AS_FLOAT64 | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_V_ARG2_AS_FLOAT64)); -+ test_with_selective_printing(vfmdb, (V128_V_RES_AS_FLOAT64 | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_V_ARG2_AS_FLOAT64)); -+ test_with_selective_printing(wfmdb, (V128_V_RES_AS_FLOAT64 | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_V_ARG2_AS_FLOAT64)); -+ test_with_selective_printing(vfddb, (V128_V_RES_AS_FLOAT64 | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_V_ARG2_AS_FLOAT64)); -+ test_with_selective_printing(wfddb, (V128_V_RES_AS_FLOAT64 | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_V_ARG2_AS_FLOAT64)); -+ -+ test_with_selective_printing(vfsqdb, (V128_V_RES_AS_FLOAT64 | -+ V128_V_ARG1_AS_FLOAT64)); -+ test_with_selective_printing(wfsqdb, (V128_V_RES_AS_FLOAT64 | -+ V128_V_ARG1_AS_FLOAT64)); -+ -+ test_with_selective_printing(vfmadb, (V128_V_RES_AS_FLOAT64 | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_V_ARG2_AS_FLOAT64 | -+ V128_V_ARG3_AS_FLOAT64)); -+ test_with_selective_printing(wfmadb, (V128_V_RES_AS_FLOAT64 | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_V_ARG2_AS_FLOAT64 | -+ V128_V_ARG3_AS_FLOAT64)); -+ test_with_selective_printing(vfmsdb, (V128_V_RES_AS_FLOAT64 | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_V_ARG2_AS_FLOAT64 | -+ V128_V_ARG3_AS_FLOAT64)); -+ test_with_selective_printing(wfmsdb, (V128_V_RES_AS_FLOAT64 | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_V_ARG2_AS_FLOAT64 | -+ V128_V_ARG3_AS_FLOAT64)); -+ -+ test_with_selective_printing(wfcdb, (V128_V_ARG1_AS_FLOAT64 | -+ V128_V_ARG2_AS_FLOAT64 | -+ V128_R_RES)); -+ test_with_selective_printing(wfkdb, (V128_V_ARG1_AS_FLOAT64 | -+ V128_V_ARG2_AS_FLOAT64 | -+ V128_R_RES)); -+ -+ test_with_selective_printing(vfcedb, (V128_V_RES_AS_INT | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_V_ARG2_AS_FLOAT64)); -+ test_with_selective_printing(wfcedb, (V128_V_RES_AS_INT | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_V_ARG2_AS_FLOAT64)); -+ test_with_selective_printing(vfcedbs, (V128_V_RES_AS_INT | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_V_ARG2_AS_FLOAT64 | -+ V128_R_RES)); -+ test_with_selective_printing(wfcedbs, (V128_V_RES_AS_INT | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_V_ARG2_AS_FLOAT64 | -+ V128_R_RES)); -+ -+ test_with_selective_printing(vfchdb, (V128_V_RES_AS_INT | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_V_ARG2_AS_FLOAT64)); -+ test_with_selective_printing(wfchdb, (V128_V_RES_AS_INT | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_V_ARG2_AS_FLOAT64)); -+ test_with_selective_printing(vfchdbs, (V128_V_RES_AS_INT | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_V_ARG2_AS_FLOAT64 | -+ V128_R_RES)); -+ test_with_selective_printing(wfchdbs, (V128_V_RES_AS_INT | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_V_ARG2_AS_FLOAT64 | -+ V128_R_RES)); -+ -+ test_with_selective_printing(vfchedb, (V128_V_RES_AS_INT | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_V_ARG2_AS_FLOAT64)); -+ test_with_selective_printing(wfchedb, (V128_V_RES_AS_INT | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_V_ARG2_AS_FLOAT64)); -+ test_with_selective_printing(vfchedbs, (V128_V_RES_AS_INT | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_V_ARG2_AS_FLOAT64 | -+ V128_R_RES)); -+ test_with_selective_printing(wfchedbs, (V128_V_RES_AS_INT | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_V_ARG2_AS_FLOAT64 | -+ V128_R_RES)); -+ -+ test_with_selective_printing(vftcidb0, (V128_V_RES_AS_INT | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_R_RES)); -+ test_with_selective_printing(vftcidb1, (V128_V_RES_AS_INT | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_R_RES)); -+ test_with_selective_printing(vftcidb2, (V128_V_RES_AS_INT | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_R_RES)); -+ test_with_selective_printing(vftcidb3, (V128_V_RES_AS_INT | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_R_RES)); -+ test_with_selective_printing(vftcidb4, (V128_V_RES_AS_INT | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_R_RES)); -+ test_with_selective_printing(vftcidb8, (V128_V_RES_AS_INT | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_R_RES)); -+ test_with_selective_printing(vftcidb16, (V128_V_RES_AS_INT | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_R_RES)); -+ test_with_selective_printing(vftcidb32, (V128_V_RES_AS_INT | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_R_RES)); -+ test_with_selective_printing(vftcidb64, (V128_V_RES_AS_INT | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_R_RES)); -+ test_with_selective_printing(vftcidb128, (V128_V_RES_AS_INT | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_R_RES)); -+ test_with_selective_printing(vftcidb256, (V128_V_RES_AS_INT | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_R_RES)); -+ test_with_selective_printing(vftcidb512, (V128_V_RES_AS_INT | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_R_RES)); -+ test_with_selective_printing(vftcidb1024, (V128_V_RES_AS_INT | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_R_RES)); -+ test_with_selective_printing(vftcidb2048, (V128_V_RES_AS_INT | -+ V128_V_ARG1_AS_FLOAT64 | -+ V128_R_RES)); -+ -+ return 0; -+} -Index: valgrind-3.14.0/none/tests/s390x/vector_float.stderr.exp -=================================================================== ---- /dev/null -+++ valgrind-3.14.0/none/tests/s390x/vector_float.stderr.exp -@@ -0,0 +1,2 @@ -+ -+ -Index: valgrind-3.14.0/none/tests/s390x/vector_float.stdout.exp -=================================================================== ---- /dev/null -+++ valgrind-3.14.0/none/tests/s390x/vector_float.stdout.exp -@@ -0,0 +1,1808 @@ -+insn vcdgb00: -+ v_arg1 = 0d6a95fac528657d | 501eefeec0d8b847 -+ v_result = 0x1.ad52bf58a50cap+59 | 0x1.407bbfbb0362ep+62 -+insn vcdgb00: -+ v_arg1 = e540bc6839c44b4a | 36ed3550df9899d8 -+ v_result = -0x1.abf4397c63bb4p+60 | 0x1.b769aa86fcc4cp+61 -+insn vcdgb00: -+ v_arg1 = 979569ee6d5cbcd8 | 966cf73d98a42d54 -+ v_result = -0x1.a1aa58464a8dp+62 | -0x1.a64c23099d6f4p+62 -+insn vcdgb00: -+ v_arg1 = 10985cc9e2b9c255 | b2683bbf21432695 -+ v_result = 0x1.0985cc9e2b9c2p+60 | -0x1.365f11037af36p+62 -+insn vcdgb01: -+ v_arg1 = 4208cb757c0f3e0a | 91fe3de1d5e7ca54 -+ v_result = 0x1.08232dd5f03dp+62 | -0x1.b8070878a860dp+62 -+insn vcdgb01: -+ v_arg1 = e5f1216d47c3a621 | c1582e6bf6f3b5e9 -+ v_result = -0x1.a0ede92b83c5ap+60 | -0x1.f53e8ca048625p+61 -+insn vcdgb01: -+ v_arg1 = 376fbfe93425c861 | 1870f7a36a759b08 -+ v_result = 0x1.bb7dff49a12e4p+61 | 0x1.870f7a36a759bp+60 -+insn vcdgb01: -+ v_arg1 = bc68bf9dda3685ee | 6fcaf40c7feb0484 -+ v_result = -0x1.0e5d01889725fp+62 | 0x1.bf2bd031ffac1p+62 -+insn vcdgb03: -+ v_arg1 = ff55ac7f3661970c | 663cba29a8010f0e -+ v_result = -0x1.54a701933cd1fp+55 | 0x1.98f2e8a6a0043p+62 -+insn vcdgb03: -+ v_arg1 = 50f94b806c444cdc | 23a9d13a3e4f30f5 -+ v_result = 0x1.43e52e01b1113p+62 | 0x1.1d4e89d1f2799p+61 -+insn vcdgb03: -+ v_arg1 = 8526565084674a1c | 13c07bfc401df2e6 -+ v_result = -0x1.eb66a6bdee62dp+62 | 0x1.3c07bfc401df3p+60 -+insn vcdgb03: -+ v_arg1 = bb7d3d1d2e024aea | a9bf6c6c1422b7ac -+ v_result = -0x1.120b0b8b47f6dp+62 | -0x1.59024e4faf753p+62 -+insn vcdgb04: -+ v_arg1 = 122de4537ebadd80 | 1b359083443f73f0 -+ v_result = 0x1.22de4537ebadep+60 | 0x1.b359083443f74p+60 -+insn vcdgb04: -+ v_arg1 = 74b2685cb1632af8 | 28bac9f9424875f9 -+ v_result = 0x1.d2c9a172c58cbp+62 | 0x1.45d64fca1243bp+61 -+insn vcdgb04: -+ v_arg1 = 4f96da5fe8beae08 | d5b8af0426ba1f6b -+ v_result = 0x1.3e5b697fa2facp+62 | -0x1.523a87deca2fp+61 -+insn vcdgb04: -+ v_arg1 = 57330304e93afcc5 | 2c244e196b83aa0a -+ v_result = 0x1.5ccc0c13a4ebfp+62 | 0x1.612270cb5c1d5p+61 -+insn vcdgb05: -+ v_arg1 = 466d1f2de1b67b62 | fc44eca9b6c0e377 -+ v_result = 0x1.19b47cb786d9ep+62 | -0x1.dd89ab249f8e4p+57 -+insn vcdgb05: -+ v_arg1 = 9c7aa2bc253b2bf0 | 9c69c1e38f79f1f0 -+ v_result = -0x1.8e15750f6b135p+62 | -0x1.8e58f871c2183p+62 -+insn vcdgb05: -+ v_arg1 = 609cf752ecc5611e | a9b4be7727660d13 -+ v_result = 0x1.8273dd4bb3158p+62 | -0x1.592d06236267cp+62 -+insn vcdgb05: -+ v_arg1 = dde43c0d17fa87f9 | c4d4485011ac499a -+ v_result = -0x1.10de1f97402bcp+61 | -0x1.d95dbd7f729dbp+61 -+insn vcdgb06: -+ v_arg1 = 67f00848ebf0ddad | 55c5fa58099e4a1e -+ v_result = 0x1.9fc02123afc38p+62 | 0x1.5717e96026793p+62 -+insn vcdgb06: -+ v_arg1 = 14ac275ed2ea3c41 | 4c916736b17f0fd7 -+ v_result = 0x1.4ac275ed2ea3dp+60 | 0x1.32459cdac5fc4p+62 -+insn vcdgb06: -+ v_arg1 = 841359651e19ce5c | db11d6114f3da959 -+ v_result = -0x1.efb29a6b8798cp+62 | -0x1.27714f758612bp+61 -+insn vcdgb06: -+ v_arg1 = 9aee16f6c65ed705 | 3dab044d91370057 -+ v_result = -0x1.9447a424e684ap+62 | 0x1.ed58226c89b81p+61 -+insn vcdgb07: -+ v_arg1 = 41924de22705705d | 7314e64c4af69562 -+ v_result = 0x1.064937889c15cp+62 | 0x1.cc5399312bda5p+62 -+insn vcdgb07: -+ v_arg1 = 28a421fcc48a4766 | 020e652d33f63ba9 -+ v_result = 0x1.45210fe624523p+61 | 0x1.07329699fb1ddp+57 -+insn vcdgb07: -+ v_arg1 = 87d7abd5085662be | b72a218eab5dddb9 -+ v_result = -0x1.e0a150abdea68p+62 | -0x1.235779c552889p+62 -+insn vcdgb07: -+ v_arg1 = d9abbb790081d963 | 63852f4c78c03c3d -+ v_result = -0x1.32a22437fbf14p+61 | 0x1.8e14bd31e300fp+62 -+insn wcdgb00: -+ v_arg1 = a02f983522909f6f | a08ddc4185e4afbe -+ v_result = -0x1.7f419f2b75bd8p+62 | -- -+insn wcdgb00: -+ v_arg1 = 24bfbc5409373bdb | 8bbc6803a279e263 -+ v_result = 0x1.25fde2a049b9dp+61 | -- -+insn wcdgb00: -+ v_arg1 = 35c59adc3617873f | 895bccaa47e097b0 -+ v_result = 0x1.ae2cd6e1b0bc3p+61 | -- -+insn wcdgb00: -+ v_arg1 = e5795953d180798f | 033f758952e56949 -+ v_result = -0x1.a86a6ac2e7f86p+60 | -- -+insn wcdgb01: -+ v_arg1 = 50a3967f672fd7de | 2a8d07f3c58484af -+ v_result = 0x1.428e59fd9cbf6p+62 | -- -+insn wcdgb01: -+ v_arg1 = 55572620ab0f011d | b4781cf689a66f00 -+ v_result = 0x1.555c9882ac3cp+62 | -- -+insn wcdgb01: -+ v_arg1 = 5ab7d2b735faacdb | 9d0003212fe3c3b9 -+ v_result = 0x1.6adf4adcd7eabp+62 | -- -+insn wcdgb01: -+ v_arg1 = 0cb41a414677a106 | e7b48241aa40f176 -+ v_result = 0x1.96834828cef42p+59 | -- -+insn wcdgb03: -+ v_arg1 = 1dcbf3fa837c83a7 | 5c6f941e16f101b0 -+ v_result = 0x1.dcbf3fa837c83p+60 | -- -+insn wcdgb03: -+ v_arg1 = 05ca8a1db62c87a8 | 471d2d4175174e7c -+ v_result = 0x1.72a2876d8b21fp+58 | -- -+insn wcdgb03: -+ v_arg1 = c28bffa291993a8f | 3f76f2af6e814c51 -+ v_result = -0x1.eba002eb73363p+61 | -- -+insn wcdgb03: -+ v_arg1 = 99b62bfd6b813f43 | ddc001ae0d6e42c1 -+ v_result = -0x1.9927500a51fb1p+62 | -- -+insn wcdgb04: -+ v_arg1 = d3825be401140fc5 | 818fb07e8648113d -+ v_result = -0x1.63ed20dff75f8p+61 | -- -+insn wcdgb04: -+ v_arg1 = 8273130837abb8f7 | 1287461ff268ecd4 -+ v_result = -0x1.f633b3df21512p+62 | -- -+insn wcdgb04: -+ v_arg1 = 3a1ccdd9d5909f57 | bc17c41010d81ef3 -+ v_result = 0x1.d0e66eceac85p+61 | -- -+insn wcdgb04: -+ v_arg1 = d8ddb8444bbc3ec3 | b03fa00d060ac825 -+ v_result = -0x1.39123ddda21e1p+61 | -- -+insn wcdgb05: -+ v_arg1 = 3fa47a776e92e735 | e74a85ce1fa4a0d3 -+ v_result = 0x1.fd23d3bb74973p+61 | -- -+insn wcdgb05: -+ v_arg1 = 16aeee9b39a78086 | e09214ce8b37b404 -+ v_result = 0x1.6aeee9b39a78p+60 | -- -+insn wcdgb05: -+ v_arg1 = 8c46e7988e7d462e | 5e41a7002202251c -+ v_result = -0x1.cee4619dc60aep+62 | -- -+insn wcdgb05: -+ v_arg1 = 1584ecd3f3428b01 | 2c0d099a22b2ed9f -+ v_result = 0x1.584ecd3f3428bp+60 | -- -+insn wcdgb06: -+ v_arg1 = 2b0dfbf1569378f2 | d9fa40cced239bee -+ v_result = 0x1.586fdf8ab49bdp+61 | -- -+insn wcdgb06: -+ v_arg1 = 0fd84793ca3eccd2 | 7d1b4488cd1e1207 -+ v_result = 0x1.fb08f27947d9ap+59 | -- -+insn wcdgb06: -+ v_arg1 = 86e6fb1a47fa9c10 | 7350c53bb01b4e47 -+ v_result = -0x1.e4641396e0158p+62 | -- -+insn wcdgb06: -+ v_arg1 = 9c07f5646f2f1179 | 1d07e991ed001f2a -+ v_result = -0x1.8fe02a6e4343bp+62 | -- -+insn wcdgb07: -+ v_arg1 = 659a8c8c44b32df8 | a3fd0c33fddfed09 -+ v_result = 0x1.966a323112ccbp+62 | -- -+insn wcdgb07: -+ v_arg1 = b84c4aadf38a8756 | b5fd808b43ba73d9 -+ v_result = -0x1.1eced54831d5fp+62 | -- -+insn wcdgb07: -+ v_arg1 = f2d6b39d8ea40bfa | 459e4b7dc64184f1 -+ v_result = -0x1.a5298c4e2b7e9p+59 | -- -+insn wcdgb07: -+ v_arg1 = bac2fdb4caa1bca9 | 4f08ec2df290cac3 -+ v_result = -0x1.14f4092cd5791p+62 | -- -+insn vcdlgb00: -+ v_arg1 = b826d785c58e7345 | 91ae17bf5bf582a0 -+ v_result = 0x1.704daf0b8b1cep+63 | 0x1.235c2f7eb7ebp+63 -+insn vcdlgb00: -+ v_arg1 = 5c6623a3c3a79e8f | 541375117aa74277 -+ v_result = 0x1.71988e8f0e9e7p+62 | 0x1.504dd445ea9dp+62 -+insn vcdlgb00: -+ v_arg1 = 9ef4bc5cec1602e7 | 228965816f8eb495 -+ v_result = 0x1.3de978b9d82cp+63 | 0x1.144b2c0b7c75ap+61 -+insn vcdlgb00: -+ v_arg1 = b912318010b2790a | 8eecbeacbe005865 -+ v_result = 0x1.722463002164fp+63 | 0x1.1dd97d597c00bp+63 -+insn vcdlgb01: -+ v_arg1 = f08d891964bfb5d2 | f0698b2c12804730 -+ v_result = 0x1.e11b1232c97f7p+63 | 0x1.e0d3165825009p+63 -+insn vcdlgb01: -+ v_arg1 = 4982fe3244b3fcf9 | 263cce57fe80ebdd -+ v_result = 0x1.260bf8c912cffp+62 | 0x1.31e672bff4076p+61 -+insn vcdlgb01: -+ v_arg1 = 551bc293efedead4 | 556b3f05b71fc8b0 -+ v_result = 0x1.546f0a4fbfb7bp+62 | 0x1.55acfc16dc7f2p+62 -+insn vcdlgb01: -+ v_arg1 = e751bd824f7e331a | a68f0b49dcea370d -+ v_result = 0x1.cea37b049efc6p+63 | 0x1.4d1e1693b9d47p+63 -+insn vcdlgb03: -+ v_arg1 = d8ab4e82afe45f9d | 0a8b96352f9d2734 -+ v_result = 0x1.b1569d055fc8bp+63 | 0x1.5172c6a5f3a4fp+59 -+insn vcdlgb03: -+ v_arg1 = cafc061682c88d0e | f751399a5ae2db05 -+ v_result = 0x1.95f80c2d05911p+63 | 0x1.eea27334b5c5bp+63 -+insn vcdlgb03: -+ v_arg1 = e328717e23c531bd | 2aa205c4ab0fafbd -+ v_result = 0x1.c650e2fc478a7p+63 | 0x1.55102e25587d7p+61 -+insn vcdlgb03: -+ v_arg1 = 8eddcd779023d755 | 63cd7e40d9ebd3b6 -+ v_result = 0x1.1dbb9aef2047bp+63 | 0x1.8f35f90367af5p+62 -+insn vcdlgb04: -+ v_arg1 = 3e5cd1fd2f96dea2 | 2d6e6298be680e29 -+ v_result = 0x1.f2e68fe97cb6fp+61 | 0x1.6b7314c5f3407p+61 -+insn vcdlgb04: -+ v_arg1 = 2c31690b8a033d4d | 943061141b697dee -+ v_result = 0x1.618b485c5019fp+61 | 0x1.2860c22836d3p+63 -+insn vcdlgb04: -+ v_arg1 = 14f57558143a429c | ed8ae27a577c5238 -+ v_result = 0x1.4f57558143a43p+60 | 0x1.db15c4f4aef8ap+63 -+insn vcdlgb04: -+ v_arg1 = fc128d1be2bb4f36 | 9283c5cd409f975c -+ v_result = 0x1.f8251a37c576ap+63 | 0x1.25078b9a813f3p+63 -+insn vcdlgb05: -+ v_arg1 = ee7dc0c772749ddc | a3701c10cafde98a -+ v_result = 0x1.dcfb818ee4e93p+63 | 0x1.46e0382195fbdp+63 -+insn vcdlgb05: -+ v_arg1 = b97c51cd687ff92f | c7b3f102ccb03d91 -+ v_result = 0x1.72f8a39ad0fffp+63 | 0x1.8f67e20599607p+63 -+insn vcdlgb05: -+ v_arg1 = b460795f4de78a6f | ea7d04e2c6809f9e -+ v_result = 0x1.68c0f2be9bcf1p+63 | 0x1.d4fa09c58d013p+63 -+insn vcdlgb05: -+ v_arg1 = 7c4a292a4f638939 | fd8c8a2c9fa1effc -+ v_result = 0x1.f128a4a93d8e2p+62 | 0x1.fb1914593f43dp+63 -+insn vcdlgb06: -+ v_arg1 = b2e9c51a04180847 | baecf0585f77a3d4 -+ v_result = 0x1.65d38a3408302p+63 | 0x1.75d9e0b0beef5p+63 -+insn vcdlgb06: -+ v_arg1 = be39eb18285aad32 | 5eb896a0fa5488ed -+ v_result = 0x1.7c73d63050b56p+63 | 0x1.7ae25a83e9523p+62 -+insn vcdlgb06: -+ v_arg1 = 8f442ace5a6a7432 | 6dd995ba0537816b -+ v_result = 0x1.1e88559cb4d4fp+63 | 0x1.b76656e814de1p+62 -+insn vcdlgb06: -+ v_arg1 = 5ae3cc60e43771db | 72c47a987f8e4792 -+ v_result = 0x1.6b8f318390dddp+62 | 0x1.cb11ea61fe392p+62 -+insn vcdlgb07: -+ v_arg1 = 577c8e33711f8ce0 | bc3f092e8bf32882 -+ v_result = 0x1.5df238cdc47e3p+62 | 0x1.787e125d17e65p+63 -+insn vcdlgb07: -+ v_arg1 = 88c462a8d4ae43d2 | 231bfc2b30f1c9fb -+ v_result = 0x1.1188c551a95c8p+63 | 0x1.18dfe159878e4p+61 -+insn vcdlgb07: -+ v_arg1 = 727d35e1c85c6ce0 | c2f9c2bc20bfe51a -+ v_result = 0x1.c9f4d7872171bp+62 | 0x1.85f38578417fcp+63 -+insn vcdlgb07: -+ v_arg1 = e238a379ac52f197 | bb08414f6f020c19 -+ v_result = 0x1.c47146f358a5ep+63 | 0x1.7610829ede041p+63 -+insn wcdlgb00: -+ v_arg1 = a912c54e442593a2 | f7c3954d578d6511 -+ v_result = 0x1.52258a9c884b2p+63 | -- -+insn wcdlgb00: -+ v_arg1 = 6179e4397b98a98a | e4b6cfddfb236dba -+ v_result = 0x1.85e790e5ee62ap+62 | -- -+insn wcdlgb00: -+ v_arg1 = 27e744d3235cdf76 | 3539b7a62232b627 -+ v_result = 0x1.3f3a26991ae6fp+61 | -- -+insn wcdlgb00: -+ v_arg1 = 60a5da31b4d1f8ea | a6328b8cf898a98d -+ v_result = 0x1.829768c6d347ep+62 | -- -+insn wcdlgb01: -+ v_arg1 = 758817a709c58c8a | b6d6be70d26145fc -+ v_result = 0x1.d6205e9c27163p+62 | -- -+insn wcdlgb01: -+ v_arg1 = 97b59c872733cad7 | 6c67baf3e785de23 -+ v_result = 0x1.2f6b390e4e679p+63 | -- -+insn wcdlgb01: -+ v_arg1 = 7c5f03e2f70438ef | 13f5a03218ade00f -+ v_result = 0x1.f17c0f8bdc10ep+62 | -- -+insn wcdlgb01: -+ v_arg1 = 20869d4407d06f50 | fe20038aa9ed8aeb -+ v_result = 0x1.0434ea203e838p+61 | -- -+insn wcdlgb03: -+ v_arg1 = 85b92f7a4d9ce094 | 45d3b155068ab4c0 -+ v_result = 0x1.0b725ef49b39dp+63 | -- -+insn wcdlgb03: -+ v_arg1 = 74d3b54ee59c9334 | 87096ba97fb48a34 -+ v_result = 0x1.d34ed53b96725p+62 | -- -+insn wcdlgb03: -+ v_arg1 = 3bc02048cff1e348 | a78aa81e0d4c504e -+ v_result = 0x1.de0102467f8f1p+61 | -- -+insn wcdlgb03: -+ v_arg1 = 6e38186eb26b4443 | 8fad57870c9d1c2e -+ v_result = 0x1.b8e061bac9ad1p+62 | -- -+insn wcdlgb04: -+ v_arg1 = a781bb039c46fdba | f0169ab6ff259fd8 -+ v_result = 0x1.4f037607388ep+63 | -- -+insn wcdlgb04: -+ v_arg1 = 462f5c4ac0efef1d | 01788c3b504cdde9 -+ v_result = 0x1.18bd712b03bfcp+62 | -- -+insn wcdlgb04: -+ v_arg1 = 32e6464337bf4d7c | 3c53fd240e2af05e -+ v_result = 0x1.97323219bdfa7p+61 | -- -+insn wcdlgb04: -+ v_arg1 = 9615776bc1bd6242 | 25b531bdae44ca53 -+ v_result = 0x1.2c2aeed7837acp+63 | -- -+insn wcdlgb05: -+ v_arg1 = a6bc667e825f4ffb | 04fca550cb4ef1c0 -+ v_result = 0x1.4d78ccfd04be9p+63 | -- -+insn wcdlgb05: -+ v_arg1 = 5826bd37c548ca0f | a690cbe5e6e9423d -+ v_result = 0x1.609af4df15232p+62 | -- -+insn wcdlgb05: -+ v_arg1 = 2cad200dbc09e187 | 20acc9022764afbe -+ v_result = 0x1.6569006de04fp+61 | -- -+insn wcdlgb05: -+ v_arg1 = e57be5f73fe3b5c6 | 8c153e6a1a7d0156 -+ v_result = 0x1.caf7cbee7fc76p+63 | -- -+insn wcdlgb06: -+ v_arg1 = 4e46db2789824050 | cbdffee0732097f5 -+ v_result = 0x1.391b6c9e26091p+62 | -- -+insn wcdlgb06: -+ v_arg1 = f61204d100c21186 | 422ed2e3cc26252c -+ v_result = 0x1.ec2409a201843p+63 | -- -+insn wcdlgb06: -+ v_arg1 = f5f25be4ea6d0b66 | 9ef13972631676e7 -+ v_result = 0x1.ebe4b7c9d4da2p+63 | -- -+insn wcdlgb06: -+ v_arg1 = a5c590ce39f92a4e | 90a72ac9dde52c31 -+ v_result = 0x1.4b8b219c73f26p+63 | -- -+insn wcdlgb07: -+ v_arg1 = 6afcc73a404c3eb8 | 921dd02006b87bf3 -+ v_result = 0x1.abf31ce90130fp+62 | -- -+insn wcdlgb07: -+ v_arg1 = 6c515dd47c7aaffd | a12d4e718fa0f2b3 -+ v_result = 0x1.b1457751f1eabp+62 | -- -+insn wcdlgb07: -+ v_arg1 = 598fa3024d843814 | 027f7932ce5b3358 -+ v_result = 0x1.663e8c093610ep+62 | -- -+insn wcdlgb07: -+ v_arg1 = 2450a2abba1aac53 | fe49a1158218b7e3 -+ v_result = 0x1.2285155dd0d56p+61 | -- -+insn vcgdb00: -+ v_result = 8000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.9d6f33159b52cp+140 | -0x1.149ce8e328c35p-414 -+insn vcgdb00: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = 0x1.ef4fc458c90fp-924 | -0x1.9eacbbaf216cep-761 -+insn vcgdb00: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = 0x1.2a4a56fedd38ep-441 | -0x1.0b5fc7650d28ap-628 -+insn vcgdb00: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.7484ccf632853p-296 | -0x1.64f8b96b20e65p-498 -+insn vcgdb01: -+ v_result = 0000000000000000 | 7fffffffffffffff -+ v_arg1 = 0x1.9b48ee9440faap-186 | 0x1.793a417aab337p+274 -+insn vcgdb01: -+ v_result = 0000000000000000 | 8000000000000000 -+ v_arg1 = 0x1.5f4046914a1dcp-748 | -0x1.e542ddabafc78p+412 -+insn vcgdb01: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = 0x1.70a07df4248dp-475 | -0x1.2198d65113dfcp-305 -+insn vcgdb01: -+ v_result = 0000000000000000 | 7fffffffffffffff -+ v_arg1 = -0x1.5ae6c84f089cap-838 | 0x1.bdf68a54e9eb5p+67 -+insn vcgdb03: -+ v_result = 7fffffffffffffff | 8000000000000000 -+ v_arg1 = 0x1.80d47f3abbb2ep+908 | -0x1.cdb5faf3bde76p+537 -+insn vcgdb03: -+ v_result = 8000000000000000 | 7fffffffffffffff -+ v_arg1 = -0x1.38aaaf12dcd3cp+378 | 0x1.836d37a9211adp+161 -+insn vcgdb03: -+ v_result = 0000000000000001 | ffffffffffffffff -+ v_arg1 = 0x1.88165272004d5p-526 | -0x1.0d0a1a7ba6227p-856 -+insn vcgdb03: -+ v_result = 0000000000000001 | ffffffffffffffff -+ v_arg1 = 0x1.8ffc7e4ddbb33p-831 | -0x1.2ffe63a89d2cfp-189 -+insn vcgdb04: -+ v_result = 7fffffffffffffff | 0000000000000000 -+ v_arg1 = 0x1.28c5adc2722b3p+540 | -0x1.b4dbb5f02f86ep-483 -+insn vcgdb04: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.2e2a9ecf4008dp-420 | -0x1.43ef92717c06ap-301 -+insn vcgdb04: -+ v_result = 8000000000000000 | 7fffffffffffffff -+ v_arg1 = -0x1.3b4fcd4237299p+636 | 0x1.707f549662d89p+1004 -+insn vcgdb04: -+ v_result = 7fffffffffffffff | 0000000000000000 -+ v_arg1 = 0x1.c6918fb45aa0bp+947 | -0x1.95943e2ff17aep-22 -+insn vcgdb05: -+ v_result = 0000000000000000 | 8000000000000000 -+ v_arg1 = -0x1.4de033057b236p-61 | -0x1.01575361bed9ap+468 -+insn vcgdb05: -+ v_result = 8000000000000000 | 8000000000000000 -+ v_arg1 = -0x1.028bc6484274bp+144 | -0x1.d16db6de475aap+271 -+insn vcgdb05: -+ v_result = 7fffffffffffffff | 8000000000000000 -+ v_arg1 = 0x1.2500671e7fe19p+128 | -0x1.1eb435732889ep+338 -+insn vcgdb05: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = 0x1.b161dd74543cdp-442 | 0x1.b9ab9294bd84fp-297 -+insn vcgdb06: -+ v_result = 7fffffffffffffff | 8000000000000000 -+ v_arg1 = 0x1.9b07d7ad5d6b2p+319 | -0x1.75e473ea1aa76p+514 -+insn vcgdb06: -+ v_result = 0000000000000000 | 7fffffffffffffff -+ v_arg1 = -0x1.888a166fb2dfp-837 | 0x1.f6bb5d7969d6ap+996 -+insn vcgdb06: -+ v_result = 0000000000000001 | 8000000000000000 -+ v_arg1 = 0x1.302c08b07155p-868 | -0x1.ca648dc3a61e1p+414 -+insn vcgdb06: -+ v_result = 7fffffffffffffff | 8000000000000000 -+ v_arg1 = 0x1.3349182f971f5p+336 | -0x1.46e859a0a81adp+216 -+insn vcgdb07: -+ v_result = 8000000000000000 | 8000000000000000 -+ v_arg1 = -0x1.dac06473efa23p+846 | -0x1.c56ee83b11b7fp+926 -+insn vcgdb07: -+ v_result = 0000000000000000 | ffffffffffffffff -+ v_arg1 = 0x1.72e13fd73fefbp-108 | -0x1.6e8c2f2c9a3a6p-960 -+insn vcgdb07: -+ v_result = 8000000000000000 | 8000000000000000 -+ v_arg1 = -0x1.27466ae20223bp+958 | -0x1.365c0e59aa4cep+392 -+insn vcgdb07: -+ v_result = 7fffffffffffffff | 7fffffffffffffff -+ v_arg1 = 0x1.fed2f087c21p+341 | 0x1.180e4c1d87fc4p+682 -+insn wcgdb00: -+ v_result = 7fffffffffffffff | 0000000000000000 -+ v_arg1 = 0x1.d7fd9222e8b86p+670 | 0x1.c272612672a3p+798 -+insn wcgdb00: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = 0x1.745cd360987e5p-496 | -0x1.f3b404919f358p-321 -+insn wcgdb00: -+ v_result = 8000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.9523565cd92d5p+643 | 0x1.253677d6d3be2p-556 -+insn wcgdb00: -+ v_result = 7fffffffffffffff | 0000000000000000 -+ v_arg1 = 0x1.b6eb576ec3e6ap+845 | -0x1.c7e102c503d91p+266 -+insn wcgdb01: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.3d4319841f4d6p-1011 | -0x1.2feabf7dfc506p-680 -+insn wcgdb01: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.6fb8d1cd8b32cp-843 | -0x1.50f6a6922f97ep+33 -+insn wcgdb01: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.64a673daccf1ap-566 | -0x1.69ef9b1d01499p+824 -+insn wcgdb01: -+ v_result = 8000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.3e2ddd862b4adp+1005 | -0x1.312466410271p+184 -+insn wcgdb03: -+ v_result = 0000000000000001 | 0000000000000000 -+ v_arg1 = 0x1.d594c3412a11p-953 | -0x1.a07393d34d77cp-224 -+insn wcgdb03: -+ v_result = 8000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.f7a0dbcfd6e4cp+104 | -0x1.40f7cde7f2214p-702 -+insn wcgdb03: -+ v_result = 8000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.40739c1574808p+560 | -0x1.970328ddf1b6ep-374 -+insn wcgdb03: -+ v_result = 0000000000000001 | 0000000000000000 -+ v_arg1 = 0x1.477653afd7048p-38 | 0x1.1eac2f8b2a93cp-384 -+insn wcgdb04: -+ v_result = ffffffffe9479a7d | 0000000000000000 -+ v_arg1 = -0x1.6b865833eff3p+28 | 0x1.06e8cf1834d0ep-722 -+insn wcgdb04: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = 0x1.eef0b2294a5cp-544 | -0x1.8e8b133ccda15p+752 -+insn wcgdb04: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.f34e77e6b6698p-894 | -0x1.9f7ce1cb53bddp-896 -+insn wcgdb04: -+ v_result = 7fffffffffffffff | 0000000000000000 -+ v_arg1 = 0x1.95707a6d75db5p+1018 | -0x1.3b0c072d23011p-224 -+insn wcgdb05: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.a9fb71160793p-968 | 0x1.05f601fe8123ap-986 -+insn wcgdb05: -+ v_result = 8000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.0864159b94305p+451 | -0x1.d4647f5a78b7ep-599 -+insn wcgdb05: -+ v_result = 7fffffffffffffff | 0000000000000000 -+ v_arg1 = 0x1.37eadff8397c8p+432 | -0x1.15d896b6f6063p+464 -+insn wcgdb05: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = 0x1.eb0812b0d677p-781 | 0x1.3117c5e0e288cp-202 -+insn wcgdb06: -+ v_result = 0000000000000001 | 0000000000000000 -+ v_arg1 = 0x1.6b88069167c0fp-662 | -0x1.70571d27e1279p+254 -+insn wcgdb06: -+ v_result = 7fffffffffffffff | 0000000000000000 -+ v_arg1 = 0x1.f6a6d6e883596p+260 | 0x1.0d578afaaa34ap+604 -+insn wcgdb06: -+ v_result = 0000000000000001 | 0000000000000000 -+ v_arg1 = 0x1.d91c7d13c4694p-475 | -0x1.ecf1f8529767bp+830 -+insn wcgdb06: -+ v_result = 0000000000000001 | 0000000000000000 -+ v_arg1 = 0x1.fac8dd3bb7af6p-101 | 0x1.fb8324a00fba8p+959 -+insn wcgdb07: -+ v_result = 7fffffffffffffff | 0000000000000000 -+ v_arg1 = 0x1.4b0fa18fa73c7p+111 | -0x1.08e7b17633a49p+61 -+insn wcgdb07: -+ v_result = e636b693e39a1100 | 0000000000000000 -+ v_arg1 = -0x1.9c9496c1c65efp+60 | 0x1.c4182ee728d76p-572 -+insn wcgdb07: -+ v_result = ffffffffffffffff | 0000000000000000 -+ v_arg1 = -0x1.819718032dff7p-303 | 0x1.a784c77ff6aa2p-622 -+insn wcgdb07: -+ v_result = 7fffffffffffffff | 0000000000000000 -+ v_arg1 = 0x1.978e8abfd83c2p+152 | 0x1.2531ebf451762p+315 -+insn vclgdb00: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.23363aaa9ca54p+517 | 0x1.7243af9b17426p-313 -+insn vclgdb00: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.9cd926092c28dp-961 | -0x1.d359f3e9bb6fdp-863 -+insn vclgdb00: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.0c2e79701cfedp+113 | -0x1.386cc4d0c2753p-639 -+insn vclgdb00: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.6404fbeee6e51p-833 | -0x1.88c7c4c78e8b5p-875 -+insn vclgdb01: -+ v_result = 0000000000000000 | ffffffffffffffff -+ v_arg1 = -0x1.becf5aabeedb2p-279 | 0x1.8f46a8584af8bp+339 -+insn vclgdb01: -+ v_result = 0000000000000000 | ffffffffffffffff -+ v_arg1 = -0x1.ba405560535ecp+419 | 0x1.f5f0d2ac089dbp+960 -+insn vclgdb01: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = 0x1.13765a3448273p-46 | -0x1.4245b126d990bp-32 -+insn vclgdb01: -+ v_result = ffffffffffffffff | 0000000000000000 -+ v_arg1 = 0x1.42f7c19ab251ep+182 | -0x1.d11887b37d89ep+652 -+insn vclgdb03: -+ v_result = ffffffffffffffff | 0000000000000000 -+ v_arg1 = 0x1.c89eea4d649dfp+1002 | -0x1.02ac7c6fad4f4p-857 -+insn vclgdb03: -+ v_result = 0000000000000001 | 0000000000000000 -+ v_arg1 = 0x1.c785c5992ac87p-658 | -0x1.e69063f7f720dp-81 -+insn vclgdb03: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.7262730986284p+402 | -0x1.97db5d33ead45p+341 -+insn vclgdb03: -+ v_result = 0000000000000000 | 0000000000000001 -+ v_arg1 = -0x1.e732cc74f96a5p+338 | 0x1.e8c7ed81c5518p-50 -+insn vclgdb04: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = 0x1.fb488268d49d4p-603 | 0x1.af20dca2dd1dep-649 -+insn vclgdb04: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.77654765512dap-986 | 0x1.700c80872de8ep-676 -+insn vclgdb04: -+ v_result = ffffffffffffffff | 0000000000000000 -+ v_arg1 = 0x1.f3969c999dd1dp+671 | 0x1.ebe969b9a4e7ep-330 -+insn vclgdb04: -+ v_result = ffffffffffffffff | ffffffffffffffff -+ v_arg1 = 0x1.1361bd5f8ad64p+859 | 0x1.6aa9af0c3cb2p+281 -+insn vclgdb05: -+ v_result = ffffffffffffffff | ffffffffffffffff -+ v_arg1 = 0x1.21a00ba7f5a8fp+265 | 0x1.277f89a3992c5p+139 -+insn vclgdb05: -+ v_result = ffffffffffffffff | ffffffffffffffff -+ v_arg1 = 0x1.8c9a9b86a5462p+672 | 0x1.5d08d1235385bp+372 -+insn vclgdb05: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.41d67fae35e3ap-120 | 0x1.013ba779e6931p-854 -+insn vclgdb05: -+ v_result = ffffffffffffffff | 0000000000000000 -+ v_arg1 = 0x1.7a5064fc054d4p+900 | -0x1.117184fcaa4b1p+826 -+insn vclgdb06: -+ v_result = 0000000000000000 | ffffffffffffffff -+ v_arg1 = -0x1.06793ec47e70cp+690 | 0x1.4e743453c0123p+679 -+insn vclgdb06: -+ v_result = 0000000000000001 | ffffffffffffffff -+ v_arg1 = 0x1.b9f182ced5c9ap-622 | 0x1.48593e965ed7p+213 -+insn vclgdb06: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.27e5c501152d5p-727 | -0x1.aa8dc7366e9dbp+4 -+insn vclgdb06: -+ v_result = 0000000000000001 | 0000000000000000 -+ v_arg1 = 0x1.eeca740c47973p-380 | -0x1.b7f3480cb4ec7p+750 -+insn vclgdb07: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.5477b49835c46p-130 | -0x1.d6cacd4500c77p+113 -+insn vclgdb07: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.c235bdef919ffp+466 | -0x1.1ca14189e67c8p+29 -+insn vclgdb07: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.5088657c024edp+64 | -0x1.8a9ba9a0ebaf7p-628 -+insn vclgdb07: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.137bbb51f08bdp+306 | 0x1.18d2a1063356p-795 -+insn wclgdb00: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.e66f55dcc2639p-1013 | -0x1.733ee56929f3bp-304 -+insn wclgdb00: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = 0x1.8802fd9ab740cp-986 | -0x1.64d4d2c7c145fp-1015 -+insn wclgdb00: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = 0x1.a67209b8c407bp-645 | -0x1.6410ff9b1c801p+487 -+insn wclgdb00: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.cb2febaefeb2dp+49 | 0x1.dee368b2ec375p-502 -+insn wclgdb01: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = 0x1.5703db3c1b0e2p-728 | 0x1.068c4d51ea4ebp+617 -+insn wclgdb01: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.ae350291e5b3ep+291 | 0x1.1b87bb09b6032p+376 -+insn wclgdb01: -+ v_result = ffffffffffffffff | 0000000000000000 -+ v_arg1 = 0x1.c4666a710127ep+424 | -0x1.19e969b6c0076p+491 -+insn wclgdb01: -+ v_result = ffffffffffffffff | 0000000000000000 -+ v_arg1 = 0x1.c892c5a4d103fp+105 | -0x1.d4f937cc76704p+749 -+insn wclgdb03: -+ v_result = 0000000000000001 | 0000000000000000 -+ v_arg1 = 0x1.81090d8fc663dp-111 | 0x1.337ec5e0f0904p+1 -+insn wclgdb03: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.e787adc70b91p-593 | 0x1.db8d83196b53cp-762 -+insn wclgdb03: -+ v_result = ffffffffffffffff | 0000000000000000 -+ v_arg1 = 0x1.6529307e907efp+389 | -0x1.3ea0d8d5b4dd2p+589 -+insn wclgdb03: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.be701a158637p-385 | 0x1.c5a7f70cb8a09p+107 -+insn wclgdb04: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.2f328571ab445p+21 | -0x1.dcc21fc82ba01p-930 -+insn wclgdb04: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.06b69fcbb7bffp-415 | 0x1.6f9a13a0a827ap+915 -+insn wclgdb04: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.738e549b38bcdp+479 | 0x1.a522edb999c9p-45 -+insn wclgdb04: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = 0x1.7f9399d2bcf3bp-215 | -0x1.7bc35f2d69a7fp+818 -+insn wclgdb05: -+ v_result = ffffffffffffffff | 0000000000000000 -+ v_arg1 = 0x1.fc542bdb707f6p+880 | -0x1.8521ebc93a25fp-969 -+insn wclgdb05: -+ v_result = 1ce8d9951b8c8600 | 0000000000000000 -+ v_arg1 = 0x1.ce8d9951b8c86p+60 | 0x1.92712589230e7p+475 -+insn wclgdb05: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.8a297f60a0811p-156 | 0x1.102b79043d82cp-204 -+insn wclgdb05: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = 0x1.beb9057e1401dp-196 | -0x1.820f18f830262p+15 -+insn wclgdb06: -+ v_result = 0000000000000001 | 0000000000000000 -+ v_arg1 = 0x1.c321a966ecb4dp-430 | -0x1.2f6a1a95ead99p-943 -+insn wclgdb06: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.f1a86b4aed821p-56 | -0x1.1ee6717cc2d7fp-899 -+insn wclgdb06: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.73ce49d89ecb9p-302 | 0x1.52663b975ed23p-716 -+insn wclgdb06: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.3e9c2de97a292p+879 | 0x1.d34eed36f2eafp+960 -+insn wclgdb07: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.4e6ec6ddc6a45p-632 | -0x1.6e564d0fec72bp+369 -+insn wclgdb07: -+ v_result = ffffffffffffffff | 0000000000000000 -+ v_arg1 = 0x1.42e2c658e4c4dp+459 | -0x1.9f9dc0252e44p+85 -+insn wclgdb07: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.fb40ac8cda3c1p-762 | 0x1.0e9ed614bc8f1p-342 -+insn wclgdb07: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.c1f8b3c68e214p+118 | -0x1.1a26a49368b61p+756 -+insn vfidb00: -+ v_arg1 = -0x1.38df4cf9d52dbp-545 | -0x1.049253d90dd92p+94 -+ v_result = -0x0p+0 | -0x1.049253d90dd92p+94 -+insn vfidb00: -+ v_arg1 = 0x1.75187b3d8d386p+793 | -0x1.0f5aea6c1c123p+547 -+ v_result = 0x1.75187b3d8d386p+793 | -0x1.0f5aea6c1c123p+547 -+insn vfidb00: -+ v_arg1 = 0x1.cb54303729724p-337 | -0x1.0791295e0541p+59 -+ v_result = 0x0p+0 | -0x1.0791295e0541p+59 -+insn vfidb00: -+ v_arg1 = -0x1.1b9a77d71eb22p+825 | -0x1.0189f7d748475p+647 -+ v_result = -0x1.1b9a77d71eb22p+825 | -0x1.0189f7d748475p+647 -+insn vfidb01: -+ v_arg1 = -0x1.5d26e474def0ap+1013 | -0x1.c4e9efb30da4ap-580 -+ v_result = -0x1.5d26e474def0ap+1013 | -0x0p+0 -+insn vfidb01: -+ v_arg1 = 0x1.4ad53aba85947p+105 | -0x1.f8f178fb43126p-350 -+ v_result = 0x1.4ad53aba85947p+105 | -0x0p+0 -+insn vfidb01: -+ v_arg1 = 0x1.aeacddb1336dep+106 | 0x1.0008f60517dffp-355 -+ v_result = 0x1.aeacddb1336dep+106 | 0x0p+0 -+insn vfidb01: -+ v_arg1 = -0x1.ee2d2afcea935p+75 | 0x1.740cbfdc486e6p-217 -+ v_result = -0x1.ee2d2afcea935p+75 | 0x0p+0 -+insn vfidb03: -+ v_arg1 = -0x1.662966287abcfp-856 | -0x1.7228d17f9aacep-413 -+ v_result = -0x1p+0 | -0x1p+0 -+insn vfidb03: -+ v_arg1 = 0x1.86f4c5919ca0cp-384 | -0x1.4715448c89f45p+675 -+ v_result = 0x1p+0 | -0x1.4715448c89f45p+675 -+insn vfidb03: -+ v_arg1 = -0x1.500e2dc4dececp-219 | -0x1.dab1ecfba3037p-347 -+ v_result = -0x1p+0 | -0x1p+0 -+insn vfidb03: -+ v_arg1 = -0x1.fc7c8db9b09ccp-892 | -0x1.1c72852c3fcb1p-605 -+ v_result = -0x1p+0 | -0x1p+0 -+insn vfidb04: -+ v_arg1 = 0x1.3eaa8ace8f425p-858 | 0x1.cf0ac9c083a9ap-249 -+ v_result = 0x0p+0 | 0x0p+0 -+insn vfidb04: -+ v_arg1 = 0x1.ec22dc8481352p+516 | 0x1.948a15e99787bp+705 -+ v_result = 0x1.ec22dc8481352p+516 | 0x1.948a15e99787bp+705 -+insn vfidb04: -+ v_arg1 = 0x1.aa3c092bc234ap-99 | -0x1.1a67dee375837p-741 -+ v_result = 0x0p+0 | -0x0p+0 -+insn vfidb04: -+ v_arg1 = -0x1.0954410f3f66p-870 | -0x1.959f40b0d52d1p+679 -+ v_result = -0x0p+0 | -0x1.959f40b0d52d1p+679 -+insn vfidb05: -+ v_arg1 = 0x1.714e0b00c3609p+188 | -0x1.7e3b89779752bp-897 -+ v_result = 0x1.714e0b00c3609p+188 | -0x0p+0 -+insn vfidb05: -+ v_arg1 = 0x1.2d4b405512095p-36 | -0x1.cbf3a5cc327c4p+987 -+ v_result = 0x0p+0 | -0x1.cbf3a5cc327c4p+987 -+insn vfidb05: -+ v_arg1 = -0x1.47fa188fc49f3p-399 | 0x1.a1d66c8e3e178p-350 -+ v_result = -0x0p+0 | 0x0p+0 -+insn vfidb05: -+ v_arg1 = 0x1.e760458f45d6fp-672 | -0x1.ea169b23ef443p+754 -+ v_result = 0x0p+0 | -0x1.ea169b23ef443p+754 -+insn vfidb06: -+ v_arg1 = 0x1.e8c7afa8edb76p-616 | -0x1.4286e146748fdp+864 -+ v_result = 0x1p+0 | -0x1.4286e146748fdp+864 -+insn vfidb06: -+ v_arg1 = 0x1.0cf9c1b4fdb5p-852 | 0x1.9845bcfe1181dp+687 -+ v_result = 0x1p+0 | 0x1.9845bcfe1181dp+687 -+insn vfidb06: -+ v_arg1 = -0x1.f40c24aa8cae3p+141 | -0x1.33b966adbb779p+18 -+ v_result = -0x1.f40c24aa8cae3p+141 | -0x1.33b94p+18 -+insn vfidb06: -+ v_arg1 = 0x1.497c3bfb72975p+895 | 0x1.94dc5d4f14f02p+866 -+ v_result = 0x1.497c3bfb72975p+895 | 0x1.94dc5d4f14f02p+866 -+insn vfidb07: -+ v_arg1 = 0x1.400b2180c5169p+9 | -0x1.0eb881ef09e8bp+144 -+ v_result = 0x1.4p+9 | -0x1.0eb881ef09e8bp+144 -+insn vfidb07: -+ v_arg1 = 0x1.5e1a1176032ffp-694 | 0x1.a413f4290b781p+986 -+ v_result = 0x0p+0 | 0x1.a413f4290b781p+986 -+insn vfidb07: -+ v_arg1 = 0x1.89260655d1017p+657 | -0x1.82ecae03ac7b3p-465 -+ v_result = 0x1.89260655d1017p+657 | -0x1p+0 -+insn vfidb07: -+ v_arg1 = -0x1.e233d525b46edp+954 | 0x1.70742fcc3ce0bp+148 -+ v_result = -0x1.e233d525b46edp+954 | 0x1.70742fcc3ce0bp+148 -+insn wfidb00: -+ v_arg1 = -0x1.61bc4941f04ddp-821 | 0x1.658c3c22e6351p+180 -+ v_result = -0x0p+0 | -- -+insn wfidb00: -+ v_arg1 = -0x1.b347e049e111fp-420 | 0x1.da424426c71edp-950 -+ v_result = -0x0p+0 | -- -+insn wfidb00: -+ v_arg1 = 0x1.920b565b7898ap+329 | 0x1.520bc351efda4p-592 -+ v_result = 0x1.920b565b7898ap+329 | -- -+insn wfidb00: -+ v_arg1 = -0x1.8482d1dfaa054p+729 | 0x1.57c1eb750de59p-154 -+ v_result = -0x1.8482d1dfaa054p+729 | -- -+insn wfidb01: -+ v_arg1 = -0x1.e88ebfa665fcep+172 | -0x1.29bdb0b3e83ccp+147 -+ v_result = -0x1.e88ebfa665fcep+172 | -- -+insn wfidb01: -+ v_arg1 = 0x1.0f5f1ef25622bp-839 | -0x1.d57455b11b25dp+173 -+ v_result = 0x0p+0 | -- -+insn wfidb01: -+ v_arg1 = 0x1.098fed551a139p+372 | 0x1.73f2976a143c8p+826 -+ v_result = 0x1.098fed551a139p+372 | -- -+insn wfidb01: -+ v_arg1 = -0x1.f30512cb12425p-608 | 0x1.e58939033eae8p-891 -+ v_result = -0x0p+0 | -- -+insn wfidb03: -+ v_arg1 = -0x1.af465d77bce39p+75 | -0x1.0e08c063beb77p-766 -+ v_result = -0x1.af465d77bce39p+75 | -- -+insn wfidb03: -+ v_arg1 = -0x1.f50b5e41314ap-764 | -0x1.607de181ae4ccp-591 -+ v_result = -0x1p+0 | -- -+insn wfidb03: -+ v_arg1 = 0x1.8a47842c8c31fp-50 | -0x1.8b5cdaee0879ap+947 -+ v_result = 0x1p+0 | -- -+insn wfidb03: -+ v_arg1 = 0x1.d08648a9cbedcp+182 | -0x1.e47de14095eb5p-832 -+ v_result = 0x1.d08648a9cbedcp+182 | -- -+insn wfidb04: -+ v_arg1 = 0x1.50b6db7fbbd1ap+133 | -0x1.c5293bf4286cfp+694 -+ v_result = 0x1.50b6db7fbbd1ap+133 | -- -+insn wfidb04: -+ v_arg1 = -0x1.57085ee8210f9p-986 | 0x1.45f2b06247536p+35 -+ v_result = -0x0p+0 | -- -+insn wfidb04: -+ v_arg1 = -0x1.df15d38b85b39p+278 | -0x1.6ae64eaf6b596p+961 -+ v_result = -0x1.df15d38b85b39p+278 | -- -+insn wfidb04: -+ v_arg1 = 0x1.0fc2143d758f6p+241 | -0x1.2f53bcf6ea7bcp-843 -+ v_result = 0x1.0fc2143d758f6p+241 | -- -+insn wfidb05: -+ v_arg1 = 0x1.c793f2582996cp-505 | 0x1.31faa416f414fp-393 -+ v_result = 0x0p+0 | -- -+insn wfidb05: -+ v_arg1 = 0x1.c831f1a8f44b3p-318 | -0x1.30d67b0cbd098p-799 -+ v_result = 0x0p+0 | -- -+insn wfidb05: -+ v_arg1 = -0x1.c2aea42bdd582p+522 | -0x1.d58aa3500b839p+73 -+ v_result = -0x1.c2aea42bdd582p+522 | -- -+insn wfidb05: -+ v_arg1 = -0x1.33846647de0efp+805 | -0x1.40ee74cfe2ff8p+336 -+ v_result = -0x1.33846647de0efp+805 | -- -+insn wfidb06: -+ v_arg1 = 0x1.9ea16aeaccd2bp-592 | -0x1.0718e98de0774p-791 -+ v_result = 0x1p+0 | -- -+insn wfidb06: -+ v_arg1 = -0x1.2b33d73559b49p+432 | 0x1.0bcd0a3aa62edp+137 -+ v_result = -0x1.2b33d73559b49p+432 | -- -+insn wfidb06: -+ v_arg1 = 0x1.0fd5bed729ef7p-136 | -0x1.7de5c9c1a7cffp-542 -+ v_result = 0x1p+0 | -- -+insn wfidb06: -+ v_arg1 = 0x1.3e88df9ab4141p+1001 | 0x1.23d1c18546565p-208 -+ v_result = 0x1.3e88df9ab4141p+1001 | -- -+insn wfidb07: -+ v_arg1 = 0x1.a0a30de14c554p-995 | 0x1.f75fbd2aac4b9p+721 -+ v_result = 0x0p+0 | -- -+insn wfidb07: -+ v_arg1 = -0x1.22d9d06f10138p+388 | 0x1.617a16b5e9631p-40 -+ v_result = -0x1.22d9d06f10138p+388 | -- -+insn wfidb07: -+ v_arg1 = -0x1.415ecc4742193p-484 | -0x1.26b342b60ed63p+353 -+ v_result = -0x1p+0 | -- -+insn wfidb07: -+ v_arg1 = 0x1.a38b40d7c686bp+18 | 0x1.72f17be0db2p+786 -+ v_result = 0x1.a38b4p+18 | -- -+insn vledb00: -+ v_arg1 = -0x1.a84c84057eee2p-484 | 0x1.c57adf9f0649bp-745 -+ v_result = -0x0p+0 | -- | 0x0p+0 | -- -+insn vledb00: -+ v_arg1 = 0x1.81df9df7f63fbp+804 | 0x1.1cb169383d862p-99 -+ v_result = 0x1.fffffep+127 | -- | 0x1.1cb168p-99 | -- -+insn vledb00: -+ v_arg1 = -0x1.71dd9545fca52p+677 | -0x1.92cefededf8e1p-117 -+ v_result = -0x1.fffffep+127 | -- | -0x1.92cefep-117 | -- -+insn vledb00: -+ v_arg1 = -0x1.65375ad0e40e7p-937 | 0x1.09014cbc484c5p+485 -+ v_result = -0x0p+0 | -- | 0x1.fffffep+127 | -- -+insn vledb01: -+ v_arg1 = -0x1.505196110b3d2p+107 | -0x1.3426019ccd495p+80 -+ v_result = -0x1.505196p+107 | -- | -0x1.342602p+80 | -- -+insn vledb01: -+ v_arg1 = -0x1.0af0f091bac0ep+839 | 0x1.e846aa8b59579p-876 -+ v_result = -inf | -- | 0x0p+0 | -- -+insn vledb01: -+ v_arg1 = -0x1.2c25e28cf0631p+481 | -0x1.84e49efdf88f6p-761 -+ v_result = -inf | -- | -0x0p+0 | -- -+insn vledb01: -+ v_arg1 = -0x1.2668ee57bb531p-627 | -0x1.70c4fcb1747afp+53 -+ v_result = -0x0p+0 | -- | -0x1.70c4fcp+53 | -- -+insn vledb03: -+ v_arg1 = 0x1.83961ccdd811fp-57 | -0x1.164d03f590024p+321 -+ v_result = 0x1.83961ep-57 | -- | -0x1.fffffep+127 | -- -+insn vledb03: -+ v_arg1 = -0x1.70f9991e0c8eep-335 | 0x1.7eedb358f3874p+893 -+ v_result = -0x1p-149 | -- | 0x1.fffffep+127 | -- -+insn vledb03: -+ v_arg1 = 0x1.2b0b7cd5f402cp+157 | -0x1.bfafe3c4f891dp-342 -+ v_result = 0x1.fffffep+127 | -- | -0x1p-149 | -- -+insn vledb03: -+ v_arg1 = -0x1.a9eb9c0dfb4c6p+89 | 0x1.a4f0449a065bap+737 -+ v_result = -0x1.a9eb9ep+89 | -- | 0x1.fffffep+127 | -- -+insn vledb04: -+ v_arg1 = -0x1.dccda0e58c3c6p+254 | -0x1.1e7b977b4d2c3p-832 -+ v_result = -inf | -- | -0x0p+0 | -- -+insn vledb04: -+ v_arg1 = -0x1.8685582eca417p+537 | 0x1.ab5a3c7ae2d4fp+276 -+ v_result = -inf | -- | inf | -- -+insn vledb04: -+ v_arg1 = -0x1.49320cface53ep+903 | 0x1.e5fc9e15ce8d3p+298 -+ v_result = -inf | -- | inf | -- -+insn vledb04: -+ v_arg1 = 0x1.b25b34a582821p+386 | 0x1.4056fd2fc4ce3p-361 -+ v_result = inf | -- | 0x0p+0 | -- -+insn vledb05: -+ v_arg1 = 0x1.26ac2b21ee5c2p+207 | 0x1.ff8d7ccf938eep-142 -+ v_result = 0x1.fffffep+127 | -- | 0x1.fep-142 | -- -+insn vledb05: -+ v_arg1 = -0x1.fe8fde9582b04p+564 | 0x1.28400eaaee105p+536 -+ v_result = -0x1.fffffep+127 | -- | 0x1.fffffep+127 | -- -+insn vledb05: -+ v_arg1 = -0x1.317d5b9516063p-163 | -0x1.ea868ea209093p+333 -+ v_result = -0x0p+0 | -- | -0x1.fffffep+127 | -- -+insn vledb05: -+ v_arg1 = -0x1.027399100fdbfp-546 | -0x1.1d9ccf1c66825p+36 -+ v_result = -0x0p+0 | -- | -0x1.1d9ccep+36 | -- -+insn vledb06: -+ v_arg1 = 0x1.2bf5345ca531p+982 | 0x1.7c3e64b441d22p-449 -+ v_result = inf | -- | 0x1p-149 | -- -+insn vledb06: -+ v_arg1 = -0x1.8b94ed2434a31p+1001 | 0x1.c092c292abf92p+853 -+ v_result = -0x1.fffffep+127 | -- | inf | -- -+insn vledb06: -+ v_arg1 = 0x1.ce81218ec1d98p+236 | 0x1.6009662b86edap+985 -+ v_result = inf | -- | inf | -- -+insn vledb06: -+ v_arg1 = -0x1.5d2059ff4201bp+513 | 0x1.d7857339c237dp-955 -+ v_result = -0x1.fffffep+127 | -- | 0x1p-149 | -- -+insn vledb07: -+ v_arg1 = 0x1.a76ca53f97aabp-255 | -0x1.674a200b06edbp-581 -+ v_result = 0x0p+0 | -- | -0x1p-149 | -- -+insn vledb07: -+ v_arg1 = 0x1.0080548c7ec1bp+989 | 0x1.2ee6511bf33f3p+395 -+ v_result = 0x1.fffffep+127 | -- | 0x1.fffffep+127 | -- -+insn vledb07: -+ v_arg1 = -0x1.9b113781789d9p-813 | -0x1.2950f56406c23p-653 -+ v_result = -0x1p-149 | -- | -0x1p-149 | -- -+insn vledb07: -+ v_arg1 = 0x1.651d480507cb1p+722 | -0x1.58f4c2418ebe6p-70 -+ v_result = 0x1.fffffep+127 | -- | -0x1.58f4c4p-70 | -- -+insn wledb00: -+ v_arg1 = 0x1.43d646747c59p-257 | -0x1.737c6f65a1694p+700 -+ v_result = 0x0p+0 | -- | -- | -- -+insn wledb00: -+ v_arg1 = -0x1.201dc5801fd3dp-331 | -0x1.2e0e52d09aa24p+358 -+ v_result = -0x0p+0 | -- | -- | -- -+insn wledb00: -+ v_arg1 = 0x1.81f14646f0e21p+15 | 0x1.f918fd1d379ebp+784 -+ v_result = 0x1.81f146p+15 | -- | -- | -- -+insn wledb00: -+ v_arg1 = -0x1.fcf63412ffdffp-746 | -0x1.4c8e74fd72c5cp-193 -+ v_result = -0x0p+0 | -- | -- | -- -+insn wledb01: -+ v_arg1 = 0x1.ebe5b0e50a1bap+140 | 0x1.638103a5e01c9p+504 -+ v_result = inf | -- | -- | -- -+insn wledb01: -+ v_arg1 = -0x1.9d0900d0d6914p+359 | -0x1.78bea0aa48f2p-76 -+ v_result = -inf | -- | -- | -- -+insn wledb01: -+ v_arg1 = 0x1.3de51688f1b6cp-210 | 0x1.721d2e08e7eadp+312 -+ v_result = 0x0p+0 | -- | -- | -- -+insn wledb01: -+ v_arg1 = -0x1.d796ceeae907ep-668 | -0x1.6cf64417450ddp-126 -+ v_result = -0x0p+0 | -- | -- | -- -+insn wledb03: -+ v_arg1 = 0x1.3a6edd4af7926p+104 | 0x1.fa23bd7d81cf7p+68 -+ v_result = 0x1.3a6edep+104 | -- | -- | -- -+insn wledb03: -+ v_arg1 = 0x1.4a0dd74061d1cp+154 | -0x1.d9bae342b4ee3p+307 -+ v_result = 0x1.fffffep+127 | -- | -- | -- -+insn wledb03: -+ v_arg1 = 0x1.99a06111419b7p-275 | -0x1.871938f8d69e6p-833 -+ v_result = 0x1p-149 | -- | -- | -- -+insn wledb03: -+ v_arg1 = -0x1.a7bac92e920acp+145 | -0x1.752ff858cc562p-671 -+ v_result = -0x1.fffffep+127 | -- | -- | -- -+insn wledb04: -+ v_arg1 = -0x1.fa1544402b9cfp+862 | -0x1.ea203dae35299p+583 -+ v_result = -inf | -- | -- | -- -+insn wledb04: -+ v_arg1 = 0x1.c9f7f990a04cfp+258 | -0x1.0bb6e363b546ap+690 -+ v_result = inf | -- | -- | -- -+insn wledb04: -+ v_arg1 = 0x1.3ff6eeb9a76fdp-981 | 0x1.dac90e9ec2511p+619 -+ v_result = 0x0p+0 | -- | -- | -- -+insn wledb04: -+ v_arg1 = 0x1.401df3afc9905p+883 | 0x1.4fcf4a8bbf7e9p-598 -+ v_result = inf | -- | -- | -- -+insn wledb05: -+ v_arg1 = 0x1.f5bcdeae2ceb1p-482 | -0x1.064234e9c8f2cp-825 -+ v_result = 0x0p+0 | -- | -- | -- -+insn wledb05: -+ v_arg1 = 0x1.ff73387320bacp-138 | -0x1.d99679d700cbp+220 -+ v_result = 0x1.ff6p-138 | -- | -- | -- -+insn wledb05: -+ v_arg1 = 0x1.eb9c782bd9d3bp+916 | 0x1.30084fbc69faap-269 -+ v_result = 0x1.fffffep+127 | -- | -- | -- -+insn wledb05: -+ v_arg1 = -0x1.737c1f102e804p+703 | 0x1.7787f359d506ep-790 -+ v_result = -0x1.fffffep+127 | -- | -- | -- -+insn wledb06: -+ v_arg1 = -0x1.d7f9453ee23c9p-667 | -0x1.01459401fc02bp-872 -+ v_result = -0x0p+0 | -- | -- | -- -+insn wledb06: -+ v_arg1 = 0x1.7d5b34b9d1d2cp+188 | 0x1.fdfd3f465e2b2p+97 -+ v_result = inf | -- | -- | -- -+insn wledb06: -+ v_arg1 = 0x1.7734c6119fb6cp+504 | 0x1.4972ad038c12ep-213 -+ v_result = inf | -- | -- | -- -+insn wledb06: -+ v_arg1 = 0x1.d480ec418f825p+795 | 0x1.e73dbbacd3fecp-1 -+ v_result = inf | -- | -- | -- -+insn wledb07: -+ v_arg1 = 0x1.7bbe60bc02413p-511 | 0x1.ade60bc87d013p-400 -+ v_result = 0x0p+0 | -- | -- | -- -+insn wledb07: -+ v_arg1 = -0x1.365bcf06526cdp+361 | 0x1.23aefc8b7436bp-449 -+ v_result = -inf | -- | -- | -- -+insn wledb07: -+ v_arg1 = -0x1.9db391449fb8dp-1005 | -0x1.e9f40755e7a19p-55 -+ v_result = -0x1p-149 | -- | -- | -- -+insn wledb07: -+ v_arg1 = 0x1.46282bf59b5e5p+334 | 0x1.59946c0e82d5fp+936 -+ v_result = 0x1.fffffep+127 | -- | -- | -- -+insn vldeb: -+ v_arg1 = -0x1.8b9fd9ef53d8ap-833 | -0x1.aeef3cdf1ac5fp-282 -+ v_result = -0x1.d173fap-104 | -0x1.b5dde6p-35 -+insn vldeb: -+ v_arg1 = 0x1.cd30a83a7130bp-430 | 0x1.256f7a4029ad8p-286 -+ v_result = 0x1.39a614p-53 | 0x1.24adeep-35 -+insn vldeb: -+ v_arg1 = -0x1.09bc929ea0999p-364 | 0x1.c4281f653b3e6p-652 -+ v_result = -0x1.613792p-45 | 0x1.788502p-81 -+insn vldeb: -+ v_arg1 = -0x1.7afd9ede30cbfp+556 | -0x1.696fbd68a88c4p-863 -+ v_result = -0x1.6f5fb2p+70 | -0x1.0d2df6p-107 -+insn wldeb: -+ v_arg1 = -0x1.d26169729db2ap-435 | 0x1.d6fd080793e8cp+767 -+ v_result = -0x1.9a4c2cp-54 | 0x0p+0 -+insn wldeb: -+ v_arg1 = -0x1.f4b59107fce61p-930 | 0x1.cdf2816e253f4p-168 -+ v_result = -0x1.be96b2p-116 | 0x0p+0 -+insn wldeb: -+ v_arg1 = -0x1.9603a2997928cp-441 | -0x1.aada85e355a11p-767 -+ v_result = -0x1.d2c074p-55 | 0x0p+0 -+insn wldeb: -+ v_arg1 = 0x1.25ccf5bd0e83p+620 | 0x1.e1635864ebb17p-88 -+ v_result = 0x1.64b99ep+78 | 0x0p+0 -+insn vflcdb: -+ v_arg1 = 0x1.0ae6d82f76afp-166 | -0x1.e8fb1e03a7415p-191 -+ v_result = -0x1.0ae6d82f76afp-166 | 0x1.e8fb1e03a7415p-191 -+insn vflcdb: -+ v_arg1 = 0x1.9f865a209464cp+19 | 0x1.a81bca7f2dbbcp-960 -+ v_result = -0x1.9f865a209464cp+19 | -0x1.a81bca7f2dbbcp-960 -+insn vflcdb: -+ v_arg1 = 0x1.ed6c6a3ed0163p-5 | 0x1.40b73b91e5a17p+838 -+ v_result = -0x1.ed6c6a3ed0163p-5 | -0x1.40b73b91e5a17p+838 -+insn vflcdb: -+ v_arg1 = 0x1.19520153d35b4p-301 | 0x1.ac5325cd23253p+396 -+ v_result = -0x1.19520153d35b4p-301 | -0x1.ac5325cd23253p+396 -+insn wflcdb: -+ v_arg1 = 0x1.ffd3eecfd54d7p-831 | -0x1.97854fa523a77p+146 -+ v_result = -0x1.ffd3eecfd54d7p-831 | 0x0p+0 -+insn wflcdb: -+ v_arg1 = -0x1.508ea45606447p-442 | 0x1.ae7f0e6cf9d2bp+583 -+ v_result = 0x1.508ea45606447p-442 | 0x0p+0 -+insn wflcdb: -+ v_arg1 = 0x1.da8ab2188c21ap+94 | 0x1.78a9c152aa074p-808 -+ v_result = -0x1.da8ab2188c21ap+94 | 0x0p+0 -+insn wflcdb: -+ v_arg1 = -0x1.086882645e0c5p-1001 | -0x1.54e2de5af5a74p-262 -+ v_result = 0x1.086882645e0c5p-1001 | 0x0p+0 -+insn vflndb: -+ v_arg1 = -0x1.5bec561d407dcp+819 | -0x1.a5773dadb7a2dp+935 -+ v_result = -0x1.5bec561d407dcp+819 | -0x1.a5773dadb7a2dp+935 -+insn vflndb: -+ v_arg1 = -0x1.fa5a407a116cep+972 | 0x1.7bf005c15063dp-437 -+ v_result = -0x1.fa5a407a116cep+972 | -0x1.7bf005c15063dp-437 -+insn vflndb: -+ v_arg1 = -0x1.184242f0442acp-994 | -0x1.e54e17c7617a2p-355 -+ v_result = -0x1.184242f0442acp-994 | -0x1.e54e17c7617a2p-355 -+insn vflndb: -+ v_arg1 = -0x1.c5bc39a06d4e2p-259 | 0x1.c5e61ad849e77p-833 -+ v_result = -0x1.c5bc39a06d4e2p-259 | -0x1.c5e61ad849e77p-833 -+insn wflndb: -+ v_arg1 = -0x1.e9f3e6d1beffap-117 | -0x1.d58cc8bf123b3p-714 -+ v_result = -0x1.e9f3e6d1beffap-117 | 0x0p+0 -+insn wflndb: -+ v_arg1 = -0x1.3fc4ef2e7485ep-691 | 0x1.eb328986081efp-775 -+ v_result = -0x1.3fc4ef2e7485ep-691 | 0x0p+0 -+insn wflndb: -+ v_arg1 = -0x1.7146c5afdec16p+23 | -0x1.597fcfa1fab2p-708 -+ v_result = -0x1.7146c5afdec16p+23 | 0x0p+0 -+insn wflndb: -+ v_arg1 = 0x1.03f8d7e9afe84p-947 | 0x1.9a10c3feb6b57p-118 -+ v_result = -0x1.03f8d7e9afe84p-947 | 0x0p+0 -+insn vflpdb: -+ v_arg1 = 0x1.64ae59b6c762ep-407 | -0x1.fa7191ab21e86p+533 -+ v_result = 0x1.64ae59b6c762ep-407 | 0x1.fa7191ab21e86p+533 -+insn vflpdb: -+ v_arg1 = -0x1.e39a61250e473p-116 | -0x1.970a4244b7a3dp+800 -+ v_result = 0x1.e39a61250e473p-116 | 0x1.970a4244b7a3dp+800 -+insn vflpdb: -+ v_arg1 = -0x1.905c12e0e2c53p+264 | 0x1.87daa9c3e4967p-647 -+ v_result = 0x1.905c12e0e2c53p+264 | 0x1.87daa9c3e4967p-647 -+insn vflpdb: -+ v_arg1 = -0x1.85fa2de1d492ap+170 | 0x1.ac36828822c11p-968 -+ v_result = 0x1.85fa2de1d492ap+170 | 0x1.ac36828822c11p-968 -+insn wflpdb: -+ v_arg1 = 0x1.a6cf677640a73p-871 | 0x1.b6f1792385922p-278 -+ v_result = 0x1.a6cf677640a73p-871 | 0x0p+0 -+insn wflpdb: -+ v_arg1 = -0x1.b886774f6d888p-191 | -0x1.6a2b08d735d22p-643 -+ v_result = 0x1.b886774f6d888p-191 | 0x0p+0 -+insn wflpdb: -+ v_arg1 = 0x1.5045d37d46f5fp+943 | -0x1.333a86ef2dcf6p-1013 -+ v_result = 0x1.5045d37d46f5fp+943 | 0x0p+0 -+insn wflpdb: -+ v_arg1 = 0x1.1e7bec6ada14dp+252 | 0x1.a70b3f3e24dap-153 -+ v_result = 0x1.1e7bec6ada14dp+252 | 0x0p+0 -+insn vfadb: -+ v_arg1 = 0x1.5b1ad8e9f17c6p-294 | -0x1.ddd8300a0bf02p+122 -+ v_arg2 = -0x1.9b49c31ca8ac6p+926 | 0x1.fdbc992926268p+677 -+ v_result = -0x1.9b49c31ca8ac5p+926 | 0x1.fdbc992926267p+677 -+insn vfadb: -+ v_arg1 = -0x1.6144d24f60f19p+321 | -0x1.0f4885e73979ap+190 -+ v_arg2 = 0x1.cf70ab6af95e5p-656 | -0x1.d2a10763bba9ep+317 -+ v_result = -0x1.6144d24f60f18p+321 | -0x1.d2a10763bba9ep+317 -+insn vfadb: -+ v_arg1 = -0x1.6ba7d00ea2037p-839 | 0x1.3e5b07b555046p-553 -+ v_arg2 = -0x1.d400afb20401fp+608 | 0x1.600f85fbc2774p-86 -+ v_result = -0x1.d400afb20401fp+608 | 0x1.600f85fbc2774p-86 -+insn vfadb: -+ v_arg1 = -0x1.5039c4164f26bp+471 | -0x1.554272eaa3a01p-539 -+ v_arg2 = 0x1.a3a594bc042dep+515 | 0x1.6d08aceb68682p+706 -+ v_result = 0x1.a3a594bc0418dp+515 | 0x1.6d08aceb68681p+706 -+insn wfadb: -+ v_arg1 = 0x1.3c5466cb80722p+489 | -0x1.11e1770053ca2p+924 -+ v_arg2 = 0x1.d876cd721a726p-946 | 0x1.5c04ceb79c9bcp+1001 -+ v_result = 0x1.3c5466cb80722p+489 | 0x0p+0 -+insn wfadb: -+ v_arg1 = 0x1.b0b142d6b76a3p+577 | 0x1.3146824e993a2p+432 -+ v_arg2 = -0x1.f7f3b7582925fp-684 | -0x1.9700143c2b935p-837 -+ v_result = 0x1.b0b142d6b76a2p+577 | 0x0p+0 -+insn wfadb: -+ v_arg1 = -0x1.8d65e15edabd6p+244 | 0x1.3be7fd08492d6p-141 -+ v_arg2 = -0x1.5eef86490fb0ap+481 | 0x1.7b26c897cb6dfp+810 -+ v_result = -0x1.5eef86490fb0ap+481 | 0x0p+0 -+insn wfadb: -+ v_arg1 = -0x1.2dffa5b5f29p+34 | 0x1.71a026274602fp-881 -+ v_arg2 = 0x1.4dad707287289p+756 | -0x1.1500d55807247p-616 -+ v_result = 0x1.4dad707287288p+756 | 0x0p+0 -+insn vfsdb: -+ v_arg1 = 0x1.054fd9c4d4883p+644 | 0x1.45c90ed85bd7fp-780 -+ v_arg2 = 0x1.f3bc7a611dadap+494 | -0x1.7c9e1e858ba5bp-301 -+ v_result = 0x1.054fd9c4d4882p+644 | 0x1.7c9e1e858ba5bp-301 -+insn vfsdb: -+ v_arg1 = -0x1.697779c72f8a1p-232 | 0x1.cac8c6a6fbe36p-751 -+ v_arg2 = 0x1.6c23630c5305bp-897 | 0x1.91525e7f72d26p+516 -+ v_result = -0x1.697779c72f8a1p-232 | -0x1.91525e7f72d25p+516 -+insn vfsdb: -+ v_arg1 = 0x1.7033a03797d39p-722 | 0x1.fecd2799b8d1fp-588 -+ v_arg2 = -0x1.794d0fc274286p+204 | 0x1.25d121c810391p-344 -+ v_result = 0x1.794d0fc274286p+204 | -0x1.25d121c81039p-344 -+insn vfsdb: -+ v_arg1 = 0x1.3a79321b93187p+146 | 0x1.d707e1ddd2a26p-13 -+ v_arg2 = -0x1.00c3f844d79b5p+354 | 0x1.dc5a03907c923p-869 -+ v_result = 0x1.00c3f844d79b5p+354 | 0x1.d707e1ddd2a25p-13 -+insn wfsdb: -+ v_arg1 = 0x1.9090dabf846e7p-648 | 0x1.1c4ab843a2d15p+329 -+ v_arg2 = -0x1.a7ceb293690dep+316 | 0x1.22245954a20cp+42 -+ v_result = 0x1.a7ceb293690dep+316 | 0x0p+0 -+insn wfsdb: -+ v_arg1 = 0x1.4e5347c27819p-933 | -0x1.56a30bda28351p-64 -+ v_arg2 = -0x1.dedb9f3935b56p-155 | 0x1.8c5b6ed76816cp-522 -+ v_result = 0x1.dedb9f3935b56p-155 | 0x0p+0 -+insn wfsdb: -+ v_arg1 = 0x1.0ec4e562a015bp-491 | 0x1.3996381b52d9fp-686 -+ v_arg2 = 0x1.1dcce4e81819p+960 | -0x1.32fa425e8fc08p-263 -+ v_result = -0x1.1dcce4e81818fp+960 | 0x0p+0 -+insn wfsdb: -+ v_arg1 = -0x1.587229f90f77dp-19 | 0x1.100d8eb8105e4p-784 -+ v_arg2 = -0x1.afb4cce4c43ddp+530 | -0x1.6da7f05e7f512p-869 -+ v_result = 0x1.afb4cce4c43dcp+530 | 0x0p+0 -+insn vfmdb: -+ v_arg1 = 0x1.892b425556c47p-124 | 0x1.38222404079dfp-656 -+ v_arg2 = 0x1.af612ed2c342dp-267 | -0x1.1f735fd6ce768p-877 -+ v_result = 0x1.4b428afda35a7p-390 | -0x0p+0 -+insn vfmdb: -+ v_arg1 = -0x1.02106dba6feecp-272 | 0x1.cf890a91d4eefp-455 -+ v_arg2 = -0x1.12c7fc909ffcbp+782 | -0x1.22bf2e2dd2204p-721 -+ v_result = 0x1.14ff2ed0ce42bp+510 | -0x0p+0 -+insn vfmdb: -+ v_arg1 = -0x1.e3fd7999ca339p+101 | 0x1.cf2eff4ef5fd2p+816 -+ v_arg2 = -0x1.e722ee73a2523p-135 | 0x1.652dfb0cc8dbfp+179 -+ v_result = 0x1.cc7c9e66fd70ap-33 | 0x1.431fddc319ee2p+996 -+insn vfmdb: -+ v_arg1 = 0x1.2aa65e0fe665dp+729 | 0x1.1774d58fb5c62p+50 -+ v_arg2 = -0x1.ed5baf340bd7ep+475 | -0x1.83de646bb6511p+564 -+ v_result = -0x1.fffffffffffffp+1023 | -0x1.a76863c8aab11p+614 -+insn wfmdb: -+ v_arg1 = -0x1.b992d950126a1p-683 | -0x1.9c1b22eb58c59p-497 -+ v_arg2 = 0x1.b557a7d8e32c3p-25 | -0x1.f746b2ddafccep+227 -+ v_result = -0x1.792f6fb13894ap-707 | 0x0p+0 -+insn wfmdb: -+ v_arg1 = -0x1.677a8c20a5a2fp+876 | 0x1.c03e7b97e8c0dp-645 -+ v_arg2 = 0x1.dab44be430937p-1011 | -0x1.3f51352c67be9p-916 -+ v_result = -0x1.4d4b0a1827064p-134 | 0x0p+0 -+insn wfmdb: -+ v_arg1 = -0x1.da60f596ad0cep+254 | 0x1.52332e0650e33p+966 -+ v_arg2 = 0x1.a042c52ed993cp+215 | 0x1.8f380c84aa133p+204 -+ v_result = -0x1.81aca4bbcbd24p+470 | 0x0p+0 -+insn wfmdb: -+ v_arg1 = -0x1.83d17f11f6aa3p-469 | -0x1.98117efe89b9ep-361 -+ v_arg2 = 0x1.8c445fd46d214p-701 | -0x1.f98118821821cp+596 -+ v_result = -0x0p+0 | 0x0p+0 -+insn vfddb: -+ v_arg1 = -0x1.ecbb48899e0f1p+969 | 0x1.caf175ab352p-20 -+ v_arg2 = -0x1.9455d67f9f79dp+208 | 0x1.bc4a431b04a6fp+482 -+ v_result = 0x1.37f78f2cbe546p+761 | 0x1.087170c12984cp-502 -+insn vfddb: -+ v_arg1 = 0x1.213d83f7082d8p-330 | 0x1.237737a5fa7a6p+548 -+ v_arg2 = 0x1.d96c3df5d6415p-214 | -0x1.8cd56c8cef818p+139 -+ v_result = 0x1.38cf2a1e99e53p-117 | -0x1.780d86d7eff49p+408 -+insn vfddb: -+ v_arg1 = 0x1.9ce332231f317p-915 | -0x1.a58e84e32263ep-1000 -+ v_arg2 = 0x1.23d041c374ad6p-905 | -0x1.33e41797e24ep+986 -+ v_result = 0x1.6a3702fbc252cp-10 | 0x0p+0 -+insn vfddb: -+ v_arg1 = -0x1.26cf3de11efccp-342 | 0x1.3ca733ce42f94p-818 -+ v_arg2 = -0x1.5f5a8f87a6e19p+319 | 0x1.8993c56b2ba2dp+426 -+ v_result = 0x1.ad9a43954644bp-662 | 0x0p+0 -+insn wfddb: -+ v_arg1 = 0x1.bd48489b60731p-114 | 0x1.a760dcf57b74fp-51 -+ v_arg2 = -0x1.171f83409eeb6p-402 | -0x1.e159d1409bdc6p-972 -+ v_result = -0x1.9864f1511f8cp+288 | 0x0p+0 -+insn wfddb: -+ v_arg1 = -0x1.120505ef4606p-637 | -0x1.83f6f775c0eb7p+272 -+ v_arg2 = -0x1.d18ba3872fde1p+298 | 0x1.c60f8d191068cp-454 -+ v_result = 0x1.2d5cdb15a686cp-936 | 0x0p+0 -+insn wfddb: -+ v_arg1 = 0x1.f637f7f8c790fp-97 | -0x1.7bdce4d74947p+189 -+ v_arg2 = -0x1.1c8f2d1b3a2edp-218 | -0x1.55fdfd1840241p-350 -+ v_result = -0x1.c3d0799c1420fp+121 | 0x0p+0 -+insn wfddb: -+ v_arg1 = -0x1.c63b7b2eee253p+250 | 0x1.dfd9dcd8b823fp-125 -+ v_arg2 = 0x1.094a1f1f87e0cp+629 | 0x1.eeaa23c0d7843p-814 -+ v_result = -0x1.b653a10ebdeccp-379 | 0x0p+0 -+insn vfsqdb: -+ v_arg1 = 0x1.f60db25f7066p-703 | -0x1.d43509abca8c3p+631 -+ v_result = 0x1.fb009ab25ec11p-352 | nan -+insn vfsqdb: -+ v_arg1 = -0x1.ecbce2bb2e245p-872 | 0x1.cc9173d132a3bp-290 -+ v_result = nan | 0x1.575fa6778042ep-145 -+insn vfsqdb: -+ v_arg1 = 0x1.9102ffd19ccb3p-205 | -0x1.87e9ee7454345p-374 -+ v_result = 0x1.c51ecb6cc318p-103 | nan -+insn vfsqdb: -+ v_arg1 = 0x1.24e1d7ad32eb5p+499 | -0x1.1c7d22b78039bp+918 -+ v_result = 0x1.833dba0954bccp+249 | nan -+insn wfsqdb: -+ v_arg1 = 0x1.71af4e7f64978p+481 | -0x1.3429dc60011d7p-879 -+ v_result = 0x1.b30fc65551133p+240 | 0x0p+0 -+insn wfsqdb: -+ v_arg1 = 0x1.5410db1c5f403p+173 | 0x1.97fa6581e692fp+108 -+ v_result = 0x1.a144f43a592c1p+86 | 0x0p+0 -+insn wfsqdb: -+ v_arg1 = -0x1.5838027725afep+6 | 0x1.ac61529c11f38p+565 -+ v_result = nan | 0x0p+0 -+insn wfsqdb: -+ v_arg1 = -0x1.159e341dcc06ep-439 | 0x1.ed54ce5481ba5p-574 -+ v_result = nan | 0x0p+0 -+insn vfmadb: -+ v_arg1 = -0x1.eb00a5c503d75p+538 | 0x1.89fae603ddc07p+767 -+ v_arg2 = -0x1.71c72712c3957p+715 | 0x1.1bd5773442feap+762 -+ v_arg3 = 0x1.bd0daed56ada5p+355 | 0x1.618b7cfa37a8bp-935 -+ v_result = 0x1.fffffffffffffp+1023 | 0x1.fffffffffffffp+1023 -+insn vfmadb: -+ v_arg1 = 0x1.2acc8fc4a8115p-394 | -0x1.b0e5a531a368ep+599 -+ v_arg2 = 0x1.7e7c008b06eb6p-26 | -0x1.a3368d351c861p+17 -+ v_arg3 = 0x1.665fcd4adbb82p-991 | 0x1.b27284ea351eap+402 -+ v_result = 0x1.be6dfa3f5b30dp-420 | 0x1.62720e4cb1583p+617 -+insn vfmadb: -+ v_arg1 = -0x1.e66ac8a348fedp-315 | 0x1.8c2ef1e0615c5p+132 -+ v_arg2 = 0x1.01397e671d7fdp+313 | -0x1.97c403198fa76p-750 -+ v_arg3 = -0x1.1568273c73bf1p-843 | 0x1.8f0b6073eadccp+277 -+ v_result = -0x1.e8be715f14671p-2 | 0x1.8f0b6073eadcbp+277 -+insn vfmadb: -+ v_arg1 = -0x1.4afc3142483f9p+706 | 0x1.dd14885973858p+695 -+ v_arg2 = 0x1.ebc6146439945p-726 | -0x1.77a97fce9117p-586 -+ v_arg3 = 0x1.60a3231346326p+102 | -0x1.621f717816614p-653 -+ v_result = 0x1.60a3231346325p+102 | -0x1.5e0a7a3b97e9bp+110 -+insn wfmadb: -+ v_arg1 = 0x1.1cc5b10a14d54p+668 | -0x1.686407390f7d1p+616 -+ v_arg2 = -0x1.bf34549e73246p+676 | -0x1.dc5a34cc470f3p+595 -+ v_arg3 = -0x1.95e0fdcf13974p-811 | -0x1.79c7cc1a8ec83p-558 -+ v_result = -0x1.fffffffffffffp+1023 | 0x0p+0 -+insn wfmadb: -+ v_arg1 = 0x1.138bc1a5d75f8p+713 | -0x1.e226ebba2fe54p+381 -+ v_arg2 = -0x1.081ebb7cc3414p-772 | 0x1.369d99e174fc3p+922 -+ v_arg3 = -0x1.0671c682a5d0cp-1016 | 0x1.03c9530dd0377p+378 -+ v_result = -0x1.1c4933e117d95p-59 | 0x0p+0 -+insn wfmadb: -+ v_arg1 = -0x1.166f0b1fad67bp+64 | -0x1.e9ee8d32e1069p-452 -+ v_arg2 = -0x1.4a235bdd109e2p-65 | 0x1.bacaa96fc7e81p-403 -+ v_arg3 = -0x1.d2e19acf7c4bdp+99 | 0x1.f901130f685adp-963 -+ v_result = -0x1.d2e19acf7c4bcp+99 | 0x0p+0 -+insn wfmadb: -+ v_arg1 = -0x1.77d7bfec863d2p-988 | -0x1.b68029700c6b1p-206 -+ v_arg2 = -0x1.aca05ad00aec1p+737 | 0x1.ac746bd7e216bp+51 -+ v_arg3 = 0x1.17342292078b4p+188 | -0x1.49efaf9392301p+555 -+ v_result = 0x1.17342292078b4p+188 | 0x0p+0 -+insn vfmsdb: -+ v_arg1 = -0x1.a1b218e84e61p+34 | 0x1.b220f0d144daep-111 -+ v_arg2 = 0x1.564fcc2527961p-265 | 0x1.ea85a4154721ep+733 -+ v_arg3 = 0x1.a6c16c3dc593cp-1012 | -0x1.ba15ae51a252bp+979 -+ v_result = -0x1.1743102949c9bp-230 | 0x1.ba15ae51a252bp+979 -+insn vfmsdb: -+ v_arg1 = 0x1.f13a61419bc27p+603 | -0x1.f671d1b532c7fp+668 -+ v_arg2 = -0x1.68f38da70d3cdp+145 | 0x1.7b7d4b8a38256p+87 -+ v_arg3 = -0x1.4830d858cdf7dp-522 | -0x1.ecdfb36fb2682p+537 -+ v_result = -0x1.5e89932819567p+749 | -0x1.746835a6a3d29p+756 -+insn vfmsdb: -+ v_arg1 = -0x1.82f8829619ba4p+274 | -0x1.886bc5356fc9fp+4 -+ v_arg2 = 0x1.ae0143a6fff31p-759 | 0x1.08e9ddebff9acp-192 -+ v_arg3 = 0x1.a1c5f6283d74p+602 | 0x1.60722d2eadabcp+573 -+ v_result = -0x1.a1c5f6283d74p+602 | -0x1.60722d2eadabcp+573 -+insn vfmsdb: -+ v_arg1 = -0x1.6efc50de44d76p-235 | -0x1.546b6a9202facp+17 -+ v_arg2 = 0x1.023eb4e92d296p-593 | 0x1.6c05c52e8d255p-408 -+ v_arg3 = -0x1.54cc2efc022a8p+360 | 0x1.9ae520664c8abp+486 -+ v_result = 0x1.54cc2efc022a7p+360 | -0x1.9ae520664c8abp+486 -+insn wfmsdb: -+ v_arg1 = -0x1.7499a639673a6p-100 | -0x1.2a0d737e6cb1cp-207 -+ v_arg2 = -0x1.01ad4670a7aa3p-911 | 0x1.f94385e1021e8p+317 -+ v_arg3 = 0x1.aa42b2bb17af9p+982 | 0x1.c550e471711p+786 -+ v_result = -0x1.aa42b2bb17af8p+982 | 0x0p+0 -+insn wfmsdb: -+ v_arg1 = 0x1.76840f99b431ep+500 | -0x1.989a500c92c08p+594 -+ v_arg2 = 0x1.33c657cb8385cp-84 | -0x1.2c795ad92ce17p+807 -+ v_arg3 = -0x1.ee58a39f02d54p-351 | -0x1.18695ed9a280ap+48 -+ v_result = 0x1.c242894a0068p+416 | 0x0p+0 -+insn wfmsdb: -+ v_arg1 = -0x1.16db07e054a65p-469 | -0x1.3a627ab99c6e4p+689 -+ v_arg2 = 0x1.17872eae826e5p-538 | 0x1.44ed513fb5873p-929 -+ v_arg3 = 0x1.5ca912008e077p-217 | -0x1.982a6f7359876p-23 -+ v_result = -0x1.5ca912008e077p-217 | 0x0p+0 -+insn wfmsdb: -+ v_arg1 = -0x1.d315f4a932c6p+122 | 0x1.616a04493e143p+513 -+ v_arg2 = -0x1.cf1cd3516f23fp+552 | 0x1.7121749c3932cp-750 -+ v_arg3 = 0x1.dc26d92304d7fp-192 | -0x1.1fc3cca9ec20ep+371 -+ v_result = 0x1.a67ca6ba395bcp+675 | 0x0p+0 -+insn wfcdb: -+ v_arg1 = 0x1.302001b736011p-633 | -0x1.72d5300225c97p-468 -+ v_arg2 = -0x1.8c007c5aba108p-17 | -0x1.bb3f9ae136acdp+569 -+ r_result = 0000000000000002 -+insn wfcdb: -+ v_arg1 = -0x1.56248d3fff55ap-440 | -0x1.83340f6a06bedp-612 -+ v_arg2 = 0x1.5b62caabf4e3ep-302 | 0x1.0465808809e02p+199 -+ r_result = 0000000000000001 -+insn wfcdb: -+ v_arg1 = 0x1.7cca43b8250bap-969 | 0x1.a2ae4e71459b3p+792 -+ v_arg2 = -0x1.2178959d8e9fbp-238 | -0x1.1180e41cc8654p+609 -+ r_result = 0000000000000002 -+insn wfcdb: -+ v_arg1 = 0x1.96f03c4f3ec0dp-774 | 0x1.a86fcf7f54875p+448 -+ v_arg2 = -0x1.a61696da8f939p-732 | -0x1.969b12babcde9p+239 -+ r_result = 0000000000000002 -+insn wfkdb: -+ v_arg1 = -0x1.af19141b6194ep-304 | 0x1.6f34172e4ec9ap+281 -+ v_arg2 = -0x1.903d268d15b8dp-496 | 0x1.132593e7a3848p+663 -+ r_result = 0000000000000001 -+insn wfkdb: -+ v_arg1 = -0x1.52e78ae61bf57p-979 | -0x1.8132c8874542ap+264 -+ v_arg2 = -0x1.7274a70a201eep+729 | 0x1.ee05a55085e12p-508 -+ r_result = 0000000000000002 -+insn wfkdb: -+ v_arg1 = -0x1.6f8a0ed73189ep-27 | -0x1.93db112e3a289p-560 -+ v_arg2 = -0x1.a699712dab56fp-677 | 0x1.5170475506fc8p-437 -+ r_result = 0000000000000001 -+insn wfkdb: -+ v_arg1 = -0x1.5d56e841d7af8p+346 | -0x1.e40064ce1ce3bp-1012 -+ v_arg2 = 0x1.79e790363d4ffp+888 | 0x1.97168873bee8ap-323 -+ r_result = 0000000000000001 -+insn vfcedb: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = 0x1.8c48762fd0b58p+38 | 0x1.c1f5c994768a1p-819 -+ v_arg2 = -0x1.08f71db17132ep+914 | 0x1.a3d14196177d5p-229 -+insn vfcedb: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = 0x1.4f88d97dc8b9p+73 | 0x1.6d3a343e053bap+356 -+ v_arg2 = -0x1.5bc7cd97d3ee9p+135 | 0x1.641d521c77b43p-114 -+insn vfcedb: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.b9ce020750f0dp-494 | -0x1.c0d4939228ce1p-82 -+ v_arg2 = -0x1.61ad6a28bf43bp-656 | 0x1.b7973bba1ff4dp-877 -+insn vfcedb: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = 0x1.d8e5c9930c19dp+623 | -0x1.cf1facff4e194p-605 -+ v_arg2 = -0x1.ed6ba02646d0dp+441 | -0x1.2d677e710620bp+810 -+insn wfcedb: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.a252009e1a12cp-442 | 0x1.4dc608268bb29p-513 -+ v_arg2 = -0x1.81020aa1a36e6p-687 | -0x1.300e64ce414f1p-899 -+insn wfcedb: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = 0x1.cec439a8d4781p-175 | -0x1.d20e3b281d599p+893 -+ v_arg2 = 0x1.ca17cf16cf0aap-879 | 0x1.61506f8596092p+545 -+insn wfcedb: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = 0x1.0659f5f24a004p+877 | 0x1.fc46867ed0338p-680 -+ v_arg2 = -0x1.1d6849587155ep-1010 | -0x1.f68171edc235fp+575 -+insn wfcedb: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = 0x1.dc88a0d46ad79p-816 | 0x1.245140dcaed79p+851 -+ v_arg2 = 0x1.b33e977c7b3ep-818 | -0x1.04319d7c69367p+787 -+insn vfcedbs: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.ac196c30148c5p-498 | -0x1.a58093963d1aep+355 -+ v_arg2 = 0x1.d321b63762fb1p+28 | -0x1.9a68be31efa17p-143 -+ r_result = 0000000000000003 -+insn vfcedbs: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = -0x1.b3657c390dfa7p-452 | 0x1.8a62662f245c4p+1010 -+ v_arg2 = -0x1.70208c68a03aep+974 | 0x1.a0729665a79fap+667 -+ r_result = 0000000000000003 -+insn vfcedbs: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = 0x1.3ff1b361c377ep-846 | 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-0x1.2148e5bdb7c09p-517 | 0x1.1b2689f7c01b1p-502 -+ r_result = 0000000000000003 -+insn vftcidb2048: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = 0x1.48b9851b82d7cp-589 | 0x1.86f1e1a36bdd4p-930 -+ r_result = 0000000000000003 -+insn vftcidb2048: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = 0x1.8b45cbb7947aep-572 | -0x1.c478ca5bd9d0cp-274 -+ r_result = 0000000000000003 -+insn vftcidb2048: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = 0x1.651f3ea4ff449p-18 | 0x1.381d68603b1edp+264 -+ r_result = 0000000000000003 -+insn vftcidb2048: -+ v_result = 0000000000000000 | 0000000000000000 -+ v_arg1 = 0x1.7d9f2d51b7851p+653 | 0x1.4da616b63e42ap-415 -+ r_result = 0000000000000003 -Index: valgrind-3.14.0/none/tests/s390x/vector_float.vgtest -=================================================================== ---- /dev/null -+++ valgrind-3.14.0/none/tests/s390x/vector_float.vgtest -@@ -0,0 +1,2 @@ -+prog: vector_float -+prereq: test -e vector_float && ../../../tests/s390x_features s390x-vx diff --git a/0001-Bug-397187-s390x-Add-vector-register-support-for-vgd.patch b/0001-Bug-397187-s390x-Add-vector-register-support-for-vgd.patch deleted file mode 100644 index b0fbec6..0000000 --- a/0001-Bug-397187-s390x-Add-vector-register-support-for-vgd.patch +++ /dev/null @@ -1,402 +0,0 @@ -From 50bd2282bce101012a5668b670cb185375600d2d Mon Sep 17 00:00:00 2001 -From: Andreas Arnez -Date: Thu, 18 Oct 2018 17:51:57 +0200 -Subject: [PATCH] Bug 397187 s390x: Add vector register support for vgdb - -On s390x machines with a vector facility, Valgrind's gdbserver didn't -represent the vector registers. This is fixed. ---- - NEWS | 1 + - coregrind/Makefile.am | 5 + - coregrind/m_gdbserver/s390-vx-valgrind-s1.xml | 43 ++++++++ - coregrind/m_gdbserver/s390-vx-valgrind-s2.xml | 43 ++++++++ - coregrind/m_gdbserver/s390-vx.xml | 59 +++++++++++ - .../m_gdbserver/s390x-vx-linux-valgrind.xml | 28 ++++++ - coregrind/m_gdbserver/s390x-vx-linux.xml | 18 ++++ - coregrind/m_gdbserver/valgrind-low-s390x.c | 97 +++++++++++++++++-- - 8 files changed, 288 insertions(+), 6 deletions(-) - create mode 100644 coregrind/m_gdbserver/s390-vx-valgrind-s1.xml - create mode 100644 coregrind/m_gdbserver/s390-vx-valgrind-s2.xml - create mode 100644 coregrind/m_gdbserver/s390-vx.xml - create mode 100644 coregrind/m_gdbserver/s390x-vx-linux-valgrind.xml - create mode 100644 coregrind/m_gdbserver/s390x-vx-linux.xml - -Index: valgrind-3.14.0/coregrind/Makefile.am -=================================================================== ---- valgrind-3.14.0.orig/coregrind/Makefile.am -+++ valgrind-3.14.0/coregrind/Makefile.am -@@ -681,6 +681,11 @@ GDBSERVER_XML_FILES = \ - m_gdbserver/s390x-linux64-valgrind-s1.xml \ - m_gdbserver/s390x-linux64-valgrind-s2.xml \ - m_gdbserver/s390x-linux64.xml \ -+ m_gdbserver/s390-vx-valgrind-s1.xml \ -+ m_gdbserver/s390-vx-valgrind-s2.xml \ -+ m_gdbserver/s390-vx.xml \ -+ m_gdbserver/s390x-vx-linux-valgrind.xml \ -+ m_gdbserver/s390x-vx-linux.xml \ - m_gdbserver/mips-cp0-valgrind-s1.xml \ - m_gdbserver/mips-cp0-valgrind-s2.xml \ - m_gdbserver/mips-cp0.xml \ -Index: valgrind-3.14.0/coregrind/m_gdbserver/s390-vx-valgrind-s1.xml -=================================================================== ---- /dev/null -+++ valgrind-3.14.0/coregrind/m_gdbserver/s390-vx-valgrind-s1.xml -@@ -0,0 +1,43 @@ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -Index: valgrind-3.14.0/coregrind/m_gdbserver/s390-vx-valgrind-s2.xml -=================================================================== ---- /dev/null -+++ valgrind-3.14.0/coregrind/m_gdbserver/s390-vx-valgrind-s2.xml -@@ -0,0 +1,43 @@ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -Index: valgrind-3.14.0/coregrind/m_gdbserver/s390-vx.xml -=================================================================== ---- /dev/null -+++ valgrind-3.14.0/coregrind/m_gdbserver/s390-vx.xml -@@ -0,0 +1,59 @@ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -Index: valgrind-3.14.0/coregrind/m_gdbserver/s390x-vx-linux-valgrind.xml -=================================================================== ---- /dev/null -+++ valgrind-3.14.0/coregrind/m_gdbserver/s390x-vx-linux-valgrind.xml -@@ -0,0 +1,28 @@ -+ -+ -+ -+ -+ -+ -+ -+ s390:64-bit -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -Index: valgrind-3.14.0/coregrind/m_gdbserver/s390x-vx-linux.xml -=================================================================== ---- /dev/null -+++ valgrind-3.14.0/coregrind/m_gdbserver/s390x-vx-linux.xml -@@ -0,0 +1,18 @@ -+ -+ -+ -+ -+ -+ -+ -+ s390:64-bit -+ -+ -+ -+ -+ -+ -Index: valgrind-3.14.0/coregrind/m_gdbserver/valgrind-low-s390x.c -=================================================================== ---- valgrind-3.14.0.orig/coregrind/m_gdbserver/valgrind-low-s390x.c -+++ valgrind-3.14.0/coregrind/m_gdbserver/valgrind-low-s390x.c -@@ -88,9 +88,42 @@ static struct reg regs[] = { - { "f14", 2592, 64 }, - { "f15", 2656, 64 }, - { "orig_r2", 2720, 64 }, -+ { "v0l", 2784, 64 }, -+ { "v1l", 2848, 64 }, -+ { "v2l", 2912, 64 }, -+ { "v3l", 2976, 64 }, -+ { "v4l", 3040, 64 }, -+ { "v5l", 3104, 64 }, -+ { "v6l", 3168, 64 }, -+ { "v7l", 3232, 64 }, -+ { "v8l", 3296, 64 }, -+ { "v9l", 3360, 64 }, -+ { "v10l", 3424, 64 }, -+ { "v11l", 3488, 64 }, -+ { "v12l", 3552, 64 }, -+ { "v13l", 3616, 64 }, -+ { "v14l", 3680, 64 }, -+ { "v15l", 3744, 64 }, -+ { "v16", 3808, 128 }, -+ { "v17", 3936, 128 }, -+ { "v18", 4064, 128 }, -+ { "v19", 4192, 128 }, -+ { "v20", 4320, 128 }, -+ { "v21", 4448, 128 }, -+ { "v22", 4576, 128 }, -+ { "v23", 4704, 128 }, -+ { "v24", 4832, 128 }, -+ { "v25", 4960, 128 }, -+ { "v26", 5088, 128 }, -+ { "v27", 5216, 128 }, -+ { "v28", 5344, 128 }, -+ { "v29", 5472, 128 }, -+ { "v30", 5600, 128 }, -+ { "v31", 5728, 128 }, - }; - static const char *expedite_regs[] = { "r14", "r15", "pswa", 0 }; --#define num_regs (sizeof (regs) / sizeof (regs[0])) -+#define num_regs_all (sizeof (regs) / sizeof (regs[0])) -+static int num_regs; - - static - CORE_ADDR get_pc (void) -@@ -165,7 +198,7 @@ void transfer_register (ThreadId tid, in - case 32: VG_(transfer) (&s390x->guest_a14, buf, dir, size, mod); break; - case 33: VG_(transfer) (&s390x->guest_a15, buf, dir, size, mod); break; - case 34: VG_(transfer) (&s390x->guest_fpc, buf, dir, size, mod); break; -- case 35: VG_(transfer) (&s390x->guest_v0, buf, dir, size, mod); break; -+ case 35: VG_(transfer) (&s390x->guest_v0.w64[0], buf, dir, size, mod); break; - case 36: VG_(transfer) (&s390x->guest_v1.w64[0], buf, dir, size, mod); break; - case 37: VG_(transfer) (&s390x->guest_v2.w64[0], buf, dir, size, mod); break; - case 38: VG_(transfer) (&s390x->guest_v3.w64[0], buf, dir, size, mod); break; -@@ -182,18 +215,65 @@ void transfer_register (ThreadId tid, in - case 49: VG_(transfer) (&s390x->guest_v14.w64[0], buf, dir, size, mod); break; - case 50: VG_(transfer) (&s390x->guest_v15.w64[0], buf, dir, size, mod); break; - case 51: *mod = False; break; //GDBTD??? { "orig_r2", 0, 64 }, -+ case 52: VG_(transfer) (&s390x->guest_v0.w64[1], buf, dir, size, mod); break; -+ case 53: VG_(transfer) (&s390x->guest_v1.w64[1], buf, dir, size, mod); break; -+ case 54: VG_(transfer) (&s390x->guest_v2.w64[1], buf, dir, size, mod); break; -+ case 55: VG_(transfer) (&s390x->guest_v3.w64[1], buf, dir, size, mod); break; -+ case 56: VG_(transfer) (&s390x->guest_v4.w64[1], buf, dir, size, mod); break; -+ case 57: VG_(transfer) (&s390x->guest_v5.w64[1], buf, dir, size, mod); break; -+ case 58: VG_(transfer) (&s390x->guest_v6.w64[1], buf, dir, size, mod); break; -+ case 59: VG_(transfer) (&s390x->guest_v7.w64[1], buf, dir, size, mod); break; -+ case 60: VG_(transfer) (&s390x->guest_v8.w64[1], buf, dir, size, mod); break; -+ case 61: VG_(transfer) (&s390x->guest_v9.w64[1], buf, dir, size, mod); break; -+ case 62: VG_(transfer) (&s390x->guest_v10.w64[1], buf, dir, size, mod); break; -+ case 63: VG_(transfer) (&s390x->guest_v11.w64[1], buf, dir, size, mod); break; -+ case 64: VG_(transfer) (&s390x->guest_v12.w64[1], buf, dir, size, mod); break; -+ case 65: VG_(transfer) (&s390x->guest_v13.w64[1], buf, dir, size, mod); break; -+ case 66: VG_(transfer) (&s390x->guest_v14.w64[1], buf, dir, size, mod); break; -+ case 67: VG_(transfer) (&s390x->guest_v15.w64[1], buf, dir, size, mod); break; -+ case 68: VG_(transfer) (&s390x->guest_v16, buf, dir, size, mod); break; -+ case 69: VG_(transfer) (&s390x->guest_v17, buf, dir, size, mod); break; -+ case 70: VG_(transfer) (&s390x->guest_v18, buf, dir, size, mod); break; -+ case 71: VG_(transfer) (&s390x->guest_v19, buf, dir, size, mod); break; -+ case 72: VG_(transfer) (&s390x->guest_v20, buf, dir, size, mod); break; -+ case 73: VG_(transfer) (&s390x->guest_v21, buf, dir, size, mod); break; -+ case 74: VG_(transfer) (&s390x->guest_v22, buf, dir, size, mod); break; -+ case 75: VG_(transfer) (&s390x->guest_v23, buf, dir, size, mod); break; -+ case 76: VG_(transfer) (&s390x->guest_v24, buf, dir, size, mod); break; -+ case 77: VG_(transfer) (&s390x->guest_v25, buf, dir, size, mod); break; -+ case 78: VG_(transfer) (&s390x->guest_v26, buf, dir, size, mod); break; -+ case 79: VG_(transfer) (&s390x->guest_v27, buf, dir, size, mod); break; -+ case 80: VG_(transfer) (&s390x->guest_v28, buf, dir, size, mod); break; -+ case 81: VG_(transfer) (&s390x->guest_v29, buf, dir, size, mod); break; -+ case 82: VG_(transfer) (&s390x->guest_v30, buf, dir, size, mod); break; -+ case 83: VG_(transfer) (&s390x->guest_v31, buf, dir, size, mod); break; - default: vg_assert(0); - } - } - - static -+Bool have_vx (void) -+{ -+ VexArch va; -+ VexArchInfo vai; -+ VG_(machine_get_VexArchInfo) (&va, &vai); -+ return (vai.hwcaps & VEX_HWCAPS_S390X_VX) != 0; -+} -+ -+static - const char* target_xml (Bool shadow_mode) - { - if (shadow_mode) { -- return "s390x-generic-valgrind.xml"; -+ if (have_vx()) -+ return "s390x-vx-linux-valgrind.xml"; -+ else -+ return "s390x-generic-valgrind.xml"; - } else { -- return "s390x-generic.xml"; -- } -+ if (have_vx()) -+ return "s390x-vx-linux.xml"; -+ else -+ return "s390x-generic.xml"; -+ } - } - - static CORE_ADDR** target_get_dtv (ThreadState *tst) -@@ -206,7 +286,7 @@ static CORE_ADDR** target_get_dtv (Threa - } - - static struct valgrind_target_ops low_target = { -- num_regs, -+ -1, // Override at init time. - regs, - 17, //sp = r15, which is register offset 17 in regs - transfer_register, -@@ -220,6 +300,11 @@ static struct valgrind_target_ops low_ta - void s390x_init_architecture (struct valgrind_target_ops *target) - { - *target = low_target; -+ if (have_vx()) -+ num_regs = num_regs_all; -+ else -+ num_regs = num_regs_all - 32; // Remove all VX registers. -+ target->num_regs = num_regs; - set_register_cache (regs, num_regs); - gdbserver_expedite_regs = expedite_regs; - } diff --git a/0001-Bug-399444-s390x-Drop-unnecessary-check-in-s390_irge.patch b/0001-Bug-399444-s390x-Drop-unnecessary-check-in-s390_irge.patch deleted file mode 100644 index dae8d73..0000000 --- a/0001-Bug-399444-s390x-Drop-unnecessary-check-in-s390_irge.patch +++ /dev/null @@ -1,42 +0,0 @@ -From ca2f73592e8e74a5328df0a65e0831bc1fc6dd28 Mon Sep 17 00:00:00 2001 -From: Andreas Arnez -Date: Tue, 9 Oct 2018 11:22:27 +0200 -Subject: [PATCH] Bug 399444 s390x: Drop unnecessary check in s390_irgen_VSLDB - -In s390_irgen_VSLDB there was special handling for the case that the -immediate operand i4 has the value 16, which would mean that the result v1 -were a full copy of the third operand v3. However, this is impossible -because i4 can only assume values from 0 to 15; thus the special handling -can be removed. ---- - VEX/priv/guest_s390_toIR.c | 13 ++++--------- - 1 file changed, 4 insertions(+), 9 deletions(-) - -diff --git a/VEX/priv/guest_s390_toIR.c b/VEX/priv/guest_s390_toIR.c -index c594ad51b..60b608138 100644 ---- a/VEX/priv/guest_s390_toIR.c -+++ b/VEX/priv/guest_s390_toIR.c -@@ -17400,16 +17400,11 @@ s390_irgen_VSLDB(UChar v1, UChar v2, UChar v3, UChar i4) - { - UChar imm = i4 & 0b00001111; - -- if (imm == 0) -- { -+ if (imm == 0) { -+ /* Just copy v2. */ - put_vr_qw(v1, get_vr_qw(v2)); -- } -- else if (imm == 16) -- { -- put_vr_qw(v1, get_vr_qw(v3)); -- } -- else -- { -+ } else { -+ /* Concatenate v2's tail with v3's head. */ - put_vr_qw(v1, - binop(Iop_OrV128, - binop(Iop_ShlV128, get_vr_qw(v2), mkU8(imm * 8)), --- -2.20.1 - diff --git a/0001-Bug-400490-s390x-Fix-register-allocation-for-VRs-vs-.patch b/0001-Bug-400490-s390x-Fix-register-allocation-for-VRs-vs-.patch deleted file mode 100644 index 69fe371..0000000 --- a/0001-Bug-400490-s390x-Fix-register-allocation-for-VRs-vs-.patch +++ /dev/null @@ -1,87 +0,0 @@ -From 71002d8a5111d02ce8049c55017a8d948c820e35 Mon Sep 17 00:00:00 2001 -From: Andreas Arnez -Date: Thu, 25 Oct 2018 13:47:12 +0200 -Subject: [PATCH] Bug 400490 s390x: Fix register allocation for VRs vs FPRs - -On s390x, if vector registers are available, they are fed to the register -allocator as if they were separate from the floating-point registers. But -in fact the FPRs are embedded in the VRs. So for instance, if both f3 and -v3 are allocated and used at the same time, corruption will result. - -This is fixed by offering only the non-overlapping VRs, v16 to v31, to the -register allocator instead. ---- - NEWS | 1 + - VEX/priv/host_s390_defs.c | 17 +++++++---------- - 2 files changed, 8 insertions(+), 10 deletions(-) - -Index: valgrind-3.14.0/VEX/priv/host_s390_defs.c -=================================================================== ---- valgrind-3.14.0.orig/VEX/priv/host_s390_defs.c -+++ valgrind-3.14.0/VEX/priv/host_s390_defs.c -@@ -59,7 +59,6 @@ static UInt s390_tchain_load64_len(void) - - /* A mapping from register number to register index */ - static Int gpr_index[16]; // GPR regno -> register index --static Int fpr_index[16]; // FPR regno -> register index - static Int vr_index[32]; // VR regno -> register index - - HReg -@@ -73,7 +72,7 @@ s390_hreg_gpr(UInt regno) - HReg - s390_hreg_fpr(UInt regno) - { -- Int ix = fpr_index[regno]; -+ Int ix = vr_index[regno]; - vassert(ix >= 0); - return mkHReg(/*virtual*/False, HRcFlt64, regno, ix); - } -@@ -463,11 +462,9 @@ getRRegUniverse_S390(void) - - RRegUniverse__init(ru); - -- /* Assign invalid values to the gpr/fpr/vr_index */ -+ /* Assign invalid values to the gpr/vr_index */ - for (UInt i = 0; i < sizeof gpr_index / sizeof gpr_index[0]; ++i) - gpr_index[i] = -1; -- for (UInt i = 0; i < sizeof fpr_index / sizeof fpr_index[0]; ++i) -- fpr_index[i] = -1; - for (UInt i = 0; i < sizeof vr_index / sizeof vr_index[0]; ++i) - vr_index[i] = -1; - -@@ -494,17 +491,17 @@ getRRegUniverse_S390(void) - - ru->allocable_start[HRcFlt64] = ru->size; - for (UInt regno = 8; regno <= 15; ++regno) { -- fpr_index[regno] = ru->size; -+ vr_index[regno] = ru->size; - ru->regs[ru->size++] = s390_hreg_fpr(regno); - } - for (UInt regno = 0; regno <= 7; ++regno) { -- fpr_index[regno] = ru->size; -+ vr_index[regno] = ru->size; - ru->regs[ru->size++] = s390_hreg_fpr(regno); - } - ru->allocable_end[HRcFlt64] = ru->size - 1; - - ru->allocable_start[HRcVec128] = ru->size; -- for (UInt regno = 0; regno <= 31; ++regno) { -+ for (UInt regno = 16; regno <= 31; ++regno) { - vr_index[regno] = ru->size; - ru->regs[ru->size++] = s390_hreg_vr(regno); - } -@@ -527,12 +524,12 @@ getRRegUniverse_S390(void) - /* Sanity checking */ - for (UInt i = 0; i < sizeof gpr_index / sizeof gpr_index[0]; ++i) - vassert(gpr_index[i] >= 0); -- for (UInt i = 0; i < sizeof fpr_index / sizeof fpr_index[0]; ++i) -- vassert(fpr_index[i] >= 0); - for (UInt i = 0; i < sizeof vr_index / sizeof vr_index[0]; ++i) - vassert(vr_index[i] >= 0); - - initialised = True; -+ -+ RRegUniverse__check_is_sane(ru); - return ru; - } - diff --git a/0001-Bug-400491-s390x-Sign-extend-immediate-operand-of-LO.patch b/0001-Bug-400491-s390x-Sign-extend-immediate-operand-of-LO.patch deleted file mode 100644 index f21c938..0000000 --- a/0001-Bug-400491-s390x-Sign-extend-immediate-operand-of-LO.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 9545e9f96beda6e9f2205bdb3c3e96edaf8d9e2b Mon Sep 17 00:00:00 2001 -From: Andreas Arnez -Date: Tue, 30 Oct 2018 17:06:38 +0100 -Subject: [PATCH] Bug 400491 s390x: Sign-extend immediate operand of LOCHI and - friends - -The VEX implementation of each of the z/Architecture instructions LOCHI, -LOCHHI, and LOCGHI treats the immediate 16-bit operand as an unsigned -integer instead of a signed integer. This is fixed. ---- - NEWS | 1 + - VEX/priv/guest_s390_toIR.c | 6 +++--- - 2 files changed, 4 insertions(+), 3 deletions(-) - -Index: valgrind-3.14.0/VEX/priv/guest_s390_toIR.c -=================================================================== ---- valgrind-3.14.0.orig/VEX/priv/guest_s390_toIR.c -+++ valgrind-3.14.0/VEX/priv/guest_s390_toIR.c -@@ -16307,7 +16307,7 @@ static const HChar * - s390_irgen_LOCHHI(UChar r1, UChar m3, UShort i2, UChar unused) - { - next_insn_if(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0))); -- put_gpr_w0(r1, mkU32(i2)); -+ put_gpr_w0(r1, mkU32((UInt)(Int)(Short)i2)); - - return "lochhi"; - } -@@ -16316,7 +16316,7 @@ static const HChar * - s390_irgen_LOCHI(UChar r1, UChar m3, UShort i2, UChar unused) - { - next_insn_if(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0))); -- put_gpr_w1(r1, mkU32(i2)); -+ put_gpr_w1(r1, mkU32((UInt)(Int)(Short)i2)); - - return "lochi"; - } -@@ -16325,7 +16325,7 @@ static const HChar * - s390_irgen_LOCGHI(UChar r1, UChar m3, UShort i2, UChar unused) - { - next_insn_if(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0))); -- put_gpr_dw0(r1, mkU64(i2)); -+ put_gpr_dw0(r1, mkU64((UInt)(Int)(Short)i2)); - - return "locghi"; - } diff --git a/0001-Bug-402519-POWER-3.0-addex-instruction-incorrectly-i.patch b/0001-Bug-402519-POWER-3.0-addex-instruction-incorrectly-i.patch deleted file mode 100644 index 918b39e..0000000 --- a/0001-Bug-402519-POWER-3.0-addex-instruction-incorrectly-i.patch +++ /dev/null @@ -1,273 +0,0 @@ -From 35f3014237dc198356438b167725c6bec8b5bcaf Mon Sep 17 00:00:00 2001 -From: Mark Wielaard -Date: Mon, 31 Dec 2018 22:26:31 +0100 -Subject: [PATCH] Bug 402519 - POWER 3.0 addex instruction incorrectly - implemented - -References: bsc#1121025 -Patch-mainline: 3.15 -Git-commit: 2c1f016e634bf79faf45e81c14c955c711bc202f - -addex uses OV as carry in and carry out. For all other instructions -OV is the signed overflow flag. And instructions like adde use CA -as carry. - -Replace set_XER_OV_OV32 with set_XER_OV_OV32_ADDEX, which will -call calculate_XER_CA_64 and calculate_XER_CA_32, but with OV -as input, and sets OV and OV32. - -Enable test_addex in none/tests/ppc64/test_isa_3_0.c and update -the expected output. test_addex would fail to match the expected -output before this patch. -Acked-by: Michal Suchanek ---- - NEWS | 1 + - VEX/priv/guest_ppc_toIR.c | 52 ++++++++++++------- - none/tests/ppc64/test_isa_3_0.c | 3 +- - .../ppc64/test_isa_3_0_other.stdout.exp-LE | 36 ++++++++----- - 4 files changed, 58 insertions(+), 34 deletions(-) - -diff --git a/NEWS b/NEWS -index 91e572e8d031..49df52158fa9 100644 ---- a/NEWS -+++ b/NEWS -@@ -174,6 +174,7 @@ where XXXXXX is the bug number as listed below. - 397424 glibc 2.27 and gdb_server tests - 398028 Assertion `cfsi_fits` failing in simple C program - 398066 s390x: cgijl dep1, 0 reports false unitialised values warning -+402519 POWER 3.0 addex instruction incorrectly implemented - - n-i-bz Fix missing workq_ops operations (macOS) - n-i-bz fix bug in strspn replacement -diff --git a/VEX/priv/guest_ppc_toIR.c b/VEX/priv/guest_ppc_toIR.c -index cb1cae176af3..b6f4a6cde30f 100644 ---- a/VEX/priv/guest_ppc_toIR.c -+++ b/VEX/priv/guest_ppc_toIR.c -@@ -2622,21 +2622,6 @@ static void copy_OV_to_OV32( void ) { - putXER_OV32( getXER_OV() ); - } - --static void set_XER_OV_OV32 ( IRType ty, UInt op, IRExpr* res, -- IRExpr* argL, IRExpr* argR ) --{ -- if (ty == Ity_I32) { -- set_XER_OV_OV32_32( op, res, argL, argR ); -- } else { -- IRExpr* xer_ov_32; -- set_XER_OV_64( op, res, argL, argR ); -- xer_ov_32 = calculate_XER_OV_32( op, unop(Iop_64to32, res), -- unop(Iop_64to32, argL), -- unop(Iop_64to32, argR)); -- putXER_OV32( unop(Iop_32to8, xer_ov_32) ); -- } --} -- - static void set_XER_OV_OV32_SO ( IRType ty, UInt op, IRExpr* res, - IRExpr* argL, IRExpr* argR ) - { -@@ -2982,6 +2967,33 @@ static void set_XER_CA_CA32 ( IRType ty, UInt op, IRExpr* res, - } - } - -+/* Used only by addex instruction, which uses and sets OV as carry. */ -+static void set_XER_OV_OV32_ADDEX ( IRType ty, IRExpr* res, -+ IRExpr* argL, IRExpr* argR, -+ IRExpr* old_ov ) -+{ -+ if (ty == Ity_I32) { -+ IRTemp xer_ov = newTemp(Ity_I32); -+ assign ( xer_ov, unop(Iop_32to8, -+ calculate_XER_CA_32( PPCG_FLAG_OP_ADDE, -+ res, argL, argR, old_ov ) ) ); -+ putXER_OV( mkexpr (xer_ov) ); -+ putXER_OV32( mkexpr (xer_ov) ); -+ } else { -+ IRExpr *xer_ov; -+ IRExpr* xer_ov_32; -+ xer_ov = calculate_XER_CA_64( PPCG_FLAG_OP_ADDE, -+ res, argL, argR, old_ov ); -+ putXER_OV( unop(Iop_32to8, xer_ov) ); -+ xer_ov_32 = calculate_XER_CA_32( PPCG_FLAG_OP_ADDE, -+ unop(Iop_64to32, res), -+ unop(Iop_64to32, argL), -+ unop(Iop_64to32, argR), -+ unop(Iop_64to32, old_ov) ); -+ putXER_OV32( unop(Iop_32to8, xer_ov_32) ); -+ } -+} -+ - - - /*------------------------------------------------------------*/ -@@ -5071,16 +5083,18 @@ static Bool dis_int_arith ( UInt theInstr ) - } - - case 0xAA: {// addex (Add Extended alternate carry bit Z23-form) -+ IRTemp old_xer_ov = newTemp(ty); - DIP("addex r%u,r%u,r%u,%d\n", rD_addr, rA_addr, rB_addr, (Int)flag_OE); -+ assign( old_xer_ov, mkWidenFrom32(ty, getXER_OV_32(), False) ); - assign( rD, binop( mkSzOp(ty, Iop_Add8), mkexpr(rA), - binop( mkSzOp(ty, Iop_Add8), mkexpr(rB), -- mkWidenFrom8( ty, getXER_OV(), False ) ) ) ); -+ mkexpr(old_xer_ov) ) ) ); - - /* CY bit is same as OE bit */ - if (flag_OE == 0) { -- /* Exception, do not set SO bit */ -- set_XER_OV_OV32( ty, PPCG_FLAG_OP_ADDE, -- mkexpr(rD), mkexpr(rA), mkexpr(rB) ); -+ /* Exception, do not set SO bit and set OV from carry. */ -+ set_XER_OV_OV32_ADDEX( ty, mkexpr(rD), mkexpr(rA), mkexpr(rB), -+ mkexpr(old_xer_ov) ); - } else { - /* CY=1, 2 and 3 (AKA flag_OE) are reserved */ - vex_printf("addex instruction, CY = %d is reserved.\n", flag_OE); -diff --git a/none/tests/ppc64/test_isa_3_0.c b/none/tests/ppc64/test_isa_3_0.c -index 2d13505767f9..1c2cda361d04 100644 ---- a/none/tests/ppc64/test_isa_3_0.c -+++ b/none/tests/ppc64/test_isa_3_0.c -@@ -286,7 +286,7 @@ static test_list_t testgroup_ia_ops_two[] = { - { &test_moduw, "moduw" }, - { &test_modsd, "modsd" }, - { &test_modud, "modud" }, -- //{ &test_addex, "addex" }, -+ { &test_addex, "addex" }, - { NULL , NULL }, - }; - -@@ -2741,7 +2741,6 @@ static void testfunction_gpr_vector_logical_one (const char* instruction_name, - * rt, xa - */ - int i; -- int t; - volatile HWord_t res; - - VERBOSE_FUNCTION_CALLOUT -diff --git a/none/tests/ppc64/test_isa_3_0_other.stdout.exp-LE b/none/tests/ppc64/test_isa_3_0_other.stdout.exp-LE -index 152ff284b133..cc0e88e9a304 100644 ---- a/none/tests/ppc64/test_isa_3_0_other.stdout.exp-LE -+++ b/none/tests/ppc64/test_isa_3_0_other.stdout.exp-LE -@@ -40,7 +40,17 @@ modud ffffffffffffffff, 0000000000000000 => 0000000000000000 (00000000) - modud ffffffffffffffff, 0000001cbe991def => 000000043eb0c0b2 (00000000) - modud ffffffffffffffff, ffffffffffffffff => 0000000000000000 (00000000) - --All done. Tested 4 different instructions -+addex 0000000000000000, 0000000000000000 => 0000000000000000 (00000000) -+addex 0000000000000000, 0000001cbe991def => 0000001cbe991def (00000000) -+addex 0000000000000000, ffffffffffffffff => ffffffffffffffff (00000000) -+addex 0000001cbe991def, 0000000000000000 => 0000001cbe991def (00000000) -+addex 0000001cbe991def, 0000001cbe991def => 000000397d323bde (00000000) OV32 -+addex 0000001cbe991def, ffffffffffffffff => 0000001cbe991dee (00000000) OV OV32 -+addex ffffffffffffffff, 0000000000000000 => 0000000000000000 (00000000) OV OV32 -+addex ffffffffffffffff, 0000001cbe991def => 0000001cbe991def (00000000) OV OV32 -+addex ffffffffffffffff, ffffffffffffffff => ffffffffffffffff (00000000) OV OV32 -+ -+All done. Tested 5 different instructions - ppc one argument plus shift: - Test instruction group [ppc one argument plus shift] - extswsli aaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaa 0 ffffffffffffffff => aaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaa 0 ffffffffffffffff -@@ -85,7 +95,7 @@ extswsli. aaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaa 0 ffaa5599113377cc => aaaaaaaaaaaaaa - extswsli. 5152535455565758 5152535455565758 0 ffaa5599113377cc => 5152535455565758 5152535455565758 0 ffaa5599113377cc - extswsli. 0000000000000000 0000000000000000 0 ffaa5599113377cc => 0000000000000000 0000000000000000 0 ffaa5599113377cc - --All done. Tested 6 different instructions -+All done. Tested 7 different instructions - ppc three parameter ops: - Test instruction group [ppc three parameter ops] - maddhd 0000000000000000, 0000000000000000, 0000000000000000 => 0000000000000000 (00000000) -@@ -172,7 +182,7 @@ maddld ffffffffffffffff, ffffffffffffffff, 0000000000000000 => 000000000000000 - maddld ffffffffffffffff, ffffffffffffffff, 0000001cbe991def => 0000001cbe991df0 (00000000) - maddld ffffffffffffffff, ffffffffffffffff, ffffffffffffffff => 0000000000000000 (00000000) - --All done. Tested 9 different instructions -+All done. Tested 10 different instructions - ppc count zeros: - Test instruction group [ppc count zeros] - cnttzw 0000000000000000 => 0000000000000020 -@@ -197,7 +207,7 @@ cnttzd. 0000001cbe991def => 0000000000000000 Expected cr0 to be zero, it is (200 - cnttzd. ffffffffffffffff => 0000000000000000 Expected cr0 to be zero, it is (20000000) - - --All done. Tested 13 different instructions -+All done. Tested 14 different instructions - ppc set boolean: - Test instruction group [ppc set boolean] - setb cr_field:0 cr_value::00000000 => 0000000000000000 -@@ -265,7 +275,7 @@ setb cr_field:7 cr_value::00000005 => 0000000000000001 - setb cr_field:7 cr_value::00000006 => 0000000000000001 - setb cr_field:7 cr_value::00000007 => 0000000000000001 - --All done. Tested 14 different instructions -+All done. Tested 15 different instructions - ppc char compare: - Test instruction group [ppc char compare] - cmprb l=0 0x61 (a) (cmpeq:0x5b427b625a417a61) (cmprb:src22(a-z) src21(A-Z)) => in range/found -@@ -1711,7 +1721,7 @@ cmpeqb 0x5d (]) (cmpeq:0x4642666245416561) (cmprb:src22(a-e) src21(A-E)) => - cmpeqb 0x60 (`) (cmpeq:0x4642666245416561) (cmprb:src22(a-e) src21(A-E)) => - cmpeqb 0x5f (_) (cmpeq:0x4642666245416561) (cmprb:src22(a-e) src21(A-E)) => - --All done. Tested 17 different instructions -+All done. Tested 18 different instructions - ppc vector scalar move to/from: - Test instruction group [ppc vector scalar move to/from] - mfvsrld aaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaa 0 ffffffffffffffff => aaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaa ffffffffffffffff -@@ -1777,7 +1787,7 @@ mtvsrws aaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaa 0 ffaa5599113377cc => 113377cc113377cc - mtvsrws 5152535455565758 5152535455565758 0 ffaa5599113377cc => 113377cc113377cc 113377cc113377cc 0 ffaa5599113377cc - mtvsrws 0000000000000000 0000000000000000 0 ffaa5599113377cc => 113377cc113377cc 113377cc113377cc 0 ffaa5599113377cc - --All done. Tested 20 different instructions -+All done. Tested 21 different instructions - ppc dfp significance: - Test instruction group [ppc dfp significance] - dtstsfi significance(0x00) +Finite 0 * 10 ^ -12 (GT) (4) -@@ -1862,7 +1872,7 @@ dtstsfiq significance(0x20) -inf (GT) (4) - dtstsfiq significance(0x30) -inf (GT) (4) - dtstsfiq significance(0x3f) -inf (GT) (4) - --All done. Tested 22 different instructions -+All done. Tested 23 different instructions - ppc bcd misc: - Test instruction group [ppc bcd misc] - bcdadd. p0 xa:0000000000000000 000000000000000c (+|0) xb:0000000000000000 000000000000000c (+|0) => (EQ) (2) xt:0000000000000000 000000000000000c(+|0) -@@ -33338,12 +33348,12 @@ bcdcfsq. p1 xa:0000000000000000 000000000000000c (+|0) xb:9999999999999999 99999 - bcdcfsq. p1 xa:0000000000000000 000000000000000c (+|0) xb:0000000000000000 000000001234567d ( - ) => (GT) (4) xt:0000000000000000 000000305419901f(+|0) - - --All done. Tested 51 different instructions -+All done. Tested 52 different instructions - ppc noop misc: - Test instruction group [ppc noop misc] - wait => - --All done. Tested 52 different instructions -+All done. Tested 53 different instructions - ppc addpc_misc: - Test instruction group [ppc addpc_misc] - addpcis 0000000000000000 => 0000000000000000 -@@ -33380,7 +33390,7 @@ subpcis 000000000000000d => 0000000000000000 - subpcis 000000000000000e => 0000000000000000 - subpcis 000000000000000f => 0000000000000000 - --All done. Tested 54 different instructions -+All done. Tested 55 different instructions - ppc mffpscr: - Test instruction group [ppc mffpscr] - mffsce => 000000000.000000 -@@ -33395,7 +33405,7 @@ mffs => 000000000.000000 - fpscr: f14 - local_fpscr: - --All done. Tested 57 different instructions -+All done. Tested 58 different instructions - ppc mffpscr: - Test instruction group [ppc mffpscr] - mffscdrni 0 => 0X0 -@@ -33426,4 +33436,4 @@ mffscrn f15 0X1 => 0X200000000 - mffscrn f15 0X2 => 0X200000000 - fpscr: f14 local_fpscr: 30-DRN1 RN-bit62 - --All done. Tested 61 different instructions -+All done. Tested 62 different instructions --- -2.19.2 - diff --git a/0001-Bug-403552-s390x-Fix-vector-facility-bit-number.patch b/0001-Bug-403552-s390x-Fix-vector-facility-bit-number.patch deleted file mode 100644 index a58b60e..0000000 --- a/0001-Bug-403552-s390x-Fix-vector-facility-bit-number.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 467c7c4c9665c0f8b41a4416722a027ebc05df2b Mon Sep 17 00:00:00 2001 -From: Andreas Arnez -Date: Mon, 21 Jan 2019 14:10:00 +0100 -Subject: [PATCH] Bug 403552 s390x: Fix vector facility bit number - -The wrong bit number was used when checking for the vector facility. This -can result in a fatal emulation error: "Encountered an instruction that -requires the vector facility. That facility is not available on this -host." - -In many cases the wrong facility bit was usually set as well, hence -nothing bad happened. But when running Valgrind within a Qemu/KVM guest, -the wrong bit was not (always?) set and the emulation error occurred. - -This fix simply corrects the vector facility bit number, changing it from -128 to 129. ---- - NEWS | 1 + - VEX/pub/libvex_s390x_common.h | 2 +- - 2 files changed, 2 insertions(+), 1 deletion(-) - -Index: valgrind-3.14.0/NEWS -=================================================================== ---- valgrind-3.14.0.orig/NEWS -+++ valgrind-3.14.0/NEWS -@@ -175,6 +175,7 @@ where XXXXXX is the bug number as listed - 398028 Assertion `cfsi_fits` failing in simple C program - 398066 s390x: cgijl dep1, 0 reports false unitialised values warning - 402519 POWER 3.0 addex instruction incorrectly implemented -+403552 s390x: wrong facility bit checked for vector facility - - n-i-bz Fix missing workq_ops operations (macOS) - n-i-bz fix bug in strspn replacement -Index: valgrind-3.14.0/VEX/pub/libvex_s390x_common.h -=================================================================== ---- valgrind-3.14.0.orig/VEX/pub/libvex_s390x_common.h -+++ valgrind-3.14.0/VEX/pub/libvex_s390x_common.h -@@ -103,7 +103,7 @@ - #define S390_FAC_MSA5 57 // message-security-assist 5 - #define S390_FAC_TREXE 73 // transactional execution - #define S390_FAC_MSA4 77 // message-security-assist 4 --#define S390_FAC_VX 128 // vector facility -+#define S390_FAC_VX 129 // vector facility - - - /*--------------------------------------------------------------*/ diff --git a/0001-s390x-more-fixes.patch b/0001-s390x-more-fixes.patch deleted file mode 100644 index 559328a..0000000 --- a/0001-s390x-more-fixes.patch +++ /dev/null @@ -1,51 +0,0 @@ -From d10cd86ee32bf76495f79c02df62fc242adbcbe3 Mon Sep 17 00:00:00 2001 -From: Andreas Arnez -Date: Thu, 26 Jul 2018 16:35:24 +0200 -Subject: [PATCH] s390x: More fixes for z13 support - -This patch addresses the following: - -* Fix the implementation of LOCGHI. Previously Valgrind performed 32-bit - sign extension instead of 64-bit sign extension on the immediate value. - -* Advertise VXRS in HWCAP. If no VXRS are advertised, but the program - uses vector registers, this could cause problems with a glibc built with - "-march=z13". ---- - VEX/priv/guest_s390_toIR.c | 2 +- - coregrind/m_initimg/initimg-linux.c | 6 +++--- - 2 files changed, 4 insertions(+), 4 deletions(-) - -diff --git a/VEX/priv/guest_s390_toIR.c b/VEX/priv/guest_s390_toIR.c -index 9c4d79b87..50a5a4177 100644 ---- a/VEX/priv/guest_s390_toIR.c -+++ b/VEX/priv/guest_s390_toIR.c -@@ -16325,7 +16325,7 @@ static const HChar * - s390_irgen_LOCGHI(UChar r1, UChar m3, UShort i2, UChar unused) - { - next_insn_if(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0))); -- put_gpr_dw0(r1, mkU64((UInt)(Int)(Short)i2)); -+ put_gpr_dw0(r1, mkU64((ULong)(Long)(Short)i2)); - - return "locghi"; - } -diff --git a/coregrind/m_initimg/initimg-linux.c b/coregrind/m_initimg/initimg-linux.c -index 61cc458bc..8a7f0d024 100644 ---- a/coregrind/m_initimg/initimg-linux.c -+++ b/coregrind/m_initimg/initimg-linux.c -@@ -699,9 +699,9 @@ Addr setup_client_stack( void* init_sp, - } - # elif defined(VGP_s390x_linux) - { -- /* Advertise hardware features "below" TE only. TE and VXRS -- (and anything above) are not supported by Valgrind. */ -- auxv->u.a_val &= VKI_HWCAP_S390_TE - 1; -+ /* Advertise hardware features "below" TE and VXRS. TE itself -+ and anything above VXRS is not supported by Valgrind. */ -+ auxv->u.a_val &= (VKI_HWCAP_S390_TE - 1) | VKI_HWCAP_S390_VXRS; - } - # elif defined(VGP_arm64_linux) - { --- -2.17.0 - diff --git a/Implement-emulated-system-registers.-Fixes-392146.patch b/Implement-emulated-system-registers.-Fixes-392146.patch deleted file mode 100644 index bea257a..0000000 --- a/Implement-emulated-system-registers.-Fixes-392146.patch +++ /dev/null @@ -1,376 +0,0 @@ -From a940156fc32b0c49e847aec0e4076161241cfa15 Mon Sep 17 00:00:00 2001 -From: Matthias Brugger -Date: Wed, 6 Jun 2018 15:23:07 +0200 -Subject: [PATCH] Implement emulated system registers. Fixes #392146. - -Signed-off-by: Matthias Brugger ---- - VEX/priv/guest_arm64_defs.h | 9 ++ - VEX/priv/guest_arm64_helpers.c | 100 +++++++++++++++ - VEX/priv/guest_arm64_toIR.c | 222 +++++++++++++++++++++++++++++++++ - 3 files changed, 331 insertions(+) - -Index: valgrind-3.14.0/VEX/priv/guest_arm64_defs.h -=================================================================== ---- valgrind-3.14.0.orig/VEX/priv/guest_arm64_defs.h -+++ valgrind-3.14.0/VEX/priv/guest_arm64_defs.h -@@ -126,6 +126,15 @@ extern ULong arm64g_dirtyhelper_MRS_CNTV - - extern ULong arm64g_dirtyhelper_MRS_CNTFRQ_EL0 ( void ); - -+extern ULong arm64g_dirtyhelper_MRS_MIDR_EL1 ( void ); -+ -+extern ULong arm64g_dirtyhelper_MRS_ID_AA64PFR0_EL1 ( void ); -+ -+extern ULong arm64g_dirtyhelper_MRS_ID_AA64MMFR0_EL1 ( void ); -+extern ULong arm64g_dirtyhelper_MRS_ID_AA64MMFR1_EL1 ( void ); -+ -+extern ULong arm64g_dirtyhelper_MRS_ID_AA64ISAR0_EL1 ( void ); -+ - extern void arm64g_dirtyhelper_PMULLQ ( /*OUT*/V128* res, - ULong arg1, ULong arg2 ); - -Index: valgrind-3.14.0/VEX/priv/guest_arm64_helpers.c -=================================================================== ---- valgrind-3.14.0.orig/VEX/priv/guest_arm64_helpers.c -+++ valgrind-3.14.0/VEX/priv/guest_arm64_helpers.c -@@ -788,6 +788,106 @@ ULong arm64g_dirtyhelper_MRS_CNTFRQ_EL0 - # endif - } - -+/* CALLED FROM GENERATED CODE */ -+/* DIRTY HELPER (non-referentially-transparent) */ -+/* Horrible hack. On non-arm64 platforms, return 0. */ -+ULong arm64g_dirtyhelper_MRS_MIDR_EL1 ( void ) -+{ -+# if defined(__aarch64__) && !defined(__arm__) -+ ULong w = 0x5555555555555555ULL; /* overwritten */ -+ __asm__ __volatile__("mrs %0, midr_el1" : "=r"(w)); -+ return w; -+# else -+ return 0ULL; -+# endif -+} -+ -+/* CALLED FROM GENERATED CODE */ -+/* DIRTY HELPER (non-referentially-transparent) */ -+/* Horrible hack. On non-arm64 platforms, return 0. */ -+ULong arm64g_dirtyhelper_MRS_ID_AA64PFR0_EL1 ( void ) -+{ -+# if defined(__aarch64__) && !defined(__arm__) -+ ULong w = 0x5555555555555555ULL; /* overwritten */ -+ __asm__ __volatile__("mrs %0, id_aa64pfr0_el1" : "=r"(w)); -+ -+ /* If half-precision fp is present we fall back to normal -+ half precision implementation because of missing support in the emulation. -+ If no AdvSIMD and FP are implemented, we preserve the value */ -+ w = (w >> 16); -+ w &= 0xff; -+ switch(w) { -+ case 0x11: -+ w = 0x0; -+ break; -+ case 0xff: -+ w = (0xFF<<16); -+ break; -+ default: -+ w = 0x0; -+ break; -+ } -+ -+ return w; -+# else -+ return 0ULL; -+# endif -+} -+ -+/* CALLED FROM GENERATED CODE */ -+/* DIRTY HELPER (non-referentially-transparent) */ -+/* Horrible hack. On non-arm64 platforms, return 0. */ -+ULong arm64g_dirtyhelper_MRS_ID_AA64MMFR0_EL1 ( void ) -+{ -+# if defined(__aarch64__) && !defined(__arm__) -+ ULong w = 0x5555555555555555ULL; /* overwritten */ -+ __asm__ __volatile__("mrs %0, id_aa64mmfr0_el1" : "=r"(w)); -+ return w; -+# else -+ return 0ULL; -+# endif -+} -+ -+/* CALLED FROM GENERATED CODE */ -+/* DIRTY HELPER (non-referentially-transparent) */ -+/* Horrible hack. On non-arm64 platforms, return 0. */ -+ULong arm64g_dirtyhelper_MRS_ID_AA64MMFR1_EL1 ( void ) -+{ -+# if defined(__aarch64__) && !defined(__arm__) -+ ULong w = 0x5555555555555555ULL; /* overwritten */ -+ __asm__ __volatile__("mrs %0, id_aa64mmfr1_el1" : "=r"(w)); -+ -+ /* Clear VH and HAFDBS bits */ -+ w &= ~(0xF0F); -+ return w; -+# else -+ return 0ULL; -+# endif -+} -+ -+/* CALLED FROM GENERATED CODE */ -+/* DIRTY HELPER (non-referentially-transparent) */ -+/* Horrible hack. On non-arm64 platforms, return 0. */ -+ULong arm64g_dirtyhelper_MRS_ID_AA64ISAR0_EL1 ( void ) -+{ -+# if defined(__aarch64__) && !defined(__arm__) -+ ULong w = 0x5555555555555555ULL; /* overwritten */ -+ __asm__ __volatile__("mrs %0, id_aa64isar0_el1" : "=r"(w)); -+ -+ /* Clear all but AES, SHA1 and SHA2 parts*/ -+ w &= ~0xFFFF; -+ /* Degredate SHA2 from b0010 to b0001*/ -+ if ( (w >> 12) & 0x2 ) { -+ w &= ~(0xF << 12); -+ w |= (0x1 << 12); -+ } -+ -+ return w; -+# else -+ return 0ULL; -+# endif -+} -+ - - void arm64g_dirtyhelper_PMULLQ ( /*OUT*/V128* res, ULong arg1, ULong arg2 ) - { -Index: valgrind-3.14.0/VEX/priv/guest_arm64_toIR.c -=================================================================== ---- valgrind-3.14.0.orig/VEX/priv/guest_arm64_toIR.c -+++ valgrind-3.14.0/VEX/priv/guest_arm64_toIR.c -@@ -6891,6 +6891,228 @@ Bool dis_ARM64_branch_etc(/*MB_OUT*/DisR - } - - /* ------------------ M{SR,RS} ------------------ */ -+ /* ---- Case for MIDR_EL1 (RO) ---- -+ Read the Main ID register from host. -+ 0xD53800 000 Rt MRS rT, midr_el1 -+ */ -+ if ((INSN(31,0) & 0xFFFFFFE0) == 0xD5380000 /*MRS*/) { -+ UInt tt = INSN(4,0); -+ IRTemp val = newTemp(Ity_I64); -+ IRExpr** args = mkIRExprVec_0(); -+ IRDirty* d = unsafeIRDirty_1_N ( -+ val, -+ 0/*regparms*/, -+ "arm64g_dirtyhelper_MRS_MIDR_EL1", -+ &arm64g_dirtyhelper_MRS_MIDR_EL1, -+ args -+ ); -+ /* execute the dirty call, dumping the result in val. */ -+ stmt( IRStmt_Dirty(d) ); -+ putIReg64orZR(tt, mkexpr(val)); -+ DIP("mrs %s, midr_el1\n", nameIReg64orZR(tt)); -+ return True; -+ } -+ /* ---- Case for MPIDR_EL1 (RO) ---- -+ Instead of returing a fake regiser, we use the same -+ value as does the kernel emulation. -+ 0xD53800 101 Rt MRS rT, mpidr_el1 -+ */ -+ if ((INSN(31,0) & 0xFFFFFFE0) == 0xD53800A0 /*MRS*/) { -+ UInt tt = INSN(4,0); -+ putIReg64orZR(tt, mkU64((1UL<<31))); -+ DIP("mrs %s, mpidr_el1 (FAKED)\n", nameIReg64orZR(tt)); -+ return True; -+ } -+ /* ---- Case for REVDIR_EL1 (RO) ---- -+ Instead of emulating the regiser, we just return the same -+ value as does the kernel emulation. -+ 0xD53800 110 Rt MRS rT, revdir_el1 -+ */ -+ if ((INSN(31,0) & 0xFFFFFFE0) == 0xD53800C0 /*MRS*/) { -+ UInt tt = INSN(4,0); -+ putIReg32orZR(tt, mkU32(0x0)); -+ DIP("mrs %s, revdir_el1 (FAKED)\n", nameIReg32orZR(tt)); -+ return True; -+ } -+ /* ---- Case for ID_AA64PFR0_EL1 (RO) ---- -+ Instead of returing a fake regiser, we use the same -+ value as does the kernel emulation. We set deprecate half -+ precission floating-point to normal floating-point support. -+ We set all other values to zero. -+ 0xD53804 000 Rt MRS rT, id_aa64pfr0_el1 -+ */ -+ if ((INSN(31,0) & 0xFFFFFFE0) == 0xD5380400 /*MRS*/) { -+ UInt tt = INSN(4,0); -+ IRTemp val = newTemp(Ity_I64); -+ IRExpr** args = mkIRExprVec_0(); -+ IRDirty* d = unsafeIRDirty_1_N ( -+ val, -+ 0/*regparms*/, -+ "arm64g_dirtyhelper_MRS_ID_AA64PFR0_EL1", -+ &arm64g_dirtyhelper_MRS_ID_AA64PFR0_EL1, -+ args -+ ); -+ /* execute the dirty call, dumping the result in val. */ -+ stmt( IRStmt_Dirty(d) ); -+ -+ putIReg64orZR(tt, mkexpr(val)); -+ return True; -+ } -+ /* ---- Case for ID_AA64PFR1_EL1 (RO) ---- -+ We just return 0x0 here, as we don't support the opcodes of -+ new commands in the emulation environment. -+ 0xD53804 001 Rt MRS rT, id_aa64pfr1_el1 -+ */ -+ if ((INSN(31,0) & 0xFFFFFFE0) == 0xD5380420 /*MRS*/) { -+ UInt tt = INSN(4,0); -+ putIReg64orZR(tt, mkU64(0x0)); -+ DIP("mrs %s, id_aa64pfr1_el1 (FAKED)\n", nameIReg32orZR(tt)); -+ return True; -+ } -+ /* ---- Case for ID_AA64ZFR0_EL1 (RO) ---- -+ We just return 0x0 here, as we don't support the opcodes of -+ new commands in the emulation environment. -+ 0xD53804 010 Rt MRS rT, id_aa64zfr0_el1 -+ */ -+ if ((INSN(31,0) & 0xFFFFFFE0) == 0xD5380440 /*MRS*/) { -+ UInt tt = INSN(4,0); -+ putIReg64orZR(tt, mkU64(0x0)); -+ DIP("mrs %s, id_aa64zfr0_el1 (FAKED)\n", nameIReg64orZR(tt)); -+ return True; -+ } -+ /* ---- Case for ID_AA64DFR0_EL1 (RO) ---- -+ Just return the value indicating the implementation of the -+ ARMv8 debug architecture without any extensions. -+ 0xD53805 000 Rt MRS rT, id_aa64dfr0_el1 -+ */ -+ if ((INSN(31,0) & 0xFFFFFFE0) == 0xD5380500 /*MRS*/) { -+ UInt tt = INSN(4,0); -+ putIReg64orZR(tt, mkU64(0x6)); -+ DIP("mrs %s, id_aa64dfr0_el1 (FAKED)\n", nameIReg64orZR(tt)); -+ return True; -+ } -+ /* ---- Case for ID_AA64DFR1_EL1 (RO) ---- -+ We just return 0x0 here, as we don't support the opcodes of -+ new commands in the emulation environment. -+ 0xD53805 001 Rt MRS rT, id_aa64dfr1_el1 -+ */ -+ if ((INSN(31,0) & 0xFFFFFFE0) == 0xD5380520 /*MRS*/) { -+ UInt tt = INSN(4,0); -+ putIReg64orZR(tt, mkU64(0x0)); -+ DIP("mrs %s, id_aa64dfr1_el1 (FAKED)\n", nameIReg64orZR(tt)); -+ return True; -+ } -+ /* ---- Case for ID_AA64AFR0_EL1 (RO) ---- -+ We just return 0x0 here, as we don't support the opcodes of -+ new commands in the emulation environment. -+ 0xD53805 100 Rt MRS rT, id_aa64afr0_el1 -+ */ -+ if ((INSN(31,0) & 0xFFFFFFE0) == 0xD5380580 /*MRS*/) { -+ UInt tt = INSN(4,0); -+ putIReg64orZR(tt, mkU64(0x0)); -+ DIP("mrs %s, id_aa64afr0_el1 (FAKED)\n", nameIReg64orZR(tt)); -+ return True; -+ } -+ /* ---- Case for ID_AA64AFR1_EL1 (RO) ---- -+ We just return 0x0 here, as we don't support the opcodes of -+ new commands in the emulation environment. -+ 0xD53805 101 Rt MRS rT, id_aa64afr1_el1 -+ */ -+ if ((INSN(31,0) & 0xFFFFFFE0) == 0xD53805A0 /*MRS*/) { -+ UInt tt = INSN(4,0); -+ putIReg64orZR(tt, mkU64(0x0)); -+ DIP("mrs %s, id_aa64afr1_el1 (FAKED)\n", nameIReg64orZR(tt)); -+ return True; -+ } -+ /* ---- Case for ID_AA64ISAR0_EL1 (RO) ---- -+ We only take care of SHA2, SHA1 and AES bits, as all the other -+ commands are not part of the emulation environment. -+ We degredate SHA2 from 0x2 to 0x1 as we don't support the commands. -+ 0xD53806 000 Rt MRS rT, id_aa64isar0_el1 -+ */ -+ if ((INSN(31,0) & 0xFFFFFFE0) == 0xD5380600 /*MRS*/) { -+ UInt tt = INSN(4,0); -+ IRTemp val = newTemp(Ity_I64); -+ IRExpr** args = mkIRExprVec_0(); -+ IRDirty* d = unsafeIRDirty_1_N ( -+ val, -+ 0/*regparms*/, -+ "arm64g_dirtyhelper_MRS_ID_AA64ISAR0_EL1", -+ &arm64g_dirtyhelper_MRS_ID_AA64ISAR0_EL1, -+ args -+ ); -+ /* execute the dirty call, dumping the result in val. */ -+ stmt( IRStmt_Dirty(d) ); -+ putIReg64orZR(tt, mkexpr(val)); -+ DIP("mrs %s, id_aa64isar0_el1 (FAKED)\n", nameIReg64orZR(tt)); -+ return True; -+ } -+ /* ---- Case for ID_AA64ISAR1_EL1 (RO) ---- -+ We just return 0x0 here, as we don't support the opcodes of -+ new commands in the emulation environment. -+ 0xD53806 001 Rt MRS rT, id_aa64isar1_el1 -+ */ -+ if ((INSN(31,0) & 0xFFFFFFE0) == 0xD5380620 /*MRS*/) { -+ UInt tt = INSN(4,0); -+ putIReg64orZR(tt, mkU64(0x0)); -+ DIP("mrs %s, id_aa64isar1_el1 (FAKED)\n", nameIReg64orZR(tt)); -+ return True; -+ } -+ /* ---- Case for ID_AA64MMFR0_EL1 (RO) ---- -+ Instead of returing a fake regiser, we use the same -+ value as does the kernel emulation. -+ 0xD53807 000 Rt MRS rT, id_aa64mmfr0_el1 -+ */ -+ if ((INSN(31,0) & 0xFFFFFFE0) == 0xD5380700 /*MRS*/) { -+ UInt tt = INSN(4,0); -+ IRTemp val = newTemp(Ity_I64); -+ IRExpr** args = mkIRExprVec_0(); -+ IRDirty* d = unsafeIRDirty_1_N ( -+ val, -+ 0/*regparms*/, -+ "arm64g_dirtyhelper_MRS_ID_AA64MMFR0_EL1", -+ &arm64g_dirtyhelper_MRS_ID_AA64MMFR0_EL1, -+ args -+ ); -+ /* execute the dirty call, dumping the result in val. */ -+ stmt( IRStmt_Dirty(d) ); -+ putIReg64orZR(tt, mkexpr(val)); -+ DIP("mrs %s, id_aa64mmfr0_el1 (FAKED)\n", nameIReg64orZR(tt)); -+ return True; -+ } -+ /* ---- Case for ID_AA64MMFR1_EL1 (RO) ---- -+ Instead of returing a fake regiser, we use the same -+ value as does the kernel emulation. Set VHE and HAFDBS -+ to not implemented. -+ 0xD53807 001 Rt MRS rT, id_aa64mmfr1_el1 -+ */ -+ if ((INSN(31,0) & 0xFFFFFFE0) == 0xD5380720 /*MRS*/) { -+ UInt tt = INSN(4,0); -+ IRTemp val = newTemp(Ity_I64); -+ IRExpr** args = mkIRExprVec_0(); -+ IRDirty* d = unsafeIRDirty_1_N ( -+ val, -+ 0/*regparms*/, -+ "arm64g_dirtyhelper_MRS_ID_AA64MMFR1_EL1", -+ &arm64g_dirtyhelper_MRS_ID_AA64MMFR1_EL1, -+ args -+ ); -+ /* execute the dirty call, dumping the result in val. */ -+ stmt( IRStmt_Dirty(d) ); -+ putIReg64orZR(tt, mkexpr(val)); -+ DIP("mrs %s, id_aa64mmfr1_el1 (FAKED)\n", nameIReg64orZR(tt)); -+ return True; -+ } -+ /* ---- Case for ID_AA64MMFR2_EL1 (RO) ---- -+ Return faked value of not implemented ARMv8.2 and ARMv8.3 -+ 0xD53807 010 Rt MRS rT, id_aa64mmfr2_el1 -+ */ -+ if ((INSN(31,0) & 0xFFFFFFE0) == 0xD5380740 /*MRS*/) { -+ UInt tt = INSN(4,0); -+ putIReg64orZR(tt, mkU64(0x0)); -+ DIP("mrs %s, id_aa64mmfr2_el1 (FAKED)\n", nameIReg64orZR(tt)); -+ return True; -+ } - /* ---- Cases for TPIDR_EL0 ---- - 0xD51BD0 010 Rt MSR tpidr_el0, rT - 0xD53BD0 010 Rt MRS rT, tpidr_el0 diff --git a/valgrind-3.14.0.tar.bz2 b/valgrind-3.14.0.tar.bz2 deleted file mode 100644 index f17b956..0000000 --- a/valgrind-3.14.0.tar.bz2 +++ /dev/null @@ -1,3 +0,0 @@ -version https://git-lfs.github.com/spec/v1 -oid sha256:037c11bfefd477cc6e9ebe8f193bb237fe397f7ce791b4a4ce3fa1c6a520baa5 -size 16602858 diff --git a/valgrind-3.15.0.tar.bz2 b/valgrind-3.15.0.tar.bz2 new file mode 100644 index 0000000..53b4389 --- /dev/null +++ b/valgrind-3.15.0.tar.bz2 @@ -0,0 +1,3 @@ +version https://git-lfs.github.com/spec/v1 +oid sha256:417c7a9da8f60dd05698b3a7bc6002e4ef996f14c13f0ff96679a16873e78ab1 +size 20241437 diff --git a/valgrind.changes b/valgrind.changes index d99d92e..04c1388 100644 --- a/valgrind.changes +++ b/valgrind.changes @@ -1,3 +1,80 @@ +------------------------------------------------------------------- +Wed May 8 15:36:12 UTC 2019 - Dirk Mueller + +- update to 3.15.0 (fate#327402): + 3.15.0 is a feature release with many improvements and the usual collection of + bug fixes. + + This release supports X86/Linux, AMD64/Linux, ARM32/Linux, ARM64/Linux, + PPC32/Linux, PPC64BE/Linux, PPC64LE/Linux, S390X/Linux, MIPS32/Linux, + MIPS64/Linux, ARM/Android, ARM64/Android, MIPS32/Android, X86/Android, + X86/Solaris, AMD64/Solaris and AMD64/MacOSX 10.12. There is also preliminary + support for X86/macOS 10.13 and AMD64/macOS 10.13. + + * ==================== CORE CHANGES =================== + + * The XTree Massif output format now makes use of the information obtained + when specifying --read-inline-info=yes. + + * amd64 (x86_64): the RDRAND and F16C insn set extensions are now supported. + + * ==================== TOOL CHANGES ==================== + + * DHAT: + + - DHAT been thoroughly overhauled, improved, and given a GUI. As a result, + it has been promoted from an experimental tool to a regular tool. Run it + with --tool=dhat instead of --tool=exp-dhat. + + - DHAT now prints only minimal data when the program ends, instead writing + the bulk of the profiling data to a file. As a result, the --show-top-n + and --sort-by options have been removed. + + - Profile results can be viewed with the new viewer, dh_view.html. When + a run ends, a short message is printed, explaining how to view the result. + + - See the documentation for more details. + + * Cachegrind: + + - cg_annotate has a new option, --show-percs, which prints percentages next + to all event counts. + + * Callgrind: + + - callgrind_annotate has a new option, --show-percs, which prints percentages + next to all event counts. + + - callgrind_annotate now inserts commas in call counts, and + sort the caller/callee lists in the call tree. + + * Massif: + + - The default value for --read-inline-info is now "yes" on + Linux/Android/Solaris. It is still "no" on other OS. + + * Memcheck: + + - The option --xtree-leak=yes (to output leak result in xtree format) + automatically activates the option --show-leak-kinds=all, as xtree + visualisation tools such as kcachegrind can in any case select what kind + of leak to visualise. + + - There has been further work to avoid false positives. In particular, + integer equality on partially defined inputs (C == and !=) is now handled + better. + +- remove 0001-Bug-385411-s390x-Add-z13-vector-floating-point-suppo.patch + 0001-Bug-385411-s390x-Tests-and-internals-for-z13-vector-.patch + 0001-Bug-397187-s390x-Add-vector-register-support-for-vgd.patch + 0001-Bug-399444-s390x-Drop-unnecessary-check-in-s390_irge.patch + 0001-Bug-400490-s390x-Fix-register-allocation-for-VRs-vs-.patch + 0001-Bug-400491-s390x-Sign-extend-immediate-operand-of-LO.patch + 0001-Bug-402519-POWER-3.0-addex-instruction-incorrectly-i.patch + 0001-Bug-403552-s390x-Fix-vector-facility-bit-number.patch + 0001-s390x-more-fixes.patch + Implement-emulated-system-registers.-Fixes-392146.patch (all upstream) + ------------------------------------------------------------------- Wed Apr 24 17:43:06 UTC 2019 - Martin Liška diff --git a/valgrind.spec b/valgrind.spec index 877bf1a..f936361 100644 --- a/valgrind.spec +++ b/valgrind.spec @@ -22,7 +22,7 @@ %define building_docs 1 Name: valgrind -Version: 3.14.0 +Version: 3.15.0 Release: 0 Summary: Memory Management Debugger License: GPL-2.0-or-later @@ -34,16 +34,6 @@ Source0: ftp://sourceware.org/pub/valgrind/valgrind-%{version}.tar.bz2 Patch0: valgrind.xen.patch Patch1: jit-register-unregister.diff Patch2: armv6-support.diff -Patch4: Implement-emulated-system-registers.-Fixes-392146.patch -Patch5: 0001-Bug-400490-s390x-Fix-register-allocation-for-VRs-vs-.patch -Patch6: 0001-Bug-400491-s390x-Sign-extend-immediate-operand-of-LO.patch -Patch7: 0001-Bug-397187-s390x-Add-vector-register-support-for-vgd.patch -Patch8: 0001-s390x-more-fixes.patch -Patch9: 0001-Bug-402519-POWER-3.0-addex-instruction-incorrectly-i.patch -Patch10: 0001-Bug-399444-s390x-Drop-unnecessary-check-in-s390_irge.patch -Patch11: 0001-Bug-385411-s390x-Add-z13-vector-floating-point-suppo.patch -Patch12: 0001-Bug-403552-s390x-Fix-vector-facility-bit-number.patch -Patch13: 0001-Bug-385411-s390x-Tests-and-internals-for-z13-vector-.patch BuildRequires: automake BuildRequires: docbook-xsl-stylesheets BuildRequires: docbook_4 @@ -151,16 +141,6 @@ but it has been successfully used to optimize several KDE applications. # needs porting to 3.11 ##%patch1 %patch2 -%patch4 -p1 -%patch5 -p1 -%patch6 -p1 -%patch7 -p1 -%patch8 -p1 -%patch9 -p1 -%patch10 -p1 -%patch11 -p1 -%patch12 -p1 -%patch13 -p1 %build %define _lto_cflags %{nil} @@ -256,6 +236,8 @@ VALGRIND_LIB=$PWD/.in_place VALGRIND_LIB_INNER=$PWD/.in_place ./coregrind/valgri %ifarch %arm %{_libdir}/valgrind/*-arm-linux %endif +%dir /usr/lib/valgrind +/usr/lib/valgrind/dh_view* %{_libdir}/valgrind/*-linux.so %{_libdir}/valgrind/*.supp %{_libdir}/valgrind/64bit-core.xml