valgrind/r2798.diff

34 lines
1.1 KiB
Diff

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r2798 | cborntra | 2013-11-07 22:37:28 +0100 (Do, 07 Nov 2013) | 16 lines
Fix Bug 327284. The condition code of risbg was not correct.
This instruction might be used by by gcc for masking out bits,
e.g. code like
n &= 3;
if (n == 0)
might result in
risbg %r4,%r4,62,128+63,0
je <target>
The old code set the condition code depending on the operand before
masking. Fix it. This patch also indicates that we need test suite
coverage for risbg and friends.
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Index: priv/guest_s390_toIR.c
===================================================================
--- VEX/priv/guest_s390_toIR.c (revision 2797)
+++ VEX/priv/guest_s390_toIR.c (revision 2798)
@@ -7606,7 +7606,7 @@ s390_irgen_RISBG(UChar r1, UChar r2, UCh
put_gpr_dw0(r1, binop(Iop_And64, mkexpr(op2), mkU64(mask)));
}
assign(result, get_gpr_dw0(r1));
- s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
return "risbg";
}