40 lines
1.3 KiB
Diff
40 lines
1.3 KiB
Diff
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# Commit dfa625e15f3d6c374637f2bb789e1f444c2781c3
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# Date 2014-08-22 14:29:37 +0200
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# Author Jan Beulich <jbeulich@suse.com>
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# Committer Jan Beulich <jbeulich@suse.com>
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VMX: fix DebugCtl MSR clearing
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The previous shortcut was wrong, as it bypassed the necessary vmwrite:
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All we really want to avoid if the guest writes zero is to add the MSR
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to the host-load list.
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Signed-off-by: Jan Beulich <jbeulich@suse.com>
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Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
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Acked-by: Kevin Tian <kevin.tian@intel.com>
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--- a/xen/arch/x86/hvm/vmx/vmx.c
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+++ b/xen/arch/x86/hvm/vmx/vmx.c
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@@ -2170,8 +2170,6 @@ static int vmx_msr_write_intercept(unsig
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int i, rc = 0;
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uint64_t supported = IA32_DEBUGCTLMSR_LBR | IA32_DEBUGCTLMSR_BTF;
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- if ( !msr_content )
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- break;
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if ( msr_content & ~supported )
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{
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/* Perhaps some other bits are supported in vpmu. */
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@@ -2191,12 +2189,10 @@ static int vmx_msr_write_intercept(unsig
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}
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if ( (rc < 0) ||
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- (vmx_add_host_load_msr(msr) < 0) )
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+ (msr_content && (vmx_add_host_load_msr(msr) < 0)) )
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hvm_inject_hw_exception(TRAP_machine_check, 0);
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else
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- {
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__vmwrite(GUEST_IA32_DEBUGCTL, msr_content);
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- }
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break;
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}
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