150 lines
4.3 KiB
Diff
150 lines
4.3 KiB
Diff
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Cleanup some APIC handling code in the HyperV shim.
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Signed-off-by: K. Y. Srinivasan <ksrinivasan@novell.com>
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Index: xen-4.0.1-testing/xen/arch/x86/hvm/hyperv/hv_intercept.c
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===================================================================
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--- xen-4.0.1-testing.orig/xen/arch/x86/hvm/hyperv/hv_intercept.c 2010-10-04 14:04:46.000000000 -0600
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+++ xen-4.0.1-testing/xen/arch/x86/hvm/hyperv/hv_intercept.c 2010-10-04 18:30:42.000000000 -0600
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@@ -252,71 +252,6 @@ hv_get_max_vcpus_supported(void)
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static inline void
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-hv_read_icr(u64 *icr_content)
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-{
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- unsigned long icr_low, icr_high;
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-
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- icr_low = vlapic_mmio_handler.read_handler(current,
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- (vlapic_base_address(vcpu_vlapic(current)) + APIC_ICR), 4, &icr_low);
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- icr_high = vlapic_mmio_handler.read_handler(current,
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- (vlapic_base_address(vcpu_vlapic(current)) + APIC_ICR2), 4, &icr_high);
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- *icr_content = (((u64)icr_high<< 32) | icr_low);
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-
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-}
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-
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-static inline void
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-hv_read_tpr(u64 *tpr_content)
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-{
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-
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- vlapic_mmio_handler.read_handler(current,
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- (vlapic_base_address(vcpu_vlapic(current)) + APIC_TASKPRI),
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- 4, (unsigned long *)&tpr_content);
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-}
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-
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-static inline void
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-hv_write_eoi(u64 msr_content)
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-{
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- u32 eoi = (u32)msr_content;
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-
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- vlapic_mmio_handler.write_handler(current,
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- (vlapic_base_address(vcpu_vlapic(current)) + APIC_EOI), 4, eoi);
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-
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-}
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-
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-static inline void
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-hv_write_icr(u64 msr_content)
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-{
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- u32 icr_low, icr_high;
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- icr_low = (u32)msr_content;
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- icr_high = (u32)(msr_content >> 32);
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-
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- if (icr_high != 0)
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- {
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- vlapic_mmio_handler.write_handler(current,
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- (vlapic_base_address(vcpu_vlapic(current)) + APIC_ICR2), 4,
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- icr_high);
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- }
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- if (icr_low != 0)
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- {
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- vlapic_mmio_handler.write_handler(current,
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- (vlapic_base_address(vcpu_vlapic(current)) + APIC_ICR), 4,
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- icr_low);
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- }
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-
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-}
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-
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-static inline void
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-hv_write_tpr(u64 msr_content)
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-{
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- u32 tpr = (u32)msr_content;
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-
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-
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- vlapic_mmio_handler.write_handler(current,
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- (vlapic_base_address(vcpu_vlapic(current)) + APIC_TASKPRI), 4, tpr);
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-
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-}
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-
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-static inline void
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hv_hypercall_page_initialize(void *hypercall_page)
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{
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char *p;
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@@ -810,21 +745,14 @@ hyperv_do_rd_msr(uint32_t idx, struct cp
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regs->edx = (u32)(0x0);
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break;
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case HV_MSR_ICR:
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- if (!hv_privilege_check(curp, HV_ACCESS_APIC_MSRS)) {
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- goto msr_read_error;
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- }
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- hv_read_icr(&msr_content);
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+ regs->eax = vlapic_get_reg(vcpu_vlapic(current), APIC_ICR);
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+ regs->edx = vlapic_get_reg(vcpu_vlapic(current), APIC_ICR2);
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#ifdef HV_STATS
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cur_vcpu->stats.num_icr_reads++;
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#endif
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- regs->eax = (u32)(msr_content & 0xFFFFFFFF);
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- regs->edx = (u32)(msr_content >> 32);
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break;
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case HV_MSR_TPR:
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- if (!hv_privilege_check(curp, HV_ACCESS_APIC_MSRS)) {
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- goto msr_read_error;
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- }
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- hv_read_tpr(&msr_content);
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+ msr_content = vlapic_get_reg(vcpu_vlapic(current), APIC_TASKPRI);
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#ifdef HV_STATS
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cur_vcpu->stats.num_tpr_reads++;
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#endif
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@@ -922,28 +850,30 @@ hyperv_do_wr_msr(uint32_t idx, struct cp
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goto msr_write_error;
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case HV_MSR_EOI:
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- if (!hv_privilege_check(curp, HV_ACCESS_APIC_MSRS)) {
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- goto msr_write_error;
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- }
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- hv_write_eoi(msr_content);
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+ vlapic_EOI_set(vcpu_vlapic(current));
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#ifdef HV_STATS
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cur_vcpu->stats.num_eoi_writes++;
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#endif
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break;
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- case HV_MSR_ICR:
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- if (!hv_privilege_check(curp, HV_ACCESS_APIC_MSRS)) {
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- goto msr_write_error;
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- }
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- hv_write_icr(msr_content);
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+ case HV_MSR_ICR: {
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+ u32 eax = (u32)msr_content;
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+ u32 edx = (u32)(msr_content >> 32);
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+ struct vlapic *vlapic = vcpu_vlapic(current);
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+ eax &= ~(1 << 12);
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+ edx &= 0xff000000;
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+ vlapic_set_reg(vlapic, APIC_ICR2, edx);
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+ if ( vlapic_ipi(vlapic, eax, edx) == X86EMUL_OKAY )
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+ vlapic_set_reg(vlapic, APIC_ICR, eax);
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+ break;
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+ }
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+
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#ifdef HV_STATS
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cur_vcpu->stats.num_icr_writes++;
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#endif
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break;
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case HV_MSR_TPR:
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- if (!hv_privilege_check(curp, HV_ACCESS_APIC_MSRS)) {
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- goto msr_write_error;
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- }
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- hv_write_tpr(msr_content);
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+ vlapic_set_reg(vcpu_vlapic(current), APIC_TASKPRI,
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+ (uint8_t)msr_content);
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#ifdef HV_STATS
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cur_vcpu->stats.num_tpr_writes++;
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#endif
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