108 lines
3.5 KiB
Diff
108 lines
3.5 KiB
Diff
|
# Commit 7dd3b06ff031c9a8c727df16c5def2afb382101c
|
||
|
# Date 2013-02-28 14:00:18 +0000
|
||
|
# Author Tim Deegan <tim@xen.org>
|
||
|
# Committer Tim Deegan <tim@xen.org>
|
||
|
vmx: fix handling of NMI VMEXIT.
|
||
|
|
||
|
Call do_nmi() directly and explicitly re-enable NMIs rather than
|
||
|
raising an NMI through the APIC. Since NMIs are disabled after the
|
||
|
VMEXIT, the raised NMI would be blocked until the next IRET
|
||
|
instruction (i.e. the next real interrupt, or after scheduling a PV
|
||
|
guest) and in the meantime the guest will spin taking NMI VMEXITS.
|
||
|
|
||
|
Also, handle NMIs before re-enabling interrupts, since if we handle an
|
||
|
interrupt (and therefore IRET) before calling do_nmi(), we may end up
|
||
|
running the NMI handler with NMIs enabled.
|
||
|
|
||
|
Signed-off-by: Tim Deegan <tim@xen.org>
|
||
|
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
|
||
|
Acked-by: Jan Beulich <jbeulich@suse.com>
|
||
|
|
||
|
--- a/xen/arch/x86/hvm/vmx/vmx.c
|
||
|
+++ b/xen/arch/x86/hvm/vmx/vmx.c
|
||
|
@@ -2421,6 +2421,13 @@ void vmx_vmexit_handler(struct cpu_user_
|
||
|
vector = intr_info & INTR_INFO_VECTOR_MASK;
|
||
|
if ( vector == TRAP_machine_check )
|
||
|
do_machine_check(regs);
|
||
|
+ if ( vector == TRAP_nmi
|
||
|
+ && ((intr_info & INTR_INFO_INTR_TYPE_MASK) ==
|
||
|
+ (X86_EVENTTYPE_NMI << 8)) )
|
||
|
+ {
|
||
|
+ do_nmi(regs);
|
||
|
+ enable_nmis();
|
||
|
+ }
|
||
|
break;
|
||
|
case EXIT_REASON_MCE_DURING_VMENTRY:
|
||
|
do_machine_check(regs);
|
||
|
@@ -2594,7 +2601,7 @@ void vmx_vmexit_handler(struct cpu_user_
|
||
|
(X86_EVENTTYPE_NMI << 8) )
|
||
|
goto exit_and_crash;
|
||
|
HVMTRACE_0D(NMI);
|
||
|
- self_nmi(); /* Real NMI, vector 2: normal processing. */
|
||
|
+ /* Already handled above. */
|
||
|
break;
|
||
|
case TRAP_machine_check:
|
||
|
HVMTRACE_0D(MCE);
|
||
|
--- a/xen/arch/x86/x86_32/entry.S
|
||
|
+++ b/xen/arch/x86/x86_32/entry.S
|
||
|
@@ -621,6 +621,14 @@ ENTRY(machine_check)
|
||
|
pushl $TRAP_machine_check<<16
|
||
|
jmp handle_nmi_mce
|
||
|
|
||
|
+/* Enable NMIs. No special register assumptions. All registers are preserved. */
|
||
|
+ENTRY(enable_nmis)
|
||
|
+ /* Set up stack frame */
|
||
|
+ pushf # EFLAGS
|
||
|
+ push %cs # CS
|
||
|
+ push $.Lret # EIP
|
||
|
+ iret # Disable the hardware NMI latch
|
||
|
+
|
||
|
ENTRY(setup_vm86_frame)
|
||
|
mov %ecx,%ds
|
||
|
mov %ecx,%es
|
||
|
@@ -634,7 +642,7 @@ ENTRY(setup_vm86_frame)
|
||
|
.endm
|
||
|
copy_vm86_words
|
||
|
addl $16,%esp
|
||
|
- ret
|
||
|
+.Lret: ret
|
||
|
|
||
|
.section .rodata, "a", @progbits
|
||
|
|
||
|
--- a/xen/arch/x86/x86_64/entry.S
|
||
|
+++ b/xen/arch/x86/x86_64/entry.S
|
||
|
@@ -643,6 +643,22 @@ ENTRY(machine_check)
|
||
|
movl $TRAP_machine_check,4(%rsp)
|
||
|
jmp handle_ist_exception
|
||
|
|
||
|
+/* Enable NMIs. No special register assumptions. Only %rax is not preserved. */
|
||
|
+ENTRY(enable_nmis)
|
||
|
+ movq %rsp, %rax /* Grab RSP before pushing */
|
||
|
+
|
||
|
+ /* Set up stack frame */
|
||
|
+ pushq $0 /* SS */
|
||
|
+ pushq %rax /* RSP */
|
||
|
+ pushfq /* RFLAGS */
|
||
|
+ pushq $__HYPERVISOR_CS /* CS */
|
||
|
+ leaq 1f(%rip),%rax
|
||
|
+ pushq %rax /* RIP */
|
||
|
+
|
||
|
+ iretq /* Disable the hardware NMI latch */
|
||
|
+1:
|
||
|
+ retq
|
||
|
+
|
||
|
.section .rodata, "a", @progbits
|
||
|
|
||
|
ENTRY(exception_table)
|
||
|
--- a/xen/include/asm-x86/processor.h
|
||
|
+++ b/xen/include/asm-x86/processor.h
|
||
|
@@ -584,6 +584,8 @@ DECLARE_TRAP_HANDLER(alignment_check);
|
||
|
DECLARE_TRAP_HANDLER(spurious_interrupt_bug);
|
||
|
#undef DECLARE_TRAP_HANDLER
|
||
|
|
||
|
+void enable_nmis(void);
|
||
|
+
|
||
|
void syscall_enter(void);
|
||
|
void sysenter_entry(void);
|
||
|
void sysenter_eflags_saved(void);
|