51 lines
1.6 KiB
Diff
51 lines
1.6 KiB
Diff
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# Commit 71bb7304e7a7a35ea6df4b0cedebc35028e4c159
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# Date 2015-06-30 15:00:54 +0100
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# Author Liang Li <liang.z.li@intel.com>
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# Committer Ian Campbell <ian.campbell@citrix.com>
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nested EPT: fix the handling of nested EPT
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If the host EPT entry is changed, the nested EPT should be updated.
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the current code does not do this, and it's wrong.
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I have tested this patch, the L2 guest can boot and run as normal.
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Signed-off-by: Liang Li <liang.z.li@intel.com>
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Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
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Reported-by: Tim Deegan <tim@xen.org>
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Reviewed-by: Tim Deegan <tim@xen.org>
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--- a/xen/arch/x86/mm/p2m-ept.c
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+++ b/xen/arch/x86/mm/p2m-ept.c
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@@ -26,6 +26,7 @@
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#include <asm/p2m.h>
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#include <asm/hvm/vmx/vmx.h>
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#include <asm/hvm/vmx/vmcs.h>
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+#include <asm/hvm/nestedhvm.h>
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#include <xen/iommu.h>
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#include <asm/mtrr.h>
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#include <asm/hvm/cacheattr.h>
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@@ -1040,6 +1041,9 @@ void ept_sync_domain(struct p2m_domain *
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ASSERT(local_irq_is_enabled());
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+ if ( nestedhvm_enabled(d) && !p2m_is_nestedp2m(p2m) )
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+ p2m_flush_nestedp2m(d);
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+
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/*
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* Flush active cpus synchronously. Flush others the next time this domain
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* is scheduled onto them. We accept the race of other CPUs adding to
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--- a/xen/arch/x86/mm/p2m.c
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+++ b/xen/arch/x86/mm/p2m.c
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@@ -1713,6 +1713,12 @@ p2m_flush_table(struct p2m_domain *p2m)
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ASSERT(page_list_empty(&p2m->pod.super));
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ASSERT(page_list_empty(&p2m->pod.single));
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+ if ( p2m->np2m_base == P2M_BASE_EADDR )
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+ {
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+ p2m_unlock(p2m);
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+ return;
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+ }
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+
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/* This is no longer a valid nested p2m for any address space */
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p2m->np2m_base = P2M_BASE_EADDR;
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