58 lines
1.6 KiB
Diff
58 lines
1.6 KiB
Diff
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# HG changeset patch
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# User Wei Huang <wei.huang2@amd.com>
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# Date 1302076891 -3600
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# Node ID 8fb61c9ebe499b576687907d164da07802414925
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# Parent 97763efc41f9b664cf6f7db653c9c3f51e50b358
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x86, amd, MTRR: correct DramModEn bit of SYS_CFG MSR
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Some buggy BIOS might set SYS_CFG DramModEn bit to 1, which can cause
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unexpected behavior on AMD platforms. This patch clears DramModEn bit
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if it is 1.
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Signed-off-by: Wei Huang <wei.huang2@amd.com>
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--- a/xen/arch/x86/cpu/amd.c
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+++ b/xen/arch/x86/cpu/amd.c
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@@ -318,6 +318,32 @@ static void check_disable_c1e(unsigned i
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on_each_cpu(disable_c1e, NULL, 1);
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}
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+/*
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+ * BIOS is expected to clear MtrrFixDramModEn bit. According to AMD BKDG :
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+ * "The MtrrFixDramModEn bit should be set to 1 during BIOS initalization of
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+ * the fixed MTRRs, then cleared to 0 for operation."
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+ */
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+static void check_syscfg_dram_mod_en(void)
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+{
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+ uint64_t syscfg;
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+ static bool_t printed = 0;
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+
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+ if (!((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) &&
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+ (boot_cpu_data.x86 >= 0x0f)))
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+ return;
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+
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+ rdmsrl(MSR_K8_SYSCFG, syscfg);
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+ if (!(syscfg & K8_MTRRFIXRANGE_DRAM_MODIFY))
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+ return;
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+
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+ if (!test_and_set_bool(printed))
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+ printk(KERN_ERR "MTRR: SYSCFG[MtrrFixDramModEn] not "
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+ "cleared by BIOS, clearing this bit\n");
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+
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+ syscfg &= ~K8_MTRRFIXRANGE_DRAM_MODIFY;
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+ wrmsrl(MSR_K8_SYSCFG, syscfg);
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+}
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+
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static void __devinit init_amd(struct cpuinfo_x86 *c)
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{
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u32 l, h;
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@@ -587,6 +613,8 @@ static void __devinit init_amd(struct cp
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disable_c1_ramping();
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set_cpuidmask(c);
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+
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+ check_syscfg_dram_mod_en();
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}
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static unsigned int __cpuinit amd_size_cache(struct cpuinfo_x86 * c, unsigned int size)
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