58 lines
2.2 KiB
Diff
58 lines
2.2 KiB
Diff
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# Commit 04734664eb20c3bf239e473af182bb7ab901d779
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# Date 2014-05-20 15:54:01 +0200
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# Author Jan Beulich <jbeulich@suse.com>
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# Committer Jan Beulich <jbeulich@suse.com>
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VT-d: extend error report masking workaround to newer chipsets
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Add two more PCI IDs to the set that has been taken care of with a
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different workaround long before XSA-59, and (for constency with the
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newer workarounds) log a message here too.
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Also move the function wide comment to the cases it applies to; this
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should really have been done by d061d200 ("VT-d: suppress UR signaling
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for server chipsets").
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This is CVE-2013-3495 / XSA-59.
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Signed-off-by: Jan Beulich <jbeulich@suse.com>
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Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
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Acked-by: Xiantao Zhang <xiantao.zhang@intel.com>
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Acked-by: Yang Zhang <yang.z.zhang@intel.com>
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--- a/xen/drivers/passthrough/vtd/quirks.c
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+++ b/xen/drivers/passthrough/vtd/quirks.c
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@@ -379,12 +379,6 @@ void me_wifi_quirk(struct domain *domain
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}
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}
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-/*
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- * Mask reporting Intel VT-d faults to IOH core logic:
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- * - Some platform escalates VT-d faults to platform errors
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- * - This can cause system failure upon non-fatal VT-d faults
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- * - Potential security issue if malicious guest trigger VT-d faults
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- */
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void pci_vtd_quirk(const struct pci_dev *pdev)
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{
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int seg = pdev->seg;
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@@ -402,10 +396,20 @@ void pci_vtd_quirk(const struct pci_dev
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switch ( pci_conf_read16(seg, bus, dev, func, PCI_DEVICE_ID) )
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{
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+ /*
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+ * Mask reporting Intel VT-d faults to IOH core logic:
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+ * - Some platform escalates VT-d faults to platform errors.
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+ * - This can cause system failure upon non-fatal VT-d faults.
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+ * - Potential security issue if malicious guest trigger VT-d faults.
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+ */
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+ case 0x0e28: /* Xeon-E5v2 (IvyBridge) */
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case 0x342e: /* Tylersburg chipset (Nehalem / Westmere systems) */
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+ case 0x3728: /* Xeon C5500/C3500 (JasperForest) */
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case 0x3c28: /* Sandybridge */
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val = pci_conf_read32(seg, bus, dev, func, 0x1AC);
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pci_conf_write32(seg, bus, dev, func, 0x1AC, val | (1 << 31));
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+ printk(XENLOG_INFO "Masked VT-d error signaling on %04x:%02x:%02x.%u\n",
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+ seg, bus, dev, func);
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break;
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/* Tylersburg (EP)/Boxboro (MP) chipsets (NHM-EP/EX, WSM-EP/EX) */
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