90 lines
2.5 KiB
Diff
90 lines
2.5 KiB
Diff
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# HG changeset patch
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# User Keir Fraser <keir@xen.org>
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# Date 1286784156 -3600
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# Node ID eb964c4b4f31c6b7bdfe8504839c4acac776f506
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# Parent a1405385db77c7c81aac27bd88d6c4b2d90b1389
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x86-64: workaround for BIOSes wrongly enabling LAHF_LM feature indicator
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This workaround is taken from Linux, and the main motivation (besides
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such workarounds indeed belonging in the hypervisor rather than each
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kernel) is to suppress the warnings in the Xen log each Linux guest
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would cause due to the disallowed wrmsr.
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Signed-off-by: Jan Beulich <jbeulich@novell.com>
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--- a/xen/arch/x86/cpu/amd.c
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+++ b/xen/arch/x86/cpu/amd.c
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@@ -44,6 +44,47 @@ static inline void wrmsr_amd(unsigned in
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);
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}
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+static inline int rdmsr_amd_safe(unsigned int msr, unsigned int *lo,
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+ unsigned int *hi)
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+{
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+ int err;
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+
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+ asm volatile("1: rdmsr\n2:\n"
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+ ".section .fixup,\"ax\"\n"
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+ "3: movl %6,%2\n"
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+ " jmp 2b\n"
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+ ".previous\n"
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+ ".section __ex_table,\"a\"\n"
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+ __FIXUP_ALIGN "\n"
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+ __FIXUP_WORD " 1b,3b\n"
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+ ".previous\n"
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+ : "=a" (*lo), "=d" (*hi), "=r" (err)
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+ : "c" (msr), "D" (0x9c5a203a), "2" (0), "i" (-EFAULT));
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+
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+ return err;
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+}
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+
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+static inline int wrmsr_amd_safe(unsigned int msr, unsigned int lo,
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+ unsigned int hi)
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+{
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+ int err;
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+
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+ asm volatile("1: wrmsr\n2:\n"
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+ ".section .fixup,\"ax\"\n"
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+ "3: movl %6,%0\n"
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+ " jmp 2b\n"
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+ ".previous\n"
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+ ".section __ex_table,\"a\"\n"
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+ __FIXUP_ALIGN "\n"
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+ __FIXUP_WORD " 1b,3b\n"
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+ ".previous\n"
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+ : "=r" (err)
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+ : "c" (msr), "a" (lo), "d" (hi), "D" (0x9c5a203a),
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+ "0" (0), "i" (-EFAULT));
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+
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+ return err;
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+}
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+
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/*
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* Mask the features and extended features returned by CPUID. Parameters are
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* set from the boot line via two methods:
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@@ -330,6 +371,24 @@ static void __devinit init_amd(struct cp
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3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
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clear_bit(0*32+31, c->x86_capability);
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+#ifdef CONFIG_X86_64
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+ if (c->x86 == 0xf && c->x86_model < 0x14
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+ && cpu_has(c, X86_FEATURE_LAHF_LM)) {
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+ /*
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+ * Some BIOSes incorrectly force this feature, but only K8
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+ * revision D (model = 0x14) and later actually support it.
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+ * (AMD Erratum #110, docId: 25759).
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+ */
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+ unsigned int lo, hi;
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+
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+ clear_bit(X86_FEATURE_LAHF_LM, c->x86_capability);
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+ if (!rdmsr_amd_safe(0xc001100d, &lo, &hi)) {
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+ hi &= ~1;
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+ wrmsr_amd_safe(0xc001100d, lo, hi);
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+ }
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+ }
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+#endif
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+
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r = get_model_name(c);
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switch(c->x86)
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