69 lines
2.0 KiB
Diff
69 lines
2.0 KiB
Diff
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# Commit 2bfc9fc52ce8485fa43e79bbdc32360c74e12fe8
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# Date 2015-05-08 10:59:26 +0200
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# Author David Vrabel <david.vrabel@citrix.com>
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# Committer Jan Beulich <jbeulich@suse.com>
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x86: provide arch_fetch_and_add()
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arch_fetch_and_add() atomically adds a value and returns the previous
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value.
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This is needed to implement ticket locks.
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Signed-off-by: David Vrabel <david.vrabel@citrix.com>
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--- sle12sp1.orig/xen/include/asm-x86/system.h 2015-01-14 18:44:18.000000000 +0100
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+++ sle12sp1/xen/include/asm-x86/system.h 2015-07-08 12:35:11.000000000 +0200
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@@ -118,6 +118,52 @@ static always_inline unsigned long __cmp
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})
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/*
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+ * Undefined symbol to cause link failure if a wrong size is used with
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+ * arch_fetch_and_add().
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+ */
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+extern unsigned long __bad_fetch_and_add_size(void);
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+
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+static always_inline unsigned long __xadd(
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+ volatile void *ptr, unsigned long v, int size)
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+{
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+ switch ( size )
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+ {
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+ case 1:
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+ asm volatile ( "lock; xaddb %b0,%1"
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+ : "+r" (v), "+m" (*__xg(ptr))
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+ :: "memory");
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+ return v;
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+ case 2:
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+ asm volatile ( "lock; xaddw %w0,%1"
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+ : "+r" (v), "+m" (*__xg(ptr))
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+ :: "memory");
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+ return v;
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+ case 4:
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+ asm volatile ( "lock; xaddl %k0,%1"
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+ : "+r" (v), "+m" (*__xg(ptr))
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+ :: "memory");
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+ return v;
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+ case 8:
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+ asm volatile ( "lock; xaddq %q0,%1"
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+ : "+r" (v), "+m" (*__xg(ptr))
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+ :: "memory");
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+
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+ return v;
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+ default:
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+ return __bad_fetch_and_add_size();
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+ }
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+}
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+
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+/*
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+ * Atomically add @v to the 1, 2, 4, or 8 byte value at @ptr. Returns
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+ * the previous value.
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+ *
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+ * This is a full memory barrier.
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+ */
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+#define arch_fetch_and_add(ptr, v) \
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+ ((typeof(*(ptr)))__xadd(ptr, (typeof(*(ptr)))(v), sizeof(*(ptr))))
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+
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+/*
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* Both Intel and AMD agree that, from a programmer's viewpoint:
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* Loads cannot be reordered relative to other loads.
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* Stores cannot be reordered relative to other stores.
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