106 lines
3.0 KiB
Diff
106 lines
3.0 KiB
Diff
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References: bnc#882127
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# Commit e0fe297dabc96d8161d568f19a99722c4739b9f9
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# Date 2014-06-18 15:53:27 +0200
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# Author Jan Beulich <jbeulich@suse.com>
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# Committer Jan Beulich <jbeulich@suse.com>
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x86/EFI: allow FPU/XMM use in runtime service functions
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UEFI spec update 2.4B developed a requirement to enter runtime service
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functions with CR0.TS (and CR0.EM) clear, thus making feasible the
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already previously stated permission for these functions to use some of
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the XMM registers. Enforce this requirement (along with the connected
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ones on FPU control word and MXCSR) by going through a full FPU save
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cycle (if the FPU was dirty) in efi_rs_enter() (along with loading the
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specified values into the other two registers).
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Note that the UEFI spec mandates that extension registers other than
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XMM ones (for our purposes all that get restored eagerly) are preserved
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across runtime function calls, hence there's nothing we need to restore
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in efi_rs_leave() (they do get saved, but just for simplicity's sake).
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Signed-off-by: Jan Beulich <jbeulich@suse.com>
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--- a/xen/arch/x86/efi/runtime.c
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+++ b/xen/arch/x86/efi/runtime.c
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@@ -10,6 +10,8 @@ DEFINE_XEN_GUEST_HANDLE(CHAR16);
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#ifndef COMPAT
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+# include <asm/i387.h>
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+# include <asm/xstate.h>
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# include <public/platform.h>
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const bool_t efi_enabled = 1;
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@@ -45,8 +47,14 @@ const struct efi_pci_rom *__read_mostly
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unsigned long efi_rs_enter(void)
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{
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+ static const u16 fcw = FCW_DEFAULT;
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+ static const u32 mxcsr = MXCSR_DEFAULT;
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unsigned long cr3 = read_cr3();
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+ save_fpu_enable();
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+ asm volatile ( "fldcw %0" :: "m" (fcw) );
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+ asm volatile ( "ldmxcsr %0" :: "m" (mxcsr) );
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+
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spin_lock(&efi_rs_lock);
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/* prevent fixup_page_fault() from doing anything */
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@@ -82,6 +90,7 @@ void efi_rs_leave(unsigned long cr3)
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}
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irq_exit();
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spin_unlock(&efi_rs_lock);
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+ stts();
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}
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unsigned long efi_get_time(void)
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--- a/xen/arch/x86/i387.c
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+++ b/xen/arch/x86/i387.c
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@@ -266,10 +266,10 @@ void vcpu_restore_fpu_lazy(struct vcpu *
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* On each context switch, save the necessary FPU info of VCPU being switch
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* out. It dispatches saving operation based on CPU's capability.
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*/
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-void vcpu_save_fpu(struct vcpu *v)
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+static bool_t _vcpu_save_fpu(struct vcpu *v)
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{
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if ( !v->fpu_dirtied && !v->arch.nonlazy_xstate_used )
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- return;
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+ return 0;
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ASSERT(!is_idle_vcpu(v));
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@@ -284,9 +284,22 @@ void vcpu_save_fpu(struct vcpu *v)
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fpu_fsave(v);
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v->fpu_dirtied = 0;
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+
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+ return 1;
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+}
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+
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+void vcpu_save_fpu(struct vcpu *v)
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+{
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+ _vcpu_save_fpu(v);
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stts();
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}
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+void save_fpu_enable(void)
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+{
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+ if ( !_vcpu_save_fpu(current) )
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+ clts();
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+}
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+
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/* Initialize FPU's context save area */
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int vcpu_init_fpu(struct vcpu *v)
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{
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--- a/xen/include/asm-x86/i387.h
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+++ b/xen/include/asm-x86/i387.h
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@@ -38,6 +38,7 @@ struct ix87_state {
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void vcpu_restore_fpu_eager(struct vcpu *v);
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void vcpu_restore_fpu_lazy(struct vcpu *v);
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void vcpu_save_fpu(struct vcpu *v);
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+void save_fpu_enable(void);
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int vcpu_init_fpu(struct vcpu *v);
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void vcpu_destroy_fpu(struct vcpu *v);
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