63 lines
2.3 KiB
Diff
63 lines
2.3 KiB
Diff
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# Commit 96d1b237ae9b2f2718bb1c59820701f17d3d86e0
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# Date 2014-03-17 16:47:22 +0100
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# Author Jan Beulich <jbeulich@suse.com>
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# Committer Jan Beulich <jbeulich@suse.com>
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x86/Intel: work around Xeon 7400 series erratum AAI65
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Linux commit 40e2d7f9b5dae048789c64672bf3027fbb663ffa ("x86 idle:
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Repair large-server 50-watt idle-power regression") tells us that this
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applies not just to the named Xeon 7400 series, but also NHM-EX and
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WSM-EX; sadly Intel's documentation is so badly searchable that I
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wasn't able to locate the respective errata (and hence can't quote
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their numbers here).
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Signed-off-by: Jan Beulich <jbeulich@suse.com>
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Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
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Acked-by: Kevin Tian <kevin.tian@intel.com>
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--- a/xen/arch/x86/acpi/cpu_idle.c
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+++ b/xen/arch/x86/acpi/cpu_idle.c
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@@ -296,6 +296,9 @@ void mwait_idle_with_hints(unsigned int
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unsigned int cpu = smp_processor_id();
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s_time_t expires = per_cpu(timer_deadline, cpu);
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+ if ( boot_cpu_has(X86_FEATURE_CLFLUSH_MONITOR) )
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+ clflush((void *)&mwait_wakeup(cpu));
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+
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__monitor((void *)&mwait_wakeup(cpu), 0, 0);
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smp_mb();
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--- a/xen/arch/x86/cpu/intel.c
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+++ b/xen/arch/x86/cpu/intel.c
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@@ -147,6 +147,9 @@ void __devinit early_intel_workaround(st
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/*
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* P4 Xeon errata 037 workaround.
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* Hardware prefetcher may cause stale data to be loaded into the cache.
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+ *
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+ * Xeon 7400 erratum AAI65 (and further newer Xeons)
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+ * MONITOR/MWAIT may have excessive false wakeups
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*/
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static void __devinit Intel_errata_workarounds(struct cpuinfo_x86 *c)
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{
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@@ -161,6 +164,10 @@ static void __devinit Intel_errata_worka
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wrmsr (MSR_IA32_MISC_ENABLE, lo, hi);
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}
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}
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+
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+ if (c->x86 == 6 && cpu_has_clflush &&
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+ (c->x86_model == 29 || c->x86_model == 46 || c->x86_model == 47))
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+ set_bit(X86_FEATURE_CLFLUSH_MONITOR, c->x86_capability);
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}
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--- a/xen/include/asm-x86/cpufeature.h
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+++ b/xen/include/asm-x86/cpufeature.h
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@@ -71,6 +71,7 @@
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#define X86_FEATURE_TSC_RELIABLE (3*32+12) /* TSC is known to be reliable */
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#define X86_FEATURE_XTOPOLOGY (3*32+13) /* cpu topology enum extensions */
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#define X86_FEATURE_CPUID_FAULTING (3*32+14) /* cpuid faulting */
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+#define X86_FEATURE_CLFLUSH_MONITOR (3*32+15) /* clflush reqd with monitor */
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/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
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#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */
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