103 lines
3.3 KiB
Diff
103 lines
3.3 KiB
Diff
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# HG changeset patch
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# User Tim Deegan <Tim.Deegan@citrix.com>
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# Date 1311081181 -3600
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# Node ID b3434f24b0827c5ef34e4b4a72893288e2ffbe40
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# Parent 18653a163b1e8e10b4353272bcb9e8302bfd2e19
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x86: Remove timeouts from INIT-SIPI-SIPI sequence when using x2apic.
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Some of the timeouts are pointless since they're waiting for the ICR
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to ack the IPI delivery and that doesn't happen on x2apic.
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The others should be benign (and are suggested in the SDM) but
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removing them makes AP bringup much more reliable on some test boxes.
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Signed-off-by: Tim Deegan <Tim.Deegan@citrix.com>
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--- a/xen/arch/x86/smpboot.c
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+++ b/xen/arch/x86/smpboot.c
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@@ -448,29 +448,30 @@ static int wakeup_secondary_cpu(int phys
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apic_icr_write(APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT,
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phys_apicid);
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- Dprintk("Waiting for send to finish...\n");
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- timeout = 0;
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- do {
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- Dprintk("+");
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- udelay(100);
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- if ( !x2apic_enabled )
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+ if ( !x2apic_enabled )
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+ {
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+ Dprintk("Waiting for send to finish...\n");
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+ timeout = 0;
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+ do {
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+ Dprintk("+");
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+ udelay(100);
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send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;
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- } while ( send_status && (timeout++ < 1000) );
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+ } while ( send_status && (timeout++ < 1000) );
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- mdelay(10);
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+ mdelay(10);
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- Dprintk("Deasserting INIT.\n");
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+ Dprintk("Deasserting INIT.\n");
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- apic_icr_write(APIC_INT_LEVELTRIG | APIC_DM_INIT, phys_apicid);
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+ apic_icr_write(APIC_INT_LEVELTRIG | APIC_DM_INIT, phys_apicid);
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- Dprintk("Waiting for send to finish...\n");
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- timeout = 0;
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- do {
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- Dprintk("+");
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- udelay(100);
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- if ( !x2apic_enabled )
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+ Dprintk("Waiting for send to finish...\n");
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+ timeout = 0;
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+ do {
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+ Dprintk("+");
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+ udelay(100);
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send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;
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- } while ( send_status && (timeout++ < 1000) );
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+ } while ( send_status && (timeout++ < 1000) );
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+ }
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/*
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* Should we send STARTUP IPIs ?
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@@ -499,22 +500,24 @@ static int wakeup_secondary_cpu(int phys
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*/
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apic_icr_write(APIC_DM_STARTUP | (start_eip >> 12), phys_apicid);
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- /* Give the other CPU some time to accept the IPI. */
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- udelay(300);
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+ if ( !x2apic_enabled )
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+ {
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+ /* Give the other CPU some time to accept the IPI. */
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+ udelay(300);
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- Dprintk("Startup point 1.\n");
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+ Dprintk("Startup point 1.\n");
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- Dprintk("Waiting for send to finish...\n");
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- timeout = 0;
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- do {
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- Dprintk("+");
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- udelay(100);
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- if ( !x2apic_enabled )
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- send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;
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- } while ( send_status && (timeout++ < 1000) );
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+ Dprintk("Waiting for send to finish...\n");
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+ timeout = 0;
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+ do {
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+ Dprintk("+");
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+ udelay(100);
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+ send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;
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+ } while ( send_status && (timeout++ < 1000) );
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- /* Give the other CPU some time to accept the IPI. */
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- udelay(200);
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+ /* Give the other CPU some time to accept the IPI. */
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+ udelay(200);
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+ }
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/* Due to the Pentium erratum 3AP. */
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if ( maxlvt > 3 )
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