# HG changeset patch
# User Keir Fraser <keir@xen.org>
# Date 1294220923 0
# Node ID 76d897a06b316bf2278220b006d578faf31ce3fb
# Parent  fece73d4d30985ce40ef87dcd379ce6beb8aadf3
x86 amd: Revert 6382:b74c15e4dd4f (AMD flush filter configuration)

Flush filter is not reliably supported by any processor, we already
have code to unconditionally disable the filter, so we don't need the
command-line config option. Remove it.

Signed-off-by: Keir Fraser <keir@xen.org>

Index: xen-4.0.2-testing/xen/arch/x86/cpu/amd.c
===================================================================
--- xen-4.0.2-testing.orig/xen/arch/x86/cpu/amd.c
+++ xen-4.0.2-testing/xen/arch/x86/cpu/amd.c
@@ -237,20 +237,6 @@ int cpu_has_amd_erratum(const struct cpu
 	return 0;
 }
 
-/*
- * amd_flush_filter={on,off}. Forcibly Enable or disable the TLB flush
- * filter on AMD 64-bit processors.
- */
-static int flush_filter_force;
-static void flush_filter(char *s)
-{
-	if (!strcmp(s, "off"))
-		flush_filter_force = -1;
-	if (!strcmp(s, "on"))
-		flush_filter_force = 1;
-}
-custom_param("amd_flush_filter", flush_filter);
-
 #define num_physpages 0
 
 /*
@@ -545,21 +531,6 @@ static void __devinit init_amd(struct cp
 		break;
 	}
 
-	if (c->x86 == 15) {
-		rdmsr(MSR_K7_HWCR, l, h);
-		printk(KERN_INFO "CPU%d: AMD Flush Filter %sabled",
-		       smp_processor_id(), (l & (1<<6)) ? "dis" : "en");
-		if ((flush_filter_force > 0) && (l & (1<<6))) {
-			l &= ~(1<<6);
-			printk(" -> Forcibly enabled");
-		} else if ((flush_filter_force < 0) && !(l & (1<<6))) {
-			l |= 1<<6;
-			printk(" -> Forcibly disabled");
-		}
-		wrmsr(MSR_K7_HWCR, l, h);
-		printk("\n");
-	}
-
 	display_cacheinfo(c);
 
 	if (cpuid_eax(0x80000000) >= 0x80000008) {