# HG changeset patch
# User Liu, Jinsong <jinsong.liu@intel.com>
# Date 1323170884 0
# Node ID d313582d4fa2157332f1d50e599aebca36c41b3b
# Parent  a0befa32e927cc147aaee9bce42c51f53580a875
X86: Disable PCID/INVPCID for pv

This patch disable PCID/INVPCID for pv.

Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
Committed-by: Keir Fraser <keir@xen.org>

--- a/tools/libxc/xc_cpufeature.h
+++ b/tools/libxc/xc_cpufeature.h
@@ -78,6 +78,7 @@
 #define X86_FEATURE_CX16        13 /* CMPXCHG16B */
 #define X86_FEATURE_XTPR        14 /* Send Task Priority Messages */
 #define X86_FEATURE_PDCM        15 /* Perf/Debug Capability MSR */
+#define X86_FEATURE_PCID        17 /* Process Context ID */
 #define X86_FEATURE_DCA         18 /* Direct Cache Access */
 #define X86_FEATURE_SSE4_1      19 /* Streaming SIMD Extensions 4.1 */
 #define X86_FEATURE_SSE4_2      20 /* Streaming SIMD Extensions 4.2 */
@@ -132,5 +133,6 @@
 #define X86_FEATURE_SMEP         7 /* Supervisor Mode Execution Protection */
 #define X86_FEATURE_BMI2         8 /* 2nd group bit manipulation extensions */
 #define X86_FEATURE_ERMS         9 /* Enhanced REP MOVSB/STOSB */
+#define X86_FEATURE_INVPCID     10 /* Invalidate Process Context ID */
 
 #endif /* __LIBXC_CPUFEATURE_H */
--- a/tools/libxc/xc_cpuid_x86.c
+++ b/tools/libxc/xc_cpuid_x86.c
@@ -427,6 +427,7 @@ static void xc_cpuid_pv_policy(
         }
         clear_bit(X86_FEATURE_XTPR, regs[2]);
         clear_bit(X86_FEATURE_PDCM, regs[2]);
+        clear_bit(X86_FEATURE_PCID, regs[2]);
         clear_bit(X86_FEATURE_DCA, regs[2]);
         set_bit(X86_FEATURE_HYPERVISOR, regs[2]);
         break;