# HG changeset patch
# User Keir Fraser <keir.fraser@citrix.com>
# Date 1275892689 -3600
# Node ID 0251bbc0a9a879126bce65e47e4410575cfa73de
# Parent  7ff0e885b5c30cc8573b52144b274509e04759fd
AMD: Workaround for erratum 411

Clear APIC TMICT when we mask APIC LVTT.

Signed-off-by: Wei Wang <wei.wang2@amd.com>

Index: xen-4.0.0-testing/xen/arch/x86/apic.c
===================================================================
--- xen-4.0.0-testing.orig/xen/arch/x86/apic.c
+++ xen-4.0.0-testing/xen/arch/x86/apic.c
@@ -195,6 +195,9 @@ void clear_local_APIC(void)
 
     maxlvt = get_maxlvt();
 
+    /* Work around AMD Erratum 411. This is a nice thing to do anyway. */
+    apic_write_around(APIC_TMICT, 0);
+
     /*
      * Masking an LVT entry on a P6 can trigger a local APIC error
      * if the vector is zero. Mask LVTERR first to prevent this.
@@ -1184,7 +1187,10 @@ void disable_APIC_timer(void)
 {
     if (using_apic_timer) {
         unsigned long v;
-        
+
+        /* Work around AMD Erratum 411. This is a nice thing to do anyway. */
+        apic_write_around(APIC_TMICT, 0);
+
         v = apic_read(APIC_LVTT);
         apic_write_around(APIC_LVTT, v | APIC_LVT_MASKED);
     }
Index: xen-4.0.0-testing/xen/arch/x86/hpet.c
===================================================================
--- xen-4.0.0-testing.orig/xen/arch/x86/hpet.c
+++ xen-4.0.0-testing/xen/arch/x86/hpet.c
@@ -659,8 +659,7 @@ void hpet_broadcast_enter(void)
     if ( hpet_attach_channel )
         hpet_attach_channel(cpu, ch);
 
-    /* Cancel any outstanding LAPIC timer event and disable interrupts. */
-    reprogram_timer(0);
+    /* Disable LAPIC timer interrupts. */
     disable_APIC_timer();
 
     cpu_set(cpu, ch->cpumask);