# HG changeset 15433 patch
# User Ian Campbell <ian.campbell@xensource.com>
# Date 1183052420 -3600
# Node ID a5360bf1866892498f4fda9fb86f96035143221d
# Parent  d0608ecb56bc9dd77740096fd734332c46c737bd
Fix fixup of invalid PTE writes, broken by 13392:0fd65225e4c6.

By the time we test if addr is the upper word it has already been
aligned to the 8 byte pte size.

Signed-off-by: Ian Campbell <ian.campbell@xensource.com>

Index: 2007-05-14/xen/arch/x86/mm.c
===================================================================
--- 2007-05-14.orig/xen/arch/x86/mm.c	2007-07-02 10:39:23.000000000 +0200
+++ 2007-05-14/xen/arch/x86/mm.c	2007-07-02 10:51:13.000000000 +0200
@@ -3196,6 +3196,7 @@ static int ptwr_emulated_update(
     struct ptwr_emulate_ctxt *ptwr_ctxt)
 {
     unsigned long mfn;
+    unsigned long unaligned_addr = addr;
     struct page_info *page;
     l1_pgentry_t pte, ol1e, nl1e, *pl1e;
     struct vcpu *v = current;
@@ -3249,7 +3250,7 @@ static int ptwr_emulated_update(
     if ( unlikely(!get_page_from_l1e(gl1e_to_ml1e(d, nl1e), d)) )
     {
         if ( (CONFIG_PAGING_LEVELS >= 3) && is_pv_32bit_domain(d) &&
-             (bytes == 4) && (addr & 4) && !do_cmpxchg &&
+             (bytes == 4) && (unaligned_addr & 4) && !do_cmpxchg &&
              (l1e_get_flags(nl1e) & _PAGE_PRESENT) )
         {
             /*