# HG changeset patch
# User Keir Fraser <keir.fraser@citrix.com>
# Date 1221489878 -3600
# Node ID 75c4a603d9cd7f73366986261e1078fce1ead815
# Parent  59aba2cbbb58111de1aba6b173800d62956cf26f
x86: Fix 32-bit build after AMD microcode update patch.
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>

Index: xen-3.3.1-testing/xen/arch/x86/microcode_amd.c
===================================================================
--- xen-3.3.1-testing.orig/xen/arch/x86/microcode_amd.c
+++ xen-3.3.1-testing/xen/arch/x86/microcode_amd.c
@@ -170,11 +170,10 @@ out:
 static int apply_microcode_amd(int cpu)
 {
 	unsigned long flags;
-	unsigned int eax, edx;
-	unsigned int rev;
+	uint32_t eax, edx, rev;
 	int cpu_num = raw_smp_processor_id();
 	struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
-	unsigned long addr;
+	uint64_t addr;
 
 	/* We should bind the task to the CPU */
 	BUG_ON(cpu_num != cpu);
@@ -185,8 +184,8 @@ static int apply_microcode_amd(int cpu)
 	spin_lock_irqsave(&microcode_update_lock, flags);
 
 	addr = (unsigned long)&uci->mc.mc_amd->hdr.data_code;
-	edx = (unsigned int)((unsigned long)(addr >> 32));
-	eax = (unsigned int)((unsigned long)(addr & 0xffffffff));
+	edx = (uint32_t)(addr >> 32);
+	eax = (uint32_t)addr;
 
 	asm volatile("movl %0, %%ecx; wrmsr" :
 		     : "i" (MSR_AMD_PATCHLOADER), "a" (eax), "d" (edx) : "ecx");